* [PATCH 2/2] clk: mxs: don't register a clkdev for enet_out
From: Stephen Boyd @ 2016-10-20 23:50 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161020075840.16406-2-u.kleine-koenig@pengutronix.de>
On 10/20, Uwe Kleine-K?nig wrote:
> The last user is gone in the previous commit. So this can be removed, too.
>
> Signed-off-by: Uwe Kleine-K?nig <u.kleine-koenig@pengutronix.de>
> ---
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
I'm fine if this goes through arm-soc if you want to bunch them
together. Otherwise just resend the patch once the ARM side
merges into some -rc1 and we can remove it in the next next
release.
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply
* [PATCH v5 23/23] phy: Add support for Qualcomm's USB HS phy
From: Stephen Boyd @ 2016-10-20 23:20 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161018015636.11701-24-stephen.boyd@linaro.org>
Quoting Stephen Boyd (2016-10-17 18:56:36)
> +
> +static int
> +qcom_usb_hs_phy_vbus_notifier(struct notifier_block *nb, unsigned long event,
> + void *ptr)
> +{
> + struct qcom_usb_hs_phy *uphy;
> + int is_host;
> + u8 addr;
> +
> + uphy = container_of(nb, struct qcom_usb_hs_phy, vbus_notify);
> + is_host = extcon_get_cable_state_(uphy->id_edev, EXTCON_USB_HOST);
Please don't apply this patch. This call now deadlocks on v4.9-rc1
because of how extcon_get_cable_state_() now grabs a lock that is
already held here when we're inside the notifier. It's not really
required that we grab the lock in extcon there, but this has exposed a
flaw in the logic anyway. We don't know if the id pin is going to toggle
before or after this function is called, so we should really keep track
of both vbus and id state in this driver and then do the same ulpi
writes from two different notifiers for both vbus and id pin. We would
be duplicating work sometimes, but that's pretty much the best solution
I can come up with. Otherwise it's racy.
^ permalink raw reply
* [PATCH] drm: convert DT component matching to component_match_add_release()
From: Sean Paul @ 2016-10-20 23:15 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161020215022.GZ1041@n2100.armlinux.org.uk>
On Thu, Oct 20, 2016 at 5:50 PM, Russell King - ARM Linux
<linux@armlinux.org.uk> wrote:
> On Thu, Oct 20, 2016 at 04:39:04PM -0400, Sean Paul wrote:
>> On Wed, Oct 19, 2016 at 6:28 AM, Russell King
>> <rmk+kernel@armlinux.org.uk> wrote:
>> > Convert DT component matching to use component_match_add_release().
>> >
>> > Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
>> > ---
>> > Can we please get this patch from May merged into the drm-misc or
>> > whatever trees so that we don't end up with conflicts? I've no idea
>> > who looks after drm-misc, as they have _still_ failed to add
>> > themselves to MAINTAINERS.
>>
>> I think Daniel explained pretty clearly why this wasn't happening in
>> the previous thread.
>>
>> Next time you send a v2, can you please mark it as such and include a
>> "Changes in v2" section?
>
> Why - nothing's changed other than a rebase onto 4.9-rc1. This isn't
> a "I've changed it in XYZ way, so here's a new copy".
Changes in v2: None
Is still useful since:
a) the diffstat is different from v1, which necessitates me going
through both versions to see what's changed from the previous reviews
(only to find out myself that it's been rebased and a function has
changed names)
b) in June, you said you were going to roll a new version with the
common OF bits extracted. it's nice to know at the outset that this
has/hasn't happened
Also, prefacing the subject with [PATCH v2] or [PATCH RESEND] lets me
know there is prior history with the change. Reading the previous
version is helpful to see what reviewer's concerns were, and whether
they've been addressed.
> It's being
> posted in the hope that someone will finally either comment on it or
> merge the damn thing, rather than ignoring it was done when it was
> last posted.
>
>> > drivers/gpu/drm/arm/hdlcd_drv.c | 3 ++-
>> > drivers/gpu/drm/arm/malidp_drv.c | 4 +++-
>> > drivers/gpu/drm/armada/armada_drv.c | 2 +-
>> > drivers/gpu/drm/drm_of.c | 28 +++++++++++++++++++++++--
>> > drivers/gpu/drm/etnaviv/etnaviv_drv.c | 5 +++--
>> > drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c | 7 ++++---
>> > drivers/gpu/drm/mediatek/mtk_drm_drv.c | 4 +++-
>> > drivers/gpu/drm/msm/msm_drv.c | 12 ++++++-----
>> > drivers/gpu/drm/rockchip/rockchip_drm_drv.c | 6 ++++--
>> > drivers/gpu/drm/sti/sti_drv.c | 5 +++--
>> > drivers/gpu/drm/sun4i/sun4i_drv.c | 3 ++-
>> > drivers/gpu/drm/tilcdc/tilcdc_external.c | 4 +++-
>> > include/drm/drm_of.h | 12 +++++++++++
>> > 13 files changed, 73 insertions(+), 22 deletions(-)
>> >
>> > diff --git a/drivers/gpu/drm/arm/hdlcd_drv.c b/drivers/gpu/drm/arm/hdlcd_drv.c
>> > index fb6a418ce6be..6477d1a65266 100644
>> > --- a/drivers/gpu/drm/arm/hdlcd_drv.c
>> > +++ b/drivers/gpu/drm/arm/hdlcd_drv.c
>> > @@ -453,7 +453,8 @@ static int hdlcd_probe(struct platform_device *pdev)
>> > return -EAGAIN;
>> > }
>> >
>> > - component_match_add(&pdev->dev, &match, compare_dev, port);
>> > + drm_of_component_match_add(&pdev->dev, &match, compare_dev, port);
>> > + of_node_put(port);
>>
>> There's no mention in your commit message about fixing these node leaks.
>
> Isn't that kind-of the whole point of this patch?
>
Not according to the commit msg, it isn't.
You could have just done the of_node_put adds/relocations without
wrapping component_match_add_release.
Sean
>> >
>> > return component_master_add_with_match(&pdev->dev, &hdlcd_master_ops,
>> > match);
>> > diff --git a/drivers/gpu/drm/arm/malidp_drv.c b/drivers/gpu/drm/arm/malidp_drv.c
>> > index 9280358b8f15..9f4739452a25 100644
>> > --- a/drivers/gpu/drm/arm/malidp_drv.c
>> > +++ b/drivers/gpu/drm/arm/malidp_drv.c
>> > @@ -493,7 +493,9 @@ static int malidp_platform_probe(struct platform_device *pdev)
>> > return -EAGAIN;
>> > }
>> >
>> > - component_match_add(&pdev->dev, &match, malidp_compare_dev, port);
>> > + drm_of_component_match_add(&pdev->dev, &match, malidp_compare_dev,
>> > + port);
>> > + of_node_put(port);
>> > return component_master_add_with_match(&pdev->dev, &malidp_master_ops,
>> > match);
>> > }
>> > diff --git a/drivers/gpu/drm/armada/armada_drv.c b/drivers/gpu/drm/armada/armada_drv.c
>> > index 1e0e68f608e4..94e46da9a758 100644
>> > --- a/drivers/gpu/drm/armada/armada_drv.c
>> > +++ b/drivers/gpu/drm/armada/armada_drv.c
>> > @@ -254,7 +254,7 @@ static void armada_add_endpoints(struct device *dev,
>> > continue;
>> > }
>> >
>> > - component_match_add(dev, match, compare_of, remote);
>> > + drm_of_component_match_add(dev, match, compare_of, remote);
>> > of_node_put(remote);
>> > }
>> > }
>> > diff --git a/drivers/gpu/drm/drm_of.c b/drivers/gpu/drm/drm_of.c
>> > index bc98bb94264d..47848ed8ca48 100644
>> > --- a/drivers/gpu/drm/drm_of.c
>> > +++ b/drivers/gpu/drm/drm_of.c
>> > @@ -6,6 +6,11 @@
>> > #include <drm/drm_crtc.h>
>> > #include <drm/drm_of.h>
>> >
>> > +static void drm_release_of(struct device *dev, void *data)
>> > +{
>> > + of_node_put(data);
>> > +}
>> > +
>> > /**
>> > * drm_crtc_port_mask - find the mask of a registered CRTC by port OF node
>> > * @dev: DRM device
>> > @@ -64,6 +69,24 @@ uint32_t drm_of_find_possible_crtcs(struct drm_device *dev,
>> > EXPORT_SYMBOL(drm_of_find_possible_crtcs);
>> >
>> > /**
>> > + * drm_of_component_match_add - Add a component helper OF node match rule
>> > + * @master: master device
>> > + * @matchptr: component match pointer
>> > + * @compare: compare function used for matching component
>> > + * @node: of_node
>> > + */
>> > +void drm_of_component_match_add(struct device *master,
>> > + struct component_match **matchptr,
>> > + int (*compare)(struct device *, void *),
>> > + struct device_node *node)
>> > +{
>> > + of_node_get(node);
>> > + component_match_add_release(master, matchptr, drm_release_of,
>> > + compare, node);
>> > +}
>> > +EXPORT_SYMBOL_GPL(drm_of_component_match_add);
>> > +
>> > +/**
>> > * drm_of_component_probe - Generic probe function for a component based master
>> > * @dev: master device containing the OF node
>> > * @compare_of: compare function used for matching components
>> > @@ -101,7 +124,7 @@ int drm_of_component_probe(struct device *dev,
>> > continue;
>> > }
>> >
>> > - component_match_add(dev, &match, compare_of, port);
>> > + drm_of_component_match_add(dev, &match, compare_of, port);
>> > of_node_put(port);
>> > }
>> >
>> > @@ -140,7 +163,8 @@ int drm_of_component_probe(struct device *dev,
>> > continue;
>> > }
>> >
>> > - component_match_add(dev, &match, compare_of, remote);
>> > + drm_of_component_match_add(dev, &match, compare_of,
>> > + remote);
>> > of_node_put(remote);
>> > }
>> > of_node_put(port);
>> > diff --git a/drivers/gpu/drm/etnaviv/etnaviv_drv.c b/drivers/gpu/drm/etnaviv/etnaviv_drv.c
>> > index aa687669e22b..0dee6acbd880 100644
>> > --- a/drivers/gpu/drm/etnaviv/etnaviv_drv.c
>> > +++ b/drivers/gpu/drm/etnaviv/etnaviv_drv.c
>> > @@ -16,6 +16,7 @@
>> >
>> > #include <linux/component.h>
>> > #include <linux/of_platform.h>
>> > +#include <drm/drm_of.h>
>> >
>> > #include "etnaviv_drv.h"
>> > #include "etnaviv_gpu.h"
>> > @@ -629,8 +630,8 @@ static int etnaviv_pdev_probe(struct platform_device *pdev)
>> > if (!core_node)
>> > break;
>> >
>> > - component_match_add(&pdev->dev, &match, compare_of,
>> > - core_node);
>> > + drm_of_component_match_add(&pdev->dev, &match,
>> > + compare_of, core_node);
>> > of_node_put(core_node);
>> > }
>> > } else if (dev->platform_data) {
>> > diff --git a/drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c b/drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c
>> > index 90377a609c98..e88fde18c946 100644
>> > --- a/drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c
>> > +++ b/drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c
>> > @@ -24,6 +24,7 @@
>> > #include <drm/drm_fb_cma_helper.h>
>> > #include <drm/drm_atomic_helper.h>
>> > #include <drm/drm_crtc_helper.h>
>> > +#include <drm/drm_of.h>
>> >
>> > #include "kirin_drm_drv.h"
>> >
>> > @@ -260,14 +261,13 @@ static struct device_node *kirin_get_remote_node(struct device_node *np)
>> > DRM_ERROR("no valid endpoint node\n");
>> > return ERR_PTR(-ENODEV);
>> > }
>> > - of_node_put(endpoint);
>> >
>> > remote = of_graph_get_remote_port_parent(endpoint);
>> > + of_node_put(endpoint);
>>
>> Another bug that's being fixed without mention in the commit.
>>
>> > if (!remote) {
>> > DRM_ERROR("no valid remote node\n");
>> > return ERR_PTR(-ENODEV);
>> > }
>> > - of_node_put(remote);
>> >
>> > if (!of_device_is_available(remote)) {
>> > DRM_ERROR("not available for remote node\n");
>> > @@ -294,7 +294,8 @@ static int kirin_drm_platform_probe(struct platform_device *pdev)
>> > if (IS_ERR(remote))
>> > return PTR_ERR(remote);
>> >
>> > - component_match_add(dev, &match, compare_of, remote);
>> > + drm_of_component_match_add(dev, &match, compare_of, remote);
>> > + of_node_put(remote);
>> >
>> > return component_master_add_with_match(dev, &kirin_drm_ops, match);
>> >
>> > diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
>> > index cf83f6507ec8..9c5430fb82a2 100644
>> > --- a/drivers/gpu/drm/mediatek/mtk_drm_drv.c
>> > +++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
>> > @@ -18,6 +18,7 @@
>> > #include <drm/drm_crtc_helper.h>
>> > #include <drm/drm_gem.h>
>> > #include <drm/drm_gem_cma_helper.h>
>> > +#include <drm/drm_of.h>
>> > #include <linux/component.h>
>> > #include <linux/iommu.h>
>> > #include <linux/of_address.h>
>> > @@ -415,7 +416,8 @@ static int mtk_drm_probe(struct platform_device *pdev)
>> > comp_type == MTK_DPI) {
>> > dev_info(dev, "Adding component match for %s\n",
>> > node->full_name);
>> > - component_match_add(dev, &match, compare_of, node);
>> > + drm_of_component_match_add(dev, &match, compare_of,
>> > + node);
>> > } else {
>> > struct mtk_ddp_comp *comp;
>> >
>> > diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c
>> > index fb5c0b0a7594..84d38eaea585 100644
>> > --- a/drivers/gpu/drm/msm/msm_drv.c
>> > +++ b/drivers/gpu/drm/msm/msm_drv.c
>> > @@ -15,6 +15,8 @@
>> > * this program. If not, see <http://www.gnu.org/licenses/>.
>> > */
>> >
>> > +#include <drm/drm_of.h>
>> > +
>> > #include "msm_drv.h"
>> > #include "msm_debugfs.h"
>> > #include "msm_fence.h"
>> > @@ -919,8 +921,8 @@ static int add_components_mdp(struct device *mdp_dev,
>> > continue;
>> > }
>> >
>> > - component_match_add(master_dev, matchptr, compare_of, intf);
>> > -
>> > + drm_of_component_match_add(master_dev, matchptr, compare_of,
>> > + intf);
>> > of_node_put(intf);
>> > of_node_put(ep_node);
>> > }
>> > @@ -962,8 +964,8 @@ static int add_display_components(struct device *dev,
>> > put_device(mdp_dev);
>> >
>> > /* add the MDP component itself */
>> > - component_match_add(dev, matchptr, compare_of,
>> > - mdp_dev->of_node);
>> > + drm_of_component_match_add(dev, matchptr, compare_of,
>> > + mdp_dev->of_node);
>> > } else {
>> > /* MDP4 */
>> > mdp_dev = dev;
>> > @@ -996,7 +998,7 @@ static int add_gpu_components(struct device *dev,
>> > if (!np)
>> > return 0;
>> >
>> > - component_match_add(dev, matchptr, compare_of, np);
>> > + drm_of_component_match_add(dev, matchptr, compare_of, np);
>> >
>> > of_node_put(np);
>> >
>> > diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_drv.c b/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
>> > index 8c8cbe837e61..6fe161192bb4 100644
>> > --- a/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
>> > +++ b/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
>> > @@ -20,6 +20,7 @@
>> > #include <drm/drm_crtc_helper.h>
>> > #include <drm/drm_fb_helper.h>
>> > #include <drm/drm_gem_cma_helper.h>
>> > +#include <drm/drm_of.h>
>> > #include <linux/dma-mapping.h>
>> > #include <linux/pm_runtime.h>
>> > #include <linux/module.h>
>> > @@ -388,7 +389,7 @@ static void rockchip_add_endpoints(struct device *dev,
>> > continue;
>> > }
>> >
>> > - component_match_add(dev, match, compare_of, remote);
>> > + drm_of_component_match_add(dev, match, compare_of, remote);
>> > of_node_put(remote);
>> > }
>> > }
>> > @@ -437,7 +438,8 @@ static int rockchip_drm_platform_probe(struct platform_device *pdev)
>> > }
>> >
>> > of_node_put(iommu);
>> > - component_match_add(dev, &match, compare_of, port->parent);
>> > + drm_of_component_match_add(dev, &match, compare_of,
>> > + port->parent);
>> > of_node_put(port);
>> > }
>> >
>> > diff --git a/drivers/gpu/drm/sti/sti_drv.c b/drivers/gpu/drm/sti/sti_drv.c
>> > index 2784919a7366..5e819876e642 100644
>> > --- a/drivers/gpu/drm/sti/sti_drv.c
>> > +++ b/drivers/gpu/drm/sti/sti_drv.c
>> > @@ -17,6 +17,7 @@
>> > #include <drm/drm_crtc_helper.h>
>> > #include <drm/drm_gem_cma_helper.h>
>> > #include <drm/drm_fb_cma_helper.h>
>> > +#include <drm/drm_of.h>
>> >
>> > #include "sti_crtc.h"
>> > #include "sti_drv.h"
>> > @@ -423,8 +424,8 @@ static int sti_platform_probe(struct platform_device *pdev)
>> > child_np = of_get_next_available_child(node, NULL);
>> >
>> > while (child_np) {
>> > - component_match_add(dev, &match, compare_of, child_np);
>> > - of_node_put(child_np);
>> > + drm_of_component_match_add(dev, &match, compare_of,
>> > + child_np);
>> > child_np = of_get_next_available_child(node, child_np);
>> > }
>> >
>> > diff --git a/drivers/gpu/drm/sun4i/sun4i_drv.c b/drivers/gpu/drm/sun4i/sun4i_drv.c
>> > index 0da9862ad8ed..b3c4ad605e81 100644
>> > --- a/drivers/gpu/drm/sun4i/sun4i_drv.c
>> > +++ b/drivers/gpu/drm/sun4i/sun4i_drv.c
>> > @@ -18,6 +18,7 @@
>> > #include <drm/drm_fb_cma_helper.h>
>> > #include <drm/drm_gem_cma_helper.h>
>> > #include <drm/drm_fb_helper.h>
>> > +#include <drm/drm_of.h>
>> >
>> > #include "sun4i_crtc.h"
>> > #include "sun4i_drv.h"
>> > @@ -239,7 +240,7 @@ static int sun4i_drv_add_endpoints(struct device *dev,
>> > /* Add current component */
>> > DRM_DEBUG_DRIVER("Adding component %s\n",
>> > of_node_full_name(node));
>> > - component_match_add(dev, match, compare_of, node);
>> > + drm_of_component_match_add(dev, match, compare_of, node);
>> > count++;
>> > }
>> >
>> > diff --git a/drivers/gpu/drm/tilcdc/tilcdc_external.c b/drivers/gpu/drm/tilcdc/tilcdc_external.c
>> > index 68e895021005..06a4c584f3cb 100644
>> > --- a/drivers/gpu/drm/tilcdc/tilcdc_external.c
>> > +++ b/drivers/gpu/drm/tilcdc/tilcdc_external.c
>> > @@ -10,6 +10,7 @@
>> >
>> > #include <linux/component.h>
>> > #include <linux/of_graph.h>
>> > +#include <drm/drm_of.h>
>> >
>> > #include "tilcdc_drv.h"
>> > #include "tilcdc_external.h"
>> > @@ -160,7 +161,8 @@ int tilcdc_get_external_components(struct device *dev,
>> >
>> > dev_dbg(dev, "Subdevice node '%s' found\n", node->name);
>> > if (match)
>> > - component_match_add(dev, match, dev_match_of, node);
>> > + drm_of_component_match_add(dev, match, dev_match_of,
>> > + node);
>> > of_node_put(node);
>> > count++;
>> > }
>> > diff --git a/include/drm/drm_of.h b/include/drm/drm_of.h
>> > index 3fd87b386ed7..d6b4c5587bbe 100644
>> > --- a/include/drm/drm_of.h
>> > +++ b/include/drm/drm_of.h
>> > @@ -4,6 +4,7 @@
>> > #include <linux/of_graph.h>
>> >
>> > struct component_master_ops;
>> > +struct component_match;
>> > struct device;
>> > struct drm_device;
>> > struct drm_encoder;
>> > @@ -12,6 +13,10 @@ struct device_node;
>> > #ifdef CONFIG_OF
>> > extern uint32_t drm_of_find_possible_crtcs(struct drm_device *dev,
>> > struct device_node *port);
>> > +extern void drm_of_component_match_add(struct device *master,
>> > + struct component_match **matchptr,
>> > + int (*compare)(struct device *, void *),
>> > + struct device_node *node);
>> > extern int drm_of_component_probe(struct device *dev,
>> > int (*compare_of)(struct device *, void *),
>> > const struct component_master_ops *m_ops);
>> > @@ -25,6 +30,13 @@ static inline uint32_t drm_of_find_possible_crtcs(struct drm_device *dev,
>> > return 0;
>> > }
>> >
>> > +static void drm_of_component_match_add(struct device *master,
>> > + struct component_match **matchptr,
>> > + int (*compare)(struct device *, void *),
>> > + struct device_node *node)
>> > +{
>> > +}
>> > +
>> > static inline int
>> > drm_of_component_probe(struct device *dev,
>> > int (*compare_of)(struct device *, void *),
>> > --
>> > 2.1.0
>> >
>> >
>> > _______________________________________________
>> > linux-arm-kernel mailing list
>> > linux-arm-kernel at lists.infradead.org
>> > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>
> --
> RMK's Patch system: http://www.armlinux.org.uk/developer/patches/
> FTTC broadband for 0.8mile line: currently at 9.6Mbps down 400kbps up
> according to speedtest.net.
^ permalink raw reply
* [PATCH v2 4/4] arm64: dts: msm8996: Add SMP2P and APCS nodes
From: Sarangdhar Joshi @ 2016-10-20 23:12 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1477005139-15564-1-git-send-email-spjoshi@codeaurora.org>
Add SMP2P and APCS DT nodes required for Qualcomm ADSP
Peripheral Image Loader.
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Sarangdhar Joshi <spjoshi@codeaurora.org>
---
arch/arm64/boot/dts/qcom/msm8996.dtsi | 29 +++++++++++++++++++++++++++++
1 file changed, 29 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi
index abc1089..26c4827 100644
--- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
@@ -175,6 +175,30 @@
method = "smc";
};
+ adsp-smp2p {
+ compatible = "qcom,smp2p";
+ qcom,smem = <443>, <429>;
+
+ interrupts = <0 158 IRQ_TYPE_EDGE_RISING>;
+
+ qcom,ipc = <&apcs 16 10>;
+
+ qcom,local-pid = <0>;
+ qcom,remote-pid = <2>;
+
+ adsp_smp2p_out: master-kernel {
+ qcom,entry-name = "master-kernel";
+ #qcom,state-cells = <1>;
+ };
+
+ adsp_smp2p_in: slave-kernel {
+ qcom,entry-name = "slave-kernel";
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+ };
+
smem {
compatible = "qcom,smem";
@@ -205,6 +229,11 @@
interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
};
+ apcs: syscon at 9820000 {
+ compatible = "syscon";
+ reg = <0x9820000 0x1000>;
+ };
+
gcc: clock-controller at 300000 {
compatible = "qcom,gcc-msm8996";
#clock-cells = <1>;
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply related
* [PATCH v2 3/4] arm64: dts: msm8996: Add SMEM DT nodes
From: Sarangdhar Joshi @ 2016-10-20 23:12 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1477005139-15564-1-git-send-email-spjoshi@codeaurora.org>
From: Bjorn Andersson <bjorn.andersson@linaro.org>
Add SMEM and TCSR DT nodes on MSM8996.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Sarangdhar Joshi <spjoshi@codeaurora.org>
---
arch/arm64/boot/dts/qcom/msm8996.dtsi | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi
index 949b096..abc1089 100644
--- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
@@ -164,17 +164,36 @@
};
+ tcsr_mutex: hwlock {
+ compatible = "qcom,tcsr-mutex";
+ syscon = <&tcsr_mutex_regs 0 0x1000>;
+ #hwlock-cells = <1>;
+ };
+
psci {
compatible = "arm,psci-1.0";
method = "smc";
};
+ smem {
+ compatible = "qcom,smem";
+
+ memory-region = <&smem_mem>;
+
+ hwlocks = <&tcsr_mutex 3>;
+ };
+
soc: soc {
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0 0 0xffffffff>;
compatible = "simple-bus";
+ tcsr_mutex_regs: syscon at 740000 {
+ compatible = "syscon";
+ reg = <0x740000 0x20000>;
+ };
+
intc: interrupt-controller at 9bc0000 {
compatible = "arm,gic-v3";
#interrupt-cells = <3>;
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply related
* [PATCH v2 2/4] arm64: dts: msm8996: Add reserve-memory nodes
From: Sarangdhar Joshi @ 2016-10-20 23:12 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1477005139-15564-1-git-send-email-spjoshi@codeaurora.org>
Add reserve-memory nodes required for Qualcomm
Peripheral Image Loaders
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Sarangdhar Joshi <spjoshi@codeaurora.org>
---
arch/arm64/boot/dts/qcom/msm8996.dtsi | 25 +++++++++++++++++++++++++
1 file changed, 25 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi
index 36216ae..949b096 100644
--- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
@@ -36,6 +36,31 @@
#size-cells = <2>;
ranges;
+ mba_region: mba at 91500000 {
+ reg = <0x0 0x91500000 0x0 0x200000>;
+ no-map;
+ };
+
+ slpi_region: slpi at 90b00000 {
+ reg = <0x0 0x90b00000 0xa00000>;
+ no-map;
+ };
+
+ venus_region: venus at 90400000 {
+ reg = <0x0 0x90400000 0x0 0x700000>;
+ no-map;
+ };
+
+ adsp_region: adsp at 8ea00000 {
+ reg = <0x0 0x8ea00000 0x0 0x1a00000>;
+ no-map;
+ };
+
+ mpss_region: mpss at 88800000 {
+ reg = <0x0 0x88800000 0x0 0x6200000>;
+ no-map;
+ };
+
smem_mem: smem-mem at 86000000 {
reg = <0x0 0x86000000 0x0 0x200000>;
no-map;
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply related
* [PATCH v2 1/4] arm64: dts: msm8996: Add SMEM reserve-memory node
From: Sarangdhar Joshi @ 2016-10-20 23:12 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1477005139-15564-1-git-send-email-spjoshi@codeaurora.org>
Add DT node to carveout memory for shared memory region.
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Sarangdhar Joshi <spjoshi@codeaurora.org>
---
arch/arm64/boot/dts/qcom/msm8996.dtsi | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi
index d6da223..36216ae 100644
--- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
@@ -31,6 +31,17 @@
reg = <0 0 0 0>;
};
+ reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ smem_mem: smem-mem at 86000000 {
+ reg = <0x0 0x86000000 0x0 0x200000>;
+ no-map;
+ };
+ };
+
cpus {
#address-cells = <2>;
#size-cells = <0>;
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply related
* [PATCH v2 0/4] MSM8996 DT Support for ADSP PIL
From: Sarangdhar Joshi @ 2016-10-20 23:12 UTC (permalink / raw)
To: linux-arm-kernel
Add various device tree nodes to lay the groundwork for
Qualcomm ADSP Peripheral Image Loader.
Sorry, I didn't send any cover letter for v1.
Changes since v1:
- Move hwlock DT node under root (/) (Bjorn and Andy)
- Rename smp2p-adsp to adsp-smp2p (Bjorn)
- Remove interrupt-parent property from node (Bjorn)
Bjorn Andersson (1):
arm64: dts: msm8996: Add SMEM DT nodes
Sarangdhar Joshi (3):
arm64: dts: msm8996: Add SMEM reserve-memory node
arm64: dts: msm8996: Add reserve-memory nodes
arm64: dts: msm8996: Add SMP2P and APCS nodes
arch/arm64/boot/dts/qcom/msm8996.dtsi | 84 +++++++++++++++++++++++++++++++++++
1 file changed, 84 insertions(+)
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply
* [PATCH v3 0/8] PM / Domains: DT support for domain idle states & atomic PM domains
From: Rafael J. Wysocki @ 2016-10-20 22:48 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161020224432.GB72940@linaro.org>
On Fri, Oct 21, 2016 at 12:44 AM, Lina Iyer <lina.iyer@linaro.org> wrote:
> On Mon, Oct 17 2016 at 01:30 -0600, Ulf Hansson wrote:
>>
>> On 14 October 2016 at 19:47, Lina Iyer <lina.iyer@linaro.org> wrote:
>>>
>>> Hi all,
>>>
>>> Changes since v2 [3] -
>>> - Addressed review comments from v2.
>>> - domain-idle-states documentation updated
>>> - fixed compiler issues with imx driver
>>> - minor code change in pm_domains.c
>>> - The series is available at [4].
>>>
>>> Changes since v1 [2] -
>>> - Addressed review comments from v1.
>>> - Fixes around dynamic allocation of genpd states
>>> - Used OF method for iterating phandles
>>> - Updated documentation, examples
>>> - Rename state variable (provider -> fwnode)
>>> - The series is available at [3].
>>>
>>> The changes from [1] are -
>>> - Allocating memory for domain idle states dynamically
>>> - Conform to naming conventions for internal and exported genpd functions
>>> - DT binding example for domain-idle-state
>>> - Use fwnode instead of of_node
>>> - Handle atomic case for removal of PM Domain
>>> - Rebase on top of Rafael's pm/genpd tree
>>>
>>> Thanks,
>>> Lina
>>>
>>> Lina Iyer (8):
>>> PM / Domains: Make genpd state allocation dynamic
>>> PM / Domain: Add residency property to genpd states
>>> PM / Domains: Allow domain power states to be read from DT
>>> PM / Domains: Save the fwnode in genpd_power_state
>>> dt/bindings: Update binding for PM domain idle states
>>> PM / Domains: Abstract genpd locking
>>> PM / Domains: Support IRQ safe PM domains
>>> PM / doc: Update device documentation for devices in IRQ safe PM
>>> domains
>>>
>>> .../devicetree/bindings/power/power_domain.txt | 43 +++
>>> Documentation/power/devices.txt | 9 +-
>>> arch/arm/mach-imx/gpc.c | 17 +-
>>> drivers/base/power/domain.c | 358
>>> +++++++++++++++++----
>>> include/linux/pm_domain.h | 28 +-
>>> 5 files changed, 383 insertions(+), 72 deletions(-)
>>>
>>
>> Rafael, Lina,
>>
>> This looks good to me! Unless any other objections, I suggest to apply
>> this to get it tested in linux-next.
>>
>> Kind regards
>> Uffe
>>
> Rafael,
>
> If there are no objections, could you pick this patch for linux-next?
It is in my queue, but not at the top yet.
Thanks,
Rafael
^ permalink raw reply
* [PATCH v3 3/6] pwm: imx: support output polarity inversion
From: Stefan Agner @ 2016-10-20 22:46 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161020103018.44fb94ea@jawa>
On 2016-10-20 01:30, Lukasz Majewski wrote:
> Hi Stefan,
>
>> Hi Stefan,
>>
>> > On 2016-10-12 15:15, Lukasz Majewski wrote:
>> > > Hi Stefan,
>> > >
>> > >> On 2016-10-07 08:11, Bhuvanchandra DV wrote:
>> > >> > From: Lothar Wassmann <LW@KARO-electronics.de>
>> > >> >
>> > >> > The i.MX pwm unit on i.MX27 and newer SoCs provides a
>> > >> > configurable output polarity. This patch adds support to
>> > >> > utilize this feature where available.
>> > >> >
>> > >> > Signed-off-by: Lothar Wa?mann <LW@KARO-electronics.de>
>> > >> > Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
>> > >> > Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com>
>> > >> > Acked-by: Shawn Guo <shawn.guo@linaro.org>
>> > >> > Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de>
>> > >> > ---
>> > >> > Documentation/devicetree/bindings/pwm/imx-pwm.txt | 6 +--
>> > >> > drivers/pwm/pwm-imx.c | 51
>> > >> > +++++++++++++++++++++-- 2 files changed, 51 insertions(+), 6
>> > >> > deletions(-)
>> > >> >
>> > >> > diff --git a/Documentation/devicetree/bindings/pwm/imx-pwm.txt
>> > >> > b/Documentation/devicetree/bindings/pwm/imx-pwm.txt
>> > >> > index e00c2e9..c61bdf8 100644
>> > >> > --- a/Documentation/devicetree/bindings/pwm/imx-pwm.txt
>> > >> > +++ b/Documentation/devicetree/bindings/pwm/imx-pwm.txt
>> > >> > @@ -6,8 +6,8 @@ Required properties:
>> > >> > - "fsl,imx1-pwm" for PWM compatible with the one integrated
>> > >> > on i.MX1
>> > >> > - "fsl,imx27-pwm" for PWM compatible with the one integrated
>> > >> > on i.MX27
>> > >> > - reg: physical base address and length of the controller's
>> > >> > registers -- #pwm-cells: should be 2. See pwm.txt in this
>> > >> > directory for a description of
>> > >> > - the cells format.
>> > >> > +- #pwm-cells: 2 for i.MX1 and 3 for i.MX27 and newer SoCs. See
>> > >> > pwm.txt
>> > >> > + in this directory for a description of the cells format.
>> > >> > - clocks : Clock specifiers for both ipg and per clocks.
>> > >> > - clock-names : Clock names should include both "ipg" and
>> > >> > "per" See the clock consumer binding,
>> > >> > @@ -17,7 +17,7 @@ See the clock consumer binding,
>> > >> > Example:
>> > >> >
>> > >> > pwm1: pwm at 53fb4000 {
>> > >> > - #pwm-cells = <2>;
>> > >> > + #pwm-cells = <3>;
>> > >> > compatible = "fsl,imx53-pwm", "fsl,imx27-pwm";
>> > >> > reg = <0x53fb4000 0x4000>;
>> > >> > clocks = <&clks IMX5_CLK_PWM1_IPG_GATE>,
>> > >> > diff --git a/drivers/pwm/pwm-imx.c b/drivers/pwm/pwm-imx.c
>> > >> > index d600fd5..c37d223 100644
>> > >> > --- a/drivers/pwm/pwm-imx.c
>> > >> > +++ b/drivers/pwm/pwm-imx.c
>> > >> > @@ -38,6 +38,7 @@
>> > >> > #define MX3_PWMCR_DOZEEN (1 << 24)
>> > >> > #define MX3_PWMCR_WAITEN (1 << 23)
>> > >> > #define MX3_PWMCR_DBGEN (1 << 22)
>> > >> > +#define MX3_PWMCR_POUTC (1 << 18)
>> > >> > #define MX3_PWMCR_CLKSRC_IPG_HIGH (2 << 16)
>> > >> > #define MX3_PWMCR_CLKSRC_IPG (1 << 16)
>> > >> > #define MX3_PWMCR_SWR (1 << 3)
>> > >> > @@ -180,6 +181,9 @@ static int imx_pwm_config_v2(struct
>> > >> > pwm_chip *chip, if (enable)
>> > >> > cr |= MX3_PWMCR_EN;
>> > >> >
>> > >> > + if (pwm->args.polarity == PWM_POLARITY_INVERSED)
>> > >> > + cr |= MX3_PWMCR_POUTC;
>> > >> > +
>> > >>
>> > >> This seems wrong to me, the config callback is meant for
>> > >> period/duty cycle only.
>
> Unfortunately, it also resets the PWM IP block and setups it again (by
> writing to PWMCR register). In that function we setup for example
> MX3_PWMCR_DOZEEN
> and MX3_PWMCR_DBGEN. Why cannot we setup polarity as well?
>
>
> I've double checked the backlight and pwm code flow.
>
> Please find following snippet:
>
> [ 0.135545] ######### imx_pwm_probe
> [ 0.135581] PWM supports output inversion
> [ 0.136864] ######### pwm_backlight_probe
> [ 0.136913] backlight supply power not found, using dummy regulator
> [ 0.136984] ######### imx_pwm_set_polarity 1
> [ 0.136995] imx_pwm_set_polarity: polarity set to inverted cr:
> 0x40000 0xf08f8000
> [ 0.137005] #########0 imx_pwm_config_v2 cr: 0x40000
> [ 0.137683] #########1 imx_pwm_config_v2 cr: 0x0 0xf08f8000
> [ 0.137693] #########2 imx_pwm_config_v2 cr: 0x1c20050
> [ 0.137702] #########3 imx_pwm_config_v2 cr: 0x1c20050 0xf08f8000
> [ 0.137711] @@@@@@@@@@ pwm_apply_state
>
> Here the pwm_backlight_probe calls set_polarity callback available in
> pwm - the polarity is set (the 0x40000 value).
>
> The above operation is performed in pwm_apply_state (@ drivers/pwm/core.c).
> In the same function, latter we call the pwm->chip->ops->config(), which is the
> pointer to config_v2.
> Since the PWM is not yet enabled, this function performs SW reset and
> PWM inversion setting is cleared.
That function should not do that. It was probably already problematic in
the old times, it is definitely now with the atomic PWM stuff.
>
> Possible solutions:
>
> 1. Leave the original patch from Bhuvanchandra as it was (I'm for this
> option)
That really seems like a hack to me, and makes transition to the atomic
PWM API more complex.
If we can't make it happen properly in the current state of affairs, we
probably should first move to the atomic API.
It really should not be that hard, since we already do almost everything
in one function (imx_pwm_config_v2). We probably can almost just assign
that function to the new apply function pointer and read information
from the new state struct.
There are examples for instance here:
https://patchwork.kernel.org/patch/7228221/
--
Stefan
>
> 2. Enable early PWM (in core, or in bl driver) so the config_v2 is not
> calling SW reset on the PWM. (but this solutions seems _really_ bad to me)
>
> 3. Perform defer probe of pwm backlight driver (pwm_bl.c) until the pwm
> is fully configured (it might be a bit tricky).
>
>
> Best regards,
> ?ukasz Majewski
>
>> > >
>> > > If it is meant only for that, then the polarity should be removed
>> > > from it.
>> > >
>> > > However after very quick testing, at least on my setup, it turns
>> > > out that removing this lines causes polarity to _not_ being set
>> > > (and the polarity is not inverted).
>> > >
>> > > I will investigate this further on my setup and hopefully sent
>> > > proper patch.
>> > >
>> > >> The set_polarity callback should get called in case a
>> > >> different polarity is requested.
>> > >
>> > > On my setup the pwm2 is set from DT and pwm_backlight_probe()
>> > > calls pwm_apply_args(), so everything should work. However, as I
>> > > mentioned above there still is some problem with inversion
>> > > setting.
>> > >
>> > >>
>> > >>
>> > >> > writel(cr, imx->mmio_base + MX3_PWMCR);
>> > >> >
>> > >> > return 0;
>> > >> > @@ -240,27 +244,62 @@ static void imx_pwm_disable(struct
>> > >> > pwm_chip *chip, struct pwm_device *pwm)
>> > >> > clk_disable_unprepare(imx->clk_per);
>> > >> > }
>> > >> >
>> > >> > -static struct pwm_ops imx_pwm_ops = {
>> > >> > +static int imx_pwm_set_polarity(struct pwm_chip *chip, struct
>> > >> > pwm_device *pwm,
>> > >> > + enum pwm_polarity polarity)
>> > >> > +{
>> > >> > + struct imx_chip *imx = to_imx_chip(chip);
>> > >> > + u32 val;
>> > >> > +
>> > >> > + if (polarity == pwm->args.polarity)
>> > >> > + return 0;
>> > >>
>> > >> I don't think that this is right. Today, pwm_apply_args (in
>> > >> include/linux/pwm.h) copies the polarity from args to
>> > >> state.polarity, which is then passed as polarity argument to this
>> > >> function. So this will always return 0 afaict.
>> > >
>> > > Yes, I've overlooked it (that the state is copied).
>> > >
>> > > It can be dropped.
>> >
>> > Did you do the above test with that line dropped?
>>
>> Yes. The above code has been also removed.
>>
>> Best regards,
>> ?ukasz Majewski
>>
>> >
>> > >
>> > >>
>> > >> I would just drop that.
>> > >>
>> > >> There is probably one little problem in the current state of
>> > >> affairs: If the bootloader makes use of a PWM channel with
>> > >> inverted state, then the kernel would not know about that and
>> > >> currently assume a wrong initial state... I guess at one point in
>> > >> time we should implement the state retrieval callback and move to
>> > >> the new atomic PWM API, which would mean to implement apply
>> > >> callback.
>> > >
>> > > Are there any patches on the horizon?
>> > >
>> >
>> > Not that I know of...
>> >
>> > --
>> > Stefan
>> >
>> > >>
>> > >> --
>> > >> Stefan
>> > >>
>> > >>
>> > >> > +
>> > >> > + val = readl(imx->mmio_base + MX3_PWMCR);
>> > >> > +
>> > >> > + if (polarity == PWM_POLARITY_INVERSED)
>> > >> > + val |= MX3_PWMCR_POUTC;
>> > >> > + else
>> > >> > + val &= ~MX3_PWMCR_POUTC;
>> > >> > +
>> > >> > + writel(val, imx->mmio_base + MX3_PWMCR);
>> > >> > +
>> > >> > + dev_dbg(imx->chip.dev, "%s: polarity set to %s\n",
>> > >> > __func__,
>> > >> > + polarity == PWM_POLARITY_INVERSED ?
>> > >> > "inverted" : "normal"); +
>> > >> > + return 0;
>> > >> > +}
>> > >> > +
>> > >> > +static struct pwm_ops imx_pwm_ops_v1 = {
>> > >> > .enable = imx_pwm_enable,
>> > >> > .disable = imx_pwm_disable,
>> > >> > .config = imx_pwm_config,
>> > >> > .owner = THIS_MODULE,
>> > >> > };
>> > >> >
>> > >> > +static struct pwm_ops imx_pwm_ops_v2 = {
>> > >> > + .enable = imx_pwm_enable,
>> > >> > + .disable = imx_pwm_disable,
>> > >> > + .set_polarity = imx_pwm_set_polarity,
>> > >> > + .config = imx_pwm_config,
>> > >> > + .owner = THIS_MODULE,
>> > >> > +};
>> > >> > +
>> > >> > struct imx_pwm_data {
>> > >> > int (*config)(struct pwm_chip *chip,
>> > >> > struct pwm_device *pwm, int duty_ns, int
>> > >> > period_ns); void (*set_enable)(struct pwm_chip *chip, bool
>> > >> > enable);
>> > >> > + struct pwm_ops *pwm_ops;
>> > >> > };
>> > >> >
>> > >> > static struct imx_pwm_data imx_pwm_data_v1 = {
>> > >> > .config = imx_pwm_config_v1,
>> > >> > .set_enable = imx_pwm_set_enable_v1,
>> > >> > + .pwm_ops = &imx_pwm_ops_v1,
>> > >> > };
>> > >> >
>> > >> > static struct imx_pwm_data imx_pwm_data_v2 = {
>> > >> > .config = imx_pwm_config_v2,
>> > >> > .set_enable = imx_pwm_set_enable_v2,
>> > >> > + .pwm_ops = &imx_pwm_ops_v2,
>> > >> > };
>> > >> >
>> > >> > static const struct of_device_id imx_pwm_dt_ids[] = {
>> > >> > @@ -282,6 +321,8 @@ static int imx_pwm_probe(struct
>> > >> > platform_device *pdev) if (!of_id)
>> > >> > return -ENODEV;
>> > >> >
>> > >> > + data = of_id->data;
>> > >> > +
>> > >> > imx = devm_kzalloc(&pdev->dev, sizeof(*imx),
>> > >> > GFP_KERNEL); if (imx == NULL)
>> > >> > return -ENOMEM;
>> > >> > @@ -300,18 +341,22 @@ static int imx_pwm_probe(struct
>> > >> > platform_device *pdev) return PTR_ERR(imx->clk_ipg);
>> > >> > }
>> > >> >
>> > >> > - imx->chip.ops = &imx_pwm_ops;
>> > >> > + imx->chip.ops = data->pwm_ops;
>> > >> > imx->chip.dev = &pdev->dev;
>> > >> > imx->chip.base = -1;
>> > >> > imx->chip.npwm = 1;
>> > >> > imx->chip.can_sleep = true;
>> > >> > + if (data->pwm_ops->set_polarity) {
>> > >> > + dev_dbg(&pdev->dev, "PWM supports output
>> > >> > inversion\n");
>> > >> > + imx->chip.of_xlate = of_pwm_xlate_with_flags;
>> > >> > + imx->chip.of_pwm_n_cells = 3;
>> > >> > + }
>> > >> >
>> > >> > r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
>> > >> > imx->mmio_base = devm_ioremap_resource(&pdev->dev, r);
>> > >> > if (IS_ERR(imx->mmio_base))
>> > >> > return PTR_ERR(imx->mmio_base);
>> > >> >
>> > >> > - data = of_id->data;
>> > >> > imx->config = data->config;
>> > >> > imx->set_enable = data->set_enable;
>> > >>
>> > >
>> > > Best regards,
>> > >
>> > > ?ukasz Majewski
>>
^ permalink raw reply
* [PATCH v3 0/8] PM / Domains: DT support for domain idle states & atomic PM domains
From: Lina Iyer @ 2016-10-20 22:44 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAPDyKFpQwOkXUk8wT6sZ-Ad4XpTnyodK5m24fYJ3P+1QtS0XOA@mail.gmail.com>
On Mon, Oct 17 2016 at 01:30 -0600, Ulf Hansson wrote:
>On 14 October 2016 at 19:47, Lina Iyer <lina.iyer@linaro.org> wrote:
>> Hi all,
>>
>> Changes since v2 [3] -
>> - Addressed review comments from v2.
>> - domain-idle-states documentation updated
>> - fixed compiler issues with imx driver
>> - minor code change in pm_domains.c
>> - The series is available at [4].
>>
>> Changes since v1 [2] -
>> - Addressed review comments from v1.
>> - Fixes around dynamic allocation of genpd states
>> - Used OF method for iterating phandles
>> - Updated documentation, examples
>> - Rename state variable (provider -> fwnode)
>> - The series is available at [3].
>>
>> The changes from [1] are -
>> - Allocating memory for domain idle states dynamically
>> - Conform to naming conventions for internal and exported genpd functions
>> - DT binding example for domain-idle-state
>> - Use fwnode instead of of_node
>> - Handle atomic case for removal of PM Domain
>> - Rebase on top of Rafael's pm/genpd tree
>>
>> Thanks,
>> Lina
>>
>> Lina Iyer (8):
>> PM / Domains: Make genpd state allocation dynamic
>> PM / Domain: Add residency property to genpd states
>> PM / Domains: Allow domain power states to be read from DT
>> PM / Domains: Save the fwnode in genpd_power_state
>> dt/bindings: Update binding for PM domain idle states
>> PM / Domains: Abstract genpd locking
>> PM / Domains: Support IRQ safe PM domains
>> PM / doc: Update device documentation for devices in IRQ safe PM
>> domains
>>
>> .../devicetree/bindings/power/power_domain.txt | 43 +++
>> Documentation/power/devices.txt | 9 +-
>> arch/arm/mach-imx/gpc.c | 17 +-
>> drivers/base/power/domain.c | 358 +++++++++++++++++----
>> include/linux/pm_domain.h | 28 +-
>> 5 files changed, 383 insertions(+), 72 deletions(-)
>>
>
>Rafael, Lina,
>
>This looks good to me! Unless any other objections, I suggest to apply
>this to get it tested in linux-next.
>
>Kind regards
>Uffe
>
Rafael,
If there are no objections, could you pick this patch for linux-next?
Thanks,
Lina
>> --
>> 2.7.4
>>
>> [1]. https://www.spinics.net/lists/arm-kernel/msg526814.html
>> [2]. http://www.spinics.net/lists/arm-kernel/msg535106.html
>> [3]. https://git.linaro.org/people/lina.iyer/linux-next.git/shortlog/refs/heads/genpd-v2
>> [4]. https://git.linaro.org/people/lina.iyer/linux-next.git/shortlog/refs/heads/genpd-v3
^ permalink raw reply
* [PATCH] watchdog: meson: Remove unneeded platform MODULE_ALIAS
From: Guenter Roeck @ 2016-10-20 22:28 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1476906582-14241-1-git-send-email-javier@osg.samsung.com>
On Wed, Oct 19, 2016 at 04:49:42PM -0300, Javier Martinez Canillas wrote:
> The Amlogic Meson is a DT-only platform, which means the devices are
> registered via OF and not using the legacy platform devices support.
>
> So there's no need to have a MODULE_ALIAS("platform:meson-gxbb-wdt")
> since the reported uevent MODALIAS to user-space will be the OF one.
>
> Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
^ permalink raw reply
* [PATCH V6 00/10] dmaengine: qcom_hidma: add MSI interrupt support
From: Sinan Kaya @ 2016-10-20 21:59 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <37baf7db-1e14-4027-9397-70649e8fa946@codeaurora.org>
On 10/20/2016 2:55 PM, Sinan Kaya wrote:
> I also looked at the binary contents of the patches in topic/dma with what I posted
> on v6. They match excluding your Signed off lines.
Correction.
I checkout out topic/qcom not topic/dma from
git://git.infradead.org/users/vkoul/slave-dma.git
--
Sinan Kaya
Qualcomm Datacenter Technologies, Inc. as an affiliate of Qualcomm Technologies, Inc.
Qualcomm Technologies, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project.
^ permalink raw reply
* [PATCH 3/4] arm64: dts: msm8996: Add SMEM DT nodes
From: Sarangdhar Joshi @ 2016-10-20 21:59 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161020215137.GF3145@hector.attlocal.net>
On 10/20/2016 02:51 PM, Andy Gross wrote:
> On Thu, Oct 20, 2016 at 02:18:33PM -0700, Sarangdhar Joshi wrote:
>> On 10/20/2016 12:56 PM, Bjorn Andersson wrote:
>>> On Thu 20 Oct 11:56 PDT 2016, Sarangdhar Joshi wrote:
>>>
>>>> From: Bjorn Andersson <bjorn.andersson@linaro.org>
>>>>
>>>> Add SMEM and TCSR DT nodes on MSM8996.
>>>>
>>>> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
>>>> Signed-off-by: Sarangdhar Joshi <spjoshi@codeaurora.org>
>>>> ---
>>>> arch/arm64/boot/dts/qcom/msm8996.dtsi | 19 +++++++++++++++++++
>>>> 1 file changed, 19 insertions(+)
>>>>
>>>> diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi
>>>> index 949b096..0a810f5 100644
>>>> --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
>>>> +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
>>>> @@ -169,12 +169,31 @@
>>>> method = "smc";
>>>> };
>>>>
>>>> + smem {
>>>> + compatible = "qcom,smem";
>>>> +
>>>> + memory-region = <&smem_mem>;
>>>> +
>>>> + hwlocks = <&tcsr_mutex 3>;
>>>> + };
>>>> +
>>>> soc: soc {
>>>> #address-cells = <1>;
>>>> #size-cells = <1>;
>>>> ranges = <0 0 0 0xffffffff>;
>>>> compatible = "simple-bus";
>>>>
>>>> + tcsr_mutex_regs: syscon at 740000 {
>>>> + compatible = "syscon";
>>>> + reg = <0x740000 0x20000>;
>>>> + };
>>>> +
>>>> + tcsr_mutex: hwlock {
>>>> + compatible = "qcom,tcsr-mutex";
>>>> + syscon = <&tcsr_mutex_regs 0 0x1000>;
>>>> + #hwlock-cells = <1>;
>>>> + };
>>>
>>> Sorry, I got this in the wrong place, the hwlock node should sit outside
>>> of soc {} - looks like we got this wrong in msm8916 as well.
>>
>> Thanks for reviewing the patch. Do you mean to move it under / {}; (i.e.
>> root)?
>
> Yes. Any node that doesn't have reg properties should go under the root.
>
Got it. Will update the patch(es) and add cover letter. Thanks.
>
> Andy
>
Regards,
Sarang
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply
* [PATCH V6 00/10] dmaengine: qcom_hidma: add MSI interrupt support
From: Sinan Kaya @ 2016-10-20 21:55 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <a4c95bd6-d760-1f02-bbb1-89538037d41e@codeaurora.org>
Hi Vinod,
On 10/20/2016 10:34 AM, Sinan Kaya wrote:
> On 10/20/2016 9:43 AM, Vinod Koul wrote:
>>> slave-dma git://git.infradead.org/users/vkoul/slave-dma.git (fetch)
>>>> slave-dma git://git.infradead.org/users/vkoul/slave-dma.git (push)
>> You seem to have missed topic/qcom which I pushed last night. next would have worked too!!
>>
>
> OK. Let me pick that up and test.
>
It looks like patches were applied out of order.
This is the post order
-rw-rw-r-- 1 okaya users 8176 Oct 20 17:44 0010-dmaengine-qcom_hidma-add-MSI-support-for-interrupts.patch
-rw-rw-r-- 1 okaya users 1175 Oct 20 17:44 0009-dmaengine-qcom_hidma-break-completion-processing-on-.patch
-rw-rw-r-- 1 okaya users 4773 Oct 20 17:44 0008-dmaengine-qcom_hidma-protect-common-data-structures.patch
-rw-rw-r-- 1 okaya users 2752 Oct 20 17:44 0007-dmaengine-qcom_hidma-add-a-common-API-to-setup-the-i.patch
-rw-rw-r-- 1 okaya users 3225 Oct 20 17:44 0006-dmaengine-qcom_hidma-bring-out-interrupt-cause.patch
-rw-rw-r-- 1 okaya users 4284 Oct 20 17:44 0005-dmaengine-qcom_hidma-make-pending_tre_count-atomic.patch
-rw-rw-r-- 1 okaya users 1090 Oct 20 17:44 0004-dmaengine-qcom_hidma-configure-DMA-and-MSI-for-OF.patch
-rw-rw-r-- 1 okaya users 959 Oct 20 17:44 0003-of-irq-make-of_msi_configure-accessible-from-modules.patch
-rw-rw-r-- 1 okaya users 1558 Oct 20 17:44 0002-Documentation-DT-qcom_hidma-correct-spelling-mistake.patch
-rw-rw-r-- 1 okaya users 1588 Oct 20 17:44 0001-Documentation-DT-qcom_hidma-update-binding-for-MSI.patch
This is the commit order in topic/dma branch. I added <<< for the patches missing below.
<<< 0010-dmaengine-qcom_hidma-add-MSI-support-for-interrupts.patch
<<< 0009-dmaengine-qcom_hidma-break-completion-processing-on-.patch
fc73796 dmaengine: qcom_hidma: break completion processing on error
<<< 0008-dmaengine-qcom_hidma-protect-common-data-structures.patch
d3eab50 dmaengine: qcom_hidma: add a common API to setup the interrupt
<<< 0006-dmaengine-qcom_hidma-bring-out-interrupt-cause.patch
<<< 0005-dmaengine-qcom_hidma-make-pending_tre_count-atomic.patch
9da0be8 dmaengine: qcom_hidma: configure DMA and MSI for OF
5282c18 of: irq: make of_msi_configure accessible from modules
13af1c8 Documentation: DT: qcom_hidma: correct spelling mistakes
ef6661b Documentation: DT: qcom_hidma: update binding for MSI
I also looked@the binary contents of the patches in topic/dma with what I posted
on v6. They match excluding your Signed off lines.
Sinan
--
Sinan Kaya
Qualcomm Datacenter Technologies, Inc. as an affiliate of Qualcomm Technologies, Inc.
Qualcomm Technologies, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project.
^ permalink raw reply
* [PATCH 1/4] arm64: dts: msm8996: Add SMEM reserve-memory node
From: Andy Gross @ 2016-10-20 21:53 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <4ca66e5d-c235-435b-c966-49a0e0722b8e@codeaurora.org>
On Thu, Oct 20, 2016 at 02:16:41PM -0700, Sarangdhar Joshi wrote:
> On 10/20/2016 12:57 PM, Bjorn Andersson wrote:
> >On Thu 20 Oct 11:56 PDT 2016, Sarangdhar Joshi wrote:
> >
> >>Add DT node to carveout memory for shared memory region.
> >>
> >
> >Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
>
> Thanks for reviewing.
>
All of the patches looked good. I do agree with Bjorn's comments on the other
patch. When you resend these, please use a cover letter and a V2. I'll then
pick them up for the next pull request.
Thanks for sending these!
Andy
^ permalink raw reply
* [PATCH 3/4] arm64: dts: msm8996: Add SMEM DT nodes
From: Andy Gross @ 2016-10-20 21:51 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1c7504f2-48ca-bcae-3eef-16589513d1aa@codeaurora.org>
On Thu, Oct 20, 2016 at 02:18:33PM -0700, Sarangdhar Joshi wrote:
> On 10/20/2016 12:56 PM, Bjorn Andersson wrote:
> >On Thu 20 Oct 11:56 PDT 2016, Sarangdhar Joshi wrote:
> >
> >>From: Bjorn Andersson <bjorn.andersson@linaro.org>
> >>
> >>Add SMEM and TCSR DT nodes on MSM8996.
> >>
> >>Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
> >>Signed-off-by: Sarangdhar Joshi <spjoshi@codeaurora.org>
> >>---
> >> arch/arm64/boot/dts/qcom/msm8996.dtsi | 19 +++++++++++++++++++
> >> 1 file changed, 19 insertions(+)
> >>
> >>diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi
> >>index 949b096..0a810f5 100644
> >>--- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
> >>+++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
> >>@@ -169,12 +169,31 @@
> >> method = "smc";
> >> };
> >>
> >>+ smem {
> >>+ compatible = "qcom,smem";
> >>+
> >>+ memory-region = <&smem_mem>;
> >>+
> >>+ hwlocks = <&tcsr_mutex 3>;
> >>+ };
> >>+
> >> soc: soc {
> >> #address-cells = <1>;
> >> #size-cells = <1>;
> >> ranges = <0 0 0 0xffffffff>;
> >> compatible = "simple-bus";
> >>
> >>+ tcsr_mutex_regs: syscon at 740000 {
> >>+ compatible = "syscon";
> >>+ reg = <0x740000 0x20000>;
> >>+ };
> >>+
> >>+ tcsr_mutex: hwlock {
> >>+ compatible = "qcom,tcsr-mutex";
> >>+ syscon = <&tcsr_mutex_regs 0 0x1000>;
> >>+ #hwlock-cells = <1>;
> >>+ };
> >
> >Sorry, I got this in the wrong place, the hwlock node should sit outside
> >of soc {} - looks like we got this wrong in msm8916 as well.
>
> Thanks for reviewing the patch. Do you mean to move it under / {}; (i.e.
> root)?
Yes. Any node that doesn't have reg properties should go under the root.
Andy
^ permalink raw reply
* [PATCH] drm: convert DT component matching to component_match_add_release()
From: Russell King - ARM Linux @ 2016-10-20 21:50 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAOw6vbK=z3wJKTh8jZoU2Gj1PtTLLH_sAUUShbsxL=Qi7d+FLw@mail.gmail.com>
On Thu, Oct 20, 2016 at 04:39:04PM -0400, Sean Paul wrote:
> On Wed, Oct 19, 2016 at 6:28 AM, Russell King
> <rmk+kernel@armlinux.org.uk> wrote:
> > Convert DT component matching to use component_match_add_release().
> >
> > Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
> > ---
> > Can we please get this patch from May merged into the drm-misc or
> > whatever trees so that we don't end up with conflicts? I've no idea
> > who looks after drm-misc, as they have _still_ failed to add
> > themselves to MAINTAINERS.
>
> I think Daniel explained pretty clearly why this wasn't happening in
> the previous thread.
>
> Next time you send a v2, can you please mark it as such and include a
> "Changes in v2" section?
Why - nothing's changed other than a rebase onto 4.9-rc1. This isn't
a "I've changed it in XYZ way, so here's a new copy". It's being
posted in the hope that someone will finally either comment on it or
merge the damn thing, rather than ignoring it was done when it was
last posted.
> > drivers/gpu/drm/arm/hdlcd_drv.c | 3 ++-
> > drivers/gpu/drm/arm/malidp_drv.c | 4 +++-
> > drivers/gpu/drm/armada/armada_drv.c | 2 +-
> > drivers/gpu/drm/drm_of.c | 28 +++++++++++++++++++++++--
> > drivers/gpu/drm/etnaviv/etnaviv_drv.c | 5 +++--
> > drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c | 7 ++++---
> > drivers/gpu/drm/mediatek/mtk_drm_drv.c | 4 +++-
> > drivers/gpu/drm/msm/msm_drv.c | 12 ++++++-----
> > drivers/gpu/drm/rockchip/rockchip_drm_drv.c | 6 ++++--
> > drivers/gpu/drm/sti/sti_drv.c | 5 +++--
> > drivers/gpu/drm/sun4i/sun4i_drv.c | 3 ++-
> > drivers/gpu/drm/tilcdc/tilcdc_external.c | 4 +++-
> > include/drm/drm_of.h | 12 +++++++++++
> > 13 files changed, 73 insertions(+), 22 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/arm/hdlcd_drv.c b/drivers/gpu/drm/arm/hdlcd_drv.c
> > index fb6a418ce6be..6477d1a65266 100644
> > --- a/drivers/gpu/drm/arm/hdlcd_drv.c
> > +++ b/drivers/gpu/drm/arm/hdlcd_drv.c
> > @@ -453,7 +453,8 @@ static int hdlcd_probe(struct platform_device *pdev)
> > return -EAGAIN;
> > }
> >
> > - component_match_add(&pdev->dev, &match, compare_dev, port);
> > + drm_of_component_match_add(&pdev->dev, &match, compare_dev, port);
> > + of_node_put(port);
>
> There's no mention in your commit message about fixing these node leaks.
Isn't that kind-of the whole point of this patch?
> >
> > return component_master_add_with_match(&pdev->dev, &hdlcd_master_ops,
> > match);
> > diff --git a/drivers/gpu/drm/arm/malidp_drv.c b/drivers/gpu/drm/arm/malidp_drv.c
> > index 9280358b8f15..9f4739452a25 100644
> > --- a/drivers/gpu/drm/arm/malidp_drv.c
> > +++ b/drivers/gpu/drm/arm/malidp_drv.c
> > @@ -493,7 +493,9 @@ static int malidp_platform_probe(struct platform_device *pdev)
> > return -EAGAIN;
> > }
> >
> > - component_match_add(&pdev->dev, &match, malidp_compare_dev, port);
> > + drm_of_component_match_add(&pdev->dev, &match, malidp_compare_dev,
> > + port);
> > + of_node_put(port);
> > return component_master_add_with_match(&pdev->dev, &malidp_master_ops,
> > match);
> > }
> > diff --git a/drivers/gpu/drm/armada/armada_drv.c b/drivers/gpu/drm/armada/armada_drv.c
> > index 1e0e68f608e4..94e46da9a758 100644
> > --- a/drivers/gpu/drm/armada/armada_drv.c
> > +++ b/drivers/gpu/drm/armada/armada_drv.c
> > @@ -254,7 +254,7 @@ static void armada_add_endpoints(struct device *dev,
> > continue;
> > }
> >
> > - component_match_add(dev, match, compare_of, remote);
> > + drm_of_component_match_add(dev, match, compare_of, remote);
> > of_node_put(remote);
> > }
> > }
> > diff --git a/drivers/gpu/drm/drm_of.c b/drivers/gpu/drm/drm_of.c
> > index bc98bb94264d..47848ed8ca48 100644
> > --- a/drivers/gpu/drm/drm_of.c
> > +++ b/drivers/gpu/drm/drm_of.c
> > @@ -6,6 +6,11 @@
> > #include <drm/drm_crtc.h>
> > #include <drm/drm_of.h>
> >
> > +static void drm_release_of(struct device *dev, void *data)
> > +{
> > + of_node_put(data);
> > +}
> > +
> > /**
> > * drm_crtc_port_mask - find the mask of a registered CRTC by port OF node
> > * @dev: DRM device
> > @@ -64,6 +69,24 @@ uint32_t drm_of_find_possible_crtcs(struct drm_device *dev,
> > EXPORT_SYMBOL(drm_of_find_possible_crtcs);
> >
> > /**
> > + * drm_of_component_match_add - Add a component helper OF node match rule
> > + * @master: master device
> > + * @matchptr: component match pointer
> > + * @compare: compare function used for matching component
> > + * @node: of_node
> > + */
> > +void drm_of_component_match_add(struct device *master,
> > + struct component_match **matchptr,
> > + int (*compare)(struct device *, void *),
> > + struct device_node *node)
> > +{
> > + of_node_get(node);
> > + component_match_add_release(master, matchptr, drm_release_of,
> > + compare, node);
> > +}
> > +EXPORT_SYMBOL_GPL(drm_of_component_match_add);
> > +
> > +/**
> > * drm_of_component_probe - Generic probe function for a component based master
> > * @dev: master device containing the OF node
> > * @compare_of: compare function used for matching components
> > @@ -101,7 +124,7 @@ int drm_of_component_probe(struct device *dev,
> > continue;
> > }
> >
> > - component_match_add(dev, &match, compare_of, port);
> > + drm_of_component_match_add(dev, &match, compare_of, port);
> > of_node_put(port);
> > }
> >
> > @@ -140,7 +163,8 @@ int drm_of_component_probe(struct device *dev,
> > continue;
> > }
> >
> > - component_match_add(dev, &match, compare_of, remote);
> > + drm_of_component_match_add(dev, &match, compare_of,
> > + remote);
> > of_node_put(remote);
> > }
> > of_node_put(port);
> > diff --git a/drivers/gpu/drm/etnaviv/etnaviv_drv.c b/drivers/gpu/drm/etnaviv/etnaviv_drv.c
> > index aa687669e22b..0dee6acbd880 100644
> > --- a/drivers/gpu/drm/etnaviv/etnaviv_drv.c
> > +++ b/drivers/gpu/drm/etnaviv/etnaviv_drv.c
> > @@ -16,6 +16,7 @@
> >
> > #include <linux/component.h>
> > #include <linux/of_platform.h>
> > +#include <drm/drm_of.h>
> >
> > #include "etnaviv_drv.h"
> > #include "etnaviv_gpu.h"
> > @@ -629,8 +630,8 @@ static int etnaviv_pdev_probe(struct platform_device *pdev)
> > if (!core_node)
> > break;
> >
> > - component_match_add(&pdev->dev, &match, compare_of,
> > - core_node);
> > + drm_of_component_match_add(&pdev->dev, &match,
> > + compare_of, core_node);
> > of_node_put(core_node);
> > }
> > } else if (dev->platform_data) {
> > diff --git a/drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c b/drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c
> > index 90377a609c98..e88fde18c946 100644
> > --- a/drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c
> > +++ b/drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c
> > @@ -24,6 +24,7 @@
> > #include <drm/drm_fb_cma_helper.h>
> > #include <drm/drm_atomic_helper.h>
> > #include <drm/drm_crtc_helper.h>
> > +#include <drm/drm_of.h>
> >
> > #include "kirin_drm_drv.h"
> >
> > @@ -260,14 +261,13 @@ static struct device_node *kirin_get_remote_node(struct device_node *np)
> > DRM_ERROR("no valid endpoint node\n");
> > return ERR_PTR(-ENODEV);
> > }
> > - of_node_put(endpoint);
> >
> > remote = of_graph_get_remote_port_parent(endpoint);
> > + of_node_put(endpoint);
>
> Another bug that's being fixed without mention in the commit.
>
> > if (!remote) {
> > DRM_ERROR("no valid remote node\n");
> > return ERR_PTR(-ENODEV);
> > }
> > - of_node_put(remote);
> >
> > if (!of_device_is_available(remote)) {
> > DRM_ERROR("not available for remote node\n");
> > @@ -294,7 +294,8 @@ static int kirin_drm_platform_probe(struct platform_device *pdev)
> > if (IS_ERR(remote))
> > return PTR_ERR(remote);
> >
> > - component_match_add(dev, &match, compare_of, remote);
> > + drm_of_component_match_add(dev, &match, compare_of, remote);
> > + of_node_put(remote);
> >
> > return component_master_add_with_match(dev, &kirin_drm_ops, match);
> >
> > diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
> > index cf83f6507ec8..9c5430fb82a2 100644
> > --- a/drivers/gpu/drm/mediatek/mtk_drm_drv.c
> > +++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
> > @@ -18,6 +18,7 @@
> > #include <drm/drm_crtc_helper.h>
> > #include <drm/drm_gem.h>
> > #include <drm/drm_gem_cma_helper.h>
> > +#include <drm/drm_of.h>
> > #include <linux/component.h>
> > #include <linux/iommu.h>
> > #include <linux/of_address.h>
> > @@ -415,7 +416,8 @@ static int mtk_drm_probe(struct platform_device *pdev)
> > comp_type == MTK_DPI) {
> > dev_info(dev, "Adding component match for %s\n",
> > node->full_name);
> > - component_match_add(dev, &match, compare_of, node);
> > + drm_of_component_match_add(dev, &match, compare_of,
> > + node);
> > } else {
> > struct mtk_ddp_comp *comp;
> >
> > diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c
> > index fb5c0b0a7594..84d38eaea585 100644
> > --- a/drivers/gpu/drm/msm/msm_drv.c
> > +++ b/drivers/gpu/drm/msm/msm_drv.c
> > @@ -15,6 +15,8 @@
> > * this program. If not, see <http://www.gnu.org/licenses/>.
> > */
> >
> > +#include <drm/drm_of.h>
> > +
> > #include "msm_drv.h"
> > #include "msm_debugfs.h"
> > #include "msm_fence.h"
> > @@ -919,8 +921,8 @@ static int add_components_mdp(struct device *mdp_dev,
> > continue;
> > }
> >
> > - component_match_add(master_dev, matchptr, compare_of, intf);
> > -
> > + drm_of_component_match_add(master_dev, matchptr, compare_of,
> > + intf);
> > of_node_put(intf);
> > of_node_put(ep_node);
> > }
> > @@ -962,8 +964,8 @@ static int add_display_components(struct device *dev,
> > put_device(mdp_dev);
> >
> > /* add the MDP component itself */
> > - component_match_add(dev, matchptr, compare_of,
> > - mdp_dev->of_node);
> > + drm_of_component_match_add(dev, matchptr, compare_of,
> > + mdp_dev->of_node);
> > } else {
> > /* MDP4 */
> > mdp_dev = dev;
> > @@ -996,7 +998,7 @@ static int add_gpu_components(struct device *dev,
> > if (!np)
> > return 0;
> >
> > - component_match_add(dev, matchptr, compare_of, np);
> > + drm_of_component_match_add(dev, matchptr, compare_of, np);
> >
> > of_node_put(np);
> >
> > diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_drv.c b/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
> > index 8c8cbe837e61..6fe161192bb4 100644
> > --- a/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
> > +++ b/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
> > @@ -20,6 +20,7 @@
> > #include <drm/drm_crtc_helper.h>
> > #include <drm/drm_fb_helper.h>
> > #include <drm/drm_gem_cma_helper.h>
> > +#include <drm/drm_of.h>
> > #include <linux/dma-mapping.h>
> > #include <linux/pm_runtime.h>
> > #include <linux/module.h>
> > @@ -388,7 +389,7 @@ static void rockchip_add_endpoints(struct device *dev,
> > continue;
> > }
> >
> > - component_match_add(dev, match, compare_of, remote);
> > + drm_of_component_match_add(dev, match, compare_of, remote);
> > of_node_put(remote);
> > }
> > }
> > @@ -437,7 +438,8 @@ static int rockchip_drm_platform_probe(struct platform_device *pdev)
> > }
> >
> > of_node_put(iommu);
> > - component_match_add(dev, &match, compare_of, port->parent);
> > + drm_of_component_match_add(dev, &match, compare_of,
> > + port->parent);
> > of_node_put(port);
> > }
> >
> > diff --git a/drivers/gpu/drm/sti/sti_drv.c b/drivers/gpu/drm/sti/sti_drv.c
> > index 2784919a7366..5e819876e642 100644
> > --- a/drivers/gpu/drm/sti/sti_drv.c
> > +++ b/drivers/gpu/drm/sti/sti_drv.c
> > @@ -17,6 +17,7 @@
> > #include <drm/drm_crtc_helper.h>
> > #include <drm/drm_gem_cma_helper.h>
> > #include <drm/drm_fb_cma_helper.h>
> > +#include <drm/drm_of.h>
> >
> > #include "sti_crtc.h"
> > #include "sti_drv.h"
> > @@ -423,8 +424,8 @@ static int sti_platform_probe(struct platform_device *pdev)
> > child_np = of_get_next_available_child(node, NULL);
> >
> > while (child_np) {
> > - component_match_add(dev, &match, compare_of, child_np);
> > - of_node_put(child_np);
> > + drm_of_component_match_add(dev, &match, compare_of,
> > + child_np);
> > child_np = of_get_next_available_child(node, child_np);
> > }
> >
> > diff --git a/drivers/gpu/drm/sun4i/sun4i_drv.c b/drivers/gpu/drm/sun4i/sun4i_drv.c
> > index 0da9862ad8ed..b3c4ad605e81 100644
> > --- a/drivers/gpu/drm/sun4i/sun4i_drv.c
> > +++ b/drivers/gpu/drm/sun4i/sun4i_drv.c
> > @@ -18,6 +18,7 @@
> > #include <drm/drm_fb_cma_helper.h>
> > #include <drm/drm_gem_cma_helper.h>
> > #include <drm/drm_fb_helper.h>
> > +#include <drm/drm_of.h>
> >
> > #include "sun4i_crtc.h"
> > #include "sun4i_drv.h"
> > @@ -239,7 +240,7 @@ static int sun4i_drv_add_endpoints(struct device *dev,
> > /* Add current component */
> > DRM_DEBUG_DRIVER("Adding component %s\n",
> > of_node_full_name(node));
> > - component_match_add(dev, match, compare_of, node);
> > + drm_of_component_match_add(dev, match, compare_of, node);
> > count++;
> > }
> >
> > diff --git a/drivers/gpu/drm/tilcdc/tilcdc_external.c b/drivers/gpu/drm/tilcdc/tilcdc_external.c
> > index 68e895021005..06a4c584f3cb 100644
> > --- a/drivers/gpu/drm/tilcdc/tilcdc_external.c
> > +++ b/drivers/gpu/drm/tilcdc/tilcdc_external.c
> > @@ -10,6 +10,7 @@
> >
> > #include <linux/component.h>
> > #include <linux/of_graph.h>
> > +#include <drm/drm_of.h>
> >
> > #include "tilcdc_drv.h"
> > #include "tilcdc_external.h"
> > @@ -160,7 +161,8 @@ int tilcdc_get_external_components(struct device *dev,
> >
> > dev_dbg(dev, "Subdevice node '%s' found\n", node->name);
> > if (match)
> > - component_match_add(dev, match, dev_match_of, node);
> > + drm_of_component_match_add(dev, match, dev_match_of,
> > + node);
> > of_node_put(node);
> > count++;
> > }
> > diff --git a/include/drm/drm_of.h b/include/drm/drm_of.h
> > index 3fd87b386ed7..d6b4c5587bbe 100644
> > --- a/include/drm/drm_of.h
> > +++ b/include/drm/drm_of.h
> > @@ -4,6 +4,7 @@
> > #include <linux/of_graph.h>
> >
> > struct component_master_ops;
> > +struct component_match;
> > struct device;
> > struct drm_device;
> > struct drm_encoder;
> > @@ -12,6 +13,10 @@ struct device_node;
> > #ifdef CONFIG_OF
> > extern uint32_t drm_of_find_possible_crtcs(struct drm_device *dev,
> > struct device_node *port);
> > +extern void drm_of_component_match_add(struct device *master,
> > + struct component_match **matchptr,
> > + int (*compare)(struct device *, void *),
> > + struct device_node *node);
> > extern int drm_of_component_probe(struct device *dev,
> > int (*compare_of)(struct device *, void *),
> > const struct component_master_ops *m_ops);
> > @@ -25,6 +30,13 @@ static inline uint32_t drm_of_find_possible_crtcs(struct drm_device *dev,
> > return 0;
> > }
> >
> > +static void drm_of_component_match_add(struct device *master,
> > + struct component_match **matchptr,
> > + int (*compare)(struct device *, void *),
> > + struct device_node *node)
> > +{
> > +}
> > +
> > static inline int
> > drm_of_component_probe(struct device *dev,
> > int (*compare_of)(struct device *, void *),
> > --
> > 2.1.0
> >
> >
> > _______________________________________________
> > linux-arm-kernel mailing list
> > linux-arm-kernel at lists.infradead.org
> > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
--
RMK's Patch system: http://www.armlinux.org.uk/developer/patches/
FTTC broadband for 0.8mile line: currently at 9.6Mbps down 400kbps up
according to speedtest.net.
^ permalink raw reply
* [PATCH v3 3/3] mtd: s3c2410: parse the device configuration from OF node
From: Sergio Prado @ 2016-10-20 21:42 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1476999766-32526-1-git-send-email-sergio.prado@e-labworks.com>
Allows configuring Samsung's s3c2410 memory controller using a
devicetree.
Signed-off-by: Sergio Prado <sergio.prado@e-labworks.com>
---
drivers/mtd/nand/s3c2410.c | 158 ++++++++++++++++++++++---
include/linux/platform_data/mtd-nand-s3c2410.h | 1 +
2 files changed, 143 insertions(+), 16 deletions(-)
diff --git a/drivers/mtd/nand/s3c2410.c b/drivers/mtd/nand/s3c2410.c
index 371db0d48135..ec170be881bc 100644
--- a/drivers/mtd/nand/s3c2410.c
+++ b/drivers/mtd/nand/s3c2410.c
@@ -39,6 +39,8 @@
#include <linux/slab.h>
#include <linux/clk.h>
#include <linux/cpufreq.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
@@ -185,6 +187,22 @@ struct s3c2410_nand_info {
#endif
};
+struct s3c24XX_nand_devtype_data {
+ enum s3c_cpu_type type;
+};
+
+static const struct s3c24XX_nand_devtype_data s3c2410_nand_devtype_data = {
+ .type = TYPE_S3C2410,
+};
+
+static const struct s3c24XX_nand_devtype_data s3c2412_nand_devtype_data = {
+ .type = TYPE_S3C2412,
+};
+
+static const struct s3c24XX_nand_devtype_data s3c2440_nand_devtype_data = {
+ .type = TYPE_S3C2440,
+};
+
/* conversion functions */
static struct s3c2410_nand_mtd *s3c2410_nand_mtd_toours(struct mtd_info *mtd)
@@ -794,6 +812,30 @@ static int s3c2410_nand_add_partition(struct s3c2410_nand_info *info,
return -ENODEV;
}
+static int s3c2410_nand_setup_data_interface(struct mtd_info *mtd,
+ const struct nand_data_interface *conf,
+ bool check_only)
+{
+ struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd);
+ struct s3c2410_platform_nand *pdata = info->platform;
+ const struct nand_sdr_timings *timings;
+ int tacls;
+
+ timings = nand_get_sdr_timings(conf);
+ if (IS_ERR(timings))
+ return -ENOTSUPP;
+
+ tacls = timings->tCLS_min - timings->tWP_min;
+ if (tacls < 0)
+ tacls = 0;
+
+ pdata->tacls = DIV_ROUND_UP(tacls, 1000);
+ pdata->twrph0 = DIV_ROUND_UP(timings->tWP_min, 1000);
+ pdata->twrph1 = DIV_ROUND_UP(timings->tCLH_min, 1000);
+
+ return 0;
+}
+
/**
* s3c2410_nand_init_chip - initialise a single instance of an chip
* @info: The base NAND controller the chip is on.
@@ -808,9 +850,12 @@ static void s3c2410_nand_init_chip(struct s3c2410_nand_info *info,
struct s3c2410_nand_mtd *nmtd,
struct s3c2410_nand_set *set)
{
+ struct device_node *np = info->device->of_node;
struct nand_chip *chip = &nmtd->chip;
void __iomem *regs = info->regs;
+ nand_set_flash_node(chip, set->of_node);
+
chip->write_buf = s3c2410_nand_write_buf;
chip->read_buf = s3c2410_nand_read_buf;
chip->select_chip = s3c2410_nand_select_chip;
@@ -819,6 +864,13 @@ static void s3c2410_nand_init_chip(struct s3c2410_nand_info *info,
chip->options = set->options;
chip->controller = &info->controller;
+ /*
+ * let's keep behavior unchanged for legacy boards booting via pdata and
+ * auto-detect timings only when booting with a device tree.
+ */
+ if (np)
+ chip->setup_data_interface = s3c2410_nand_setup_data_interface;
+
switch (info->cpu_type) {
case TYPE_S3C2410:
chip->IO_ADDR_W = regs + S3C2410_NFDATA;
@@ -859,12 +911,9 @@ static void s3c2410_nand_init_chip(struct s3c2410_nand_info *info,
chip->ecc.mode = info->platform->ecc_mode;
/* If you use u-boot BBT creation code, specifying this flag will
- * let the kernel fish out the BBT from the NAND, and also skip the
- * full NAND scan that can take 1/2s or so. Little things... */
- if (set->flash_bbt) {
+ * let the kernel fish out the BBT from the NAND */
+ if (set->flash_bbt)
chip->bbt_options |= NAND_BBT_USE_FLASH;
- chip->options |= NAND_SKIP_BBTSCAN;
- }
}
/**
@@ -943,6 +992,77 @@ static int s3c2410_nand_update_chip(struct s3c2410_nand_info *info,
return -EINVAL;
}
+ if (chip->bbt_options & NAND_BBT_USE_FLASH)
+ chip->options |= NAND_SKIP_BBTSCAN;
+
+ return 0;
+}
+
+static const struct of_device_id s3c24xx_nand_dt_ids[] = {
+ {
+ .compatible = "samsung,s3c2410-nand",
+ .data = &s3c2410_nand_devtype_data,
+ }, {
+ .compatible = "samsung,s3c2412-nand", /* also compatible with s3c6400 */
+ .data = &s3c2412_nand_devtype_data,
+ }, {
+ .compatible = "samsung,s3c2440-nand",
+ .data = &s3c2440_nand_devtype_data,
+ },
+ { /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, s3c24xx_nand_dt_ids);
+
+static int s3c24xx_nand_probe_dt(struct platform_device *pdev)
+{
+ const struct s3c24XX_nand_devtype_data *devtype_data;
+ struct s3c2410_platform_nand *pdata;
+ struct s3c2410_nand_info *info = platform_get_drvdata(pdev);
+ struct device_node *np = pdev->dev.of_node, *child;
+ struct s3c2410_nand_set *sets;
+
+ devtype_data = of_device_get_match_data(&pdev->dev);
+ if (!devtype_data)
+ return -ENODEV;
+
+ info->cpu_type = devtype_data->type;
+
+ pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
+ if (!pdata)
+ return -ENOMEM;
+
+ pdev->dev.platform_data = pdata;
+
+ pdata->nr_sets = of_get_child_count(np);
+ if (!pdata->nr_sets)
+ return 0;
+
+ sets = devm_kzalloc(&pdev->dev, sizeof(*sets) * pdata->nr_sets, GFP_KERNEL);
+ if (!sets)
+ return -ENOMEM;
+
+ pdata->sets = sets;
+
+ for_each_available_child_of_node(np, child) {
+
+ sets->name = (char *)child->name;
+ sets->of_node = child;
+ sets->nr_chips = 1;
+
+ of_node_get(child);
+
+ sets++;
+ }
+
+ return 0;
+}
+
+static int s3c24xx_nand_probe_pdata(struct platform_device *pdev)
+{
+ struct s3c2410_nand_info *info = platform_get_drvdata(pdev);
+
+ info->cpu_type = platform_get_device_id(pdev)->driver_data;
+
return 0;
}
@@ -955,8 +1075,7 @@ static int s3c2410_nand_update_chip(struct s3c2410_nand_info *info,
*/
static int s3c24xx_nand_probe(struct platform_device *pdev)
{
- struct s3c2410_platform_nand *plat = to_nand_plat(pdev);
- enum s3c_cpu_type cpu_type;
+ struct s3c2410_platform_nand *plat;
struct s3c2410_nand_info *info;
struct s3c2410_nand_mtd *nmtd;
struct s3c2410_nand_set *sets;
@@ -966,8 +1085,6 @@ static int s3c24xx_nand_probe(struct platform_device *pdev)
int nr_sets;
int setno;
- cpu_type = platform_get_device_id(pdev)->driver_data;
-
info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL);
if (info == NULL) {
err = -ENOMEM;
@@ -989,6 +1106,16 @@ static int s3c24xx_nand_probe(struct platform_device *pdev)
s3c2410_nand_clk_set_state(info, CLOCK_ENABLE);
+ if (pdev->dev.of_node)
+ err = s3c24xx_nand_probe_dt(pdev);
+ else
+ err = s3c24xx_nand_probe_pdata(pdev);
+
+ if (err)
+ goto exit_error;
+
+ plat = to_nand_plat(pdev);
+
/* allocate and map the resource */
/* currently we assume we have the one resource */
@@ -997,7 +1124,6 @@ static int s3c24xx_nand_probe(struct platform_device *pdev)
info->device = &pdev->dev;
info->platform = plat;
- info->cpu_type = cpu_type;
info->regs = devm_ioremap_resource(&pdev->dev, res);
if (IS_ERR(info->regs)) {
@@ -1007,12 +1133,6 @@ static int s3c24xx_nand_probe(struct platform_device *pdev)
dev_dbg(&pdev->dev, "mapped registers at %p\n", info->regs);
- /* initialise the hardware */
-
- err = s3c2410_nand_inithw(info);
- if (err != 0)
- goto exit_error;
-
sets = (plat != NULL) ? plat->sets : NULL;
nr_sets = (plat != NULL) ? plat->nr_sets : 1;
@@ -1056,6 +1176,11 @@ static int s3c24xx_nand_probe(struct platform_device *pdev)
sets++;
}
+ /* initialise the hardware */
+ err = s3c2410_nand_inithw(info);
+ if (err != 0)
+ goto exit_error;
+
err = s3c2410_nand_cpufreq_register(info);
if (err < 0) {
dev_err(&pdev->dev, "failed to init cpufreq support\n");
@@ -1156,6 +1281,7 @@ static int s3c24xx_nand_resume(struct platform_device *dev)
.id_table = s3c24xx_driver_ids,
.driver = {
.name = "s3c24xx-nand",
+ .of_match_table = s3c24xx_nand_dt_ids,
},
};
diff --git a/include/linux/platform_data/mtd-nand-s3c2410.h b/include/linux/platform_data/mtd-nand-s3c2410.h
index 729af13d1773..f01659026b26 100644
--- a/include/linux/platform_data/mtd-nand-s3c2410.h
+++ b/include/linux/platform_data/mtd-nand-s3c2410.h
@@ -40,6 +40,7 @@ struct s3c2410_nand_set {
char *name;
int *nr_map;
struct mtd_partition *partitions;
+ struct device_node *of_node;
};
struct s3c2410_platform_nand {
--
1.9.1
^ permalink raw reply related
* [PATCH v3 2/3] dt-bindings: mtd: add DT binding for s3c2410 flash controller
From: Sergio Prado @ 2016-10-20 21:42 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1476999766-32526-1-git-send-email-sergio.prado@e-labworks.com>
Adds the device tree bindings description for Samsung S3C2410 and
compatible NAND flash controller.
Signed-off-by: Sergio Prado <sergio.prado@e-labworks.com>
---
.../devicetree/bindings/mtd/samsung-s3c2410.txt | 56 ++++++++++++++++++++++
1 file changed, 56 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mtd/samsung-s3c2410.txt
diff --git a/Documentation/devicetree/bindings/mtd/samsung-s3c2410.txt b/Documentation/devicetree/bindings/mtd/samsung-s3c2410.txt
new file mode 100644
index 000000000000..0040eb8895e0
--- /dev/null
+++ b/Documentation/devicetree/bindings/mtd/samsung-s3c2410.txt
@@ -0,0 +1,56 @@
+* Samsung S3C2410 and compatible NAND flash controller
+
+Required properties:
+- compatible : The possible values are:
+ "samsung,s3c2410-nand"
+ "samsung,s3c2412-nand"
+ "samsung,s3c2440-nand"
+- reg : register's location and length.
+- #address-cells, #size-cells : see nand.txt
+- clocks : phandle to the nand controller clock
+- clock-names : must contain "nand"
+
+Optional child nodes:
+Child nodes representing the available nand chips.
+
+Optional child properties:
+- nand-ecc-mode : see nand.txt
+- nand-on-flash-bbt : see nand.txt
+
+Each child device node may optionally contain a 'partitions' sub-node,
+which further contains sub-nodes describing the flash partition mapping.
+See partition.txt for more detail.
+
+Example:
+
+nand-controller at 4e000000 {
+ compatible = "samsung,s3c2440-nand";
+ reg = <0x4e000000 0x40>;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ clocks = <&clocks HCLK_NAND>;
+ clock-names = "nand";
+
+ nand {
+ nand-ecc-mode = "soft";
+ nand-on-flash-bbt;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition at 0 {
+ label = "u-boot";
+ reg = <0 0x040000>;
+ };
+
+ partition at 40000 {
+ label = "kernel";
+ reg = <0x040000 0x500000>;
+ };
+ };
+ };
+};
--
1.9.1
^ permalink raw reply related
* [PATCH v3 1/3] mtd: s3c2410: make ecc mode configurable via platform data
From: Sergio Prado @ 2016-10-20 21:42 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1476999766-32526-1-git-send-email-sergio.prado@e-labworks.com>
Removing CONFIG_MTD_NAND_S3C2410_HWECC option and adding a ecc_mode
field in the drivers's platform data structure so it can be selectable
via platform data.
Also setting this field to NAND_ECC_SOFT in all boards using this
driver since none of them had CONFIG_MTD_NAND_S3C2410_HWECC enabled.
Signed-off-by: Sergio Prado <sergio.prado@e-labworks.com>
---
arch/arm/mach-s3c24xx/common-smdk.c | 1 +
arch/arm/mach-s3c24xx/mach-anubis.c | 1 +
arch/arm/mach-s3c24xx/mach-at2440evb.c | 1 +
arch/arm/mach-s3c24xx/mach-bast.c | 1 +
arch/arm/mach-s3c24xx/mach-gta02.c | 1 +
arch/arm/mach-s3c24xx/mach-jive.c | 1 +
arch/arm/mach-s3c24xx/mach-mini2440.c | 1 +
arch/arm/mach-s3c24xx/mach-osiris.c | 1 +
arch/arm/mach-s3c24xx/mach-qt2410.c | 1 +
arch/arm/mach-s3c24xx/mach-rx1950.c | 1 +
arch/arm/mach-s3c24xx/mach-rx3715.c | 1 +
arch/arm/mach-s3c24xx/mach-vstms.c | 1 +
arch/arm/mach-s3c64xx/mach-hmt.c | 1 +
arch/arm/mach-s3c64xx/mach-mini6410.c | 1 +
arch/arm/mach-s3c64xx/mach-real6410.c | 1 +
drivers/mtd/nand/Kconfig | 9 --
drivers/mtd/nand/s3c2410.c | 119 +++++++++++++------------
include/linux/platform_data/mtd-nand-s3c2410.h | 6 +-
18 files changed, 79 insertions(+), 70 deletions(-)
diff --git a/arch/arm/mach-s3c24xx/common-smdk.c b/arch/arm/mach-s3c24xx/common-smdk.c
index e9fbcc91c5c0..9e0bc46e90ec 100644
--- a/arch/arm/mach-s3c24xx/common-smdk.c
+++ b/arch/arm/mach-s3c24xx/common-smdk.c
@@ -171,6 +171,7 @@
.twrph1 = 20,
.nr_sets = ARRAY_SIZE(smdk_nand_sets),
.sets = smdk_nand_sets,
+ .ecc_mode = NAND_ECC_SOFT,
};
/* devices we initialise */
diff --git a/arch/arm/mach-s3c24xx/mach-anubis.c b/arch/arm/mach-s3c24xx/mach-anubis.c
index d03df0df01fa..029ef1b58925 100644
--- a/arch/arm/mach-s3c24xx/mach-anubis.c
+++ b/arch/arm/mach-s3c24xx/mach-anubis.c
@@ -223,6 +223,7 @@ static void anubis_nand_select(struct s3c2410_nand_set *set, int slot)
.nr_sets = ARRAY_SIZE(anubis_nand_sets),
.sets = anubis_nand_sets,
.select_chip = anubis_nand_select,
+ .ecc_mode = NAND_ECC_SOFT,
};
/* IDE channels */
diff --git a/arch/arm/mach-s3c24xx/mach-at2440evb.c b/arch/arm/mach-s3c24xx/mach-at2440evb.c
index 9ae170fef2a7..7b28eb623fc1 100644
--- a/arch/arm/mach-s3c24xx/mach-at2440evb.c
+++ b/arch/arm/mach-s3c24xx/mach-at2440evb.c
@@ -114,6 +114,7 @@
.twrph1 = 40,
.nr_sets = ARRAY_SIZE(at2440evb_nand_sets),
.sets = at2440evb_nand_sets,
+ .ecc_mode = NAND_ECC_SOFT,
};
/* DM9000AEP 10/100 ethernet controller */
diff --git a/arch/arm/mach-s3c24xx/mach-bast.c b/arch/arm/mach-s3c24xx/mach-bast.c
index ed07cf392d4b..5185036765db 100644
--- a/arch/arm/mach-s3c24xx/mach-bast.c
+++ b/arch/arm/mach-s3c24xx/mach-bast.c
@@ -299,6 +299,7 @@ static void bast_nand_select(struct s3c2410_nand_set *set, int slot)
.nr_sets = ARRAY_SIZE(bast_nand_sets),
.sets = bast_nand_sets,
.select_chip = bast_nand_select,
+ .ecc_mode = NAND_ECC_SOFT,
};
/* DM9000 */
diff --git a/arch/arm/mach-s3c24xx/mach-gta02.c b/arch/arm/mach-s3c24xx/mach-gta02.c
index 27ae6877550f..b0ed401da3a3 100644
--- a/arch/arm/mach-s3c24xx/mach-gta02.c
+++ b/arch/arm/mach-s3c24xx/mach-gta02.c
@@ -443,6 +443,7 @@ static void gta02_udc_vbus_draw(unsigned int ma)
.twrph1 = 15,
.nr_sets = ARRAY_SIZE(gta02_nand_sets),
.sets = gta02_nand_sets,
+ .ecc_mode = NAND_ECC_SOFT,
};
diff --git a/arch/arm/mach-s3c24xx/mach-jive.c b/arch/arm/mach-s3c24xx/mach-jive.c
index 7d99fe8f6157..895aca225952 100644
--- a/arch/arm/mach-s3c24xx/mach-jive.c
+++ b/arch/arm/mach-s3c24xx/mach-jive.c
@@ -232,6 +232,7 @@
.twrph1 = 40,
.sets = jive_nand_sets,
.nr_sets = ARRAY_SIZE(jive_nand_sets),
+ .ecc_mode = NAND_ECC_SOFT,
};
static int __init jive_mtdset(char *options)
diff --git a/arch/arm/mach-s3c24xx/mach-mini2440.c b/arch/arm/mach-s3c24xx/mach-mini2440.c
index ec60bd4a1646..71af8d2fd320 100644
--- a/arch/arm/mach-s3c24xx/mach-mini2440.c
+++ b/arch/arm/mach-s3c24xx/mach-mini2440.c
@@ -287,6 +287,7 @@
.nr_sets = ARRAY_SIZE(mini2440_nand_sets),
.sets = mini2440_nand_sets,
.ignore_unset_ecc = 1,
+ .ecc_mode = NAND_ECC_SOFT,
};
/* DM9000AEP 10/100 ethernet controller */
diff --git a/arch/arm/mach-s3c24xx/mach-osiris.c b/arch/arm/mach-s3c24xx/mach-osiris.c
index 2f6fdc326835..70b0eb7d3134 100644
--- a/arch/arm/mach-s3c24xx/mach-osiris.c
+++ b/arch/arm/mach-s3c24xx/mach-osiris.c
@@ -238,6 +238,7 @@ static void osiris_nand_select(struct s3c2410_nand_set *set, int slot)
.nr_sets = ARRAY_SIZE(osiris_nand_sets),
.sets = osiris_nand_sets,
.select_chip = osiris_nand_select,
+ .ecc_mode = NAND_ECC_SOFT,
};
/* PCMCIA control and configuration */
diff --git a/arch/arm/mach-s3c24xx/mach-qt2410.c b/arch/arm/mach-s3c24xx/mach-qt2410.c
index 984516e8307a..868c82087403 100644
--- a/arch/arm/mach-s3c24xx/mach-qt2410.c
+++ b/arch/arm/mach-s3c24xx/mach-qt2410.c
@@ -284,6 +284,7 @@
.twrph1 = 20,
.nr_sets = ARRAY_SIZE(qt2410_nand_sets),
.sets = qt2410_nand_sets,
+ .ecc_mode = NAND_ECC_SOFT,
};
/* UDC */
diff --git a/arch/arm/mach-s3c24xx/mach-rx1950.c b/arch/arm/mach-s3c24xx/mach-rx1950.c
index 25a139bb9826..e86ad6a68a0b 100644
--- a/arch/arm/mach-s3c24xx/mach-rx1950.c
+++ b/arch/arm/mach-s3c24xx/mach-rx1950.c
@@ -611,6 +611,7 @@ static void rx1950_set_mmc_power(unsigned char power_mode, unsigned short vdd)
.twrph1 = 15,
.nr_sets = ARRAY_SIZE(rx1950_nand_sets),
.sets = rx1950_nand_sets,
+ .ecc_mode = NAND_ECC_SOFT,
};
static struct s3c2410_udc_mach_info rx1950_udc_cfg __initdata = {
diff --git a/arch/arm/mach-s3c24xx/mach-rx3715.c b/arch/arm/mach-s3c24xx/mach-rx3715.c
index cf55196f89ca..a39fb9780dd3 100644
--- a/arch/arm/mach-s3c24xx/mach-rx3715.c
+++ b/arch/arm/mach-s3c24xx/mach-rx3715.c
@@ -164,6 +164,7 @@
.twrph1 = 15,
.nr_sets = ARRAY_SIZE(rx3715_nand_sets),
.sets = rx3715_nand_sets,
+ .ecc_mode = NAND_ECC_SOFT,
};
static struct platform_device *rx3715_devices[] __initdata = {
diff --git a/arch/arm/mach-s3c24xx/mach-vstms.c b/arch/arm/mach-s3c24xx/mach-vstms.c
index b4460d5f7011..f5e6322145fa 100644
--- a/arch/arm/mach-s3c24xx/mach-vstms.c
+++ b/arch/arm/mach-s3c24xx/mach-vstms.c
@@ -117,6 +117,7 @@
.twrph1 = 20,
.nr_sets = ARRAY_SIZE(vstms_nand_sets),
.sets = vstms_nand_sets,
+ .ecc_mode = NAND_ECC_SOFT,
};
static struct platform_device *vstms_devices[] __initdata = {
diff --git a/arch/arm/mach-s3c64xx/mach-hmt.c b/arch/arm/mach-s3c64xx/mach-hmt.c
index bc7dc1fcbf7d..59b5531f1987 100644
--- a/arch/arm/mach-s3c64xx/mach-hmt.c
+++ b/arch/arm/mach-s3c64xx/mach-hmt.c
@@ -204,6 +204,7 @@ static void hmt_bl_exit(struct device *dev)
.twrph1 = 40,
.nr_sets = ARRAY_SIZE(hmt_nand_sets),
.sets = hmt_nand_sets,
+ .ecc_mode = NAND_ECC_SOFT,
};
static struct gpio_led hmt_leds[] = {
diff --git a/arch/arm/mach-s3c64xx/mach-mini6410.c b/arch/arm/mach-s3c64xx/mach-mini6410.c
index ae999fb3fe6d..a3e3e25728b4 100644
--- a/arch/arm/mach-s3c64xx/mach-mini6410.c
+++ b/arch/arm/mach-s3c64xx/mach-mini6410.c
@@ -142,6 +142,7 @@
.twrph1 = 40,
.nr_sets = ARRAY_SIZE(mini6410_nand_sets),
.sets = mini6410_nand_sets,
+ .ecc_mode = NAND_ECC_SOFT,
};
static struct s3c_fb_pd_win mini6410_lcd_type0_fb_win = {
diff --git a/arch/arm/mach-s3c64xx/mach-real6410.c b/arch/arm/mach-s3c64xx/mach-real6410.c
index 4e240ffa7ac7..d6b3ffd7704b 100644
--- a/arch/arm/mach-s3c64xx/mach-real6410.c
+++ b/arch/arm/mach-s3c64xx/mach-real6410.c
@@ -194,6 +194,7 @@
.twrph1 = 40,
.nr_sets = ARRAY_SIZE(real6410_nand_sets),
.sets = real6410_nand_sets,
+ .ecc_mode = NAND_ECC_SOFT,
};
static struct platform_device *real6410_devices[] __initdata = {
diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index 7b7a887b4709..9748f3580d4b 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -179,15 +179,6 @@ config MTD_NAND_S3C2410_DEBUG
help
Enable debugging of the S3C NAND driver
-config MTD_NAND_S3C2410_HWECC
- bool "Samsung S3C NAND Hardware ECC"
- depends on MTD_NAND_S3C2410
- help
- Enable the use of the controller's internal ECC generator when
- using NAND. Early versions of the chips have had problems with
- incorrect ECC generation, and if using these, the default of
- software ECC is preferable.
-
config MTD_NAND_NDFC
tristate "NDFC NanD Flash Controller"
depends on 4xx
diff --git a/drivers/mtd/nand/s3c2410.c b/drivers/mtd/nand/s3c2410.c
index d459c19d78de..371db0d48135 100644
--- a/drivers/mtd/nand/s3c2410.c
+++ b/drivers/mtd/nand/s3c2410.c
@@ -497,7 +497,6 @@ static int s3c2412_nand_devready(struct mtd_info *mtd)
/* ECC handling functions */
-#ifdef CONFIG_MTD_NAND_S3C2410_HWECC
static int s3c2410_nand_correct_data(struct mtd_info *mtd, u_char *dat,
u_char *read_ecc, u_char *calc_ecc)
{
@@ -649,7 +648,6 @@ static int s3c2440_nand_calculate_ecc(struct mtd_info *mtd, const u_char *dat,
return 0;
}
-#endif
/* over-ride the standard functions for a little more speed. We can
* use read/write block to move the data buffers to/from the controller
@@ -858,50 +856,7 @@ static void s3c2410_nand_init_chip(struct s3c2410_nand_info *info,
nmtd->info = info;
nmtd->set = set;
-#ifdef CONFIG_MTD_NAND_S3C2410_HWECC
- chip->ecc.calculate = s3c2410_nand_calculate_ecc;
- chip->ecc.correct = s3c2410_nand_correct_data;
- chip->ecc.mode = NAND_ECC_HW;
- chip->ecc.strength = 1;
-
- switch (info->cpu_type) {
- case TYPE_S3C2410:
- chip->ecc.hwctl = s3c2410_nand_enable_hwecc;
- chip->ecc.calculate = s3c2410_nand_calculate_ecc;
- break;
-
- case TYPE_S3C2412:
- chip->ecc.hwctl = s3c2412_nand_enable_hwecc;
- chip->ecc.calculate = s3c2412_nand_calculate_ecc;
- break;
-
- case TYPE_S3C2440:
- chip->ecc.hwctl = s3c2440_nand_enable_hwecc;
- chip->ecc.calculate = s3c2440_nand_calculate_ecc;
- break;
- }
-#else
- chip->ecc.mode = NAND_ECC_SOFT;
- chip->ecc.algo = NAND_ECC_HAMMING;
-#endif
-
- if (set->disable_ecc)
- chip->ecc.mode = NAND_ECC_NONE;
-
- switch (chip->ecc.mode) {
- case NAND_ECC_NONE:
- dev_info(info->device, "NAND ECC disabled\n");
- break;
- case NAND_ECC_SOFT:
- dev_info(info->device, "NAND soft ECC\n");
- break;
- case NAND_ECC_HW:
- dev_info(info->device, "NAND hardware ECC\n");
- break;
- default:
- dev_info(info->device, "NAND ECC UNKNOWN\n");
- break;
- }
+ chip->ecc.mode = info->platform->ecc_mode;
/* If you use u-boot BBT creation code, specifying this flag will
* let the kernel fish out the BBT from the NAND, and also skip the
@@ -923,28 +878,72 @@ static void s3c2410_nand_init_chip(struct s3c2410_nand_info *info,
*
* The internal state is currently limited to the ECC state information.
*/
-static void s3c2410_nand_update_chip(struct s3c2410_nand_info *info,
+static int s3c2410_nand_update_chip(struct s3c2410_nand_info *info,
struct s3c2410_nand_mtd *nmtd)
{
struct nand_chip *chip = &nmtd->chip;
- dev_dbg(info->device, "chip %p => page shift %d\n",
- chip, chip->page_shift);
+ switch (chip->ecc.mode) {
- if (chip->ecc.mode != NAND_ECC_HW)
- return;
+ case NAND_ECC_NONE:
+ dev_info(info->device, "ECC disabled\n");
+ break;
+
+ case NAND_ECC_SOFT:
+ /*
+ * This driver expects Hamming based ECC when ecc_mode is set
+ * to NAND_ECC_SOFT. Force ecc.algo to NAND_ECC_HAMMING to
+ * avoid adding an extra ecc_algo field to s3c2410_platform_nand.
+ */
+ chip->ecc.algo = NAND_ECC_HAMMING;
+ dev_info(info->device, "soft ECC\n");
+ break;
+
+ case NAND_ECC_HW:
+ chip->ecc.calculate = s3c2410_nand_calculate_ecc;
+ chip->ecc.correct = s3c2410_nand_correct_data;
+ chip->ecc.strength = 1;
+
+ switch (info->cpu_type) {
+ case TYPE_S3C2410:
+ chip->ecc.hwctl = s3c2410_nand_enable_hwecc;
+ chip->ecc.calculate = s3c2410_nand_calculate_ecc;
+ break;
+
+ case TYPE_S3C2412:
+ chip->ecc.hwctl = s3c2412_nand_enable_hwecc;
+ chip->ecc.calculate = s3c2412_nand_calculate_ecc;
+ break;
+
+ case TYPE_S3C2440:
+ chip->ecc.hwctl = s3c2440_nand_enable_hwecc;
+ chip->ecc.calculate = s3c2440_nand_calculate_ecc;
+ break;
+ }
+
+ dev_dbg(info->device, "chip %p => page shift %d\n",
+ chip, chip->page_shift);
/* change the behaviour depending on whether we are using
* the large or small page nand device */
+ if (chip->page_shift > 10) {
+ chip->ecc.size = 256;
+ chip->ecc.bytes = 3;
+ } else {
+ chip->ecc.size = 512;
+ chip->ecc.bytes = 3;
+ mtd_set_ooblayout(nand_to_mtd(chip), &s3c2410_ooblayout_ops);
+ }
- if (chip->page_shift > 10) {
- chip->ecc.size = 256;
- chip->ecc.bytes = 3;
- } else {
- chip->ecc.size = 512;
- chip->ecc.bytes = 3;
- mtd_set_ooblayout(nand_to_mtd(chip), &s3c2410_ooblayout_ops);
+ dev_info(info->device, "hardware ECC\n");
+ break;
+
+ default:
+ dev_err(info->device, "invalid ECC mode!\n");
+ return -EINVAL;
}
+
+ return 0;
}
/* s3c24xx_nand_probe
@@ -1046,7 +1045,9 @@ static int s3c24xx_nand_probe(struct platform_device *pdev)
NULL);
if (nmtd->scan_res == 0) {
- s3c2410_nand_update_chip(info, nmtd);
+ err = s3c2410_nand_update_chip(info, nmtd);
+ if (err < 0)
+ goto exit_error;
nand_scan_tail(mtd);
s3c2410_nand_add_partition(info, nmtd, sets);
}
diff --git a/include/linux/platform_data/mtd-nand-s3c2410.h b/include/linux/platform_data/mtd-nand-s3c2410.h
index c55e42ee57fa..729af13d1773 100644
--- a/include/linux/platform_data/mtd-nand-s3c2410.h
+++ b/include/linux/platform_data/mtd-nand-s3c2410.h
@@ -12,9 +12,10 @@
#ifndef __MTD_NAND_S3C2410_H
#define __MTD_NAND_S3C2410_H
+#include <linux/mtd/nand.h>
+
/**
* struct s3c2410_nand_set - define a set of one or more nand chips
- * @disable_ecc: Entirely disable ECC - Dangerous
* @flash_bbt: Openmoko u-boot can create a Bad Block Table
* Setting this flag will allow the kernel to
* look for it at boot time and also skip the NAND
@@ -31,7 +32,6 @@
* a warning at boot time.
*/
struct s3c2410_nand_set {
- unsigned int disable_ecc:1;
unsigned int flash_bbt:1;
unsigned int options;
@@ -51,6 +51,8 @@ struct s3c2410_platform_nand {
unsigned int ignore_unset_ecc:1;
+ nand_ecc_modes_t ecc_mode;
+
int nr_sets;
struct s3c2410_nand_set *sets;
--
1.9.1
^ permalink raw reply related
* [PATCH v3 0/3] mtd: s3c2410: add device tree support
From: Sergio Prado @ 2016-10-20 21:42 UTC (permalink / raw)
To: linux-arm-kernel
This series adds support for configuring Samsung's s3c2410 and
compatible flash memory controller via devicetree.
Tested on FriendlyARM mini2440, based on s3c2440 SoC.
Patch 3 depends on patch 1.
Changes since v2:
- conditionally assign chip->setup_data_interface to
s3c2410_nand_setup_data_interface if booting via device tree
Changes since v1:
- automate timing selection when booting with a device tree
- make s3c24XX_nand_devtype_data structs "static const"
- removing samsung,s3c6400-nand compatible since it is equivalent to
samsung,s3c2412-nand
Changes since initial version:
- patch converted to a patch series
- read timings from nand_sdr_timings when booting with a device tree
- naming improvements in the device tree binding
(s/nand/nand-controller/, s/_/-, s/children/child)
- dropped property samsung,ignore_unset_ecc
- remove @0 from nand device node
- checking pdev->dev.of_node instead of using ifdef CONFIG_OF_MTD
- preventing from parsing device tree properties twice
- increment the nand controller child node refcount, since we
maintain a reference to it and its name field
- using of_device_get_match_data() instead of of_match_device()
to make the code simpler
- remove CONFIG_MTD_NAND_S3C2410_HWECC compile option so we can
select ECC mode using nand-ecc-mode property in the device tree
Sergio Prado (3):
mtd: s3c2410: make ecc mode configurable via platform data
dt-bindings: mtd: add DT binding for s3c2410 flash controller
mtd: s3c2410: parse the device configuration from OF node
.../devicetree/bindings/mtd/samsung-s3c2410.txt | 56 +++++
arch/arm/mach-s3c24xx/common-smdk.c | 1 +
arch/arm/mach-s3c24xx/mach-anubis.c | 1 +
arch/arm/mach-s3c24xx/mach-at2440evb.c | 1 +
arch/arm/mach-s3c24xx/mach-bast.c | 1 +
arch/arm/mach-s3c24xx/mach-gta02.c | 1 +
arch/arm/mach-s3c24xx/mach-jive.c | 1 +
arch/arm/mach-s3c24xx/mach-mini2440.c | 1 +
arch/arm/mach-s3c24xx/mach-osiris.c | 1 +
arch/arm/mach-s3c24xx/mach-qt2410.c | 1 +
arch/arm/mach-s3c24xx/mach-rx1950.c | 1 +
arch/arm/mach-s3c24xx/mach-rx3715.c | 1 +
arch/arm/mach-s3c24xx/mach-vstms.c | 1 +
arch/arm/mach-s3c64xx/mach-hmt.c | 1 +
arch/arm/mach-s3c64xx/mach-mini6410.c | 1 +
arch/arm/mach-s3c64xx/mach-real6410.c | 1 +
drivers/mtd/nand/Kconfig | 9 -
drivers/mtd/nand/s3c2410.c | 277 +++++++++++++++------
include/linux/platform_data/mtd-nand-s3c2410.h | 7 +-
19 files changed, 278 insertions(+), 86 deletions(-)
create mode 100644 Documentation/devicetree/bindings/mtd/samsung-s3c2410.txt
--
1.9.1
^ permalink raw reply
* [PATCH V4 1/3] ACPI, PCI, IRQ: assign ISA IRQ directly during early boot stages
From: Rafael J. Wysocki @ 2016-10-20 21:39 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1476915664-27231-2-git-send-email-okaya@codeaurora.org>
On Thu, Oct 20, 2016 at 12:21 AM, Sinan Kaya <okaya@codeaurora.org> wrote:
> The penalty determination of ISA IRQ goes through 4 paths.
> 1. assign PCI_USING during power up via acpi_irq_penalty_init.
> 2. update the penalty with acpi_penalize_isa_irq function based on the
> active parameter.
> 3. kernel command line penalty update via acpi_irq_penalty_update function.
> 4. increment the penalty as USING right after the IRQ is assign to PCI.
>
> acpi_penalize_isa_irq and acpi_irq_penalty_update functions get called
> before the ACPI subsystem is started.
>
> These API need to bypass the acpi_irq_get_penalty function.
>
> Signed-off-by: Sinan Kaya <okaya@codeaurora.org>
> ---
> drivers/acpi/pci_link.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/acpi/pci_link.c b/drivers/acpi/pci_link.c
> index c983bf7..4f37938 100644
> --- a/drivers/acpi/pci_link.c
> +++ b/drivers/acpi/pci_link.c
> @@ -849,7 +849,7 @@ static int __init acpi_irq_penalty_update(char *str, int used)
> continue;
>
> if (used)
> - new_penalty = acpi_irq_get_penalty(irq) +
> + new_penalty = acpi_isa_irq_penalty[irq] +
> PIRQ_PENALTY_ISA_USED;
> else
> new_penalty = 0;
> @@ -871,7 +871,7 @@ static int __init acpi_irq_penalty_update(char *str, int used)
> void acpi_penalize_isa_irq(int irq, int active)
> {
> if ((irq >= 0) && (irq < ARRAY_SIZE(acpi_isa_irq_penalty)))
> - acpi_isa_irq_penalty[irq] = acpi_irq_get_penalty(irq) +
> + acpi_isa_irq_penalty[irq] = acpi_isa_irq_penalty[irq] +
This looks slightly odd. What about
+ acpi_isa_irq_penalty[irq] +=
> (active ? PIRQ_PENALTY_ISA_USED : PIRQ_PENALTY_PCI_USING);
> }
>
Thanks,
Rafael
^ permalink raw reply
* [PATCH V3 1/3] ACPI, PCI IRQ: add PCI_USING penalty for ISA interrupts
From: Sinan Kaya @ 2016-10-20 21:25 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAJZ5v0gZmNxOF5hf8oYF_UYUNHrYkFy=Y7SWGCZ+VRKGNeJmcA@mail.gmail.com>
On 10/20/2016 2:08 PM, Rafael J. Wysocki wrote:
> On Thu, Oct 20, 2016 at 10:01 PM, Sinan Kaya <okaya@codeaurora.org> wrote:
>> On 10/19/2016 3:44 PM, Bjorn Helgaas wrote:
>
> [cut]
>
>> If we want to move the ISA pieces out of this file, that can be done too.
>> We can also add support for PNPACPI. I'm not a very big fan of scratch
>> everything and start from beginning approach. This refactoring effort already
>> failed 3 times. I'd like to close the issue and move on.
>
> Understood, but we have broken this for too many times already.
>
> Either we have a minimum fix that is known working or we are going back.
Agreed. I think my V4 patch satisfies our short term goals and fixes the issue
you are seeing. IMO, it is good enough for the moment.
>
> Thanks,
> Rafael
>
--
Sinan Kaya
Qualcomm Datacenter Technologies, Inc. as an affiliate of Qualcomm Technologies, Inc.
Qualcomm Technologies, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project.
^ permalink raw reply
* [PATCH V5 1/2] ACPI: Add support for ResourceSource/IRQ domain mapping
From: agustinv at codeaurora.org @ 2016-10-20 21:23 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <4506c0f4-165a-e84b-73e2-d3cca9c8b9d7@arm.com>
Hey Marc,
On 2016-10-20 13:51, Marc Zyngier wrote:
> On 20/10/16 17:48, Lorenzo Pieralisi wrote:
>> Hi Agustin,
>>
>> On Tue, Oct 18, 2016 at 01:41:48PM -0400, Agustin Vega-Frias wrote:
>>> This allows irqchip drivers to associate an ACPI DSDT device to
>>> an IRQ domain and provides support for using the ResourceSource
>>> in Extended IRQ Resources to find the domain and map the IRQs
>>> specified on that domain.
>>>
>>> Signed-off-by: Agustin Vega-Frias <agustinv@codeaurora.org>
>>> ---
>>> drivers/acpi/Makefile | 1 +
>>> drivers/acpi/irqdomain.c | 141
>>> ++++++++++++++++++++++++++++++++++++++
>>> drivers/acpi/resource.c | 21 +++---
>>> include/asm-generic/vmlinux.lds.h | 1 +
>>> include/linux/acpi.h | 71 +++++++++++++++++++
>>> include/linux/irqchip.h | 17 ++++-
>>> 6 files changed, 240 insertions(+), 12 deletions(-)
>>> create mode 100644 drivers/acpi/irqdomain.c
>>>
>>> diff --git a/drivers/acpi/Makefile b/drivers/acpi/Makefile
>>> index 9ed0878..880401b 100644
>>> --- a/drivers/acpi/Makefile
>>> +++ b/drivers/acpi/Makefile
>>> @@ -57,6 +57,7 @@ acpi-$(CONFIG_ACPI_PROCFS_POWER) += cm_sbs.o
>>> acpi-y += acpi_lpat.o
>>> acpi-$(CONFIG_ACPI_GENERIC_GSI) += gsi.o
>>> acpi-$(CONFIG_ACPI_WATCHDOG) += acpi_watchdog.o
>>> +acpi-$(CONFIG_IRQ_DOMAIN) += irqdomain.o
>>>
>>> # These are (potentially) separate modules
>>>
>>> diff --git a/drivers/acpi/irqdomain.c b/drivers/acpi/irqdomain.c
>>> new file mode 100644
>>> index 0000000..c53b9f4
>>> --- /dev/null
>>> +++ b/drivers/acpi/irqdomain.c
>>> @@ -0,0 +1,141 @@
>>> +/*
>>> + * ACPI ResourceSource/IRQ domain mapping support
>>> + *
>>> + * Copyright (c) 2016, The Linux Foundation. All rights reserved.
>>> + *
>>> + * This program is free software; you can redistribute it and/or
>>> modify
>>> + * it under the terms of the GNU General Public License version 2
>>> and
>>> + * only version 2 as published by the Free Software Foundation.
>>> + *
>>> + * This program is distributed in the hope that it will be useful,
>>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>>> + * GNU General Public License for more details.
>>> + */
>>> +#include <linux/acpi.h>
>>> +#include <linux/irq.h>
>>> +#include <linux/irqdomain.h>
>>> +
>>> +/**
>>> + * acpi_irq_domain_ensure_probed() - Check if the device has
>>> registered
>>> + * an IRQ domain and probe as
>>> necessary
>>> + *
>>> + * @device: Device to check and probe
>>> + *
>>> + * Returns: 0 on success, -ENODEV otherwise
>>
>> This is not correct (ie it depends on what
>>
>> struct acpi_dsdt_probe_entry.probe
>>
>> returns) and I would like to take this nit as an opportunity
>> to take a step back and ask you a question below.
>>
>>> + */
>>> +static int acpi_irq_domain_ensure_probed(struct acpi_device *device)
>>> +{
>>> + struct acpi_dsdt_probe_entry *entry;
>>> +
>>> + if (irq_find_matching_fwnode(&device->fwnode, DOMAIN_BUS_ANY) != 0)
>>> + return 0;
>>> +
>>> + for (entry = &__dsdt_acpi_probe_table;
>>> + entry < &__dsdt_acpi_probe_table_end; entry++)
>>> + if (strcmp(entry->_hid, acpi_device_hid(device)) == 0)
>>> + return entry->probe(device);
>>
>> Through this approch we are forcing an irqchip (that by the way it
>> has a physical node ACPI companion by being a DSDT device object so it
>> could be managed by a platform driver) to be probed. The question is:
>> is
>> there a reason (apart from the current ACPI resource parsing API) why
>> this can't be implemented through deferred probing and the device
>> dependencies framework Rafael is working on:
>>
>> http://www.mail-archive.com/linux-kernel at vger.kernel.org/msg1246897.html
>>
>> The DT layer, through the of_irq_get() API, supports probe deferral
>> and what I am asking you is if there is any blocking point (again,
>> apart from the current ACPI API) to implement the same mechanism.
>>
>> I have not reviewed the previous versions so I am certainly missing
>> some of the bits and pieces already discussed, apologies for that.
>
> Also, this function scares me to no end: lack of locking and recursion
> are the main things that worry me. My vote would be to implement
> something based on Rafael's approach (which conveniently solves all
> kind
> of other issues).
I'll review Rafael's latest patchset and comment back on whether it
suits
our needs or if we can build on that.
Thanks
>
> I'll review this patch series in a more in-depth way soon, but I wanted
> to chime in and add my own weight to Lorenzo's proposal.
>
> Thanks,
>
> M.
> --
> Jazz is not dead. It just smells funny...
--
Qualcomm Datacenter Technologies, Inc. on behalf of the Qualcomm
Technologies, Inc.
Qualcomm Technologies, Inc. is a member of the Code Aurora Forum, a
Linux Foundation Collaborative Project.
^ permalink raw reply
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