* [PATCH v7 0/4] da8xx USB PHY platform devices and clocks
From: Sekhar Nori @ 2016-10-28 9:59 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1477527498-21930-1-git-send-email-david@lechnology.com>
On Thursday 27 October 2016 05:48 AM, David Lechner wrote:
> This series depends on [v3] ARM: davinci: da8xx: Fix some redefined symbol
> warnings <https://patchwork.kernel.org/patch/9397005/> being applied first.
>
> v7 changes:
> * Dropped patches that have been accepted into linux-davinci already
> * New patch for adding device names to clock lookup tables
> * Picked up related patch from Axel Haslam for registering USB PHY clocks on
> device tree boards and added error checking to to that patch
> * Rebased on latest linux-davinci + linux-next
> * Added devices instead of NULL in clk_get() where appropriate usb-da8xx.c
> * Re-ordered patches so that they apply/build cleanly
The series looks good to me now. Since this is considerable change from
previous version, I will wait a while to see if others have any comments
before applying this.
Thanks,
Sekhar
^ permalink raw reply
* [PATCH v2 2/2] arm64: dts: hi6220: add resets property into dwmmc nodes
From: Jaehoon Chung @ 2016-10-28 9:54 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <24930ad4-313f-a4f0-c89a-770238863816@samsung.com>
Hi,
On 10/28/2016 06:43 PM, Jaehoon Chung wrote:
> Hi,
>
> On 10/28/2016 04:38 PM, Leo Yan wrote:
>> On Fri, Oct 28, 2016 at 04:33:41PM +0900, Jaehoon Chung wrote:
>>
>> [...]
>>
>>>>>> Guodong: Is there any bootloader dependency on that change?
>>>>>
>>>>> FYI, I use firmwares available in AOSP
>>>>
>>>> I tried latest firmware [1], still cannot boot up until revert the
>>>> patch "arm64: dts: hi6220: add resets property into dwmmc nodes".
>>>
>>> Could you share the log? Is there any log about failure?
>>
>> Sure, please see below log:
>
> It's related with -EPROBE_DEFER..I'm not sure but if CONFIG_RESET_CONTROLLER is enabled, it's searching for reset controller.
> Maybe hi6220 has handled the reset controller(?)...
>
> I'm checking devm_reset_control_xxx...It's possible to occur the other boards which enabled RESET_CONTROLLER..
Could you check the below thing..
/* find reset controller when exist */
- pdata->rstc = devm_reset_control_get_optional(dev, NULL);
+ pdata->rstc = devm_reset_control_get_optional(dev, "dwmci-reset");
if (IS_ERR(pdata->rstc)) {
if (PTR_ERR(pdata->rstc) == -EPROBE_DEFER)
return ERR_PTR(-EPROBE_DEFER);
To prevent the wrong controlling, how about adding "#reset-names" for dwmmc controller?
Best Regards,
Jaehoon Chung
>
> Best Regards,
> Jaehoon Chung
>
>>
>> EFI stub: Booting Linux Kernel...
>> EFI stub: Using DTB from configuration table
>> EFI stub: Exiting boot services and installing virtual address map...
>> [ 0.000000] Booting Linux on physical CPU 0x0
>> [ 0.000000] Linux version 4.9.0-rc1-00251-g323792f (leoy at leoy-linaro) (gcc version 4.9.2 20140904 (prerelease) (crosstool-NG linaro-1.13.1-4.9-2014.09 - Linaro GCC 4.9-2014.09) ) #589 SMP PREEMPT Fri Oct 28 15:35:15 CST 2016
>> [ 0.000000] Boot CPU: AArch64 Processor [410fd033]
>> [ 0.000000] efi: Getting EFI parameters from FDT:
>> [ 0.000000] efi: EFI v2.50 by hikey EFI Oct 26 2016 15:14:29
>> [ 0.000000] efi: PROP=0x3d8297d8
>> [ 0.000000] Reserved memory: created CMA memory pool at 0x000000002d000000, size 128 MiB
>> [ 0.000000] OF: reserved mem: initialized node linux,cma, compatible id shared-dma-pool
>> [ 0.000000] psci: probing for conduit method from DT.
>> [ 0.000000] psci: PSCIv1.0 detected in firmware.
>> [ 0.000000] psci: Using standard PSCI v0.2 function IDs
>> [ 0.000000] psci: MIGRATE_INFO_TYPE not supported.
>> [ 0.000000] percpu: Embedded 21 pages/cpu @ffff80003df10000 s48000 r8192 d29824 u86016
>> [ 0.000000] Detected VIPT I-cache on CPU0
>> [ 0.000000] CPU features: enabling workaround for ARM erratum 845719
>> [ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 249229
>> [ 0.000000] Kernel command line: BOOT_IMAGE=(hd0,gpt6)/Image console=tty0 console=ttyAMA3,115200 root=/dev/disk/by-partlabel/system rootwait rw efi=noruntime
>> [ 0.000000] log_buf_len individual max cpu contribution: 4096 bytes
>> [ 0.000000] log_buf_len total cpu_extra contributions: 28672 bytes
>> [ 0.000000] log_buf_len min size: 16384 bytes
>> [ 0.000000] log_buf_len: 65536 bytes
>> [ 0.000000] early log buf free: 14468(88%)
>> [ 0.000000] PID hash table entries: 4096 (order: 3, 32768 bytes)
>> [ 0.000000] Dentry cache hash table entries: 131072 (order: 8, 1048576 bytes)
>> [ 0.000000] Inode-cache hash table entries: 65536 (order: 7, 524288 bytes)
>> [ 0.000000] Memory: 841572K/1012788K available (8316K kernel code, 860K rwdata, 3668K rodata, 1024K init, 283K bss, 40144K reserved, 131072K cma-reserved)
>> [ 0.000000] Virtual kernel memory layout:
>> [ 0.000000] modules : 0xffff000000000000 - 0xffff000008000000 ( 128 MB)
>> [ 0.000000] vmalloc : 0xffff000008000000 - 0xffff7dffbfff0000 (129022 GB)
>> [ 0.000000] .text : 0xffff000008080000 - 0xffff0000088a0000 ( 8320 KB)
>> [ 0.000000] .rodata : 0xffff0000088a0000 - 0xffff000008c40000 ( 3712 KB)
>> [ 0.000000] .init : 0xffff000008c40000 - 0xffff000008d40000 ( 1024 KB)
>> [ 0.000000] .data : 0xffff000008d40000 - 0xffff000008e17200 ( 861 KB)
>> [ 0.000000] .bss : 0xffff000008e17200 - 0xffff000008e5e0c0 ( 284 KB)
>> [ 0.000000] fixed : 0xffff7dfffe7fd000 - 0xffff7dfffec00000 ( 4108 KB)
>> [ 0.000000] PCI I/O : 0xffff7dfffee00000 - 0xffff7dffffe00000 ( 16 MB)
>> [ 0.000000] vmemmap : 0xffff7e0000000000 - 0xffff800000000000 ( 2048 GB maximum)
>> [ 0.000000] 0xffff7e0000000000 - 0xffff7e0000f80000 ( 15 MB actual)
>> [ 0.000000] memory : 0xffff800000000000 - 0xffff80003e000000 ( 992 MB)
>> [ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1
>> [ 0.000000] Preemptible hierarchical RCU implementation.
>> [ 0.000000] Build-time adjustment of leaf fanout to 64.
>> [ 0.000000] RCU restricting CPUs from NR_CPUS=64 to nr_cpu_ids=8.
>> [ 0.000000] RCU: Adjusting geometry for rcu_fanout_leaf=64, nr_cpu_ids=8
>> [ 0.000000] NR_IRQS:64 nr_irqs:64 0
>> [ 0.000000] GIC: Using split EOI/Deactivate mode
>> [ 0.000000] arm_arch_timer: Architected cp15 timer(s) running at 1.20MHz (phys).
>> [ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x11b661f8e, max_idle_ns: 1763180809113 ns
>> [ 0.000004] sched_clock: 56 bits at 1200kHz, resolution 833ns, wraps every 4398046510838ns
>> [ 0.000101] clocksource: arm,sp804: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 99544814920 ns
>> [ 0.000108] sched_clock: 32 bits at 19MHz, resolution 52ns, wraps every 111848106981ns
>> [ 0.000495] Console: colour dummy device 80x25
>> [ 0.001193] console [tty0] enabled
>> [ 0.001224] Calibrating delay loop (skipped), value calculated using timer frequency.. 2.40 BogoMIPS (lpj=4800)
>> [ 0.001253] pid_max: default: 32768 minimum: 301
>> [ 0.001331] Security Framework initialized
>> [ 0.001373] Mount-cache hash table entries: 2048 (order: 2, 16384 bytes)
>> [ 0.001392] Mountpoint-cache hash table entries: 2048 (order: 2, 16384 bytes)
>> [ 0.002258] ASID allocator initialised with 65536 entries
>> [ 0.032726] EFI runtime services will be disabled.
>> [ 0.080274] Detected VIPT I-cache on CPU1
>> [ 0.080323] CPU1: Booted secondary processor [410fd033]
>> [ 0.112299] Detected VIPT I-cache on CPU2
>> [ 0.112321] CPU2: Booted secondary processor [410fd033]
>> [ 0.144348] Detected VIPT I-cache on CPU3
>> [ 0.144369] CPU3: Booted secondary processor [410fd033]
>> [ 0.176488] Detected VIPT I-cache on CPU4
>> [ 0.176529] CPU4: Booted secondary processor [410fd033]
>> [ 0.208479] Detected VIPT I-cache on CPU5
>> [ 0.208501] CPU5: Booted secondary processor [410fd033]
>> [ 0.240546] Detected VIPT I-cache on CPU6
>> [ 0.240568] CPU6: Booted secondary processor [410fd033]
>> [ 0.272610] Detected VIPT I-cache on CPU7
>> [ 0.272632] CPU7: Booted secondary processor [410fd033]
>> [ 0.272708] Brought up 8 CPUs
>> [ 0.272887] SMP: Total of 8 processors activated.
>> [ 0.272904] CPU features: detected feature: 32-bit EL0 Support
>> [ 0.272975] CPU: All CPU(s) started at EL2
>> [ 0.273028] alternatives: patching kernel code
>> [ 0.273645] devtmpfs: initialized
>> [ 0.278919] DMI not present or invalid.
>> [ 0.279161] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
>> [ 0.282522] pinctrl core: initialized pinctrl subsystem
>> [ 0.283636] NET: Registered protocol family 16
>> [ 0.300541] cpuidle: using governor menu
>> [ 0.301073] vdso: 2 pages (1 code @ ffff0000088a7000, 1 data @ ffff000008d44000)
>> [ 0.301106] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
>> [ 0.301863] DMA: preallocated 256 KiB pool for atomic allocations
>> [ 0.302088] Serial: AMBA PL011 UART driver
>> [ 0.303683] f8015000.uart: ttyAMA0 at MMIO 0xf8015000 (irq = 7, base_baud = 0) is a PL011 rev2
>> [ 0.304121] uart-pl011 f7111000.uart: could not find pctldev for node /soc/pinmux at f7010000/uart1_pmx_func, deferring probe
>> [ 0.304340] uart-pl011 f7112000.uart: could not find pctldev for node /soc/pinmux at f7010000/uart2_pmx_func, deferring probe
>> [ 0.304580] uart-pl011 f7113000.uart: could not find pctldev for node /soc/pinmux at f7010000/uart3_pmx_func, deferring probe
>> [ 0.310373] hi6220-mbox f7510000.mailbox: Mailbox enabled
>> [ 0.341400] HugeTLB registered 2 MB page size, pre-allocated 0 pages
>> [ 0.342257] ACPI: Interpreter disabled.
>> [ 0.342953] vgaarb: loaded
>> [ 0.343177] SCSI subsystem initialized
>> [ 0.343450] ssp-pl022 f7106000.spi: could not find pctldev for node /soc/pinmux at f7010000/spi0_pmx_func, deferring probe
>> [ 0.343955] usbcore: registered new interface driver usbfs
>> [ 0.344042] usbcore: registered new interface driver hub
>> [ 0.344177] usbcore: registered new device driver usb
>> [ 0.344452] i2c_designware f7100000.i2c: could not find pctldev for node /soc/pinmux at f7010000/i2c0_pmx_func, deferring probe
>> [ 0.344494] i2c_designware f7101000.i2c: could not find pctldev for node /soc/pinmux at f7010000/i2c1_pmx_func, deferring probe
>> [ 0.344535] i2c_designware f7102000.i2c: could not find pctldev for node /soc/pinmux at f7010000/i2c2_pmx_func, deferring probe
>> [ 0.344915] pps_core: LinuxPPS API ver. 1 registered
>> [ 0.344931] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
>> [ 0.345003] PTP clock support registered
>> [ 0.345325] dmi: Firmware registration failed.
>> [ 0.345408] Registered efivars operations
>> [ 0.345580] Advanced Linux Sound Architecture Driver Initialized.
>> [ 0.346449] clocksource: Switched to clocksource arch_sys_counter
>> [ 0.346617] VFS: Disk quotas dquot_6.6.0
>> [ 0.346670] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
>> [ 0.346935] pnp: PnP ACPI: disabled
>> [ 0.355325] NET: Registered protocol family 2
>> [ 0.355797] TCP established hash table entries: 8192 (order: 4, 65536 bytes)
>> [ 0.355885] TCP bind hash table entries: 8192 (order: 5, 131072 bytes)
>> [ 0.356026] TCP: Hash tables configured (established 8192 bind 8192)
>> [ 0.356085] UDP hash table entries: 512 (order: 2, 16384 bytes)
>> [ 0.356120] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes)
>> [ 0.356255] NET: Registered protocol family 1
>> [ 0.356569] RPC: Registered named UNIX socket transport module.
>> [ 0.356585] RPC: Registered udp transport module.
>> [ 0.356599] RPC: Registered tcp transport module.
>> [ 0.356613] RPC: Registered tcp NFSv4.1 backchannel transport module.
>> [ 0.356791] Unpacking initramfs...
>> [ 0.497134] Freeing initrd memory: 3576K (ffff8000372d5000 - ffff800037653000)
>> [ 0.497725] kvm [1]: 8-bit VMID
>> [ 0.497744] kvm [1]: IDMAP page: 890000
>> [ 0.497758] kvm [1]: HYP VA range: 800000000000:ffffffffffff
>> [ 0.498691] kvm [1]: Hyp mode initialized successfully
>> [ 0.498741] kvm [1]: vgic-v2 at f6804000
>> [ 0.498936] kvm [1]: vgic interrupt IRQ1
>> [ 0.498978] kvm [1]: virtual timer IRQ4
>> [ 0.501267] futex hash table entries: 2048 (order: 6, 262144 bytes)
>> [ 0.501394] audit: initializing netlink subsys (disabled)
>> [ 0.501462] audit: type=2000 audit(0.495:1): initialized
>> [ 0.501845] workingset: timestamp_bits=46 max_order=18 bucket_order=0
>> [ 0.508960] squashfs: version 4.0 (2009/01/31) Phillip Lougher
>> [ 0.509596] NFS: Registering the id_resolver key type
>> [ 0.509632] Key type id_resolver registered
>> [ 0.509645] Key type id_legacy registered
>> [ 0.509665] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
>> [ 0.509833] 9p: Installing v9fs 9p2000 file system support
>> [ 0.512208] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 247)
>> [ 0.512235] io scheduler noop registered
>> [ 0.512349] io scheduler cfq registered (default)
>> [ 0.513271] libphy: mdio_driver_register: phy-bcm-ns2-pci
>> [ 0.514198] pinctrl-single f7010000.pinmux: 159 pins at pa ffff000008e81000 size 636
>> [ 0.514612] pinctrl-single f7010800.pinmux: 163 pins at pa ffff000008e83800 size 652
>> [ 0.514770] pinctrl-single f8001800.pinmux: 30 pins at pa ffff000008e85800 size 120
>> [ 0.515809] pl061_gpio f8011000.gpio: PL061 GPIO chip @0x00000000f8011000 registered
>> [ 0.516214] pl061_gpio f8012000.gpio: PL061 GPIO chip @0x00000000f8012000 registered
>> [ 0.516610] pl061_gpio f8013000.gpio: PL061 GPIO chip @0x00000000f8013000 registered
>> [ 0.516687] gpio gpiochip3: gpio-line-names specifies 9 line names but there are 8 lines on the chip
>> [ 0.517038] pl061_gpio f8014000.gpio: PL061 GPIO chip @0x00000000f8014000 registered
>> [ 0.517416] pl061_gpio f7020000.gpio: PL061 GPIO chip @0x00000000f7020000 registered
>> [ 0.517796] pl061_gpio f7021000.gpio: PL061 GPIO chip @0x00000000f7021000 registered
>> [ 0.518172] pl061_gpio f7022000.gpio: PL061 GPIO chip @0x00000000f7022000 registered
>> [ 0.518577] pl061_gpio f7023000.gpio: PL061 GPIO chip @0x00000000f7023000 registered
>> [ 0.518658] gpio gpiochip8: gpio-line-names specifies 9 line names but there are 8 lines on the chip
>> [ 0.518999] pl061_gpio f7024000.gpio: PL061 GPIO chip @0x00000000f7024000 registered
>> [ 0.519385] pl061_gpio f7025000.gpio: PL061 GPIO chip @0x00000000f7025000 registered
>> [ 0.519774] pl061_gpio f7026000.gpio: PL061 GPIO chip @0x00000000f7026000 registered
>> [ 0.520162] pl061_gpio f7027000.gpio: PL061 GPIO chip @0x00000000f7027000 registered
>> [ 0.520550] pl061_gpio f7028000.gpio: PL061 GPIO chip @0x00000000f7028000 registered
>> [ 0.520939] pl061_gpio f7029000.gpio: PL061 GPIO chip @0x00000000f7029000 registered
>> [ 0.521324] pl061_gpio f702a000.gpio: PL061 GPIO chip @0x00000000f702a000 registered
>> [ 0.521719] pl061_gpio f702b000.gpio: PL061 GPIO chip @0x00000000f702b000 registered
>> [ 0.522107] pl061_gpio f702c000.gpio: PL061 GPIO chip @0x00000000f702c000 registered
>> [ 0.522505] pl061_gpio f702d000.gpio: PL061 GPIO chip @0x00000000f702d000 registered
>> [ 0.522884] pl061_gpio f702e000.gpio: PL061 GPIO chip @0x00000000f702e000 registered
>> [ 0.523275] pl061_gpio f702f000.gpio: PL061 GPIO chip @0x00000000f702f000 registered
>> [ 0.526086] xenfs: not registering filesystem on non-xen platform
>> [ 0.528934] Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled
>> [ 0.530124] SuperH (H)SCI(F) driver initialized
>> [ 0.530364] msm_serial: driver initialized
>> [ 0.536344] loop: module loaded
>> [ 0.539526] hisi_sas: driver version v1.6
>> [ 0.541976] libphy: Fixed MDIO Bus: probed
>> [ 0.542702] tun: Universal TUN/TAP device driver, 1.6
>> [ 0.542719] tun: (C) 1999-2004 Max Krasnyansky <maxk@qualcomm.com>
>> [ 0.543688] e1000e: Intel(R) PRO/1000 Network Driver - 3.2.6-k
>> [ 0.543707] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
>> [ 0.543804] igb: Intel(R) Gigabit Ethernet Network Driver - version 5.4.0-k
>> [ 0.543821] igb: Copyright (c) 2007-2014 Intel Corporation.
>> [ 0.543906] igbvf: Intel(R) Gigabit Virtual Function Network Driver - version 2.4.0-k
>> [ 0.543930] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
>> [ 0.544018] sky2: driver version 1.30
>> [ 0.544551] VFIO - User Level meta-driver version: 0.3
>> [ 0.546560] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
>> [ 0.546590] ehci-pci: EHCI PCI platform driver
>> [ 0.546638] ehci-platform: EHCI generic platform driver
>> [ 0.546730] ehci-exynos: EHCI EXYNOS driver
>> [ 0.546802] ehci-msm: Qualcomm On-Chip EHCI Host Controller
>> [ 0.546866] ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver
>> [ 0.546900] ohci-pci: OHCI PCI platform driver
>> [ 0.546952] ohci-platform: OHCI generic platform driver
>> [ 0.547024] ohci-exynos: OHCI EXYNOS driver
>> [ 0.547324] usbcore: registered new interface driver usb-storage
>> [ 0.547863] file system registered
>> [ 0.548183] mousedev: PS/2 mouse device common for all mice
>> [ 0.548621] input: HISI 65xx PowerOn Key as /devices/platform/f8000000.pmic/hi65xx-powerkey.0.auto/input/input0
>> [ 0.549253] rtc-pl031 f8003000.rtc: rtc core: registered pl031 as rtc0
>> [ 0.549459] rtc-pl031 f8004000.rtc: rtc core: registered pl031 as rtc1
>> [ 0.549796] i2c /dev entries driver
>> [ 0.552183] sdhci: Secure Digital Host Controller Interface driver
>> [ 0.552207] sdhci: Copyright(c) Pierre Ossman
>> [ 0.552403] Synopsys Designware Multimedia Card Interface Driver
>> [ 0.553405] sdhci-pltfm: SDHCI platform and OF driver helper
>> [ 0.554851] ledtrig-cpu: registered to indicate activity on CPUs
>> [ 0.555695] usbcore: registered new interface driver usbhid
>> [ 0.555717] usbhid: USB HID core driver
>> [ 0.557233] NET: Registered protocol family 17
>> [ 0.557320] 9pnet: Installing 9P2000 support
>> [ 0.557383] Key type dns_resolver registered
>> [ 0.557996] registered taskstats version 1
>> [ 0.561690] f7111000.uart: ttyAMA1 at MMIO 0xf7111000 (irq = 8, base_baud = 0) is a PL011 rev2
>> [ 0.562226] f7112000.uart: ttyAMA2 at MMIO 0xf7112000 (irq = 9, base_baud = 0) is a PL011 rev2
>> [ 0.562553] f7113000.uart: ttyAMA3 at MMIO 0xf7113000 (irq = 10, base_baud = 0) is a PL011 rev2
>> [ 1.916968] console [ttyAMA3] enabled
>> [ 1.922080] ssp-pl022 f7106000.spi: ARM PL022 driver, device ID: 0x00041022
>> [ 1.929144] ssp-pl022 f7106000.spi: mapped registers from 0x00000000f7106000 to ffff000008f03000
>> [ 1.938007] ssp-pl022 f7106000.spi: Failed to work in dma mode, work without dma!
>> [ 1.949535] f72c0000.usb supply vusb_d not found, using dummy regulator
>> [ 1.956256] f72c0000.usb supply vusb_a not found, using dummy regulator
>> [ 2.344873] dwc2 f72c0000.usb: EPs: 16, dedicated fifos, 1920 entries in SPRAM
>> [ 2.353154] dwc2 f72c0000.usb: DWC OTG Controller
>> [ 2.357891] dwc2 f72c0000.usb: new USB bus registered, assigned bus number 1
>> [ 2.364979] dwc2 f72c0000.usb: irq 38, io mem 0x00000000
>> [ 2.371082] hub 1-0:1.0: USB hub found
>> [ 2.374866] hub 1-0:1.0: 1 port detected
>> [ 2.382071] rtc-pl031 f8003000.rtc: setting system clock to 1970-01-01 00:00:19 UTC (19)
>> [ 2.390486] LDO2_2V8: disabling
>> [ 2.393639] LDO7_SDIO: disabling
>> [ 2.396900] LDO10_2V85: disabling
>> [ 2.400234] LDO13_1V8: disabling
>> [ 2.403476] LDO14_2V8: disabling
>> [ 2.406721] LDO17_2V5: disabling
>> [ 2.409956] LDO19_3V0: disabling
>> [ 2.413199] wlan-en-regulator: disabling
>> [ 2.417135] ALSA device list:
>> [ 2.420109] No soundcards found.
>> [ 2.423712] uart-pl011 f7113000.uart: no DMA platform data
>> [ 2.429585] Freeing unused kernel memory: 1024K (ffff800000c40000 - ffff800000d40000)
>> Loading, please wait...
>> starting version 228
>> [ 2.479981] random: systemd-udevd: uninitialized urandom read (16 bytes read)
>> [ 2.483570] random: udevadm: uninitialized urandom read (16 bytes read)
>> [ 2.483680] random: udevadm: uninitialized urandom read (16 bytes read)
>> [ 2.485404] random: udevadm: uninitialized urandom read (16 bytes read)
>> [ 2.485631] random: udevadm: uninitialized urandom read (16 bytes read)
>> [ 2.485859] random: udevadm: uninitialized urandom read (16 bytes read)
>> [ 2.486098] random: udevadm: uninitialized urandom read (16 bytes read)
>> [ 2.486305] random: udevadm: uninitialized urandom read (16 bytes read)
>> [ 2.486729] random: udevadm: uninitialized urandom read (16 bytes read)
>> [ 2.486951] random: udevadm: uninitialized urandom read (16 bytes read)
>> Begin: Loading essential drivers ... done.
>> Begin: Running /scripts/init-premount ... done.
>> Begin: Mounting root file system ... Begin: Running /scripts/local-top ... done.
>> Begin: Running /scripts/local-premount ... modprobe: can't change directory to '4.9.0-rc1-00251-g323792f': No such file or directory
>> done.
>> Begin: Waiting for root file system ... Begin: Running /scripts/local-block ... done.
>> Begin: Running /scripts/local-block ... done.
>> Begin: Running /scripts/local-block ... done.
>> Begin: Running /scripts/local-block ... done.
>> Begin: Running /scripts/local-block ... done.
>> Begin: Running /scripts/local-block ... done.
>> Begin: Running /scripts/local-block ... done.
>>
>> Thanks,
>> Leo Yan
>>
>>
>>
>
^ permalink raw reply
* [PATCH v6] tty/serial: at91: fix hardware handshake on Atmel platforms
From: Uwe Kleine-König @ 2016-10-28 9:51 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161027231331.gngekbg22wfvnolr@piout.net>
On Fri, Oct 28, 2016 at 01:13:31AM +0200, Alexandre Belloni wrote:
> On 27/10/2016 at 20:02:29 +0200, Uwe Kleine-K?nig wrote :
> > Hello Richard,
> >
> > On Thu, Oct 27, 2016 at 06:04:06PM +0200, Richard Genoud wrote:
> > > diff --git a/drivers/tty/serial/atmel_serial.c b/drivers/tty/serial/atmel_serial.c
> > > index fd8aa1f4ba78..168b10cad47b 100644
> > > --- a/drivers/tty/serial/atmel_serial.c
> > > +++ b/drivers/tty/serial/atmel_serial.c
> > > @@ -2132,11 +2132,29 @@ static void atmel_set_termios(struct uart_port *port, struct ktermios *termios,
> > > mode |= ATMEL_US_USMODE_RS485;
> > > } else if (termios->c_cflag & CRTSCTS) {
> > > /* RS232 with hardware handshake (RTS/CTS) */
> > > - if (atmel_use_dma_rx(port) && !atmel_use_fifo(port)) {
> > > - dev_info(port->dev, "not enabling hardware flow control because DMA is used");
> > > - termios->c_cflag &= ~CRTSCTS;
> > > - } else {
> > > + if (atmel_use_fifo(port) &&
> > > + !mctrl_gpio_to_gpiod(atmel_port->gpios, UART_GPIO_CTS)) {
> > > + /*
> > > + * with ATMEL_US_USMODE_HWHS set, the controller will
> > > + * be able to drive the RTS pin high/low when the RX
> > > + * FIFO is above RXFTHRES/below RXFTHRES2.
> > > + * It will also disable the transmitter when the CTS
> > > + * pin is high.
> > > + * This mode is not activated if CTS pin is a GPIO
> > > + * because in this case, the transmitter is always
> > > + * disabled (there must be an internal pull-up
> > > + * responsible for this behaviour).
> > > + * If the RTS pin is a GPIO, the controller won't be
> > > + * able to drive it according to the FIFO thresholds,
> > > + * but it will be handled by the driver.
> > > + */
> > > mode |= ATMEL_US_USMODE_HWHS;
> >
> > You use
> >
> > !mctrl_gpio_to_gpiod(atmel_port->gpios, UART_GPIO_CTS)
> >
> > as indicator that the cts mode of the respective pin is used. Is this
> > reliable? (It's not if there are machines that don't use CTS, neither as
> > gpio nor using the hardware function.) Maybe this needs a dt property to
> > indicate that there is no (hw)handshaking available?
> >
>
> We had a call today were we agreed that this should be added in a future
> patch. Let's fix the regression for now.
A machine without CTS (neither gpio nor hw function) used to work fine
before the breaking commit, right? So this case is part of the
regression and needs a fix?
Anyhow, this probably shouldn't stop the commit entering mainline
because there are probably very few such machines (if any).
So:
Acked-by: Uwe Kleine-K?nig <u.kleine-koenig@pengutronix.de>
Best regards
Uwe
--
Pengutronix e.K. | Uwe Kleine-K?nig |
Industrial Linux Solutions | http://www.pengutronix.de/ |
^ permalink raw reply
* [PATCH] ARM: davinci: Add full regulator constraints for non-DT boot
From: Sekhar Nori @ 2016-10-28 9:48 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161026194155.14304-1-ahaslam@baylibre.com>
On Thursday 27 October 2016 01:11 AM, ahaslam at baylibre.com wrote:
> From: Axel Haslam <ahaslam@baylibre.com>
>
> The phy framework requests an optional "phy" regulator. If it does
> not find one, it returns -EPROBE_DEFER. In the case of non-DT boot
> for the omap138-lcdk board, this would prevent the usb11 phy to probe
> correctly and ohci would not enumerate.
>
> By calling "regulator_has_full_constraints", An error would be returned
> instead of DEFER for the regulator, and the probe of the phy driver can
> continue normally without a regulator.
>
> Signed-off-by: Axel Haslam <ahaslam@baylibre.com>
Applied to v4.10/soc branch.
Thanks,
Sekhar
^ permalink raw reply
* [PATCH v2 2/2] arm64: dts: hi6220: add resets property into dwmmc nodes
From: Jaehoon Chung @ 2016-10-28 9:43 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161028073830.GC17266@leoy-linaro>
Hi,
On 10/28/2016 04:38 PM, Leo Yan wrote:
> On Fri, Oct 28, 2016 at 04:33:41PM +0900, Jaehoon Chung wrote:
>
> [...]
>
>>>>> Guodong: Is there any bootloader dependency on that change?
>>>>
>>>> FYI, I use firmwares available in AOSP
>>>
>>> I tried latest firmware [1], still cannot boot up until revert the
>>> patch "arm64: dts: hi6220: add resets property into dwmmc nodes".
>>
>> Could you share the log? Is there any log about failure?
>
> Sure, please see below log:
It's related with -EPROBE_DEFER..I'm not sure but if CONFIG_RESET_CONTROLLER is enabled, it's searching for reset controller.
Maybe hi6220 has handled the reset controller(?)...
I'm checking devm_reset_control_xxx...It's possible to occur the other boards which enabled RESET_CONTROLLER..
Best Regards,
Jaehoon Chung
>
> EFI stub: Booting Linux Kernel...
> EFI stub: Using DTB from configuration table
> EFI stub: Exiting boot services and installing virtual address map...
> [ 0.000000] Booting Linux on physical CPU 0x0
> [ 0.000000] Linux version 4.9.0-rc1-00251-g323792f (leoy at leoy-linaro) (gcc version 4.9.2 20140904 (prerelease) (crosstool-NG linaro-1.13.1-4.9-2014.09 - Linaro GCC 4.9-2014.09) ) #589 SMP PREEMPT Fri Oct 28 15:35:15 CST 2016
> [ 0.000000] Boot CPU: AArch64 Processor [410fd033]
> [ 0.000000] efi: Getting EFI parameters from FDT:
> [ 0.000000] efi: EFI v2.50 by hikey EFI Oct 26 2016 15:14:29
> [ 0.000000] efi: PROP=0x3d8297d8
> [ 0.000000] Reserved memory: created CMA memory pool at 0x000000002d000000, size 128 MiB
> [ 0.000000] OF: reserved mem: initialized node linux,cma, compatible id shared-dma-pool
> [ 0.000000] psci: probing for conduit method from DT.
> [ 0.000000] psci: PSCIv1.0 detected in firmware.
> [ 0.000000] psci: Using standard PSCI v0.2 function IDs
> [ 0.000000] psci: MIGRATE_INFO_TYPE not supported.
> [ 0.000000] percpu: Embedded 21 pages/cpu @ffff80003df10000 s48000 r8192 d29824 u86016
> [ 0.000000] Detected VIPT I-cache on CPU0
> [ 0.000000] CPU features: enabling workaround for ARM erratum 845719
> [ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 249229
> [ 0.000000] Kernel command line: BOOT_IMAGE=(hd0,gpt6)/Image console=tty0 console=ttyAMA3,115200 root=/dev/disk/by-partlabel/system rootwait rw efi=noruntime
> [ 0.000000] log_buf_len individual max cpu contribution: 4096 bytes
> [ 0.000000] log_buf_len total cpu_extra contributions: 28672 bytes
> [ 0.000000] log_buf_len min size: 16384 bytes
> [ 0.000000] log_buf_len: 65536 bytes
> [ 0.000000] early log buf free: 14468(88%)
> [ 0.000000] PID hash table entries: 4096 (order: 3, 32768 bytes)
> [ 0.000000] Dentry cache hash table entries: 131072 (order: 8, 1048576 bytes)
> [ 0.000000] Inode-cache hash table entries: 65536 (order: 7, 524288 bytes)
> [ 0.000000] Memory: 841572K/1012788K available (8316K kernel code, 860K rwdata, 3668K rodata, 1024K init, 283K bss, 40144K reserved, 131072K cma-reserved)
> [ 0.000000] Virtual kernel memory layout:
> [ 0.000000] modules : 0xffff000000000000 - 0xffff000008000000 ( 128 MB)
> [ 0.000000] vmalloc : 0xffff000008000000 - 0xffff7dffbfff0000 (129022 GB)
> [ 0.000000] .text : 0xffff000008080000 - 0xffff0000088a0000 ( 8320 KB)
> [ 0.000000] .rodata : 0xffff0000088a0000 - 0xffff000008c40000 ( 3712 KB)
> [ 0.000000] .init : 0xffff000008c40000 - 0xffff000008d40000 ( 1024 KB)
> [ 0.000000] .data : 0xffff000008d40000 - 0xffff000008e17200 ( 861 KB)
> [ 0.000000] .bss : 0xffff000008e17200 - 0xffff000008e5e0c0 ( 284 KB)
> [ 0.000000] fixed : 0xffff7dfffe7fd000 - 0xffff7dfffec00000 ( 4108 KB)
> [ 0.000000] PCI I/O : 0xffff7dfffee00000 - 0xffff7dffffe00000 ( 16 MB)
> [ 0.000000] vmemmap : 0xffff7e0000000000 - 0xffff800000000000 ( 2048 GB maximum)
> [ 0.000000] 0xffff7e0000000000 - 0xffff7e0000f80000 ( 15 MB actual)
> [ 0.000000] memory : 0xffff800000000000 - 0xffff80003e000000 ( 992 MB)
> [ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1
> [ 0.000000] Preemptible hierarchical RCU implementation.
> [ 0.000000] Build-time adjustment of leaf fanout to 64.
> [ 0.000000] RCU restricting CPUs from NR_CPUS=64 to nr_cpu_ids=8.
> [ 0.000000] RCU: Adjusting geometry for rcu_fanout_leaf=64, nr_cpu_ids=8
> [ 0.000000] NR_IRQS:64 nr_irqs:64 0
> [ 0.000000] GIC: Using split EOI/Deactivate mode
> [ 0.000000] arm_arch_timer: Architected cp15 timer(s) running at 1.20MHz (phys).
> [ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x11b661f8e, max_idle_ns: 1763180809113 ns
> [ 0.000004] sched_clock: 56 bits at 1200kHz, resolution 833ns, wraps every 4398046510838ns
> [ 0.000101] clocksource: arm,sp804: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 99544814920 ns
> [ 0.000108] sched_clock: 32 bits at 19MHz, resolution 52ns, wraps every 111848106981ns
> [ 0.000495] Console: colour dummy device 80x25
> [ 0.001193] console [tty0] enabled
> [ 0.001224] Calibrating delay loop (skipped), value calculated using timer frequency.. 2.40 BogoMIPS (lpj=4800)
> [ 0.001253] pid_max: default: 32768 minimum: 301
> [ 0.001331] Security Framework initialized
> [ 0.001373] Mount-cache hash table entries: 2048 (order: 2, 16384 bytes)
> [ 0.001392] Mountpoint-cache hash table entries: 2048 (order: 2, 16384 bytes)
> [ 0.002258] ASID allocator initialised with 65536 entries
> [ 0.032726] EFI runtime services will be disabled.
> [ 0.080274] Detected VIPT I-cache on CPU1
> [ 0.080323] CPU1: Booted secondary processor [410fd033]
> [ 0.112299] Detected VIPT I-cache on CPU2
> [ 0.112321] CPU2: Booted secondary processor [410fd033]
> [ 0.144348] Detected VIPT I-cache on CPU3
> [ 0.144369] CPU3: Booted secondary processor [410fd033]
> [ 0.176488] Detected VIPT I-cache on CPU4
> [ 0.176529] CPU4: Booted secondary processor [410fd033]
> [ 0.208479] Detected VIPT I-cache on CPU5
> [ 0.208501] CPU5: Booted secondary processor [410fd033]
> [ 0.240546] Detected VIPT I-cache on CPU6
> [ 0.240568] CPU6: Booted secondary processor [410fd033]
> [ 0.272610] Detected VIPT I-cache on CPU7
> [ 0.272632] CPU7: Booted secondary processor [410fd033]
> [ 0.272708] Brought up 8 CPUs
> [ 0.272887] SMP: Total of 8 processors activated.
> [ 0.272904] CPU features: detected feature: 32-bit EL0 Support
> [ 0.272975] CPU: All CPU(s) started at EL2
> [ 0.273028] alternatives: patching kernel code
> [ 0.273645] devtmpfs: initialized
> [ 0.278919] DMI not present or invalid.
> [ 0.279161] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
> [ 0.282522] pinctrl core: initialized pinctrl subsystem
> [ 0.283636] NET: Registered protocol family 16
> [ 0.300541] cpuidle: using governor menu
> [ 0.301073] vdso: 2 pages (1 code @ ffff0000088a7000, 1 data @ ffff000008d44000)
> [ 0.301106] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
> [ 0.301863] DMA: preallocated 256 KiB pool for atomic allocations
> [ 0.302088] Serial: AMBA PL011 UART driver
> [ 0.303683] f8015000.uart: ttyAMA0 at MMIO 0xf8015000 (irq = 7, base_baud = 0) is a PL011 rev2
> [ 0.304121] uart-pl011 f7111000.uart: could not find pctldev for node /soc/pinmux at f7010000/uart1_pmx_func, deferring probe
> [ 0.304340] uart-pl011 f7112000.uart: could not find pctldev for node /soc/pinmux at f7010000/uart2_pmx_func, deferring probe
> [ 0.304580] uart-pl011 f7113000.uart: could not find pctldev for node /soc/pinmux at f7010000/uart3_pmx_func, deferring probe
> [ 0.310373] hi6220-mbox f7510000.mailbox: Mailbox enabled
> [ 0.341400] HugeTLB registered 2 MB page size, pre-allocated 0 pages
> [ 0.342257] ACPI: Interpreter disabled.
> [ 0.342953] vgaarb: loaded
> [ 0.343177] SCSI subsystem initialized
> [ 0.343450] ssp-pl022 f7106000.spi: could not find pctldev for node /soc/pinmux at f7010000/spi0_pmx_func, deferring probe
> [ 0.343955] usbcore: registered new interface driver usbfs
> [ 0.344042] usbcore: registered new interface driver hub
> [ 0.344177] usbcore: registered new device driver usb
> [ 0.344452] i2c_designware f7100000.i2c: could not find pctldev for node /soc/pinmux at f7010000/i2c0_pmx_func, deferring probe
> [ 0.344494] i2c_designware f7101000.i2c: could not find pctldev for node /soc/pinmux at f7010000/i2c1_pmx_func, deferring probe
> [ 0.344535] i2c_designware f7102000.i2c: could not find pctldev for node /soc/pinmux at f7010000/i2c2_pmx_func, deferring probe
> [ 0.344915] pps_core: LinuxPPS API ver. 1 registered
> [ 0.344931] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
> [ 0.345003] PTP clock support registered
> [ 0.345325] dmi: Firmware registration failed.
> [ 0.345408] Registered efivars operations
> [ 0.345580] Advanced Linux Sound Architecture Driver Initialized.
> [ 0.346449] clocksource: Switched to clocksource arch_sys_counter
> [ 0.346617] VFS: Disk quotas dquot_6.6.0
> [ 0.346670] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
> [ 0.346935] pnp: PnP ACPI: disabled
> [ 0.355325] NET: Registered protocol family 2
> [ 0.355797] TCP established hash table entries: 8192 (order: 4, 65536 bytes)
> [ 0.355885] TCP bind hash table entries: 8192 (order: 5, 131072 bytes)
> [ 0.356026] TCP: Hash tables configured (established 8192 bind 8192)
> [ 0.356085] UDP hash table entries: 512 (order: 2, 16384 bytes)
> [ 0.356120] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes)
> [ 0.356255] NET: Registered protocol family 1
> [ 0.356569] RPC: Registered named UNIX socket transport module.
> [ 0.356585] RPC: Registered udp transport module.
> [ 0.356599] RPC: Registered tcp transport module.
> [ 0.356613] RPC: Registered tcp NFSv4.1 backchannel transport module.
> [ 0.356791] Unpacking initramfs...
> [ 0.497134] Freeing initrd memory: 3576K (ffff8000372d5000 - ffff800037653000)
> [ 0.497725] kvm [1]: 8-bit VMID
> [ 0.497744] kvm [1]: IDMAP page: 890000
> [ 0.497758] kvm [1]: HYP VA range: 800000000000:ffffffffffff
> [ 0.498691] kvm [1]: Hyp mode initialized successfully
> [ 0.498741] kvm [1]: vgic-v2 at f6804000
> [ 0.498936] kvm [1]: vgic interrupt IRQ1
> [ 0.498978] kvm [1]: virtual timer IRQ4
> [ 0.501267] futex hash table entries: 2048 (order: 6, 262144 bytes)
> [ 0.501394] audit: initializing netlink subsys (disabled)
> [ 0.501462] audit: type=2000 audit(0.495:1): initialized
> [ 0.501845] workingset: timestamp_bits=46 max_order=18 bucket_order=0
> [ 0.508960] squashfs: version 4.0 (2009/01/31) Phillip Lougher
> [ 0.509596] NFS: Registering the id_resolver key type
> [ 0.509632] Key type id_resolver registered
> [ 0.509645] Key type id_legacy registered
> [ 0.509665] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
> [ 0.509833] 9p: Installing v9fs 9p2000 file system support
> [ 0.512208] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 247)
> [ 0.512235] io scheduler noop registered
> [ 0.512349] io scheduler cfq registered (default)
> [ 0.513271] libphy: mdio_driver_register: phy-bcm-ns2-pci
> [ 0.514198] pinctrl-single f7010000.pinmux: 159 pins at pa ffff000008e81000 size 636
> [ 0.514612] pinctrl-single f7010800.pinmux: 163 pins at pa ffff000008e83800 size 652
> [ 0.514770] pinctrl-single f8001800.pinmux: 30 pins at pa ffff000008e85800 size 120
> [ 0.515809] pl061_gpio f8011000.gpio: PL061 GPIO chip @0x00000000f8011000 registered
> [ 0.516214] pl061_gpio f8012000.gpio: PL061 GPIO chip @0x00000000f8012000 registered
> [ 0.516610] pl061_gpio f8013000.gpio: PL061 GPIO chip @0x00000000f8013000 registered
> [ 0.516687] gpio gpiochip3: gpio-line-names specifies 9 line names but there are 8 lines on the chip
> [ 0.517038] pl061_gpio f8014000.gpio: PL061 GPIO chip @0x00000000f8014000 registered
> [ 0.517416] pl061_gpio f7020000.gpio: PL061 GPIO chip @0x00000000f7020000 registered
> [ 0.517796] pl061_gpio f7021000.gpio: PL061 GPIO chip @0x00000000f7021000 registered
> [ 0.518172] pl061_gpio f7022000.gpio: PL061 GPIO chip @0x00000000f7022000 registered
> [ 0.518577] pl061_gpio f7023000.gpio: PL061 GPIO chip @0x00000000f7023000 registered
> [ 0.518658] gpio gpiochip8: gpio-line-names specifies 9 line names but there are 8 lines on the chip
> [ 0.518999] pl061_gpio f7024000.gpio: PL061 GPIO chip @0x00000000f7024000 registered
> [ 0.519385] pl061_gpio f7025000.gpio: PL061 GPIO chip @0x00000000f7025000 registered
> [ 0.519774] pl061_gpio f7026000.gpio: PL061 GPIO chip @0x00000000f7026000 registered
> [ 0.520162] pl061_gpio f7027000.gpio: PL061 GPIO chip @0x00000000f7027000 registered
> [ 0.520550] pl061_gpio f7028000.gpio: PL061 GPIO chip @0x00000000f7028000 registered
> [ 0.520939] pl061_gpio f7029000.gpio: PL061 GPIO chip @0x00000000f7029000 registered
> [ 0.521324] pl061_gpio f702a000.gpio: PL061 GPIO chip @0x00000000f702a000 registered
> [ 0.521719] pl061_gpio f702b000.gpio: PL061 GPIO chip @0x00000000f702b000 registered
> [ 0.522107] pl061_gpio f702c000.gpio: PL061 GPIO chip @0x00000000f702c000 registered
> [ 0.522505] pl061_gpio f702d000.gpio: PL061 GPIO chip @0x00000000f702d000 registered
> [ 0.522884] pl061_gpio f702e000.gpio: PL061 GPIO chip @0x00000000f702e000 registered
> [ 0.523275] pl061_gpio f702f000.gpio: PL061 GPIO chip @0x00000000f702f000 registered
> [ 0.526086] xenfs: not registering filesystem on non-xen platform
> [ 0.528934] Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled
> [ 0.530124] SuperH (H)SCI(F) driver initialized
> [ 0.530364] msm_serial: driver initialized
> [ 0.536344] loop: module loaded
> [ 0.539526] hisi_sas: driver version v1.6
> [ 0.541976] libphy: Fixed MDIO Bus: probed
> [ 0.542702] tun: Universal TUN/TAP device driver, 1.6
> [ 0.542719] tun: (C) 1999-2004 Max Krasnyansky <maxk@qualcomm.com>
> [ 0.543688] e1000e: Intel(R) PRO/1000 Network Driver - 3.2.6-k
> [ 0.543707] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
> [ 0.543804] igb: Intel(R) Gigabit Ethernet Network Driver - version 5.4.0-k
> [ 0.543821] igb: Copyright (c) 2007-2014 Intel Corporation.
> [ 0.543906] igbvf: Intel(R) Gigabit Virtual Function Network Driver - version 2.4.0-k
> [ 0.543930] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
> [ 0.544018] sky2: driver version 1.30
> [ 0.544551] VFIO - User Level meta-driver version: 0.3
> [ 0.546560] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
> [ 0.546590] ehci-pci: EHCI PCI platform driver
> [ 0.546638] ehci-platform: EHCI generic platform driver
> [ 0.546730] ehci-exynos: EHCI EXYNOS driver
> [ 0.546802] ehci-msm: Qualcomm On-Chip EHCI Host Controller
> [ 0.546866] ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver
> [ 0.546900] ohci-pci: OHCI PCI platform driver
> [ 0.546952] ohci-platform: OHCI generic platform driver
> [ 0.547024] ohci-exynos: OHCI EXYNOS driver
> [ 0.547324] usbcore: registered new interface driver usb-storage
> [ 0.547863] file system registered
> [ 0.548183] mousedev: PS/2 mouse device common for all mice
> [ 0.548621] input: HISI 65xx PowerOn Key as /devices/platform/f8000000.pmic/hi65xx-powerkey.0.auto/input/input0
> [ 0.549253] rtc-pl031 f8003000.rtc: rtc core: registered pl031 as rtc0
> [ 0.549459] rtc-pl031 f8004000.rtc: rtc core: registered pl031 as rtc1
> [ 0.549796] i2c /dev entries driver
> [ 0.552183] sdhci: Secure Digital Host Controller Interface driver
> [ 0.552207] sdhci: Copyright(c) Pierre Ossman
> [ 0.552403] Synopsys Designware Multimedia Card Interface Driver
> [ 0.553405] sdhci-pltfm: SDHCI platform and OF driver helper
> [ 0.554851] ledtrig-cpu: registered to indicate activity on CPUs
> [ 0.555695] usbcore: registered new interface driver usbhid
> [ 0.555717] usbhid: USB HID core driver
> [ 0.557233] NET: Registered protocol family 17
> [ 0.557320] 9pnet: Installing 9P2000 support
> [ 0.557383] Key type dns_resolver registered
> [ 0.557996] registered taskstats version 1
> [ 0.561690] f7111000.uart: ttyAMA1 at MMIO 0xf7111000 (irq = 8, base_baud = 0) is a PL011 rev2
> [ 0.562226] f7112000.uart: ttyAMA2 at MMIO 0xf7112000 (irq = 9, base_baud = 0) is a PL011 rev2
> [ 0.562553] f7113000.uart: ttyAMA3 at MMIO 0xf7113000 (irq = 10, base_baud = 0) is a PL011 rev2
> [ 1.916968] console [ttyAMA3] enabled
> [ 1.922080] ssp-pl022 f7106000.spi: ARM PL022 driver, device ID: 0x00041022
> [ 1.929144] ssp-pl022 f7106000.spi: mapped registers from 0x00000000f7106000 to ffff000008f03000
> [ 1.938007] ssp-pl022 f7106000.spi: Failed to work in dma mode, work without dma!
> [ 1.949535] f72c0000.usb supply vusb_d not found, using dummy regulator
> [ 1.956256] f72c0000.usb supply vusb_a not found, using dummy regulator
> [ 2.344873] dwc2 f72c0000.usb: EPs: 16, dedicated fifos, 1920 entries in SPRAM
> [ 2.353154] dwc2 f72c0000.usb: DWC OTG Controller
> [ 2.357891] dwc2 f72c0000.usb: new USB bus registered, assigned bus number 1
> [ 2.364979] dwc2 f72c0000.usb: irq 38, io mem 0x00000000
> [ 2.371082] hub 1-0:1.0: USB hub found
> [ 2.374866] hub 1-0:1.0: 1 port detected
> [ 2.382071] rtc-pl031 f8003000.rtc: setting system clock to 1970-01-01 00:00:19 UTC (19)
> [ 2.390486] LDO2_2V8: disabling
> [ 2.393639] LDO7_SDIO: disabling
> [ 2.396900] LDO10_2V85: disabling
> [ 2.400234] LDO13_1V8: disabling
> [ 2.403476] LDO14_2V8: disabling
> [ 2.406721] LDO17_2V5: disabling
> [ 2.409956] LDO19_3V0: disabling
> [ 2.413199] wlan-en-regulator: disabling
> [ 2.417135] ALSA device list:
> [ 2.420109] No soundcards found.
> [ 2.423712] uart-pl011 f7113000.uart: no DMA platform data
> [ 2.429585] Freeing unused kernel memory: 1024K (ffff800000c40000 - ffff800000d40000)
> Loading, please wait...
> starting version 228
> [ 2.479981] random: systemd-udevd: uninitialized urandom read (16 bytes read)
> [ 2.483570] random: udevadm: uninitialized urandom read (16 bytes read)
> [ 2.483680] random: udevadm: uninitialized urandom read (16 bytes read)
> [ 2.485404] random: udevadm: uninitialized urandom read (16 bytes read)
> [ 2.485631] random: udevadm: uninitialized urandom read (16 bytes read)
> [ 2.485859] random: udevadm: uninitialized urandom read (16 bytes read)
> [ 2.486098] random: udevadm: uninitialized urandom read (16 bytes read)
> [ 2.486305] random: udevadm: uninitialized urandom read (16 bytes read)
> [ 2.486729] random: udevadm: uninitialized urandom read (16 bytes read)
> [ 2.486951] random: udevadm: uninitialized urandom read (16 bytes read)
> Begin: Loading essential drivers ... done.
> Begin: Running /scripts/init-premount ... done.
> Begin: Mounting root file system ... Begin: Running /scripts/local-top ... done.
> Begin: Running /scripts/local-premount ... modprobe: can't change directory to '4.9.0-rc1-00251-g323792f': No such file or directory
> done.
> Begin: Waiting for root file system ... Begin: Running /scripts/local-block ... done.
> Begin: Running /scripts/local-block ... done.
> Begin: Running /scripts/local-block ... done.
> Begin: Running /scripts/local-block ... done.
> Begin: Running /scripts/local-block ... done.
> Begin: Running /scripts/local-block ... done.
> Begin: Running /scripts/local-block ... done.
>
> Thanks,
> Leo Yan
>
>
>
^ permalink raw reply
* [PATCH v6] tty/serial: at91: fix hardware handshake on Atmel platforms
From: Cyrille Pitchen @ 2016-10-28 9:40 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161027160406.25738-1-richard.genoud@gmail.com>
Le 27/10/2016 ? 18:04, Richard Genoud a ?crit :
> After commit 1cf6e8fc8341 ("tty/serial: at91: fix RTS line management
> when hardware handshake is enabled"), the hardware handshake wasn't
> functional anymore on Atmel platforms (beside SAMA5D2).
>
> To understand why, one has to understand the flag ATMEL_US_USMODE_HWHS
> first:
> Before commit 1cf6e8fc8341 ("tty/serial: at91: fix RTS line management
> when hardware handshake is enabled"), this flag was never set.
> Thus, the CTS/RTS where only handled by serial_core (and everything
> worked just fine).
>
> This commit introduced the use of the ATMEL_US_USMODE_HWHS flag,
> enabling it for all boards when the user space enables flow control.
>
> When the ATMEL_US_USMODE_HWHS is set, the Atmel USART controller
> handles a part of the flow control job:
> - disable the transmitter when the CTS pin gets high.
> - drive the RTS pin high when the DMA buffer transfer is completed or
> PDC RX buffer full or RX FIFO is beyond threshold. (depending on the
> controller version).
>
> NB: This feature is *not* mandatory for the flow control to work.
> (Nevertheless, it's very useful if low latencies are needed.)
>
> Now, the specifics of the ATMEL_US_USMODE_HWHS flag:
>
> - For platforms with DMAC and no FIFOs (sam9x25, sam9x35, sama5D3,
> sama5D4, sam9g15, sam9g25, sam9g35)* this feature simply doesn't work.
> ( source: https://lkml.org/lkml/2016/9/7/598 )
> Tested it on sam9g35, the RTS pins always stays up, even when RXEN=1
> or a new DMA transfer descriptor is set.
> => ATMEL_US_USMODE_HWHS must not be used for those platforms
>
> - For platforms with a PDC (sam926{0,1,3}, sam9g10, sam9g20, sam9g45,
> sam9g46)*, there's another kind of problem. Once the flag
> ATMEL_US_USMODE_HWHS is set, the RTS pin can't be driven anymore via
> RTSEN/RTSDIS in USART Control Register. The RTS pin can only be driven
> by enabling/disabling the receiver or setting RCR=RNCR=0 in the PDC
> (Receive (Next) Counter Register).
> => Doing this is beyond the scope of this patch and could add other
> bugs, so the original (and working) behaviour should be set for those
> platforms (meaning ATMEL_US_USMODE_HWHS flag should be unset).
>
> - For platforms with a FIFO (sama5d2)*, the RTS pin is driven according
> to the RX FIFO thresholds, and can be also driven by RTSEN/RTSDIS in
> USART Control Register. No problem here.
> (This was the use case of commit 1cf6e8fc8341 ("tty/serial: at91: fix
> RTS line management when hardware handshake is enabled"))
> NB: If the CTS pin declared as a GPIO in the DTS, (for instance
> cts-gpios = <&pioA PIN_PB31 GPIO_ACTIVE_LOW>), the transmitter will be
> disabled.
> => ATMEL_US_USMODE_HWHS flag can be set for this platform ONLY IF the
> CTS pin is not a GPIO.
>
> So, the only case when ATMEL_US_USMODE_HWHS can be enabled is when
> (atmel_use_fifo(port) &&
> !mctrl_gpio_to_gpiod(atmel_port->gpios, UART_GPIO_CTS))
>
> Tested on all Atmel USART controller flavours:
> AT91SAM9G35-CM (DMAC flavour), AT91SAM9G20-EK (PDC flavour),
> SAMA5D2xplained (FIFO flavour).
>
> * the list may not be exhaustive
>
> Cc: <stable@vger.kernel.org> #4.4+ (beware, missing atmel_port variable)
> Fixes: 1cf6e8fc8341 ("tty/serial: at91: fix RTS line management when hardware handshake is enabled")
> Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
> Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
thanks :)
> ---
> drivers/tty/serial/atmel_serial.c | 26 ++++++++++++++++++++++----
> 1 file changed, 22 insertions(+), 4 deletions(-)
>
> Note for -stable:
> This patch will apply on 4.4.x/4.8.x but compilation will fail due to
> a missing variable atmel_port (introduced in 4.9-rc1):
>
> static void atmel_set_termios(struct uart_port *port, struct ktermios *termios,
> struct ktermios *old)
> {
> + struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
> unsigned long flags;
> unsigned int old_mode, mode, imr, quot, baud;
>
> Changes since v5:
> - fix typos
> - increase commentary
>
> Changes since v4:
> - the mctrl_gpio_use_rtscts() is gone since it was atmel_serial
> specific. (so patch 1 is gone)
> - patches 2 and 3 have been merged together since it didn't make
> a lot of sense to correct the GPIO case in one separate patch.
> - ATMEL_US_USMODE_HWHS is now unset for platform with PDC
>
> Changes since v3:
> - remove superfluous #include <linux/err.h> (thanks to Uwe)
> - rebase on next-20160930
>
> Changes since v2:
> - remove IS_ERR_OR_NULL() test in patch 1/3 as Uwe suggested.
> - fix typos in patch 2/3
> - rebase on next-20160927
> - simplify the logic in patch 3/3.
>
> Changes since v1:
> - Correct patch 1 with the error found by kbuild.
> - Add Alexandre's Acked-by on patch 2
> - Rewrite patch 3 logic in the light of the on-going discussion
> with Cyrille and Alexandre.
>
>
> diff --git a/drivers/tty/serial/atmel_serial.c b/drivers/tty/serial/atmel_serial.c
> index fd8aa1f4ba78..168b10cad47b 100644
> --- a/drivers/tty/serial/atmel_serial.c
> +++ b/drivers/tty/serial/atmel_serial.c
> @@ -2132,11 +2132,29 @@ static void atmel_set_termios(struct uart_port *port, struct ktermios *termios,
> mode |= ATMEL_US_USMODE_RS485;
> } else if (termios->c_cflag & CRTSCTS) {
> /* RS232 with hardware handshake (RTS/CTS) */
> - if (atmel_use_dma_rx(port) && !atmel_use_fifo(port)) {
> - dev_info(port->dev, "not enabling hardware flow control because DMA is used");
> - termios->c_cflag &= ~CRTSCTS;
> - } else {
> + if (atmel_use_fifo(port) &&
> + !mctrl_gpio_to_gpiod(atmel_port->gpios, UART_GPIO_CTS)) {
> + /*
> + * with ATMEL_US_USMODE_HWHS set, the controller will
> + * be able to drive the RTS pin high/low when the RX
> + * FIFO is above RXFTHRES/below RXFTHRES2.
> + * It will also disable the transmitter when the CTS
> + * pin is high.
> + * This mode is not activated if CTS pin is a GPIO
> + * because in this case, the transmitter is always
> + * disabled (there must be an internal pull-up
> + * responsible for this behaviour).
> + * If the RTS pin is a GPIO, the controller won't be
> + * able to drive it according to the FIFO thresholds,
> + * but it will be handled by the driver.
> + */
> mode |= ATMEL_US_USMODE_HWHS;
> + } else {
> + /*
> + * For platforms without FIFO, the flow control is
> + * handled by the driver.
> + */
> + mode |= ATMEL_US_USMODE_NORMAL;
> }
> } else {
> /* RS232 without hadware handshake */
>
^ permalink raw reply
* [PATCH v9 1/4] soc: mediatek: Refine scpsys to support multiple platform
From: James Liao @ 2016-10-28 9:36 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1d5cda95-467a-4f95-1cc9-b8f156271a54@gmail.com>
Hi Matthias,
Sorry for late reply due to our email service.
On Tue, 2016-10-25 at 16:04 +0200, Matthias Brugger wrote:
> Hi James,
>
> On 10/20/2016 10:56 AM, James Liao wrote:
> > -static int scpsys_probe(struct platform_device *pdev)
> > +static void init_clks(struct platform_device *pdev, struct clk *clk[CLK_MAX])
>
> I prefer struct clk **clk.
Okay.
> > +{
> > + int i;
> > +
> > + for (i = CLK_NONE + 1; i < CLK_MAX; i++)
> > + clk[i] = devm_clk_get(&pdev->dev, clk_names[i]);
> > +}
> > +
> > +static struct scp *init_scp(struct platform_device *pdev,
> > + const struct scp_domain_data *scp_domain_data, int num)
> > {
> > struct genpd_onecell_data *pd_data;
> > struct resource *res;
> > - int i, j, ret;
> > + int i, j;
> > struct scp *scp;
> > - struct clk *clk[MT8173_CLK_MAX];
> > + struct clk *clk[CLK_MAX];
>
> should be *[CLK_MAX - 1] but I would prefer to define in the enum:
> CLK_MAX = CLK_VENC_LT,
After init_clks() the clk[] will have valid contents between
clk[1]..clk[CLK_MAX-1], so it's necessary to declare clk[] with CLK_MAX
elements.
> If you are ok with it, I can fix both of my comments when applying.
Yes. struct clk **clk can be applied directly. But I think clk[CLK_MAX]
should be kept in current implementation.
Best regards,
James
^ permalink raw reply
* [PATCH v2 3/3] reset: Add the TI SCI reset driver
From: Philipp Zabel @ 2016-10-28 9:36 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161027214941.24641-4-afd@ti.com>
Hi Andrew,
is there (going to be) as stable branch I can base these on, or should I
just wait until the prerequisite patches appear in arm-soc/for-next?
Am Donnerstag, den 27.10.2016, 16:49 -0500 schrieb Andrew F. Davis:
> Some TI Keystone family of SoCs contain a system controller (like the
> Power Management Micro Controller (PMMC) on K2G SoCs) that manage the
> low-level device control (like clocks, resets etc) for the various
> hardware modules present on the SoC. These device control operations
> are provided to the host processor OS through a communication protocol
> called the TI System Control Interface (TI SCI) protocol.
>
> This patch adds a reset driver that communicates to the system
> controller over the TI SCI protocol for performing reset management
> of various devices present on the SoC. Various reset functionalities
> are achieved by the means of different TI SCI device operations
> provided by the TI SCI framework.
>
> Signed-off-by: Andrew F. Davis <afd@ti.com>
> [s-anna at ti.com: documentation changes, revised commit message]
> Signed-off-by: Suman Anna <s-anna@ti.com>
> Signed-off-by: Nishanth Menon <nm@ti.com>
> ---
> MAINTAINERS | 1 +
> drivers/reset/Kconfig | 9 ++
> drivers/reset/Makefile | 1 +
> drivers/reset/reset-ti-sci.c | 262 +++++++++++++++++++++++++++++++++++++++++++
> 4 files changed, 273 insertions(+)
> create mode 100644 drivers/reset/reset-ti-sci.c
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index accf991..b93d91a 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -11901,6 +11901,7 @@ F: include/dt-bindings/clock/k2g.h
> F: drivers/clk/keystone/sci-clk.c
> F: Documentation/devicetree/bindings/reset/ti,sci-reset.txt
> F: include/dt-bindings/reset/k2g.h
> +F: drivers/reset/reset-ti-sci.c
>
> THANKO'S RAREMONO AM/FM/SW RADIO RECEIVER USB DRIVER
> M: Hans Verkuil <hverkuil@xs4all.nl>
> diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
> index 06d9fa2..4c21c9d 100644
> --- a/drivers/reset/Kconfig
> +++ b/drivers/reset/Kconfig
> @@ -66,6 +66,15 @@ config RESET_SUNXI
> help
> This enables the reset driver for Allwinner SoCs.
>
> +config RESET_TI_SCI
> + tristate "TI System Control Interface (TI-SCI) reset driver"
> + depends on RESET_CONTROLLER
> + depends on TI_SCI_PROTOCOL
> + help
> + This enables the reset driver support over TI System Control Interface
> + available on some new TI SoCs. If you wish to use reset resources
> + managed by the TI System Controller, say Y here. Otherwise, say N.
> +
> config TI_SYSCON_RESET
> tristate "TI SYSCON Reset Driver"
> depends on HAS_IOMEM
> diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
> index bbe7026..36321f2 100644
> --- a/drivers/reset/Makefile
> +++ b/drivers/reset/Makefile
> @@ -10,6 +10,7 @@ obj-$(CONFIG_RESET_PISTACHIO) += reset-pistachio.o
> obj-$(CONFIG_RESET_SOCFPGA) += reset-socfpga.o
> obj-$(CONFIG_RESET_STM32) += reset-stm32.o
> obj-$(CONFIG_RESET_SUNXI) += reset-sunxi.o
> +obj-$(CONFIG_RESET_TI_SCI) += reset-ti-sci.o
> obj-$(CONFIG_TI_SYSCON_RESET) += reset-ti-syscon.o
> obj-$(CONFIG_RESET_UNIPHIER) += reset-uniphier.o
> obj-$(CONFIG_RESET_ZYNQ) += reset-zynq.o
> diff --git a/drivers/reset/reset-ti-sci.c b/drivers/reset/reset-ti-sci.c
> new file mode 100644
> index 0000000..42ccf12
> --- /dev/null
> +++ b/drivers/reset/reset-ti-sci.c
> @@ -0,0 +1,262 @@
> +/*
> + * Texas Instrument's System Control Interface (TI-SCI) reset driver
> + *
> + * Copyright (C) 2015-2016 Texas Instruments Incorporated - http://www.ti.com/
> + * Andrew F. Davis <afd@ti.com>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * This program is distributed "as is" WITHOUT ANY WARRANTY of any
> + * kind, whether express or implied; without even the implied warranty
> + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + */
> +
> +#include <linux/idr.h>
> +#include <linux/module.h>
> +#include <linux/of.h>
> +#include <linux/platform_device.h>
> +#include <linux/reset-controller.h>
> +#include <linux/soc/ti/ti_sci_protocol.h>
> +
> +/**
> + * struct ti_sci_reset_control - reset control structure
> + * @dev_id: SoC-specific device identifier
> + * @reset_mask: reset mask to use for toggling reset
> + */
> +struct ti_sci_reset_control {
> + u32 dev_id;
> + u32 reset_mask;
> +};
> +
> +/**
> + * struct ti_sci_reset_data - reset controller information structure
> + * @rcdev: reset controller entity
> + * @dev: reset controller device pointer
> + * @sci: TI SCI handle used for communication with system controller
> + * @idr: idr structure for mapping ids to reset control structures
> + */
> +struct ti_sci_reset_data {
> + struct reset_controller_dev rcdev;
> + struct device *dev;
> + const struct ti_sci_handle *sci;
> + struct idr idr;
> +};
> +
> +#define to_ti_sci_reset_data(p) \
> + container_of((p), struct ti_sci_reset_data, rcdev)
> +
> +/**
> + * ti_sci_reset_set() - program a device's reset
> + * @rcdev: reset controller entity
> + * @id: ID of the reset to toggle
> + * @assert: boolean flag to indicate assert or deassert
> + *
> + * This is a common internal function used to assert or deassert a device's
> + * reset using the TI SCI protocol. The device's reset is asserted if the
> + * @assert argument is true, or deasserted if @assert argument is false.
> + * The mechanism itself is a read-modify-write procedure, the current device
> + * reset register is read using a TI SCI device operation, the new value is
> + * set or un-set using the reset's mask, and the new reset value written by
> + * using another TI SCI device operation.
> + *
> + * Return: 0 for successful request, else a corresponding error value
> + */
> +static int ti_sci_reset_set(struct reset_controller_dev *rcdev,
> + unsigned long id, bool assert)
> +{
> + struct ti_sci_reset_data *data = to_ti_sci_reset_data(rcdev);
> + const struct ti_sci_handle *sci = data->sci;
> + const struct ti_sci_dev_ops *dev_ops = &sci->ops.dev_ops;
> + struct ti_sci_reset_control *control;
> + u32 reset_state;
> + int ret;
> +
> + control = idr_find(&data->idr, id);
> + if (!control)
> + return -EINVAL;
> +
> + ret = dev_ops->get_device_resets(sci, control->dev_id,
> + &reset_state);
> + if (ret)
> + return ret;
> +
> + if (assert)
> + reset_state |= control->reset_mask;
> + else
> + reset_state &= ~control->reset_mask;
> +
> + return dev_ops->set_device_resets(sci, control->dev_id,
> + reset_state);
Without any locking? Maybe the read-modify-write could just be moved one
level down with an update_bits type of callback in the ti_sci_dev_ops.
> +}
> +
> +/**
> + * ti_sci_reset_assert() - assert device reset
> + * @rcdev: reset controller entity
> + * @id: ID of the reset to be asserted
> + *
> + * This function implements the reset driver op to assert a device's reset
> + * using the TI SCI protocol. This invokes the function ti_sci_reset_set()
> + * with the corresponding parameters as passed in, but with the @assert
> + * argument set to true for asserting the reset.
> + *
> + * Return: 0 for successful request, else a corresponding error value
> + */
> +static int ti_sci_reset_assert(struct reset_controller_dev *rcdev,
> + unsigned long id)
> +{
> + return ti_sci_reset_set(rcdev, id, true);
> +}
> +
> +/**
> + * ti_sci_reset_deassert() - deassert device reset
> + * @rcdev: reset controller entity
> + * @id: ID of the reset to be deasserted
> + *
> + * This function implements the reset driver op to deassert a device's reset
> + * using the TI SCI protocol. This invokes the function ti_sci_reset_set()
> + * with the corresponding parameters as passed in, but with the @assert
> + * argument set to false for deasserting the reset.
> + *
> + * Return: 0 for successful request, else a corresponding error value
> + */
> +static int ti_sci_reset_deassert(struct reset_controller_dev *rcdev,
> + unsigned long id)
> +{
> + return ti_sci_reset_set(rcdev, id, false);
> +}
> +
> +/**
> + * ti_sci_reset_status() - check device reset status
> + * @rcdev: reset controller entity
> + * @id: ID of reset to be checked
> + *
> + * This function implements the reset driver op to return the status of a
> + * device's reset using the TI SCI protocol. The reset register value is read
> + * by invoking the TI SCI device opertation .get_device_resets(), and the
> + * status of the specific reset is extracted and returned using this reset's
> + * reset mask.
> + *
> + * Return: 0 if reset is deasserted, or a non-zero value if reset is asserted
> + */
> +static int ti_sci_reset_status(struct reset_controller_dev *rcdev,
> + unsigned long id)
> +{
> + struct ti_sci_reset_data *data = to_ti_sci_reset_data(rcdev);
> + const struct ti_sci_handle *sci = data->sci;
> + const struct ti_sci_dev_ops *dev_ops = &sci->ops.dev_ops;
> + struct ti_sci_reset_control *control;
> + u32 reset_state;
> + int ret;
> +
> + control = idr_find(&data->idr, id);
> + if (!control)
> + return -EINVAL;
> +
> + ret = dev_ops->get_device_resets(sci, control->dev_id,
> + &reset_state);
> + if (ret)
> + return ret;
> +
> + return reset_state & control->reset_mask;
> +}
> +
> +static struct reset_control_ops ti_sci_reset_ops = {
> + .assert = ti_sci_reset_assert,
> + .deassert = ti_sci_reset_deassert,
> + .status = ti_sci_reset_status,
> +};
> +
> +/**
> + * ti_sci_reset_of_xlate() - translate a set of OF arguments to a reset ID
> + * @rcdev: reset controller entity
> + * @reset_spec: OF reset argument specifier
> + *
> + * This function performs the translation of the reset argument specifier
> + * values defined in a reset consumer device node. The function allocates a
> + * reset control structure for that device reset, and will be used by the
> + * driver for performing any reset functions on that reset. An idr structure
> + * is allocated and used to map to the reset control structure. This idr
> + * is used by the driver to do reset lookups.
> + *
> + * Return: 0 for successful request, else a corresponding error value
> + */
> +static int ti_sci_reset_of_xlate(struct reset_controller_dev *rcdev,
> + const struct of_phandle_args *reset_spec)
> +{
> + struct ti_sci_reset_data *data = to_ti_sci_reset_data(rcdev);
> + struct ti_sci_reset_control *control;
> +
> + if (WARN_ON(reset_spec->args_count != rcdev->of_reset_n_cells))
> + return -EINVAL;
> +
> + control = devm_kzalloc(data->dev, sizeof(*control), GFP_KERNEL);
> + if (!control)
> + return -ENOMEM;
> +
> + control->dev_id = reset_spec->args[0];
> + control->reset_mask = reset_spec->args[1];
> +
> + return idr_alloc(&data->idr, control, 0, 0, GFP_KERNEL);
> +}
> +
> +static const struct of_device_id ti_sci_reset_of_match[] = {
> + { .compatible = "ti,sci-reset", },
> + { /* sentinel */ },
> +};
> +MODULE_DEVICE_TABLE(of, ti_sci_reset_of_match);
> +
> +static int ti_sci_reset_probe(struct platform_device *pdev)
> +{
> + struct ti_sci_reset_data *data;
> +
> + if (!pdev->dev.of_node)
> + return -ENODEV;
> +
> + data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
> + if (!data)
> + return -ENOMEM;
> +
> + data->sci = devm_ti_sci_get_handle(&pdev->dev);
> + if (IS_ERR(data->sci))
> + return PTR_ERR(data->sci);
> +
> + data->rcdev.ops = &ti_sci_reset_ops;
> + data->rcdev.owner = THIS_MODULE;
> + data->rcdev.of_node = pdev->dev.of_node;
> + data->rcdev.of_reset_n_cells = 2;
> + data->rcdev.of_xlate = ti_sci_reset_of_xlate;
> + data->dev = &pdev->dev;
> + idr_init(&data->idr);
> +
> + platform_set_drvdata(pdev, data);
> +
> + return reset_controller_register(&data->rcdev);
> +}
> +
> +static int ti_sci_reset_remove(struct platform_device *pdev)
> +{
> + struct ti_sci_reset_data *data = platform_get_drvdata(pdev);
> +
> + reset_controller_unregister(&data->rcdev);
> +
> + idr_destroy(&data->idr);
> +
> + return 0;
> +}
> +
> +static struct platform_driver ti_sci_reset_driver = {
> + .probe = ti_sci_reset_probe,
> + .remove = ti_sci_reset_remove,
> + .driver = {
> + .name = "ti-sci-reset",
> + .of_match_table = ti_sci_reset_of_match,
> + },
> +};
> +module_platform_driver(ti_sci_reset_driver);
> +
> +MODULE_AUTHOR("Andrew F. Davis <afd@ti.com>");
> +MODULE_DESCRIPTION("TI System Control Interface (TI SCI) Reset driver");
> +MODULE_LICENSE("GPL v2");
regards
Philipp
^ permalink raw reply
* [PATCH] drm/rockchip: analogix_dp: add supports for regulators in edp IP
From: Randy Li @ 2016-10-28 9:29 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <6d050f06-996f-5ecc-20f9-587299ee34c7@rock-chips.com>
On 10/28/2016 05:11 PM, Shawn Lin wrote:
> On 2016/10/23 3:18, Randy Li wrote:
>> I found if eDP_AVDD_1V0 and eDP_AVDD_1V8 are not been power at
>> RK3288, once trying to enable the pclk clock, the kernel would dead.
>> This patch would try to enable them first. The eDP_AVDD_1V8 more
>> likely to be applied to eDP phy, but I have no time to confirmed
>> it yet.
>
> Comfirm it or at least someone should be able to answer your
> question, Mark?
I just forget to ask the IC department, the TRM didn't cover that.
>
> Have you considered to add some details about vcc-supply and vccio-
> supply for your analogix_dp-rockchip.txt ?
>
> From your commit msg, these two properties are more likely to be
> required but the code itself tell me them should be optional(from the
> point of backward compatibility, it should also be optinoal).
Yes, I keep it optional for the same reason. Most of boards won't turn
off those power supply and may use some fixed regulators.
>
>>
>> Signed-off-by: Randy Li <ayaka@soulik.info>
>> ---
>> drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 25
>> +++++++++++++++++++++++++
>> 1 file changed, 25 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
>> b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
>> index 8548e82..6bf0441 100644
>> --- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
>> +++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
>> @@ -17,6 +17,7 @@
>> #include <linux/of_device.h>
>> #include <linux/of_graph.h>
>> #include <linux/regmap.h>
>> +#include <linux/regulator/consumer.h>
>> #include <linux/reset.h>
>> #include <linux/clk.h>
>>
>> @@ -70,6 +71,7 @@ struct rockchip_dp_device {
>> struct clk *grfclk;
>> struct regmap *grf;
>> struct reset_control *rst;
>> + struct regulator_bulk_data supplies[2];
>>
>> struct work_struct psr_work;
>> spinlock_t psr_lock;
>> @@ -146,6 +148,13 @@ static int rockchip_dp_poweron(struct
>> analogix_dp_plat_data *plat_data)
>>
>> cancel_work_sync(&dp->psr_work);
>>
>> + ret = regulator_bulk_enable(ARRAY_SIZE(dp->supplies),
>> + dp->supplies);
>> + if (ret) {
>> + dev_err(dp->dev, "failed to enable vdd supply %d\n", ret);
>> + return ret;
>> + }
>> +
>> ret = clk_prepare_enable(dp->pclk);
>> if (ret < 0) {
>> dev_err(dp->dev, "failed to enable pclk %d\n", ret);
>> @@ -168,6 +177,9 @@ static int rockchip_dp_powerdown(struct
>> analogix_dp_plat_data *plat_data)
>>
>> clk_disable_unprepare(dp->pclk);
>>
>> + regulator_bulk_disable(ARRAY_SIZE(dp->supplies),
>> + dp->supplies);
>> +
>> return 0;
>> }
>>
>> @@ -323,6 +335,19 @@ static int rockchip_dp_init(struct
>> rockchip_dp_device *dp)
>> return PTR_ERR(dp->rst);
>> }
>>
>> + dp->supplies[0].supply = "vcc";
>> + dp->supplies[1].supply = "vccio";
>> + ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(dp->supplies),
>> + dp->supplies);
>> + if (ret < 0) {
>> + dev_err(dev, "failed to get regulators: %d\n", ret);
>> + }
>> + ret = regulator_bulk_enable(ARRAY_SIZE(dp->supplies),
>> + dp->supplies);
>> + if (ret < 0) {
>> + dev_err(dev, "failed to enable regulators: %d\n", ret);
>> + }
>> +
>> ret = clk_prepare_enable(dp->pclk);
>> if (ret < 0) {
>> dev_err(dp->dev, "failed to enable pclk %d\n", ret);
>>
>
>
--
Randy Li
The third produce department
===========================================================================
This email message, including any attachments, is for the sole
use of the intended recipient(s) and may contain confidential and
privileged information. Any unauthorized review, use, disclosure or
distribution is prohibited. If you are not the intended recipient, please
contact the sender by reply e-mail and destroy all copies of the original
message. [Fuzhou Rockchip Electronics, INC. China mainland]
===========================================================================
^ permalink raw reply
* [PATCH v6] tty/serial: at91: fix hardware handshake on Atmel platforms
From: Richard Genoud @ 2016-10-28 9:26 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161027180229.5faqrvxa2a4pos7i@pengutronix.de>
2016-10-27 20:02 GMT+02:00 Uwe Kleine-K?nig <u.kleine-koenig@pengutronix.de>:
> Hello Richard,
>
> On Thu, Oct 27, 2016 at 06:04:06PM +0200, Richard Genoud wrote:
>> diff --git a/drivers/tty/serial/atmel_serial.c b/drivers/tty/serial/atmel_serial.c
>> index fd8aa1f4ba78..168b10cad47b 100644
>> --- a/drivers/tty/serial/atmel_serial.c
>> +++ b/drivers/tty/serial/atmel_serial.c
>> @@ -2132,11 +2132,29 @@ static void atmel_set_termios(struct uart_port *port, struct ktermios *termios,
>> mode |= ATMEL_US_USMODE_RS485;
>> } else if (termios->c_cflag & CRTSCTS) {
>> /* RS232 with hardware handshake (RTS/CTS) */
>> - if (atmel_use_dma_rx(port) && !atmel_use_fifo(port)) {
>> - dev_info(port->dev, "not enabling hardware flow control because DMA is used");
>> - termios->c_cflag &= ~CRTSCTS;
>> - } else {
>> + if (atmel_use_fifo(port) &&
>> + !mctrl_gpio_to_gpiod(atmel_port->gpios, UART_GPIO_CTS)) {
>> + /*
>> + * with ATMEL_US_USMODE_HWHS set, the controller will
>> + * be able to drive the RTS pin high/low when the RX
>> + * FIFO is above RXFTHRES/below RXFTHRES2.
>> + * It will also disable the transmitter when the CTS
>> + * pin is high.
>> + * This mode is not activated if CTS pin is a GPIO
>> + * because in this case, the transmitter is always
>> + * disabled (there must be an internal pull-up
>> + * responsible for this behaviour).
>> + * If the RTS pin is a GPIO, the controller won't be
>> + * able to drive it according to the FIFO thresholds,
>> + * but it will be handled by the driver.
>> + */
>> mode |= ATMEL_US_USMODE_HWHS;
>
> You use
>
> !mctrl_gpio_to_gpiod(atmel_port->gpios, UART_GPIO_CTS)
>
> as indicator that the cts mode of the respective pin is used. Is this
> reliable? (It's not if there are machines that don't use CTS, neither as
> gpio nor using the hardware function.) Maybe this needs a dt property to
> indicate that there is no (hw)handshaking available?
I used that to filter-out the case where CTS is a GPIO.
Now, for the machines that don't use CTS neither as GPIO nor using the
hardware function, it's a whole different story, beyond the scope of this patch.
And like you said, a DT property could be useful to handle this case.
( It's a little bit like if there was an RS232 cable with just TX/RX/GND, but
this will be way harder to detect :) )
Anyway, patches are welcome to handle that, but I don't think it belongs
in this one.
>> + } else {
>> + ...
>> }
>
> Best regards
> Uwe
>
regards,
Richard
^ permalink raw reply
* [GIT PULL] Rockchip dts64 fixes for 4.9-rc
From: Heiko Stuebner @ 2016-10-28 9:22 UTC (permalink / raw)
To: linux-arm-kernel
Hi Arnd, Kevin, Olof,
please find below two fixes for 64bit Rockchip boards. One makes
binds/unbinds fail and the other drops one unnecessary property.
Please pull.
Thanks
Heiko
The following changes since commit 1001354ca34179f3db924eb66672442a173147dc:
Linux 4.9-rc1 (2016-10-15 12:17:50 -0700)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip.git tags/v4.9-rockchip-dts64-fixes1
for you to fetch changes up to 7c6273194445fe1316084d3096f9311c3dfa4da6:
arm64: dts: rockchip: remove the abuse of keep-power-in-suspend (2016-10-18 20:03:54 +0200)
----------------------------------------------------------------
Correct regulator handling on Rockchip arm64 boards to make
bind/unbind calls work correctly and remove a sdio-only
property from non-sdio mmc hosts, that accidentially was
added there.
----------------------------------------------------------------
Shawn Lin (2):
arm64: dts: rockchip: remove always-on and boot-on from vcc_sd
arm64: dts: rockchip: remove the abuse of keep-power-in-suspend
arch/arm64/boot/dts/rockchip/rk3368-geekbox.dts | 3 ---
arch/arm64/boot/dts/rockchip/rk3368-orion-r68-meta.dts | 4 ----
2 files changed, 7 deletions(-)
^ permalink raw reply
* [PATCH] arm64: mm: Fix memmap to be initialized for the entire section
From: Robert Richter @ 2016-10-28 9:19 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161027160136.GD24290@arm.com>
On 27.10.16 17:01:36, Will Deacon wrote:
> Hi Robert,
>
> On Mon, Oct 17, 2016 at 08:58:01PM +0200, Robert Richter wrote:
> > Mark, Will, any opinion here?
>
> Having looking at this, I'm inclined to agree with you; pfn_valid() is
> all about whether the underlying mem_map (struct page *) entry exists,
> not about whether the page is mappable or not.
>
> That said, setting the zone for pages representing NOMAP memory feels
> like a slippery slope to losing information about them being NOMAP in
> the first place and the whole problem getting out-of-hand. Whilst I'm
> happy for pfn_valid() to return true (in the sense that we're within
> bounds of mem_map etc), I'm less happy that we're also saying that the
> struct page contains useful information, such as the zone and the node
> information, which is then subsequently used by the NUMA code.
Let's see it in a different way, pfns and the struct page assigned to
each of it is about *physical* memory. The system knows all the
memory, some is free, some reserved and some marked NOMAP. Regardless
of the mapping of the page the mm code maintains and uses that
information.
There are assumptions on validity and checks in the code that now
cause problems due to partly or non-existing data about nomap pages.
This inconsistency is dangerous since a problem may occur any time
then the page area is accessed first, thus a system may crash randomly
depending on the memory access. Luckily, in my case it triggered
reproducible while loading initrd during boot.
I also think that this is not only NUMA related. E.g. the following
bug report is probably also related:
https://bugzilla.redhat.com/show_bug.cgi?id=1387793
> On top of that, pfn_valid is used in other places as a coarse "is this
> memory?" check, and will cause things like ioremap to fail whereas it
> wouldn't at the moment.
IMO this is a misuse of pfn_valid() that needs to be fixed with
additional checks, e.g. traversing memblocks.
> It feels to me like NOMAP memory is a new type
> of memory where there *is* a struct page, but it shouldn't be used for
> anything.
IMO, a NOMAP page should just be handled like a reserved page except
that the page is marked reserved. See free_low_memory_core_early().
Thus, NOMAP pages are not in the free pages list or set to reserved.
It is simply not available for mapping at all. Isn't that exactly what
it should be?
I also did not yet understand the benefit of the differentiation
between NOMAP and reserved and the original motivation for its
implementation. I looked through the mail threads but could not find
any hint. The only difference I see now is that it is not listed as a
reserved page, but as long as it is not freed it should behave the
same. I remember the case to handle memory different (coherency,
etc.), but are not sure here. Ard, could you explain this?
> I don't think pfn_valid can describe that, given the way it's
> currently used, and flipping the logic is just likely to move the problem
> elsewhere.
>
> What options do we have for fixing this in the NUMA code?
Out of my mind:
1) Treat NOMAP pages same as reserved pages (my patch).
2) Change mm code to allow arch specific early_pfn_valid().
3) Fix mm code to only access stuct page (of a zone) if pfn_valid() is
true.
There can be more alternatives. IMO:
* We shouldn't touch generic mm code.
* We should maintain a valid struct page for all pages in a sections.
* We should only traverse memblock where really necessary (arm64
only).
* I don't think this problem is numa specific.
-Robert
^ permalink raw reply
* [PATCH 1/1] ARM: dts: imx6ul-14x14-evk: add USB dual-role support
From: Peter Chen @ 2016-10-28 9:17 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1470128903-942-1-git-send-email-peter.chen@nxp.com>
On Tue, Aug 2, 2016 at 5:08 PM, Peter Chen <peter.chen@nxp.com> wrote:
> With commit 851ce932242d ("usb: chipidea: otg: don't wait vbus
> drops below BSV when starts host"), the driver can support
> enabling vbus output without software control, so this board
> (control vbus output through ID pin) can support dual-role now.
>
> Signed-off-by: Peter Chen <peter.chen@nxp.com>
> ---
> arch/arm/boot/dts/imx6ul-14x14-evk.dts | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm/boot/dts/imx6ul-14x14-evk.dts b/arch/arm/boot/dts/imx6ul-14x14-evk.dts
> index e281d50..c5cf942 100644
> --- a/arch/arm/boot/dts/imx6ul-14x14-evk.dts
> +++ b/arch/arm/boot/dts/imx6ul-14x14-evk.dts
> @@ -225,7 +225,7 @@
> };
>
> &usbotg1 {
> - dr_mode = "peripheral";
> + dr_mode = "otg";
> status = "okay";
> };
>
Ping....
Peter
^ permalink raw reply
* [PATCH] drm/rockchip: analogix_dp: add supports for regulators in edp IP
From: Shawn Lin @ 2016-10-28 9:11 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1477163933-13140-1-git-send-email-ayaka@soulik.info>
On 2016/10/23 3:18, Randy Li wrote:
> I found if eDP_AVDD_1V0 and eDP_AVDD_1V8 are not been power at
> RK3288, once trying to enable the pclk clock, the kernel would dead.
> This patch would try to enable them first. The eDP_AVDD_1V8 more
> likely to be applied to eDP phy, but I have no time to confirmed
> it yet.
Comfirm it or at least someone should be able to answer your
question, Mark?
Have you considered to add some details about vcc-supply and vccio-
supply for your analogix_dp-rockchip.txt ?
From your commit msg, these two properties are more likely to be
required but the code itself tell me them should be optional(from the
point of backward compatibility, it should also be optinoal).
>
> Signed-off-by: Randy Li <ayaka@soulik.info>
> ---
> drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 25 +++++++++++++++++++++++++
> 1 file changed, 25 insertions(+)
>
> diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
> index 8548e82..6bf0441 100644
> --- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
> +++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
> @@ -17,6 +17,7 @@
> #include <linux/of_device.h>
> #include <linux/of_graph.h>
> #include <linux/regmap.h>
> +#include <linux/regulator/consumer.h>
> #include <linux/reset.h>
> #include <linux/clk.h>
>
> @@ -70,6 +71,7 @@ struct rockchip_dp_device {
> struct clk *grfclk;
> struct regmap *grf;
> struct reset_control *rst;
> + struct regulator_bulk_data supplies[2];
>
> struct work_struct psr_work;
> spinlock_t psr_lock;
> @@ -146,6 +148,13 @@ static int rockchip_dp_poweron(struct analogix_dp_plat_data *plat_data)
>
> cancel_work_sync(&dp->psr_work);
>
> + ret = regulator_bulk_enable(ARRAY_SIZE(dp->supplies),
> + dp->supplies);
> + if (ret) {
> + dev_err(dp->dev, "failed to enable vdd supply %d\n", ret);
> + return ret;
> + }
> +
> ret = clk_prepare_enable(dp->pclk);
> if (ret < 0) {
> dev_err(dp->dev, "failed to enable pclk %d\n", ret);
> @@ -168,6 +177,9 @@ static int rockchip_dp_powerdown(struct analogix_dp_plat_data *plat_data)
>
> clk_disable_unprepare(dp->pclk);
>
> + regulator_bulk_disable(ARRAY_SIZE(dp->supplies),
> + dp->supplies);
> +
> return 0;
> }
>
> @@ -323,6 +335,19 @@ static int rockchip_dp_init(struct rockchip_dp_device *dp)
> return PTR_ERR(dp->rst);
> }
>
> + dp->supplies[0].supply = "vcc";
> + dp->supplies[1].supply = "vccio";
> + ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(dp->supplies),
> + dp->supplies);
> + if (ret < 0) {
> + dev_err(dev, "failed to get regulators: %d\n", ret);
> + }
> + ret = regulator_bulk_enable(ARRAY_SIZE(dp->supplies),
> + dp->supplies);
> + if (ret < 0) {
> + dev_err(dev, "failed to enable regulators: %d\n", ret);
> + }
> +
> ret = clk_prepare_enable(dp->pclk);
> if (ret < 0) {
> dev_err(dp->dev, "failed to enable pclk %d\n", ret);
>
--
Best Regards
Shawn Lin
^ permalink raw reply
* [PATCH 4/5] ARM: davinci: enable LEDs default-on trigger in default config
From: Sekhar Nori @ 2016-10-28 9:03 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <be478f0a-bd10-7241-7e9d-20dfc1beaa30@lechnology.com>
On Thursday 27 October 2016 09:19 PM, David Lechner wrote:
> Yes, module is OK here.
Here is the patch I pushed to v4.10/defconfig.
Thanks,
Sekhar
---8<---
From: David Lechner <david@lechnology.com>
Date: Fri, 21 Oct 2016 13:36:56 -0500
Subject: [PATCH] ARM: davinci_all_defconfig: enable LED default-on trigger
The LEDs default-on trigger is nice to have. For example, it can be used
to configure a LED as a power indicator.
Signed-off-by: David Lechner <david@lechnology.com>
[nsekhar at ti.com: build as module, subject line fixes]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
---
arch/arm/configs/davinci_all_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/davinci_all_defconfig b/arch/arm/configs/davinci_all_defconfig
index 513978eaf03d..b5e978ff177f 100644
--- a/arch/arm/configs/davinci_all_defconfig
+++ b/arch/arm/configs/davinci_all_defconfig
@@ -180,6 +180,7 @@ CONFIG_LEDS_GPIO=m
CONFIG_LEDS_TRIGGERS=y
CONFIG_LEDS_TRIGGER_TIMER=m
CONFIG_LEDS_TRIGGER_HEARTBEAT=m
+CONFIG_LEDS_TRIGGER_DEFAULT_ON=m
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_OMAP=m
CONFIG_DMADEVICES=y
--
2.9.0
^ permalink raw reply related
* [PATCH] KVM: arm/arm64: Kick VCPUs when queueing already pending IRQs
From: Christoffer Dall @ 2016-10-28 8:35 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1477580893-3479-1-git-send-email-shihwei@cs.columbia.edu>
On Thu, Oct 27, 2016 at 03:08:13PM +0000, Shih-Wei Li wrote:
> In cases like IPI, we could be queueing an interrupt for a VCPU
> that is already running and is not about to exit, because the
> VCPU has entered the VM with the interrupt pending and would
> not trap on EOI'ing that interrupt. This could result to delays
> in interrupt deliveries or even loss of interrupts.
> To guarantee prompt interrupt injection, here we have to try to
> kick the VCPU.
>
> Signed-off-by: Shih-Wei Li <shihwei@cs.columbia.edu>
> ---
>
> I've tested the code with an IPI test built on kvm-unit-test, which
> measures the cycles spent between one VCPU sending IPI to a target
> VCPU that busy loops in the VM, until the target VCPU ACKs and EOIs
> the IPI. The patch here can improve the performance in such case by
> more than 5000 cycles.
>
> virt/kvm/arm/vgic/vgic.c | 11 +++++++++++
> 1 file changed, 11 insertions(+)
>
> diff --git a/virt/kvm/arm/vgic/vgic.c b/virt/kvm/arm/vgic/vgic.c
> index b419a11..07cf239 100644
> --- a/virt/kvm/arm/vgic/vgic.c
> +++ b/virt/kvm/arm/vgic/vgic.c
> @@ -273,6 +273,17 @@ retry:
> * no more work for us to do.
> */
> spin_unlock(&irq->irq_lock);
> +
> + /*
> + * If the VCPU is not NULL, we could be queueing an
> + * edge-triggered interrupt for a VCPU which is already
> + * running and is not about to exit, because the VCPU has
> + * entered the VM with the interrupt pending and it wouldn't
> + * trap on EOI. To ensure prompt delivery of that interrupt,
> + * we have to try to kick the VCPU.
> + */
Perhaps the following comment is a better description:
/*
* We have to kick the VCPU here, because we could be queueing
* an edge-triggered interrupt for which we get no EOI
* maintenance interrupt. In that case, while the IRQ is
* already on the VCPU's AP list, the VCPU could have EOI'ed the
* original interrupt and won't see this one until it exits for
* some other reason.
*/
> + if (vcpu)
> + kvm_vcpu_kick(vcpu);
> return false;
> }
>
Otherwise:
Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
^ permalink raw reply
* [PATCH] drm/mediatek: fix null pointer dereference
From: CK Hu @ 2016-10-28 8:34 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161026140904.26798-1-matthias.bgg@gmail.com>
Hi, Matthias:
Even though OVL HW would not be enabled before component_add() in
current design, your patch would be safe for any situation.
Acked-by CK Hu <ck.hu@mediatek.com>
Regards,
CK
On Wed, 2016-10-26 at 16:09 +0200, Matthias Brugger wrote:
> The probe function requests the interrupt before initializing
> the ddp component. Which leads to a null pointer dereference at boot.
> Fix this by requesting the interrput after all components got
> initialized properly.
>
> Fixes: 119f5173628a ("drm/mediatek: Add DRM Driver for Mediatek SoC
> MT8173.")
> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
> ---
> drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 14 +++++++-------
> 1 file changed, 7 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> index 019b7ca..1e78159 100644
> --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> @@ -250,13 +250,6 @@ static int mtk_disp_ovl_probe(struct platform_device *pdev)
> if (irq < 0)
> return irq;
>
> - ret = devm_request_irq(dev, irq, mtk_disp_ovl_irq_handler,
> - IRQF_TRIGGER_NONE, dev_name(dev), priv);
> - if (ret < 0) {
> - dev_err(dev, "Failed to request irq %d: %d\n", irq, ret);
> - return ret;
> - }
> -
> comp_id = mtk_ddp_comp_get_id(dev->of_node, MTK_DISP_OVL);
> if (comp_id < 0) {
> dev_err(dev, "Failed to identify by alias: %d\n", comp_id);
> @@ -272,6 +265,13 @@ static int mtk_disp_ovl_probe(struct platform_device *pdev)
>
> platform_set_drvdata(pdev, priv);
>
> + ret = devm_request_irq(dev, irq, mtk_disp_ovl_irq_handler,
> + IRQF_TRIGGER_NONE, dev_name(dev), priv);
> + if (ret < 0) {
> + dev_err(dev, "Failed to request irq %d: %d\n", irq, ret);
> + return ret;
> + }
> +
> ret = component_add(dev, &mtk_disp_ovl_component_ops);
> if (ret)
> dev_err(dev, "Failed to add component: %d\n", ret);
^ permalink raw reply
* [PATCH v6 4/5] ARM: DTS: da850: Add cfgchip syscon node
From: Sekhar Nori @ 2016-10-28 8:21 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <b9bfc4aa-ef52-53c4-dc7e-c0bc1c5969fb@lechnology.com>
On Wednesday 26 October 2016 09:38 PM, David Lechner wrote:
> On 10/25/2016 10:06 PM, David Lechner wrote:
>> Add a syscon node for the SoC CFGCHIPn registers. This is needed for
>> the new usb phy driver.
>>
>> Signed-off-by: David Lechner <david@lechnology.com>
>> ---
>> arch/arm/boot/dts/da850.dtsi | 4 ++++
>> 1 file changed, 4 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/da850.dtsi b/arch/arm/boot/dts/da850.dtsi
>> index f79e1b9..6bbf20d 100644
>> --- a/arch/arm/boot/dts/da850.dtsi
>> +++ b/arch/arm/boot/dts/da850.dtsi
>> @@ -188,6 +188,10 @@
>> };
>>
>> };
>> + cfgchip: cfgchip at 1417c {
>
> I wonder if there is a more generic name instead of cfgchip at . Is there a
> preferred generic name for syscon nodes?
I did not find anything in ePAPR, but chip-controller might be more
appropriate.
>
>> + compatible = "ti,da830-cfgchip", "syscon";
Looks like we need "simple-mfd" too in the compatible list?
I think we can also fold patch 5/5 into this patch and add the cfgchip
along with USB phy child node included.
If you respin the patch, I can drop 4/5 and 5/5 that I have queued and
included the updated patch instead.
Thanks,
Sekhar
^ permalink raw reply
* [PATCH v2] ASoC: hdmi-codec: Fix hdmi_of_xlate_dai_name when #sound-dai-cells = <0>
From: Jon Medhurst (Tixy) @ 2016-10-28 8:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161027141956.GL25322@sirena.org.uk>
If a DAI specifies "#sound-dai-cells = <0>" in device-tree then
hdmi_of_xlate_dai_name() will be called with zero args, which it isn't
implemented to cope with. The resulting use of an uninitialised variable
for the id will usually result in an error like:
asoc-simple-card sound: parse error -11
asoc-simple-card: probe of sound failed with error -11
Fix this by using and id of zero if no arg is provided.
Fixes: 9731f82d6016 ("ASoC: hdmi-codec: enable multi probe for same device")
Signed-off-by: Jon Medhurst <tixy@linaro.org>
---
Changes since v1
- Replace ternary ?: operator with if/else
sound/soc/codecs/hdmi-codec.c | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/sound/soc/codecs/hdmi-codec.c b/sound/soc/codecs/hdmi-codec.c
index b904492..90b5948 100644
--- a/sound/soc/codecs/hdmi-codec.c
+++ b/sound/soc/codecs/hdmi-codec.c
@@ -364,7 +364,12 @@ static int hdmi_of_xlate_dai_name(struct snd_soc_component *component,
struct of_phandle_args *args,
const char **dai_name)
{
- int id = args->args[0];
+ int id;
+
+ if (args->args_count)
+ id = args->args[0];
+ else
+ id = 0;
if (id < ARRAY_SIZE(hdmi_dai_name)) {
*dai_name = hdmi_dai_name[id];
--
2.1.4
^ permalink raw reply related
* [PATCH v3] char: hw_random: atmel-rng: disable TRNG during suspend
From: Wenyou Yang @ 2016-10-28 8:00 UTC (permalink / raw)
To: linux-arm-kernel
To fix the over consumption on the VDDCore due to the TRNG enabled,
disable the TRNG during suspend, not only disable the user interface
clock (which is controlled by PMC). Because the user interface clock
is independent from any clock that may be used in the entropy source
logic circuitry.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
---
Changes in v3:
- Add Acked-by tag.
Changes in v2:
- Enable the user interface first, then enable the internal clock
when resume.
drivers/char/hw_random/atmel-rng.c | 24 +++++++++++++++++++++---
1 file changed, 21 insertions(+), 3 deletions(-)
diff --git a/drivers/char/hw_random/atmel-rng.c b/drivers/char/hw_random/atmel-rng.c
index 0fcc9e6..ae7cae5 100644
--- a/drivers/char/hw_random/atmel-rng.c
+++ b/drivers/char/hw_random/atmel-rng.c
@@ -48,6 +48,16 @@ static int atmel_trng_read(struct hwrng *rng, void *buf, size_t max,
return 0;
}
+static void atmel_trng_enable(struct atmel_trng *trng)
+{
+ writel(TRNG_KEY | 1, trng->base + TRNG_CR);
+}
+
+static void atmel_trng_disable(struct atmel_trng *trng)
+{
+ writel(TRNG_KEY, trng->base + TRNG_CR);
+}
+
static int atmel_trng_probe(struct platform_device *pdev)
{
struct atmel_trng *trng;
@@ -71,7 +81,7 @@ static int atmel_trng_probe(struct platform_device *pdev)
if (ret)
return ret;
- writel(TRNG_KEY | 1, trng->base + TRNG_CR);
+ atmel_trng_enable(trng);
trng->rng.name = pdev->name;
trng->rng.read = atmel_trng_read;
@@ -94,7 +104,7 @@ static int atmel_trng_remove(struct platform_device *pdev)
hwrng_unregister(&trng->rng);
- writel(TRNG_KEY, trng->base + TRNG_CR);
+ atmel_trng_disable(trng);
clk_disable_unprepare(trng->clk);
return 0;
@@ -105,6 +115,7 @@ static int atmel_trng_suspend(struct device *dev)
{
struct atmel_trng *trng = dev_get_drvdata(dev);
+ atmel_trng_disable(trng);
clk_disable_unprepare(trng->clk);
return 0;
@@ -113,8 +124,15 @@ static int atmel_trng_suspend(struct device *dev)
static int atmel_trng_resume(struct device *dev)
{
struct atmel_trng *trng = dev_get_drvdata(dev);
+ int ret;
+
+ ret = clk_prepare_enable(trng->clk);
+ if (ret)
+ return ret;
- return clk_prepare_enable(trng->clk);
+ atmel_trng_enable(trng);
+
+ return 0;
}
static const struct dev_pm_ops atmel_trng_pm_ops = {
--
2.7.4
^ permalink raw reply related
* [PATCH] pinctrl: at91: add support for OUTPUT config
From: Wenyou Yang @ 2016-10-28 7:54 UTC (permalink / raw)
To: linux-arm-kernel
From: Boris BREZILLON <b.brezillon@overkiz.com>
Add support for pin output control through the pinctrl config:
- support enabling/disabling output on a given pin
- support output level setting (high or low)
Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
---
.../bindings/pinctrl/atmel,at91-pinctrl.txt | 2 ++
drivers/pinctrl/pinctrl-at91.c | 21 +++++++++++++++++++++
include/dt-bindings/pinctrl/at91.h | 2 ++
3 files changed, 25 insertions(+)
diff --git a/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt
index b7a93e8..9a8a45d 100644
--- a/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt
@@ -98,6 +98,8 @@ DRIVE_STRENGTH (3 << 5): indicate the drive strength of the pin using the
01 - Low
10 - Medium
11 - High
+OUTPUT (1 << 7): indicate this pin need to be configured as an output.
+OUTPUT_VAL (1 << 8): output val (1 = high, 0 = low)
DEBOUNCE (1 << 16): indicate this pin needs debounce.
DEBOUNCE_VAL (0x3fff << 17): debounce value.
diff --git a/drivers/pinctrl/pinctrl-at91.c b/drivers/pinctrl/pinctrl-at91.c
index 9f09041..569bc28 100644
--- a/drivers/pinctrl/pinctrl-at91.c
+++ b/drivers/pinctrl/pinctrl-at91.c
@@ -56,6 +56,9 @@ static int gpio_banks;
#define DRIVE_STRENGTH_SHIFT 5
#define DRIVE_STRENGTH_MASK 0x3
#define DRIVE_STRENGTH (DRIVE_STRENGTH_MASK << DRIVE_STRENGTH_SHIFT)
+#define OUTPUT (1 << 7)
+#define OUTPUT_VAL_SHIFT 8
+#define OUTPUT_VAL (0x1 << OUTPUT_VAL_SHIFT)
#define DEBOUNCE (1 << 16)
#define DEBOUNCE_VAL_SHIFT 17
#define DEBOUNCE_VAL (0x3fff << DEBOUNCE_VAL_SHIFT)
@@ -375,6 +378,19 @@ static void at91_mux_set_pullup(void __iomem *pio, unsigned mask, bool on)
writel_relaxed(mask, pio + (on ? PIO_PUER : PIO_PUDR));
}
+static bool at91_mux_get_output(void __iomem *pio, unsigned int pin, bool *val)
+{
+ *val = (readl_relaxed(pio + PIO_ODSR) >> pin) & 0x1;
+ return (readl_relaxed(pio + PIO_OSR) >> pin) & 0x1;
+}
+
+static void at91_mux_set_output(void __iomem *pio, unsigned int mask,
+ bool is_on, bool val)
+{
+ writel_relaxed(mask, pio + (val ? PIO_SODR : PIO_CODR));
+ writel_relaxed(mask, pio + (is_on ? PIO_OER : PIO_ODR));
+}
+
static unsigned at91_mux_get_multidrive(void __iomem *pio, unsigned pin)
{
return (readl_relaxed(pio + PIO_MDSR) >> pin) & 0x1;
@@ -848,6 +864,7 @@ static int at91_pinconf_get(struct pinctrl_dev *pctldev,
void __iomem *pio;
unsigned pin;
int div;
+ bool out;
*config = 0;
dev_dbg(info->dev, "%s:%d, pin_id=%d", __func__, __LINE__, pin_id);
@@ -875,6 +892,8 @@ static int at91_pinconf_get(struct pinctrl_dev *pctldev,
if (info->ops->get_drivestrength)
*config |= (info->ops->get_drivestrength(pio, pin)
<< DRIVE_STRENGTH_SHIFT);
+ if (at91_mux_get_output(pio, pin, &out))
+ *config |= OUTPUT | (out << OUTPUT_VAL_SHIFT);
return 0;
}
@@ -907,6 +926,8 @@ static int at91_pinconf_set(struct pinctrl_dev *pctldev,
if (config & PULL_UP && config & PULL_DOWN)
return -EINVAL;
+ at91_mux_set_output(pio, mask, config & OUTPUT,
+ (config & OUTPUT_VAL) >> OUTPUT_VAL_SHIFT);
at91_mux_set_pullup(pio, mask, config & PULL_UP);
at91_mux_set_multidrive(pio, mask, config & MULTI_DRIVE);
if (info->ops->set_deglitch)
diff --git a/include/dt-bindings/pinctrl/at91.h b/include/dt-bindings/pinctrl/at91.h
index bbca3d0..2732d6c 100644
--- a/include/dt-bindings/pinctrl/at91.h
+++ b/include/dt-bindings/pinctrl/at91.h
@@ -15,6 +15,8 @@
#define AT91_PINCTRL_DEGLITCH (1 << 2)
#define AT91_PINCTRL_PULL_DOWN (1 << 3)
#define AT91_PINCTRL_DIS_SCHMIT (1 << 4)
+#define AT91_PINCTRL_OUTPUT (1 << 7)
+#define AT91_PINCTRL_OUTPUT_VAL(x) ((x & 0x1) << 8)
#define AT91_PINCTRL_DEBOUNCE (1 << 16)
#define AT91_PINCTRL_DEBOUNCE_VAL(x) (x << 17)
--
2.7.4
^ permalink raw reply related
* [PATCH next 1/2] media: mtk-mdp: fix video_device_release argument
From: Vincent Stehlé @ 2016-10-28 7:52 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161027202325.20680-1-vincent.stehle@laposte.net>
On Thu, Oct 27, 2016 at 10:23:24PM +0200, Vincent Stehl? wrote:
> video_device_release() takes a pointer to struct video_device as argument.
> Fix two call sites where the address of the pointer is passed instead.
Sorry, I messed up: please ignore that "fix". The 0day robot made me
realize this is indeed not a proper fix.
The issue remains, though: we cannot call video_device_release() on the
vdev structure member, as this will in turn call kfree(). Most probably,
vdev needs to be dynamically allocated, or the call to
video_device_release() dropped completely.
Sorry for the bad patch.
Best regards,
Vincent.
^ permalink raw reply
* [RFC][PATCH] arm64: Add support for CONFIG_DEBUG_VIRTUAL
From: Ard Biesheuvel @ 2016-10-28 7:52 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1477613892-26076-1-git-send-email-labbott@redhat.com>
Hi Laura,
On 28 October 2016 at 01:18, Laura Abbott <labbott@redhat.com> wrote:
> x86 has an option CONFIG_DEBUG_VIRTUAL to do additional checks
> on virt_to_phys calls. The goal is to catch users who are calling
> virt_to_phys on non-linear addresses immediately. As features
> such as CONFIG_VMAP_STACK get enabled for arm64, this becomes
> increasingly important. Add checks to catch bad virt_to_phys
> usage.
>
I think this is a useful thing to have. However, the Kconfig
description talks about virt to page translations, not virt to phys.
Of course, this is a shift away from being equivalent on x86, but not
so much on arm64. Any concerns there?
> Signed-off-by: Laura Abbott <labbott@redhat.com>
> ---
> This has been on my TODO list for a while. It caught a few bugs with
> CONFIG_VMAP_STACK on x86 so when that eventually gets added
> for arm64 it will be useful to have. This caught one driver calling __pa on an
> ioremapped address already. RFC for a couple of reasons:
>
> 1) This is basically a direct port of the x86 approach.
> 2) I needed some #ifndef __ASSEMBLY__ which I don't like to throw around.
> 3) I'm not quite sure about the bounds check for the VIRTUAL_BUG_ON with KASLR,
> specifically the _end check.
> 4) Is it worth actually keeping this as DEBUG_VIRTUAL vs. folding it into
> another option?
>
> ---
> arch/arm64/include/asm/memory.h | 11 ++++++++++-
> arch/arm64/mm/Makefile | 2 +-
> arch/arm64/mm/physaddr.c | 17 +++++++++++++++++
> lib/Kconfig.debug | 2 +-
> mm/cma.c | 2 +-
> 5 files changed, 30 insertions(+), 4 deletions(-)
> create mode 100644 arch/arm64/mm/physaddr.c
>
> diff --git a/arch/arm64/include/asm/memory.h b/arch/arm64/include/asm/memory.h
> index ba62df8..9805adc 100644
> --- a/arch/arm64/include/asm/memory.h
> +++ b/arch/arm64/include/asm/memory.h
> @@ -106,11 +106,19 @@
> * private definitions which should NOT be used outside memory.h
> * files. Use virt_to_phys/phys_to_virt/__pa/__va instead.
> */
> -#define __virt_to_phys(x) ({ \
> +#define __virt_to_phys_nodebug(x) ({ \
> phys_addr_t __x = (phys_addr_t)(x); \
> __x & BIT(VA_BITS - 1) ? (__x & ~PAGE_OFFSET) + PHYS_OFFSET : \
> (__x - kimage_voffset); })
>
> +#ifdef CONFIG_DEBUG_VIRTUAL
> +#ifndef __ASSEMBLY__
> +extern unsigned long __virt_to_phys(unsigned long x);
> +#endif
> +#else
> +#define __virt_to_phys(x) __virt_to_phys_nodebug(x)
> +#endif
> +
Couldn't you move this whole block into the #ifndef __ASSEMBLY__
section lower down in the file?
> #define __phys_to_virt(x) ((unsigned long)((x) - PHYS_OFFSET) | PAGE_OFFSET)
> #define __phys_to_kimg(x) ((unsigned long)((x) + kimage_voffset))
>
> @@ -202,6 +210,7 @@ static inline void *phys_to_virt(phys_addr_t x)
> * Drivers should NOT use these either.
> */
> #define __pa(x) __virt_to_phys((unsigned long)(x))
> +#define __pa_nodebug(x) __virt_to_phys_nodebug((unsigned long)(x))
> #define __va(x) ((void *)__phys_to_virt((phys_addr_t)(x)))
> #define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT)
> #define virt_to_pfn(x) __phys_to_pfn(__virt_to_phys(x))
> diff --git a/arch/arm64/mm/Makefile b/arch/arm64/mm/Makefile
> index 54bb209..bcea84e 100644
> --- a/arch/arm64/mm/Makefile
> +++ b/arch/arm64/mm/Makefile
> @@ -5,6 +5,6 @@ obj-y := dma-mapping.o extable.o fault.o init.o \
> obj-$(CONFIG_HUGETLB_PAGE) += hugetlbpage.o
> obj-$(CONFIG_ARM64_PTDUMP) += dump.o
> obj-$(CONFIG_NUMA) += numa.o
> -
> +obj-$(CONFIG_DEBUG_VIRTUAL) += physaddr.o
> obj-$(CONFIG_KASAN) += kasan_init.o
> KASAN_SANITIZE_kasan_init.o := n
> diff --git a/arch/arm64/mm/physaddr.c b/arch/arm64/mm/physaddr.c
> new file mode 100644
> index 0000000..6c271e2
> --- /dev/null
> +++ b/arch/arm64/mm/physaddr.c
> @@ -0,0 +1,17 @@
> +#include <linux/mm.h>
> +
> +#include <asm/memory.h>
> +
> +unsigned long __virt_to_phys(unsigned long x)
> +{
> + phys_addr_t __x = (phys_addr_t)x;
> +
> + if (__x & BIT(VA_BITS - 1)) {
> + /* The bit check ensures this is the right range */
Could you expand the comment to clarify that the linear region starts
right in the middle of the kernel virtual address space, and so we
only have to test the top bit?
> + return (__x & ~PAGE_OFFSET) + PHYS_OFFSET;
> + } else {l
> + VIRTUAL_BUG_ON(x < kimage_vaddr || x > (unsigned long)_end);
This looks fine. References to _end are relocated at boot to refer to
the actual runtime offset.
> + return (__x - kimage_voffset);
> + }
> +}
> +EXPORT_SYMBOL(__virt_to_phys);
> diff --git a/lib/Kconfig.debug b/lib/Kconfig.debug
> index 33bc56c..e5634bb 100644
> --- a/lib/Kconfig.debug
> +++ b/lib/Kconfig.debug
> @@ -604,7 +604,7 @@ config DEBUG_VM_PGFLAGS
>
> config DEBUG_VIRTUAL
> bool "Debug VM translations"
> - depends on DEBUG_KERNEL && X86
> + depends on DEBUG_KERNEL && (X86 || ARM64)
> help
> Enable some costly sanity checks in virtual to page code. This can
> catch mistakes with virt_to_page() and friends.
> diff --git a/mm/cma.c b/mm/cma.c
> index 384c2cb..2345803 100644
> --- a/mm/cma.c
> +++ b/mm/cma.c
> @@ -235,7 +235,7 @@ int __init cma_declare_contiguous(phys_addr_t base,
> phys_addr_t highmem_start;
> int ret = 0;
>
> -#ifdef CONFIG_X86
> +#if defined(CONFIG_X86) || defined(CONFIG_ARM64)
> /*
> * high_memory isn't direct mapped memory so retrieving its physical
> * address isn't appropriate. But it would be useful to check the
> --
> 2.7.4
>
^ permalink raw reply
* [PATCHv4 11/15] clk: ti: clockdomain: add clock provider support to clockdomains
From: Tero Kristo @ 2016-10-28 7:41 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161028005047.GQ26139@codeaurora.org>
On 28/10/16 03:50, Stephen Boyd wrote:
> On 10/18, Tero Kristo wrote:
>> Clockdomains can now be used as clock providers in the system. This
>> patch initializes the provider data during init, and parses the clocks
>> while they are being registered. An xlate function for the provider
>> is also given.
>>
>> Signed-off-by: Tero Kristo <t-kristo@ti.com>
>
> Please Cc dt reviewers on binding updates.
Sorry about missing that...
> I suppose a PRCM is
> like an MFD that has clocks and resets under it? On other
> platforms we've combined that all into one node and just had
> #clock-cells and #reset-cells in that node. Is there any reason
> we can't do that here?
For OMAPs, there are typically multiple instances of the PRCM around;
OMAP4 for example has:
cm1 @ 0x4a004000 (clocks + clockdomains)
cm2 @ 0x4a008000 (clocks + clockdomains)
prm @ 0x4a306000 (few clocks + resets + power state handling)
scrm @ 0x4a30a000 (few external clocks + plenty of misc stuff)
These instances are also under different power/voltage domains which
means their PM behavior is different.
The idea behind having a clockdomain as a provider was mostly to have
the topology visible : prcm-instance -> clockdomain -> clocks
... but basically I think it would be possible to drop the clockdomain
representation and just mark the prcm-instance as a clock provider.
Tony, any thoughts on that?
>
>> ---
>> .../devicetree/bindings/arm/omap/prcm.txt | 13 ++
>> .../devicetree/bindings/clock/ti/clockdomain.txt | 12 +-
>> arch/arm/mach-omap2/io.c | 2 +
>> drivers/clk/ti/clock.h | 1 +
>> drivers/clk/ti/clockdomain.c | 147 +++++++++++++++++++++
>> include/linux/clk/ti.h | 3 +
>> 6 files changed, 177 insertions(+), 1 deletion(-)
>>
>> diff --git a/Documentation/devicetree/bindings/arm/omap/prcm.txt b/Documentation/devicetree/bindings/arm/omap/prcm.txt
>> index 3eb6d7a..301f576 100644
>> --- a/Documentation/devicetree/bindings/arm/omap/prcm.txt
>> +++ b/Documentation/devicetree/bindings/arm/omap/prcm.txt
>> @@ -47,6 +47,19 @@ cm: cm at 48004000 {
>> };
>> }
>>
>> +cm2: cm2 at 8000 {
>> + compatible = "ti,omap4-cm2";
>> + reg = <0x8000 0x3000>;
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + ranges = <0 0x8000 0x3000>;
>> +
>> + l4_per_clkdm: l4_per_clkdm {
>> + compatible = "ti,clockdomain";
>> + reg = <0x1400 0x200>;
>
> Should there be #clock-cells = <1> here? Also node name should
> have an @1400 after it?
Yeah both should be there. I had the #clock-cells in my test data in
place already but the address portion I seem to have completely forgot.
>
>> + };
>> +};
>> +
>> &cm_clocks {
>> omap2_32k_fck: omap_32k_fck {
>> #clock-cells = <0>;
>> diff --git a/Documentation/devicetree/bindings/clock/ti/clockdomain.txt b/Documentation/devicetree/bindings/clock/ti/clockdomain.txt
>> index cb76b3f..5d8ca61 100644
>> --- a/Documentation/devicetree/bindings/clock/ti/clockdomain.txt
>> +++ b/Documentation/devicetree/bindings/clock/ti/clockdomain.txt
>> @@ -14,11 +14,21 @@ hardware hierarchy.
>>
>> Required properties:
>> - compatible : shall be "ti,clockdomain"
>> -- #clock-cells : from common clock binding; shall be set to 0.
>> +- #clock-cells : from common clock binding; shall be set to 1 if this
>> + clockdomain acts as a clock provider.
>> +
>> +Optional properties:
>> - clocks : link phandles of clocks within this domain
>> +- reg : address for the clockdomain
>>
>> Examples:
>> dss_clkdm: dss_clkdm {
>> compatible = "ti,clockdomain";
>> clocks = <&dss1_alwon_fck_3430es2>, <&dss_ick_3430es2>;
>> };
>> +
>> + l4_per_clkdm: l4_per_clkdm {
>
> add an @1400?
Yea will do, unless we decide to go for prcm-instance provider approach.
>
>> + compatible = "ti,clockdomain";
>> + #clock-cells = <1>;
>> + reg = <0x1400 0x200>;
>> + };
>> diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
>> index 0e9acdd..c1a5cfb 100644
>> --- a/arch/arm/mach-omap2/io.c
>> +++ b/arch/arm/mach-omap2/io.c
>> @@ -794,6 +794,8 @@ int __init omap_clk_init(void)
>> if (ret)
>> return ret;
>>
>> + ti_dt_clockdomains_early_setup();
>> +
>> of_clk_init(NULL);
>>
>> ti_dt_clk_init_retry_clks();
>> diff --git a/drivers/clk/ti/clock.h b/drivers/clk/ti/clock.h
>> index 9b8a5f2..f6383ab 100644
>> --- a/drivers/clk/ti/clock.h
>> +++ b/drivers/clk/ti/clock.h
>> @@ -205,6 +205,7 @@ struct clk *ti_clk_register(struct device *dev, struct clk_hw *hw,
>>
>> int ti_clk_get_memmap_index(struct device_node *node);
>> void __iomem *ti_clk_get_reg_addr(struct device_node *node, int index);
>> +void __iomem *ti_clk_get_reg_addr_clkdm(const char *clkdm_name, u16 offset);
>> void ti_dt_clocks_register(struct ti_dt_clk *oclks);
>> int ti_clk_retry_init(struct device_node *node, struct clk_hw *hw,
>> ti_of_clk_init_cb_t func);
>> diff --git a/drivers/clk/ti/clockdomain.c b/drivers/clk/ti/clockdomain.c
>> index 704157d..7b0a6c3 100644
>> --- a/drivers/clk/ti/clockdomain.c
>> +++ b/drivers/clk/ti/clockdomain.c
>> @@ -28,6 +28,23 @@
>> #define pr_fmt(fmt) "%s: " fmt, __func__
>>
>> /**
>> + * struct ti_clkdm - TI clockdomain data structure
>> + * @name: name of the clockdomain
>> + * @index: index of the clk_iomap struct for this clkdm
>> + * @offset: clockdomain offset from the beginning of the iomap
>> + * @link: link to the list
>> + */
>> +struct ti_clkdm {
>> + const char *name;
>> + int index;
>> + u32 offset;
>> + struct list_head link;
>> + struct list_head clocks;
>> +};
>> +
>> +static LIST_HEAD(clkdms);
>> +
>> +/**
>> * omap2_clkops_enable_clkdm - increment usecount on clkdm of @hw
>> * @hw: struct clk_hw * of the clock being enabled
>> *
>> @@ -116,6 +133,8 @@ void omap2_init_clk_clkdm(struct clk_hw *hw)
>> struct clk_hw_omap *clk = to_clk_hw_omap(hw);
>> struct clockdomain *clkdm;
>> const char *clk_name;
>> + struct ti_clkdm *ti_clkdm;
>> + bool match = false;
>>
>> if (!clk->clkdm_name)
>> return;
>> @@ -130,7 +149,21 @@ void omap2_init_clk_clkdm(struct clk_hw *hw)
>> } else {
>> pr_debug("clock: could not associate clk %s to clkdm %s\n",
>> clk_name, clk->clkdm_name);
>> + return;
>> }
>> +
>> + list_for_each_entry(ti_clkdm, &clkdms, link) {
>> + if (!strcmp(ti_clkdm->name, clk->clkdm_name)) {
>> + match = true;
>> + break;
>
> Or just goto found and then drop the match bool thing.
That will be cleaner yes. Will change.
>
>> + }
>> + }
>> +
>> + if (!match)
>> + return;
>> +
>> + /* Add clock to the list of provided clocks */
>> + list_add(&clk->clkdm_link, &ti_clkdm->clocks);
>> }
>>
>> static void __init of_ti_clockdomain_setup(struct device_node *node)
>> @@ -161,11 +194,125 @@ static void __init of_ti_clockdomain_setup(struct device_node *node)
>> }
>> }
>>
>> +static struct clk_hw *clkdm_clk_xlate(struct of_phandle_args *clkspec,
>> + void *data)
>> +{
>> + struct ti_clkdm *clkdm = data;
>> + struct clk_hw_omap *clk;
>> + u16 offset = clkspec->args[0];
>> +
>> + list_for_each_entry(clk, &clkdm->clocks, clkdm_link)
>> + if (((u32)clk->enable_reg & 0xffff) - clkdm->offset == offset)
>
> This looks scary.
I think I need to add a separate cleanup patch for the address handling
before this series... There are a few nasty looking address casts around
at the moment under the TI clock driver.
>
>> + return &clk->hw;
>> +
>> + return ERR_PTR(-EINVAL);
>> +}
>> +
>> +static int ti_clk_register_clkdm(struct device_node *node)
>> +{
>> + u64 clkdm_addr;
>> + u64 inst_addr;
>> + const __be32 *reg;
>> + u32 offset;
>> + int idx;
>> + struct ti_clkdm *clkdm;
>> + int ret;
>> +
>> + reg = of_get_address(node, 0, NULL, NULL);
>> + if (!reg)
>> + return -ENOENT;
>> +
>> + clkdm_addr = of_translate_address(node, reg);
>> +
>> + reg = of_get_address(node->parent, 0, NULL, NULL);
>> + if (!reg)
>> + return -EINVAL;
>> +
>> + inst_addr = of_translate_address(node->parent, reg);
>> +
>> + offset = clkdm_addr - inst_addr;
>> +
>
> I guess the usual offset tricks are still going on in the TI clk
> driver? Is there a plan to stop doing that at some point?
I can have a look at that with the addressing cleanup I mentioned above.
I'll see if I can reduce the amount of trickery involved.
>
>> + idx = ti_clk_get_memmap_index(node->parent);
>> +
>> + if (idx < 0) {
>> + pr_err("bad memmap index for %s\n", node->name);
>> + return idx;
>> + }
>> +
>> + clkdm = kzalloc(sizeof(*clkdm), GFP_KERNEL);
>> + if (!clkdm)
>> + return -ENOMEM;
>> +
>> + clkdm->name = node->name;
>> + clkdm->index = idx;
>> + clkdm->offset = offset;
>> +
>> + INIT_LIST_HEAD(&clkdm->clocks);
>> +
>> + list_add(&clkdm->link, &clkdms);
>> +
>> + ret = of_clk_add_hw_provider(node, clkdm_clk_xlate, clkdm);
>> + if (ret) {
>> + list_del(&clkdm->link);
>> + kfree(clkdm);
>> + return ret;
>> + }
>> +
>> + return 0;
>> +}
>> +
>> +/**
>> + * ti_clk_get_reg_addr_clkdm - get register address relative to clockdomain
>> + * @clkdm_name: parent clockdomain
>> + * @offset: offset from the clockdomain
>> + *
>> + * Gets a register address relative to parent clockdomain. Searches the
>> + * list of available clockdomain, and if match is found, calculates the
>> + * register address from the iomap relative to the clockdomain.
>> + * Returns the register address, or NULL if not found.
>> + */
>> +void __iomem *ti_clk_get_reg_addr_clkdm(const char *clkdm_name, u16 offset)
>> +{
>> + u32 reg;
>> + struct clk_omap_reg *reg_setup;
>> + struct ti_clkdm *clkdm;
>> + bool match = false;
>> +
>> + reg_setup = (struct clk_omap_reg *)®
>> +
>> + /* XXX: get offset from clkdm, get base for instance */
>> + list_for_each_entry(clkdm, &clkdms, link) {
>> + if (!strcmp(clkdm->name, clkdm_name)) {
>> + match = true;
>> + break;
>> + }
>> + }
>> +
>> + if (!match) {
>> + pr_err("%s: no entry for %s\n", __func__, clkdm_name);
>> + return NULL;
>> + }
>> +
>> + reg_setup->offset = clkdm->offset + offset;
>> + reg_setup->index = clkdm->index;
>> +
>> + return (void __iomem *)reg;
>> +}
>> +
>> static const struct of_device_id ti_clkdm_match_table[] __initconst = {
>> { .compatible = "ti,clockdomain" },
>> { }
>> };
>>
>> +void __init ti_dt_clockdomains_early_setup(void)
>> +{
>> + struct device_node *np;
>> +
>> + for_each_matching_node(np, ti_clkdm_match_table) {
>> + ti_clk_register_clkdm(np);
>> + }
>
> Nitpick: drop braces please.
True, will do that.
-Tero
>
>> +}
>> +
>> /**
>> * ti_dt_clockdomains_setup - setup device tree clockdomains
>> *
>> diff --git a/include/linux/clk/ti.h b/include/linux/clk/ti.h
>> index 626ae94..afccb48 100644
>> --- a/include/linux/clk/ti.h
>> +++ b/include/linux/clk/ti.h
>> @@ -125,6 +125,7 @@ struct clk_hw_omap_ops {
>> /**
>> * struct clk_hw_omap - OMAP struct clk
>> * @node: list_head connecting this clock into the full clock list
>> + * @clkdm_link: list_head connecting this clock into the clockdomain
>> * @enable_reg: register to write to enable the clock (see @enable_bit)
>> * @enable_bit: bitshift to write to enable/disable the clock (see @enable_reg)
>> * @flags: see "struct clk.flags possibilities" above
>> @@ -137,6 +138,7 @@ struct clk_hw_omap_ops {
>> struct clk_hw_omap {
>> struct clk_hw hw;
>> struct list_head node;
>> + struct list_head clkdm_link;
>> unsigned long fixed_rate;
>> u8 fixed_div;
>> void __iomem *enable_reg;
>> @@ -251,6 +253,7 @@ int omap2_reprogram_dpllcore(struct clk_hw *clk, unsigned long rate,
>> unsigned long omap2_get_dpll_rate(struct clk_hw_omap *clk);
>>
>> void ti_dt_clk_init_retry_clks(void);
>> +void ti_dt_clockdomains_early_setup(void);
>> void ti_dt_clockdomains_setup(void);
>> int ti_clk_setup_ll_ops(struct ti_clk_ll_ops *ops);
>>
>> --
>> 1.9.1
>>
>
^ permalink raw reply
* [PATCH v2 2/2] arm64: dts: hi6220: add resets property into dwmmc nodes
From: Leo Yan @ 2016-10-28 7:38 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <d7993c1a-5e50-9a33-0900-5c1a79884d3c@samsung.com>
On Fri, Oct 28, 2016 at 04:33:41PM +0900, Jaehoon Chung wrote:
[...]
> >>> Guodong: Is there any bootloader dependency on that change?
> >>
> >> FYI, I use firmwares available in AOSP
> >
> > I tried latest firmware [1], still cannot boot up until revert the
> > patch "arm64: dts: hi6220: add resets property into dwmmc nodes".
>
> Could you share the log? Is there any log about failure?
Sure, please see below log:
EFI stub: Booting Linux Kernel...
EFI stub: Using DTB from configuration table
EFI stub: Exiting boot services and installing virtual address map...
[ 0.000000] Booting Linux on physical CPU 0x0
[ 0.000000] Linux version 4.9.0-rc1-00251-g323792f (leoy at leoy-linaro) (gcc version 4.9.2 20140904 (prerelease) (crosstool-NG linaro-1.13.1-4.9-2014.09 - Linaro GCC 4.9-2014.09) ) #589 SMP PREEMPT Fri Oct 28 15:35:15 CST 2016
[ 0.000000] Boot CPU: AArch64 Processor [410fd033]
[ 0.000000] efi: Getting EFI parameters from FDT:
[ 0.000000] efi: EFI v2.50 by hikey EFI Oct 26 2016 15:14:29
[ 0.000000] efi: PROP=0x3d8297d8
[ 0.000000] Reserved memory: created CMA memory pool at 0x000000002d000000, size 128 MiB
[ 0.000000] OF: reserved mem: initialized node linux,cma, compatible id shared-dma-pool
[ 0.000000] psci: probing for conduit method from DT.
[ 0.000000] psci: PSCIv1.0 detected in firmware.
[ 0.000000] psci: Using standard PSCI v0.2 function IDs
[ 0.000000] psci: MIGRATE_INFO_TYPE not supported.
[ 0.000000] percpu: Embedded 21 pages/cpu @ffff80003df10000 s48000 r8192 d29824 u86016
[ 0.000000] Detected VIPT I-cache on CPU0
[ 0.000000] CPU features: enabling workaround for ARM erratum 845719
[ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 249229
[ 0.000000] Kernel command line: BOOT_IMAGE=(hd0,gpt6)/Image console=tty0 console=ttyAMA3,115200 root=/dev/disk/by-partlabel/system rootwait rw efi=noruntime
[ 0.000000] log_buf_len individual max cpu contribution: 4096 bytes
[ 0.000000] log_buf_len total cpu_extra contributions: 28672 bytes
[ 0.000000] log_buf_len min size: 16384 bytes
[ 0.000000] log_buf_len: 65536 bytes
[ 0.000000] early log buf free: 14468(88%)
[ 0.000000] PID hash table entries: 4096 (order: 3, 32768 bytes)
[ 0.000000] Dentry cache hash table entries: 131072 (order: 8, 1048576 bytes)
[ 0.000000] Inode-cache hash table entries: 65536 (order: 7, 524288 bytes)
[ 0.000000] Memory: 841572K/1012788K available (8316K kernel code, 860K rwdata, 3668K rodata, 1024K init, 283K bss, 40144K reserved, 131072K cma-reserved)
[ 0.000000] Virtual kernel memory layout:
[ 0.000000] modules : 0xffff000000000000 - 0xffff000008000000 ( 128 MB)
[ 0.000000] vmalloc : 0xffff000008000000 - 0xffff7dffbfff0000 (129022 GB)
[ 0.000000] .text : 0xffff000008080000 - 0xffff0000088a0000 ( 8320 KB)
[ 0.000000] .rodata : 0xffff0000088a0000 - 0xffff000008c40000 ( 3712 KB)
[ 0.000000] .init : 0xffff000008c40000 - 0xffff000008d40000 ( 1024 KB)
[ 0.000000] .data : 0xffff000008d40000 - 0xffff000008e17200 ( 861 KB)
[ 0.000000] .bss : 0xffff000008e17200 - 0xffff000008e5e0c0 ( 284 KB)
[ 0.000000] fixed : 0xffff7dfffe7fd000 - 0xffff7dfffec00000 ( 4108 KB)
[ 0.000000] PCI I/O : 0xffff7dfffee00000 - 0xffff7dffffe00000 ( 16 MB)
[ 0.000000] vmemmap : 0xffff7e0000000000 - 0xffff800000000000 ( 2048 GB maximum)
[ 0.000000] 0xffff7e0000000000 - 0xffff7e0000f80000 ( 15 MB actual)
[ 0.000000] memory : 0xffff800000000000 - 0xffff80003e000000 ( 992 MB)
[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1
[ 0.000000] Preemptible hierarchical RCU implementation.
[ 0.000000] Build-time adjustment of leaf fanout to 64.
[ 0.000000] RCU restricting CPUs from NR_CPUS=64 to nr_cpu_ids=8.
[ 0.000000] RCU: Adjusting geometry for rcu_fanout_leaf=64, nr_cpu_ids=8
[ 0.000000] NR_IRQS:64 nr_irqs:64 0
[ 0.000000] GIC: Using split EOI/Deactivate mode
[ 0.000000] arm_arch_timer: Architected cp15 timer(s) running at 1.20MHz (phys).
[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x11b661f8e, max_idle_ns: 1763180809113 ns
[ 0.000004] sched_clock: 56 bits at 1200kHz, resolution 833ns, wraps every 4398046510838ns
[ 0.000101] clocksource: arm,sp804: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 99544814920 ns
[ 0.000108] sched_clock: 32 bits at 19MHz, resolution 52ns, wraps every 111848106981ns
[ 0.000495] Console: colour dummy device 80x25
[ 0.001193] console [tty0] enabled
[ 0.001224] Calibrating delay loop (skipped), value calculated using timer frequency.. 2.40 BogoMIPS (lpj=4800)
[ 0.001253] pid_max: default: 32768 minimum: 301
[ 0.001331] Security Framework initialized
[ 0.001373] Mount-cache hash table entries: 2048 (order: 2, 16384 bytes)
[ 0.001392] Mountpoint-cache hash table entries: 2048 (order: 2, 16384 bytes)
[ 0.002258] ASID allocator initialised with 65536 entries
[ 0.032726] EFI runtime services will be disabled.
[ 0.080274] Detected VIPT I-cache on CPU1
[ 0.080323] CPU1: Booted secondary processor [410fd033]
[ 0.112299] Detected VIPT I-cache on CPU2
[ 0.112321] CPU2: Booted secondary processor [410fd033]
[ 0.144348] Detected VIPT I-cache on CPU3
[ 0.144369] CPU3: Booted secondary processor [410fd033]
[ 0.176488] Detected VIPT I-cache on CPU4
[ 0.176529] CPU4: Booted secondary processor [410fd033]
[ 0.208479] Detected VIPT I-cache on CPU5
[ 0.208501] CPU5: Booted secondary processor [410fd033]
[ 0.240546] Detected VIPT I-cache on CPU6
[ 0.240568] CPU6: Booted secondary processor [410fd033]
[ 0.272610] Detected VIPT I-cache on CPU7
[ 0.272632] CPU7: Booted secondary processor [410fd033]
[ 0.272708] Brought up 8 CPUs
[ 0.272887] SMP: Total of 8 processors activated.
[ 0.272904] CPU features: detected feature: 32-bit EL0 Support
[ 0.272975] CPU: All CPU(s) started at EL2
[ 0.273028] alternatives: patching kernel code
[ 0.273645] devtmpfs: initialized
[ 0.278919] DMI not present or invalid.
[ 0.279161] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
[ 0.282522] pinctrl core: initialized pinctrl subsystem
[ 0.283636] NET: Registered protocol family 16
[ 0.300541] cpuidle: using governor menu
[ 0.301073] vdso: 2 pages (1 code @ ffff0000088a7000, 1 data @ ffff000008d44000)
[ 0.301106] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
[ 0.301863] DMA: preallocated 256 KiB pool for atomic allocations
[ 0.302088] Serial: AMBA PL011 UART driver
[ 0.303683] f8015000.uart: ttyAMA0 at MMIO 0xf8015000 (irq = 7, base_baud = 0) is a PL011 rev2
[ 0.304121] uart-pl011 f7111000.uart: could not find pctldev for node /soc/pinmux at f7010000/uart1_pmx_func, deferring probe
[ 0.304340] uart-pl011 f7112000.uart: could not find pctldev for node /soc/pinmux at f7010000/uart2_pmx_func, deferring probe
[ 0.304580] uart-pl011 f7113000.uart: could not find pctldev for node /soc/pinmux at f7010000/uart3_pmx_func, deferring probe
[ 0.310373] hi6220-mbox f7510000.mailbox: Mailbox enabled
[ 0.341400] HugeTLB registered 2 MB page size, pre-allocated 0 pages
[ 0.342257] ACPI: Interpreter disabled.
[ 0.342953] vgaarb: loaded
[ 0.343177] SCSI subsystem initialized
[ 0.343450] ssp-pl022 f7106000.spi: could not find pctldev for node /soc/pinmux at f7010000/spi0_pmx_func, deferring probe
[ 0.343955] usbcore: registered new interface driver usbfs
[ 0.344042] usbcore: registered new interface driver hub
[ 0.344177] usbcore: registered new device driver usb
[ 0.344452] i2c_designware f7100000.i2c: could not find pctldev for node /soc/pinmux at f7010000/i2c0_pmx_func, deferring probe
[ 0.344494] i2c_designware f7101000.i2c: could not find pctldev for node /soc/pinmux at f7010000/i2c1_pmx_func, deferring probe
[ 0.344535] i2c_designware f7102000.i2c: could not find pctldev for node /soc/pinmux at f7010000/i2c2_pmx_func, deferring probe
[ 0.344915] pps_core: LinuxPPS API ver. 1 registered
[ 0.344931] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
[ 0.345003] PTP clock support registered
[ 0.345325] dmi: Firmware registration failed.
[ 0.345408] Registered efivars operations
[ 0.345580] Advanced Linux Sound Architecture Driver Initialized.
[ 0.346449] clocksource: Switched to clocksource arch_sys_counter
[ 0.346617] VFS: Disk quotas dquot_6.6.0
[ 0.346670] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
[ 0.346935] pnp: PnP ACPI: disabled
[ 0.355325] NET: Registered protocol family 2
[ 0.355797] TCP established hash table entries: 8192 (order: 4, 65536 bytes)
[ 0.355885] TCP bind hash table entries: 8192 (order: 5, 131072 bytes)
[ 0.356026] TCP: Hash tables configured (established 8192 bind 8192)
[ 0.356085] UDP hash table entries: 512 (order: 2, 16384 bytes)
[ 0.356120] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes)
[ 0.356255] NET: Registered protocol family 1
[ 0.356569] RPC: Registered named UNIX socket transport module.
[ 0.356585] RPC: Registered udp transport module.
[ 0.356599] RPC: Registered tcp transport module.
[ 0.356613] RPC: Registered tcp NFSv4.1 backchannel transport module.
[ 0.356791] Unpacking initramfs...
[ 0.497134] Freeing initrd memory: 3576K (ffff8000372d5000 - ffff800037653000)
[ 0.497725] kvm [1]: 8-bit VMID
[ 0.497744] kvm [1]: IDMAP page: 890000
[ 0.497758] kvm [1]: HYP VA range: 800000000000:ffffffffffff
[ 0.498691] kvm [1]: Hyp mode initialized successfully
[ 0.498741] kvm [1]: vgic-v2 at f6804000
[ 0.498936] kvm [1]: vgic interrupt IRQ1
[ 0.498978] kvm [1]: virtual timer IRQ4
[ 0.501267] futex hash table entries: 2048 (order: 6, 262144 bytes)
[ 0.501394] audit: initializing netlink subsys (disabled)
[ 0.501462] audit: type=2000 audit(0.495:1): initialized
[ 0.501845] workingset: timestamp_bits=46 max_order=18 bucket_order=0
[ 0.508960] squashfs: version 4.0 (2009/01/31) Phillip Lougher
[ 0.509596] NFS: Registering the id_resolver key type
[ 0.509632] Key type id_resolver registered
[ 0.509645] Key type id_legacy registered
[ 0.509665] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
[ 0.509833] 9p: Installing v9fs 9p2000 file system support
[ 0.512208] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 247)
[ 0.512235] io scheduler noop registered
[ 0.512349] io scheduler cfq registered (default)
[ 0.513271] libphy: mdio_driver_register: phy-bcm-ns2-pci
[ 0.514198] pinctrl-single f7010000.pinmux: 159 pins at pa ffff000008e81000 size 636
[ 0.514612] pinctrl-single f7010800.pinmux: 163 pins at pa ffff000008e83800 size 652
[ 0.514770] pinctrl-single f8001800.pinmux: 30 pins at pa ffff000008e85800 size 120
[ 0.515809] pl061_gpio f8011000.gpio: PL061 GPIO chip @0x00000000f8011000 registered
[ 0.516214] pl061_gpio f8012000.gpio: PL061 GPIO chip @0x00000000f8012000 registered
[ 0.516610] pl061_gpio f8013000.gpio: PL061 GPIO chip @0x00000000f8013000 registered
[ 0.516687] gpio gpiochip3: gpio-line-names specifies 9 line names but there are 8 lines on the chip
[ 0.517038] pl061_gpio f8014000.gpio: PL061 GPIO chip @0x00000000f8014000 registered
[ 0.517416] pl061_gpio f7020000.gpio: PL061 GPIO chip @0x00000000f7020000 registered
[ 0.517796] pl061_gpio f7021000.gpio: PL061 GPIO chip @0x00000000f7021000 registered
[ 0.518172] pl061_gpio f7022000.gpio: PL061 GPIO chip @0x00000000f7022000 registered
[ 0.518577] pl061_gpio f7023000.gpio: PL061 GPIO chip @0x00000000f7023000 registered
[ 0.518658] gpio gpiochip8: gpio-line-names specifies 9 line names but there are 8 lines on the chip
[ 0.518999] pl061_gpio f7024000.gpio: PL061 GPIO chip @0x00000000f7024000 registered
[ 0.519385] pl061_gpio f7025000.gpio: PL061 GPIO chip @0x00000000f7025000 registered
[ 0.519774] pl061_gpio f7026000.gpio: PL061 GPIO chip @0x00000000f7026000 registered
[ 0.520162] pl061_gpio f7027000.gpio: PL061 GPIO chip @0x00000000f7027000 registered
[ 0.520550] pl061_gpio f7028000.gpio: PL061 GPIO chip @0x00000000f7028000 registered
[ 0.520939] pl061_gpio f7029000.gpio: PL061 GPIO chip @0x00000000f7029000 registered
[ 0.521324] pl061_gpio f702a000.gpio: PL061 GPIO chip @0x00000000f702a000 registered
[ 0.521719] pl061_gpio f702b000.gpio: PL061 GPIO chip @0x00000000f702b000 registered
[ 0.522107] pl061_gpio f702c000.gpio: PL061 GPIO chip @0x00000000f702c000 registered
[ 0.522505] pl061_gpio f702d000.gpio: PL061 GPIO chip @0x00000000f702d000 registered
[ 0.522884] pl061_gpio f702e000.gpio: PL061 GPIO chip @0x00000000f702e000 registered
[ 0.523275] pl061_gpio f702f000.gpio: PL061 GPIO chip @0x00000000f702f000 registered
[ 0.526086] xenfs: not registering filesystem on non-xen platform
[ 0.528934] Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled
[ 0.530124] SuperH (H)SCI(F) driver initialized
[ 0.530364] msm_serial: driver initialized
[ 0.536344] loop: module loaded
[ 0.539526] hisi_sas: driver version v1.6
[ 0.541976] libphy: Fixed MDIO Bus: probed
[ 0.542702] tun: Universal TUN/TAP device driver, 1.6
[ 0.542719] tun: (C) 1999-2004 Max Krasnyansky <maxk@qualcomm.com>
[ 0.543688] e1000e: Intel(R) PRO/1000 Network Driver - 3.2.6-k
[ 0.543707] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
[ 0.543804] igb: Intel(R) Gigabit Ethernet Network Driver - version 5.4.0-k
[ 0.543821] igb: Copyright (c) 2007-2014 Intel Corporation.
[ 0.543906] igbvf: Intel(R) Gigabit Virtual Function Network Driver - version 2.4.0-k
[ 0.543930] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
[ 0.544018] sky2: driver version 1.30
[ 0.544551] VFIO - User Level meta-driver version: 0.3
[ 0.546560] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
[ 0.546590] ehci-pci: EHCI PCI platform driver
[ 0.546638] ehci-platform: EHCI generic platform driver
[ 0.546730] ehci-exynos: EHCI EXYNOS driver
[ 0.546802] ehci-msm: Qualcomm On-Chip EHCI Host Controller
[ 0.546866] ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver
[ 0.546900] ohci-pci: OHCI PCI platform driver
[ 0.546952] ohci-platform: OHCI generic platform driver
[ 0.547024] ohci-exynos: OHCI EXYNOS driver
[ 0.547324] usbcore: registered new interface driver usb-storage
[ 0.547863] file system registered
[ 0.548183] mousedev: PS/2 mouse device common for all mice
[ 0.548621] input: HISI 65xx PowerOn Key as /devices/platform/f8000000.pmic/hi65xx-powerkey.0.auto/input/input0
[ 0.549253] rtc-pl031 f8003000.rtc: rtc core: registered pl031 as rtc0
[ 0.549459] rtc-pl031 f8004000.rtc: rtc core: registered pl031 as rtc1
[ 0.549796] i2c /dev entries driver
[ 0.552183] sdhci: Secure Digital Host Controller Interface driver
[ 0.552207] sdhci: Copyright(c) Pierre Ossman
[ 0.552403] Synopsys Designware Multimedia Card Interface Driver
[ 0.553405] sdhci-pltfm: SDHCI platform and OF driver helper
[ 0.554851] ledtrig-cpu: registered to indicate activity on CPUs
[ 0.555695] usbcore: registered new interface driver usbhid
[ 0.555717] usbhid: USB HID core driver
[ 0.557233] NET: Registered protocol family 17
[ 0.557320] 9pnet: Installing 9P2000 support
[ 0.557383] Key type dns_resolver registered
[ 0.557996] registered taskstats version 1
[ 0.561690] f7111000.uart: ttyAMA1 at MMIO 0xf7111000 (irq = 8, base_baud = 0) is a PL011 rev2
[ 0.562226] f7112000.uart: ttyAMA2 at MMIO 0xf7112000 (irq = 9, base_baud = 0) is a PL011 rev2
[ 0.562553] f7113000.uart: ttyAMA3 at MMIO 0xf7113000 (irq = 10, base_baud = 0) is a PL011 rev2
[ 1.916968] console [ttyAMA3] enabled
[ 1.922080] ssp-pl022 f7106000.spi: ARM PL022 driver, device ID: 0x00041022
[ 1.929144] ssp-pl022 f7106000.spi: mapped registers from 0x00000000f7106000 to ffff000008f03000
[ 1.938007] ssp-pl022 f7106000.spi: Failed to work in dma mode, work without dma!
[ 1.949535] f72c0000.usb supply vusb_d not found, using dummy regulator
[ 1.956256] f72c0000.usb supply vusb_a not found, using dummy regulator
[ 2.344873] dwc2 f72c0000.usb: EPs: 16, dedicated fifos, 1920 entries in SPRAM
[ 2.353154] dwc2 f72c0000.usb: DWC OTG Controller
[ 2.357891] dwc2 f72c0000.usb: new USB bus registered, assigned bus number 1
[ 2.364979] dwc2 f72c0000.usb: irq 38, io mem 0x00000000
[ 2.371082] hub 1-0:1.0: USB hub found
[ 2.374866] hub 1-0:1.0: 1 port detected
[ 2.382071] rtc-pl031 f8003000.rtc: setting system clock to 1970-01-01 00:00:19 UTC (19)
[ 2.390486] LDO2_2V8: disabling
[ 2.393639] LDO7_SDIO: disabling
[ 2.396900] LDO10_2V85: disabling
[ 2.400234] LDO13_1V8: disabling
[ 2.403476] LDO14_2V8: disabling
[ 2.406721] LDO17_2V5: disabling
[ 2.409956] LDO19_3V0: disabling
[ 2.413199] wlan-en-regulator: disabling
[ 2.417135] ALSA device list:
[ 2.420109] No soundcards found.
[ 2.423712] uart-pl011 f7113000.uart: no DMA platform data
[ 2.429585] Freeing unused kernel memory: 1024K (ffff800000c40000 - ffff800000d40000)
Loading, please wait...
starting version 228
[ 2.479981] random: systemd-udevd: uninitialized urandom read (16 bytes read)
[ 2.483570] random: udevadm: uninitialized urandom read (16 bytes read)
[ 2.483680] random: udevadm: uninitialized urandom read (16 bytes read)
[ 2.485404] random: udevadm: uninitialized urandom read (16 bytes read)
[ 2.485631] random: udevadm: uninitialized urandom read (16 bytes read)
[ 2.485859] random: udevadm: uninitialized urandom read (16 bytes read)
[ 2.486098] random: udevadm: uninitialized urandom read (16 bytes read)
[ 2.486305] random: udevadm: uninitialized urandom read (16 bytes read)
[ 2.486729] random: udevadm: uninitialized urandom read (16 bytes read)
[ 2.486951] random: udevadm: uninitialized urandom read (16 bytes read)
Begin: Loading essential drivers ... done.
Begin: Running /scripts/init-premount ... done.
Begin: Mounting root file system ... Begin: Running /scripts/local-top ... done.
Begin: Running /scripts/local-premount ... modprobe: can't change directory to '4.9.0-rc1-00251-g323792f': No such file or directory
done.
Begin: Waiting for root file system ... Begin: Running /scripts/local-block ... done.
Begin: Running /scripts/local-block ... done.
Begin: Running /scripts/local-block ... done.
Begin: Running /scripts/local-block ... done.
Begin: Running /scripts/local-block ... done.
Begin: Running /scripts/local-block ... done.
Begin: Running /scripts/local-block ... done.
Thanks,
Leo Yan
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