* [PATCH 1/4] mfd: ti_am335x_tscadc: store physical address
From: Jonathan Cameron @ 2016-11-05 17:45 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161031081643.GN13127@dell>
On 31/10/16 08:16, Lee Jones wrote:
> On Sun, 30 Oct 2016, Jonathan Cameron wrote:
>
>> On 26/10/16 13:17, Lee Jones wrote:
>>> On Fri, 30 Sep 2016, Mugunthan V N wrote:
>>>
>>>> On Wednesday 28 September 2016 01:10 AM, Lee Jones wrote:
>>>>> On Wed, 21 Sep 2016, Mugunthan V N wrote:
>>>>>
>>>>>> store the physical address of the device in its priv to use it
>>>>>> for DMA addressing in the client drivers.
>>>>>>
>>>>>> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
>>>>>> ---
>>>>>> drivers/mfd/ti_am335x_tscadc.c | 1 +
>>>>>> include/linux/mfd/ti_am335x_tscadc.h | 1 +
>>>>>> 2 files changed, 2 insertions(+)
>>>>>>
>>>>>> diff --git a/drivers/mfd/ti_am335x_tscadc.c b/drivers/mfd/ti_am335x_tscadc.c
>>>>>> index c8f027b..0f3fab4 100644
>>>>>> --- a/drivers/mfd/ti_am335x_tscadc.c
>>>>>> +++ b/drivers/mfd/ti_am335x_tscadc.c
>>>>>> @@ -183,6 +183,7 @@ static int ti_tscadc_probe(struct platform_device *pdev)
>>>>>> tscadc->irq = err;
>>>>>>
>>>>>> res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
>>>>>> + tscadc->tscadc_phys_base = res->start;
>>>>>
>>>>> This is unusual. Can't you use a virt_to_phys() variant instead?
>>>>>
>>>>
>>>> I tried using virt_to_phys(), but its not working for me.
>>>> Also saw many drivers uses like this to get physical address
>>>> ("git grep -n " res->start;" drivers/*").
>>>
>>> Very well:
>>>
>>> For my own reference:
>>> Acked-for-MFD-by: Lee Jones <lee.jones@linaro.org>
>>>
>>> Let me know how you wish this set to be handled.
>> I'm happy to pick up the whole series. There are some more mfd
>> header changes in patch 2 but as they only add defines, I
>> don't mind that much if I don't an Ack from you on those
>> (btw this got to V3 but as patch 1 didn't change I'll carry
>> your ack forwards).
>>
>> Do you want an immutable branch? Seems unlikely to cause
>> much trouble even if there is a merge issue on all 10ish
>> lines of mfd code in the next merge window.
>
> Not at the moment, but if you could set things up so it's possible to
> create one at a later date if things go Pete Tong, that would be
> great.
Couldn't think of an easy way to do this without creating a branch
and merging it into my normal branch. I'll not push it out to
kernel.org though unless you tell me you need it.
Applied to the togreg branch (indirectly ;) of iio.git pushed out
as testing for the autobuilders to play with it.
Thanks,
Jonathan
>
^ permalink raw reply
* [Bug] ARM: mxs: STI: console can't wake up from freeze
From: Russell King - ARM Linux @ 2016-11-05 18:05 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1113068116.152452.34665947-6f6b-41d6-92af-eabcbcb794ea.open-xchange@email.1und1.de>
On Sat, Nov 05, 2016 at 04:28:37PM +0100, Stefan Wahren wrote:
> As i wrote in my email before, i added a pr_info() into freeze_wake.
> But i never see the output of this message. So i assume freeze_wake
> is never called. Again, how could this happen?
Hmm, so the bit that you're getting stuck on is:
wait_event(suspend_freeze_wait_head,
suspend_freeze_state == FREEZE_STATE_WAKE);
Now there's two things about this here - it's a non-interruptible wait,
so I think the hung task detection may trigger on that (I'm not entirely
sure on that point though, and I don't have time this evening to read
the code to find out.)
The second thing is, that in order to pass this point, something has to
call freeze_wake().
There's not that many possibilities for that:
$ git grep freeze_wake drivers kernel
drivers/base/power/wakeup.c: freeze_wake();
drivers/base/power/wakeup.c: freeze_wake();
kernel/power/suspend.c:void freeze_wake(void)
kernel/power/suspend.c:EXPORT_SYMBOL_GPL(freeze_wake);
One of those is pm_system_wakeup(), the other is wakeup_source_activate()
via wakeup_source_report_event() via __pm_stay_awake() or
__pm_wakeup_event().
Looking at the results of:
$ grep 'pm_wakeup_event\|pm_stay_awake\|pm_system_wakeup' drivers kernel -r
it looks like for freeze support to work, various drivers need to call
one of these functions.
The iMX serial driver doesn't call any of these functions, so I can't
see how we'd get past this point - and from that grep you'll see nothing
in kernel/irq touches any of these functions.
Documentation/power/suspend-and-interrupts.txt does a very poor job
(which is typical) of describing what the requirements are for
"suspend-to-idle", it doesn't really say that any of the above
functions must be called and it doesn't say who's responsible for
calling these functions. It does talk about "pm_system_wakeup()"
for "rare cases".
So my conclusion, based on the poor documentation and the results of
my greps, is that "freeze" aka "suspend-to-idle" is not supported on
the majority of hardware, and attempting to use it will result in the
system locking up in exactly the way you're seeing.
--
RMK's Patch system: http://www.armlinux.org.uk/developer/patches/
FTTC broadband for 0.8mile line: currently at 9.6Mbps down 400kbps up
according to speedtest.net.
^ permalink raw reply
* [PATCH 1/9] ARM: dts: imx1: Remove skeleton.dtsi
From: Fabio Estevam @ 2016-11-05 19:35 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1473177196-29371-1-git-send-email-fabio.estevam@nxp.com>
Hi Shawn,
On Tue, Sep 6, 2016 at 12:53 PM, Fabio Estevam <fabio.estevam@nxp.com> wrote:
> The inclusion of skeleton.dtsi causes the following build warning:
>
> Warning (unit_address_vs_reg): Node /memory has a reg or ranges property, but no unit name
>
> Instead of fixing skeleton.dtsi, just add the top level definitions
> for address-cells and size-cell and remove its inclusion.
>
> Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Are you OK with this series?
^ permalink raw reply
* [PATCH RFC] ARM: dts: add support for Turris Omnia
From: Uwe Kleine-König @ 2016-11-05 20:38 UTC (permalink / raw)
To: linux-arm-kernel
This machine is an open hardware router by cz.nic driven by a
Marvell Armada 385.
Signed-off-by: Uwe Kleine-K?nig <uwe@kleine-koenig.org>
---
Hello,
the following components are working:
- WAN port
- eMMC
- UART0
- USB
Still missing is support for the switch. Wireless fails to probe, didn't
debug this up to now. SFP is untested as is UART1.
The device tree on the device doesn't specify a board compatible, I added
"turris,omnia". Do I need to "register" turris in vendor-prefixes.txt for that?
@Tomas+Martin: Is this correct at all, or should I better reference cz.nic?
Best regards
Uwe
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/armada-385-turris-omnia.dts | 246 ++++++++++++++++++++++++++
2 files changed, 247 insertions(+)
create mode 100644 arch/arm/boot/dts/armada-385-turris-omnia.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index befcd2619902..f1d3b9ff257e 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -920,6 +920,7 @@ dtb-$(CONFIG_MACH_ARMADA_38X) += \
armada-385-db-ap.dtb \
armada-385-linksys-caiman.dtb \
armada-385-linksys-cobra.dtb \
+ armada-385-turris-omnia.dtb \
armada-388-clearfog.dtb \
armada-388-db.dtb \
armada-388-gp.dtb \
diff --git a/arch/arm/boot/dts/armada-385-turris-omnia.dts b/arch/arm/boot/dts/armada-385-turris-omnia.dts
new file mode 100644
index 000000000000..d3cd8a4d713d
--- /dev/null
+++ b/arch/arm/boot/dts/armada-385-turris-omnia.dts
@@ -0,0 +1,246 @@
+/*
+ * Device Tree file for the Turris Omnia
+ * Schematic available at https://www.turris.cz/doc/_media/rtrom01-schema.pdf
+ *
+ * Copyright (C) 2016 Uwe Kleine-K?nig <uwe@kleine-koenig.org>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without
+ * any warranty of any kind, whether express or implied.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include "armada-385.dtsi"
+
+/ {
+ model = "Turris Omnia";
+ compatible = "turris,omnia", "marvell,armada385", "marvell,armada380";
+
+ chosen {
+ stdout-path = &uart0;
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0x00000000 0x40000000>; /* 1024 MB */
+ };
+
+ soc {
+ ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
+ MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>;
+
+ internal-regs {
+
+ /* USB part of the eSATA/USB 2.0 port */
+ usb at 58000 {
+ status = "okay";
+ };
+
+ sata at a8000 {
+ status = "okay";
+ };
+
+ sdhci at d8000 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdhci_pins>;
+ status = "okay";
+
+ bus-width = <8>;
+ no-1-8-v;
+ non-removable;
+ };
+
+ usb3 at f0000 {
+ status = "okay";
+ };
+
+ usb3 at f8000 {
+ status = "okay";
+ };
+ };
+
+ pcie-controller {
+ status = "okay";
+
+ pcie at 1,0 {
+ /* Port 0, Lane 0 */
+ status = "okay";
+ };
+
+ pcie at 2,0 {
+ /* Port 2, Lane 0 */
+ status = "okay";
+ };
+
+ pcie at 3,0 {
+ /* Port 3, Lane 0 */
+ status = "okay";
+ };
+ };
+ };
+};
+
+ð0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&ge0_rgmii_pins>;
+ status = "okay";
+ phy-mode = "rgmii-id";
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+};
+
+ð1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&ge1_rgmii_pins>;
+ status = "okay";
+ phy-mode = "rgmii-id";
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+};
+
+/* WAN port */
+ð2 {
+ status = "okay";
+ phy-mode = "sgmii";
+ phy = <&phy1>;
+};
+
+&i2c0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0_pins>;
+ status = "okay";
+
+ i2cmux at 70 {
+ compatible = "nxp,pca9547";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x70>;
+ status = "okay";
+
+ i2c at 0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ status = "okay";
+
+ /* STM32F0 at address 0x2a */
+ /* leds device at address 0x2b */
+
+ eeprom at 54 {
+ /* holds configuration about RAM, evaluated by bootloader */
+ compatible = "at,24c64";
+ reg = <0x54>;
+ };
+ };
+
+ i2c at 5 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <5>;
+
+ /* ATSHA204A at address 0x64 */
+ };
+
+ i2c at 6 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <6>;
+
+ /* exposed on pin header */
+ };
+ };
+};
+
+&mdio {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mdio_pins>;
+ status = "okay";
+
+ phy1: phy at 1 {
+ status = "okay";
+ compatible = "marvell,88E1514", "marvell,88E1510", "ethernet-phy-ieee802.3-c22";
+ reg = <1>;
+ };
+};
+
+&pinctrl {
+ spi0cs1_pins: spi0-pins-0cs1 {
+ marvell,pins = "mpp26";
+ marvell,function = "spi0";
+ };
+};
+
+&spi0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi0_pins &spi0cs1_pins>;
+ status = "okay";
+
+ spi-nor at 0 {
+ compatible = "spansion,s25fl164k", "jedec,spi-nor";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0>;
+ spi-max-frequency = <40000000>;
+
+ partition at 0 {
+ reg = <0x0 0x00100000>;
+ label = "U-Boot";
+ };
+
+ partition at 1 {
+ reg = <0x00100000 0x00700000>;
+ label = "Rescue system";
+ };
+ };
+
+ /* @1 is on pin header */
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pins>;
+ status = "okay";
+};
+
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pins>;
+ status = "okay";
+};
--
2.10.2
^ permalink raw reply related
* [PATCH v3 0/2] Add TI SCI Reset Driver
From: santosh.shilimkar at oracle.com @ 2016-11-05 21:01 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161104174240.9688-1-afd@ti.com>
On 11/4/16 11:42 AM, Andrew F. Davis wrote:
> Hello all,
>
> This series adds a reset controller driver that uses the TI SCI
> protocol to manage resets.
>
> The TI SCI protocol is used to communicate with power management
> controllers used by some SoCs. These controllers manage the various
> power domains, clocks, and resets available on a SoC.
>
> This series is based on drivers for TI SCI and the first two controlled
> elements above, these series can be found here:
>
> TI-SCI: http://www.spinics.net/lists/arm-kernel/msg536851.html
> PM Domains: http://www.spinics.net/lists/devicetree/msg146621.html
> Clocks: https://www.spinics.net/lists/linux-clk/msg12785.html
>
> Thanks,
> Andrew
>
> Changes from v2:
> - Merged DT binding patch and reset header patch
> - Added locking for reset bit mask
>
> Changes from v1:
> - Revised dt binding
> - CC Linux ARM list
>
> Andrew F. Davis (2):
> Documentation: dt: reset: Add TI SCI reset binding
> reset: Add the TI SCI reset driver
>
Acked-by: Santosh Shilimkar <ssantosh@kernel.org>
^ permalink raw reply
* [PATCH RFC] ARM: dts: add support for Turris Omnia
From: Andrew Lunn @ 2016-11-05 21:04 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161105203841.9661-1-uwe@kleine-koenig.org>
> +&mdio {
> + pinctrl-names = "default";
> + pinctrl-0 = <&mdio_pins>;
> + status = "okay";
> +
> + phy1: phy at 1 {
> + status = "okay";
> + compatible = "marvell,88E1514", "marvell,88E1510", "ethernet-phy-ieee802.3-c22";
> + reg = <1>;
> + };
phy.txt says:
- compatible: Compatible list, may contain
"ethernet-phy-ieee802.3-c22" or "ethernet-phy-ieee802.3-c45" for
PHYs that implement IEEE802.3 clause 22 or IEEE802.3 clause 45
specifications. If neither of these are specified, the default is to
assume clause 22.
If the phy's identifier is known then the list may contain an entry
of the form: "ethernet-phy-idAAAA.BBBB" where
AAAA - The value of the 16 bit Phy Identifier 1 register as
4 hex digits. This is the chip vendor OUI bits 3:18
BBBB - The value of the 16 bit Phy Identifier 2 register as
4 hex digits. This is the chip vendor OUI bits 19:24,
followed by 10 bits of a vendor specific ID.
The compatible list should not contain other values than those
listed here.
Please don't list the "marvell,*" names.
Andrew
^ permalink raw reply
* [PATCH RFC] ARM: dts: add support for Turris Omnia
From: Andrew Lunn @ 2016-11-05 21:23 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161105203841.9661-1-uwe@kleine-koenig.org>
> Still missing is support for the switch.
Is it a Marvell Switch? armada-370-rd.dts would be a good start for
the old binding? vf610-zii-dev-rev-b.dts uses the new binding.
> SFP is untested as is UART1.
UART would be unusual. They are normally i2c.
> Do I need to "register" turris in vendor-prefixes.txt for that?
Yes please.
Andrew
^ permalink raw reply
* [PATCH RFC] ARM: dts: add support for Turris Omnia
From: Uwe Kleine-König @ 2016-11-05 21:27 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161105212326.GC1216@lunn.ch>
Hello Andrew,
On Sat, Nov 05, 2016 at 10:23:26PM +0100, Andrew Lunn wrote:
> > Still missing is support for the switch.
>
> Is it a Marvell Switch? armada-370-rd.dts would be a good start for
> the old binding? vf610-zii-dev-rev-b.dts uses the new binding.
Yeah, a 88E6176. I already try to understand vf610-zii-dev-rev-b.dts. Do
you know if this driver works for the 88E6176?
> > SFP is untested as is UART1.
>
> UART would be unusual. They are normally i2c.
I wanted to say: SFP is untested, and UART1 is untested too. Yes, SFP is
connected via i2c.
> > Do I need to "register" turris in vendor-prefixes.txt for that?
>
> Yes please.
OK, will wait for Martin to comment what we want there. cznic or turris.
Thanks
Uwe
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* [PATCH RFC] ARM: dts: add support for Turris Omnia
From: Andrew Lunn @ 2016-11-05 21:37 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161105212748.vtdprlxxismy5xmk@perseus.defre.kleine-koenig.org>
On Sat, Nov 05, 2016 at 10:27:49PM +0100, Uwe Kleine-K?nig wrote:
> Hello Andrew,
>
> On Sat, Nov 05, 2016 at 10:23:26PM +0100, Andrew Lunn wrote:
> > > Still missing is support for the switch.
> >
> > Is it a Marvell Switch? armada-370-rd.dts would be a good start for
> > the old binding? vf610-zii-dev-rev-b.dts uses the new binding.
>
> Yeah, a 88E6176. I already try to understand vf610-zii-dev-rev-b.dts. Do
> you know if this driver works for the 88E6176?
Yes it does.
The vf610-zii-dev-rev-b is a bit complex because it has three
switches, and an mdio mux. You should be able to transplant the
switch0: switch0 at 0 part into the mdio node.
Andrew
^ permalink raw reply
* [PATCH RFC] ARM: dts: add support for Turris Omnia
From: Uwe Kleine-König @ 2016-11-05 22:08 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161105210441.GB1216@lunn.ch>
On Sat, Nov 05, 2016 at 10:04:41PM +0100, Andrew Lunn wrote:
> > +&mdio {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&mdio_pins>;
> > + status = "okay";
> > +
> > + phy1: phy at 1 {
> > + status = "okay";
> > + compatible = "marvell,88E1514", "marvell,88E1510", "ethernet-phy-ieee802.3-c22";
> > + reg = <1>;
> > + };
>
> phy.txt says:
>
> - compatible: Compatible list, may contain
> "ethernet-phy-ieee802.3-c22" or "ethernet-phy-ieee802.3-c45" for
> PHYs that implement IEEE802.3 clause 22 or IEEE802.3 clause 45
> specifications. If neither of these are specified, the default is to
> assume clause 22.
>
> If the phy's identifier is known then the list may contain an entry
> of the form: "ethernet-phy-idAAAA.BBBB" where
> AAAA - The value of the 16 bit Phy Identifier 1 register as
> 4 hex digits. This is the chip vendor OUI bits 3:18
> BBBB - The value of the 16 bit Phy Identifier 2 register as
> 4 hex digits. This is the chip vendor OUI bits 19:24,
> followed by 10 bits of a vendor specific ID.
>
> The compatible list should not contain other values than those
> listed here.
>
> Please don't list the "marvell,*" names.
Will do for v2. arch/arm/boot/dts/keystone-* needs fixing in this
regard, too.
Best regards
Uwe
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^ permalink raw reply
* [PATCH 7/8] ARM64: dts: meson-gxl-p23x: Add SD/SDIO/MMC and PWM nodes
From: Kevin Hilman @ 2016-11-05 22:10 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1477932286-27482-8-git-send-email-narmstrong@baylibre.com>
Neil Armstrong <narmstrong@baylibre.com> writes:
> Add SD/SDIO/MMC nodes and PWM 32768Hz clock configuration to provide
> storage and WiFi functionality on the p23x boards.
Just curious... what storage functionality are you referring to here?
Kevin
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
> ---
> .../boot/dts/amlogic/meson-gxl-s905d-p23x.dtsi | 112 +++++++++++++++++++++
> 1 file changed, 112 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p23x.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p23x.dtsi
> index 666fe2b..7830809 100644
> --- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p23x.dtsi
> +++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p23x.dtsi
> @@ -56,6 +56,46 @@
> device_type = "memory";
> reg = <0x0 0x0 0x0 0x80000000>;
> };
> +
> + vddio_boot: regulator-vddio_boot {
> + compatible = "regulator-fixed";
> + regulator-name = "VDDIO_BOOT";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + };
> +
> + vddao_3v3: regulator-vddao_3v3 {
> + compatible = "regulator-fixed";
> + regulator-name = "VDDAO_3V3";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + };
> +
> + vcc_3v3: regulator-vcc_3v3 {
> + compatible = "regulator-fixed";
> + regulator-name = "VCC_3V3";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + };
> +
> + emmc_pwrseq: emmc-pwrseq {
> + compatible = "mmc-pwrseq-emmc";
> + reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
> + };
> +
> + wifi32k: wifi32k {
> + compatible = "pwm-clock";
> + #clock-cells = <0>;
> + clock-frequency = <32768>;
> + pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
> + };
> +
> + sdio_pwrseq: sdio-pwrseq {
> + compatible = "mmc-pwrseq-simple";
> + reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
> + clocks = <&wifi32k>;
> + clock-names = "ext_clock";
> + };
> };
>
> /* This UART is brought out to the DB9 connector */
> @@ -64,3 +104,75 @@
> pinctrl-0 = <&uart_ao_a_pins>;
> pinctrl-names = "default";
> };
> +
> +/* Wireless SDIO Module */
> +&sd_emmc_a {
> + status = "okay";
> + pinctrl-0 = <&sdio_pins>;
> + pinctrl-names = "default";
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + bus-width = <4>;
> + cap-sd-highspeed;
> + max-frequency = <100000000>;
> +
> + non-removable;
> + disable-wp;
> +
> + mmc-pwrseq = <&sdio_pwrseq>;
> +
> + vmmc-supply = <&vddao_3v3>;
> + vqmmc-supply = <&vddio_boot>;
> +
> + brcmf: bcrmf at 1 {
> + reg = <1>;
> + compatible = "brcm,bcm4329-fmac";
> + };
> +};
> +
> +/* SD card */
> +&sd_emmc_b {
> + status = "okay";
> + pinctrl-0 = <&sdcard_pins>;
> + pinctrl-names = "default";
> +
> + bus-width = <4>;
> + cap-sd-highspeed;
> + max-frequency = <100000000>;
> + disable-wp;
> +
> + cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_HIGH>;
> + cd-inverted;
> +
> + vmmc-supply = <&vddao_3v3>;
> + vqmmc-supply = <&vddio_boot>;
> +};
> +
> +/* eMMC */
> +&sd_emmc_c {
> + status = "okay";
> + pinctrl-0 = <&emmc_pins>;
> + pinctrl-names = "default";
> +
> + bus-width = <8>;
> + cap-sd-highspeed;
> + cap-mmc-highspeed;
> + max-frequency = <200000000>;
> + non-removable;
> + disable-wp;
> + mmc-ddr-1_8v;
> + mmc-hs200-1_8v;
> +
> + mmc-pwrseq = <&emmc_pwrseq>;
> + vmmc-supply = <&vcc_3v3>;
> + vqmmc-supply = <&vddio_boot>;
> +};
> +
> +&pwm_ef {
> + status = "okay";
> + pinctrl-0 = <&pwm_e_pins>;
> + pinctrl-names = "default";
> + clocks = <&clkc CLKID_FCLK_DIV4>;
> + clock-names = "clkin0";
> +};
^ permalink raw reply
* [PATCH] clk: rockchip: remove more CLK_IGNORE_UNUSED for rk3399 clocktree
From: Heiko Stuebner @ 2016-11-05 22:14 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1478144333-13436-1-git-send-email-jay.xu@rock-chips.com>
Am Donnerstag, 3. November 2016, 11:38:53 CET schrieb Jianqun Xu:
> Optimize rk3399 clocktree by removing CLK_IGNORE_UNUSED of some clocks.
>
> clocks will managered by usb:
> - clk_usbphy0_480m_src
> - clk_usbphy1_480m_src
> - clk_usbphy_480m
>
> clocks will be managered by pvtm:
> - clk_pvtm_core_l
> - clk_pvtm_core_b
> - clk_pvtm_ddr
>
> clocks will be managered by dfi:
> - pclk_ddr_mon
> - clk_dfimon0_timer
> - clk_dfimon1_timer
> - aclk_dcf
> - pclk_dcf
>
> Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
I gave this a test on a rk3399-gru device and was still able to boot
sucessfully. So I've applied the patch to my clk-branch for 4.10
Thanks
Heiko
^ permalink raw reply
* Low network throughput on i.MX28
From: Jörg Krause @ 2016-11-05 22:37 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1478360733.3405.17.camel@intel.com>
On Sat, 2016-11-05 at 15:45 +0000, Koul, Vinod wrote:
> On Sat, 2016-11-05 at 14:14 +0100, J?rg Krause wrote:
> > On Sat, 2016-11-05 at 12:39 +0000, Koul, Vinod wrote:
> > >
> > > On Sat, 2016-11-05 at 13:06 +0100, J?rg Krause wrote:
> > > >
> > > > @ Vinod
> > > > In short, I noticed poor performance in the SSP2 (MMC/SD/SDIO)
> > > > interface on a custom i.MX28 board with a wifi chip attached.
> > > > Comparing
> > > > the bandwith with iperf I get >20Mbits/sec on the vendor kernel
> > > > and
> > > > <5Mbits/sec on the mainline kernel. I am trying to investigate
> > > > what
> > > > the
> > > > bottleneck is.
> > >
> > > is this imx-dma or imx-sdma..
> > >
> > > >
> > > >
> > > > @ Stefan, all
> > > > My understanding is that the tasklet in this case is
> > > > responsible
> > > > for
> > > > reading the response registers of the DMA controller and return
> > > > the
> > > > response to the MMC host driver.
> > > >
> > > > The vendor kernel does this in the interrupt routine of mxs-mmc
> > > > by
> > > > issueing a complete whereas the mainline kernel does this in
> > > > the
> > > > interrupt routine in mxs-dma by scheduling the tasklet.
> > >
> > > Is vendor kernel using dmaengine APIs or not?
> >
> > It's this engine [1].
> >
> > [1] http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/tre
> > e/a
> > r
> > ch/arm/plat-mxs/dmaengine.c?h=imx_2.6.35_1.1.0
>
> Thanks for info, this looks okay.
>
> First can you confirm that register configuration for DMA transaction
> is
> same in both cases.
They are almost identical. The difference is that the mainline MMC
driver has SDIO IRQ enabled and the APB bus has burst mode enable. Both
don't have any influence.
> Second, looking at the driver I see that interrupt handler is not
> pushing next descriptor. Also the tasklet is doing callback action
> and
> not pushing any descriptors, did I miss anything in this?
Right. However, after observing the registers I noticed that the vendor
MMC kernel driver only issues one DMA command, whereas the mainline
driver issues two chained DMA commands. The relevant function in both
drivers is mxs_mmc_adtc().
The mainline function issues a DMA transaction with setting the PIO
words only and appends the data from the MMC host.
The vendor function copies the MMC host data from the scatterlist into
an owned DMA buffer, sets the buffer address as the next command
address and issues the descriptor to the DMA engine.
> For good dma throughput, you should have multiple dma transactions
> queued up and submitted as fast as possible. Can you check if this is
> being done.?
>
> We need to minimize/eliminate the delay between two transactions.
> This
> can be done in SW or HW based on support from HW. If HW supports
> chaining of descriptors then next transaction which is given to
> dmaengine driver should be appended at the end. If not submit the
> descriptor to hw immediately on interrupt.?
I see! In this particular case, the vendor driver reduces the chaining
of descriptors, whereas the mainline driver chains two DMA commands.
Note, that the i.MX28 hardware does support chaining. So, might this be
an issue for poor performance?
J?rg
^ permalink raw reply
* [PATCH] convert orion5x ls-chl to device tree
From: Ash Hughes @ 2016-11-05 23:02 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <87zilfmn39.fsf@free-electrons.com>
Sorry about that, formatting error with tabs being converted to spaces in email. This should now apply.
Ash
---
>From 398d2c6e5c834e6887a5e6b5e898455977d0c00b Mon Sep 17 00:00:00 2001
From: Ashley Hughes <ashley.hughes@blueyonder.co.uk>
Date: Sun, 9 Oct 2016 17:04:12 +0100
Subject: [PATCH] convert ls-chl to FDT
Signed-off-by: Ashley Hughes <ashley.hughes@blueyonder.co.uk>
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/orion5x-lschl.dts | 171 ++++++++++++++++++
arch/arm/mach-orion5x/Kconfig | 4 +-
arch/arm/mach-orion5x/Makefile | 1 -
arch/arm/mach-orion5x/ls-chl-setup.c | 331 -----------------------------------
5 files changed, 174 insertions(+), 334 deletions(-)
create mode 100644 arch/arm/boot/dts/orion5x-lschl.dts
delete mode 100644 arch/arm/mach-orion5x/ls-chl-setup.c
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index befcd26..4853049 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -597,6 +597,7 @@ dtb-$(CONFIG_ARCH_ORION5X) += \
orion5x-lacie-ethernet-disk-mini-v2.dtb \
orion5x-linkstation-lsgl.dtb \
orion5x-linkstation-lswtgl.dtb \
+ orion5x-lschl.dtb \
orion5x-lswsgl.dtb \
orion5x-maxtor-shared-storage-2.dtb \
orion5x-netgear-wnr854t.dtb \
diff --git a/arch/arm/boot/dts/orion5x-lschl.dts b/arch/arm/boot/dts/orion5x-lschl.dts
new file mode 100644
index 0000000..9474092
--- /dev/null
+++ b/arch/arm/boot/dts/orion5x-lschl.dts
@@ -0,0 +1,171 @@
+/*
+ * Device Tree file for Buffalo Linkstation LS-CHLv3
+ *
+ * Copyright (C) 2016 Ash Hughes <ashley.hughes@blueyonder.co.uk>
+ * Copyright (C) 2015, 2016
+ * Roger Shimizu <rogershimizu@gmail.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+
+#include "orion5x-linkstation.dtsi"
+#include "mvebu-linkstation-gpio-simple.dtsi"
+#include "mvebu-linkstation-fan.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+ model = "Buffalo Linkstation Live v3 (LS-CHL)";
+ compatible = "buffalo,lschl", "marvell,orion5x-88f5182", "marvell,orion5x";
+
+ memory { /* 128 MB */
+ device_type = "memory";
+ reg = <0x00000000 0x8000000>;
+ };
+
+ gpio_keys {
+ func {
+ label = "Function Button";
+ linux,code = <KEY_OPTION>;
+ gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
+ };
+
+ power-on-switch {
+ gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
+ };
+
+ power-auto-switch {
+ gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ gpio_leds {
+ pinctrl-0 = <&pmx_led_power &pmx_led_alarm &pmx_led_info &pmx_led_func>;
+ blue-power-led {
+ gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
+ };
+
+ red-alarm-led {
+ gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
+ };
+
+ amber-info-led {
+ gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
+ };
+
+ func {
+ label = "lschl:func:blue:top";
+ gpios = <&gpio0 17 GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ gpio_fan {
+ gpios = <&gpio0 14 GPIO_ACTIVE_LOW
+ &gpio0 16 GPIO_ACTIVE_LOW>;
+
+ alarm-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
+ };
+};
+
+&pinctrl {
+ pmx_led_power: pmx-leds {
+ marvell,pins = "mpp0";
+ marvell,function = "gpio";
+ };
+
+ pmx_power_hdd: pmx-power-hdd {
+ marvell,pins = "mpp1";
+ marvell,function = "gpio";
+ };
+
+ pmx_led_alarm: pmx-leds {
+ marvell,pins = "mpp2";
+ marvell,function = "gpio";
+ };
+
+ pmx_led_info: pmx-leds {
+ marvell,pins = "mpp3";
+ marvell,function = "gpio";
+ };
+
+ pmx_fan_lock: pmx-fan-lock {
+ marvell,pins = "mpp6";
+ marvell,function = "gpio";
+ };
+
+ pmx_power_switch: pmx-power-switch {
+ marvell,pins = "mpp8", "mpp10", "mpp15";
+ marvell,function = "gpio";
+ };
+
+ pmx_power_usb: pmx-power-usb {
+ marvell,pins = "mpp9";
+ marvell,function = "gpio";
+ };
+
+ pmx_fan_high: pmx-fan-high {
+ marvell,pins = "mpp14";
+ marvell,function = "gpio";
+ };
+
+ pmx_fan_low: pmx-fan-low {
+ marvell,pins = "mpp16";
+ marvell,function = "gpio";
+ };
+
+ pmx_led_func: pmx-leds {
+ marvell,pins = "mpp17";
+ marvell,function = "gpio";
+ };
+
+ pmx_sw_init: pmx-sw-init {
+ marvell,pins = "mpp7";
+ marvell,function = "gpio";
+ };
+};
+
+&hdd_power {
+ gpios = <&gpio0 1 GPIO_ACTIVE_HIGH>;
+};
+
+&usb_power {
+ gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;
+};
+
diff --git a/arch/arm/mach-orion5x/Kconfig b/arch/arm/mach-orion5x/Kconfig
index 89bb0fc..793efa9 100644
--- a/arch/arm/mach-orion5x/Kconfig
+++ b/arch/arm/mach-orion5x/Kconfig
@@ -85,8 +85,8 @@ config MACH_LINKSTATION_PRO
v2 devices are supported.
config MACH_LINKSTATION_LSCHL
- bool "Buffalo Linkstation Live v3 (LS-CHL)"
- select I2C_BOARDINFO if I2C
+ bool "Buffalo Linkstation Live v3 (LS-CHL) (Flattened Device Tree)"
+ select ARCH_ORION5X_DT
help
Say 'Y' here if you want your kernel to support the
Buffalo Linkstation Live v3 (LS-CHL) platform.
diff --git a/arch/arm/mach-orion5x/Makefile b/arch/arm/mach-orion5x/Makefile
index 4b2502b..ae91872 100644
--- a/arch/arm/mach-orion5x/Makefile
+++ b/arch/arm/mach-orion5x/Makefile
@@ -18,7 +18,6 @@ obj-$(CONFIG_MACH_WNR854T) += wnr854t-setup.o
obj-$(CONFIG_MACH_RD88F5181L_GE) += rd88f5181l-ge-setup.o
obj-$(CONFIG_MACH_RD88F5181L_FXO) += rd88f5181l-fxo-setup.o
obj-$(CONFIG_MACH_RD88F6183AP_GE) += rd88f6183ap-ge-setup.o
-obj-$(CONFIG_MACH_LINKSTATION_LSCHL) += ls-chl-setup.o
obj-$(CONFIG_ARCH_ORION5X_DT) += board-dt.o
obj-$(CONFIG_MACH_D2NET_DT) += board-d2net.o
diff --git a/arch/arm/mach-orion5x/ls-chl-setup.c b/arch/arm/mach-orion5x/ls-chl-setup.c
deleted file mode 100644
index dfdaa8a..0000000
--- a/arch/arm/mach-orion5x/ls-chl-setup.c
+++ /dev/null
@@ -1,331 +0,0 @@
-/*
- * arch/arm/mach-orion5x/ls-chl-setup.c
- *
- * Maintainer: Ash Hughes <ashley.hughes@blueyonder.co.uk>
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/platform_device.h>
-#include <linux/mtd/physmap.h>
-#include <linux/mv643xx_eth.h>
-#include <linux/leds.h>
-#include <linux/gpio_keys.h>
-#include <linux/gpio-fan.h>
-#include <linux/input.h>
-#include <linux/i2c.h>
-#include <linux/ata_platform.h>
-#include <linux/gpio.h>
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-#include "common.h"
-#include "mpp.h"
-#include "orion5x.h"
-
-/*****************************************************************************
- * Linkstation LS-CHL Info
- ****************************************************************************/
-
-/*
- * 256K NOR flash Device bus boot chip select
- */
-
-#define LSCHL_NOR_BOOT_BASE 0xf4000000
-#define LSCHL_NOR_BOOT_SIZE SZ_256K
-
-/*****************************************************************************
- * 256KB NOR Flash on BOOT Device
- ****************************************************************************/
-
-static struct physmap_flash_data lschl_nor_flash_data = {
- .width = 1,
-};
-
-static struct resource lschl_nor_flash_resource = {
- .flags = IORESOURCE_MEM,
- .start = LSCHL_NOR_BOOT_BASE,
- .end = LSCHL_NOR_BOOT_BASE + LSCHL_NOR_BOOT_SIZE - 1,
-};
-
-static struct platform_device lschl_nor_flash = {
- .name = "physmap-flash",
- .id = 0,
- .dev = {
- .platform_data = &lschl_nor_flash_data,
- },
- .num_resources = 1,
- .resource = &lschl_nor_flash_resource,
-};
-
-/*****************************************************************************
- * Ethernet
- ****************************************************************************/
-
-static struct mv643xx_eth_platform_data lschl_eth_data = {
- .phy_addr = MV643XX_ETH_PHY_ADDR(8),
-};
-
-/*****************************************************************************
- * RTC 5C372a on I2C bus
- ****************************************************************************/
-
-static struct i2c_board_info __initdata lschl_i2c_rtc = {
- I2C_BOARD_INFO("rs5c372a", 0x32),
-};
-
-/*****************************************************************************
- * LEDs attached to GPIO
- ****************************************************************************/
-
-#define LSCHL_GPIO_LED_ALARM 2
-#define LSCHL_GPIO_LED_INFO 3
-#define LSCHL_GPIO_LED_FUNC 17
-#define LSCHL_GPIO_LED_PWR 0
-
-static struct gpio_led lschl_led_pins[] = {
- {
- .name = "alarm:red",
- .gpio = LSCHL_GPIO_LED_ALARM,
- .active_low = 1,
- }, {
- .name = "info:amber",
- .gpio = LSCHL_GPIO_LED_INFO,
- .active_low = 1,
- }, {
- .name = "func:blue:top",
- .gpio = LSCHL_GPIO_LED_FUNC,
- .active_low = 1,
- }, {
- .name = "power:blue:bottom",
- .gpio = LSCHL_GPIO_LED_PWR,
- },
-};
-
-static struct gpio_led_platform_data lschl_led_data = {
- .leds = lschl_led_pins,
- .num_leds = ARRAY_SIZE(lschl_led_pins),
-};
-
-static struct platform_device lschl_leds = {
- .name = "leds-gpio",
- .id = -1,
- .dev = {
- .platform_data = &lschl_led_data,
- },
-};
-
-/*****************************************************************************
- * SATA
- ****************************************************************************/
-static struct mv_sata_platform_data lschl_sata_data = {
- .n_ports = 2,
-};
-
-/*****************************************************************************
- * LS-CHL specific power off method: reboot
- ****************************************************************************/
-/*
- * On the LS-CHL, the shutdown process is following:
- * - Userland monitors key events until the power switch goes to off position
- * - The board reboots
- * - U-boot starts and goes into an idle mode waiting for the user
- * to move the switch to ON position
- *
- */
-
-static void lschl_power_off(void)
-{
- orion5x_restart(REBOOT_HARD, NULL);
-}
-
-/*****************************************************************************
- * General Setup
- ****************************************************************************/
-#define LSCHL_GPIO_USB_POWER 9
-#define LSCHL_GPIO_AUTO_POWER 17
-#define LSCHL_GPIO_POWER 18
-
-/****************************************************************************
- * GPIO Attached Keys
- ****************************************************************************/
-#define LSCHL_GPIO_KEY_FUNC 15
-#define LSCHL_GPIO_KEY_POWER 8
-#define LSCHL_GPIO_KEY_AUTOPOWER 10
-#define LSCHL_SW_POWER 0x00
-#define LSCHL_SW_AUTOPOWER 0x01
-#define LSCHL_SW_FUNC 0x02
-
-static struct gpio_keys_button lschl_buttons[] = {
- {
- .type = EV_SW,
- .code = LSCHL_SW_POWER,
- .gpio = LSCHL_GPIO_KEY_POWER,
- .desc = "Power-on Switch",
- .active_low = 1,
- }, {
- .type = EV_SW,
- .code = LSCHL_SW_AUTOPOWER,
- .gpio = LSCHL_GPIO_KEY_AUTOPOWER,
- .desc = "Power-auto Switch",
- .active_low = 1,
- }, {
- .type = EV_SW,
- .code = LSCHL_SW_FUNC,
- .gpio = LSCHL_GPIO_KEY_FUNC,
- .desc = "Function Switch",
- .active_low = 1,
- },
-};
-
-static struct gpio_keys_platform_data lschl_button_data = {
- .buttons = lschl_buttons,
- .nbuttons = ARRAY_SIZE(lschl_buttons),
-};
-
-static struct platform_device lschl_button_device = {
- .name = "gpio-keys",
- .id = -1,
- .num_resources = 0,
- .dev = {
- .platform_data = &lschl_button_data,
- },
-};
-
-#define LSCHL_GPIO_HDD_POWER 1
-
-/****************************************************************************
- * GPIO Fan
- ****************************************************************************/
-
-#define LSCHL_GPIO_FAN_LOW 16
-#define LSCHL_GPIO_FAN_HIGH 14
-#define LSCHL_GPIO_FAN_LOCK 6
-
-static struct gpio_fan_alarm lschl_alarm = {
- .gpio = LSCHL_GPIO_FAN_LOCK,
-};
-
-static struct gpio_fan_speed lschl_speeds[] = {
- {
- .rpm = 0,
- .ctrl_val = 3,
- }, {
- .rpm = 1500,
- .ctrl_val = 2,
- }, {
- .rpm = 3250,
- .ctrl_val = 1,
- }, {
- .rpm = 5000,
- .ctrl_val = 0,
- },
-};
-
-static int lschl_gpio_list[] = {
- LSCHL_GPIO_FAN_HIGH, LSCHL_GPIO_FAN_LOW,
-};
-
-static struct gpio_fan_platform_data lschl_fan_data = {
- .num_ctrl = ARRAY_SIZE(lschl_gpio_list),
- .ctrl = lschl_gpio_list,
- .alarm = &lschl_alarm,
- .num_speed = ARRAY_SIZE(lschl_speeds),
- .speed = lschl_speeds,
-};
-
-static struct platform_device lschl_fan_device = {
- .name = "gpio-fan",
- .id = -1,
- .num_resources = 0,
- .dev = {
- .platform_data = &lschl_fan_data,
- },
-};
-
-/****************************************************************************
- * GPIO Data
- ****************************************************************************/
-
-static unsigned int lschl_mpp_modes[] __initdata = {
- MPP0_GPIO, /* LED POWER */
- MPP1_GPIO, /* HDD POWER */
- MPP2_GPIO, /* LED ALARM */
- MPP3_GPIO, /* LED INFO */
- MPP4_UNUSED,
- MPP5_UNUSED,
- MPP6_GPIO, /* FAN LOCK */
- MPP7_GPIO, /* SW INIT */
- MPP8_GPIO, /* SW POWER */
- MPP9_GPIO, /* USB POWER */
- MPP10_GPIO, /* SW AUTO POWER */
- MPP11_UNUSED,
- MPP12_UNUSED,
- MPP13_UNUSED,
- MPP14_GPIO, /* FAN HIGH */
- MPP15_GPIO, /* SW FUNC */
- MPP16_GPIO, /* FAN LOW */
- MPP17_GPIO, /* LED FUNC */
- MPP18_UNUSED,
- MPP19_UNUSED,
- 0,
-};
-
-static void __init lschl_init(void)
-{
- /*
- * Setup basic Orion functions. Needs to be called early.
- */
- orion5x_init();
-
- orion5x_mpp_conf(lschl_mpp_modes);
-
- /*
- * Configure peripherals.
- */
- orion5x_ehci0_init();
- orion5x_ehci1_init();
- orion5x_eth_init(&lschl_eth_data);
- orion5x_i2c_init();
- orion5x_sata_init(&lschl_sata_data);
- orion5x_uart0_init();
- orion5x_xor_init();
-
- mvebu_mbus_add_window_by_id(ORION_MBUS_DEVBUS_BOOT_TARGET,
- ORION_MBUS_DEVBUS_BOOT_ATTR,
- LSCHL_NOR_BOOT_BASE,
- LSCHL_NOR_BOOT_SIZE);
- platform_device_register(&lschl_nor_flash);
-
- platform_device_register(&lschl_leds);
-
- platform_device_register(&lschl_button_device);
-
- platform_device_register(&lschl_fan_device);
-
- i2c_register_board_info(0, &lschl_i2c_rtc, 1);
-
- /* usb power on */
- gpio_set_value(LSCHL_GPIO_USB_POWER, 1);
-
- /* register power-off method */
- pm_power_off = lschl_power_off;
-
- pr_info("%s: finished\n", __func__);
-}
-
-MACHINE_START(LINKSTATION_LSCHL, "Buffalo Linkstation LiveV3 (LS-CHL)")
- /* Maintainer: Ash Hughes <ashley.hughes@blueyonder.co.uk> */
- .atag_offset = 0x100,
- .nr_irqs = ORION5X_NR_IRQS,
- .init_machine = lschl_init,
- .map_io = orion5x_map_io,
- .init_early = orion5x_init_early,
- .init_irq = orion5x_init_irq,
- .init_time = orion5x_timer_init,
- .fixup = tag_fixup_mem32,
- .restart = orion5x_restart,
-MACHINE_END
--
2.7.4
On 04/11/16 12:44, Gregory CLEMENT wrote:
> Hi Ash,
>
> On mar., oct. 25 2016, Ash Hughes <sehguh.hsa@gmail.com> wrote:
>
>> Hi all,
>>
>> This patch converts my orion5x ls-chl Linkstation device to device
>> tree.
> I was about to apply your patch but it does not apply on mvebu/dt or
> even on v4.9-rc1.
>
> Could you rebase it?
>
> Thanks,
>
> Gregory
>
>> Signed-off-by: Ashley Hughes <ashley.hughes@blueyonder.co.uk>
>> ---
>> arch/arm/boot/dts/Makefile | 1 +
>> arch/arm/boot/dts/orion5x-lschl.dts | 171 ++++++++++++++++++
>> arch/arm/mach-orion5x/Kconfig | 4 +-
>> arch/arm/mach-orion5x/Makefile | 1 -
>> arch/arm/mach-orion5x/ls-chl-setup.c | 331 -----------------------------------
>> 5 files changed, 174 insertions(+), 334 deletions(-)
>> create mode 100644 arch/arm/boot/dts/orion5x-lschl.dts
>> delete mode 100644 arch/arm/mach-orion5x/ls-chl-setup.c
>>
>> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
>> index befcd26..4853049 100644
>> --- a/arch/arm/boot/dts/Makefile
>> +++ b/arch/arm/boot/dts/Makefile
>> @@ -597,6 +597,7 @@ dtb-$(CONFIG_ARCH_ORION5X) += \
>> orion5x-lacie-ethernet-disk-mini-v2.dtb \
>> orion5x-linkstation-lsgl.dtb \
>> orion5x-linkstation-lswtgl.dtb \
>> + orion5x-lschl.dtb \
>> orion5x-lswsgl.dtb \
>> orion5x-maxtor-shared-storage-2.dtb \
>> orion5x-netgear-wnr854t.dtb \
>> diff --git a/arch/arm/boot/dts/orion5x-lschl.dts b/arch/arm/boot/dts/orion5x-lschl.dts
>> new file mode 100644
>> index 0000000..9474092
>> --- /dev/null
>> +++ b/arch/arm/boot/dts/orion5x-lschl.dts
>> @@ -0,0 +1,171 @@
>> +/*
>> + * Device Tree file for Buffalo Linkstation LS-CHLv3
>> + *
>> + * Copyright (C) 2016 Ash Hughes <ashley.hughes@blueyonder.co.uk>
>> + * Copyright (C) 2015, 2016
>> + * Roger Shimizu <rogershimizu@gmail.com>
>> + *
>> + * This file is dual-licensed: you can use it either under the terms
>> + * of the GPL or the X11 license, at your option. Note that this dual
>> + * licensing only applies to this file, and not this project as a
>> + * whole.
>> + *
>> + * a) This file is free software; you can redistribute it and/or
>> + * modify it under the terms of the GNU General Public License as
>> + * published by the Free Software Foundation; either version 2 of the
>> + * License, or (at your option) any later version.
>> + *
>> + * This file is distributed in the hope that it will be useful
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>> + * GNU General Public License for more details.
>> + *
>> + * Or, alternatively
>> + *
>> + * b) Permission is hereby granted, free of charge, to any person
>> + * obtaining a copy of this software and associated documentation
>> + * files (the "Software"), to deal in the Software without
>> + * restriction, including without limitation the rights to use
>> + * copy, modify, merge, publish, distribute, sublicense, and/or
>> + * sell copies of the Software, and to permit persons to whom the
>> + * Software is furnished to do so, subject to the following
>> + * conditions:
>> + *
>> + * The above copyright notice and this permission notice shall be
>> + * included in all copies or substantial portions of the Software.
>> + *
>> + * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
>> + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
>> + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
>> + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
>> + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
>> + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
>> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
>> + * OTHER DEALINGS IN THE SOFTWARE.
>> + */
>> +
>> +/dts-v1/;
>> +
>> +#include "orion5x-linkstation.dtsi"
>> +#include "mvebu-linkstation-gpio-simple.dtsi"
>> +#include "mvebu-linkstation-fan.dtsi"
>> +#include <dt-bindings/gpio/gpio.h>
>> +
>> +/ {
>> + model = "Buffalo Linkstation Live v3 (LS-CHL)";
>> + compatible = "buffalo,lschl", "marvell,orion5x-88f5182", "marvell,orion5x";
>> +
>> + memory { /* 128 MB */
>> + device_type = "memory";
>> + reg = <0x00000000 0x8000000>;
>> + };
>> +
>> + gpio_keys {
>> + func {
>> + label = "Function Button";
>> + linux,code = <KEY_OPTION>;
>> + gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
>> + };
>> +
>> + power-on-switch {
>> + gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
>> + };
>> +
>> + power-auto-switch {
>> + gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
>> + };
>> + };
>> +
>> + gpio_leds {
>> + pinctrl-0 = <&pmx_led_power &pmx_led_alarm &pmx_led_info &pmx_led_func>;
>> + blue-power-led {
>> + gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
>> + };
>> +
>> + red-alarm-led {
>> + gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
>> + };
>> +
>> + amber-info-led {
>> + gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
>> + };
>> +
>> + func {
>> + label = "lschl:func:blue:top";
>> + gpios = <&gpio0 17 GPIO_ACTIVE_LOW>;
>> + };
>> + };
>> +
>> + gpio_fan {
>> + gpios = <&gpio0 14 GPIO_ACTIVE_LOW
>> + &gpio0 16 GPIO_ACTIVE_LOW>;
>> +
>> + alarm-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
>> + };
>> +};
>> +
>> +&pinctrl {
>> + pmx_led_power: pmx-leds {
>> + marvell,pins = "mpp0";
>> + marvell,function = "gpio";
>> + };
>> +
>> + pmx_power_hdd: pmx-power-hdd {
>> + marvell,pins = "mpp1";
>> + marvell,function = "gpio";
>> + };
>> +
>> + pmx_led_alarm: pmx-leds {
>> + marvell,pins = "mpp2";
>> + marvell,function = "gpio";
>> + };
>> +
>> + pmx_led_info: pmx-leds {
>> + marvell,pins = "mpp3";
>> + marvell,function = "gpio";
>> + };
>> +
>> + pmx_fan_lock: pmx-fan-lock {
>> + marvell,pins = "mpp6";
>> + marvell,function = "gpio";
>> + };
>> +
>> + pmx_power_switch: pmx-power-switch {
>> + marvell,pins = "mpp8", "mpp10", "mpp15";
>> + marvell,function = "gpio";
>> + };
>> +
>> + pmx_power_usb: pmx-power-usb {
>> + marvell,pins = "mpp9";
>> + marvell,function = "gpio";
>> + };
>> +
>> + pmx_fan_high: pmx-fan-high {
>> + marvell,pins = "mpp14";
>> + marvell,function = "gpio";
>> + };
>> +
>> + pmx_fan_low: pmx-fan-low {
>> + marvell,pins = "mpp16";
>> + marvell,function = "gpio";
>> + };
>> +
>> + pmx_led_func: pmx-leds {
>> + marvell,pins = "mpp17";
>> + marvell,function = "gpio";
>> + };
>> +
>> + pmx_sw_init: pmx-sw-init {
>> + marvell,pins = "mpp7";
>> + marvell,function = "gpio";
>> + };
>> +};
>> +
>> +&hdd_power {
>> + gpios = <&gpio0 1 GPIO_ACTIVE_HIGH>;
>> +};
>> +
>> +&usb_power {
>> + gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;
>> +};
>> +
>> diff --git a/arch/arm/mach-orion5x/Kconfig b/arch/arm/mach-orion5x/Kconfig
>> index 89bb0fc..793efa9 100644
>> --- a/arch/arm/mach-orion5x/Kconfig
>> +++ b/arch/arm/mach-orion5x/Kconfig
>> @@ -85,8 +85,8 @@ config MACH_LINKSTATION_PRO
>> v2 devices are supported.
>>
>> config MACH_LINKSTATION_LSCHL
>> - bool "Buffalo Linkstation Live v3 (LS-CHL)"
>> - select I2C_BOARDINFO if I2C
>> + bool "Buffalo Linkstation Live v3 (LS-CHL) (Flattened Device Tree)"
>> + select ARCH_ORION5X_DT
>> help
>> Say 'Y' here if you want your kernel to support the
>> Buffalo Linkstation Live v3 (LS-CHL) platform.
>> diff --git a/arch/arm/mach-orion5x/Makefile b/arch/arm/mach-orion5x/Makefile
>> index 4b2502b..ae91872 100644
>> --- a/arch/arm/mach-orion5x/Makefile
>> +++ b/arch/arm/mach-orion5x/Makefile
>> @@ -18,7 +18,6 @@ obj-$(CONFIG_MACH_WNR854T) += wnr854t-setup.o
>> obj-$(CONFIG_MACH_RD88F5181L_GE) += rd88f5181l-ge-setup.o
>> obj-$(CONFIG_MACH_RD88F5181L_FXO) += rd88f5181l-fxo-setup.o
>> obj-$(CONFIG_MACH_RD88F6183AP_GE) += rd88f6183ap-ge-setup.o
>> -obj-$(CONFIG_MACH_LINKSTATION_LSCHL) += ls-chl-setup.o
>>
>> obj-$(CONFIG_ARCH_ORION5X_DT) += board-dt.o
>> obj-$(CONFIG_MACH_D2NET_DT) += board-d2net.o
>> diff --git a/arch/arm/mach-orion5x/ls-chl-setup.c b/arch/arm/mach-orion5x/ls-chl-setup.c
>> deleted file mode 100644
>> index dfdaa8a..0000000
>> --- a/arch/arm/mach-orion5x/ls-chl-setup.c
>> +++ /dev/null
>> @@ -1,331 +0,0 @@
>> -/*
>> - * arch/arm/mach-orion5x/ls-chl-setup.c
>> - *
>> - * Maintainer: Ash Hughes <ashley.hughes@blueyonder.co.uk>
>> - *
>> - * This file is licensed under the terms of the GNU General Public
>> - * License version 2. This program is licensed "as is" without any
>> - * warranty of any kind, whether express or implied.
>> - */
>> -
>> -#include <linux/kernel.h>
>> -#include <linux/init.h>
>> -#include <linux/platform_device.h>
>> -#include <linux/mtd/physmap.h>
>> -#include <linux/mv643xx_eth.h>
>> -#include <linux/leds.h>
>> -#include <linux/gpio_keys.h>
>> -#include <linux/gpio-fan.h>
>> -#include <linux/input.h>
>> -#include <linux/i2c.h>
>> -#include <linux/ata_platform.h>
>> -#include <linux/gpio.h>
>> -#include <asm/mach-types.h>
>> -#include <asm/mach/arch.h>
>> -#include "common.h"
>> -#include "mpp.h"
>> -#include "orion5x.h"
>> -
>> -/*****************************************************************************
>> - * Linkstation LS-CHL Info
>> - ****************************************************************************/
>> -
>> -/*
>> - * 256K NOR flash Device bus boot chip select
>> - */
>> -
>> -#define LSCHL_NOR_BOOT_BASE 0xf4000000
>> -#define LSCHL_NOR_BOOT_SIZE SZ_256K
>> -
>> -/*****************************************************************************
>> - * 256KB NOR Flash on BOOT Device
>> - ****************************************************************************/
>> -
>> -static struct physmap_flash_data lschl_nor_flash_data = {
>> - .width = 1,
>> -};
>> -
>> -static struct resource lschl_nor_flash_resource = {
>> - .flags = IORESOURCE_MEM,
>> - .start = LSCHL_NOR_BOOT_BASE,
>> - .end = LSCHL_NOR_BOOT_BASE + LSCHL_NOR_BOOT_SIZE - 1,
>> -};
>> -
>> -static struct platform_device lschl_nor_flash = {
>> - .name = "physmap-flash",
>> - .id = 0,
>> - .dev = {
>> - .platform_data = &lschl_nor_flash_data,
>> - },
>> - .num_resources = 1,
>> - .resource = &lschl_nor_flash_resource,
>> -};
>> -
>> -/*****************************************************************************
>> - * Ethernet
>> - ****************************************************************************/
>> -
>> -static struct mv643xx_eth_platform_data lschl_eth_data = {
>> - .phy_addr = MV643XX_ETH_PHY_ADDR(8),
>> -};
>> -
>> -/*****************************************************************************
>> - * RTC 5C372a on I2C bus
>> - ****************************************************************************/
>> -
>> -static struct i2c_board_info __initdata lschl_i2c_rtc = {
>> - I2C_BOARD_INFO("rs5c372a", 0x32),
>> -};
>> -
>> -/*****************************************************************************
>> - * LEDs attached to GPIO
>> - ****************************************************************************/
>> -
>> -#define LSCHL_GPIO_LED_ALARM 2
>> -#define LSCHL_GPIO_LED_INFO 3
>> -#define LSCHL_GPIO_LED_FUNC 17
>> -#define LSCHL_GPIO_LED_PWR 0
>> -
>> -static struct gpio_led lschl_led_pins[] = {
>> - {
>> - .name = "alarm:red",
>> - .gpio = LSCHL_GPIO_LED_ALARM,
>> - .active_low = 1,
>> - }, {
>> - .name = "info:amber",
>> - .gpio = LSCHL_GPIO_LED_INFO,
>> - .active_low = 1,
>> - }, {
>> - .name = "func:blue:top",
>> - .gpio = LSCHL_GPIO_LED_FUNC,
>> - .active_low = 1,
>> - }, {
>> - .name = "power:blue:bottom",
>> - .gpio = LSCHL_GPIO_LED_PWR,
>> - },
>> -};
>> -
>> -static struct gpio_led_platform_data lschl_led_data = {
>> - .leds = lschl_led_pins,
>> - .num_leds = ARRAY_SIZE(lschl_led_pins),
>> -};
>> -
>> -static struct platform_device lschl_leds = {
>> - .name = "leds-gpio",
>> - .id = -1,
>> - .dev = {
>> - .platform_data = &lschl_led_data,
>> - },
>> -};
>> -
>> -/*****************************************************************************
>> - * SATA
>> - ****************************************************************************/
>> -static struct mv_sata_platform_data lschl_sata_data = {
>> - .n_ports = 2,
>> -};
>> -
>> -/*****************************************************************************
>> - * LS-CHL specific power off method: reboot
>> - ****************************************************************************/
>> -/*
>> - * On the LS-CHL, the shutdown process is following:
>> - * - Userland monitors key events until the power switch goes to off position
>> - * - The board reboots
>> - * - U-boot starts and goes into an idle mode waiting for the user
>> - * to move the switch to ON position
>> - *
>> - */
>> -
>> -static void lschl_power_off(void)
>> -{
>> - orion5x_restart(REBOOT_HARD, NULL);
>> -}
>> -
>> -/*****************************************************************************
>> - * General Setup
>> - ****************************************************************************/
>> -#define LSCHL_GPIO_USB_POWER 9
>> -#define LSCHL_GPIO_AUTO_POWER 17
>> -#define LSCHL_GPIO_POWER 18
>> -
>> -/****************************************************************************
>> - * GPIO Attached Keys
>> - ****************************************************************************/
>> -#define LSCHL_GPIO_KEY_FUNC 15
>> -#define LSCHL_GPIO_KEY_POWER 8
>> -#define LSCHL_GPIO_KEY_AUTOPOWER 10
>> -#define LSCHL_SW_POWER 0x00
>> -#define LSCHL_SW_AUTOPOWER 0x01
>> -#define LSCHL_SW_FUNC 0x02
>> -
>> -static struct gpio_keys_button lschl_buttons[] = {
>> - {
>> - .type = EV_SW,
>> - .code = LSCHL_SW_POWER,
>> - .gpio = LSCHL_GPIO_KEY_POWER,
>> - .desc = "Power-on Switch",
>> - .active_low = 1,
>> - }, {
>> - .type = EV_SW,
>> - .code = LSCHL_SW_AUTOPOWER,
>> - .gpio = LSCHL_GPIO_KEY_AUTOPOWER,
>> - .desc = "Power-auto Switch",
>> - .active_low = 1,
>> - }, {
>> - .type = EV_SW,
>> - .code = LSCHL_SW_FUNC,
>> - .gpio = LSCHL_GPIO_KEY_FUNC,
>> - .desc = "Function Switch",
>> - .active_low = 1,
>> - },
>> -};
>> -
>> -static struct gpio_keys_platform_data lschl_button_data = {
>> - .buttons = lschl_buttons,
>> - .nbuttons = ARRAY_SIZE(lschl_buttons),
>> -};
>> -
>> -static struct platform_device lschl_button_device = {
>> - .name = "gpio-keys",
>> - .id = -1,
>> - .num_resources = 0,
>> - .dev = {
>> - .platform_data = &lschl_button_data,
>> - },
>> -};
>> -
>> -#define LSCHL_GPIO_HDD_POWER 1
>> -
>> -/****************************************************************************
>> - * GPIO Fan
>> - ****************************************************************************/
>> -
>> -#define LSCHL_GPIO_FAN_LOW 16
>> -#define LSCHL_GPIO_FAN_HIGH 14
>> -#define LSCHL_GPIO_FAN_LOCK 6
>> -
>> -static struct gpio_fan_alarm lschl_alarm = {
>> - .gpio = LSCHL_GPIO_FAN_LOCK,
>> -};
>> -
>> -static struct gpio_fan_speed lschl_speeds[] = {
>> - {
>> - .rpm = 0,
>> - .ctrl_val = 3,
>> - }, {
>> - .rpm = 1500,
>> - .ctrl_val = 2,
>> - }, {
>> - .rpm = 3250,
>> - .ctrl_val = 1,
>> - }, {
>> - .rpm = 5000,
>> - .ctrl_val = 0,
>> - },
>> -};
>> -
>> -static int lschl_gpio_list[] = {
>> - LSCHL_GPIO_FAN_HIGH, LSCHL_GPIO_FAN_LOW,
>> -};
>> -
>> -static struct gpio_fan_platform_data lschl_fan_data = {
>> - .num_ctrl = ARRAY_SIZE(lschl_gpio_list),
>> - .ctrl = lschl_gpio_list,
>> - .alarm = &lschl_alarm,
>> - .num_speed = ARRAY_SIZE(lschl_speeds),
>> - .speed = lschl_speeds,
>> -};
>> -
>> -static struct platform_device lschl_fan_device = {
>> - .name = "gpio-fan",
>> - .id = -1,
>> - .num_resources = 0,
>> - .dev = {
>> - .platform_data = &lschl_fan_data,
>> - },
>> -};
>> -
>> -/****************************************************************************
>> - * GPIO Data
>> - ****************************************************************************/
>> -
>> -static unsigned int lschl_mpp_modes[] __initdata = {
>> - MPP0_GPIO, /* LED POWER */
>> - MPP1_GPIO, /* HDD POWER */
>> - MPP2_GPIO, /* LED ALARM */
>> - MPP3_GPIO, /* LED INFO */
>> - MPP4_UNUSED,
>> - MPP5_UNUSED,
>> - MPP6_GPIO, /* FAN LOCK */
>> - MPP7_GPIO, /* SW INIT */
>> - MPP8_GPIO, /* SW POWER */
>> - MPP9_GPIO, /* USB POWER */
>> - MPP10_GPIO, /* SW AUTO POWER */
>> - MPP11_UNUSED,
>> - MPP12_UNUSED,
>> - MPP13_UNUSED,
>> - MPP14_GPIO, /* FAN HIGH */
>> - MPP15_GPIO, /* SW FUNC */
>> - MPP16_GPIO, /* FAN LOW */
>> - MPP17_GPIO, /* LED FUNC */
>> - MPP18_UNUSED,
>> - MPP19_UNUSED,
>> - 0,
>> -};
>> -
>> -static void __init lschl_init(void)
>> -{
>> - /*
>> - * Setup basic Orion functions. Needs to be called early.
>> - */
>> - orion5x_init();
>> -
>> - orion5x_mpp_conf(lschl_mpp_modes);
>> -
>> - /*
>> - * Configure peripherals.
>> - */
>> - orion5x_ehci0_init();
>> - orion5x_ehci1_init();
>> - orion5x_eth_init(&lschl_eth_data);
>> - orion5x_i2c_init();
>> - orion5x_sata_init(&lschl_sata_data);
>> - orion5x_uart0_init();
>> - orion5x_xor_init();
>> -
>> - mvebu_mbus_add_window_by_id(ORION_MBUS_DEVBUS_BOOT_TARGET,
>> - ORION_MBUS_DEVBUS_BOOT_ATTR,
>> - LSCHL_NOR_BOOT_BASE,
>> - LSCHL_NOR_BOOT_SIZE);
>> - platform_device_register(&lschl_nor_flash);
>> -
>> - platform_device_register(&lschl_leds);
>> -
>> - platform_device_register(&lschl_button_device);
>> -
>> - platform_device_register(&lschl_fan_device);
>> -
>> - i2c_register_board_info(0, &lschl_i2c_rtc, 1);
>> -
>> - /* usb power on */
>> - gpio_set_value(LSCHL_GPIO_USB_POWER, 1);
>> -
>> - /* register power-off method */
>> - pm_power_off = lschl_power_off;
>> -
>> - pr_info("%s: finished\n", __func__);
>> -}
>> -
>> -MACHINE_START(LINKSTATION_LSCHL, "Buffalo Linkstation LiveV3 (LS-CHL)")
>> - /* Maintainer: Ash Hughes <ashley.hughes@blueyonder.co.uk> */
>> - .atag_offset = 0x100,
>> - .nr_irqs = ORION5X_NR_IRQS,
>> - .init_machine = lschl_init,
>> - .map_io = orion5x_map_io,
>> - .init_early = orion5x_init_early,
>> - .init_irq = orion5x_init_irq,
>> - .init_time = orion5x_timer_init,
>> - .fixup = tag_fixup_mem32,
>> - .restart = orion5x_restart,
>> -MACHINE_END
>> -- 2.7.4
>>
>>
^ permalink raw reply related
* [PATCH] MAINTAINERS: Update Broadcom Vulcan maintainer email
From: Florian Fainelli @ 2016-11-06 0:26 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1478249673-8163-1-git-send-email-c.jayachandran@gmail.com>
Le 04/11/2016 ? 01:54, Jayachandran C a ?crit :
> Update Broadcom Vulcan maintainer's email address, the broadcom.com
> address is no longer valid.
>
> Signed-off-by: Jayachandran C <c.jayachandran@gmail.com>
Applied; thanks JC!
--
Florian
^ permalink raw reply
* [PATCH 13/22] mtd: nand: lpc32xx: return error code of nand_scan_ident/tail() on error
From: Vladimir Zapolskiy @ 2016-11-06 1:37 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1478256190-7452-14-git-send-email-yamada.masahiro@socionext.com>
On 11/04/2016 12:43 PM, Masahiro Yamada wrote:
> The nand_scan_ident/tail() returns an appropriate error value when
> it fails. Use it instead of the fixed error code -ENXIO.
>
> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
> ---
Acked-by: Vladimir Zapolskiy <vz@mleia.com>
Thank you for the change.
--
With best wishes,
Vladimir
^ permalink raw reply
* [PATCH v3] ARM: bcm2835: Add names for the Raspberry Pi GPIO lines
From: Stephen Warren @ 2016-11-06 3:34 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161027165246.23936-1-eric@anholt.net>
On 10/27/2016 10:52 AM, Eric Anholt wrote:
> From: Linus Walleij <linus.walleij@linaro.org>
>
> The idea is to give useful names to GPIO lines that an implementer
> will be using from userspace, e.g. for maker type projects. These are
> user-visible using tools/gpio/lsgpio.c
> arch/arm/boot/dts/bcm2835-rpi-a-plus.dts | 65 +++++++++++++++++++++++++++++++
> arch/arm/boot/dts/bcm2835-rpi-a.dts | 67 ++++++++++++++++++++++++++++++++
> arch/arm/boot/dts/bcm2835-rpi-b-plus.dts | 66 +++++++++++++++++++++++++++++++
> arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts | 66 +++++++++++++++++++++++++++++++
> arch/arm/boot/dts/bcm2835-rpi-b.dts | 67 ++++++++++++++++++++++++++++++++
Aren't the A and B rev 2 pinouts the same. If so, why duplicate the
content between the files instead of creating an inclue file? Same for
A+, B+, Pi 2, and Pi 3. Shouldn't this patch update the Pi 2 and Pi 3
DTs too?
> diff --git a/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts b/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts
> &gpio {
> + /*
> + * This is based on the unreleased schematic for the Model A+.
> + *
> + * Legend:
> + * "NC" = not connected (no rail from the SoC)
> + * "FOO" = GPIO line named "FOO" on the schematic
> + * "FOO_N" = GPIO line named "FOO" on schematic, active low
> + */
> + gpio-line-names = "SDA0",
> + "SCL0",
> diff --git a/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts b/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts
> &gpio {
> + /*
> + * Taken from Raspberry-Pi-B-Plus-V1.2-Schematics.pdf
> + * RPI-BPLUS sheet 1
> + *
> + * Legend:
> + * "NC" = not connected (no rail from the SoC)
> + * "FOO" = GPIO line named "FOO" on the schematic
> + * "FOO_N" = GPIO line named "FOO" on schematic, active low
> + */
> + gpio-line-names = "ID_SD",
> + "ID_SC",
I think the whole point of naming GPIOs is to give users the same
experience across the different boards where the same semantics exist in
HW. Both the A+ and B+ use GPIO0/1 (a/k/a ID_SD/ID_SC a/k/a SDA0/SCL0)
for the same semantic purpose and are exposed in the same externally
visible way (same pins on the expansion header); the board ID EEPROM.
Therefore I assert the names of these GPIOs should be identical on all
boards that use them for that purpose, to allow SW (or human knowledge)
portability between the boards.
> + "GPIO17",
This pin is known as GPIO_GEN0 on the expansion header. Given the
expansion header is all end-users likely care about, and other pins
(e.g. SPI_CE1_N) are named after the expansion header, shouldn't this
patch use the GPIO expansion header naming for all pins that are routed
to that header?
^ permalink raw reply
* [PATCH 2/6] pinctrl: rockchip: add support for rk1108
From: Linus Walleij @ 2016-11-06 10:05 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1478176470-11956-1-git-send-email-andy.yan@rock-chips.com>
On Thu, Nov 3, 2016 at 1:34 PM, Andy Yan <andy.yan@rock-chips.com> wrote:
> Add basic support for rk1108 soc
>
> Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
I only see this patch from the series, I guess this is the only
patch affecting pin control so thanks for not spamming :)
Please resend with Heiko's requested fixes and his Reviewed-by
tag and I will apply it.
Yours,
Linus Walleij
^ permalink raw reply
* [PATCH RFC] ARM: dts: add support for Turris Omnia
From: Andrew Lunn @ 2016-11-06 10:19 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161105220848.k6rrjmvvhdaeduma@perseus.defre.kleine-koenig.org>
> Will do for v2. arch/arm/boot/dts/keystone-* needs fixing in this
> regard, too.
There is a whitelist of compatible strings which are ignored, for
backwards compatibility. See of_mdiobus_child_is_phy(). It would be
nice to fix keystone, but it is not required.
Andrew
^ permalink raw reply
* [Bug] ARM: mxs: STI: console can't wake up from freeze
From: Stefan Wahren @ 2016-11-06 10:20 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161105180542.GE1041@n2100.armlinux.org.uk>
Hi,
> Russell King - ARM Linux <linux@armlinux.org.uk> hat am 5. November 2016 um
> 19:05 geschrieben:
>
>
> On Sat, Nov 05, 2016 at 04:28:37PM +0100, Stefan Wahren wrote:
> > As i wrote in my email before, i added a pr_info() into freeze_wake.
> > But i never see the output of this message. So i assume freeze_wake
> > is never called. Again, how could this happen?
>
> Hmm, so the bit that you're getting stuck on is:
>
> wait_event(suspend_freeze_wait_head,
> suspend_freeze_state == FREEZE_STATE_WAKE);
>
thanks for all the feedback. The real cause for this issue is in the irqchip
driver. I fixed it with this patch:
diff --git a/drivers/irqchip/irq-mxs.c b/drivers/irqchip/irq-mxs.c
index 1730470..05fa9f7 100644
--- a/drivers/irqchip/irq-mxs.c
+++ b/drivers/irqchip/irq-mxs.c
@@ -131,12 +131,16 @@ static void asm9260_unmask_irq(struct irq_data *d)
.irq_ack = icoll_ack_irq,
.irq_mask = icoll_mask_irq,
.irq_unmask = icoll_unmask_irq,
+ .flags = IRQCHIP_MASK_ON_SUSPEND |
+ IRQCHIP_SKIP_SET_WAKE,
};
static struct irq_chip asm9260_icoll_chip = {
.irq_ack = icoll_ack_irq,
.irq_mask = asm9260_mask_irq,
.irq_unmask = asm9260_unmask_irq,
+ .flags = IRQCHIP_MASK_ON_SUSPEND |
+ IRQCHIP_SKIP_SET_WAKE,
};
asmlinkage void __exception_irq_entry icoll_handle_irq(struct pt_regs *regs)
^ permalink raw reply related
* [RFC PATCH] ARM: dts: add panel and tcon nodes to Allwinner A33 Q8 tablet dts
From: Icenowy Zheng @ 2016-11-06 11:11 UTC (permalink / raw)
To: linux-arm-kernel
All A33 Q8 tablets features a LCD panel, with a resolution of either
800x480 or 1024x600.
Add "bone" device nodes to the device tree.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
---
Maybe it will be better to add them to sun8i-q8-reference-tablet.dtsi, as
these pin configurations are part of reference design of both A23 and A33,
not only restricted to Q8.
The DTS file is tested by me, after cherry-picks this patch from Chen-Yu Tsai:
https://github.com/wens/linux/commit/2823b887a289fbee5f97f3c6b45ed6c74a6368c6
And add these commands to my U-Boot boot command:
fdt addr 0x43000000
fdt resize
fdt set /panel compatible "urt,umsh-8596md-t"
fdt set /panel status "okay"
fdt set /display-engine status "okay"
fdt set /soc at 01c00000/lcd-controller at 01c0c000 status "okay"
arch/arm/boot/dts/sun8i-a33-q8-tablet.dts | 44 +++++++++++++++++++++++++++++++
1 file changed, 44 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-a33-q8-tablet.dts b/arch/arm/boot/dts/sun8i-a33-q8-tablet.dts
index b0bc236..871a20c 100644
--- a/arch/arm/boot/dts/sun8i-a33-q8-tablet.dts
+++ b/arch/arm/boot/dts/sun8i-a33-q8-tablet.dts
@@ -47,4 +47,48 @@
/ {
model = "Q8 A33 Tablet";
compatible = "allwinner,q8-a33", "allwinner,sun8i-a33";
+
+ panel: panel {
+ /* compatible should be set according to the panel */
+ pinctrl-names = "default";
+ pinctrl-0 = <&lcd_en_q8>;
+ backlight = <&backlight>;
+ enable-gpios = <&pio 7 7 GPIO_ACTIVE_HIGH>; /* PH7 */
+ power-supply = <®_dc1sw>;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port at 0 {
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ panel_input: endpoint at 0 {
+ reg = <0>;
+ remote-endpoint = <&tcon0_out_lcd>;
+ };
+ };
+ };
+};
+
+&tcon0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&lcd_rgb666_pins>;
+};
+
+&tcon0_out {
+ tcon0_out_lcd: endpoint at 0 {
+ reg = <0>;
+ remote-endpoint = <&panel_input>;
+ };
+};
+
+&pio {
+ lcd_en_q8: lcd_en at 0 {
+ allwinner,pins = "PH7";
+ allwinner,function = "gpio_out";
+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ };
};
--
2.10.1
^ permalink raw reply related
* [PATCH v2 1/1] ARM: dmaengine: sun6i: share the dma driver with sun50i
From: Maxime Ripard @ 2016-11-06 13:37 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161105080548.GA32546@arx12>
On Sat, Nov 05, 2016 at 04:05:48PM +0800, Hao Zhang wrote:
> Add soc a64 dma support.
>
> Signed-off-by: Hao Zhang <hao5781286@gmail.com>
> ---
> drivers/dma/sun6i-dma.c | 19 +++++++++++++++++++
> 1 file changed, 19 insertions(+)
>
> diff --git a/drivers/dma/sun6i-dma.c b/drivers/dma/sun6i-dma.c
> index 8346199..00fcfc7 100644
> --- a/drivers/dma/sun6i-dma.c
> +++ b/drivers/dma/sun6i-dma.c
> @@ -1028,11 +1028,23 @@ static struct sun6i_dma_config sun8i_h3_dma_cfg = {
> .nr_max_vchans = 34,
> };
>
> +/*
> + * The A64 has 8 physical channels, a maximum DRQ port id of 27,
> + * and a total of 38 usable source and destination endpoints.
> + */
> +
> +static struct sun6i_dma_config sun50i_a64_dma_cfg = {
> + .nr_max_channels = 8,
> + .nr_max_requests = 27,
> + .nr_max_vchans = 38,
> +};
> +
> static const struct of_device_id sun6i_dma_match[] = {
> { .compatible = "allwinner,sun6i-a31-dma", .data = &sun6i_a31_dma_cfg },
> { .compatible = "allwinner,sun8i-a23-dma", .data = &sun8i_a23_dma_cfg },
> { .compatible = "allwinner,sun8i-a83t-dma", .data = &sun8i_a83t_dma_cfg },
> { .compatible = "allwinner,sun8i-h3-dma", .data = &sun8i_h3_dma_cfg },
> + { .compatible = "allwinner,sun50i-a64-dma", .data = &sun50i_a64_dma_cfg },
You need to add that compatible to the DT binding documentation.
> { /* sentinel */ }
> };
> MODULE_DEVICE_TABLE(of, sun6i_dma_match);
> @@ -1110,6 +1122,13 @@ static int sun6i_dma_probe(struct platform_device *pdev)
> sdc->slave.dst_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_1_BYTE) |
> BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) |
> BIT(DMA_SLAVE_BUSWIDTH_4_BYTES);
> +
> + if (of_device_is_compatible(pdev->dev.of_node,
> + "allwinner,sun50i-a64-dma")) {
> + sdc->slave.src_addr_widths |= BIT(DMA_SLAVE_BUSWIDTH_8_BYTES);
> + sdc->slave.dst_addr_widths |= BIT(DMA_SLAVE_BUSWIDTH_8_BYTES);
> + }
> +
You'll also need to change convert_buswidth, it will reject any width
higher than 4 bytes.
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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^ permalink raw reply
* [RFC PATCH] ARM: dts: add panel and tcon nodes to Allwinner A33 Q8 tablet dts
From: Hans de Goede @ 2016-11-06 14:27 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161106111119.14927-1-icenowy@aosc.xyz>
Hi,
On 06-11-16 12:11, Icenowy Zheng wrote:
> All A33 Q8 tablets features a LCD panel, with a resolution of either
> 800x480 or 1024x600.
>
> Add "bone" device nodes to the device tree.
Bone ?
>
> Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
He, as discussed in the other thread since sun8i-a33-q8-tablet.dts
is used for both 800x480 and 1024x600 versions we really need to
introduce new sun8i-a33-q8-tablet-800x600.dts and
sun8i-a33-q8-tablet-1024x600.dts files, which include
sun8i-a33-q8-tablet.dts and then add just the panel bits; and patch
newer u-boots to use those instead.
This way people who stick with an old u-boot will just not get
the drm driver, rather then all of a sudden getting a wrong
resolution.
Icenowy, can you please also submit a matching u-boot patch
(both the new dts file, as well as updating the defconfig you
use to the new dts file)?
Regards,
Hans
> ---
>
> Maybe it will be better to add them to sun8i-q8-reference-tablet.dtsi, as
> these pin configurations are part of reference design of both A23 and A33,
> not only restricted to Q8.
>
> The DTS file is tested by me, after cherry-picks this patch from Chen-Yu Tsai:
> https://github.com/wens/linux/commit/2823b887a289fbee5f97f3c6b45ed6c74a6368c6
>
> And add these commands to my U-Boot boot command:
>
> fdt addr 0x43000000
> fdt resize
> fdt set /panel compatible "urt,umsh-8596md-t"
> fdt set /panel status "okay"
> fdt set /display-engine status "okay"
> fdt set /soc at 01c00000/lcd-controller at 01c0c000 status "okay"
>
> arch/arm/boot/dts/sun8i-a33-q8-tablet.dts | 44 +++++++++++++++++++++++++++++++
> 1 file changed, 44 insertions(+)
>
> diff --git a/arch/arm/boot/dts/sun8i-a33-q8-tablet.dts b/arch/arm/boot/dts/sun8i-a33-q8-tablet.dts
> index b0bc236..871a20c 100644
> --- a/arch/arm/boot/dts/sun8i-a33-q8-tablet.dts
> +++ b/arch/arm/boot/dts/sun8i-a33-q8-tablet.dts
> @@ -47,4 +47,48 @@
> / {
> model = "Q8 A33 Tablet";
> compatible = "allwinner,q8-a33", "allwinner,sun8i-a33";
> +
> + panel: panel {
> + /* compatible should be set according to the panel */
> + pinctrl-names = "default";
> + pinctrl-0 = <&lcd_en_q8>;
> + backlight = <&backlight>;
> + enable-gpios = <&pio 7 7 GPIO_ACTIVE_HIGH>; /* PH7 */
> + power-supply = <®_dc1sw>;
> + status = "disabled";
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port at 0 {
> + reg = <0>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + panel_input: endpoint at 0 {
> + reg = <0>;
> + remote-endpoint = <&tcon0_out_lcd>;
> + };
> + };
> + };
> +};
> +
> +&tcon0 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&lcd_rgb666_pins>;
> +};
> +
> +&tcon0_out {
> + tcon0_out_lcd: endpoint at 0 {
> + reg = <0>;
> + remote-endpoint = <&panel_input>;
> + };
> +};
> +
> +&pio {
> + lcd_en_q8: lcd_en at 0 {
> + allwinner,pins = "PH7";
> + allwinner,function = "gpio_out";
> + allwinner,drive = <SUN4I_PINCTRL_10_MA>;
> + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
> + };
> };
>
^ permalink raw reply
* [Bug] ARM: mxs: STI: console can't wake up from freeze
From: Daniel Lezcano @ 2016-11-06 14:55 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <381813296.167766.9867e3e7-5710-4844-a098-6f44bd852a6d.open-xchange@email.1und1.de>
On 06/11/2016 11:20, Stefan Wahren wrote:
> Hi,
>
>> Russell King - ARM Linux <linux@armlinux.org.uk> hat am 5. November 2016 um
>> 19:05 geschrieben:
>>
>>
>> On Sat, Nov 05, 2016 at 04:28:37PM +0100, Stefan Wahren wrote:
>>> As i wrote in my email before, i added a pr_info() into freeze_wake.
>>> But i never see the output of this message. So i assume freeze_wake
>>> is never called. Again, how could this happen?
>>
>> Hmm, so the bit that you're getting stuck on is:
>>
>> wait_event(suspend_freeze_wait_head,
>> suspend_freeze_state == FREEZE_STATE_WAKE);
>>
>
> thanks for all the feedback. The real cause for this issue is in the irqchip
> driver. I fixed it with this patch:
Mind to give some details ?
> diff --git a/drivers/irqchip/irq-mxs.c b/drivers/irqchip/irq-mxs.c
> index 1730470..05fa9f7 100644
> --- a/drivers/irqchip/irq-mxs.c
> +++ b/drivers/irqchip/irq-mxs.c
> @@ -131,12 +131,16 @@ static void asm9260_unmask_irq(struct irq_data *d)
> .irq_ack = icoll_ack_irq,
> .irq_mask = icoll_mask_irq,
> .irq_unmask = icoll_unmask_irq,
> + .flags = IRQCHIP_MASK_ON_SUSPEND |
> + IRQCHIP_SKIP_SET_WAKE,
> };
>
> static struct irq_chip asm9260_icoll_chip = {
> .irq_ack = icoll_ack_irq,
> .irq_mask = asm9260_mask_irq,
> .irq_unmask = asm9260_unmask_irq,
> + .flags = IRQCHIP_MASK_ON_SUSPEND |
> + IRQCHIP_SKIP_SET_WAKE,
> };
>
> asmlinkage void __exception_irq_entry icoll_handle_irq(struct pt_regs *regs)
>
--
<http://www.linaro.org/> Linaro.org ? Open source software for ARM SoCs
Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook |
<http://twitter.com/#!/linaroorg> Twitter |
<http://www.linaro.org/linaro-blog/> Blog
^ permalink raw reply
* imx6: PCIe imx6_pcie_assert_core_reset() hangs after watchdog reset
From: Philippe De Muyter @ 2016-11-06 15:31 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1427377198.3378.16.camel@pengutronix.de>
Hi ARM i.MX6q experts,
sorry to come back with an old problem. I work with with two
different custom boards, designed after the SabreSD board with imx6dl
and imx6q cpus, and I have exactly the same problem : linux kernel hangs
in imx6_pcie_assert_core_reset() at the line :
val = readl(pp->dbi_base + PCIE_PL_PFLR);
this happens constantly after a watchdog reset, and also
sometimes (or on some boards) after a reboot. As we know that
U-Boot on our boards will never mess with the PCI setup, and
that if the PCIe block is configured, it has certainly be
configured by the previous kernel session, I have merely disabled the
code block trying to put back the PCIe block into configurable state.
I have no problem so far, but do you agree that this is a valid fix ?
I use either v3.17 or Freescale's 4.1.15_1.2.0_ga
Best Regards,
Philippe
On Thu, Mar 26, 2015 at 12:39:58PM +0000, Lucas Stach wrote:
> Hi Tim,
>
> Am Donnerstag, den 26.03.2015, 06:23 -0700 schrieb Tim Harvey:
> > On Thu, Mar 26, 2015 at 4:06 AM, Lucas Stach <l.stach@pengutronix.de> wrote:
> > > Am Mittwoch, den 25.03.2015, 11:32 +0100 schrieb Stefan Roese:
> > > Okay, I've looked a bit into this and it seems there is no easy solution
> > > available. It is really unfortunate that the WD reset doesn't reset the
> > > GPR registers. Also I have no idea if the WD reset properly resets the
> > > PCIe core, as the reset signal of this core is only wired to the POR
> > > line.
> > >
> > > To fix this (almost) properly we would have to change the complete init
> > > order of the core, which isn't an easy task, as experience has shown
> > > that even small changes in that area can prevent the link from coming up
> > > under certain circumstances.
> > >
> > > Which brings me back to my earlier assertion that WD reset should really
> > > be done through the PMIC. That's yet another case of a WD making the
> > > overall system more instable.
> > >
> > > I think the easiest workaround for now is to detect the WD reset in your
> > > bootloader and bash the expected default values into the GPR bits.
> > >
> > > Regards,
> > > Lucas
> >
> > Lucas,
> >
> > There are many boards out there that unfortunately don't reset PMIC's
> > properly, IMHO due to a confusing reference design from Freescale.
> >
> > Using the WDOGx_WRSR register we can detect the reason for reset:
> > Bit 4 - POR - Power on reset
> > Bit 1 - TOUT - Watchdog timeout
> > Bit 0 - SFTW - Software reset (used in machine_restart)
> >
> > Can we reset the GPR registers based on bits 0 or 1 set, or use these
> > as further qualifiers in the WAR?
> >
> Doing it in the kernel is too late. This WAR is specifically to work
> around bootloaders leaving the PCI link running when jumping into the
> kernel. We use the GPR bits to detect if the bootloader has touched the
> PCIe core. Unfortunately we see the same signature if the kernel touched
> PCIe and the system got reset by the WD.
>
> If we reset the GPR bits depending on the reset reason register in the
> kernel we have no way to know if the bootloader has touched the PCIe
> core after a WD reset (in which case we still need to apply the WAR). So
> the only way to keep the WAR working while cleaning out bad WD reset
> behavior is to reset the GPR bits in the bootloader, before the
> bootloader itself may touch the PCIe core.
>
> It may be possible to come up with a solution for this in the kernel by
> looking at the PCIe clock status when entering the kernel, but this
> means that we scatter even more WAR code for the bad Freescale PCIe
> integration throughout the kernel, as such code has to go into the
> platform as we don't have the required information at hand in the PCI
> driver. So I'm not really thrilled by thinking about doing it in the
> kernel.
>
> Regards,
> Lucas
>
> --
> Pengutronix e.K. | Lucas Stach |
> Industrial Linux Solutions | http://www.pengutronix.de/ |
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
--
Philippe De Muyter +32 2 6101532 Macq SA rue de l'Aeronef 2 B-1140 Bruxelles
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