* imx6: PCIe imx6_pcie_assert_core_reset() hangs after watchdog reset
From: Philippe De Muyter @ 2016-11-06 15:31 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1427377198.3378.16.camel@pengutronix.de>
Hi ARM i.MX6q experts,
sorry to come back with an old problem. I work with with two
different custom boards, designed after the SabreSD board with imx6dl
and imx6q cpus, and I have exactly the same problem : linux kernel hangs
in imx6_pcie_assert_core_reset() at the line :
val = readl(pp->dbi_base + PCIE_PL_PFLR);
this happens constantly after a watchdog reset, and also
sometimes (or on some boards) after a reboot. As we know that
U-Boot on our boards will never mess with the PCI setup, and
that if the PCIe block is configured, it has certainly be
configured by the previous kernel session, I have merely disabled the
code block trying to put back the PCIe block into configurable state.
I have no problem so far, but do you agree that this is a valid fix ?
I use either v3.17 or Freescale's 4.1.15_1.2.0_ga
Best Regards,
Philippe
On Thu, Mar 26, 2015 at 12:39:58PM +0000, Lucas Stach wrote:
> Hi Tim,
>
> Am Donnerstag, den 26.03.2015, 06:23 -0700 schrieb Tim Harvey:
> > On Thu, Mar 26, 2015 at 4:06 AM, Lucas Stach <l.stach@pengutronix.de> wrote:
> > > Am Mittwoch, den 25.03.2015, 11:32 +0100 schrieb Stefan Roese:
> > > Okay, I've looked a bit into this and it seems there is no easy solution
> > > available. It is really unfortunate that the WD reset doesn't reset the
> > > GPR registers. Also I have no idea if the WD reset properly resets the
> > > PCIe core, as the reset signal of this core is only wired to the POR
> > > line.
> > >
> > > To fix this (almost) properly we would have to change the complete init
> > > order of the core, which isn't an easy task, as experience has shown
> > > that even small changes in that area can prevent the link from coming up
> > > under certain circumstances.
> > >
> > > Which brings me back to my earlier assertion that WD reset should really
> > > be done through the PMIC. That's yet another case of a WD making the
> > > overall system more instable.
> > >
> > > I think the easiest workaround for now is to detect the WD reset in your
> > > bootloader and bash the expected default values into the GPR bits.
> > >
> > > Regards,
> > > Lucas
> >
> > Lucas,
> >
> > There are many boards out there that unfortunately don't reset PMIC's
> > properly, IMHO due to a confusing reference design from Freescale.
> >
> > Using the WDOGx_WRSR register we can detect the reason for reset:
> > Bit 4 - POR - Power on reset
> > Bit 1 - TOUT - Watchdog timeout
> > Bit 0 - SFTW - Software reset (used in machine_restart)
> >
> > Can we reset the GPR registers based on bits 0 or 1 set, or use these
> > as further qualifiers in the WAR?
> >
> Doing it in the kernel is too late. This WAR is specifically to work
> around bootloaders leaving the PCI link running when jumping into the
> kernel. We use the GPR bits to detect if the bootloader has touched the
> PCIe core. Unfortunately we see the same signature if the kernel touched
> PCIe and the system got reset by the WD.
>
> If we reset the GPR bits depending on the reset reason register in the
> kernel we have no way to know if the bootloader has touched the PCIe
> core after a WD reset (in which case we still need to apply the WAR). So
> the only way to keep the WAR working while cleaning out bad WD reset
> behavior is to reset the GPR bits in the bootloader, before the
> bootloader itself may touch the PCIe core.
>
> It may be possible to come up with a solution for this in the kernel by
> looking at the PCIe clock status when entering the kernel, but this
> means that we scatter even more WAR code for the bad Freescale PCIe
> integration throughout the kernel, as such code has to go into the
> platform as we don't have the required information at hand in the PCI
> driver. So I'm not really thrilled by thinking about doing it in the
> kernel.
>
> Regards,
> Lucas
>
> --
> Pengutronix e.K. | Lucas Stach |
> Industrial Linux Solutions | http://www.pengutronix.de/ |
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
--
Philippe De Muyter +32 2 6101532 Macq SA rue de l'Aeronef 2 B-1140 Bruxelles
^ permalink raw reply
* [RFC PATCH] ARM: dts: add panel and tcon nodes to Allwinner A33 Q8 tablet dts
From: Icenowy Zheng @ 2016-11-06 16:53 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <948897e3-12a2-b02c-ed26-929921ff04b2@redhat.com>
06.11.2016, 22:27, "Hans de Goede" <hdegoede@redhat.com>:
> Hi,
>
> On 06-11-16 12:11, Icenowy Zheng wrote:
>> ?All A33 Q8 tablets features a LCD panel, with a resolution of either
>> ?800x480 or 1024x600.
>>
>> ?Add "bone" device nodes to the device tree.
>
> Bone ?
>
>> ?Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
>
> He, as discussed in the other thread since sun8i-a33-q8-tablet.dts
> is used for both 800x480 and 1024x600 versions we really need to
> introduce new sun8i-a33-q8-tablet-800x600.dts and
> sun8i-a33-q8-tablet-1024x600.dts files, which include
> sun8i-a33-q8-tablet.dts and then add just the panel bits; and patch
> newer u-boots to use those instead.
>
> This way people who stick with an old u-boot will just not get
> the drm driver, rather then all of a sudden getting a wrong
> resolution.
>
> Icenowy, can you please also submit a matching u-boot patch
> (both the new dts file, as well as updating the defconfig you
> ??use to the new dts file)?
Could you choose a compatible for 1024x600 variant?
(Since I have never such a Q8 tablet)
>
> Regards,
>
> Hans
>
>> ?---
>>
>> ?Maybe it will be better to add them to sun8i-q8-reference-tablet.dtsi, as
>> ?these pin configurations are part of reference design of both A23 and A33,
>> ?not only restricted to Q8.
>>
>> ?The DTS file is tested by me, after cherry-picks this patch from Chen-Yu Tsai:
>> ?https://github.com/wens/linux/commit/2823b887a289fbee5f97f3c6b45ed6c74a6368c6
>>
>> ?And add these commands to my U-Boot boot command:
>>
>> ?fdt addr 0x43000000
>> ?fdt resize
>> ?fdt set /panel compatible "urt,umsh-8596md-t"
>> ?fdt set /panel status "okay"
>> ?fdt set /display-engine status "okay"
>> ?fdt set /soc at 01c00000/lcd-controller at 01c0c000 status "okay"
>>
>> ??arch/arm/boot/dts/sun8i-a33-q8-tablet.dts | 44 +++++++++++++++++++++++++++++++
>> ??1 file changed, 44 insertions(+)
>>
>> ?diff --git a/arch/arm/boot/dts/sun8i-a33-q8-tablet.dts b/arch/arm/boot/dts/sun8i-a33-q8-tablet.dts
>> ?index b0bc236..871a20c 100644
>> ?--- a/arch/arm/boot/dts/sun8i-a33-q8-tablet.dts
>> ?+++ b/arch/arm/boot/dts/sun8i-a33-q8-tablet.dts
>> ?@@ -47,4 +47,48 @@
>> ??/ {
>> ??????????model = "Q8 A33 Tablet";
>> ??????????compatible = "allwinner,q8-a33", "allwinner,sun8i-a33";
>> ?+
>> ?+ panel: panel {
>> ?+ /* compatible should be set according to the panel */
>> ?+ pinctrl-names = "default";
>> ?+ pinctrl-0 = <&lcd_en_q8>;
>> ?+ backlight = <&backlight>;
>> ?+ enable-gpios = <&pio 7 7 GPIO_ACTIVE_HIGH>; /* PH7 */
>> ?+ power-supply = <®_dc1sw>;
>> ?+ status = "disabled";
>> ?+ #address-cells = <1>;
>> ?+ #size-cells = <0>;
>> ?+
>> ?+ port at 0 {
>> ?+ reg = <0>;
>> ?+ #address-cells = <1>;
>> ?+ #size-cells = <0>;
>> ?+
>> ?+ panel_input: endpoint at 0 {
>> ?+ reg = <0>;
>> ?+ remote-endpoint = <&tcon0_out_lcd>;
>> ?+ };
>> ?+ };
>> ?+ };
>> ?+};
>> ?+
>> ?+&tcon0 {
>> ?+ pinctrl-names = "default";
>> ?+ pinctrl-0 = <&lcd_rgb666_pins>;
>> ?+};
>> ?+
>> ?+&tcon0_out {
>> ?+ tcon0_out_lcd: endpoint at 0 {
>> ?+ reg = <0>;
>> ?+ remote-endpoint = <&panel_input>;
>> ?+ };
>> ?+};
>> ?+
>> ?+&pio {
>> ?+ lcd_en_q8: lcd_en at 0 {
>> ?+ allwinner,pins = "PH7";
>> ?+ allwinner,function = "gpio_out";
>> ?+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
>> ?+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
>> ?+ };
>> ??};
^ permalink raw reply
* imx6: PCIe imx6_pcie_assert_core_reset() hangs after watchdog reset
From: Fabio Estevam @ 2016-11-06 16:59 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161106153117.GA22538@frolo.macqel>
On Sun, Nov 6, 2016 at 1:31 PM, Philippe De Muyter <phdm@macq.eu> wrote:
> I use either v3.17 or Freescale's 4.1.15_1.2.0_ga
These kernel versions are not supported by the kernel community.
Do you observe issues with 4.8.6 or 4.9-rc4?
^ permalink raw reply
* [PATCH 1/2] clk: sunxi-ng: Fix CPUX clock for the A23/A33
From: Icenowy Zheng @ 2016-11-06 17:29 UTC (permalink / raw)
To: linux-arm-kernel
The CPUX clock of A23/33 CCU driver forgot to add CLK_SET_RATE_PARENT
flag, which makes its frequency fail to change (as part of cpu thermal
throttle).
Fix it by add this flag.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
---
Patch 4.9-rc too.
drivers/clk/sunxi-ng/ccu-sun8i-a23.c | 2 +-
drivers/clk/sunxi-ng/ccu-sun8i-a33.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-a23.c b/drivers/clk/sunxi-ng/ccu-sun8i-a23.c
index 2646d98..44c4775 100644
--- a/drivers/clk/sunxi-ng/ccu-sun8i-a23.c
+++ b/drivers/clk/sunxi-ng/ccu-sun8i-a23.c
@@ -163,7 +163,7 @@ static SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK(pll_de_clk, "pll-de",
static const char * const cpux_parents[] = { "osc32k", "osc24M",
"pll-cpux" , "pll-cpux" };
static SUNXI_CCU_MUX(cpux_clk, "cpux", cpux_parents,
- 0x050, 16, 2, CLK_IS_CRITICAL);
+ 0x050, 16, 2, CLK_IS_CRITICAL | CLK_SET_RATE_PARENT);
static SUNXI_CCU_M(axi_clk, "axi", "cpux", 0x050, 0, 2, 0);
diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-a33.c b/drivers/clk/sunxi-ng/ccu-sun8i-a33.c
index 96b40ca..59cfdc8 100644
--- a/drivers/clk/sunxi-ng/ccu-sun8i-a33.c
+++ b/drivers/clk/sunxi-ng/ccu-sun8i-a33.c
@@ -170,7 +170,7 @@ static SUNXI_CCU_N_WITH_GATE_LOCK(pll_ddr1_clk, "pll-ddr1",
static const char * const cpux_parents[] = { "osc32k", "osc24M",
"pll-cpux" , "pll-cpux" };
static SUNXI_CCU_MUX(cpux_clk, "cpux", cpux_parents,
- 0x050, 16, 2, CLK_IS_CRITICAL);
+ 0x050, 16, 2, CLK_IS_CRITICAL | CLK_SET_RATE_PARENT);
static SUNXI_CCU_M(axi_clk, "axi", "cpux", 0x050, 0, 2, 0);
--
2.10.1
^ permalink raw reply related
* [PATCH 2/2] clk: sunxi-ng: fix up PLL_CPUX adjusting for A23/A33
From: Icenowy Zheng @ 2016-11-06 17:29 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161106172932.39478-1-icenowy@aosc.xyz>
When adjusting PLL_CPUX on A23/A33, the PLL is driven too high, and the
system stucks.
Add a notifier to avoid this situation.
The code is ported from ccu-sun6i-a31.c.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
---
Patch 4.9-rc too.
drivers/clk/sunxi-ng/ccu-sun8i-a23.c | 10 ++++++++++
drivers/clk/sunxi-ng/ccu-sun8i-a33.c | 10 ++++++++++
2 files changed, 20 insertions(+)
diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-a23.c b/drivers/clk/sunxi-ng/ccu-sun8i-a23.c
index 44c4775..41a8594 100644
--- a/drivers/clk/sunxi-ng/ccu-sun8i-a23.c
+++ b/drivers/clk/sunxi-ng/ccu-sun8i-a23.c
@@ -709,6 +709,13 @@ static const struct sunxi_ccu_desc sun8i_a23_ccu_desc = {
.num_resets = ARRAY_SIZE(sun8i_a23_ccu_resets),
};
+static struct ccu_mux_nb sun8i_a23_cpu_nb = {
+ .common = &cpux_clk.common,
+ .cm = &cpux_clk.mux,
+ .delay_us = 1, /* > 8 clock cycles at 24 MHz */
+ .bypass_index = 1, /* index of 24 MHz oscillator */
+};
+
static void __init sun8i_a23_ccu_setup(struct device_node *node)
{
void __iomem *reg;
@@ -732,6 +739,9 @@ static void __init sun8i_a23_ccu_setup(struct device_node *node)
writel(val, reg + SUN8I_A23_PLL_MIPI_REG);
sunxi_ccu_probe(node, reg, &sun8i_a23_ccu_desc);
+
+ ccu_mux_notifier_register(pll_cpux_clk.common.hw.clk,
+ &sun8i_a23_cpu_nb);
}
CLK_OF_DECLARE(sun8i_a23_ccu, "allwinner,sun8i-a23-ccu",
sun8i_a23_ccu_setup);
diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-a33.c b/drivers/clk/sunxi-ng/ccu-sun8i-a33.c
index 59cfdc8..3efbb6e 100644
--- a/drivers/clk/sunxi-ng/ccu-sun8i-a33.c
+++ b/drivers/clk/sunxi-ng/ccu-sun8i-a33.c
@@ -752,6 +752,13 @@ static const struct sunxi_ccu_desc sun8i_a33_ccu_desc = {
.num_resets = ARRAY_SIZE(sun8i_a33_ccu_resets),
};
+static struct ccu_mux_nb sun8i_a33_cpu_nb = {
+ .common = &cpux_clk.common,
+ .cm = &cpux_clk.mux,
+ .delay_us = 1, /* > 8 clock cycles at 24 MHz */
+ .bypass_index = 1, /* index of 24 MHz oscillator */
+};
+
static void __init sun8i_a33_ccu_setup(struct device_node *node)
{
void __iomem *reg;
@@ -775,6 +782,9 @@ static void __init sun8i_a33_ccu_setup(struct device_node *node)
writel(val, reg + SUN8I_A33_PLL_MIPI_REG);
sunxi_ccu_probe(node, reg, &sun8i_a33_ccu_desc);
+
+ ccu_mux_notifier_register(pll_cpux_clk.common.hw.clk,
+ &sun8i_a33_cpu_nb);
}
CLK_OF_DECLARE(sun8i_a33_ccu, "allwinner,sun8i-a33-ccu",
sun8i_a33_ccu_setup);
--
2.10.1
^ permalink raw reply related
* [linux-sunxi] [PATCH v5 4/7] ASoC: sunxi: Add sun8i I2S driver
From: Jean-Francois Moine @ 2016-11-06 18:02 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAGb2v67gDd650TJk_-oHOehnzdH2qor=36HXdPt339Ji=ToAMg@mail.gmail.com>
On Sun, 23 Oct 2016 09:33:16 +0800
Chen-Yu Tsai <wens@csie.org> wrote:
> On Fri, Oct 21, 2016 at 4:36 PM, Jean-Francois Moine <moinejf@free.fr> wrote:
> > This patch adds I2S support to sun8i SoCs as the A83T and H3.
> >
> > Signed-off-by: Jean-Francois Moine <moinejf@free.fr>
> > ---
> > Note: This driver is closed to the sun4i-i2s except that:
> > - it handles the H3
>
> If it's close to sun4i-i2s, you should probably rework that one to support
> the newer SoCs.
I started to add the H3 into the sun4i-i2s, but I am blocked with
regmap.
Many H3 registers are common with the A10, but some of them have more
or less fields, the fields may be at different offsets. And, finally,
some registers are completely different.
This would not raise any problem, except with regmap which is really
painful.
As I may understood, regmap is used to simplify suspend/resume, but, is
it useful to save the I2S register on suspend?
Practically, I am streaming some tune on my device. I suspend it for
any reason. The next morning, I resume it. Are you sure I want to
continue to hear the end of the tune?
I better think that streaming should be simply stopped on suspend.
Then, there is no need to save the playing registers, and, here I am,
there is no need to use regmap.
May I go this way?
--
Ken ar c'henta? | ** Breizh ha Linux atav! **
Jef | http://moinejf.free.fr/
^ permalink raw reply
* [PATCH 2/2] clk: sunxi-ng: fix up PLL_CPUX adjusting for A23/A33
From: Quentin Schulz @ 2016-11-06 18:04 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161106172932.39478-2-icenowy@aosc.xyz>
Hi Icenowy,
This patch (2/2) should be before the first one.
The first patch allows adjusting of the PLL and the second fixes a
problem with the adjustment of the PLL.
You should fix the problem before allowing the adjustment of the PLL.
That way, if someone builds the kernel between your two patches, the
kernel is supposed to be working.
Tested in correct order on A33.
Thanks!
Quentin
On 06/11/2016 18:29, Icenowy Zheng wrote:
> When adjusting PLL_CPUX on A23/A33, the PLL is driven too high, and the
> system stucks.
>
> Add a notifier to avoid this situation.
>
> The code is ported from ccu-sun6i-a31.c.
>
> Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
> ---
> Patch 4.9-rc too.
> drivers/clk/sunxi-ng/ccu-sun8i-a23.c | 10 ++++++++++
> drivers/clk/sunxi-ng/ccu-sun8i-a33.c | 10 ++++++++++
> 2 files changed, 20 insertions(+)
>
> diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-a23.c b/drivers/clk/sunxi-ng/ccu-sun8i-a23.c
> index 44c4775..41a8594 100644
> --- a/drivers/clk/sunxi-ng/ccu-sun8i-a23.c
> +++ b/drivers/clk/sunxi-ng/ccu-sun8i-a23.c
> @@ -709,6 +709,13 @@ static const struct sunxi_ccu_desc sun8i_a23_ccu_desc = {
> .num_resets = ARRAY_SIZE(sun8i_a23_ccu_resets),
> };
>
> +static struct ccu_mux_nb sun8i_a23_cpu_nb = {
> + .common = &cpux_clk.common,
> + .cm = &cpux_clk.mux,
> + .delay_us = 1, /* > 8 clock cycles at 24 MHz */
> + .bypass_index = 1, /* index of 24 MHz oscillator */
> +};
> +
> static void __init sun8i_a23_ccu_setup(struct device_node *node)
> {
> void __iomem *reg;
> @@ -732,6 +739,9 @@ static void __init sun8i_a23_ccu_setup(struct device_node *node)
> writel(val, reg + SUN8I_A23_PLL_MIPI_REG);
>
> sunxi_ccu_probe(node, reg, &sun8i_a23_ccu_desc);
> +
> + ccu_mux_notifier_register(pll_cpux_clk.common.hw.clk,
> + &sun8i_a23_cpu_nb);
> }
> CLK_OF_DECLARE(sun8i_a23_ccu, "allwinner,sun8i-a23-ccu",
> sun8i_a23_ccu_setup);
> diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-a33.c b/drivers/clk/sunxi-ng/ccu-sun8i-a33.c
> index 59cfdc8..3efbb6e 100644
> --- a/drivers/clk/sunxi-ng/ccu-sun8i-a33.c
> +++ b/drivers/clk/sunxi-ng/ccu-sun8i-a33.c
> @@ -752,6 +752,13 @@ static const struct sunxi_ccu_desc sun8i_a33_ccu_desc = {
> .num_resets = ARRAY_SIZE(sun8i_a33_ccu_resets),
> };
>
> +static struct ccu_mux_nb sun8i_a33_cpu_nb = {
> + .common = &cpux_clk.common,
> + .cm = &cpux_clk.mux,
> + .delay_us = 1, /* > 8 clock cycles at 24 MHz */
> + .bypass_index = 1, /* index of 24 MHz oscillator */
> +};
> +
> static void __init sun8i_a33_ccu_setup(struct device_node *node)
> {
> void __iomem *reg;
> @@ -775,6 +782,9 @@ static void __init sun8i_a33_ccu_setup(struct device_node *node)
> writel(val, reg + SUN8I_A33_PLL_MIPI_REG);
>
> sunxi_ccu_probe(node, reg, &sun8i_a33_ccu_desc);
> +
> + ccu_mux_notifier_register(pll_cpux_clk.common.hw.clk,
> + &sun8i_a33_cpu_nb);
> }
> CLK_OF_DECLARE(sun8i_a33_ccu, "allwinner,sun8i-a33-ccu",
> sun8i_a33_ccu_setup);
>
--
Quentin Schulz, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
^ permalink raw reply
* [PATCH 13/22] mtd: nand: lpc32xx: return error code of nand_scan_ident/tail() on error
From: Boris Brezillon @ 2016-11-06 18:27 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1478256190-7452-14-git-send-email-yamada.masahiro@socionext.com>
On Fri, 4 Nov 2016 19:43:01 +0900
Masahiro Yamada <yamada.masahiro@socionext.com> wrote:
> The nand_scan_ident/tail() returns an appropriate error value when
> it fails. Use it instead of the fixed error code -ENXIO.
>
> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
> ---
>
> drivers/mtd/nand/lpc32xx_mlc.c | 10 ++++------
> drivers/mtd/nand/lpc32xx_slc.c | 9 +++------
> 2 files changed, 7 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/mtd/nand/lpc32xx_mlc.c b/drivers/mtd/nand/lpc32xx_mlc.c
> index 8523881..5553a5d 100644
> --- a/drivers/mtd/nand/lpc32xx_mlc.c
> +++ b/drivers/mtd/nand/lpc32xx_mlc.c
> @@ -747,10 +747,9 @@ static int lpc32xx_nand_probe(struct platform_device *pdev)
> * Scan to find existance of the device and
> * Get the type of NAND device SMALL block or LARGE block
> */
> - if (nand_scan_ident(mtd, 1, NULL)) {
> - res = -ENXIO;
> + res = nand_scan_ident(mtd, 1, NULL);
> + if (res)
> goto err_exit3;
> - }
>
> host->dma_buf = devm_kzalloc(&pdev->dev, mtd->writesize, GFP_KERNEL);
> if (!host->dma_buf) {
> @@ -793,10 +792,9 @@ static int lpc32xx_nand_probe(struct platform_device *pdev)
> * Fills out all the uninitialized function pointers with the defaults
> * And scans for a bad block table if appropriate.
> */
> - if (nand_scan_tail(mtd)) {
> - res = -ENXIO;
> + res = nand_scan_tail(mtd);
> + if (res)
> goto err_exit4;
> - }
>
> mtd->name = DRV_NAME;
>
> diff --git a/drivers/mtd/nand/lpc32xx_slc.c b/drivers/mtd/nand/lpc32xx_slc.c
> index 8d3edc3..f1094e5 100644
> --- a/drivers/mtd/nand/lpc32xx_slc.c
> +++ b/drivers/mtd/nand/lpc32xx_slc.c
> @@ -894,10 +894,9 @@ static int lpc32xx_nand_probe(struct platform_device *pdev)
> }
>
> /* Find NAND device */
> - if (nand_scan_ident(mtd, 1, NULL)) {
> - res = -ENXIO;
> + res = nand_scan_ident(mtd, 1, NULL);
> + if (res)
> goto err_exit3;
> - }
>
> /* OOB and ECC CPU and DMA work areas */
> host->ecc_buf = (uint32_t *)(host->data_buf + LPC32XX_DMA_DATA_SIZE);
> @@ -929,10 +928,8 @@ static int lpc32xx_nand_probe(struct platform_device *pdev)
> /*
> * Fills out all the uninitialized function pointers with the defaults
> */
> - if (nand_scan_tail(mtd)) {
> - res = -ENXIO;
> + res = nand_scan_tail(mtd);
You miss
if (res)
here.
No need to resend, I'll fix it when applying the patches.
> goto err_exit3;
> - }
>
> mtd->name = "nxp_lpc3220_slc";
> res = mtd_device_register(mtd, host->ncfg->parts,
^ permalink raw reply
* [Bug] ARM: mxs: STI: console can't wake up from freeze
From: Stefan Wahren @ 2016-11-06 18:31 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <f03db663-908e-e416-ad50-bdb5cbf6c2c9@linaro.org>
> Daniel Lezcano <daniel.lezcano@linaro.org> hat am 6. November 2016 um 15:55
> geschrieben:
>
>
> On 06/11/2016 11:20, Stefan Wahren wrote:
> > Hi,
> >
> >> Russell King - ARM Linux <linux@armlinux.org.uk> hat am 5. November 2016 um
> >> 19:05 geschrieben:
> >>
> >>
> >> On Sat, Nov 05, 2016 at 04:28:37PM +0100, Stefan Wahren wrote:
> >>> As i wrote in my email before, i added a pr_info() into freeze_wake.
> >>> But i never see the output of this message. So i assume freeze_wake
> >>> is never called. Again, how could this happen?
> >>
> >> Hmm, so the bit that you're getting stuck on is:
> >>
> >> wait_event(suspend_freeze_wait_head,
> >> suspend_freeze_state == FREEZE_STATE_WAKE);
> >>
> >
> > thanks for all the feedback. The real cause for this issue is in the irqchip
> > driver. I fixed it with this patch:
>
> Mind to give some details ?
>
No. AFAIK the serial_core already handles the suspend to idle. But it requires
that enable_irq_wake for the UART IRQ succeed. Unfortunately the irq-mxs (like a
couple of other irqchip drivers) neither implemented set_irq_wake or set
IRQCHIP_SKIP_SET_WAKE so enable_irq_wake will fail with -ENXIO and the UART
won't be setup as wakeup source. As the mxs interrupt controller doesn't provide
any facility to setup wakeup source i choose to use IRQCHIP_SKIP_SET_WAKE.
Instead of failing silently it would be better if sysfs won't allow to enable
wakeup source in this case or at least the serial core should complains about
it.
^ permalink raw reply
* [PATCH v2 2/9] drm/sun4i: support A33 tcon
From: Maxime Ripard @ 2016-11-06 18:50 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAGb2v66q_07frb2k_A8mpeXT1SX3VdtNc5JbfR1hcK29iCXfQg@mail.gmail.com>
On Sat, Nov 05, 2016 at 11:54:28PM +0800, Chen-Yu Tsai wrote:
> Hi,
>
> On Tue, Sep 6, 2016 at 10:46 PM, Maxime Ripard
> <maxime.ripard@free-electrons.com> wrote:
> > The A33 has a significantly different pipeline, with components that differ
> > too.
> >
> > Make sure we had compatible for them.
> >
> > Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
> > ---
> > Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt | 7 ++++++-
> > drivers/gpu/drm/sun4i/sun4i_backend.c | 1 +
> > drivers/gpu/drm/sun4i/sun4i_drv.c | 8 +++++---
> > drivers/gpu/drm/sun4i/sun4i_tcon.c | 8 +++++++-
> > 4 files changed, 19 insertions(+), 5 deletions(-)
> >
> > diff --git a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
> > index df8f4aeefe4c..bd3136a5cba5 100644
> > --- a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
> > +++ b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
> > @@ -26,7 +26,9 @@ TCON
> > The TCON acts as a timing controller for RGB, LVDS and TV interfaces.
> >
> > Required properties:
> > - - compatible: value should be "allwinner,sun5i-a13-tcon".
> > + - compatible: value must be either:
> > + * allwinner,sun5i-a13-tcon
> > + * allwinner,sun8i-a33-tcon
> > - reg: base address and size of memory-mapped region
> > - interrupts: interrupt associated to this IP
> > - clocks: phandles to the clocks feeding the TCON. Three are needed:
> > @@ -59,6 +61,7 @@ system.
> > Required properties:
> > - compatible: value must be one of:
> > * allwinner,sun5i-a13-display-backend
> > + * allwinner,sun8i-a33-display-backend
> > - reg: base address and size of the memory-mapped region.
> > - clocks: phandles to the clocks feeding the frontend and backend
> > * ahb: the backend interface clock
> > @@ -80,6 +83,7 @@ deinterlacing and color space conversion.
> > Required properties:
> > - compatible: value must be one of:
> > * allwinner,sun5i-a13-display-frontend
> > + * allwinner,sun8i-a33-display-frontend
>
> I just looked at the A23. It seems it's the same display frontend as the A33.
> Should we change the compatible string to a23 while it's still in RC?
>
> The backend is probably different. The A33 only claims to support 2048x2048
> layers, while the A23 claims to support 8192x8192 layers.
I think we can still keep it. Especially if we're not sure, we might
need to make use of it in the future.
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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* [PATCH 2/2] arm64: dts: sunxi: enable EHCI1, OHCI1 and USB PHY nodes in Pine64
From: Maxime Ripard @ 2016-11-06 18:54 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161105143830.10099-2-icenowy@aosc.xyz>
Hi,
On Sat, Nov 05, 2016 at 10:38:30PM +0800, Icenowy Zheng wrote:
> Pine64 have two USB Type-A ports, which are wired to the two ports of
> A64 USB PHY, and the lower port is the EHCI/OHCI1 port.
>
> Enable the necessary nodes to enable the lower USB port to work.
>
> Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
> ---
> arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 12 ++++++++++++
> 1 file changed, 12 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
> index 4709590..d836995 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
> @@ -72,3 +72,15 @@
> &i2c1_pins {
> bias-pull-up;
> };
> +
> +&usbphy {
> + status = "okay";
> +};
> +
> +&ehci1 {
> + status = "okay";
> +};
> +
> +&ohci1 {
> + status = "okay";
> +};
Please order the nodes by alphebetical order.
Thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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* [PATCH 1/2] arm64: dts: add USB1-related nodes of Allwinner A64
From: Maxime Ripard @ 2016-11-06 18:56 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161105143830.10099-1-icenowy@aosc.xyz>
On Sat, Nov 05, 2016 at 10:38:29PM +0800, Icenowy Zheng wrote:
> Allwinner A64 have two HCI USB controllers, a OTG controller and a USB
> PHY device which have two ports. One of the port is wired to both a HCI
> USB controller and the OTG controller, which is currently not supported.
> The another one is only wired to a HCI controller, and the device node of
> OHCI/EHCI controller of the port can be added now.
>
> Also the A64 USB PHY device node is also added for the HCI controllers to
> work.
>
> Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
> ---
> arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 50 +++++++++++++++++++++++++++
> 1 file changed, 50 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> index 3d70be3..c2b6dc8 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> @@ -259,5 +259,55 @@
> interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
> };
> +
> + usbphy: phy at 01c19400 {
> + compatible = "allwinner,sun50i-a64-usb-phy";
> + reg = <0x01c19400 0x14>,
> + <0x01c1b800 0x4>;
> + reg-names = "phy_ctrl",
> + "pmu1";
> + clocks = <&ccu CLK_USB_PHY0>,
> + <&ccu CLK_USB_PHY1>;
> + clock-names = "usb0_phy",
> + "usb1_phy";
> + resets = <&ccu RST_USB_PHY0>,
> + <&ccu RST_USB_PHY1>;
> + reset-names = "usb0_reset",
> + "usb1_reset";
> + status = "disabled";
> + #phy-cells = <1>;
> + };
> +
> + ohci1: usb at 01c1a400 {
> + compatible = "allwinner,sun50i-a64-ohci", "generic-ohci";
> + reg = <0x01c1b400 0x100>;
> + interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
> + /*
> + * According to the user manual, OHCI1 USB clock
> + * depends on OHCI0 clock.
> + */
This is something that should be dealt with in the clock framework,
not in your driver.
> + clocks = <&ccu CLK_BUS_OHCI1>,
> + <&ccu CLK_USB_OHCI0>,
> + <&ccu CLK_USB_OHCI1>;
> + resets = <&ccu RST_BUS_OHCI1>;
> + phys = <&usbphy 1>;
> + phy-names = "usb";
> + status = "disabled";
> + };
> +
> + ehci1: usb at 01c1a000 {
> + compatible = "allwinner,sun50i-a64-ehci", "generic-ehci";
> + reg = <0x01c1b000 0x100>;
And please order these nodes by base address.
Also, in both the ehci and ohci nodes, the unit-address and reg don't
match, which one is the right one?
Thanks,
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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* [PATCH v2 06/14] ASoC: sun4i-codec: Add support for A31 playback through headphone output
From: Maxime Ripard @ 2016-11-06 18:57 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAGb2v65CZJ+1LTWWk3+vABV8PDgsDta+nZ7o3H2Z--KFPe2kog@mail.gmail.com>
On Fri, Nov 04, 2016 at 09:08:11AM +0800, Chen-Yu Tsai wrote:
> On Fri, Nov 4, 2016 at 1:36 AM, Maxime Ripard
> <maxime.ripard@free-electrons.com> wrote:
> > Hi,
> >
> > On Thu, Nov 03, 2016 at 03:55:48PM +0800, Chen-Yu Tsai wrote:
> >> +/* headphone controls */
> >> +static const char * const sun6i_codec_hp_src_enum_text[] = {
> >> + "DAC", "Mixer",
> >> +};
> >> +
> >> +static SOC_ENUM_DOUBLE_DECL(sun6i_codec_hp_src_enum,
> >> + SUN6I_CODEC_OM_DACA_CTRL,
> >> + SUN6I_CODEC_OM_DACA_CTRL_LHPIS,
> >> + SUN6I_CODEC_OM_DACA_CTRL_RHPIS,
> >> + sun6i_codec_hp_src_enum_text);
> >> +
> >> +static const struct snd_kcontrol_new sun6i_codec_hp_src[] = {
> >> + SOC_DAPM_ENUM("Headphone Source Playback Route",
> >> + sun6i_codec_hp_src_enum),
> >> +};
> >
> > What is that route exactly? A muxer?
>
> Yup. The following is part of the widgets list later in the code:
>
> + /* Headphone output path */
> + SND_SOC_DAPM_MUX("Headphone Source Playback Route",
> + SND_SOC_NOPM, 0, 0, sun6i_codec_hp_src),
Oh, right.
You can add my Acked-by on this one and the other patches too.
Thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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* [PATCH] ARM64: dts: amlogic: Reorder copyrights for meson-gx
From: Andreas Färber @ 2016-11-06 19:25 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1475595430-30075-2-git-send-email-narmstrong@baylibre.com>
meson-gx.dtsi was directly derived from meson-gxbb.dtsi, so keep the
copyrights in chronological order to not give a wrong impression.
Fixes: c328666d58aa ("ARM64: dts: amlogic: Add Meson GX dtsi from GXBB")
Cc: Neil Armstrong <narmstrong@baylibre.com>
Cc: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Andreas F?rber <afaerber@suse.de>
---
arch/arm64/boot/dts/amlogic/meson-gx.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
index fd1d0deef889..0b57d037974c 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
@@ -1,12 +1,12 @@
/*
+ * Copyright (c) 2016 Andreas F?rber
+ *
* Copyright (c) 2016 BayLibre, SAS.
* Author: Neil Armstrong <narmstrong@baylibre.com>
*
* Copyright (c) 2016 Endless Computers, Inc.
* Author: Carlo Caione <carlo@endlessm.com>
*
- * Copyright (c) 2016 Andreas F?rber
- *
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
--
2.6.6
^ permalink raw reply related
* [PATCH RFC] ARM: dts: add support for Turris Omnia
From: Uwe Kleine-König @ 2016-11-06 19:32 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161106162809.GA14042@lunn.ch>
Hello,
I just noticed that I dropped the other recipents from the conversation.
I readded them also adding some context.
> > On Sun, Nov 06, 2016 at 05:28:09PM +0100, Andrew Lunn wrote:
> > > On Sun, Nov 06, 2016 at 11:45:34AM +0100, Uwe Kleine-K?nig wrote:
> > > > + switch at 0 {
> > > > + compatible = "marvell,mv88e6176", "marvell,mv88e6085";
> > >
> > > All currently supported switches are compatible with the mv88e6085, in
> > > terms of probing. During the probe it can read an ID register to find
> > > out what specific switch it is, so you don't need additional details
> > > here. So please drop the marvell,mv88e6176, it will never be used.
> >
> > That's what I know from several imx devices, for example look at
> >
> > $ git grep imx25 arch/arm/boot/dts/imx25.dtsi
> >
> > There are several instances of imx25-something,
> > imx$earliersoc-something. Given there is a good reason for this, I
> > wonder why it's different here.
>
> Possibly because you cannot easily tell the variants apart using ID
> registers in the devices register space? For the switch it is very
> easy, port register 3 is the ID. It only becomes an issue when probe
> cannot find this register. There is a new generation mv88e6390 which
> i'm currently adding support for which has moved the port
> registers. So i need to add a new compatible string so probe knows
> where to look.
Even if you cannot easily distinguish between an "fsl,imx35-cspi" and an
"fsl,imx27-cspi" by inspecting hardware registers, it would be enough to
write in imx25.dtsi
compatible = "fsl,imx35-cspi";
still we're writing
compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
because it never hurts and is helpful when later some differences are
found and it documents the situation more accurately.
I wonder what the dt people have to say here.
> > > From what you say here, the switch is in mulit-chip mode, at address
> > > 0x10. So set the reg property to <0x10>.
> >
> > When using 0x10 I get
> >
> > mv88e6085 f1072004.mdio-mi:10: switch 0x176 probed: Marvell 88E6176, revision 1
>
> Great.
>
> >
> > so now I have to find out how to use this.
>
> Just use them as normal interfaces. ip addr add 10.42.42.42/24 dev
> lan4, brctrl addif br0 lan2, ethtool -S lan1 etc.
>
> The whole idea is that they are just normal Linux network interfaces.
That's how I expected things to be, but
uwe at omnia:~$ dmesg | tail
...
[ 2164.644589] libphy: mdio_driver_register: mv88e6085
[ 2164.649823] mv88e6085 f1072004.mdio-mi:10: switch 0x176 probed: Marvell 88E6176, revision 1
uwe at omnia:~$ ls /sys/class/net/
eth0 eth1 eth2 lo
there are no additional interfaces. I will debug a bit further.
Best regards
Uwe
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* [PATCH 00/19] Various Armada 370/XP DT warning fixup
From: Gregory CLEMENT @ 2016-11-06 22:26 UTC (permalink / raw)
To: linux-arm-kernel
As it was done a few months ago for kirkwood, this patchset fixes up
various warning from the DT compiler when using the flag W=1 with
make.
The only remaining warnings are the following:
DTC arch/arm/boot/dts/armada-370-db.dtb
Warning (unit_address_vs_reg): Node /sound/simple-audio-card,dai-link at 0 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound/simple-audio-card,dai-link at 1 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound/simple-audio-card,dai-link at 2 has a unit name, but no reg property
However it seems a false positive as here the '@' is part of the name
of the node and is not a reference of an address. Moreover the node
name is directly used by the driver so it must not be modified.
While working on this series I found that currently PCIe can't work on
the Armada XP Matrix board, the firs patch fixes it.
The next steps will be to do the same on the Armada 375, 38x, 39x and
on the arm64 SoCs.
Then an other improvement would be to flatten the device tree of the
dts by using the reference to the label as much as possible.
Gregory
Gregory CLEMENT (19):
ARM: dts: armada-xp-matrix: Fix the location of the pcie-controller
node
ARM: dts: armada-370-xp: move the cpurst node in the common file
ARM: dts: armada-370-xp: add node labels
ARM: dts: armada-370-xp: Use the node labels
ARM: dts: armada-370-xp: Fixup mdio DT warning
ARM: dts: armada-370-xp: Fixup bootrom DT warning
ARM: dts: armada-370-xp: Fixup devbus DT warning
ARM: dts: armada-370-xp: Fixup bm-bppi DT warning
ARM: dts: armada-370-xp: Fixup sa-ram DT warning
ARM: dts: armada-xp: Fixup pcie DT warnings
ARM: dts: armada-370: Fixup pcie DT warnings
ARM: dts: armada-370-xp: Remove skeleton.dtsi
ARM: dts: armada-370-xp: Fixup l2-cache DT warning
ARM: dts: armada-370-xp: Fixup internal-regs DT warning
ARM: dts: armada-370-xp: Fixup soc DT warning
ARM: dts: armada-370-xp: Fixup memory DT warning
ARM: dts: armada-370-xp: Remove address from dsa unit name
ARM: dts: armada-370-xp: Remove button address and fixup names
ARM: dts: armada-370-xp: Fixup regulator DT warning
arch/arm/boot/dts/armada-370-db.dts | 67 ++++----
arch/arm/boot/dts/armada-370-dlink-dns327l.dts | 34 ++---
arch/arm/boot/dts/armada-370-mirabox.dts | 61 ++++----
arch/arm/boot/dts/armada-370-netgear-rn102.dts | 54 +++----
arch/arm/boot/dts/armada-370-netgear-rn104.dts | 62 ++++----
arch/arm/boot/dts/armada-370-rd.dts | 61 ++++----
arch/arm/boot/dts/armada-370-seagate-nas-4bay.dts | 31 ++--
arch/arm/boot/dts/armada-370-seagate-nas-xbay.dtsi | 49 +++---
.../dts/armada-370-seagate-personal-cloud-2bay.dts | 4 +-
.../boot/dts/armada-370-seagate-personal-cloud.dts | 4 +-
.../dts/armada-370-seagate-personal-cloud.dtsi | 48 +++---
arch/arm/boot/dts/armada-370-synology-ds213j.dts | 22 +--
arch/arm/boot/dts/armada-370-xp.dtsi | 43 +++---
arch/arm/boot/dts/armada-370.dtsi | 144 +++++++++--------
arch/arm/boot/dts/armada-xp-axpwifiap.dts | 72 ++++-----
arch/arm/boot/dts/armada-xp-db.dts | 170 ++++++++++-----------
arch/arm/boot/dts/armada-xp-gp.dts | 146 +++++++++---------
arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts | 57 ++++---
arch/arm/boot/dts/armada-xp-linksys-mamba.dts | 56 +++----
arch/arm/boot/dts/armada-xp-matrix.dts | 24 +--
arch/arm/boot/dts/armada-xp-mv78230.dtsi | 16 +-
arch/arm/boot/dts/armada-xp-mv78260.dtsi | 24 +--
arch/arm/boot/dts/armada-xp-mv78460.dtsi | 26 ++--
arch/arm/boot/dts/armada-xp-netgear-rn2120.dts | 71 ++++-----
arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts | 124 +++++++--------
arch/arm/boot/dts/armada-xp-synology-ds414.dts | 79 +++++-----
arch/arm/boot/dts/armada-xp.dtsi | 106 ++++++-------
27 files changed, 832 insertions(+), 823 deletions(-)
--
2.10.1
^ permalink raw reply
* [PATCH 01/19] ARM: dts: armada-xp-matrix: Fix the location of the pcie-controller node
From: Gregory CLEMENT @ 2016-11-06 22:26 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161106222712.27366-1-gregory.clement@free-electrons.com>
In the dts for the Marvell Armada XP Matrix board the pcie-controller was
located under the internal-regs node whereas it belongs to the soc node.
It means that, until this fix, the pcie could not work for this board
because it didn't match the definition of the pcie-controller node in the
dtsi file. If we had a look on the decompiled dtb file we saw two
different instances of the pcie-controller node: one with the all the
resource set but disabled and the other without any resource but enabled.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
---
arch/arm/boot/dts/armada-xp-matrix.dts | 18 +++++++++---------
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/arch/arm/boot/dts/armada-xp-matrix.dts b/arch/arm/boot/dts/armada-xp-matrix.dts
index 6522b04f4a8e..e1509f4c5114 100644
--- a/arch/arm/boot/dts/armada-xp-matrix.dts
+++ b/arch/arm/boot/dts/armada-xp-matrix.dts
@@ -71,6 +71,15 @@
MBUS_ID(0x09, 0x09) 0 0 0xf1100000 0x10000
MBUS_ID(0x09, 0x05) 0 0 0xf1110000 0x10000>;
+ pcie-controller {
+ status = "okay";
+
+ pcie at 1,0 {
+ /* Port 0, Lane 0 */
+ status = "okay";
+ };
+ };
+
internal-regs {
serial at 12000 {
status = "okay";
@@ -99,15 +108,6 @@
};
};
- pcie-controller {
- status = "okay";
-
- pcie at 1,0 {
- /* Port 0, Lane 0 */
- status = "okay";
- };
- };
-
usb at 50000 {
status = "okay";
};
--
2.10.1
^ permalink raw reply related
* [PATCH 02/19] ARM: dts: armada-370-xp: move the cpurst node in the common file
From: Gregory CLEMENT @ 2016-11-06 22:26 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161106222712.27366-1-gregory.clement@free-electrons.com>
The cpurst nodes are identical in armada-370.dtsi and armada-xp.dtsi
files, so move it in the common armada-370-xp.dtsi file.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
---
arch/arm/boot/dts/armada-370-xp.dtsi | 5 +++++
arch/arm/boot/dts/armada-370.dtsi | 5 -----
arch/arm/boot/dts/armada-xp.dtsi | 1 -
3 files changed, 5 insertions(+), 6 deletions(-)
diff --git a/arch/arm/boot/dts/armada-370-xp.dtsi b/arch/arm/boot/dts/armada-370-xp.dtsi
index 3ccedc9dffb2..1d8171380fa0 100644
--- a/arch/arm/boot/dts/armada-370-xp.dtsi
+++ b/arch/arm/boot/dts/armada-370-xp.dtsi
@@ -228,6 +228,11 @@
reg = <0x20300 0x34>, <0x20704 0x4>;
};
+ cpurst at 20800 {
+ compatible = "marvell,armada-370-cpu-reset";
+ reg = <0x20800 0x8>;
+ };
+
pmsu at 22000 {
compatible = "marvell,armada-370-pmsu";
reg = <0x22000 0x1000>;
diff --git a/arch/arm/boot/dts/armada-370.dtsi b/arch/arm/boot/dts/armada-370.dtsi
index b4258105e91f..79b5463209aa 100644
--- a/arch/arm/boot/dts/armada-370.dtsi
+++ b/arch/arm/boot/dts/armada-370.dtsi
@@ -233,11 +233,6 @@
clocks = <&coreclk 2>;
};
- cpurst at 20800 {
- compatible = "marvell,armada-370-cpu-reset";
- reg = <0x20800 0x8>;
- };
-
cpu-config at 21000 {
compatible = "marvell,armada-370-cpu-config";
reg = <0x21000 0x8>;
diff --git a/arch/arm/boot/dts/armada-xp.dtsi b/arch/arm/boot/dts/armada-xp.dtsi
index 4a5f99e65b51..e141de2a4a1c 100644
--- a/arch/arm/boot/dts/armada-xp.dtsi
+++ b/arch/arm/boot/dts/armada-xp.dtsi
@@ -167,7 +167,6 @@
};
cpurst at 20800 {
- compatible = "marvell,armada-370-cpu-reset";
reg = <0x20800 0x20>;
};
--
2.10.1
^ permalink raw reply related
* [PATCH 03/19] ARM: dts: armada-370-xp: add node labels
From: Gregory CLEMENT @ 2016-11-06 22:26 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161106222712.27366-1-gregory.clement@free-electrons.com>
As it was previously done for kirkwood, this adds missing node labels to
Armada 370 and XP common and SoC specific nodes to allow to reference
them more easily.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
---
arch/arm/boot/dts/armada-370-xp.dtsi | 32 ++++++++++++++++----------------
arch/arm/boot/dts/armada-370.dtsi | 20 ++++++++++----------
arch/arm/boot/dts/armada-xp-mv78230.dtsi | 12 ++++++------
arch/arm/boot/dts/armada-xp-mv78260.dtsi | 20 ++++++++++----------
arch/arm/boot/dts/armada-xp-mv78460.dtsi | 22 +++++++++++-----------
arch/arm/boot/dts/armada-xp.dtsi | 12 ++++++------
6 files changed, 59 insertions(+), 59 deletions(-)
diff --git a/arch/arm/boot/dts/armada-370-xp.dtsi b/arch/arm/boot/dts/armada-370-xp.dtsi
index 1d8171380fa0..54359896b76c 100644
--- a/arch/arm/boot/dts/armada-370-xp.dtsi
+++ b/arch/arm/boot/dts/armada-370-xp.dtsi
@@ -86,7 +86,7 @@
pcie-mem-aperture = <0xf8000000 0x7e00000>;
pcie-io-aperture = <0xffe00000 0x100000>;
- devbus-bootcs {
+ devbus_bootcs: devbus-bootcs {
compatible = "marvell,mvebu-devbus";
reg = <MBUS_ID(0xf0, 0x01) 0x10400 0x8>;
ranges = <0 MBUS_ID(0x01, 0x2f) 0 0xffffffff>;
@@ -96,7 +96,7 @@
status = "disabled";
};
- devbus-cs0 {
+ devbus_cs0: devbus-cs0 {
compatible = "marvell,mvebu-devbus";
reg = <MBUS_ID(0xf0, 0x01) 0x10408 0x8>;
ranges = <0 MBUS_ID(0x01, 0x3e) 0 0xffffffff>;
@@ -106,7 +106,7 @@
status = "disabled";
};
- devbus-cs1 {
+ devbus_cs1: devbus-cs1 {
compatible = "marvell,mvebu-devbus";
reg = <MBUS_ID(0xf0, 0x01) 0x10410 0x8>;
ranges = <0 MBUS_ID(0x01, 0x3d) 0 0xffffffff>;
@@ -116,7 +116,7 @@
status = "disabled";
};
- devbus-cs2 {
+ devbus_cs2: devbus-cs2 {
compatible = "marvell,mvebu-devbus";
reg = <MBUS_ID(0xf0, 0x01) 0x10418 0x8>;
ranges = <0 MBUS_ID(0x01, 0x3b) 0 0xffffffff>;
@@ -126,7 +126,7 @@
status = "disabled";
};
- devbus-cs3 {
+ devbus_cs3: devbus-cs3 {
compatible = "marvell,mvebu-devbus";
reg = <MBUS_ID(0xf0, 0x01) 0x10420 0x8>;
ranges = <0 MBUS_ID(0x01, 0x37) 0 0xffffffff>;
@@ -142,7 +142,7 @@
#size-cells = <1>;
ranges = <0 MBUS_ID(0xf0, 0x01) 0 0x100000>;
- rtc at 10300 {
+ rtc: rtc at 10300 {
compatible = "marvell,orion-rtc";
reg = <0x10300 0x20>;
interrupts = <50>;
@@ -214,38 +214,38 @@
msi-controller;
};
- coherency-fabric at 20200 {
+ coherencyfab: coherency-fabric at 20200 {
compatible = "marvell,coherency-fabric";
reg = <0x20200 0xb0>, <0x21010 0x1c>;
};
- timer at 20300 {
+ timer: timer at 20300 {
reg = <0x20300 0x30>, <0x21040 0x30>;
interrupts = <37>, <38>, <39>, <40>, <5>, <6>;
};
- watchdog at 20300 {
+ watchdog: watchdog at 20300 {
reg = <0x20300 0x34>, <0x20704 0x4>;
};
- cpurst at 20800 {
+ cpurst: cpurst at 20800 {
compatible = "marvell,armada-370-cpu-reset";
reg = <0x20800 0x8>;
};
- pmsu at 22000 {
+ pmsu: pmsu at 22000 {
compatible = "marvell,armada-370-pmsu";
reg = <0x22000 0x1000>;
};
- usb at 50000 {
+ usb0: usb at 50000 {
compatible = "marvell,orion-ehci";
reg = <0x50000 0x500>;
interrupts = <45>;
status = "disabled";
};
- usb at 51000 {
+ usb1: usb at 51000 {
compatible = "marvell,orion-ehci";
reg = <0x51000 0x500>;
interrupts = <46>;
@@ -274,7 +274,7 @@
status = "disabled";
};
- sata at a0000 {
+ sata: sata at a0000 {
compatible = "marvell,armada-370-sata";
reg = <0xa0000 0x5000>;
interrupts = <55>;
@@ -283,7 +283,7 @@
status = "disabled";
};
- nand at d0000 {
+ nand: nand at d0000 {
compatible = "marvell,armada370-nand";
reg = <0xd0000 0x54>;
#address-cells = <1>;
@@ -293,7 +293,7 @@
status = "disabled";
};
- mvsdio at d4000 {
+ sdio: mvsdio at d4000 {
compatible = "marvell,orion-sdio";
reg = <0xd4000 0x200>;
interrupts = <54>;
diff --git a/arch/arm/boot/dts/armada-370.dtsi b/arch/arm/boot/dts/armada-370.dtsi
index 79b5463209aa..5ed086da1e51 100644
--- a/arch/arm/boot/dts/armada-370.dtsi
+++ b/arch/arm/boot/dts/armada-370.dtsi
@@ -70,7 +70,7 @@
reg = <MBUS_ID(0x01, 0xe0) 0 0x100000>;
};
- pcie-controller {
+ pciec: pcie-controller {
compatible = "marvell,armada-370-pcie";
status = "disabled";
device_type = "pci";
@@ -89,7 +89,7 @@
0x82000000 0x2 0 MBUS_ID(0x08, 0xe8) 0 1 0 /* Port 1.0 MEM */
0x81000000 0x2 0 MBUS_ID(0x08, 0xe0) 0 1 0 /* Port 1.0 IO */>;
- pcie at 1,0 {
+ pcie0: pcie at 1,0 {
device_type = "pci";
assigned-addresses = <0x82000800 0 0x40000 0 0x2000>;
reg = <0x0800 0 0 0 0>;
@@ -106,7 +106,7 @@
status = "disabled";
};
- pcie at 2,0 {
+ pcie2: pcie at 2,0 {
device_type = "pci";
assigned-addresses = <0x82002800 0 0x80000 0 0x2000>;
reg = <0x1000 0 0 0 0>;
@@ -190,7 +190,7 @@
pinctrl-names = "default";
};
- system-controller at 18200 {
+ systemc: system-controller at 18200 {
compatible = "marvell,armada-370-xp-system-controller";
reg = <0x18200 0x100>;
};
@@ -208,14 +208,14 @@
#clock-cells = <1>;
};
- thermal at 18300 {
+ thermal: thermal at 18300 {
compatible = "marvell,armada370-thermal";
reg = <0x18300 0x4
0x18304 0x4>;
status = "okay";
};
- sscg at 18330 {
+ sscg: sscg at 18330 {
reg = <0x18330 0x4>;
};
@@ -233,7 +233,7 @@
clocks = <&coreclk 2>;
};
- cpu-config at 21000 {
+ cpuconf: cpu-config at 21000 {
compatible = "marvell,armada-370-cpu-config";
reg = <0x21000 0x8>;
};
@@ -256,7 +256,7 @@
clocks = <&coreclk 0>;
};
- xor at 60800 {
+ xor0: xor at 60800 {
compatible = "marvell,orion-xor";
reg = <0x60800 0x100
0x60A00 0x100>;
@@ -275,7 +275,7 @@
};
};
- xor at 60900 {
+ xor1: xor at 60900 {
compatible = "marvell,orion-xor";
reg = <0x60900 0x100
0x60b00 0x100>;
@@ -302,7 +302,7 @@
compatible = "marvell,armada-370-neta";
};
- crypto at 90000 {
+ cesa: crypto at 90000 {
compatible = "marvell,armada-370-crypto";
reg = <0x90000 0x10000>;
reg-names = "regs";
diff --git a/arch/arm/boot/dts/armada-xp-mv78230.dtsi b/arch/arm/boot/dts/armada-xp-mv78230.dtsi
index 6e6d0f04bf2b..ebf79d6de1a1 100644
--- a/arch/arm/boot/dts/armada-xp-mv78230.dtsi
+++ b/arch/arm/boot/dts/armada-xp-mv78230.dtsi
@@ -86,7 +86,7 @@
* configured as x4 or quad x1 lanes. One unit is
* x1 only.
*/
- pcie-controller {
+ pciec: pcie-controller {
compatible = "marvell,armada-xp-pcie";
status = "disabled";
device_type = "pci";
@@ -114,7 +114,7 @@
0x82000000 0x5 0 MBUS_ID(0x08, 0xe8) 0 1 0 /* Port 1.0 MEM */
0x81000000 0x5 0 MBUS_ID(0x08, 0xe0) 0 1 0 /* Port 1.0 IO */>;
- pcie at 1,0 {
+ pcie1: pcie at 1,0 {
device_type = "pci";
assigned-addresses = <0x82000800 0 0x40000 0 0x2000>;
reg = <0x0800 0 0 0 0>;
@@ -131,7 +131,7 @@
status = "disabled";
};
- pcie at 2,0 {
+ pcie2: pcie at 2,0 {
device_type = "pci";
assigned-addresses = <0x82000800 0 0x44000 0 0x2000>;
reg = <0x1000 0 0 0 0>;
@@ -148,7 +148,7 @@
status = "disabled";
};
- pcie at 3,0 {
+ pcie3: pcie at 3,0 {
device_type = "pci";
assigned-addresses = <0x82000800 0 0x48000 0 0x2000>;
reg = <0x1800 0 0 0 0>;
@@ -165,7 +165,7 @@
status = "disabled";
};
- pcie at 4,0 {
+ pcie4: pcie at 4,0 {
device_type = "pci";
assigned-addresses = <0x82000800 0 0x4c000 0 0x2000>;
reg = <0x2000 0 0 0 0>;
@@ -182,7 +182,7 @@
status = "disabled";
};
- pcie at 5,0 {
+ pcie5: pcie at 5,0 {
device_type = "pci";
assigned-addresses = <0x82000800 0 0x80000 0 0x2000>;
reg = <0x2800 0 0 0 0>;
diff --git a/arch/arm/boot/dts/armada-xp-mv78260.dtsi b/arch/arm/boot/dts/armada-xp-mv78260.dtsi
index c5fdc99f0dbe..34e78a568460 100644
--- a/arch/arm/boot/dts/armada-xp-mv78260.dtsi
+++ b/arch/arm/boot/dts/armada-xp-mv78260.dtsi
@@ -87,7 +87,7 @@
* configured as x4 or quad x1 lanes. One unit is
* x4 only.
*/
- pcie-controller {
+ pciec: pcie-controller {
compatible = "marvell,armada-xp-pcie";
status = "disabled";
device_type = "pci";
@@ -129,7 +129,7 @@
0x82000000 0x9 0 MBUS_ID(0x04, 0xf8) 0 1 0 /* Port 2.0 MEM */
0x81000000 0x9 0 MBUS_ID(0x04, 0xf0) 0 1 0 /* Port 2.0 IO */>;
- pcie at 1,0 {
+ pcie1: pcie at 1,0 {
device_type = "pci";
assigned-addresses = <0x82000800 0 0x40000 0 0x2000>;
reg = <0x0800 0 0 0 0>;
@@ -146,7 +146,7 @@
status = "disabled";
};
- pcie at 2,0 {
+ pcie2: pcie at 2,0 {
device_type = "pci";
assigned-addresses = <0x82000800 0 0x44000 0 0x2000>;
reg = <0x1000 0 0 0 0>;
@@ -163,7 +163,7 @@
status = "disabled";
};
- pcie at 3,0 {
+ pcie3: pcie at 3,0 {
device_type = "pci";
assigned-addresses = <0x82000800 0 0x48000 0 0x2000>;
reg = <0x1800 0 0 0 0>;
@@ -180,7 +180,7 @@
status = "disabled";
};
- pcie at 4,0 {
+ pcie4: pcie at 4,0 {
device_type = "pci";
assigned-addresses = <0x82000800 0 0x4c000 0 0x2000>;
reg = <0x2000 0 0 0 0>;
@@ -197,7 +197,7 @@
status = "disabled";
};
- pcie at 5,0 {
+ pcie5: pcie at 5,0 {
device_type = "pci";
assigned-addresses = <0x82000800 0 0x80000 0 0x2000>;
reg = <0x2800 0 0 0 0>;
@@ -214,7 +214,7 @@
status = "disabled";
};
- pcie at 6,0 {
+ pcie6: pcie at 6,0 {
device_type = "pci";
assigned-addresses = <0x82000800 0 0x84000 0 0x2000>;
reg = <0x3000 0 0 0 0>;
@@ -231,7 +231,7 @@
status = "disabled";
};
- pcie at 7,0 {
+ pcie7: pcie at 7,0 {
device_type = "pci";
assigned-addresses = <0x82000800 0 0x88000 0 0x2000>;
reg = <0x3800 0 0 0 0>;
@@ -248,7 +248,7 @@
status = "disabled";
};
- pcie at 8,0 {
+ pcie8: pcie at 8,0 {
device_type = "pci";
assigned-addresses = <0x82000800 0 0x8c000 0 0x2000>;
reg = <0x4000 0 0 0 0>;
@@ -265,7 +265,7 @@
status = "disabled";
};
- pcie at 9,0 {
+ pcie9: pcie at 9,0 {
device_type = "pci";
assigned-addresses = <0x82000800 0 0x42000 0 0x2000>;
reg = <0x4800 0 0 0 0>;
diff --git a/arch/arm/boot/dts/armada-xp-mv78460.dtsi b/arch/arm/boot/dts/armada-xp-mv78460.dtsi
index 0e24f1a38540..5148827ed934 100644
--- a/arch/arm/boot/dts/armada-xp-mv78460.dtsi
+++ b/arch/arm/boot/dts/armada-xp-mv78460.dtsi
@@ -104,7 +104,7 @@
* configured as x4 or quad x1 lanes. Two units are
* x4/x1.
*/
- pcie-controller {
+ pciec: pcie-controller {
compatible = "marvell,armada-xp-pcie";
status = "disabled";
device_type = "pci";
@@ -150,7 +150,7 @@
0x82000000 0xa 0 MBUS_ID(0x08, 0xf8) 0 1 0 /* Port 3.0 MEM */
0x81000000 0xa 0 MBUS_ID(0x08, 0xf0) 0 1 0 /* Port 3.0 IO */>;
- pcie at 1,0 {
+ pcie1: pcie at 1,0 {
device_type = "pci";
assigned-addresses = <0x82000800 0 0x40000 0 0x2000>;
reg = <0x0800 0 0 0 0>;
@@ -167,7 +167,7 @@
status = "disabled";
};
- pcie at 2,0 {
+ pcie2: pcie at 2,0 {
device_type = "pci";
assigned-addresses = <0x82001000 0 0x44000 0 0x2000>;
reg = <0x1000 0 0 0 0>;
@@ -184,7 +184,7 @@
status = "disabled";
};
- pcie at 3,0 {
+ pcie3: pcie at 3,0 {
device_type = "pci";
assigned-addresses = <0x82001800 0 0x48000 0 0x2000>;
reg = <0x1800 0 0 0 0>;
@@ -201,7 +201,7 @@
status = "disabled";
};
- pcie at 4,0 {
+ pcie4: pcie at 4,0 {
device_type = "pci";
assigned-addresses = <0x82002000 0 0x4c000 0 0x2000>;
reg = <0x2000 0 0 0 0>;
@@ -218,7 +218,7 @@
status = "disabled";
};
- pcie at 5,0 {
+ pcie5: pcie at 5,0 {
device_type = "pci";
assigned-addresses = <0x82002800 0 0x80000 0 0x2000>;
reg = <0x2800 0 0 0 0>;
@@ -235,7 +235,7 @@
status = "disabled";
};
- pcie at 6,0 {
+ pcie6: pcie at 6,0 {
device_type = "pci";
assigned-addresses = <0x82003000 0 0x84000 0 0x2000>;
reg = <0x3000 0 0 0 0>;
@@ -252,7 +252,7 @@
status = "disabled";
};
- pcie at 7,0 {
+ pcie7: pcie at 7,0 {
device_type = "pci";
assigned-addresses = <0x82003800 0 0x88000 0 0x2000>;
reg = <0x3800 0 0 0 0>;
@@ -269,7 +269,7 @@
status = "disabled";
};
- pcie at 8,0 {
+ pcie8: pcie at 8,0 {
device_type = "pci";
assigned-addresses = <0x82004000 0 0x8c000 0 0x2000>;
reg = <0x4000 0 0 0 0>;
@@ -286,7 +286,7 @@
status = "disabled";
};
- pcie at 9,0 {
+ pcie9: pcie at 9,0 {
device_type = "pci";
assigned-addresses = <0x82004800 0 0x42000 0 0x2000>;
reg = <0x4800 0 0 0 0>;
@@ -303,7 +303,7 @@
status = "disabled";
};
- pcie at 10,0 {
+ pcie10: pcie at 10,0 {
device_type = "pci";
assigned-addresses = <0x82005000 0 0x82000 0 0x2000>;
reg = <0x5000 0 0 0 0>;
diff --git a/arch/arm/boot/dts/armada-xp.dtsi b/arch/arm/boot/dts/armada-xp.dtsi
index e141de2a4a1c..654a61e525b4 100644
--- a/arch/arm/boot/dts/armada-xp.dtsi
+++ b/arch/arm/boot/dts/armada-xp.dtsi
@@ -118,7 +118,7 @@
status = "disabled";
};
- system-controller at 18200 {
+ systemc: system-controller at 18200 {
compatible = "marvell,armada-370-xp-system-controller";
reg = <0x18200 0x500>;
};
@@ -136,7 +136,7 @@
#clock-cells = <1>;
};
- thermal at 182b0 {
+ thermal: thermal at 182b0 {
compatible = "marvell,armadaxp-thermal";
reg = <0x182b0 0x4
0x184d0 0x4>;
@@ -191,7 +191,7 @@
clocks = <&gateclk 19>;
};
- usb at 52000 {
+ usb2: usb at 52000 {
compatible = "marvell,orion-ehci";
reg = <0x52000 0x500>;
interrupts = <47>;
@@ -199,7 +199,7 @@
status = "disabled";
};
- xor at 60900 {
+ xor1: xor at 60900 {
compatible = "marvell,orion-xor";
reg = <0x60900 0x100
0x60b00 0x100>;
@@ -227,7 +227,7 @@
compatible = "marvell,armada-xp-neta";
};
- crypto at 90000 {
+ cesa: crypto at 90000 {
compatible = "marvell,armada-xp-crypto";
reg = <0x90000 0x10000>;
reg-names = "regs";
@@ -247,7 +247,7 @@
status = "disabled";
};
- xor at f0900 {
+ xor0: xor at f0900 {
compatible = "marvell,orion-xor";
reg = <0xF0900 0x100
0xF0B00 0x100>;
--
2.10.1
^ permalink raw reply related
* [PATCH 04/19] ARM: dts: armada-370-xp: Use the node labels
From: Gregory CLEMENT @ 2016-11-06 22:26 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161106222712.27366-1-gregory.clement@free-electrons.com>
Use the node label when possible. As a result it flattens the device tree
and it makes more visible the IP blocks specific to each SoC variant.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
---
arch/arm/boot/dts/armada-370.dtsi | 105 +++++++++++++++++++-------------------
arch/arm/boot/dts/armada-xp.dtsi | 76 +++++++++++++--------------
2 files changed, 91 insertions(+), 90 deletions(-)
diff --git a/arch/arm/boot/dts/armada-370.dtsi b/arch/arm/boot/dts/armada-370.dtsi
index 5ed086da1e51..079494e52554 100644
--- a/arch/arm/boot/dts/armada-370.dtsi
+++ b/arch/arm/boot/dts/armada-370.dtsi
@@ -134,14 +134,6 @@
wt-override;
};
- i2c0: i2c at 11000 {
- reg = <0x11000 0x20>;
- };
-
- i2c1: i2c at 11100 {
- reg = <0x11100 0x20>;
- };
-
gpio0: gpio at 18100 {
compatible = "marvell,orion-gpio";
reg = <0x18100 0x40>;
@@ -175,20 +167,6 @@
interrupts = <91>;
};
- /*
- * Default UART pinctrl setting without RTS/CTS, can
- * be overwritten on board level if a different
- * configuration is used.
- */
- uart0: serial at 12000 {
- pinctrl-0 = <&uart0_pins>;
- pinctrl-names = "default";
- };
-
- uart1: serial at 12100 {
- pinctrl-0 = <&uart1_pins>;
- pinctrl-names = "default";
- };
systemc: system-controller at 18200 {
compatible = "marvell,armada-370-xp-system-controller";
@@ -219,20 +197,6 @@
reg = <0x18330 0x4>;
};
- interrupt-controller at 20a00 {
- reg = <0x20a00 0x1d0>, <0x21870 0x58>;
- };
-
- timer at 20300 {
- compatible = "marvell,armada-370-timer";
- clocks = <&coreclk 2>;
- };
-
- watchdog at 20300 {
- compatible = "marvell,armada-370-wdt";
- clocks = <&coreclk 2>;
- };
-
cpuconf: cpu-config at 21000 {
compatible = "marvell,armada-370-cpu-config";
reg = <0x21000 0x8>;
@@ -248,14 +212,6 @@
status = "disabled";
};
- usb at 50000 {
- clocks = <&coreclk 0>;
- };
-
- usb at 51000 {
- clocks = <&coreclk 0>;
- };
-
xor0: xor at 60800 {
compatible = "marvell,orion-xor";
reg = <0x60800 0x100
@@ -294,14 +250,6 @@
};
};
- ethernet at 70000 {
- compatible = "marvell,armada-370-neta";
- };
-
- ethernet at 74000 {
- compatible = "marvell,armada-370-neta";
- };
-
cesa: crypto@90000 {
compatible = "marvell,armada-370-crypto";
reg = <0x90000 0x10000>;
@@ -337,6 +285,59 @@
};
};
+/*
+ * Default UART pinctrl setting without RTS/CTS, can be overwritten on
+ * board level if a different configuration is used.
+ */
+
+&uart0 {
+ pinctrl-0 = <&uart0_pins>;
+ pinctrl-names = "default";
+};
+
+&uart1 {
+ pinctrl-0 = <&uart1_pins>;
+ pinctrl-names = "default";
+};
+
+&i2c0 {
+ reg = <0x11000 0x20>;
+};
+
+&i2c1 {
+ reg = <0x11100 0x20>;
+};
+
+&mpic {
+ reg = <0x20a00 0x1d0>, <0x21870 0x58>;
+};
+
+&timer {
+ compatible = "marvell,armada-370-timer";
+ clocks = <&coreclk 2>;
+};
+
+&watchdog {
+ compatible = "marvell,armada-370-wdt";
+ clocks = <&coreclk 2>;
+};
+
+&usb0 {
+ clocks = <&coreclk 0>;
+};
+
+&usb1 {
+ clocks = <&coreclk 0>;
+};
+
+ð0 {
+ compatible = "marvell,armada-370-neta";
+};
+
+ð1 {
+ compatible = "marvell,armada-370-neta";
+};
+
&pinctrl {
compatible = "marvell,mv88f6710-pinctrl";
diff --git a/arch/arm/boot/dts/armada-xp.dtsi b/arch/arm/boot/dts/armada-xp.dtsi
index 654a61e525b4..bb8f7dcaf656 100644
--- a/arch/arm/boot/dts/armada-xp.dtsi
+++ b/arch/arm/boot/dts/armada-xp.dtsi
@@ -84,16 +84,6 @@
wt-override;
};
- i2c0: i2c at 11000 {
- compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c";
- reg = <0x11000 0x100>;
- };
-
- i2c1: i2c at 11100 {
- compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c";
- reg = <0x11100 0x100>;
- };
-
uart2: serial at 12200 {
compatible = "snps,dw-apb-uart";
pinctrl-0 = <&uart2_pins>;
@@ -150,26 +140,6 @@
clocks = <&coreclk 1>;
};
- interrupt-controller at 20a00 {
- reg = <0x20a00 0x2d0>, <0x21070 0x58>;
- };
-
- timer at 20300 {
- compatible = "marvell,armada-xp-timer";
- clocks = <&coreclk 2>, <&refclk>;
- clock-names = "nbclk", "fixed";
- };
-
- watchdog at 20300 {
- compatible = "marvell,armada-xp-wdt";
- clocks = <&coreclk 2>, <&refclk>;
- clock-names = "nbclk", "fixed";
- };
-
- cpurst at 20800 {
- reg = <0x20800 0x20>;
- };
-
cpu-config at 21000 {
compatible = "marvell,armada-xp-cpu-config";
reg = <0x21000 0x8>;
@@ -183,14 +153,6 @@
status = "disabled";
};
- usb at 50000 {
- clocks = <&gateclk 18>;
- };
-
- usb at 51000 {
- clocks = <&gateclk 19>;
- };
-
usb2: usb at 52000 {
compatible = "marvell,orion-ehci";
reg = <0x52000 0x500>;
@@ -308,6 +270,44 @@
};
};
+&i2c0 {
+ compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c";
+ reg = <0x11000 0x100>;
+};
+
+&i2c1 {
+ compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c";
+ reg = <0x11100 0x100>;
+};
+
+&mpic {
+ reg = <0x20a00 0x2d0>, <0x21070 0x58>;
+};
+
+&timer {
+ compatible = "marvell,armada-xp-timer";
+ clocks = <&coreclk 2>, <&refclk>;
+ clock-names = "nbclk", "fixed";
+};
+
+&watchdog {
+ compatible = "marvell,armada-xp-wdt";
+ clocks = <&coreclk 2>, <&refclk>;
+ clock-names = "nbclk", "fixed";
+};
+
+&cpurst {
+ reg = <0x20800 0x20>;
+};
+
+&usb0 {
+ clocks = <&gateclk 18>;
+};
+
+&usb1 {
+ clocks = <&gateclk 19>;
+};
+
&pinctrl {
ge0_gmii_pins: ge0-gmii-pins {
marvell,pins =
--
2.10.1
^ permalink raw reply related
* [PATCH 05/19] ARM: dts: armada-370-xp: Fixup mdio DT warning
From: Gregory CLEMENT @ 2016-11-06 22:26 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161106222712.27366-1-gregory.clement@free-electrons.com>
MDIO has a reg property so the unit name should contain an address.
Take the opportunity to use the node label instead of the full name.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
---
arch/arm/boot/dts/armada-370-db.dts | 24 +++++++--------
arch/arm/boot/dts/armada-370-mirabox.dts | 23 +++++++-------
arch/arm/boot/dts/armada-370-netgear-rn102.dts | 16 +++++-----
arch/arm/boot/dts/armada-370-netgear-rn104.dts | 24 +++++++--------
arch/arm/boot/dts/armada-370-rd.dts | 19 ++++++------
arch/arm/boot/dts/armada-370-seagate-nas-4bay.dts | 13 ++++----
arch/arm/boot/dts/armada-370-seagate-nas-xbay.dtsi | 18 +++++------
.../dts/armada-370-seagate-personal-cloud.dtsi | 18 +++++------
arch/arm/boot/dts/armada-370-synology-ds213j.dts | 12 ++++----
arch/arm/boot/dts/armada-370-xp.dtsi | 2 +-
arch/arm/boot/dts/armada-xp-axpwifiap.dts | 20 ++++++------
arch/arm/boot/dts/armada-xp-db.dts | 36 +++++++++++-----------
arch/arm/boot/dts/armada-xp-gp.dts | 36 +++++++++++-----------
arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts | 20 ++++++------
arch/arm/boot/dts/armada-xp-netgear-rn2120.dts | 21 +++++++------
arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts | 36 +++++++++++-----------
arch/arm/boot/dts/armada-xp-synology-ds414.dts | 20 ++++++------
17 files changed, 181 insertions(+), 177 deletions(-)
diff --git a/arch/arm/boot/dts/armada-370-db.dts b/arch/arm/boot/dts/armada-370-db.dts
index 033fa63544f7..d26115085ea1 100644
--- a/arch/arm/boot/dts/armada-370-db.dts
+++ b/arch/arm/boot/dts/armada-370-db.dts
@@ -86,18 +86,6 @@
status = "okay";
};
- mdio {
- pinctrl-0 = <&mdio_pins>;
- pinctrl-names = "default";
- phy0: ethernet-phy at 0 {
- reg = <0>;
- };
-
- phy1: ethernet-phy at 1 {
- reg = <1>;
- };
- };
-
ethernet at 70000 {
pinctrl-0 = <&ge0_rgmii_pins>;
pinctrl-names = "default";
@@ -260,6 +248,18 @@
compatible = "linux,spdif-dir";
};
};
+&mdio {
+ pinctrl-0 = <&mdio_pins>;
+ pinctrl-names = "default";
+ phy0: ethernet-phy at 0 {
+ reg = <0>;
+ };
+
+ phy1: ethernet-phy at 1 {
+ reg = <1>;
+ };
+};
+
&spi0 {
pinctrl-0 = <&spi0_pins2>;
diff --git a/arch/arm/boot/dts/armada-370-mirabox.dts b/arch/arm/boot/dts/armada-370-mirabox.dts
index d5e19cd4d256..3e1ef56b6319 100644
--- a/arch/arm/boot/dts/armada-370-mirabox.dts
+++ b/arch/arm/boot/dts/armada-370-mirabox.dts
@@ -113,17 +113,6 @@
};
};
- mdio {
- pinctrl-0 = <&mdio_pins>;
- pinctrl-names = "default";
- phy0: ethernet-phy at 0 {
- reg = <0>;
- };
-
- phy1: ethernet-phy at 1 {
- reg = <1>;
- };
- };
ethernet at 70000 {
pinctrl-0 = <&ge0_rgmii_pins>;
pinctrl-names = "default";
@@ -197,6 +186,18 @@
};
};
+&mdio {
+ pinctrl-0 = <&mdio_pins>;
+ pinctrl-names = "default";
+ phy0: ethernet-phy at 0 {
+ reg = <0>;
+ };
+
+ phy1: ethernet-phy at 1 {
+ reg = <1>;
+ };
+};
+
&pinctrl {
pwr_led_pin: pwr-led-pin {
marvell,pins = "mpp63";
diff --git a/arch/arm/boot/dts/armada-370-netgear-rn102.dts b/arch/arm/boot/dts/armada-370-netgear-rn102.dts
index a9e3810aea65..a6409853db6d 100644
--- a/arch/arm/boot/dts/armada-370-netgear-rn102.dts
+++ b/arch/arm/boot/dts/armada-370-netgear-rn102.dts
@@ -99,14 +99,6 @@
status = "okay";
};
- mdio {
- pinctrl-0 = <&mdio_pins>;
- pinctrl-names = "default";
- phy0: ethernet-phy at 0 { /* Marvell 88E1318 */
- reg = <0>;
- };
- };
-
ethernet at 74000 {
pinctrl-0 = <&ge1_rgmii_pins>;
pinctrl-names = "default";
@@ -260,6 +252,14 @@
};
};
+&mdio {
+ pinctrl-0 = <&mdio_pins>;
+ pinctrl-names = "default";
+ phy0: ethernet-phy at 0 { /* Marvell 88E1318 */
+ reg = <0>;
+ };
+};
+
&pinctrl {
power_led_pin: power-led-pin {
marvell,pins = "mpp57";
diff --git a/arch/arm/boot/dts/armada-370-netgear-rn104.dts b/arch/arm/boot/dts/armada-370-netgear-rn104.dts
index 14c379699350..fd5f1d9a434a 100644
--- a/arch/arm/boot/dts/armada-370-netgear-rn104.dts
+++ b/arch/arm/boot/dts/armada-370-netgear-rn104.dts
@@ -93,18 +93,6 @@
status = "okay";
};
- mdio {
- pinctrl-0 = <&mdio_pins>;
- pinctrl-names = "default";
- phy0: ethernet-phy at 0 { /* Marvell 88E1318 */
- reg = <0>;
- };
-
- phy1: ethernet-phy at 1 { /* Marvell 88E1318 */
- reg = <1>;
- };
- };
-
ethernet at 70000 {
pinctrl-0 = <&ge0_rgmii_pins>;
pinctrl-names = "default";
@@ -282,6 +270,18 @@
};
};
+&mdio {
+ pinctrl-0 = <&mdio_pins>;
+ pinctrl-names = "default";
+ phy0: ethernet-phy at 0 { /* Marvell 88E1318 */
+ reg = <0>;
+ };
+
+ phy1: ethernet-phy at 1 { /* Marvell 88E1318 */
+ reg = <1>;
+ };
+};
+
&pinctrl {
poweroff: poweroff {
marvell,pins = "mpp60";
diff --git a/arch/arm/boot/dts/armada-370-rd.dts b/arch/arm/boot/dts/armada-370-rd.dts
index fbef730e8d37..621add7e12d5 100644
--- a/arch/arm/boot/dts/armada-370-rd.dts
+++ b/arch/arm/boot/dts/armada-370-rd.dts
@@ -102,14 +102,6 @@
status = "okay";
};
- mdio {
- pinctrl-0 = <&mdio_pins>;
- pinctrl-names = "default";
- phy0: ethernet-phy at 0 {
- reg = <0>;
- };
- };
-
ethernet at 70000 {
status = "okay";
phy = <&phy0>;
@@ -235,7 +227,16 @@
};
};
};
- };
+};
+
+&mdio {
+ pinctrl-0 = <&mdio_pins>;
+ pinctrl-names = "default";
+ phy0: ethernet-phy at 0 {
+ reg = <0>;
+ };
+};
+
&pinctrl {
fan_pins: fan-pins {
diff --git a/arch/arm/boot/dts/armada-370-seagate-nas-4bay.dts b/arch/arm/boot/dts/armada-370-seagate-nas-4bay.dts
index ae2e1fe50ef6..82ce5ec6467b 100644
--- a/arch/arm/boot/dts/armada-370-seagate-nas-4bay.dts
+++ b/arch/arm/boot/dts/armada-370-seagate-nas-4bay.dts
@@ -36,12 +36,6 @@
};
internal-regs {
- mdio {
- phy1: ethernet-phy at 1 {
- reg = <1>;
- };
- };
-
ethernet at 74000 {
status = "okay";
pinctrl-0 = <&ge1_rgmii_pins>;
@@ -131,3 +125,10 @@
1300 0>;
};
};
+
+&mdio {
+ phy1: ethernet-phy at 1 {
+ reg = <1>;
+ };
+};
+
diff --git a/arch/arm/boot/dts/armada-370-seagate-nas-xbay.dtsi b/arch/arm/boot/dts/armada-370-seagate-nas-xbay.dtsi
index 3036e25c5992..724a47908e3f 100644
--- a/arch/arm/boot/dts/armada-370-seagate-nas-xbay.dtsi
+++ b/arch/arm/boot/dts/armada-370-seagate-nas-xbay.dtsi
@@ -51,15 +51,6 @@
status = "okay";
};
- mdio {
- pinctrl-0 = <&mdio_pins>;
- pinctrl-names = "default";
-
- phy0: ethernet-phy at 0 {
- reg = <0>;
- };
- };
-
ethernet at 70000 {
status = "okay";
pinctrl-0 = <&ge0_rgmii_pins>;
@@ -208,6 +199,15 @@
};
};
+&mdio {
+ pinctrl-0 = <&mdio_pins>;
+ pinctrl-names = "default";
+
+ phy0: ethernet-phy at 0 {
+ reg = <0>;
+ };
+};
+
&pinctrl {
pinctrl-0 = <&hdd0_led_sata_pin>, <&hdd1_led_sata_pin>;
pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/armada-370-seagate-personal-cloud.dtsi b/arch/arm/boot/dts/armada-370-seagate-personal-cloud.dtsi
index 01cded310cbc..fb52a34f0a35 100644
--- a/arch/arm/boot/dts/armada-370-seagate-personal-cloud.dtsi
+++ b/arch/arm/boot/dts/armada-370-seagate-personal-cloud.dtsi
@@ -51,15 +51,6 @@
status = "okay";
};
- mdio {
- pinctrl-0 = <&mdio_pins>;
- pinctrl-names = "default";
-
- phy0: ethernet-phy at 0 {
- reg = <0>;
- };
- };
-
ethernet at 74000 {
status = "okay";
pinctrl-0 = <&ge1_rgmii_pins>;
@@ -143,6 +134,15 @@
};
};
+&mdio {
+ pinctrl-0 = <&mdio_pins>;
+ pinctrl-names = "default";
+
+ phy0: ethernet-phy at 0 {
+ reg = <0>;
+ };
+};
+
&pinctrl {
pinctrl-0 = <&sata_led_pin>;
pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/armada-370-synology-ds213j.dts b/arch/arm/boot/dts/armada-370-synology-ds213j.dts
index a9cc42776874..a696bbf0f703 100644
--- a/arch/arm/boot/dts/armada-370-synology-ds213j.dts
+++ b/arch/arm/boot/dts/armada-370-synology-ds213j.dts
@@ -127,12 +127,6 @@
status = "okay";
};
- mdio {
- phy1: ethernet-phy at 1 { /* Marvell 88E1512 */
- reg = <1>;
- };
- };
-
ethernet at 70000 {
status = "okay";
phy = <&phy1>;
@@ -220,6 +214,12 @@
};
};
+&mdio {
+ phy1: ethernet-phy at 1 { /* Marvell 88E1512 */
+ reg = <1>;
+ };
+};
+
&pinctrl {
disk1_led_pin: disk1-led-pin {
marvell,pins = "mpp31";
diff --git a/arch/arm/boot/dts/armada-370-xp.dtsi b/arch/arm/boot/dts/armada-370-xp.dtsi
index 54359896b76c..a4f9684def1c 100644
--- a/arch/arm/boot/dts/armada-370-xp.dtsi
+++ b/arch/arm/boot/dts/armada-370-xp.dtsi
@@ -259,7 +259,7 @@
status = "disabled";
};
- mdio: mdio {
+ mdio: mdio at 72004 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "marvell,orion-mdio";
diff --git a/arch/arm/boot/dts/armada-xp-axpwifiap.dts b/arch/arm/boot/dts/armada-xp-axpwifiap.dts
index ce152719bc28..7038c8625ac5 100644
--- a/arch/arm/boot/dts/armada-xp-axpwifiap.dts
+++ b/arch/arm/boot/dts/armada-xp-axpwifiap.dts
@@ -111,16 +111,6 @@
status = "okay";
};
- mdio {
- phy0: ethernet-phy at 0 {
- reg = <0>;
- };
-
- phy1: ethernet-phy at 1 {
- reg = <1>;
- };
- };
-
ethernet at 70000 {
pinctrl-0 = <&ge0_rgmii_pins>;
pinctrl-names = "default";
@@ -153,6 +143,16 @@
};
};
+&mdio {
+ phy0: ethernet-phy at 0 {
+ reg = <0>;
+ };
+
+ phy1: ethernet-phy at 1 {
+ reg = <1>;
+ };
+};
+
&pinctrl {
pinctrl-0 = <&phy_int_pin>;
pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/armada-xp-db.dts b/arch/arm/boot/dts/armada-xp-db.dts
index 075120bc3ec4..665c81ff98db 100644
--- a/arch/arm/boot/dts/armada-xp-db.dts
+++ b/arch/arm/boot/dts/armada-xp-db.dts
@@ -160,24 +160,6 @@
status = "okay";
};
- mdio {
- phy0: ethernet-phy at 0 {
- reg = <0>;
- };
-
- phy1: ethernet-phy at 1 {
- reg = <1>;
- };
-
- phy2: ethernet-phy at 2 {
- reg = <25>;
- };
-
- phy3: ethernet-phy at 3 {
- reg = <27>;
- };
- };
-
ethernet at 70000 {
status = "okay";
phy = <&phy0>;
@@ -266,6 +248,24 @@
};
};
+&mdio {
+ phy0: ethernet-phy at 0 {
+ reg = <0>;
+ };
+
+ phy1: ethernet-phy at 1 {
+ reg = <1>;
+ };
+
+ phy2: ethernet-phy at 2 {
+ reg = <25>;
+ };
+
+ phy3: ethernet-phy at 3 {
+ reg = <27>;
+ };
+};
+
&spi0 {
status = "okay";
diff --git a/arch/arm/boot/dts/armada-xp-gp.dts b/arch/arm/boot/dts/armada-xp-gp.dts
index 190e4eccb180..09c9cabdf67a 100644
--- a/arch/arm/boot/dts/armada-xp-gp.dts
+++ b/arch/arm/boot/dts/armada-xp-gp.dts
@@ -175,24 +175,6 @@
status = "okay";
};
- mdio {
- phy0: ethernet-phy at 0 {
- reg = <16>;
- };
-
- phy1: ethernet-phy at 1 {
- reg = <17>;
- };
-
- phy2: ethernet-phy at 2 {
- reg = <18>;
- };
-
- phy3: ethernet-phy at 3 {
- reg = <19>;
- };
- };
-
ethernet at 70000 {
status = "okay";
phy = <&phy0>;
@@ -251,6 +233,24 @@
};
};
+&mdio {
+ phy0: ethernet-phy at 0 {
+ reg = <16>;
+ };
+
+ phy1: ethernet-phy at 1 {
+ reg = <17>;
+ };
+
+ phy2: ethernet-phy at 2 {
+ reg = <18>;
+ };
+
+ phy3: ethernet-phy at 3 {
+ reg = <19>;
+ };
+};
+
&spi0 {
status = "okay";
diff --git a/arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts b/arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts
index 8af463f26ea1..0a6a43692620 100644
--- a/arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts
+++ b/arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts
@@ -89,16 +89,6 @@
status = "okay";
};
- mdio {
- phy0: ethernet-phy at 0 { /* Marvell 88E1318 */
- reg = <0>;
- };
-
- phy1: ethernet-phy at 1 { /* Marvell 88E1318 */
- reg = <1>;
- };
- };
-
ethernet at 70000 {
pinctrl-0 = <&ge0_rgmii_pins>;
pinctrl-names = "default";
@@ -296,6 +286,16 @@
};
};
+&mdio {
+ phy0: ethernet-phy at 0 { /* Marvell 88E1318 */
+ reg = <0>;
+ };
+
+ phy1: ethernet-phy at 1 { /* Marvell 88E1318 */
+ reg = <1>;
+ };
+};
+
&pinctrl {
poweroff_pin: poweroff-pin {
marvell,pins = "mpp24";
diff --git a/arch/arm/boot/dts/armada-xp-netgear-rn2120.dts b/arch/arm/boot/dts/armada-xp-netgear-rn2120.dts
index b6bf5344fbbe..c4685cb86f06 100644
--- a/arch/arm/boot/dts/armada-xp-netgear-rn2120.dts
+++ b/arch/arm/boot/dts/armada-xp-netgear-rn2120.dts
@@ -153,16 +153,6 @@
status = "okay";
};
- mdio {
- phy0: ethernet-phy at 0 { /* Marvell 88E1318 */
- reg = <0>;
- };
-
- phy1: ethernet-phy at 1 { /* Marvell 88E1318 */
- reg = <1>;
- };
- };
-
ethernet at 70000 {
pinctrl-0 = <&ge0_rgmii_pins>;
pinctrl-names = "default";
@@ -300,6 +290,17 @@
};
};
+&mdio {
+ phy0: ethernet-phy at 0 { /* Marvell 88E1318 */
+ reg = <0>;
+ };
+
+ phy1: ethernet-phy at 1 { /* Marvell 88E1318 */
+ reg = <1>;
+ };
+};
+
+
&pinctrl {
poweroff: poweroff {
marvell,pins = "mpp42";
diff --git a/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts b/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
index ed3b889d16ce..2e2cd9353761 100644
--- a/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
+++ b/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
@@ -155,24 +155,6 @@
};
};
- mdio {
- phy0: ethernet-phy at 0 {
- reg = <0>;
- };
-
- phy1: ethernet-phy at 1 {
- reg = <1>;
- };
-
- phy2: ethernet-phy at 2 {
- reg = <2>;
- };
-
- phy3: ethernet-phy at 3 {
- reg = <3>;
- };
- };
-
ethernet at 70000 {
status = "okay";
phy = <&phy0>;
@@ -240,6 +222,24 @@
};
};
+&mdio {
+ phy0: ethernet-phy at 0 {
+ reg = <0>;
+ };
+
+ phy1: ethernet-phy at 1 {
+ reg = <1>;
+ };
+
+ phy2: ethernet-phy at 2 {
+ reg = <2>;
+ };
+
+ phy3: ethernet-phy at 3 {
+ reg = <3>;
+ };
+};
+
&pinctrl {
led_pins: led-pins-0 {
marvell,pins = "mpp49", "mpp51", "mpp53";
diff --git a/arch/arm/boot/dts/armada-xp-synology-ds414.dts b/arch/arm/boot/dts/armada-xp-synology-ds414.dts
index ae286736b90a..189ec7f4667c 100644
--- a/arch/arm/boot/dts/armada-xp-synology-ds414.dts
+++ b/arch/arm/boot/dts/armada-xp-synology-ds414.dts
@@ -150,16 +150,6 @@
status = "okay";
};
- mdio {
- phy0: ethernet-phy at 0 { /* Marvell 88E1512 */
- reg = <0>;
- };
-
- phy1: ethernet-phy at 1 { /* Marvell 88E1512 */
- reg = <1>;
- };
- };
-
ethernet at 70000 {
status = "okay";
pinctrl-0 = <&ge0_rgmii_pins>;
@@ -240,6 +230,16 @@
};
};
+&mdio {
+ phy0: ethernet-phy at 0 { /* Marvell 88E1512 */
+ reg = <0>;
+ };
+
+ phy1: ethernet-phy at 1 { /* Marvell 88E1512 */
+ reg = <1>;
+ };
+};
+
&pinctrl {
sata1_pwr_pin: sata1-pwr-pin {
marvell,pins = "mpp42";
--
2.10.1
^ permalink raw reply related
* [PATCH 06/19] ARM: dts: armada-370-xp: Fixup bootrom DT warning
From: Gregory CLEMENT @ 2016-11-06 22:26 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161106222712.27366-1-gregory.clement@free-electrons.com>
bootrom has a reg property so the unit name should contain an address.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
---
arch/arm/boot/dts/armada-370.dtsi | 2 +-
arch/arm/boot/dts/armada-xp.dtsi | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/armada-370.dtsi b/arch/arm/boot/dts/armada-370.dtsi
index 079494e52554..c376c2399d5c 100644
--- a/arch/arm/boot/dts/armada-370.dtsi
+++ b/arch/arm/boot/dts/armada-370.dtsi
@@ -65,7 +65,7 @@
soc {
compatible = "marvell,armada370-mbus", "simple-bus";
- bootrom {
+ bootrom at 0 {
compatible = "marvell,bootrom";
reg = <MBUS_ID(0x01, 0xe0) 0 0x100000>;
};
diff --git a/arch/arm/boot/dts/armada-xp.dtsi b/arch/arm/boot/dts/armada-xp.dtsi
index bb8f7dcaf656..61f2880f1195 100644
--- a/arch/arm/boot/dts/armada-xp.dtsi
+++ b/arch/arm/boot/dts/armada-xp.dtsi
@@ -64,7 +64,7 @@
soc {
compatible = "marvell,armadaxp-mbus", "simple-bus";
- bootrom {
+ bootrom at 0 {
compatible = "marvell,bootrom";
reg = <MBUS_ID(0x01, 0x1d) 0 0x100000>;
};
--
2.10.1
^ permalink raw reply related
* [PATCH 07/19] ARM: dts: armada-370-xp: Fixup devbus DT warning
From: Gregory CLEMENT @ 2016-11-06 22:27 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161106222712.27366-1-gregory.clement@free-electrons.com>
devbus has a reg property so the unit name should contain an address.
Take the opportunity to use the node label instead of the full name.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
---
arch/arm/boot/dts/armada-370-xp.dtsi | 10 ++---
arch/arm/boot/dts/armada-xp-db.dts | 56 ++++++++++++------------
arch/arm/boot/dts/armada-xp-gp.dts | 56 ++++++++++++------------
arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts | 56 ++++++++++++------------
4 files changed, 89 insertions(+), 89 deletions(-)
diff --git a/arch/arm/boot/dts/armada-370-xp.dtsi b/arch/arm/boot/dts/armada-370-xp.dtsi
index a4f9684def1c..620b37db542b 100644
--- a/arch/arm/boot/dts/armada-370-xp.dtsi
+++ b/arch/arm/boot/dts/armada-370-xp.dtsi
@@ -86,7 +86,7 @@
pcie-mem-aperture = <0xf8000000 0x7e00000>;
pcie-io-aperture = <0xffe00000 0x100000>;
- devbus_bootcs: devbus-bootcs {
+ devbus_bootcs: devbus-bootcs at 10400 {
compatible = "marvell,mvebu-devbus";
reg = <MBUS_ID(0xf0, 0x01) 0x10400 0x8>;
ranges = <0 MBUS_ID(0x01, 0x2f) 0 0xffffffff>;
@@ -96,7 +96,7 @@
status = "disabled";
};
- devbus_cs0: devbus-cs0 {
+ devbus_cs0: devbus-cs0 at 10408 {
compatible = "marvell,mvebu-devbus";
reg = <MBUS_ID(0xf0, 0x01) 0x10408 0x8>;
ranges = <0 MBUS_ID(0x01, 0x3e) 0 0xffffffff>;
@@ -106,7 +106,7 @@
status = "disabled";
};
- devbus_cs1: devbus-cs1 {
+ devbus_cs1: devbus-cs1 at 10410 {
compatible = "marvell,mvebu-devbus";
reg = <MBUS_ID(0xf0, 0x01) 0x10410 0x8>;
ranges = <0 MBUS_ID(0x01, 0x3d) 0 0xffffffff>;
@@ -116,7 +116,7 @@
status = "disabled";
};
- devbus_cs2: devbus-cs2 {
+ devbus_cs2: devbus-cs2 at 10448 {
compatible = "marvell,mvebu-devbus";
reg = <MBUS_ID(0xf0, 0x01) 0x10418 0x8>;
ranges = <0 MBUS_ID(0x01, 0x3b) 0 0xffffffff>;
@@ -126,7 +126,7 @@
status = "disabled";
};
- devbus_cs3: devbus-cs3 {
+ devbus_cs3: devbus-cs3 at 10420 {
compatible = "marvell,mvebu-devbus";
reg = <MBUS_ID(0xf0, 0x01) 0x10420 0x8>;
ranges = <0 MBUS_ID(0x01, 0x37) 0 0xffffffff>;
diff --git a/arch/arm/boot/dts/armada-xp-db.dts b/arch/arm/boot/dts/armada-xp-db.dts
index 665c81ff98db..9e3bb3d7b4dc 100644
--- a/arch/arm/boot/dts/armada-xp-db.dts
+++ b/arch/arm/boot/dts/armada-xp-db.dts
@@ -80,34 +80,6 @@
MBUS_ID(0x09, 0x05) 0 0 0xf1110000 0x10000
MBUS_ID(0x0c, 0x04) 0 0 0xf1200000 0x100000>;
- devbus-bootcs {
- status = "okay";
-
- /* Device Bus parameters are required */
-
- /* Read parameters */
- devbus,bus-width = <16>;
- devbus,turn-off-ps = <60000>;
- devbus,badr-skew-ps = <0>;
- devbus,acc-first-ps = <124000>;
- devbus,acc-next-ps = <248000>;
- devbus,rd-setup-ps = <0>;
- devbus,rd-hold-ps = <0>;
-
- /* Write parameters */
- devbus,sync-enable = <0>;
- devbus,wr-high-ps = <60000>;
- devbus,wr-low-ps = <60000>;
- devbus,ale-wr-ps = <60000>;
-
- /* NOR 16 MiB */
- nor at 0 {
- compatible = "cfi-flash";
- reg = <0 0x1000000>;
- bank-width = <2>;
- };
- };
-
pcie-controller {
status = "okay";
@@ -248,6 +220,34 @@
};
};
+&devbus_bootcs {
+ status = "okay";
+
+ /* Device Bus parameters are required */
+
+ /* Read parameters */
+ devbus,bus-width = <16>;
+ devbus,turn-off-ps = <60000>;
+ devbus,badr-skew-ps = <0>;
+ devbus,acc-first-ps = <124000>;
+ devbus,acc-next-ps = <248000>;
+ devbus,rd-setup-ps = <0>;
+ devbus,rd-hold-ps = <0>;
+
+ /* Write parameters */
+ devbus,sync-enable = <0>;
+ devbus,wr-high-ps = <60000>;
+ devbus,wr-low-ps = <60000>;
+ devbus,ale-wr-ps = <60000>;
+
+ /* NOR 16 MiB */
+ nor at 0 {
+ compatible = "cfi-flash";
+ reg = <0 0x1000000>;
+ bank-width = <2>;
+ };
+};
+
&mdio {
phy0: ethernet-phy at 0 {
reg = <0>;
diff --git a/arch/arm/boot/dts/armada-xp-gp.dts b/arch/arm/boot/dts/armada-xp-gp.dts
index 09c9cabdf67a..9918c7883a36 100644
--- a/arch/arm/boot/dts/armada-xp-gp.dts
+++ b/arch/arm/boot/dts/armada-xp-gp.dts
@@ -99,34 +99,6 @@
MBUS_ID(0x09, 0x05) 0 0 0xf1110000 0x10000
MBUS_ID(0x0c, 0x04) 0 0 0xf1200000 0x100000>;
- devbus-bootcs {
- status = "okay";
-
- /* Device Bus parameters are required */
-
- /* Read parameters */
- devbus,bus-width = <16>;
- devbus,turn-off-ps = <60000>;
- devbus,badr-skew-ps = <0>;
- devbus,acc-first-ps = <124000>;
- devbus,acc-next-ps = <248000>;
- devbus,rd-setup-ps = <0>;
- devbus,rd-hold-ps = <0>;
-
- /* Write parameters */
- devbus,sync-enable = <0>;
- devbus,wr-high-ps = <60000>;
- devbus,wr-low-ps = <60000>;
- devbus,ale-wr-ps = <60000>;
-
- /* NOR 16 MiB */
- nor at 0 {
- compatible = "cfi-flash";
- reg = <0 0x1000000>;
- bank-width = <2>;
- };
- };
-
pcie-controller {
status = "okay";
@@ -233,6 +205,34 @@
};
};
+&devbus_bootcs {
+ status = "okay";
+
+ /* Device Bus parameters are required */
+
+ /* Read parameters */
+ devbus,bus-width = <16>;
+ devbus,turn-off-ps = <60000>;
+ devbus,badr-skew-ps = <0>;
+ devbus,acc-first-ps = <124000>;
+ devbus,acc-next-ps = <248000>;
+ devbus,rd-setup-ps = <0>;
+ devbus,rd-hold-ps = <0>;
+
+ /* Write parameters */
+ devbus,sync-enable = <0>;
+ devbus,wr-high-ps = <60000>;
+ devbus,wr-low-ps = <60000>;
+ devbus,ale-wr-ps = <60000>;
+
+ /* NOR 16 MiB */
+ nor at 0 {
+ compatible = "cfi-flash";
+ reg = <0 0x1000000>;
+ bank-width = <2>;
+ };
+};
+
&mdio {
phy0: ethernet-phy at 0 {
reg = <16>;
diff --git a/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts b/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
index 2e2cd9353761..c8dd5a3bccb6 100644
--- a/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
+++ b/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
@@ -70,34 +70,6 @@
MBUS_ID(0x09, 0x05) 0 0 0xf1110000 0x10000
MBUS_ID(0x0c, 0x04) 0 0 0xd1200000 0x100000>;
- devbus-bootcs {
- status = "okay";
-
- /* Device Bus parameters are required */
-
- /* Read parameters */
- devbus,bus-width = <16>;
- devbus,turn-off-ps = <60000>;
- devbus,badr-skew-ps = <0>;
- devbus,acc-first-ps = <124000>;
- devbus,acc-next-ps = <248000>;
- devbus,rd-setup-ps = <0>;
- devbus,rd-hold-ps = <0>;
-
- /* Write parameters */
- devbus,sync-enable = <0>;
- devbus,wr-high-ps = <60000>;
- devbus,wr-low-ps = <60000>;
- devbus,ale-wr-ps = <60000>;
-
- /* NOR 128 MiB */
- nor at 0 {
- compatible = "cfi-flash";
- reg = <0 0x8000000>;
- bank-width = <2>;
- };
- };
-
pcie-controller {
status = "okay";
/* Internal mini-PCIe connector */
@@ -222,6 +194,34 @@
};
};
+&devbus_bootcs {
+ status = "okay";
+
+ /* Device Bus parameters are required */
+
+ /* Read parameters */
+ devbus,bus-width = <16>;
+ devbus,turn-off-ps = <60000>;
+ devbus,badr-skew-ps = <0>;
+ devbus,acc-first-ps = <124000>;
+ devbus,acc-next-ps = <248000>;
+ devbus,rd-setup-ps = <0>;
+ devbus,rd-hold-ps = <0>;
+
+ /* Write parameters */
+ devbus,sync-enable = <0>;
+ devbus,wr-high-ps = <60000>;
+ devbus,wr-low-ps = <60000>;
+ devbus,ale-wr-ps = <60000>;
+
+ /* NOR 128 MiB */
+ nor at 0 {
+ compatible = "cfi-flash";
+ reg = <0 0x8000000>;
+ bank-width = <2>;
+ };
+};
+
&mdio {
phy0: ethernet-phy at 0 {
reg = <0>;
--
2.10.1
^ permalink raw reply related
* [PATCH 08/19] ARM: dts: armada-370-xp: Fixup bm-bppi DT warning
From: Gregory CLEMENT @ 2016-11-06 22:27 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161106222712.27366-1-gregory.clement@free-electrons.com>
bm-bppi has a reg property so the unit name should contain an address.
Take the opportunity to use the node label instead of the full name.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
---
arch/arm/boot/dts/armada-xp-db.dts | 8 ++++----
arch/arm/boot/dts/armada-xp-gp.dts | 8 ++++----
arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts | 8 ++++----
arch/arm/boot/dts/armada-xp.dtsi | 2 +-
4 files changed, 13 insertions(+), 13 deletions(-)
diff --git a/arch/arm/boot/dts/armada-xp-db.dts b/arch/arm/boot/dts/armada-xp-db.dts
index 9e3bb3d7b4dc..486caf887da4 100644
--- a/arch/arm/boot/dts/armada-xp-db.dts
+++ b/arch/arm/boot/dts/armada-xp-db.dts
@@ -213,10 +213,6 @@
};
};
};
-
- bm-bppi {
- status = "okay";
- };
};
};
@@ -248,6 +244,10 @@
};
};
+&bm_bppi {
+ status = "okay";
+};
+
&mdio {
phy0: ethernet-phy at 0 {
reg = <0>;
diff --git a/arch/arm/boot/dts/armada-xp-gp.dts b/arch/arm/boot/dts/armada-xp-gp.dts
index 9918c7883a36..65d960defff3 100644
--- a/arch/arm/boot/dts/armada-xp-gp.dts
+++ b/arch/arm/boot/dts/armada-xp-gp.dts
@@ -198,10 +198,6 @@
nand-on-flash-bbt;
};
};
-
- bm-bppi {
- status = "okay";
- };
};
};
@@ -233,6 +229,10 @@
};
};
+&bm_bppi {
+ status = "okay";
+};
+
&mdio {
phy0: ethernet-phy at 0 {
reg = <16>;
diff --git a/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts b/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
index c8dd5a3bccb6..7cd2d74e0161 100644
--- a/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
+++ b/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
@@ -187,10 +187,6 @@
status = "okay";
};
};
-
- bm-bppi {
- status = "okay";
- };
};
};
@@ -222,6 +218,10 @@
};
};
+&bm_bppi {
+ status = "okay";
+};
+
&mdio {
phy0: ethernet-phy at 0 {
reg = <0>;
diff --git a/arch/arm/boot/dts/armada-xp.dtsi b/arch/arm/boot/dts/armada-xp.dtsi
index 61f2880f1195..fff1b81b8f5f 100644
--- a/arch/arm/boot/dts/armada-xp.dtsi
+++ b/arch/arm/boot/dts/armada-xp.dtsi
@@ -248,7 +248,7 @@
ranges = <0 MBUS_ID(0x09, 0x05) 0 0x800>;
};
- bm_bppi: bm-bppi {
+ bm_bppi: bm-bppi at 0 {
compatible = "mmio-sram";
reg = <MBUS_ID(0x0c, 0x04) 0 0x100000>;
ranges = <0 MBUS_ID(0x0c, 0x04) 0 0x100000>;
--
2.10.1
^ permalink raw reply related
* [PATCH 09/19] ARM: dts: armada-370-xp: Fixup sa-ram DT warning
From: Gregory CLEMENT @ 2016-11-06 22:27 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161106222712.27366-1-gregory.clement@free-electrons.com>
sa-ram which is a mmio-sram has a reg property so the unit name should
contain an address.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
---
arch/arm/boot/dts/armada-370.dtsi | 2 +-
arch/arm/boot/dts/armada-xp.dtsi | 4 ++--
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/armada-370.dtsi b/arch/arm/boot/dts/armada-370.dtsi
index c376c2399d5c..19a9a8a67739 100644
--- a/arch/arm/boot/dts/armada-370.dtsi
+++ b/arch/arm/boot/dts/armada-370.dtsi
@@ -262,7 +262,7 @@
};
};
- crypto_sram: sa-sram {
+ crypto_sram: sa-sram at 0 {
compatible = "mmio-sram";
reg = <MBUS_ID(0x09, 0x01) 0 0x800>;
reg-names = "sram";
diff --git a/arch/arm/boot/dts/armada-xp.dtsi b/arch/arm/boot/dts/armada-xp.dtsi
index fff1b81b8f5f..4cfec3ceb523 100644
--- a/arch/arm/boot/dts/armada-xp.dtsi
+++ b/arch/arm/boot/dts/armada-xp.dtsi
@@ -230,7 +230,7 @@
};
};
- crypto_sram0: sa-sram0 {
+ crypto_sram0: sa-sram0 at 0 {
compatible = "mmio-sram";
reg = <MBUS_ID(0x09, 0x09) 0 0x800>;
clocks = <&gateclk 23>;
@@ -239,7 +239,7 @@
ranges = <0 MBUS_ID(0x09, 0x09) 0 0x800>;
};
- crypto_sram1: sa-sram1 {
+ crypto_sram1: sa-sram1 at 0 {
compatible = "mmio-sram";
reg = <MBUS_ID(0x09, 0x05) 0 0x800>;
clocks = <&gateclk 23>;
--
2.10.1
^ permalink raw reply related
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