* [RFC 3/6] Documentation: dt: add bindings for ti bb2d
From: Nishanth Menon @ 2016-11-18 2:54 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161118024436.13447-3-robertcnelson@gmail.com>
On 11/17/2016 08:44 PM, Robert Nelson wrote:
> From: Gowtham Tammana <g-tammana@ti.com>
>
> Add documentation for device tree bindings description for
> 2D GPU blitter module present in Texas Instruments family of SoCs.
>
> Signed-off-by: Gowtham Tammana <g-tammana@ti.com>
> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
> ---
Might want to point at the source of the patch -> just for the record,
this came from TI vendor kernel..
> Documentation/devicetree/bindings/gpu/ti-bb2d.txt | 27 +++++++++++++++++++++++
> 1 file changed, 27 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/gpu/ti-bb2d.txt
>
> diff --git a/Documentation/devicetree/bindings/gpu/ti-bb2d.txt b/Documentation/devicetree/bindings/gpu/ti-bb2d.txt
> new file mode 100644
> index 0000000..af47488
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/gpu/ti-bb2d.txt
> @@ -0,0 +1,27 @@
> +* Texas Instruments BB2D blitter module
> +
> +This binding describes the 2D BitBlit (BB2D) graphics accelerator
> +subsystem based on the GC320 core from Vivante Corporation available
> +in Texas Instruments SoCs.
> +
> +Required properties:
> + - compatible: value should take the following format:
> + "ti,<soc>-bb2d", "vivante,<gpuversion>"
> + accepted values:
> + (a) "ti,dra7-bb2d", "vivante,gc320" for TI DRA7xx / AM57x
> +
> + - reg : base address and length of BB2D IP registers
> + - interrupts : BB2D interrupt line number
> + - ti,hwmods : name of the hwmod associated with BB2D module
> + - clocks : handle to BB2D functional clock
> + - clock-names : fclk
> +
> +Example for DRA7x SoC:
> + bb2d: bb2d at 59000000 {
> + compatible = "ti,dra7-bb2d", "vivante,gc320";
> + reg = <0x59000000 0x0700>;
> + interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
> + ti,hwmods = "bb2d";
> + clocks = <&dpll_core_h24x2_ck>;
> + clock-names = "fclk";
> + };
>
--
Regards,
Nishanth Menon
^ permalink raw reply
* [RFC 1/6] drm/etnaviv: add binding for the gc320 found in ti socs
From: Nishanth Menon @ 2016-11-18 2:53 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161118024436.13447-1-robertcnelson@gmail.com>
On 11/17/2016 08:44 PM, Robert Nelson wrote:
Could we write at least a oneline commit message? :)
Might want to state that since the TI gpu systems are a mixed bunch
and certain SoCs may have more than 1 GPU integrated, we indicate
clearly the rev here?
> Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
> CC: Julien <jboulnois@gmail.com>
> CC: Christian Gmeiner <christian.gmeiner@gmail.com>
> CC: Russell King <rmk+kernel@arm.linux.org.uk>
> CC: Lucas Stach <l.stach@pengutronix.de>
> CC: Nishanth Menon <nm@ti.com>
> CC: Tomi Valkeinen <tomi.valkeinen@ti.com>
> CC: Tony Lindgren <tony@atomide.com>
> ---
> Documentation/devicetree/bindings/display/etnaviv/etnaviv-drm.txt | 1 +
> drivers/gpu/drm/etnaviv/etnaviv_drv.c | 1 +
> 2 files changed, 2 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/display/etnaviv/etnaviv-drm.txt b/Documentation/devicetree/bindings/display/etnaviv/etnaviv-drm.txt
> index ed5e0a7..9fa259d 100644
> --- a/Documentation/devicetree/bindings/display/etnaviv/etnaviv-drm.txt
> +++ b/Documentation/devicetree/bindings/display/etnaviv/etnaviv-drm.txt
> @@ -8,6 +8,7 @@ Required properties:
> - compatible: Should be one of
> "fsl,imx-gpu-subsystem"
> "marvell,dove-gpu-subsystem"
> + "ti,gc320-gpu-subsystem"
> - cores: Should contain a list of phandles pointing to Vivante GPU devices
>
> example:
> diff --git a/drivers/gpu/drm/etnaviv/etnaviv_drv.c b/drivers/gpu/drm/etnaviv/etnaviv_drv.c
> index a6799b0..ce51270 100644
> --- a/drivers/gpu/drm/etnaviv/etnaviv_drv.c
> +++ b/drivers/gpu/drm/etnaviv/etnaviv_drv.c
> @@ -653,6 +653,7 @@ static int etnaviv_pdev_remove(struct platform_device *pdev)
> static const struct of_device_id dt_match[] = {
> { .compatible = "fsl,imx-gpu-subsystem" },
> { .compatible = "marvell,dove-gpu-subsystem" },
> + { .compatible = "ti,gc320-gpu-subsystem" },
> {}
> };
> MODULE_DEVICE_TABLE(of, dt_match);
>
--
Regards,
Nishanth Menon
^ permalink raw reply
* [RFC 2/6] drm/etnaviv: allow building etnaviv on omap devices
From: Nishanth Menon @ 2016-11-18 2:52 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161118024436.13447-2-robertcnelson@gmail.com>
On 11/17/2016 08:44 PM, Robert Nelson wrote:
Could we write at least a oneline commit message? :)
> Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
> CC: Christian Gmeiner <christian.gmeiner@gmail.com>
> CC: Russell King <rmk+kernel@arm.linux.org.uk>
> CC: Lucas Stach <l.stach@pengutronix.de>
> ---
> drivers/gpu/drm/etnaviv/Kconfig | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/etnaviv/Kconfig b/drivers/gpu/drm/etnaviv/Kconfig
> index 2cde7a5..b776f41 100644
> --- a/drivers/gpu/drm/etnaviv/Kconfig
> +++ b/drivers/gpu/drm/etnaviv/Kconfig
> @@ -2,7 +2,7 @@
> config DRM_ETNAVIV
> tristate "ETNAVIV (DRM support for Vivante GPU IP cores)"
> depends on DRM
> - depends on ARCH_MXC || ARCH_DOVE
> + depends on ARCH_MXC || ARCH_DOVE || ARCH_OMAP2PLUS
> select SHMEM
> select TMPFS
> select IOMMU_API
>
--
Regards,
Nishanth Menon
^ permalink raw reply
* [RFC 1/6] drm/etnaviv: add binding for the gc320 found in ti socs
From: Robert Nelson @ 2016-11-18 2:51 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161118024436.13447-1-robertcnelson@gmail.com>
Sorry, messed up the cover-header, patches 3 & 4 in this series where
cherry picked form ti's v4.4.x tree:
http://git.ti.com/cgit/cgit.cgi/ti-linux-kernel/ti-linux-kernel.git/commit/arch/arm/boot/dts/dra7.dtsi?h=ti-linux-4.4.y&id=8067f5a5619ce45657d3729ab3adb9e5b1294f0d
http://git.ti.com/cgit/cgit.cgi/ti-linux-kernel/ti-linux-kernel.git/commit/Documentation/devicetree/bindings/gpu/ti-bb2d.txt?h=ti-linux-4.4.y&id=ddadad0828f8e5ad7e89b11dd243249228ff2997
"ti,gc320-gpu-subsystem" seems like the best middle ground option, the
gc320 is found on one omap4770, omap5, dra7..
"ti,omap-gpu-subsystem" might clash with the naming for the sgx544 3D
core found on these devices, then some day, ti could use
"ti,sgx<num>-gpu-subsystem"
For BeagleBoard.org & BeagleBoard-x15 users we have this working in
the updated images.
For people looking to build the packages, i have it up here:
https://gist.github.com/RobertCNelson/fc6d07157b0fcc13b9c28c5832fdc74b
Regards,
On Thu, Nov 17, 2016 at 8:44 PM, Robert Nelson <robertcnelson@gmail.com> wrote:
> Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
> CC: Julien <jboulnois@gmail.com>
> CC: Christian Gmeiner <christian.gmeiner@gmail.com>
> CC: Russell King <rmk+kernel@arm.linux.org.uk>
> CC: Lucas Stach <l.stach@pengutronix.de>
> CC: Nishanth Menon <nm@ti.com>
> CC: Tomi Valkeinen <tomi.valkeinen@ti.com>
> CC: Tony Lindgren <tony@atomide.com>
> ---
> Documentation/devicetree/bindings/display/etnaviv/etnaviv-drm.txt | 1 +
> drivers/gpu/drm/etnaviv/etnaviv_drv.c | 1 +
> 2 files changed, 2 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/display/etnaviv/etnaviv-drm.txt b/Documentation/devicetree/bindings/display/etnaviv/etnaviv-drm.txt
> index ed5e0a7..9fa259d 100644
> --- a/Documentation/devicetree/bindings/display/etnaviv/etnaviv-drm.txt
> +++ b/Documentation/devicetree/bindings/display/etnaviv/etnaviv-drm.txt
> @@ -8,6 +8,7 @@ Required properties:
> - compatible: Should be one of
> "fsl,imx-gpu-subsystem"
> "marvell,dove-gpu-subsystem"
> + "ti,gc320-gpu-subsystem"
> - cores: Should contain a list of phandles pointing to Vivante GPU devices
>
> example:
> diff --git a/drivers/gpu/drm/etnaviv/etnaviv_drv.c b/drivers/gpu/drm/etnaviv/etnaviv_drv.c
> index a6799b0..ce51270 100644
> --- a/drivers/gpu/drm/etnaviv/etnaviv_drv.c
> +++ b/drivers/gpu/drm/etnaviv/etnaviv_drv.c
> @@ -653,6 +653,7 @@ static int etnaviv_pdev_remove(struct platform_device *pdev)
> static const struct of_device_id dt_match[] = {
> { .compatible = "fsl,imx-gpu-subsystem" },
> { .compatible = "marvell,dove-gpu-subsystem" },
> + { .compatible = "ti,gc320-gpu-subsystem" },
> {}
> };
> MODULE_DEVICE_TABLE(of, dt_match);
> --
> 2.10.2
>
--
Robert Nelson
https://rcn-ee.com/
^ permalink raw reply
* [RFC 6/6] ARM: dts: am57xx-beagle-x15-common: enable etnaviv
From: Robert Nelson @ 2016-11-18 2:44 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161118024436.13447-1-robertcnelson@gmail.com>
Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
CC: Julien <jboulnois@gmail.com>
CC: Nishanth Menon <nm@ti.com>
CC: Tomi Valkeinen <tomi.valkeinen@ti.com>
CC: Tony Lindgren <tony@atomide.com>
---
arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi b/arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi
index 6df7829..3bc47be 100644
--- a/arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi
+++ b/arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi
@@ -97,6 +97,12 @@
#cooling-cells = <2>;
};
+ gpu-subsystem {
+ compatible = "ti,gc320-gpu-subsystem";
+ cores = <&bb2d>;
+ status = "okay";
+ };
+
hdmi0: connector {
compatible = "hdmi-connector";
label = "hdmi";
@@ -190,6 +196,11 @@
>;
};
};
+
+&bb2d {
+ status = "okay";
+};
+
&i2c1 {
status = "okay";
clock-frequency = <400000>;
--
2.10.2
^ permalink raw reply related
* [RFC 5/6] ARM: dts: dra7: add vivante for bb2d module
From: Robert Nelson @ 2016-11-18 2:44 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161118024436.13447-1-robertcnelson@gmail.com>
Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
CC: Julien <jboulnois@gmail.com>
CC: Nishanth Menon <nm@ti.com>
CC: Tomi Valkeinen <tomi.valkeinen@ti.com>
CC: Tony Lindgren <tony@atomide.com>
---
arch/arm/boot/dts/dra7.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 43488b6..22bd0a5 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -960,7 +960,7 @@
};
bb2d: bb2d at 59000000 {
- compatible = "ti,dra7-bb2d";
+ compatible = "ti,dra7-bb2d","vivante,gc";
reg = <0x59000000 0x0700>;
interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "bb2d";
--
2.10.2
^ permalink raw reply related
* [RFC 4/6] ARM: dts: dra7: add entry for bb2d module
From: Robert Nelson @ 2016-11-18 2:44 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161118024436.13447-1-robertcnelson@gmail.com>
From: Gowtham Tammana <g-tammana@ti.com>
BB2D entry is added to the dts file. Crossbar index number is used
for interrupt mapping.
Signed-off-by: Gowtham Tammana <g-tammana@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
---
arch/arm/boot/dts/dra7.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index addb753..43488b6 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -959,6 +959,16 @@
ti,hwmods = "dmm";
};
+ bb2d: bb2d at 59000000 {
+ compatible = "ti,dra7-bb2d";
+ reg = <0x59000000 0x0700>;
+ interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
+ ti,hwmods = "bb2d";
+ clocks = <&dpll_core_h24x2_ck>;
+ clock-names = "fclk";
+ status = "disabled";
+ };
+
i2c1: i2c at 48070000 {
compatible = "ti,omap4-i2c";
reg = <0x48070000 0x100>;
--
2.10.2
^ permalink raw reply related
* [RFC 3/6] Documentation: dt: add bindings for ti bb2d
From: Robert Nelson @ 2016-11-18 2:44 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161118024436.13447-1-robertcnelson@gmail.com>
From: Gowtham Tammana <g-tammana@ti.com>
Add documentation for device tree bindings description for
2D GPU blitter module present in Texas Instruments family of SoCs.
Signed-off-by: Gowtham Tammana <g-tammana@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
---
Documentation/devicetree/bindings/gpu/ti-bb2d.txt | 27 +++++++++++++++++++++++
1 file changed, 27 insertions(+)
create mode 100644 Documentation/devicetree/bindings/gpu/ti-bb2d.txt
diff --git a/Documentation/devicetree/bindings/gpu/ti-bb2d.txt b/Documentation/devicetree/bindings/gpu/ti-bb2d.txt
new file mode 100644
index 0000000..af47488
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpu/ti-bb2d.txt
@@ -0,0 +1,27 @@
+* Texas Instruments BB2D blitter module
+
+This binding describes the 2D BitBlit (BB2D) graphics accelerator
+subsystem based on the GC320 core from Vivante Corporation available
+in Texas Instruments SoCs.
+
+Required properties:
+ - compatible: value should take the following format:
+ "ti,<soc>-bb2d", "vivante,<gpuversion>"
+ accepted values:
+ (a) "ti,dra7-bb2d", "vivante,gc320" for TI DRA7xx / AM57x
+
+ - reg : base address and length of BB2D IP registers
+ - interrupts : BB2D interrupt line number
+ - ti,hwmods : name of the hwmod associated with BB2D module
+ - clocks : handle to BB2D functional clock
+ - clock-names : fclk
+
+Example for DRA7x SoC:
+ bb2d: bb2d at 59000000 {
+ compatible = "ti,dra7-bb2d", "vivante,gc320";
+ reg = <0x59000000 0x0700>;
+ interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
+ ti,hwmods = "bb2d";
+ clocks = <&dpll_core_h24x2_ck>;
+ clock-names = "fclk";
+ };
--
2.10.2
^ permalink raw reply related
* [RFC 2/6] drm/etnaviv: allow building etnaviv on omap devices
From: Robert Nelson @ 2016-11-18 2:44 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161118024436.13447-1-robertcnelson@gmail.com>
Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
CC: Christian Gmeiner <christian.gmeiner@gmail.com>
CC: Russell King <rmk+kernel@arm.linux.org.uk>
CC: Lucas Stach <l.stach@pengutronix.de>
---
drivers/gpu/drm/etnaviv/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/etnaviv/Kconfig b/drivers/gpu/drm/etnaviv/Kconfig
index 2cde7a5..b776f41 100644
--- a/drivers/gpu/drm/etnaviv/Kconfig
+++ b/drivers/gpu/drm/etnaviv/Kconfig
@@ -2,7 +2,7 @@
config DRM_ETNAVIV
tristate "ETNAVIV (DRM support for Vivante GPU IP cores)"
depends on DRM
- depends on ARCH_MXC || ARCH_DOVE
+ depends on ARCH_MXC || ARCH_DOVE || ARCH_OMAP2PLUS
select SHMEM
select TMPFS
select IOMMU_API
--
2.10.2
^ permalink raw reply related
* [RFC 1/6] drm/etnaviv: add binding for the gc320 found in ti socs
From: Robert Nelson @ 2016-11-18 2:44 UTC (permalink / raw)
To: linux-arm-kernel
Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
CC: Julien <jboulnois@gmail.com>
CC: Christian Gmeiner <christian.gmeiner@gmail.com>
CC: Russell King <rmk+kernel@arm.linux.org.uk>
CC: Lucas Stach <l.stach@pengutronix.de>
CC: Nishanth Menon <nm@ti.com>
CC: Tomi Valkeinen <tomi.valkeinen@ti.com>
CC: Tony Lindgren <tony@atomide.com>
---
Documentation/devicetree/bindings/display/etnaviv/etnaviv-drm.txt | 1 +
drivers/gpu/drm/etnaviv/etnaviv_drv.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/etnaviv/etnaviv-drm.txt b/Documentation/devicetree/bindings/display/etnaviv/etnaviv-drm.txt
index ed5e0a7..9fa259d 100644
--- a/Documentation/devicetree/bindings/display/etnaviv/etnaviv-drm.txt
+++ b/Documentation/devicetree/bindings/display/etnaviv/etnaviv-drm.txt
@@ -8,6 +8,7 @@ Required properties:
- compatible: Should be one of
"fsl,imx-gpu-subsystem"
"marvell,dove-gpu-subsystem"
+ "ti,gc320-gpu-subsystem"
- cores: Should contain a list of phandles pointing to Vivante GPU devices
example:
diff --git a/drivers/gpu/drm/etnaviv/etnaviv_drv.c b/drivers/gpu/drm/etnaviv/etnaviv_drv.c
index a6799b0..ce51270 100644
--- a/drivers/gpu/drm/etnaviv/etnaviv_drv.c
+++ b/drivers/gpu/drm/etnaviv/etnaviv_drv.c
@@ -653,6 +653,7 @@ static int etnaviv_pdev_remove(struct platform_device *pdev)
static const struct of_device_id dt_match[] = {
{ .compatible = "fsl,imx-gpu-subsystem" },
{ .compatible = "marvell,dove-gpu-subsystem" },
+ { .compatible = "ti,gc320-gpu-subsystem" },
{}
};
MODULE_DEVICE_TABLE(of, dt_match);
--
2.10.2
^ permalink raw reply related
* [PATCH] iommu: mtk: add common-clk dependency
From: Honghui Zhang @ 2016-11-18 2:32 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161117233502.GW25626@codeaurora.org>
On Thu, 2016-11-17 at 15:35 -0800, Stephen Boyd wrote:
> On 11/17, Honghui Zhang wrote:
> > On Wed, 2016-11-16 at 11:38 -0800, Stephen Boyd wrote:
> > > On 11/16, Arnd Bergmann wrote:
> > > > After the MT2701 clock driver was added, we get a harmless warning for
> > > > the iommu driver that selects it, when compile-testing without
> > > > COMMON_CLK.
> > > >
> > > > warning: (MTK_IOMMU_V1) selects COMMON_CLK_MT2701_IMGSYS which has unmet direct dependencies (COMMON_CLK)
> > > >
> > > > Adding a dependency on COMMON_CLK avoids the warning.
> > > >
> > > > Fixes: e9862118272a ("clk: mediatek: Add MT2701 clock support")
> > > > Signed-off-by: Arnd Bergmann <arnd@arndb.de>
> > >
> > > Hm.. why is an iommu driver selecting a clk driver? They should
> > > be using standard clk APIs so it's not like they need it for
> > > build time correctness. Shouldn't we drop the selects instead?
> > > Those look to have been introduced a few kernel versions ago, but
> > > they were selecting options that didn't exist until a few days
> > > ago when I merged the mediatek clk driver. The clk options are
> > > user-visible, so it should be possible to select them in the
> > > configuration phase.
> > >
> >
> > Hi, Stephen,
> > I'm a bit out of date of the current clock code. Mediatek IOMMU v1
> > driver will need smi driver to enable iommu clients. And smi driver is
> > also respond to enable/disable the susbsys clocks for multi-media HW.
> > The relationship between iommu and smi is like the graphics below[1].
> >
> > EMI (External Memory Interface)
> > |
> > m4u (Multimedia Memory Management Unit)
> > |
> > SMI Common(Smart Multimedia Interface Common)
> > |
> > +----------------+-------
> > | |
> > | |
> > SMI larb0 SMI larb1 ... SoCs have several SMI local
> > arbiter(larb).
> > (display) (vdec)
> > | |
> > | |
> > +-----+-----+ +----+----+
> > | | | | | |
> > | | |... | | | ... There are different ports in each
> > larb.
> > | | | | | |
> > OVL0 RDMA0 WDMA0 MC PP VLD
> >
> >
> > When enable SMI driver it will need those subsys clock provider.
> > But those clocks providers are disabled in default. Since it's needed by
> > smi driver, and smi was select by MTK_IOMMU_V1, I figure it should be
> > select by MTK_IOMMU_V1 too.
>
> Ok I understand all that, but I don't understand why that means
> we need to have select statements for clk drivers still. If
> anything, that logic would mean the SMI driver should select clk
> drivers. I hope it isn't doing that.
>
OK, I guess the only reason of "SMI driver select clk driver" is to
avoid runtime error. Maybe this is not necessary since runtime errors
should be guaranteed by defconfig.
Your propose of just remove the select statements is good enough for
this problem, thanks.
> BTW, I don't understand the mtk_smi_larb_get() API. It looks like
> we expect the SMI driver to probe and succeed before the
> mtk_smi_larb_get() function is called. That seems fairly brittle
> in the face of probe defer or device ordering changes.
>
Sharp eyes.
As a matter of fact, we are struggling on this problem for the
moment[1], I guess the recently merged device link's patch may help with
this, but I didn't have a change to try that yet.
> The SMI driver actually looks like a bus driver for an
> interconnect as well, but drivers/memory is for memory
> controllers? Odd but I can get over that.
>
This have been discussed long times ago, seems the current folder is
where no one object[2][3].
[1]https://lkml.org/lkml/2016/11/15/232
[2]https://lists.linuxfoundation.org/pipermail/iommu/2015-March/012497.html
[3]https://lists.linuxfoundation.org/pipermail/iommu/2015-March/012498.html
^ permalink raw reply
* [PATCH] drm/sun4i: Only count TCON endpoints as valid outputs
From: Chen-Yu Tsai @ 2016-11-18 2:22 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161117190254.d4doghspvz6ma6x2@lukather>
On Fri, Nov 18, 2016 at 3:02 AM, Maxime Ripard
<maxime.ripard@free-electrons.com> wrote:
> On Wed, Nov 16, 2016 at 05:37:31PM +0800, Chen-Yu Tsai wrote:
>> The sun4i DRM driver counts the number of endpoints it found and
>> registers the whole DRM pipeline if any endpoints are found.
>>
>> However, if the TCON and its child endpoints (LCD panels, TV encoder,
>> HDMI encoder, MIPI DSI encoder, etc.) aren't found, that means we
>> don't have any usable CRTCs, and the display pipeline is incomplete
>> and useless.
>
> If some node set as available is not probed, then yes, it does, but
> I'm not really sure how it's a problem. Quite the opposite actually.
Actually the problem occurs when the TCON is _not_ available, but
the other endpoints preceding it are.
>> The whole DRM display pipeline should only be registered and enabled
>> if there are proper outputs available.
>
> Unless I've misunderstood what you're saying, we could have the
> writeback for example that would just need the display engine.
Yeah, I guess that complicates things...
>> The debug message "Queued %d outputs on pipeline %d\n" is also telling.
>>
>> This patch makes the driver only count enabled TCON endpoints. If
>> none are found, the DRM pipeline is not used. This avoids screwing
>> up the simple framebuffer provided by the bootloader in cases where
>> we aren't able to support the display with the DRM subsystem, due
>> to lack of panel or bridge drivers, or just lack of progress.
>
> The framebuffer is removed only at bind time, which means that all the
> drivers have probed already. Lack of progress isn't an issue here,
> since the node simply won't be there, and we wouldn't have it in the
> component lists. And lack of drivers shouldn't be an issue either,
> since in order for bind to be called, all the drivers would have
> gone through their probe.
>
> So I'm not really sure what it fixes.
To recap, on sun6i I had enabled the display engine node by default
in the dtsi, along with the backend and drc. The tcon is disabled
by default, so it doesn't get added to the list of components.
The available components get probed, binded, and simplefb gets
pushed out.
I suppose disabling the display engine by default would be better?
At least simplefb still works.
Regards
ChenYu
> Maxime
>
> --
> Maxime Ripard, Free Electrons
> Embedded Linux and Kernel engineering
> http://free-electrons.com
^ permalink raw reply
* spin_lock behavior with ARM64 big.Little/HMP
From: Vikram Mulukutla @ 2016-11-18 2:22 UTC (permalink / raw)
To: linux-arm-kernel
Hello,
This isn't really a bug report, but just a description of a
frequency/IPC
dependent behavior that I'm curious if we should worry about. The
behavior
is exposed by questionable design so I'm leaning towards don't-care.
Consider these threads running in parallel on two ARM64 CPUs running
mainline
Linux:
(Ordering of lines between the two columns does not indicate a sequence
of
execution. Assume flag=0 initially.)
LittleARM64_CPU @ 300MHz (e.g.A53) | BigARM64_CPU @ 1.5GHz (e.g. A57)
-------------------------------------+----------------------------------
spin_lock_irqsave(s) | local_irq_save()
/* critical section */
flag = 1 | spin_lock(s)
spin_unlock_irqrestore(s) | while (!flag) {
| spin_unlock(s)
| cpu_relax();
| spin_lock(s)
| }
| spin_unlock(s)
| local_irq_restore()
I see a livelock occurring where the LittleCPU is never able to acquire
the
lock, and the BigCPU is stuck forever waiting on 'flag' to be set.
Even with ticket spinlocks, this bit of code can cause a livelock (or
very
long delays) if BigCPU runs fast enough. Afaics this can only happen if
the
LittleCPU is unable to put its ticket in the queue (i.e, increment the
next
field) since the store-exclusive keeps failing.
The problem is not present on SMP, and is mitigated by adding enough
additional clock cycles between the unlock and lock in the loop running
on the BigCPU. On big.Little, if both threads are scheduled on the same
cluster within the same clock domain, the problem is avoided.
Now the infinite loop may seem like questionable design but the problem
isn't entirely hypothetical; if BigCPU calls hrtimer_cancel with
interrupts disabled, this scenario can result if the hrtimer is about
to run on a littleCPU. It's of course possible that there's just enough
intervening code for the problem to not occur. At the very least it
seems
that loops like the one running in the BigCPU above should come with a
WARN_ON(irqs_disabled) or with a sufficient udelay() instead of the
cpu_relax.
Thoughts?
Thanks,
Vikram
^ permalink raw reply
* [PATCH] drm/sun4i: tcon: Initialize regmap after enabling bus clocks
From: Chen-Yu Tsai @ 2016-11-18 2:09 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161117190501.hjpwposqzidwhwdc@lukather>
On Fri, Nov 18, 2016 at 3:05 AM, Maxime Ripard
<maxime.ripard@free-electrons.com> wrote:
> On Wed, Nov 16, 2016 at 05:37:32PM +0800, Chen-Yu Tsai wrote:
>> If we attempt to read/write the TCON registers before the bus clock
>> is enabled, those accesses get ignored.
>>
>> In practice this almost never occurs because U-boot had already enabled
>> the bus clock as part of its firmware provided framebuffer (simplefb).
>>
>> Fixes: 9026e0d122ac ("drm: Add Allwinner A10 Display Engine support")
>> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
>> ---
>>
>> I was looking around the DRM driver and noticed this sequence was off.
>>
>> ---
>> drivers/gpu/drm/sun4i/sun4i_tcon.c | 10 +++++-----
>> 1 file changed, 5 insertions(+), 5 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c b/drivers/gpu/drm/sun4i/sun4i_tcon.c
>> index c6afb2448655..8c2db65ea229 100644
>> --- a/drivers/gpu/drm/sun4i/sun4i_tcon.c
>> +++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c
>> @@ -506,16 +506,16 @@ static int sun4i_tcon_bind(struct device *dev, struct device *master,
>> return ret;
>> }
>>
>> - ret = sun4i_tcon_init_regmap(dev, tcon);
>> + ret = sun4i_tcon_init_clocks(dev, tcon);
>> if (ret) {
>> - dev_err(dev, "Couldn't init our TCON regmap\n");
>> + dev_err(dev, "Couldn't init our TCON clocks\n");
>> goto err_assert_reset;
>> }
>>
>> - ret = sun4i_tcon_init_clocks(dev, tcon);
>> + ret = sun4i_tcon_init_regmap(dev, tcon);
>> if (ret) {
>> - dev_err(dev, "Couldn't init our TCON clocks\n");
>> - goto err_assert_reset;
>> + dev_err(dev, "Couldn't init our TCON regmap\n");
>> + goto err_free_clocks;
>> }
>
> That won't work either. sun4i_tcon_init_clocks requires the regmap to
> be enabled before it calls sun4i_dclk_create.
>
> Maybe we should just move that call outside of sun4i_tcon_init_clocks
> and put it directly into the bind then.
That makes sense. I'll send a v2.
ChenYu
^ permalink raw reply
* [GIT PULL 2/3] ARM64: dts: exynos: DT for v4.10
From: Olof Johansson @ 2016-11-18 1:59 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1478629589-7520-4-git-send-email-krzk@kernel.org>
On Tue, Nov 08, 2016 at 08:26:29PM +0200, Krzysztof Kozlowski wrote:
> Hi,
>
> Exynos5433 + two boards using it. Mobile boards! :)
>
> I am really happy to push it. I know that it has been a lot of effort
> in Samsung to mainline this.
>
> Best regards,
> Krzysztof
>
>
> The following changes since commit 1001354ca34179f3db924eb66672442a173147dc:
>
> Linux 4.9-rc1 (2016-10-15 12:17:50 -0700)
>
> are available in the git repository at:
>
> git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux.git tags/samsung-dt64-4.10
>
> for you to fetch changes up to 8ac46fc57df82efbc19194dddd335b6c7a960c31:
>
> arm64: dts: exynos: Add dts file for Exynos5433-based TM2E board (2016-11-03 22:19:57 +0200)
>
> ----------------------------------------------------------------
> Finally, I am really pleased to announce adding support for Exynos5433 ARMv8
> SoC along with two boards. A lot of Samsung people contributed into this
> but the final work and commits were done by Chanwoo Choi.
>
> This means that for v4.10 we got:
> 1. Exynos5433 DTSI.
> 2. Two boards: TM2 and TM2E. These are (almost fully) working mobile phones.
Awesome! Looks like TM2 is a Tizen reference board? Great to see the support,
even if it's taken a while.
-Olof
^ permalink raw reply
* [GIT PULL 1/3] ARM: dts: exynos: DT for v4.10
From: Olof Johansson @ 2016-11-18 1:53 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1478629589-7520-3-git-send-email-krzk@kernel.org>
Hi,
On Tue, Nov 08, 2016 at 08:26:28PM +0200, Krzysztof Kozlowski wrote:
> Hi,
>
> Hurray! New board! ... Exynos4415 slowly is going away.
>
> Best regards,
> Krzysztof
>
>
> The following changes since commit 1001354ca34179f3db924eb66672442a173147dc:
>
> Linux 4.9-rc1 (2016-10-15 12:17:50 -0700)
>
> are available in the git repository at:
>
> git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux.git tags/samsung-dt-4.10
>
> for you to fetch changes up to 05a3589f46f913fbe91704f12fdca46a0eb0a27b:
>
> ARM: dts: exynos: Add SCU device node to exynos4.dtsi (2016-11-05 17:39:50 +0200)
>
> ----------------------------------------------------------------
> Samsung DeviceTree update for v4.10:
> 1. Add TOPEET itop core and Elite boards, based on Exynos4412.
> 2. Remove the Exynos4415 DTSI. We did not have any mainlined boards
> using it. I am also not aware of any popular out-of-tree boards using it.
> 3. Add Snoop Control Unit node for Exynos4.
> 4. Minor cleanups.
Merged, thanks.
-Olof
^ permalink raw reply
* [GIT PULL 3/3] ARM: defconfig: Samsung defconfigs for v4.10
From: Olof Johansson @ 2016-11-18 1:51 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1478629589-7520-2-git-send-email-krzk@kernel.org>
On Tue, Nov 08, 2016 at 08:26:27PM +0200, Krzysztof Kozlowski wrote:
> Hi,
>
> Nothing special.
>
> Best regards,
> Krzysztof
>
>
> The following changes since commit 1001354ca34179f3db924eb66672442a173147dc:
>
> Linux 4.9-rc1 (2016-10-15 12:17:50 -0700)
>
> are available in the git repository at:
>
> git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux.git tags/samsung-defconfig-4.10
>
> for you to fetch changes up to e471e9b4b13b59ee8cb7079018472c4dda46cb7a:
>
> ARM: multi_v7_defconfig: Enable exynos-gsc driver as module (2016-10-17 19:43:29 +0300)
>
> ----------------------------------------------------------------
> Samsung defconfig update for v4.10:
> 1. Enable the Exynos gscaler driver on multi_v7 and exynos defconfigs.
Merged, thanks.
-Olof
^ permalink raw reply
* [GIT PULL] NXP LPC32xx ARM SoC DT updates for v4.10
From: Olof Johansson @ 2016-11-18 1:49 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1478620968.12841.26.camel@localhost>
On Tue, Nov 08, 2016 at 11:02:48AM -0500, Sylvain Lemieux wrote:
> Hi Arnd, Olof, Kevin,
>
> please consider to include NXP LPC32xx device tree updates for v4.10.
>
> Thank you in advance.
>
>
> The following changes since commit 1001354ca34179f3db924eb66672442a173147dc:
>
> Linux 4.9-rc1 (2016-10-15 12:17:50 -0700)
>
> are available in the git repository at:
>
> https://github.com/sylemieux/linux-lpc32xx.git tags/lpc32xx-dt-v4.10
>
> for you to fetch changes up to 1754906fffcabdd166f6aec85eb9a3a28de531b8:
>
> ARM: dts: lpc32xx: set default parent clock for pwm1 & pwm2 (2016-10-25 13:29:31 -0400)
>
> ----------------------------------------------------------------
> NXP LPC32xx ARM SoC device tree updates for v4.10
>
> This includes a single functional change:
> * set default parent clock for PWM1 & PWM2.
Merged, thanks!
-Olof
^ permalink raw reply
* [GIT PULL] NXP LPC32xx ARM SoC cleanup for v4.10
From: Olof Johansson @ 2016-11-18 1:49 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1478620925.12841.25.camel@localhost>
On Tue, Nov 08, 2016 at 11:02:05AM -0500, Sylvain Lemieux wrote:
> Hi Arnd, Olof, Kevin,
>
> please consider to include NXP LPC32xx cleanup for v4.10.
>
> Thank you in advance.
>
>
> The following changes since commit 1001354ca34179f3db924eb66672442a173147dc:
>
> Linux 4.9-rc1 (2016-10-15 12:17:50 -0700)
>
> are available in the git repository at:
>
> https://github.com/sylemieux/linux-lpc32xx.git tags/lpc32xx-cleanup-v4.10
>
> for you to fetch changes up to d1193df9c3cbce699d07c352bb3c055cd827db4d:
>
> ARM: lpc32xx: remove unused header file clock.h (2016-10-25 13:33:01 -0400)
>
> ----------------------------------------------------------------
> NXP LPC32xx ARM SoC cleanup for v4.10
>
> This includes a few cleanup changes:
> * remove unused header file mach/irqs.h;
> * remove unused header file clock.h.
Merged, thanks!
-Olof
^ permalink raw reply
* [GIT PULL] ARM: dts: uniphier: UniPhier DT updates for v4.10
From: Olof Johansson @ 2016-11-18 1:46 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAK7LNAQ5_Sc99WbTWR9u3_J0FqG8KUSGNQzggdQC91Cngxi+Cw@mail.gmail.com>
Hi,
On Sun, Nov 06, 2016 at 12:18:11AM +0900, Masahiro Yamada wrote:
> Hi Arnd, Olof,
>
> Here are UniPhier DT (32bit) updates for the v4.10 merge window.
> Please pull!
>
> (This time, I based this pull-request on -rc3 instead of -rc1
> because I want to make sure to have no conflict
> between fixes that had already been pulled-in and
> new development commits in this series.)
What you can do is instad use your fixes branch as base, since in this
case we had -rc2 as our base for next/dt. Since you based on -rc3, we need
to bring in a newer upstream revision (a backmerge), and that's something we
try to avoid.
I've merged your branch in this case anyway, but next time try basing on top
of your fixes if you need to.
Thanks!
-Olof
^ permalink raw reply
* [GIT PULL] STM32 DT changes for v4.10 #1
From: Olof Johansson @ 2016-11-18 1:43 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <3e65d3ae-6509-6057-64e1-dfc256e535b5@st.com>
Hi,
On Fri, Nov 04, 2016 at 03:31:55PM +0100, Alexandre Torgue wrote:
> Hi Olof, Arnd and Kevin,
>
> Please consider this first round of STM32 DT updates for v4.10:
>
> The following changes since commit 1001354ca34179f3db924eb66672442a173147dc:
>
> Linux 4.9-rc1 (2016-10-15 12:17:50 -0700)
>
> are available in the git repository at:
>
> git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32.git
> tags/stm32-dt-for-v4.10-1
>
> for you to fetch changes up to f6dbbff4f0af1a5c0d6eaf414572b5eff7a73a8b:
>
> ARM: dts: stm32f429: add LSI and LSE clocks (2016-11-04 15:08:08 +0100)
>
> ----------------------------------------------------------------
> STM32 DT updates for v4.10, round 1.
>
> Highlights:
> ----------
> - Add LSI and LSE clocks support for STM32F429
> - Add GPIO IRQ support for STM32F429
> - Declare push button as GPIO keys on STM32F429 boards
> - Add DMA supports on USART1 & USART3 on STM32F429
> - Add Ethernet fixes
>
> ----------------------------------------------------------------
> Alexandre TORGUE (5):
> ARM: DT: STM32: add dma for usart3 on F429
> ARM: DT: stm32: move dma translation to board files
> ARM: dts: stm32f429: Align Ethernet node with new bindings properties
> ARM: dts: stm32f429: Fix Ethernet node on Eval Board
> ARM: dts: stm32f429: remove Ethernet wake on Lan support
>
> Gabriel Fernandez (1):
> ARM: dts: stm32f429: add LSI and LSE clocks
>
> Gerald Baeza (1):
> ARM: DT: STM32: add dma for usart1 on F429
>
> Maxime Coquelin (2):
> ARM: dts: Add GPIO irq support to STM32F429
> ARM: dts: Declare push button as GPIO key on stm32f429 boards
I merged this but please get your contributors to use consistent prefixes
in the future (or fix them up when you apply the patchest).
It should be: ARM: dts: stm32: <...> in your case.
Thanks!
-Olof
^ permalink raw reply
* [GIT PULL] Renesas ARM Based SoC Updates for v4.10
From: Olof Johansson @ 2016-11-18 1:41 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1478251657.git.horms+renesas@verge.net.au>
On Fri, Nov 04, 2016 at 10:44:42AM +0100, Simon Horman wrote:
> Hi Olof, Hi Kevin, Hi Arnd,
>
> Please consider these Renesas ARM based SoC updates for v4.10.
>
>
> The following changes since commit 1001354ca34179f3db924eb66672442a173147dc:
>
> Linux 4.9-rc1 (2016-10-15 12:17:50 -0700)
>
> are available in the git repository at:
>
> git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git tags/renesas-soc-for-v4.10
>
> for you to fetch changes up to 9652623f8f019edc93a7a934a10b7d0b90421d5a:
>
> ARM: shmobile: r8a7779/marzen: Add board part number to DT bindings (2016-11-04 10:25:45 +0100)
>
> ----------------------------------------------------------------
> Renesas ARM Based SoC Updates for v4.10
>
> Enhancements:
> * Basic support for r8a7743 SoC; only SoC code so far
> * Select errata 798181 for SoCs with CA15 cores
>
> Clean-up:
> * Consolidate R8A7743 and R8A779[234] machine definitions
>
> Documentation:
> * Add Marzen, Gose and Alt board part numbers to DT bindings
> * Document SK-RZG1M board
Thanks, merged.
-Olof
^ permalink raw reply
* [GIT PULL] Renesas ARM Based SoC DT Updates for v4.10
From: Olof Johansson @ 2016-11-18 1:40 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1478252308.git.horms+renesas@verge.net.au>
On Fri, Nov 04, 2016 at 10:44:27AM +0100, Simon Horman wrote:
> Hi Olof, Hi Kevin, Hi Arnd,
>
> Please consider these Renesas ARM based SoC DT updates for v4.10.
>
>
> The following changes since commit 1001354ca34179f3db924eb66672442a173147dc:
>
> Linux 4.9-rc1 (2016-10-15 12:17:50 -0700)
>
> are available in the git repository at:
>
> git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git tags/renesas-dt-for-v4.10
>
> for you to fetch changes up to 68cc085a4daaa32f7138de1e918331c05165a484:
>
> ARM: dts: r8a7794: remove Z clock (2016-11-04 10:36:47 +0100)
>
> ----------------------------------------------------------------
> Renesas ARM Based SoC DT Updates for v4.10
>
> Clean-Ups and Corrections:
> * Removed Z clock from r8a7794 SoC; it is not present in hardware
> * Use generic pinctrl properties in SDHI nodes in gose board
> * Correct W=1 dtc warnings on r8a7794 SoC
> * Correct DU reg property on r8a7779 SoC
> * Correct SCIFB reg properties to cover all registers
>
> Enhancements:
> * Configure pinmuxing for the DU0 input clock on the Marzen board
> * Enable VIN 0 - 2 on r8a7793 SoC
> * Enable HDMI input on Koelsch and Lager boards
> * Enable SDHI1 on rskrza1 board
> * Add MMCIF nodes to r7s72100 SoC
> * Add MSIOF clocks to r8a7792 SoC
> * Enable UHS for SDHI 0 & 1 on koelsch and alt boards
Thanks, merged.
-Olof
^ permalink raw reply
* [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.10
From: Olof Johansson @ 2016-11-18 1:40 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1478251192.git.horms+renesas@verge.net.au>
On Fri, Nov 04, 2016 at 10:44:04AM +0100, Simon Horman wrote:
> Hi Olof, Hi Kevin, Hi Arnd,
>
> Please consider these Renesas ARM64 based SoC DT updates for v4.10.
>
>
> The following changes since commit 1001354ca34179f3db924eb66672442a173147dc:
>
> Linux 4.9-rc1 (2016-10-15 12:17:50 -0700)
>
> are available in the git repository at:
>
> git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git tags/renesas-arm64-dt-for-v4.10
>
> for you to fetch changes up to 935085209343a0c507e3d9a3e01883b25c8f743e:
>
> arm64: renesas: r8a7796: add SYS-DMAC controller nodes (2016-11-04 10:18:07 +0100)
>
> ----------------------------------------------------------------
> Renesas ARM64 Based SoC DT Updates for v4.10
>
> Enablement:
> * Enable On-board eMMC
> * Enable SDHI 0 & 3 with UHS
> * Add SYS-DMAC controller nodes to r8a7796 SoC
> * Populate EXTALR on r8a7796/salvator-x board; used by watchdog
> * Add DU LVDS output endpoint on r8a7795/salvator-x board
> * Add bias setting for USB1 pins on r8a7795/salvator-x board
>
> Clean-Up:
> * Remove FCP SoC-specific compatible strings
Thanks, merged.
-Olof
^ permalink raw reply
* [2/2] i2c: uniphier-f: rename jump label to follow coding style guideline
From: Wolfram Sang @ 2016-11-18 1:23 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1478256561-7709-2-git-send-email-yamada.masahiro@socionext.com>
On Fri, Nov 04, 2016 at 07:49:21PM +0900, Masahiro Yamada wrote:
> Documentation/CodingStyle recommends to use label names which say
> what the goto does or why the goto exists.
>
> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Applied to for-next, thanks!
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