* [PATCH 1/6] reset: hisilicon: add reset core
From: zhangfei @ 2016-11-22 9:22 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <3993565.nedzUBZcVS@wuerfel>
Hi, Arnd
On 2016?11?22? 16:45, Arnd Bergmann wrote:
> On Tuesday, November 22, 2016 3:49:16 PM CET Zhangfei Gao wrote:
>> @@ -1,8 +1,8 @@
>> obj-y += core.o
>> -obj-y += hisilicon/
>> obj-$(CONFIG_ARCH_STI) += sti/
>> obj-$(CONFIG_RESET_ATH79) += reset-ath79.o
>> obj-$(CONFIG_RESET_BERLIN) += reset-berlin.o
>> +obj-$(CONFIG_ARCH_HISI) += hisilicon/
>> obj-$(CONFIG_RESET_LPC18XX) += reset-lpc18xx.o
>> obj-$(CONFIG_RESET_MESON) += reset-meson.o
>> obj-$(CONFIG_RESET_OXNAS) += reset-oxnas.o
> Please leave the obj-y line, otherwise the COMPILE_TEST variant won't work.
COMPILE_TEST is added in drivers/reset/hisilicon/Kconfig
like
config COMMON_RESET_HI3660
tristate "Hi3660 Reset Driver"
depends on ARCH_HISI || COMPILE_TEST
The reason not using "obj-y" here is that reset.c will be compiled unconditionally.
drivers/reset/hisilicon/Makefile
obj-y += reset.o
Thanks
^ permalink raw reply
* [RFC PATCH 00/11] Allow NOMMU for MULTIPLATFORM
From: Vladimir Murzin @ 2016-11-22 9:25 UTC (permalink / raw)
To: linux-arm-kernel
Hi,
With transition to MULTIPLATFORM we lost capability to build NOMMU
configurations. Maybe not a big deal, but there is still interest in
building NOMMU configuration apart from M-class cores. Basically, I'm
talking about R-class cores which shares a lot with A-class except
MMU; there was little interest to run A-class with MMU disabled (or
1:1 MMU mapping) as well. By now it is not even possible to build
such configurations without extra patches on top. Another aspect is
that some portion of NOMMU code have been (build) untested for a
while. All these makes it even harder to involve more people in using
NOMMU and build community around that.
This series is trying to make it possible to build NOMMU
configurations. It is done in PATCH 11/11 which allows to select
ARCH_MULTIPLATFORM even for NOMMU. This is controlled with EXPERT
config option. All patches prior 11/11 is an attempt to fix build
failures for NOMMU case. I don't claim they are 100% correct, so I'm
open to suggestion how they can be done in a better way.
Cc: Hartley Sweeten <hsweeten@visionengravers.com>
Cc: Ryan Mallon <rmallon@gmail.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Russell King <linux@armlinux.org.uk>
Vladimir Murzin (11):
ARM: NOMMU: define stubs for fixup
ARM: ep93xx: select ARM_PATCH_PHYS_VIRT for MMU builds only
ARM: omap: do not select HIGHMEM explicitly
PCI: tegra: limit to MMU build only
ARM: move arm_heavy_mb to MMU/noMMU neutral place
ARM: tlbflush: drop dependency on CONFIG_SMP
ARM: sleep: allow it to be build for R-class
ARM: NOMMU: define debug_ll_io_ini
ARM: NOMMU: define SECTION_xxx macros
ARM: NOMMU: define __arm_ioremap_exec and pci_ioremap functions
ARM: Allow ARCH_MULTIPLATFORM to be selected for NOMMU
arch/arm/Kconfig | 8 ++++----
arch/arm/include/asm/fixmap.h | 6 ++++++
arch/arm/include/asm/mach/map.h | 2 ++
arch/arm/include/asm/pgtable-nommu.h | 5 +++++
arch/arm/include/asm/tlbflush.h | 2 +-
arch/arm/kernel/sleep.S | 4 ----
arch/arm/mach-omap2/Kconfig | 1 -
arch/arm/mm/flush.c | 15 ---------------
arch/arm/mm/iomap.c | 17 +++++++++++++++++
arch/arm/mm/nommu.c | 35 ++++++++++++++++++++++++++++++++++
drivers/pci/host/Kconfig | 2 +-
11 files changed, 71 insertions(+), 26 deletions(-)
--
1.7.9.5
^ permalink raw reply
* [RFC PATCH 01/11] ARM: NOMMU: define stubs for fixup
From: Vladimir Murzin @ 2016-11-22 9:25 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1479806768-39911-1-git-send-email-vladimir.murzin@arm.com>
When build for NOMMU following errors show ups:
arch/arm/kernel/patch.c: In function 'patch_map':
arch/arm/kernel/patch.c:39:2: error: implicit declaration of function 'set_fixmap' [-Werror=implicit-function-declaration]
set_fixmap(fixmap, page_to_phys(page));
^
arch/arm/kernel/patch.c:41:2: error: implicit declaration of function '__fix_to_virt' [-Werror=implicit-function-declaration]
return (void *) (__fix_to_virt(fixmap) + (uintaddr & ~PAGE_MASK));
^
arch/arm/kernel/patch.c: In function 'patch_unmap':
arch/arm/kernel/patch.c:47:2: error: implicit declaration of function 'clear_fixmap' [-Werror=implicit-function-declaration]
clear_fixmap(fixmap);
^
cc1: some warnings being treated as errors
Fixup does not make much sense in NOMMU configurations, so provide
stub definitions.
Cc: Russell King <linux@armlinux.org.uk>
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
---
arch/arm/include/asm/fixmap.h | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/include/asm/fixmap.h b/arch/arm/include/asm/fixmap.h
index 5c17d2d..0bfc2e3 100644
--- a/arch/arm/include/asm/fixmap.h
+++ b/arch/arm/include/asm/fixmap.h
@@ -59,6 +59,12 @@ enum fixed_addresses {
#else
+#define set_fixmap(idx, phys)
+#define clear_fixmap(idx)
+
+#define __fix_to_virt(x) (x)
+#define __virt_to_fix(x) (x)
+
static inline void early_fixmap_init(void) { }
#endif
--
1.7.9.5
^ permalink raw reply related
* [RFC PATCH 02/11] ARM: ep93xx: select ARM_PATCH_PHYS_VIRT for MMU builds only
From: Vladimir Murzin @ 2016-11-22 9:25 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1479806768-39911-1-git-send-email-vladimir.murzin@arm.com>
Building in NOMMU configurations lead to the following splat:
warning: (ARCH_INTEGRATOR && ARCH_MULTIPLATFORM && ARCH_EP93XX) selects ARM_PATCH_PHYS_VIRT which has unmet direct dependencies (!XIP_KERNEL && MMU)
Make sure ARM_PATCH_PHYS_VIRT is selected for MMU builds only.
Cc: Hartley Sweeten <hsweeten@visionengravers.com>
Cc: Ryan Mallon <rmallon@gmail.com>
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
---
arch/arm/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index b5d529f..49e0f01 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -380,7 +380,7 @@ config ARCH_EP93XX
bool "EP93xx-based"
select ARCH_HAS_HOLES_MEMORYMODEL
select ARM_AMBA
- select ARM_PATCH_PHYS_VIRT
+ select ARM_PATCH_PHYS_VIRT if MMU
select ARM_VIC
select AUTO_ZRELADDR
select CLKDEV_LOOKUP
--
1.7.9.5
^ permalink raw reply related
* [RFC PATCH 03/11] ARM: omap: do not select HIGHMEM explicitly
From: Vladimir Murzin @ 2016-11-22 9:26 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1479806768-39911-1-git-send-email-vladimir.murzin@arm.com>
Explicit selection of HIGHMEM breaks NOMMU builds. It seems that
HIGHMEM is user selectable option, so probably it would be better to
let user to make a decision on this options or, at least, move it to
defconfig.
Cc: Tony Lindgren <tony@atomide.com>
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
---
arch/arm/mach-omap2/Kconfig | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index a9afeeb..4e3fb69 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -120,7 +120,6 @@ config ARCH_OMAP2PLUS_TYPICAL
bool "Typical OMAP configuration"
default y
select AEABI
- select HIGHMEM
select I2C
select I2C_OMAP
select MENELAUS if ARCH_OMAP2
--
1.7.9.5
^ permalink raw reply related
* [RFC PATCH 04/11] PCI: tegra: limit to MMU build only
From: Vladimir Murzin @ 2016-11-22 9:26 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1479806768-39911-1-git-send-email-vladimir.murzin@arm.com>
This driver uses functionality which available for MMU build only,
thus add dependency on MMU.
Cc: Thierry Reding <thierry.reding@gmail.com>
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
---
drivers/pci/host/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/pci/host/Kconfig b/drivers/pci/host/Kconfig
index d7e7c0a..836fa02 100644
--- a/drivers/pci/host/Kconfig
+++ b/drivers/pci/host/Kconfig
@@ -69,7 +69,7 @@ config PCI_IMX6
config PCI_TEGRA
bool "NVIDIA Tegra PCIe controller"
- depends on ARCH_TEGRA && !ARM64
+ depends on ARCH_TEGRA && !ARM64 && MMU
help
Say Y here if you want support for the PCIe host controller found
on NVIDIA Tegra SoCs.
--
1.7.9.5
^ permalink raw reply related
* [RFC PATCH 05/11] ARM: move arm_heavy_mb to MMU/noMMU neutral place
From: Vladimir Murzin @ 2016-11-22 9:26 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1479806768-39911-1-git-send-email-vladimir.murzin@arm.com>
So it can be referenced from both camps.
Cc: Russell King <linux@armlinux.org.uk>
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
---
arch/arm/mm/flush.c | 15 ---------------
arch/arm/mm/iomap.c | 17 +++++++++++++++++
2 files changed, 17 insertions(+), 15 deletions(-)
diff --git a/arch/arm/mm/flush.c b/arch/arm/mm/flush.c
index 3cced84..0c73969 100644
--- a/arch/arm/mm/flush.c
+++ b/arch/arm/mm/flush.c
@@ -21,21 +21,6 @@
#include "mm.h"
-#ifdef CONFIG_ARM_HEAVY_MB
-void (*soc_mb)(void);
-
-void arm_heavy_mb(void)
-{
-#ifdef CONFIG_OUTER_CACHE_SYNC
- if (outer_cache.sync)
- outer_cache.sync();
-#endif
- if (soc_mb)
- soc_mb();
-}
-EXPORT_SYMBOL(arm_heavy_mb);
-#endif
-
#ifdef CONFIG_CPU_CACHE_VIPT
static void flush_pfn_alias(unsigned long pfn, unsigned long vaddr)
diff --git a/arch/arm/mm/iomap.c b/arch/arm/mm/iomap.c
index 4614208..1b601db 100644
--- a/arch/arm/mm/iomap.c
+++ b/arch/arm/mm/iomap.c
@@ -9,6 +9,8 @@
#include <linux/ioport.h>
#include <linux/io.h>
+#include <asm/outercache.h>
+
unsigned long vga_base;
EXPORT_SYMBOL(vga_base);
@@ -40,3 +42,18 @@ void pci_iounmap(struct pci_dev *dev, void __iomem *addr)
}
EXPORT_SYMBOL(pci_iounmap);
#endif
+
+#ifdef CONFIG_ARM_HEAVY_MB
+void (*soc_mb)(void);
+
+void arm_heavy_mb(void)
+{
+#ifdef CONFIG_OUTER_CACHE_SYNC
+ if (outer_cache.sync)
+ outer_cache.sync();
+#endif
+ if (soc_mb)
+ soc_mb();
+}
+EXPORT_SYMBOL(arm_heavy_mb);
+#endif
--
1.7.9.5
^ permalink raw reply related
* [RFC PATCH 06/11] ARM: tlbflush: drop dependency on CONFIG_SMP
From: Vladimir Murzin @ 2016-11-22 9:26 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1479806768-39911-1-git-send-email-vladimir.murzin@arm.com>
It can be referenced in UP case as well.
Cc: Russell King <linux@armlinux.org.uk>
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
---
arch/arm/include/asm/tlbflush.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/include/asm/tlbflush.h b/arch/arm/include/asm/tlbflush.h
index def9e57..d9a6e2e 100644
--- a/arch/arm/include/asm/tlbflush.h
+++ b/arch/arm/include/asm/tlbflush.h
@@ -641,7 +641,7 @@ static inline void update_mmu_cache(struct vm_area_struct *vma,
#endif
-#elif defined(CONFIG_SMP) /* !CONFIG_MMU */
+#else /* !CONFIG_MMU */
#ifndef __ASSEMBLY__
--
1.7.9.5
^ permalink raw reply related
* [RFC PATCH 07/11] ARM: sleep: allow it to be build for R-class
From: Vladimir Murzin @ 2016-11-22 9:26 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1479806768-39911-1-git-send-email-vladimir.murzin@arm.com>
Dependency on MMU is quite strict and prevent R-class from being built -
relax this condition and guard against M-class only
Cc: Russell King <linux@armlinux.org.uk>
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
---
arch/arm/Kconfig | 2 +-
arch/arm/kernel/sleep.S | 4 ----
2 files changed, 1 insertion(+), 5 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 49e0f01..f9ff570 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -2179,7 +2179,7 @@ config ARCH_SUSPEND_POSSIBLE
def_bool y
config ARM_CPU_SUSPEND
- def_bool PM_SLEEP || BL_SWITCHER || ARM_PSCI_FW
+ def_bool (PM_SLEEP || BL_SWITCHER || ARM_PSCI_FW) && !CPU_V7M
depends on ARCH_SUSPEND_POSSIBLE
config ARCH_HIBERNATION_POSSIBLE
diff --git a/arch/arm/kernel/sleep.S b/arch/arm/kernel/sleep.S
index 0f6c100..0e7fddf 100644
--- a/arch/arm/kernel/sleep.S
+++ b/arch/arm/kernel/sleep.S
@@ -119,14 +119,12 @@ ENDPROC(cpu_resume_after_mmu)
.text
.align
-#ifdef CONFIG_MMU
.arm
ENTRY(cpu_resume_arm)
THUMB( badr r9, 1f ) @ Kernel is entered in ARM.
THUMB( bx r9 ) @ If this is a Thumb-2 kernel,
THUMB( .thumb ) @ switch to Thumb now.
THUMB(1: )
-#endif
ENTRY(cpu_resume)
ARM_BE8(setend be) @ ensure we are in BE mode
@@ -160,9 +158,7 @@ THUMB( mov sp, r2 )
THUMB( bx r3 )
ENDPROC(cpu_resume)
-#ifdef CONFIG_MMU
ENDPROC(cpu_resume_arm)
-#endif
.align 2
_sleep_save_sp:
--
1.7.9.5
^ permalink raw reply related
* [RFC PATCH 08/11] ARM: NOMMU: define debug_ll_io_ini
From: Vladimir Murzin @ 2016-11-22 9:26 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1479806768-39911-1-git-send-email-vladimir.murzin@arm.com>
We do not need to do anything in debug_ll_io_init in case of NOMMU.
Cc: Russell King <linux@armlinux.org.uk>
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
---
arch/arm/include/asm/mach/map.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/include/asm/mach/map.h b/arch/arm/include/asm/mach/map.h
index 9b7c328..6b86b9c 100644
--- a/arch/arm/include/asm/mach/map.h
+++ b/arch/arm/include/asm/mach/map.h
@@ -62,6 +62,8 @@ extern int ioremap_page(unsigned long virt, unsigned long phys,
#else
#define iotable_init(map,num) do { } while (0)
#define vm_reserve_area_early(a,s,c) do { } while (0)
+#define debug_ll_io_init() do { } while (0)
+
#endif
#endif
--
1.7.9.5
^ permalink raw reply related
* [RFC PATCH 09/11] ARM: NOMMU: define SECTION_xxx macros
From: Vladimir Murzin @ 2016-11-22 9:26 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1479806768-39911-1-git-send-email-vladimir.murzin@arm.com>
Pickup defines from pgtable-2level.h to make NOMMU build happy.
Cc: Russell King <linux@armlinux.org.uk>
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
---
arch/arm/include/asm/pgtable-nommu.h | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm/include/asm/pgtable-nommu.h b/arch/arm/include/asm/pgtable-nommu.h
index add094d..9115801 100644
--- a/arch/arm/include/asm/pgtable-nommu.h
+++ b/arch/arm/include/asm/pgtable-nommu.h
@@ -35,6 +35,11 @@
#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
#define PGDIR_MASK (~(PGDIR_SIZE-1))
+
+#define SECTION_SHIFT 20
+#define SECTION_SIZE (1UL << SECTION_SHIFT)
+#define SECTION_MASK (~(SECTION_SIZE-1))
+
/* FIXME */
#define PAGE_NONE __pgprot(0)
--
1.7.9.5
^ permalink raw reply related
* [RFC PATCH 10/11] ARM: NOMMU: define __arm_ioremap_exec and pci_ioremap functions
From: Vladimir Murzin @ 2016-11-22 9:26 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1479806768-39911-1-git-send-email-vladimir.murzin@arm.com>
Define __arm_ioremap_exec and pci_ioremap* functions fallowing pattern
for other ioremap functions.
Cc: Russell King <linux@armlinux.org.uk>
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
---
arch/arm/mm/nommu.c | 35 +++++++++++++++++++++++++++++++++++
1 file changed, 35 insertions(+)
diff --git a/arch/arm/mm/nommu.c b/arch/arm/mm/nommu.c
index 2740967..681cec8 100644
--- a/arch/arm/mm/nommu.c
+++ b/arch/arm/mm/nommu.c
@@ -19,6 +19,7 @@
#include <asm/cputype.h>
#include <asm/mpu.h>
#include <asm/procinfo.h>
+#include <asm/mach/map.h>
#include "mm.h"
@@ -401,3 +402,37 @@ void iounmap(volatile void __iomem *addr)
{
}
EXPORT_SYMBOL(iounmap);
+
+void __iomem *
+__arm_ioremap_exec(phys_addr_t phys_addr, size_t size, bool cached)
+{
+ unsigned int mtype;
+
+ if (cached)
+ mtype = MT_MEMORY_RWX;
+ else
+ mtype = MT_MEMORY_RWX_NONCACHED;
+
+ return __arm_ioremap_caller(phys_addr, size, mtype,
+ __builtin_return_address(0));
+}
+
+#ifdef CONFIG_PCI
+static int pci_ioremap_mem_type = MT_DEVICE;
+
+void pci_ioremap_set_mem_type(int mem_type)
+{
+ pci_ioremap_mem_type = mem_type;
+}
+
+int pci_ioremap_io(unsigned int offset, phys_addr_t phys_addr)
+{
+ BUG_ON(offset + SZ_64K > IO_SPACE_LIMIT);
+
+ return ioremap_page_range(PCI_IO_VIRT_BASE + offset,
+ PCI_IO_VIRT_BASE + offset + SZ_64K,
+ phys_addr,
+ MT_DEVICE);
+}
+EXPORT_SYMBOL_GPL(pci_ioremap_io);
+#endif
--
1.7.9.5
^ permalink raw reply related
* [RFC PATCH 11/11] ARM: Allow ARCH_MULTIPLATFORM to be selected for NOMMU
From: Vladimir Murzin @ 2016-11-22 9:26 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1479806768-39911-1-git-send-email-vladimir.murzin@arm.com>
With this patch applied potentially any platform can be built in NOMMU
configurations if CONFIG_EXPERT is selected. However, there is no
guaranty that platform can successfully run such Image. So the main
motivation behind of this patch:
- bring build coverage for NOMMU configurations
- allow known working NOMMU platforms (like R-class) to be used
- pave a way to add support for single address space (aka 1:1 mapping)
for MMU platforms, so they can be usable in NOMMU configurations
Cc: Hartley Sweeten <hsweeten@visionengravers.com>
Cc: Ryan Mallon <rmallon@gmail.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Russell King <linux@armlinux.org.uk>
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
---
arch/arm/Kconfig | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index f9ff570..8e7496c 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -327,9 +327,9 @@ choice
config ARCH_MULTIPLATFORM
bool "Allow multiple platforms to be selected"
- depends on MMU
+ depends on MMU || EXPERT
select ARM_HAS_SG_CHAIN
- select ARM_PATCH_PHYS_VIRT
+ select ARM_PATCH_PHYS_VIRT if MMU
select AUTO_ZRELADDR
select CLKSRC_OF
select COMMON_CLK
--
1.7.9.5
^ permalink raw reply related
* [RFC PATCH 04/11] PCI: tegra: limit to MMU build only
From: Arnd Bergmann @ 2016-11-22 9:31 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1479806768-39911-5-git-send-email-vladimir.murzin@arm.com>
On Tuesday, November 22, 2016 9:26:01 AM CET Vladimir Murzin wrote:
> This driver uses functionality which available for MMU build only,
> thus add dependency on MMU.
>
> Cc: Thierry Reding <thierry.reding@gmail.com>
> Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
>
Can you be more specific about what requires the MMU here?
Is it the I/O space remapping or something else?
Arnd
^ permalink raw reply
* [PATCH 0/2] ARM: davinvi: da850 add ohci DT nodes
From: Sekhar Nori @ 2016-11-22 9:33 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161121165920.29809-1-ahaslam@baylibre.com>
On Monday 21 November 2016 10:29 PM, Axel Haslam wrote:
> This adds the DT node for the ohci controller and
> enables it for the omapl138-lckd platform.
>
> DEPENDENCIES:
>
> 1. [PATCH v6 0/5] USB: ohci-da8xx: Add device tree support
> https://lkml.org/lkml/2016/11/21/558
Looks like atleast this series is not merged (checking today's linux-next).
>
> 2. [PATCH v3 0/2] regulator: handling of error conditions for usb drivers
> https://lkml.org/lkml/2016/11/4/465
Can you let me know once the dependencies are merged so I can pick these.
Thanks,
Sekhar
^ permalink raw reply
* [PATCH 3/6] reset: hisilicon: add reset-hi3660
From: zhangfei @ 2016-11-22 9:34 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <2220300.Yj4lYzeH2z@wuerfel>
Hi, Arnd
On 2016?11?22? 16:50, Arnd Bergmann wrote:
> On Tuesday, November 22, 2016 3:49:18 PM CET Zhangfei Gao wrote:
>> +static const struct hisi_reset_channel_data hi3660_iomcu_rst[] = {
>> + [HI3660_RST_I2C0] = HISI_RST_SEP(0x20, 3),
>> + [HI3660_RST_I2C1] = HISI_RST_SEP(0x20, 4),
>> + [HI3660_RST_I2C2] = HISI_RST_SEP(0x20, 5),
>> + [HI3660_RST_I2C6] = HISI_RST_SEP(0x20, 27),
>> +};
>> +
>> +static struct hisi_reset_controller_data hi3660_iomcu_controller = {
>> + .nr_channels = ARRAY_SIZE(hi3660_iomcu_rst),
>> + .channels = hi3660_iomcu_rst,
>> +};
>> +
>> +static const struct hisi_reset_channel_data hi3660_crgctrl_rst[] = {
>> + [HI3660_RST_I2C3] = HISI_RST_SEP(0x78, 7),
>> + [HI3660_RST_I2C4] = HISI_RST_SEP(0x78, 27),
>> + [HI3660_RST_I2C7] = HISI_RST_SEP(0x60, 14),
>> + [HI3660_RST_SD] = HISI_RST_SEP(0x90, 18),
>> + [HI3660_RST_SDIO] = HISI_RST_SEP(0x90, 20),
>> + [HI3660_RST_UFS] = HISI_RST_SEP(0x84, 12),
>> + [HI3660_RST_UFS_ASSERT] = HISI_RST_SEP(0x84, 7),
>> + [HI3660_RST_PCIE_SYS] = HISI_RST_SEP(0x84, 26),
>> + [HI3660_RST_PCIE_PHY] = HISI_RST_SEP(0x84, 27),
>> + [HI3660_RST_PCIE_BUS] = HISI_RST_SEP(0x84, 31),
>> + [HI3660_RST_USB3OTG_PHY] = HISI_RST_SEP(0x90, 3),
>> + [HI3660_RST_USB3OTG] = HISI_RST_SEP(0x90, 5),
>> + [HI3660_RST_USB3OTG_32K] = HISI_RST_SEP(0x90, 6),
>> + [HI3660_RST_USB3OTG_AHB] = HISI_RST_SEP(0x90, 7),
>> + [HI3660_RST_USB3OTG_MUX] = HISI_RST_SEP(0x90, 8),
>> +};
> I think you can avoid the trap of the ABI incompatibility if
> you just define those as in the binding as tuples, using #reset-cells=2.
>
> In particular for the first set, it seems really silly to redefine
> the numbers when there is just a simple integer number.
Could you clarify more, still not understand.
The number is index of the arrays, and the index will be used in dts.
The arrays lists the registers offset and bit shift.
For example:
[HI3660_RST_I2C0] = HISI_RST_SEP(0x20, 3), means register offset : 0x20, and bit shift = 3.
And Documentation/devicetree/bindings/reset/reset.txt
Required properties:
#reset-cells: Number of cells in a reset specifier; Typically 0 for nodes
with a single reset output and 1 for nodes with multiple
reset outputs.
Thanks
^ permalink raw reply
* linux-next: manual merge of the clk tree with the arm-soc tree
From: Geert Uytterhoeven @ 2016-11-22 9:36 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161122194130.4efdd019@canb.auug.org.au>
Hi Stephen,
On Tue, Nov 22, 2016 at 9:41 AM, Stephen Rothwell <sfr@canb.auug.org.au> wrote:
> Today's linux-next merge of the clk tree got conflicts in:
>
> arch/arm/boot/dts/r8a7779.dtsi
> arch/arm/boot/dts/r8a7790.dtsi
> arch/arm/boot/dts/r8a7791.dtsi
> arch/arm/boot/dts/r8a7792.dtsi
> arch/arm/boot/dts/r8a7793.dtsi
> arch/arm/boot/dts/r8a7794.dtsi
> arch/arm/mach-shmobile/setup-rcar-gen2.c
> arch/arm64/boot/dts/renesas/r8a7795.dtsi
> arch/arm64/boot/dts/renesas/r8a7796.dtsi
> drivers/soc/renesas/Makefile
>
> between various commits from the arm-soc tree and commits from the
> clk tree.
>
> It was just too much at this time of day, so please talk to each other
> and figure out how to fix these up. I have used the clk tree from
> next-20161117 for today.
Most of these are of the "add both sides" type.
The only exception is the one in arch/arm/mach-shmobile/setup-rcar-gen2.c,
where you just want to keep the call to of_clk_init(NULL);
There's a resolution in
https://git.kernel.org/cgit/linux/kernel/git/geert/renesas-drivers.git/log/?h=renesas-devel-20161117v2-v4.9-rc5%2brcar-rst
Sorry for the mess.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply
* [PATCH 0/2] ARM: davinvi: da850 add ohci DT nodes
From: Axel Haslam @ 2016-11-22 9:38 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <3543ab96-1a7e-395f-26a6-c748cf0423f1@ti.com>
On Tue, Nov 22, 2016 at 10:33 AM, Sekhar Nori <nsekhar@ti.com> wrote:
> On Monday 21 November 2016 10:29 PM, Axel Haslam wrote:
>> This adds the DT node for the ohci controller and
>> enables it for the omapl138-lckd platform.
>>
>> DEPENDENCIES:
>>
>> 1. [PATCH v6 0/5] USB: ohci-da8xx: Add device tree support
>> https://lkml.org/lkml/2016/11/21/558
>
> Looks like atleast this series is not merged (checking today's linux-next).
>
>>
>> 2. [PATCH v3 0/2] regulator: handling of error conditions for usb drivers
>> https://lkml.org/lkml/2016/11/4/465
>
> Can you let me know once the dependencies are merged so I can pick these.
Right, the driver changes are not yet picked up, ill ping once those get in.
Regards
Axel.
>
> Thanks,
> Sekhar
^ permalink raw reply
* [RFC PATCH 04/11] PCI: tegra: limit to MMU build only
From: Vladimir Murzin @ 2016-11-22 9:40 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <11637152.Dd0IBkEQ8q@wuerfel>
On 22/11/16 09:31, Arnd Bergmann wrote:
> On Tuesday, November 22, 2016 9:26:01 AM CET Vladimir Murzin wrote:
>> This driver uses functionality which available for MMU build only,
>> thus add dependency on MMU.
>>
>> Cc: Thierry Reding <thierry.reding@gmail.com>
>> Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
>>
>
> Can you be more specific about what requires the MMU here?
>
> Is it the I/O space remapping or something else?
Yes it comes from I/O space remapping.
The fill error log:
CC drivers/pci/host/pci-tegra.o
In file included from ./arch/arm/include/asm/page.h:22:0,
from ./arch/arm/include/asm/thread_info.h:17,
from ./include/linux/thread_info.h:58,
from ./include/asm-generic/current.h:4,
from ./arch/arm/include/generated/asm/current.h:1,
from ./include/linux/mutex.h:13,
from ./include/linux/notifier.h:13,
from ./include/linux/clk.h:17,
from drivers/pci/host/pci-tegra.c:29:
drivers/pci/host/pci-tegra.c: In function 'tegra_pcie_bus_alloc':
drivers/pci/host/pci-tegra.c:388:27: error: 'L_PTE_PRESENT' undeclared (first use in this function)
pgprot_t prot = __pgprot(L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY |
^
./arch/arm/include/asm/page-nommu.h:41:26: note: in definition of macro '__pgprot'
#define __pgprot(x) (x)
^
drivers/pci/host/pci-tegra.c:388:27: note: each undeclared identifier is reported only once for each function it appears in
pgprot_t prot = __pgprot(L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY |
^
./arch/arm/include/asm/page-nommu.h:41:26: note: in definition of macro '__pgprot'
#define __pgprot(x) (x)
^
drivers/pci/host/pci-tegra.c:388:43: error: 'L_PTE_YOUNG' undeclared (first use in this function)
pgprot_t prot = __pgprot(L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY |
^
./arch/arm/include/asm/page-nommu.h:41:26: note: in definition of macro '__pgprot'
#define __pgprot(x) (x)
^
drivers/pci/host/pci-tegra.c:388:57: error: 'L_PTE_DIRTY' undeclared (first use in this function)
pgprot_t prot = __pgprot(L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY |
^
./arch/arm/include/asm/page-nommu.h:41:26: note: in definition of macro '__pgprot'
#define __pgprot(x) (x)
^
drivers/pci/host/pci-tegra.c:389:6: error: 'L_PTE_XN' undeclared (first use in this function)
L_PTE_XN | L_PTE_MT_DEV_SHARED | L_PTE_SHARED);
^
./arch/arm/include/asm/page-nommu.h:41:26: note: in definition of macro '__pgprot'
#define __pgprot(x) (x)
^
drivers/pci/host/pci-tegra.c:389:17: error: 'L_PTE_MT_DEV_SHARED' undeclared (first use in this function)
L_PTE_XN | L_PTE_MT_DEV_SHARED | L_PTE_SHARED);
^
./arch/arm/include/asm/page-nommu.h:41:26: note: in definition of macro '__pgprot'
#define __pgprot(x) (x)
^
drivers/pci/host/pci-tegra.c:389:39: error: 'L_PTE_SHARED' undeclared (first use in this function)
L_PTE_XN | L_PTE_MT_DEV_SHARED | L_PTE_SHARED);
^
./arch/arm/include/asm/page-nommu.h:41:26: note: in definition of macro '__pgprot'
#define __pgprot(x) (x)
^
drivers/pci/host/pci-tegra.c: At top level:
drivers/pci/host/pci-tegra.c:501:10: error: 'pci_generic_config_read32' undeclared here (not in a function)
.read = pci_generic_config_read32,
^
drivers/pci/host/pci-tegra.c:502:11: error: 'pci_generic_config_write32' undeclared here (not in a function)
.write = pci_generic_config_write32,
^
drivers/pci/host/pci-tegra.c: In function 'tegra_pcie_relax_enable':
drivers/pci/host/pci-tegra.c:609:2: error: implicit declaration of function 'pcie_capability_set_word' [-Werror=implicit-function-declaration]
pcie_capability_set_word(dev, PCI_EXP_DEVCTL, PCI_EXP_DEVCTL_RELAX_EN);
^
drivers/pci/host/pci-tegra.c: In function 'tegra_pcie_setup':
drivers/pci/host/pci-tegra.c:626:8: error: implicit declaration of function 'pci_remap_iospace' [-Werror=implicit-function-declaration]
err = pci_remap_iospace(&pcie->pio, pcie->io.start);
^
drivers/pci/host/pci-tegra.c:628:3: error: implicit declaration of function 'pci_add_resource_offset' [-Werror=implicit-function-declaration]
pci_add_resource_offset(&sys->resources, &pcie->pio,
^
drivers/pci/host/pci-tegra.c:634:2: error: implicit declaration of function 'pci_add_resource' [-Werror=implicit-function-declaration]
pci_add_resource(&sys->resources, &pcie->busn);
^
drivers/pci/host/pci-tegra.c:636:8: error: implicit declaration of function 'devm_request_pci_bus_resources' [-Werror=implicit-function-declaration]
err = devm_request_pci_bus_resources(dev, &sys->resources);
^
cc1: some warnings being treated as errors
make[1]: *** [drivers/pci/host/pci-tegra.o] Error 1
make: *** [drivers/pci/host/pci-tegra.o] Error 2
Cheers
Vladimir
>
> Arnd
>
>
^ permalink raw reply
* [PATCH 1/6] reset: hisilicon: add reset core
From: Arnd Bergmann @ 2016-11-22 9:41 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <0084ef53-c0e6-51e8-afa5-07264dfce529@linaro.org>
On Tuesday, November 22, 2016 5:22:42 PM CET zhangfei wrote:
> Hi, Arnd
>
> On 2016?11?22? 16:45, Arnd Bergmann wrote:
> > On Tuesday, November 22, 2016 3:49:16 PM CET Zhangfei Gao wrote:
> >> @@ -1,8 +1,8 @@
> >> obj-y += core.o
> >> -obj-y += hisilicon/
> >> obj-$(CONFIG_ARCH_STI) += sti/
> >> obj-$(CONFIG_RESET_ATH79) += reset-ath79.o
> >> obj-$(CONFIG_RESET_BERLIN) += reset-berlin.o
> >> +obj-$(CONFIG_ARCH_HISI) += hisilicon/
> >> obj-$(CONFIG_RESET_LPC18XX) += reset-lpc18xx.o
> >> obj-$(CONFIG_RESET_MESON) += reset-meson.o
> >> obj-$(CONFIG_RESET_OXNAS) += reset-oxnas.o
> > Please leave the obj-y line, otherwise the COMPILE_TEST variant won't work.
>
> COMPILE_TEST is added in drivers/reset/hisilicon/Kconfig
> like
> config COMMON_RESET_HI3660
> tristate "Hi3660 Reset Driver"
> depends on ARCH_HISI || COMPILE_TEST
>
> The reason not using "obj-y" here is that reset.c will be compiled unconditionally.
>
> drivers/reset/hisilicon/Makefile
> obj-y += reset.o
Yes, that line has to change as well then, to only build it when one
of the hardware specific drivers is enabled.
Arnd
^ permalink raw reply
* [PATCH 1/2] ARM64: dts: Add support for Meson GXM
From: Neil Armstrong @ 2016-11-22 9:41 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <m2oa181jtd.fsf@baylibre.com>
On 11/22/2016 12:42 AM, Kevin Hilman wrote:
> Neil,
>
> Neil Armstrong <narmstrong@baylibre.com> writes:
>
>> Following the Amlogic Linux kernel, it seem the only differences
>> between the GXL and GXM SoCs are the CPU Clusters.
>>
>> This commit renames the gxl-s905d-p23x DTSI in a common file for
>> S905D p20x and S912 q20x boards.
>
> s/p20x/p23x/ ??
>
>> Then adds a meson-gxm dtsi and reproduce the P23x to Q20x boards
>> dts files since the S905D and S912 SoCs shares the same pinout
>> and the P23x and Q20x boards are identical.
>>
>> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
>
> I had to drop this as it breaks the network on (at least) gxbb-p200, but...
>
> [...]
>
>> diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts
>> index 03e3d76..17bb77c 100644
>> --- a/arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts
>> +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts
>> @@ -56,3 +56,22 @@
>> pinctrl-0 = <&i2c_b_pins>;
>> pinctrl-names = "default";
>> };
>> +
>> +ðmac {
>> + status = "okay";
>> + pinctrl-0 = <ð_rgmii_pins>;
>> + pinctrl-names = "default";
>> +
>> + phy-handle = <ð_phy0>;
>> +
>> + mdio {
>> + compatible = "snps,dwmac-mdio";
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> +
>> + eth_phy0: ethernet-phy at 0 {
>> + reg = <0>;
>> + realtek,disable-eee-1000t;
>> + };
>> + };
>> +};
>
> ... backing out this change makes it work again.
>
> This change also looks suspicious as it's using the proposed disable-eee
> properties, which I don't think have been merged yet.
>
>> diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-p201.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-p201.dts
>> index 39bb037..5608c51 100644
>> --- a/arch/arm64/boot/dts/amlogic/meson-gxbb-p201.dts
>> +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-p201.dts
>> @@ -50,3 +50,10 @@
>> compatible = "amlogic,p201", "amlogic,meson-gxbb";
>> model = "Amlogic Meson GXBB P201 Development Board";
>> };
>> +
>> +ðmac {
>> + status = "okay";
>> + pinctrl-0 = <ð_rmii_pins>;
>> + pinctrl-names = "default";
>> + phy-mode = "rmii";
>> +};
>
> This also doesn't look releveant to the GXL/GXM changes being introduced
> in this patch.
>
> Could you separate out any GXBB-related changes into a separate patch
> (if they are in fact needed) and re-spin this?
>
> Thanks,
>
> Kevin
>
Sorry leftover for another work...
Will cleanup for v2.
Neil
^ permalink raw reply
* [PATCH] drm: tilcdc: fix a DT property parsing
From: Bartosz Golaszewski @ 2016-11-22 9:41 UTC (permalink / raw)
To: linux-arm-kernel
The DT binding for tildc is not consistent with the driver code - the
option in the binding is called 'max-width' while the code expects
'ti,max-width'.
Make the driver code consistent with the binding.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
---
drivers/gpu/drm/tilcdc/tilcdc_drv.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/tilcdc/tilcdc_drv.c b/drivers/gpu/drm/tilcdc/tilcdc_drv.c
index a7c91f7..4d3adf8e 100644
--- a/drivers/gpu/drm/tilcdc/tilcdc_drv.c
+++ b/drivers/gpu/drm/tilcdc/tilcdc_drv.c
@@ -302,7 +302,7 @@ static int tilcdc_init(struct drm_driver *ddrv, struct device *dev)
DBG("Maximum Bandwidth Value %d", priv->max_bandwidth);
- if (of_property_read_u32(node, "ti,max-width", &priv->max_width))
+ if (of_property_read_u32(node, "max-width", &priv->max_width))
priv->max_width = TILCDC_DEFAULT_MAX_WIDTH;
DBG("Maximum Horizontal Pixel Width Value %dpixels", priv->max_width);
--
2.9.3
^ permalink raw reply related
* [PATCH 3/6] reset: hisilicon: add reset-hi3660
From: Arnd Bergmann @ 2016-11-22 9:42 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <d6e602c0-70e9-0309-86b5-bfd006d86028@linaro.org>
On Tuesday, November 22, 2016 5:34:05 PM CET zhangfei wrote:
> On 2016?11?22? 16:50, Arnd Bergmann wrote:
> > On Tuesday, November 22, 2016 3:49:18 PM CET Zhangfei Gao wrote:
> >> +static const struct hisi_reset_channel_data hi3660_iomcu_rst[] = {
> >> + [HI3660_RST_I2C0] = HISI_RST_SEP(0x20, 3),
> >> + [HI3660_RST_I2C1] = HISI_RST_SEP(0x20, 4),
> >> + [HI3660_RST_I2C2] = HISI_RST_SEP(0x20, 5),
> >> + [HI3660_RST_I2C6] = HISI_RST_SEP(0x20, 27),
> >> +};
> >> +
> >> +static struct hisi_reset_controller_data hi3660_iomcu_controller = {
> >> + .nr_channels = ARRAY_SIZE(hi3660_iomcu_rst),
> >> + .channels = hi3660_iomcu_rst,
> >> +};
> >> +
> >> +static const struct hisi_reset_channel_data hi3660_crgctrl_rst[] = {
> >> + [HI3660_RST_I2C3] = HISI_RST_SEP(0x78, 7),
> >> + [HI3660_RST_I2C4] = HISI_RST_SEP(0x78, 27),
> >> + [HI3660_RST_I2C7] = HISI_RST_SEP(0x60, 14),
> >> + [HI3660_RST_SD] = HISI_RST_SEP(0x90, 18),
> >> + [HI3660_RST_SDIO] = HISI_RST_SEP(0x90, 20),
> >> + [HI3660_RST_UFS] = HISI_RST_SEP(0x84, 12),
> >> + [HI3660_RST_UFS_ASSERT] = HISI_RST_SEP(0x84, 7),
> >> + [HI3660_RST_PCIE_SYS] = HISI_RST_SEP(0x84, 26),
> >> + [HI3660_RST_PCIE_PHY] = HISI_RST_SEP(0x84, 27),
> >> + [HI3660_RST_PCIE_BUS] = HISI_RST_SEP(0x84, 31),
> >> + [HI3660_RST_USB3OTG_PHY] = HISI_RST_SEP(0x90, 3),
> >> + [HI3660_RST_USB3OTG] = HISI_RST_SEP(0x90, 5),
> >> + [HI3660_RST_USB3OTG_32K] = HISI_RST_SEP(0x90, 6),
> >> + [HI3660_RST_USB3OTG_AHB] = HISI_RST_SEP(0x90, 7),
> >> + [HI3660_RST_USB3OTG_MUX] = HISI_RST_SEP(0x90, 8),
> >> +};
> > I think you can avoid the trap of the ABI incompatibility if
> > you just define those as in the binding as tuples, using #reset-cells=2.
> >
> > In particular for the first set, it seems really silly to redefine
> > the numbers when there is just a simple integer number.
>
> Could you clarify more, still not understand.
> The number is index of the arrays, and the index will be used in dts.
> The arrays lists the registers offset and bit shift.
> For example:
>
> [HI3660_RST_I2C0] = HISI_RST_SEP(0x20, 3), means register offset : 0x20, and bit shift = 3.
>
> And Documentation/devicetree/bindings/reset/reset.txt
> Required properties:
> #reset-cells: Number of cells in a reset specifier; Typically 0 for nodes
> with a single reset output and 1 for nodes with multiple
> reset outputs.
You can easily enumerate the registers that contain reset bits here,
so just use one cell for the register and another one for the index.
Arnd
^ permalink raw reply
* [PATCH] ARM: dts: da850: specify max width for display node
From: Bartosz Golaszewski @ 2016-11-22 9:42 UTC (permalink / raw)
To: linux-arm-kernel
It has been determined that the highest resolution supported correctly
by LCDC rev1 is 800x600 on da850 due to memory bandwidth constraints.
Set the max_width property in da850.dtsi to 800.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
---
arch/arm/boot/dts/da850.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/da850.dtsi b/arch/arm/boot/dts/da850.dtsi
index 36066fa..0876238 100644
--- a/arch/arm/boot/dts/da850.dtsi
+++ b/arch/arm/boot/dts/da850.dtsi
@@ -441,6 +441,7 @@
compatible = "ti,da850-tilcdc";
reg = <0x213000 0x1000>;
interrupts = <52>;
+ max-width = <800>;
status = "disabled";
};
};
--
2.9.3
^ permalink raw reply related
* [PATCH 1/4] clocksource/drivers/arm_arch_timer: Don't assume clock runs in suspend
From: Daniel Lezcano @ 2016-11-22 9:44 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161122094300.GA2017@mai>
From: Brian Norris <briannorris@chromium.org>
The ARM specifies that the system counter "must be implemented in an
always-on power domain," and so we try to use the counter as a source of
timekeeping across suspend/resume. Unfortunately, some SoCs (e.g.,
Rockchip's RK3399) do not keep the counter ticking properly when
switched from their high-power clock to the lower-power clock used in
system suspend. Support this quirk by adding a new device tree property.
Signed-off-by: Brian Norris <briannorris@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
---
Documentation/devicetree/bindings/arm/arch_timer.txt | 5 +++++
drivers/clocksource/arm_arch_timer.c | 9 ++++++++-
2 files changed, 13 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/arm/arch_timer.txt b/Documentation/devicetree/bindings/arm/arch_timer.txt
index ef5fbe9..ad440a2 100644
--- a/Documentation/devicetree/bindings/arm/arch_timer.txt
+++ b/Documentation/devicetree/bindings/arm/arch_timer.txt
@@ -38,6 +38,11 @@ to deliver its interrupts via SPIs.
architecturally-defined reset values. Only supported for 32-bit
systems which follow the ARMv7 architected reset values.
+- arm,no-tick-in-suspend : The main counter does not tick when the system is in
+ low-power system suspend on some SoCs. This behavior does not match the
+ Architecture Reference Manual's specification that the system counter "must
+ be implemented in an always-on power domain."
+
Example:
diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c
index 73c487d..a2503db 100644
--- a/drivers/clocksource/arm_arch_timer.c
+++ b/drivers/clocksource/arm_arch_timer.c
@@ -81,6 +81,7 @@ static struct clock_event_device __percpu *arch_timer_evt;
static enum ppi_nr arch_timer_uses_ppi = VIRT_PPI;
static bool arch_timer_c3stop;
static bool arch_timer_mem_use_virtual;
+static bool arch_counter_suspend_stop;
static bool evtstrm_enable = IS_ENABLED(CONFIG_ARM_ARCH_TIMER_EVTSTREAM);
@@ -576,7 +577,7 @@ static struct clocksource clocksource_counter = {
.rating = 400,
.read = arch_counter_read,
.mask = CLOCKSOURCE_MASK(56),
- .flags = CLOCK_SOURCE_IS_CONTINUOUS | CLOCK_SOURCE_SUSPEND_NONSTOP,
+ .flags = CLOCK_SOURCE_IS_CONTINUOUS,
};
static struct cyclecounter cyclecounter = {
@@ -616,6 +617,8 @@ static void __init arch_counter_register(unsigned type)
arch_timer_read_counter = arch_counter_get_cntvct_mem;
}
+ if (!arch_counter_suspend_stop)
+ clocksource_counter.flags |= CLOCK_SOURCE_SUSPEND_NONSTOP;
start_count = arch_timer_read_counter();
clocksource_register_hz(&clocksource_counter, arch_timer_rate);
cyclecounter.mult = clocksource_counter.mult;
@@ -907,6 +910,10 @@ static int __init arch_timer_of_init(struct device_node *np)
of_property_read_bool(np, "arm,cpu-registers-not-fw-configured"))
arch_timer_uses_ppi = PHYS_SECURE_PPI;
+ /* On some systems, the counter stops ticking when in suspend. */
+ arch_counter_suspend_stop = of_property_read_bool(np,
+ "arm,no-tick-in-suspend");
+
return arch_timer_init();
}
CLOCKSOURCE_OF_DECLARE(armv7_arch_timer, "arm,armv7-timer", arch_timer_of_init);
--
2.7.4
^ permalink raw reply related
page: next (older) | prev (newer) | latest
- recent:[subjects (threaded)|topics (new)|topics (active)]
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox