* [PATCH v2] KVM: arm/arm64: Access CNTHCTL_EL2 bit fields correctly
From: Marc Zyngier @ 2016-12-01 13:30 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1480592310-26079-1-git-send-email-jintack@cs.columbia.edu>
Hi Jintack,
On 01/12/16 11:38, Jintack Lim wrote:
> Current KVM world switch code is unintentionally setting wrong bits to
> CNTHCTL_EL2 when E2H == 1, which may allow guest OS to access physical
> timer. Bit positions of CNTHCTL_EL2 are changing depending on
> HCR_EL2.E2H bit. EL1PCEN and EL1PCTEN are 1st and 0th bits when E2H is
> not set, but they are 11th and 10th bits respectively when E2H is set.
>
> In fact, on VHE we only need to set those bits once, not for every world
> switch. This is because the host kernel runs in EL2 with HCR_EL2.TGE ==
> 1, which makes those bits have no effect for the host kernel execution.
> So we just set those bits once for guests, and that's it.
>
> Signed-off-by: Jintack Lim <jintack@cs.columbia.edu>
> ---
> v2: Skip configuring cnthctl_el2 in world switch path on VHE system.
> This patch is based on linux-next.
>
> ---
> arch/arm/kvm/arm.c | 1 +
> include/kvm/arm_arch_timer.h | 1 +
> virt/kvm/arm/arch_timer.c | 23 ++++++++++++++++++++++
> virt/kvm/arm/hyp/timer-sr.c | 45 ++++++++++++++++++++++++++++++++------------
> 4 files changed, 58 insertions(+), 12 deletions(-)
>
> diff --git a/arch/arm/kvm/arm.c b/arch/arm/kvm/arm.c
> index 8f92efa..38c0645 100644
> --- a/arch/arm/kvm/arm.c
> +++ b/arch/arm/kvm/arm.c
> @@ -1286,6 +1286,7 @@ static void teardown_hyp_mode(void)
>
> static int init_vhe_mode(void)
> {
> + on_each_cpu(kvm_timer_init_vhe, NULL, 1);
I'm pretty sure this is not going to work with CPU hotplug, as you only
perform this once and for all at boot time.
I think it would be better if you called this init function as part of
cpu_init_hyp_mode().
> kvm_info("VHE mode initialized successfully\n");
> return 0;
> }
> diff --git a/include/kvm/arm_arch_timer.h b/include/kvm/arm_arch_timer.h
> index dda39d8..5853399 100644
> --- a/include/kvm/arm_arch_timer.h
> +++ b/include/kvm/arm_arch_timer.h
> @@ -76,4 +76,5 @@ int kvm_timer_vcpu_reset(struct kvm_vcpu *vcpu,
>
> void kvm_timer_vcpu_put(struct kvm_vcpu *vcpu);
>
> +void kvm_timer_init_vhe(void *dummy);
> #endif
> diff --git a/virt/kvm/arm/arch_timer.c b/virt/kvm/arm/arch_timer.c
> index 17b8fa5..7a0d85d7 100644
> --- a/virt/kvm/arm/arch_timer.c
> +++ b/virt/kvm/arm/arch_timer.c
> @@ -24,6 +24,7 @@
>
> #include <clocksource/arm_arch_timer.h>
> #include <asm/arch_timer.h>
> +#include <asm/kvm_hyp.h>
>
> #include <kvm/arm_vgic.h>
> #include <kvm/arm_arch_timer.h>
> @@ -507,3 +508,25 @@ void kvm_timer_init(struct kvm *kvm)
> {
> kvm->arch.timer.cntvoff = kvm_phys_timer_read();
> }
> +
> +/*
> + * On VHE system, we only need to configure trap on physical timer and counter
> + * accesses in EL0 and EL1 once, not for every world switch.
> + * The host kernel runs at EL2 with HCR_EL2.TGE == 1,
> + * and this makes those bits have no effect for the host kernel execution.
> + */
> +void kvm_timer_init_vhe(void *dummy)
> +{
> + /* When HCR_EL2.E2H ==1, EL1PCEN and EL1PCTEN are shifted by 10 */
> + u32 cnthctl_shift = 10;
> + u64 val;
> +
> + /*
> + * Disallow physical timer access for the guest.
> + * Physical counter access is allowed.
> + */
> + val = read_sysreg(cnthctl_el2);
> + val &= ~(CNTHCTL_EL1PCEN << cnthctl_shift);
> + val |= (CNTHCTL_EL1PCTEN << cnthctl_shift);
> + write_sysreg(val, cnthctl_el2);
> +}
If you make this called from cpu_init_hyp_mode(), it will have to be
guarded with is_kernel_in_hyp_mode().
> diff --git a/virt/kvm/arm/hyp/timer-sr.c b/virt/kvm/arm/hyp/timer-sr.c
> index 798866a..f7fc957 100644
> --- a/virt/kvm/arm/hyp/timer-sr.c
> +++ b/virt/kvm/arm/hyp/timer-sr.c
> @@ -21,6 +21,18 @@
>
> #include <asm/kvm_hyp.h>
>
> +#ifdef CONFIG_ARM64
> +static inline bool has_vhe(void)
> +{
> + if (cpus_have_const_cap(ARM64_HAS_VIRT_HOST_EXTN))
> + return true;
> +
> + return false;
> +}
> +#else
> +#define has_vhe() false
Could this now be moved to asm/virt.h, and maybe replace the current
implementation of is_kernel_in_hyp_mode? The latter may require some
more hacking around, so I'm not sure this is worth it.
> +#endif
> +
> /* vcpu is already in the HYP VA space */
> void __hyp_text __timer_save_state(struct kvm_vcpu *vcpu)
> {
> @@ -35,10 +47,16 @@ void __hyp_text __timer_save_state(struct kvm_vcpu *vcpu)
> /* Disable the virtual timer */
> write_sysreg_el0(0, cntv_ctl);
>
> - /* Allow physical timer/counter access for the host */
> - val = read_sysreg(cnthctl_el2);
> - val |= CNTHCTL_EL1PCTEN | CNTHCTL_EL1PCEN;
> - write_sysreg(val, cnthctl_el2);
> + /*
> + * We don't need to do this for VHE since the host kernel runs in EL2
> + * with HCR_EL2.TGE ==1, which makes those bits have no impact.
> + */
> + if (!has_vhe()) {
> + /* Allow physical timer/counter access for the host */
> + val = read_sysreg(cnthctl_el2);
> + val |= CNTHCTL_EL1PCTEN | CNTHCTL_EL1PCEN;
> + write_sysreg(val, cnthctl_el2);
> + }
>
> /* Clear cntvoff for the host */
> write_sysreg(0, cntvoff_el2);
> @@ -50,14 +68,17 @@ void __hyp_text __timer_restore_state(struct kvm_vcpu *vcpu)
> struct arch_timer_cpu *timer = &vcpu->arch.timer_cpu;
> u64 val;
>
> - /*
> - * Disallow physical timer access for the guest
> - * Physical counter access is allowed
> - */
> - val = read_sysreg(cnthctl_el2);
> - val &= ~CNTHCTL_EL1PCEN;
> - val |= CNTHCTL_EL1PCTEN;
> - write_sysreg(val, cnthctl_el2);
> + /* Those bits are already configured at boot on VHE-system */
> + if (!has_vhe()) {
> + /*
> + * Disallow physical timer access for the guest
> + * Physical counter access is allowed
> + */
> + val = read_sysreg(cnthctl_el2);
> + val &= ~CNTHCTL_EL1PCEN;
> + val |= CNTHCTL_EL1PCTEN;
> + write_sysreg(val, cnthctl_el2);
> + }
>
> if (timer->enabled) {
> write_sysreg(kvm->arch.timer.cntvoff, cntvoff_el2);
>
Otherwise, this looks good, and the generated code is quite nice.
Thanks,
M.
--
Jazz is not dead. It just smells funny...
^ permalink raw reply
* [PATCH] crypto: arm/aesbs - Select SIMD in Kconfig
From: Arnd Bergmann @ 2016-12-01 13:43 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161201125616.GB2249@gondor.apana.org.au>
On Thursday, December 1, 2016 8:56:16 PM CET Herbert Xu wrote:
> On Thu, Dec 01, 2016 at 12:47:59AM +0100, Arnd Bergmann wrote:
> > Commit 585b5fa63da9 ("crypto: arm/aes - Select SIMD in Kconfig") added
> > the dependency for CRYPTO_AES_ARM_CE, but missed the same change
> > for CRYPTO_AES_ARM_BS:
> >
> > arch/arm/crypto/aes-arm-bs.o: In function `aesbs_mod_init':
> > aesbs-glue.c:(.init.text+0x38): undefined reference to `simd_skcipher_create_compat'
> >
> > Fixes: 211f41af534a ("crypto: aesbs - Convert to skcipher")
> > Signed-off-by: Arnd Bergmann <arnd@arndb.de>
>
> Thanks Arnd. This should already be fixed by 6fdf436fd854.
Right. I have discarded my patch on today's linux-next and I
get no more link errors.
Arnd
^ permalink raw reply
* [PATCH] nommu: allow mmap when !CONFIG_MMU
From: Benjamin Gaignard @ 2016-12-01 13:48 UTC (permalink / raw)
To: linux-arm-kernel
commit ab6494f0c96f ("nommu: Add noMMU support to the DMA API") have
add CONFIG_MMU compilation flag but that prohibit to use dma_mmap_wc()
when the platform doesn't have MMU.
This patch call vm_iomap_memory() in noMMU case to test if addresses
are correct and set wma->vm_flags rather than all return an error.
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: arnd at arndb.de
---
arch/arm/mm/dma-mapping.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c
index ab4f745..230875e 100644
--- a/arch/arm/mm/dma-mapping.c
+++ b/arch/arm/mm/dma-mapping.c
@@ -868,6 +868,9 @@ static int __arm_dma_mmap(struct device *dev, struct vm_area_struct *vma,
vma->vm_end - vma->vm_start,
vma->vm_page_prot);
}
+#else
+ ret = vm_iomap_memory(vma, vma->vm_start,
+ (vma->vm_end - vma->vm_start));
#endif /* CONFIG_MMU */
return ret;
--
1.9.1
^ permalink raw reply related
* [PATCH 1/5] gpio: pl061: use local state for parent IRQ storage
From: Sudeep Holla @ 2016-12-01 13:48 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1480068564-9447-1-git-send-email-linus.walleij@linaro.org>
On 25/11/16 10:09, Linus Walleij wrote:
> The driver is poking around in the struct gpio_chip internals,
> which is a no-no. Use a variable in the local state container.
>
The entire series looks good to me. I also gave it a spin on my Juno. So,
Acked-by: Sudeep Holla <sudeep.holla@arm.com>
Tested-by: Sudeep Holla <sudeep.holla@arm.com>
--
Regards,
Sudeep
^ permalink raw reply
* [PATCH v15] acpi, apei, arm64: APEI initial support for aarch64.
From: fu.wei at linaro.org @ 2016-12-01 13:51 UTC (permalink / raw)
To: linux-arm-kernel
From: Tomasz Nowicki <tomasz.nowicki@linaro.org>
This patch provides APEI arch-specific bits for aarch64
Meanwhile,
(1)move HEST type (ACPI_HEST_TYPE_IA32_CORRECTED_CHECK) checking to
a generic place.
(2)select HAVE_ACPI_APEI when EFI and ACPI is set on ARM64,
because arch_apei_get_mem_attribute is using efi_mem_attributes on ARM64.
[Fu Wei: improve && upstream]
Signed-off-by: Tomasz Nowicki <tomasz.nowicki@linaro.org>
Tested-by: Jonathan (Zhixiong) Zhang <zjzhang@codeaurora.org>
Signed-off-by: Fu Wei <fu.wei@linaro.org>
Acked-by: Hanjun Guo <hanjun.guo@linaro.org>
Tested-by: Tyler Baicar <tbaicar@codeaurora.org>
Acked-by: Will Deacon <will.deacon@arm.com>
Reviewed-by: Borislav Petkov <bp@suse.de>
---
This patchset has been tested on the following platforms:
(1)ARM Foundation v8 model
Changelog:
v15:https://lkml.org/lkml/2016/12/1/
Improve the comment of acpi_disable_cmcff.
Rebase to 4.9.0-rc7-gd7c7bc3
v14:https://lkml.org/lkml/2016/8/10/231
Delete hest_ia32_init().
Fix a comment typo for acpi_disable_cmcff.
Rebase to 4.8.0-rc1-ge6c4d92
v13:https://lkml.org/lkml/2016/8/10/499
Fix a comment problem(add a "end").
Add a comment for the definition of acpi_disable_cmcff.
Rebase to 4.8.0-rc1-g372734a
v12:https://lkml.org/lkml/2016/7/29/97
Fix a comment problem(redundant "with").
Rebase to 4.7.0-g680eee2.
v11:https://lkml.org/lkml/2016/7/27/427
Rebase to v4.7-0e06f5c0.
v10:https://lkml.org/lkml/2016/4/14
Fix the Alphabetical order problem in arch/arm64/Kconfig.
v9: https://lkml.org/lkml/2016/4/5/522
Improve the comment for arch_apei_flush_tlb_one.
Using select "HAVE_ACPI_APEI if (ACPI && EFI)" to fix the EFI dependence
problem.
v8: https://lkml.org/lkml/2016/3/29/132
Fix a "undefined reference" bug by selecting EFI when ACPI_APEI is set
on ARM64.
v7: https://lkml.org/lkml/2016/3/17/183
Add comment for arch_apei_flush_tlb_one in arch/arm64/include/asm/acpi.h.
v6: https://lists.linaro.org/pipermail/linaro-acpi/2016-March/006644.html
Move HEST type (ACPI_HEST_TYPE_IA32_CORRECTED_CHECK) checking to
a generic place.
Delete HAVE_ACPI_APEI_HEST_IA32.
v5: https://lkml.org/lkml/2015/12/10/131
Add "HAVE_ACPI_APEI_HEST_IA32" instead of
"#if defined(__i386__) || defined(__x86_64__)".
v4: https://lkml.org/lkml/2015/12/8/188
Rebase to latest kernel version(4.4-rc4).
Move arch_apei_flush_tlb_one into header file as a inline function
Add a new subfunction "hest_ia_init" for "acpi_disable_cmcff".
v3: https://lkml.org/lkml/2015/12/3/521
Remove "acpi_disable_cmcff" from arm64 code,
and wrap it in hest.c by "#if defined(__i386__) || defined(__x86_64__)"
v2: https://lkml.org/lkml/2015/12/2/432
Rebase to latest kernel version(4.4-rc3).
Move arch_apei_flush_tlb_one() to arch/arm64/kernel/acpi.c
v1: https://lkml.org/lkml/2015/8/14/199
Move arch_apei_flush_tlb_one() to arch/arm64/include/asm/apci.h.
Delete arch/arm64/kernel/apei.c.
Add "#ifdef CONFIG_ACPI_APEI" for "acpi_disable_cmcff".
arch/arm64/Kconfig | 1 +
arch/arm64/include/asm/acpi.h | 23 ++++++++++++++++++++++-
arch/x86/kernel/acpi/apei.c | 3 ---
drivers/acpi/apei/hest.c | 13 ++++++++++---
4 files changed, 33 insertions(+), 7 deletions(-)
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index 969ef88..657be7f 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -52,6 +52,7 @@ config ARM64
select GENERIC_TIME_VSYSCALL
select HANDLE_DOMAIN_IRQ
select HARDIRQS_SW_RESEND
+ select HAVE_ACPI_APEI if (ACPI && EFI)
select HAVE_ALIGNED_STRUCT_PAGE if SLUB
select HAVE_ARCH_AUDITSYSCALL
select HAVE_ARCH_BITREVERSE
diff --git a/arch/arm64/include/asm/acpi.h b/arch/arm64/include/asm/acpi.h
index e517088..d0de0e0 100644
--- a/arch/arm64/include/asm/acpi.h
+++ b/arch/arm64/include/asm/acpi.h
@@ -17,6 +17,7 @@
#include <asm/cputype.h>
#include <asm/smp_plat.h>
+#include <asm/tlbflush.h>
/* Macros for consistency checks of the GICC subtable of MADT */
#define ACPI_MADT_GICC_LENGTH \
@@ -114,8 +115,28 @@ static inline const char *acpi_get_enable_method(int cpu)
}
#ifdef CONFIG_ACPI_APEI
+/*
+ * acpi_disable_cmcff is used in drivers/acpi/apei/hest.c for disabling
+ * IA-32 Architecture Corrected Machine Check (CMC) Firmware-First mode
+ * with a kernel command line parameter "acpi=nocmcoff". But we don't
+ * have this IA-32 specific feature on ARM64, this definition is only
+ * for compatibility.
+ */
+#define acpi_disable_cmcff 1
pgprot_t arch_apei_get_mem_attribute(phys_addr_t addr);
-#endif
+
+/*
+ * Despite its name, this function must still broadcast the TLB
+ * invalidation in order to ensure other CPUs don't end up with junk
+ * entries as a result of speculation. Unusually, its also called in
+ * IRQ context (ghes_iounmap_irq) so if we ever need to use IPIs for
+ * TLB broadcasting, then we're in trouble here.
+ */
+static inline void arch_apei_flush_tlb_one(unsigned long addr)
+{
+ flush_tlb_kernel_range(addr, addr + PAGE_SIZE);
+}
+#endif /* CONFIG_ACPI_APEI */
#ifdef CONFIG_ACPI_NUMA
int arm64_acpi_numa_init(void);
diff --git a/arch/x86/kernel/acpi/apei.c b/arch/x86/kernel/acpi/apei.c
index c280df6..ea3046e 100644
--- a/arch/x86/kernel/acpi/apei.c
+++ b/arch/x86/kernel/acpi/apei.c
@@ -24,9 +24,6 @@ int arch_apei_enable_cmcff(struct acpi_hest_header *hest_hdr, void *data)
struct acpi_hest_ia_corrected *cmc;
struct acpi_hest_ia_error_bank *mc_bank;
- if (hest_hdr->type != ACPI_HEST_TYPE_IA32_CORRECTED_CHECK)
- return 0;
-
cmc = (struct acpi_hest_ia_corrected *)hest_hdr;
if (!cmc->enabled)
return 0;
diff --git a/drivers/acpi/apei/hest.c b/drivers/acpi/apei/hest.c
index 20b3fcf..8f2a98e 100644
--- a/drivers/acpi/apei/hest.c
+++ b/drivers/acpi/apei/hest.c
@@ -123,7 +123,13 @@ EXPORT_SYMBOL_GPL(apei_hest_parse);
*/
static int __init hest_parse_cmc(struct acpi_hest_header *hest_hdr, void *data)
{
- return arch_apei_enable_cmcff(hest_hdr, data);
+ if (hest_hdr->type != ACPI_HEST_TYPE_IA32_CORRECTED_CHECK)
+ return 0;
+
+ if (!acpi_disable_cmcff)
+ return !arch_apei_enable_cmcff(hest_hdr, data);
+
+ return 0;
}
struct ghes_arr {
@@ -232,8 +238,9 @@ void __init acpi_hest_init(void)
goto err;
}
- if (!acpi_disable_cmcff)
- apei_hest_parse(hest_parse_cmc, NULL);
+ rc = apei_hest_parse(hest_parse_cmc, NULL);
+ if (rc)
+ goto err;
if (!ghes_disable) {
rc = apei_hest_parse(hest_parse_ghes_count, &ghes_count);
--
2.9.3
^ permalink raw reply related
* [PATCH V1 1/2] PCI: thunder: Enable ACPI PCI controller for ThunderX pass2.x silicon version
From: Robert Richter @ 2016-12-01 13:55 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <eba92ea8-bdab-9a3a-7b18-caaeac15db5d@semihalf.com>
Tomasz, Bjorn,
On 01.12.16 09:49:51, Tomasz Nowicki wrote:
> I put the picture together here (on top of your pci/ecam branch):
> [1] https://github.com/semihalf-nowicki-tomasz/linux/commits/pci-quirks-thunderx-v2
please note that acpi_* functions must be protected with acpi_disabled
or something else to make sure an acpi enabled kernel does not break
dt. See the crash below with above branch.
-Robert
[ 12.493028] Unable to handle kernel NULL pointer dereference at virtual address 00000018
[ 12.501113] pgd = ffff0000090a0000
[ 12.504511] [00000018] *pgd=0000010fffef0003[ 12.508602] , *pud=0000010fffef0003
, *pmd=0000010fffee0003[ 12.514093] , *pte=0000000000000000
[ 12.517575]
[ 12.519064] Internal error: Oops: 96000005 [#1] SMP
[ 12.523933] Modules linked in:
[ 12.526987] CPU: 73 PID: 1 Comm: swapper/0 Tainted: G W 4.9.0-rc6.0.vanilla10-00019-g09abd2b6bbeb #135
[ 12.537409] Hardware name: Cavium ThunderX CRB/To be filled by O.E.M., BIOS 5.11 12/12/2012
[ 12.545748] task: ffff800fe85b8000 task.stack: ffff800ff4288000
[ 12.551674] PC is at acpi_ns_walk_namespace+0x68/0x1d4
[ 12.556803] LR is at acpi_get_devices+0x6c/0x94
...
[ 13.124920] [<ffff0000084dc5a0>] acpi_ns_walk_namespace+0x68/0x1d4
[ 13.131090] [<ffff0000084dcadc>] acpi_get_devices+0x6c/0x94
[ 13.136663] [<ffff0000084c0aec>] acpi_resource_consumer+0x34/0x44
[ 13.142752] [<ffff000008496bc0>] pci_ecam_create+0x80/0x228
[ 13.148314] [<ffff000008498e64>] pci_host_common_probe+0x294/0x348
[ 13.154486] [<ffff00000849bf3c>] thunder_ecam_probe+0x2c/0x38
[ 13.160226] [<ffff0000085880b8>] platform_drv_probe+0x60/0xc8
[ 13.165970] [<ffff000008585a04>] driver_probe_device+0x26c/0x420
[ 13.171966] [<ffff000008585cdc>] __driver_attach+0x124/0x128
[ 13.177615] [<ffff000008583238>] bus_for_each_dev+0x70/0xb0
[ 13.183177] [<ffff000008585060>] driver_attach+0x30/0x40
[ 13.188478] [<ffff000008584a98>] bus_add_driver+0x200/0x2b8
[ 13.194041] [<ffff000008586860>] driver_register+0x68/0x100
[ 13.199602] [<ffff000008587fdc>] __platform_driver_register+0x54/0x60
[ 13.206038] [<ffff000008c39b98>] thunder_ecam_driver_init+0x18/0x20
[ 13.212296] [<ffff000008082d94>] do_one_initcall+0x44/0x138
[ 13.217862] [<ffff000008c00d0c>] kernel_init_freeable+0x1ac/0x24c
[ 13.223950] [<ffff0000088605f0>] kernel_init+0x18/0x110
[ 13.229165] [<ffff000008082b30>] ret_from_fork+0x10/0x20
^ permalink raw reply
* [PATCH v2 3/3] ARM: dts: da850: Add node for pullup/pulldown pinconf
From: Sekhar Nori @ 2016-12-01 14:03 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CACRpkdZOxZRRUGkso_b0hLta4OWkeAgX2khcJxFc8EETFKiiXw@mail.gmail.com>
On Wednesday 30 November 2016 06:31 PM, Linus Walleij wrote:
> On Mon, Nov 28, 2016 at 5:40 PM, David Lechner <david@lechnology.com> wrote:
>
>> This SoC has a separate pin controller for configuring pullup/pulldown
>> bias on groups of pins.
>>
>> Signed-off-by: David Lechner <david@lechnology.com>
>> ---
>>
>> v2 changes:
>> * Moved pin-controller at 22c00c device node after gpio at 226000 (there seem to be
>> more nodes in proper order here compared to the i2c at 228000 node suggested by
>> Sekhar)
>
> Acked-by: Linus Walleij <linus.walleij@linaro.org>
>
> Take this through the ARM SoC tree.
Thanks Linus! Applied to v4.10/dt
Thanks,
Sekhar
^ permalink raw reply
* [PATCH] ARM: dts: da850: enable high speed for mmc
From: Axel Haslam @ 2016-12-01 14:10 UTC (permalink / raw)
To: linux-arm-kernel
The mmc controller in da850 supports high speed modes
so add cap-sd-highspeed and cap-mmc-highspeed.
Signed-off-by: Axel Haslam <ahaslam@baylibre.com>
---
arch/arm/boot/dts/da850.dtsi | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/da850.dtsi b/arch/arm/boot/dts/da850.dtsi
index ffc6e1a..0bfb1c0 100644
--- a/arch/arm/boot/dts/da850.dtsi
+++ b/arch/arm/boot/dts/da850.dtsi
@@ -316,6 +316,8 @@
mmc0: mmc at 40000 {
compatible = "ti,da830-mmc";
reg = <0x40000 0x1000>;
+ cap-sd-highspeed;
+ cap-mmc-highspeed;
interrupts = <16>;
dmas = <&edma0 16 0>, <&edma0 17 0>;
dma-names = "rx", "tx";
@@ -324,6 +326,8 @@
mmc1: mmc at 21b000 {
compatible = "ti,da830-mmc";
reg = <0x21b000 0x1000>;
+ cap-sd-highspeed;
+ cap-mmc-highspeed;
interrupts = <72>;
dmas = <&edma1 28 0>, <&edma1 29 0>;
dma-names = "rx", "tx";
--
2.9.3
^ permalink raw reply related
* [PATCH] arm: kprobe: replace patch_lock to raw lock
From: Sebastian Andrzej Siewior @ 2016-12-01 14:11 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1478823475-15087-1-git-send-email-yang.shi@linaro.org>
On 2016-11-10 16:17:55 [-0800], Yang Shi wrote:
>
> Since patch_text_stop_machine() is called in stop_machine() which disables IRQ,
> sleepable lock should be not used in this atomic context, so replace patch_lock
> to raw lock.
I am taking this one. Thank you.
We have jump_labels() deactivated on ARM because stop_machine() may
cause latencies at runtime. kprobe and kgdb is used by the user on
purpose (and not because he changed some sched setting) I think we are
fine. I am going to document this.
> Signed-off-by: Yang Shi <yang.shi@linaro.org>
Sebastian
^ permalink raw reply
* [PATCH] arm: kprobe: replace patch_lock to raw lock
From: Sebastian Andrzej Siewior @ 2016-12-01 14:13 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1478823475-15087-1-git-send-email-yang.shi@linaro.org>
On 2016-11-10 16:17:55 [-0800], Yang Shi wrote:
>
> Since patch_text_stop_machine() is called in stop_machine() which disables IRQ,
> sleepable lock should be not used in this atomic context, so replace patch_lock
> to raw lock.
>
> Signed-off-by: Yang Shi <yang.shi@linaro.org>
This can also go upstream.
Acked-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Sebastian
^ permalink raw reply
* [PATCH v2] ARM: davinci: da8xx: Fix sleeping function called from invalid context
From: Sekhar Nori @ 2016-12-01 14:17 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1480438111-11801-1-git-send-email-abailon@baylibre.com>
On Tuesday 29 November 2016 10:18 PM, Alexandre Bailon wrote:
> Everytime the usb20 phy is enabled, there is a
> "sleeping function called from invalid context" BUG.
>
> clk_enable() from arch/arm/mach-davinci/clock.c uses spin_lock_irqsave()
> before to invoke the callback usb20_phy_clk_enable().
"before invocation of the callback"? (doesn't read right otherwise)
> usb20_phy_clk_enable() uses clk_get() and clk_enable_prepapre()
clk_prepare_enable()
> which may sleep.
> Move clk_get() to da8xx_register_usb20_phy_clk() and
> replace clk_prepare_enable() by clk_enable().
>
> Signed-off-by: Alexandre Bailon <abailon@baylibre.com>
> @@ -287,9 +281,15 @@ int __init da8xx_register_usb20_phy_clk(bool use_usb_refclkin)
> struct clk *parent;
> int ret = 0;
>
> + usb20_clk = clk_get(&da8xx_usb20_dev.dev, "usb20");
> + if (IS_ERR(usb20_clk))
> + return PTR_ERR(parent);
Typo here. Should be PTR_ERR(usb20_clk)
Thanks,
Sekhar
^ permalink raw reply
* [PATCH] ARM: davinci_all_defconfig: Enable the da8xx usb otg
From: Sekhar Nori @ 2016-12-01 14:22 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1480350654-26284-1-git-send-email-abailon@baylibre.com>
On Monday 28 November 2016 10:00 PM, Alexandre Bailon wrote:
> The musb driver is enabled but the phy and the glue
> for the da8xx are not enabled.
> Enable them.
>
> Signed-off-by: Alexandre Bailon <abailon@baylibre.com>
Applied to v4.10/defconfig
Thanks,
Sekhar
^ permalink raw reply
* [PATCH 0/4] ARM, arm64: dts: Use usb-phy fallback bindings
From: Simon Horman @ 2016-12-01 14:25 UTC (permalink / raw)
To: linux-arm-kernel
Hi,
this short series makes use of fallback bindings for Renesas R-Car PHY
drivers in the DT of SoCs which already use those drivers.
Simon Horman (4):
ARM: dts: r8a7790: Use renesas,rcar-gen2-usb-phy fallback binding
ARM: dts: r8a7791: Use renesas,rcar-gen2-usb-phy fallback binding
ARM: dts: r8a7794: Use renesas,rcar-gen2-usb-phy fallback binding
arm64: dts: r8a7795: Use renesas,rcar-gen3-usb2-phy fallback binding
arch/arm/boot/dts/r8a7790.dtsi | 3 ++-
arch/arm/boot/dts/r8a7791.dtsi | 3 ++-
arch/arm/boot/dts/r8a7794.dtsi | 3 ++-
arch/arm64/boot/dts/renesas/r8a7795.dtsi | 9 ++++++---
4 files changed, 12 insertions(+), 6 deletions(-)
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply
* [PATCH 1/4] ARM: dts: r8a7790: Use renesas, rcar-gen2-usb-phy fallback binding
From: Simon Horman @ 2016-12-01 14:25 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1480602354-1446-1-git-send-email-horms+renesas@verge.net.au>
A fallback binding for the Renesas R-Car Gen2 PHY driver was
added by commit 7777cb8ba08d ("phy: rcar-gen2: add fallback binding").
This patch makes use of this binding in the DT for the r8a7790 SoC.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7790.dtsi | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index f554ef3c8096..38111bddbd05 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -883,7 +883,8 @@
};
usbphy: usb-phy at e6590100 {
- compatible = "renesas,usb-phy-r8a7790";
+ compatible = "renesas,usb-phy-r8a7790",
+ "renesas,rcar-gen2-usb-phy";
reg = <0 0xe6590100 0 0x100>;
#address-cells = <1>;
#size-cells = <0>;
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related
* [PATCH 2/4] ARM: dts: r8a7791: Use renesas, rcar-gen2-usb-phy fallback binding
From: Simon Horman @ 2016-12-01 14:25 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1480602354-1446-1-git-send-email-horms+renesas@verge.net.au>
A fallback binding for the Renesas R-Car Gen2 PHY driver was
added by commit 7777cb8ba08d ("phy: rcar-gen2: add fallback binding").
This patch makes use of this binding in the DT for the r8a7791 SoC.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7791.dtsi | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index 4c50de2faef1..a14f0ae8c8dd 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -934,7 +934,8 @@
};
usbphy: usb-phy at e6590100 {
- compatible = "renesas,usb-phy-r8a7791";
+ compatible = "renesas,usb-phy-r8a7791",
+ "renesas,rcar-gen2-usb-phy";
reg = <0 0xe6590100 0 0x100>;
#address-cells = <1>;
#size-cells = <0>;
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related
* [PATCH 3/4] ARM: dts: r8a7794: Use renesas, rcar-gen2-usb-phy fallback binding
From: Simon Horman @ 2016-12-01 14:25 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1480602354-1446-1-git-send-email-horms+renesas@verge.net.au>
A fallback binding for the Renesas R-Car Gen2 PHY driver was
added by commit 7777cb8ba08d ("phy: rcar-gen2: add fallback binding").
This patch makes use of this binding in the DT for the r8a7794 SoC.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7794.dtsi | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
index 63dc7f29d216..5caa8b9181d8 100644
--- a/arch/arm/boot/dts/r8a7794.dtsi
+++ b/arch/arm/boot/dts/r8a7794.dtsi
@@ -878,7 +878,8 @@
};
usbphy: usb-phy at e6590100 {
- compatible = "renesas,usb-phy-r8a7794";
+ compatible = "renesas,usb-phy-r8a7794",
+ "renesas,rcar-gen2-usb-phy";
reg = <0 0xe6590100 0 0x100>;
#address-cells = <1>;
#size-cells = <0>;
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related
* [PATCH 4/4] arm64: dts: r8a7795: Use renesas, rcar-gen3-usb2-phy fallback binding
From: Simon Horman @ 2016-12-01 14:25 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1480602354-1446-1-git-send-email-horms+renesas@verge.net.au>
A fallback binding for the Renesas R-Car Gen3 for USB2.0 PHY driver was
added by commit cde7bc367f09 ("phy: rcar-gen3-usb2: add fallback binding").
This patch makes use of this binding in the DT for the r8a7795 SoC.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a7795.dtsi | 9 ++++++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index a39a702b904d..080f1f422cfc 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -1141,7 +1141,8 @@
};
usb2_phy0: usb-phy at ee080200 {
- compatible = "renesas,usb2-phy-r8a7795";
+ compatible = "renesas,usb2-phy-r8a7795",
+ "renesas,rcar-gen3-usb2-phy";
reg = <0 0xee080200 0 0x700>;
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 703>;
@@ -1151,7 +1152,8 @@
};
usb2_phy1: usb-phy at ee0a0200 {
- compatible = "renesas,usb2-phy-r8a7795";
+ compatible = "renesas,usb2-phy-r8a7795",
+ "renesas,rcar-gen3-usb2-phy";
reg = <0 0xee0a0200 0 0x700>;
clocks = <&cpg CPG_MOD 702>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
@@ -1160,7 +1162,8 @@
};
usb2_phy2: usb-phy at ee0c0200 {
- compatible = "renesas,usb2-phy-r8a7795";
+ compatible = "renesas,usb2-phy-r8a7795",
+ "renesas,rcar-gen3-usb2-phy";
reg = <0 0xee0c0200 0 0x700>;
clocks = <&cpg CPG_MOD 701>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related
* [RFC PATCH v2 4/8] arm64: compat: Add a 32-bit vDSO
From: Kevin Brodsky @ 2016-12-01 14:27 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161121184414.GC28723@e104818-lin.cambridge.arm.com>
On 21/11/16 18:44, Catalin Marinas wrote:
> On Mon, Nov 21, 2016 at 03:45:55PM +0000, Kevin Brodsky wrote:
>> On 04/11/16 20:03, Catalin Marinas wrote:
>>> On Fri, Oct 28, 2016 at 11:20:07AM +0100, Kevin Brodsky wrote:
>>>> On 28/10/16 04:09, Jisheng Zhang wrote:
>>>>> On Thu, 27 Oct 2016 17:30:54 +0100 Kevin Brodsky wrote:
>>>>>> +# Force -O2 to avoid libgcc dependencies
>>>>>> +VDSO_CFLAGS := -march=armv8-a -O2
>>>>> For completeness, bringing 32bit compiler need to check whether the 32bit
>>>>> toolchain support some options. IIRC, armv8-a support isn't enabled until
>>>>> gcc 4.8, so old toolchains such gcc-4.7 will complain:
>>>>> error: unrecognized argument in option ?-march=armv8-a?
>>>> That's a fair point. I guess -march=armv8-a is not strictly necessary and
>>>> the produced vDSO should be fine if arch/arm/vdso also compiles fine.
>>>> However we would still need to pass -march=armv7-a. I'm not sure what to do
>>>> between:
>>>> * Checking that the compiler supports -march=armv8-a when inspecting
>>>> CROSS_COMPILE_ARM32, and if it doesn't vdso32 will not be built.
>>>> * Checking whether -march=armv8-a is available here, and if it is not fall
>>>> back to -march=armv7-a.
>>> Does v8 vs v7 make any difference in the generated code? If not, we
>>> could just stick to armv7-a permanently.
>> I've just tried compiling with -march=armv7-a, and in fact it doesn't
>> compile at all. It turns out vgettimeofday.c uses smp_rmb(), which expands
>> to dmb ishld on arm64, and ishld doesn't exist in ARMv7. We could possibly
>> work around that, but I think requiring GCC 4.8 is reasonable.
> Since vgettimeofday.c is meant to be compiled for AArch32, it wouldn't
> look too bad to define its own barriers rather than relying on the
> AArch64 ones. So you could define v7_smp_rmb/v7_smp_wmb and use them in
> this file. Alternatively, replace smp_rmb() with smp_mb() in this file
> but with a big comment about ARMv7 compilation requirement and "ishld"
> not being available.
Fair enough. I'll add AArch32 barrier macros and compile with -march=armv7-a if the
compiler doesn't support armv8-a. It's true that using arm64 barrier macros in 32-bit
code is a bit dodgy anyway.
Cheers,
Kevin
^ permalink raw reply
* [PATCH v2] USB: OHCI: ohci-s3c2410: remove useless functions
From: csmanjuvijay at gmail.com @ 2016-12-01 14:46 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1480542166-7032-1-git-send-email-csmanjuvijay@gmail.com>
From: Manjunath Goudar <csmanjuvijay@gmail.com>
The ohci_hcd_s3c2410_drv_probe and ohci_hcd_s3c2410_drv_remove
functions are removed as these are useless functions except calling
usb_hcd_s3c2410_probe and usb_hcd_s3c2410_remove functions.
The usb_hcd_s3c2410_probe function renamed to ohci_hcd_s3c2410_drv_probe
and usb_hcd_s3c2410_remove function renamed to ohci_hcd_s3c2410_drv_remove
for proper naming.
Signed-off-by: Manjunath Goudar <csmanjuvijay@gmail.com>
Cc: Kukjin Kim <kgene@kernel.org>
Cc: Krzysztof Kozlowski <krzk@kernel.org>
Cc: Javier Martinez Canillas <javier@osg.samsung.com>
Cc: Alan Stern <stern@rowland.harvard.edu>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: linux-arm-kernel at lists.infradead.org
Cc: linux-samsung-soc at vger.kernel.org
Cc: linux-usb at vger.kernel.org
Cc: linux-kernel at vger.kernel.org
---
Changelog v1 -> v2:
Removed checkpatch.pl warnings and errors cleanup code which is not related
to this patch.
drivers/usb/host/ohci-s3c2410.c | 39 ++++++++++++++-------------------------
1 file changed, 14 insertions(+), 25 deletions(-)
diff --git a/drivers/usb/host/ohci-s3c2410.c b/drivers/usb/host/ohci-s3c2410.c
index d8e03a8..b006b93 100644
--- a/drivers/usb/host/ohci-s3c2410.c
+++ b/drivers/usb/host/ohci-s3c2410.c
@@ -43,6 +43,8 @@ static const char hcd_name[] = "ohci-s3c2410";
static struct clk *clk;
static struct clk *usb_clk;
+static struct hc_driver __read_mostly ohci_s3c2410_hc_driver;
+
/* forward definitions */
static void s3c2410_hcd_oc(struct s3c2410_hcd_info *info, int port_oc);
@@ -321,26 +323,29 @@ static void s3c2410_hcd_oc(struct s3c2410_hcd_info *info, int port_oc)
/* may be called with controller, bus, and devices active */
/*
- * usb_hcd_s3c2410_remove - shutdown processing for HCD
+ * ohci_hcd_s3c2410_remove - shutdown processing for HCD
* @dev: USB Host Controller being removed
* Context: !in_interrupt()
*
- * Reverses the effect of usb_hcd_3c2410_probe(), first invoking
+ * Reverses the effect of ohci_hcd_3c2410_probe(), first invoking
* the HCD's stop() method. It is always called from a thread
* context, normally "rmmod", "apmd", or something similar.
*
*/
-static void
-usb_hcd_s3c2410_remove(struct usb_hcd *hcd, struct platform_device *dev)
+static int
+ohci_hcd_s3c2410_remove(struct platform_device *dev)
{
+ struct usb_hcd *hcd = platform_get_drvdata(dev);
+
usb_remove_hcd(hcd);
s3c2410_stop_hc(dev);
usb_put_hcd(hcd);
+ return 0;
}
/**
- * usb_hcd_s3c2410_probe - initialize S3C2410-based HCDs
+ * ohci_hcd_s3c2410_probe - initialize S3C2410-based HCDs
* Context: !in_interrupt()
*
* Allocates basic resources for this USB host controller, and
@@ -348,8 +353,7 @@ usb_hcd_s3c2410_remove(struct usb_hcd *hcd, struct platform_device *dev)
* through the hotplug entry's driver_data.
*
*/
-static int usb_hcd_s3c2410_probe(const struct hc_driver *driver,
- struct platform_device *dev)
+static int ohci_hcd_s3c2410_probe(struct platform_device *dev)
{
struct usb_hcd *hcd = NULL;
struct s3c2410_hcd_info *info = dev_get_platdata(&dev->dev);
@@ -358,7 +362,7 @@ static int usb_hcd_s3c2410_probe(const struct hc_driver *driver,
s3c2410_usb_set_power(info, 1, 1);
s3c2410_usb_set_power(info, 2, 1);
- hcd = usb_create_hcd(driver, &dev->dev, "s3c24xx");
+ hcd = usb_create_hcd(&ohci_s3c2410_hc_driver, &dev->dev, "s3c24xx");
if (hcd == NULL)
return -ENOMEM;
@@ -404,21 +408,6 @@ static int usb_hcd_s3c2410_probe(const struct hc_driver *driver,
/*-------------------------------------------------------------------------*/
-static struct hc_driver __read_mostly ohci_s3c2410_hc_driver;
-
-static int ohci_hcd_s3c2410_drv_probe(struct platform_device *pdev)
-{
- return usb_hcd_s3c2410_probe(&ohci_s3c2410_hc_driver, pdev);
-}
-
-static int ohci_hcd_s3c2410_drv_remove(struct platform_device *pdev)
-{
- struct usb_hcd *hcd = platform_get_drvdata(pdev);
-
- usb_hcd_s3c2410_remove(hcd, pdev);
- return 0;
-}
-
#ifdef CONFIG_PM
static int ohci_hcd_s3c2410_drv_suspend(struct device *dev)
{
@@ -465,8 +454,8 @@ static const struct of_device_id ohci_hcd_s3c2410_dt_ids[] = {
MODULE_DEVICE_TABLE(of, ohci_hcd_s3c2410_dt_ids);
static struct platform_driver ohci_hcd_s3c2410_driver = {
- .probe = ohci_hcd_s3c2410_drv_probe,
- .remove = ohci_hcd_s3c2410_drv_remove,
+ .probe = ohci_hcd_s3c2410_probe,
+ .remove = ohci_hcd_s3c2410_remove,
.shutdown = usb_hcd_platform_shutdown,
.driver = {
.name = "s3c2410-ohci",
--
2.7.4
^ permalink raw reply related
* [PATCH 0/4] ARM, arm64: dts: Use usb-phy fallback bindings
From: Geert Uytterhoeven @ 2016-12-01 14:47 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1480602354-1446-1-git-send-email-horms+renesas@verge.net.au>
On Thu, Dec 1, 2016 at 3:25 PM, Simon Horman <horms+renesas@verge.net.au> wrote:
> this short series makes use of fallback bindings for Renesas R-Car PHY
> drivers in the DT of SoCs which already use those drivers.
>
> Simon Horman (4):
> ARM: dts: r8a7790: Use renesas,rcar-gen2-usb-phy fallback binding
> ARM: dts: r8a7791: Use renesas,rcar-gen2-usb-phy fallback binding
> ARM: dts: r8a7794: Use renesas,rcar-gen2-usb-phy fallback binding
> arm64: dts: r8a7795: Use renesas,rcar-gen3-usb2-phy fallback binding
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply
* [PATCH V1 1/2] PCI: thunder: Enable ACPI PCI controller for ThunderX pass2.x silicon version
From: Lorenzo Pieralisi @ 2016-12-01 14:54 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161201135549.GP2213@rric.localdomain>
On Thu, Dec 01, 2016 at 02:55:49PM +0100, Robert Richter wrote:
> Tomasz, Bjorn,
>
> On 01.12.16 09:49:51, Tomasz Nowicki wrote:
> > I put the picture together here (on top of your pci/ecam branch):
> > [1] https://github.com/semihalf-nowicki-tomasz/linux/commits/pci-quirks-thunderx-v2
>
> please note that acpi_* functions must be protected with acpi_disabled
> or something else to make sure an acpi enabled kernel does not break
> dt. See the crash below with above branch.
You could use struct device.of_node, or just move the MCFG check to ACPI
code that probes the root bus in arm64 before calling pci_ecam_create()
which will save you some ifdeffery too while at it.
Lorenzo
> -Robert
>
> [ 12.493028] Unable to handle kernel NULL pointer dereference at virtual address 00000018
> [ 12.501113] pgd = ffff0000090a0000
> [ 12.504511] [00000018] *pgd=0000010fffef0003[ 12.508602] , *pud=0000010fffef0003
> , *pmd=0000010fffee0003[ 12.514093] , *pte=0000000000000000
> [ 12.517575]
> [ 12.519064] Internal error: Oops: 96000005 [#1] SMP
> [ 12.523933] Modules linked in:
> [ 12.526987] CPU: 73 PID: 1 Comm: swapper/0 Tainted: G W 4.9.0-rc6.0.vanilla10-00019-g09abd2b6bbeb #135
> [ 12.537409] Hardware name: Cavium ThunderX CRB/To be filled by O.E.M., BIOS 5.11 12/12/2012
> [ 12.545748] task: ffff800fe85b8000 task.stack: ffff800ff4288000
> [ 12.551674] PC is at acpi_ns_walk_namespace+0x68/0x1d4
> [ 12.556803] LR is at acpi_get_devices+0x6c/0x94
> ...
> [ 13.124920] [<ffff0000084dc5a0>] acpi_ns_walk_namespace+0x68/0x1d4
> [ 13.131090] [<ffff0000084dcadc>] acpi_get_devices+0x6c/0x94
> [ 13.136663] [<ffff0000084c0aec>] acpi_resource_consumer+0x34/0x44
> [ 13.142752] [<ffff000008496bc0>] pci_ecam_create+0x80/0x228
> [ 13.148314] [<ffff000008498e64>] pci_host_common_probe+0x294/0x348
> [ 13.154486] [<ffff00000849bf3c>] thunder_ecam_probe+0x2c/0x38
> [ 13.160226] [<ffff0000085880b8>] platform_drv_probe+0x60/0xc8
> [ 13.165970] [<ffff000008585a04>] driver_probe_device+0x26c/0x420
> [ 13.171966] [<ffff000008585cdc>] __driver_attach+0x124/0x128
> [ 13.177615] [<ffff000008583238>] bus_for_each_dev+0x70/0xb0
> [ 13.183177] [<ffff000008585060>] driver_attach+0x30/0x40
> [ 13.188478] [<ffff000008584a98>] bus_add_driver+0x200/0x2b8
> [ 13.194041] [<ffff000008586860>] driver_register+0x68/0x100
> [ 13.199602] [<ffff000008587fdc>] __platform_driver_register+0x54/0x60
> [ 13.206038] [<ffff000008c39b98>] thunder_ecam_driver_init+0x18/0x20
> [ 13.212296] [<ffff000008082d94>] do_one_initcall+0x44/0x138
> [ 13.217862] [<ffff000008c00d0c>] kernel_init_freeable+0x1ac/0x24c
> [ 13.223950] [<ffff0000088605f0>] kernel_init+0x18/0x110
> [ 13.229165] [<ffff000008082b30>] ret_from_fork+0x10/0x20
^ permalink raw reply
* [PATCH v2] ARM: davinci: da8xx: Fix sleeping function called from invalid context
From: Arnd Bergmann @ 2016-12-01 14:59 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <ed09fc5e-395a-5e72-4928-5e85cdc7f2c3@ti.com>
On Thursday, December 1, 2016 7:47:12 PM CET Sekhar Nori wrote:
>
> > @@ -287,9 +281,15 @@ int __init da8xx_register_usb20_phy_clk(bool use_usb_refclkin)
> > struct clk *parent;
> > int ret = 0;
> >
> > + usb20_clk = clk_get(&da8xx_usb20_dev.dev, "usb20");
> > + if (IS_ERR(usb20_clk))
> > + return PTR_ERR(parent);
>
> Typo here. Should be PTR_ERR(usb20_clk)
I found that doing
err = PTR_ERR_OR_ZERO(usb20_clk);
if (err)
return err;
is less error-prone and leads to better object code.
Arnd
^ permalink raw reply
* [PATCH/RFC] ARM64: use this_cpu_read in raw_smp_processor_id()
From: Marek Szyprowski @ 2016-12-01 15:00 UTC (permalink / raw)
To: linux-arm-kernel
Direct access to cpu_number entry in per-cpu variables causes boot
failure on Exynos5433, so replace it with this_cpu_read() macro.
This approach is also used on x86_64.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
---
This change is needed to get linux-next to boot on Exynos5433, otherwise it
hangs somewhere in early init. There is even no message on the earlycon.
This issue appeared first on linux-next from 14.11.2016. The tree from
11.11.2016 is the last one, which boots on Exynos5433. I've tried to
debug a bit this issue, but I ran out of ideas.
Any comments or suggestions are welcome.
Best regards
Marek Szyprowski
Samsung R&D Institute Poland
---
arch/arm64/include/asm/smp.h | 7 +------
1 file changed, 1 insertion(+), 6 deletions(-)
diff --git a/arch/arm64/include/asm/smp.h b/arch/arm64/include/asm/smp.h
index a62db952ffcb..d514383d6219 100644
--- a/arch/arm64/include/asm/smp.h
+++ b/arch/arm64/include/asm/smp.h
@@ -37,12 +37,7 @@
DECLARE_PER_CPU_READ_MOSTLY(int, cpu_number);
-/*
- * We don't use this_cpu_read(cpu_number) as that has implicit writes to
- * preempt_count, and associated (compiler) barriers, that we'd like to avoid
- * the expense of. If we're preemptible, the value can be stale at use anyway.
- */
-#define raw_smp_processor_id() (*this_cpu_ptr(&cpu_number))
+#define raw_smp_processor_id() (this_cpu_read(cpu_number))
struct seq_file;
--
1.9.1
^ permalink raw reply related
* [PATCH v3] PCI/ACPI: xgene: Add ECAM quirk for X-Gene PCIe controller
From: Mark Salter @ 2016-12-01 15:08 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1480549373-2123-1-git-send-email-dhdang@apm.com>
On Wed, 2016-11-30 at 15:42 -0800, Duc Dang wrote:
> PCIe controllers in X-Gene SoCs is not ECAM compliant: software
> needs to configure additional controller's register to address
> device at bus:dev:function.
>
> The quirk will only be applied for X-Gene PCIe MCFG table with
> OEM revison 1, 2, 3 or 4 (PCIe controller v1 and v2 on X-Gene SoCs).
>
> The quirk declares the X-Gene PCIe controller register space as 64KB
> fixed memory resource with name "PCIe CSR". This name will be showed
> next to the resource range in the output of "cat /proc/iomem".
>
> Signed-off-by: Duc Dang <dhdang@apm.com>
> ---
> v3:
> ? - Rebase on top of pci/ecam-v6 tree.
> ? - Use DEFINE_RES_MEM_NAMED to declare controller register space
> ? with name "PCIe CSR"
> v2:
> ? RFC v2: https://patchwork.ozlabs.org/patch/686846/
> v1:
> ? RFC v1: https://patchwork.kernel.org/patch/9337115/
>
> ?drivers/acpi/pci_mcfg.c??????|??31 ++++++++
> ?drivers/pci/host/pci-xgene.c | 165 ++++++++++++++++++++++++++++++++++++++++++-
> ?include/linux/pci-ecam.h?????|???7 ++
> ?3 files changed, 200 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/acpi/pci_mcfg.c b/drivers/acpi/pci_mcfg.c
> index ac21db3..eb6125b 100644
> --- a/drivers/acpi/pci_mcfg.c
> +++ b/drivers/acpi/pci_mcfg.c
> @@ -57,6 +57,37 @@ struct mcfg_fixup {
> ? { "QCOM??", "QDF2432 ", 1, 5, MCFG_BUS_ANY, &pci_32b_ops },
> ? { "QCOM??", "QDF2432 ", 1, 6, MCFG_BUS_ANY, &pci_32b_ops },
> ? { "QCOM??", "QDF2432 ", 1, 7, MCFG_BUS_ANY, &pci_32b_ops },
> +
> +#ifdef CONFIG_PCI_XGENE
> +#define XGENE_V1_ECAM_MCFG(rev, seg) \
> + {"APM???", "XGENE???", rev, seg, MCFG_BUS_ANY, \
> + &xgene_v1_pcie_ecam_ops }
> +#define XGENE_V2_1_ECAM_MCFG(rev, seg) \
> + {"APM???", "XGENE???", rev, seg, MCFG_BUS_ANY, \
> + &xgene_v2_1_pcie_ecam_ops }
> +#define XGENE_V2_2_ECAM_MCFG(rev, seg) \
> + {"APM???", "XGENE???", rev, seg, MCFG_BUS_ANY, \
> + &xgene_v2_2_pcie_ecam_ops }
> +
> + /* X-Gene SoC with v1 PCIe controller */
> + XGENE_V1_ECAM_MCFG(1, 0),
> + XGENE_V1_ECAM_MCFG(1, 1),
> + XGENE_V1_ECAM_MCFG(1, 2),
> + XGENE_V1_ECAM_MCFG(1, 3),
> + XGENE_V1_ECAM_MCFG(1, 4),
> + XGENE_V1_ECAM_MCFG(2, 0),
> + XGENE_V1_ECAM_MCFG(2, 1),
> + XGENE_V1_ECAM_MCFG(2, 2),
> + XGENE_V1_ECAM_MCFG(2, 3),
> + XGENE_V1_ECAM_MCFG(2, 4),
> + /* X-Gene SoC with v2.1 PCIe controller */
> + XGENE_V2_1_ECAM_MCFG(3, 0),
> + XGENE_V2_1_ECAM_MCFG(3, 1),
> + /* X-Gene SoC with v2.2 PCIe controller */
> + XGENE_V2_2_ECAM_MCFG(4, 0),
> + XGENE_V2_2_ECAM_MCFG(4, 1),
> + XGENE_V2_2_ECAM_MCFG(4, 2),
> +#endif
> ?};
> ?
> ?static char mcfg_oem_id[ACPI_OEM_ID_SIZE];
> diff --git a/drivers/pci/host/pci-xgene.c b/drivers/pci/host/pci-xgene.c
> index 1de23d7..43d7c69 100644
> --- a/drivers/pci/host/pci-xgene.c
> +++ b/drivers/pci/host/pci-xgene.c
> @@ -27,6 +27,8 @@
> ?#include <linux/of_irq.h>
> ?#include <linux/of_pci.h>
> ?#include <linux/pci.h>
> +#include <linux/pci-acpi.h>
> +#include <linux/pci-ecam.h>
> ?#include <linux/platform_device.h>
> ?#include <linux/slab.h>
> ?
> @@ -64,6 +66,7 @@
> ?/* PCIe IP version */
> ?#define XGENE_PCIE_IP_VER_UNKN 0
> ?#define XGENE_PCIE_IP_VER_1 1
> +#define XGENE_PCIE_IP_VER_2 2
> ?
> ?struct xgene_pcie_port {
> ? struct device_node *node;
> @@ -97,7 +100,15 @@ static inline u32 pcie_bar_low_val(u32 addr, u32 flags)
> ? */
> ?static void __iomem *xgene_pcie_get_cfg_base(struct pci_bus *bus)
> ?{
> - struct xgene_pcie_port *port = bus->sysdata;
> + struct pci_config_window *cfg;
> + struct xgene_pcie_port *port;
> +
> + if (acpi_disabled)
> + port = bus->sysdata;
> + else {
> + cfg = bus->sysdata;
> + port = cfg->priv;
> + }
> ?
> ? if (bus->number >= (bus->primary + 1))
> ? return port->cfg_base + AXI_EP_CFG_ACCESS;
> @@ -111,10 +122,18 @@ static void __iomem *xgene_pcie_get_cfg_base(struct pci_bus *bus)
> ? */
> ?static void xgene_pcie_set_rtdid_reg(struct pci_bus *bus, uint devfn)
> ?{
> - struct xgene_pcie_port *port = bus->sysdata;
> + struct pci_config_window *cfg;
> + struct xgene_pcie_port *port;
> ? unsigned int b, d, f;
> ? u32 rtdid_val = 0;
> ?
> + if (acpi_disabled)
> + port = bus->sysdata;
> + else {
> + cfg = bus->sysdata;
> + port = cfg->priv;
> + }
> +
> ? b = bus->number;
> ? d = PCI_SLOT(devfn);
> ? f = PCI_FUNC(devfn);
> @@ -158,7 +177,15 @@ static void __iomem *xgene_pcie_map_bus(struct pci_bus *bus, unsigned int devfn,
> ?static int xgene_pcie_config_read32(struct pci_bus *bus, unsigned int devfn,
> ? ????int where, int size, u32 *val)
> ?{
> - struct xgene_pcie_port *port = bus->sysdata;
> + struct pci_config_window *cfg;
> + struct xgene_pcie_port *port;
> +
> + if (acpi_disabled)
> + port = bus->sysdata;
> + else {
> + cfg = bus->sysdata;
> + port = cfg->priv;
> + }
> ?
> ? if (pci_generic_config_read32(bus, devfn, where & ~0x3, 4, val) !=
> ? ????PCIBIOS_SUCCESSFUL)
> @@ -189,6 +216,138 @@ static int xgene_pcie_config_read32(struct pci_bus *bus, unsigned int devfn,
> ? .write = pci_generic_config_write32,
> ?};
> ?
> +#ifdef CONFIG_ACPI
> +static struct resource xgene_v1_csr_res[] = {
> + [0] = DEFINE_RES_MEM_NAMED(0x1f2b0000UL, SZ_64K, "PCIe CSR"),
> + [1] = DEFINE_RES_MEM_NAMED(0x1f2c0000UL, SZ_64K, "PCIe CSR"),
> + [2] = DEFINE_RES_MEM_NAMED(0x1f2d0000UL, SZ_64K, "PCIe CSR"),
> + [3] = DEFINE_RES_MEM_NAMED(0x1f500000UL, SZ_64K, "PCIe CSR"),
> + [4] = DEFINE_RES_MEM_NAMED(0x1f510000UL, SZ_64K, "PCIe CSR"),
> +};
> +
> +static int xgene_v1_pcie_ecam_init(struct pci_config_window *cfg)
> +{
> + struct acpi_device *adev = to_acpi_device(cfg->parent);
> + struct acpi_pci_root *root = acpi_driver_data(adev);
> + struct device *dev = cfg->parent;
> + struct xgene_pcie_port *port;
> + struct resource *csr;
> +
> + port = devm_kzalloc(dev, sizeof(*port), GFP_KERNEL);
> + if (!port)
> + return -ENOMEM;
> +
> + csr = &xgene_v1_csr_res[root->segment];
This hard-coded assumption that segment N uses controller N breaks
for m400 where segment 0 is using controller 3.
> + port->csr_base = devm_ioremap_resource(dev, csr);
> + if (IS_ERR(port->csr_base)) {
> + kfree(port);
> + return -ENOMEM;
> + }
> +
> + port->cfg_base = cfg->win;
> + port->version = XGENE_PCIE_IP_VER_1;
> +
> + cfg->priv = port;
> +
> + return 0;
> +}
> +
> +struct pci_ecam_ops xgene_v1_pcie_ecam_ops = {
> + .bus_shift??????= 16,
> + .init???????????= xgene_v1_pcie_ecam_init,
> + .pci_ops????????= {
> + .map_bus????????= xgene_pcie_map_bus,
> + .read???????????= xgene_pcie_config_read32,
> + .write??????????= pci_generic_config_write,
> + }
> +};
> +
> +static struct resource xgene_v2_1_csr_res[] = {
> + [0] = DEFINE_RES_MEM_NAMED(0x1f2b0000UL, SZ_64K, "PCIe CSR"),
> + [1] = DEFINE_RES_MEM_NAMED(0x1f2c0000UL, SZ_64K, "PCIe CSR"),
> +};
> +
> +static int xgene_v2_1_pcie_ecam_init(struct pci_config_window *cfg)
> +{
> + struct acpi_device *adev = to_acpi_device(cfg->parent);
> + struct acpi_pci_root *root = acpi_driver_data(adev);
> + struct device *dev = cfg->parent;
> + struct xgene_pcie_port *port;
> + struct resource *csr;
> +
> + port = devm_kzalloc(dev, sizeof(*port), GFP_KERNEL);
> + if (!port)
> + return -ENOMEM;
> +
> + csr = &xgene_v2_1_csr_res[root->segment];
> + port->csr_base = devm_ioremap_resource(dev, csr);
> + if (IS_ERR(port->csr_base)) {
> + kfree(port);
> + return -ENOMEM;
> + }
> +
> + port->cfg_base = cfg->win;
> + port->version = XGENE_PCIE_IP_VER_2;
> +
> + cfg->priv = port;
> +
> + return 0;
> +}
> +
> +struct pci_ecam_ops xgene_v2_1_pcie_ecam_ops = {
> + .bus_shift??????= 16,
> + .init???????????= xgene_v2_1_pcie_ecam_init,
> + .pci_ops????????= {
> + .map_bus????????= xgene_pcie_map_bus,
> + .read???????????= xgene_pcie_config_read32,
> + .write??????????= pci_generic_config_write,
> + }
> +};
> +
> +static struct resource xgene_v2_2_csr_res[] = {
> + [0] = DEFINE_RES_MEM_NAMED(0x1f2b0000UL, SZ_64K, "PCIe CSR"),
> + [1] = DEFINE_RES_MEM_NAMED(0x1f500000UL, SZ_64K, "PCIe CSR"),
> + [2] = DEFINE_RES_MEM_NAMED(0x1f2d0000UL, SZ_64K, "PCIe CSR"),
> +};
> +
> +static int xgene_v2_2_pcie_ecam_init(struct pci_config_window *cfg)
> +{
> + struct acpi_device *adev = to_acpi_device(cfg->parent);
> + struct acpi_pci_root *root = acpi_driver_data(adev);
> + struct device *dev = cfg->parent;
> + struct xgene_pcie_port *port;
> + struct resource *csr;
> +
> + port = devm_kzalloc(dev, sizeof(*port), GFP_KERNEL);
> + if (!port)
> + return -ENOMEM;
> +
> + csr = &xgene_v2_2_csr_res[root->segment];
> + port->csr_base = devm_ioremap_resource(dev, csr);
> + if (IS_ERR(port->csr_base)) {
> + kfree(port);
> + return -ENOMEM;
> + }
> +
> + port->cfg_base = cfg->win;
> + port->version = XGENE_PCIE_IP_VER_2;
> +
> + cfg->priv = port;
> +
> + return 0;
> +}
> +
> +struct pci_ecam_ops xgene_v2_2_pcie_ecam_ops = {
> + .bus_shift??????= 16,
> + .init???????????= xgene_v2_2_pcie_ecam_init,
> + .pci_ops????????= {
> + .map_bus????????= xgene_pcie_map_bus,
> + .read???????????= xgene_pcie_config_read32,
> + .write??????????= pci_generic_config_write,
> + }
> +};
> +#endif
> +
> ?static u64 xgene_pcie_set_ib_mask(struct xgene_pcie_port *port, u32 addr,
> ? ??u32 flags, u64 size)
> ?{
> diff --git a/include/linux/pci-ecam.h b/include/linux/pci-ecam.h
> index f5740b7..47ab947 100644
> --- a/include/linux/pci-ecam.h
> +++ b/include/linux/pci-ecam.h
> @@ -62,6 +62,13 @@ void __iomem *pci_ecam_map_bus(struct pci_bus *bus, unsigned int devfn,
> ?/* ops for buggy ECAM that supports only 32-bit accesses */
> ?extern struct pci_ecam_ops pci_32b_ops;
> ?
> +/* ECAM ops for known quirks */
> +#ifdef CONFIG_PCI_XGENE
> +extern struct pci_ecam_ops xgene_v1_pcie_ecam_ops;
> +extern struct pci_ecam_ops xgene_v2_1_pcie_ecam_ops;
> +extern struct pci_ecam_ops xgene_v2_2_pcie_ecam_ops;
> +#endif
> +
> ?#ifdef CONFIG_PCI_HOST_GENERIC
> ?/* for DT-based PCI controllers that support ECAM */
> ?int pci_host_common_probe(struct platform_device *pdev,
^ permalink raw reply
* [PATCH] ARM: dts: orion5x: fix number of sata port for linkstation ls-gl
From: Roger Shimizu @ 2016-12-01 15:11 UTC (permalink / raw)
To: linux-arm-kernel
Bug report from Debian [0] shows there's minor changed model of
Linkstation LS-GL that uses the 2nd SATA port of the SoC.
So it's necessary to enable two SATA ports, though for that specific
model only the 2nd one is used.
[0] https://bugs.debian.org/845611
Fixes: b1742ffa9ddb ("ARM: dts: orion5x: add device tree for buffalo linkstation ls-gl")
Reported-by: Ryan Tandy <ryan@nardis.ca>
Tested-by: Ryan Tandy <ryan@nardis.ca>
Signed-off-by: Roger Shimizu <rogershimizu@gmail.com>
---
arch/arm/boot/dts/orion5x-linkstation-lsgl.dts | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/orion5x-linkstation-lsgl.dts b/arch/arm/boot/dts/orion5x-linkstation-lsgl.dts
index 1cf644b..51dc734 100644
--- a/arch/arm/boot/dts/orion5x-linkstation-lsgl.dts
+++ b/arch/arm/boot/dts/orion5x-linkstation-lsgl.dts
@@ -82,6 +82,10 @@
gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;
};
+&sata {
+ nr-ports = <2>;
+};
+
&ehci1 {
status = "okay";
};
--
2.10.2
^ permalink raw reply related
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