* [PATCH 3/3] ASoC: simple-card-utils: enable clocks/clock-names/clock-ranges
From: Stephen Boyd @ 2016-12-08 22:09 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <87zikbuezr.wl%kuninori.morimoto.gx@renesas.com>
On 12/05, Kuninori Morimoto wrote:
> From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
>
> Current simple-card is supporting this style for clocks
>
> sound {
> ...
> simple-audio-card,cpu {
> sound-dai = <&xxx>;
> clocks = <&cpu_clock>;
> };
> simple-audio-card,codec {
> sound-dai = <&xxx>;
> clocks = <&codec_clock>;
> };
> };
>
> Now, it can support this style too, because we can use
> devm_get_clk_from_child() now.
>
> sound {
> ...
> clocks = <&cpu_clock>, <&codec_clock>;
> clock-names = "cpu", "codec";
> clock-ranges;
> ...
> simple-audio-card,cpu {
> sound-dai = <&xxx>;
> };
> simple-audio-card,codec {
> sound-dai = <&xxx>;
> };
> };
>
> Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
I don't see any reason why we need this patch though. The binding
works as is, so supporting different styles doesn't seem like a
good idea to me. Let's just keep what we have? Even if a sub-node
like cpu or codec gets more than one element in the clocks list
property, we can make that work by passing a clock-name then
based on some sort of other knowledge.
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply
* [PATCH 0/3] clkdev: add devm_get_clk_from_child()
From: Stephen Boyd @ 2016-12-08 22:08 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <874m2jvtmw.wl%kuninori.morimoto.gx@renesas.com>
On 12/05, Kuninori Morimoto wrote:
>
> Hi Stephen
>
> This is v5 of "clkdev: add devm_of_clk_get()", but new series.
> I hope my understanding was correct with your idea.
Yes this looks good. Given that we're so close to the merge
window, perhaps I should just merge the first patch into clk-next
and then it will be ready for anyone who wants to use it? The
sound patches can be left up to others to handle.
>
> Kuninori Morimoto (3):
> 1) clkdev: add devm_get_clk_from_child()
> 2) ASoC: simple-card: use devm_get_clk_from_child()
> 3) ASoC: simple-card-utils: enable clocks/clock-names/clock-ranges
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply
* [PATCH v2 4/4] ARM: treewide: Replace uses of virt_to_phys with __pa_symbol
From: kbuild test robot @ 2016-12-08 21:49 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161208185933.13749-5-f.fainelli@gmail.com>
Hi Florian,
[auto build test ERROR on linus/master]
[also build test ERROR on v4.9-rc8]
[cannot apply to arm-soc/for-next next-20161208]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/Florian-Fainelli/ARM-Add-support-for-CONFIG_DEBUG_VIRTUAL/20161209-032753
config: arm-allmodconfig (attached as .config)
compiler: arm-linux-gnueabi-gcc (Debian 6.1.1-9) 6.1.1 20160705
reproduce:
wget https://git.kernel.org/cgit/linux/kernel/git/wfg/lkp-tests.git/plain/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
make.cross ARCH=arm
All error/warnings (new ones prefixed by >>):
arch/arm/mach-realview/platsmp-dt.c: In function 'realview_smp_prepare_cpus':
>> arch/arm/mach-realview/platsmp-dt.c:79:50: error: expected ')' before ';' token
__pa_symbol((versatile_secondary_startup));)
^
>> arch/arm/mach-realview/platsmp-dt.c:80:1: error: expected ';' before '}' token
}
^
--
In file included from arch/arm/include/asm/delay.h:9:0,
from include/linux/delay.h:14,
from arch/arm/mach-zx/platsmp.c:10:
arch/arm/mach-zx/platsmp.c: In function 'zx_smp_prepare_cpus':
>> arch/arm/mach-zx/platsmp.c:97:62: error: expected ')' before ';' token
zx_secondary_startup_pa = __pa_symbol((zx_secondary_startup);)
^
arch/arm/include/asm/memory.h:264:56: note: in definition of macro '__pa_symbol_nodebug'
#define __pa_symbol_nodebug(x) __virt_to_phys_nodebug((x))
^
arch/arm/include/asm/memory.h:296:25: note: in expansion of macro '__phys_addr_symbol'
#define __pa_symbol(x) __phys_addr_symbol(RELOC_HIDE((unsigned long)(x), 0))
^~~~~~~~~~~~~~~~~~
>> arch/arm/include/asm/memory.h:296:44: note: in expansion of macro 'RELOC_HIDE'
#define __pa_symbol(x) __phys_addr_symbol(RELOC_HIDE((unsigned long)(x), 0))
^~~~~~~~~~
>> arch/arm/mach-zx/platsmp.c:97:28: note: in expansion of macro '__pa_symbol'
zx_secondary_startup_pa = __pa_symbol((zx_secondary_startup);)
^~~~~~~~~~~
>> arch/arm/mach-zx/platsmp.c:97:62: error: expected ')' before ';' token
zx_secondary_startup_pa = __pa_symbol((zx_secondary_startup);)
^
arch/arm/include/asm/memory.h:264:56: note: in definition of macro '__pa_symbol_nodebug'
#define __pa_symbol_nodebug(x) __virt_to_phys_nodebug((x))
^
arch/arm/include/asm/memory.h:296:25: note: in expansion of macro '__phys_addr_symbol'
#define __pa_symbol(x) __phys_addr_symbol(RELOC_HIDE((unsigned long)(x), 0))
^~~~~~~~~~~~~~~~~~
>> arch/arm/include/asm/memory.h:296:44: note: in expansion of macro 'RELOC_HIDE'
#define __pa_symbol(x) __phys_addr_symbol(RELOC_HIDE((unsigned long)(x), 0))
^~~~~~~~~~
>> arch/arm/mach-zx/platsmp.c:97:28: note: in expansion of macro '__pa_symbol'
zx_secondary_startup_pa = __pa_symbol((zx_secondary_startup);)
^~~~~~~~~~~
In file included from arch/arm/mach-zx/platsmp.c:21:0:
>> arch/arm/include/asm/fncpy.h:71:39: error: expected expression before '{' token
#define fncpy(dest_buf, funcp, size) ({ \
^
>> arch/arm/mach-zx/platsmp.c:98:2: note: in expansion of macro 'fncpy'
fncpy(sys_iram, &zx_resume_jump, zx_suspend_iram_sz);
^~~~~
In file included from arch/arm/include/asm/delay.h:9:0,
from include/linux/delay.h:14,
from arch/arm/mach-zx/platsmp.c:10:
>> arch/arm/include/asm/memory.h:264:32: error: called object is not a function or function pointer
#define __pa_symbol_nodebug(x) __virt_to_phys_nodebug((x))
^
arch/arm/include/asm/memory.h:271:31: note: in expansion of macro '__pa_symbol_nodebug'
#define __phys_addr_symbol(x) __pa_symbol_nodebug(x)
^~~~~~~~~~~~~~~~~~~
arch/arm/include/asm/memory.h:296:25: note: in expansion of macro '__phys_addr_symbol'
#define __pa_symbol(x) __phys_addr_symbol(RELOC_HIDE((unsigned long)(x), 0))
^~~~~~~~~~~~~~~~~~
>> arch/arm/mach-zx/platsmp.c:97:28: note: in expansion of macro '__pa_symbol'
zx_secondary_startup_pa = __pa_symbol((zx_secondary_startup);)
^~~~~~~~~~~
vim +79 arch/arm/mach-realview/platsmp-dt.c
73 if (IS_ERR(map)) {
74 pr_err("PLATSMP: No syscon regmap\n");
75 return;
76 }
77 /* Put the boot address in this magic register */
78 regmap_write(map, REALVIEW_SYS_FLAGSSET_OFFSET,
> 79 __pa_symbol((versatile_secondary_startup));)
> 80 }
81
82 static const struct smp_operations realview_dt_smp_ops __initconst = {
83 .smp_prepare_cpus = realview_smp_prepare_cpus,
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
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^ permalink raw reply
* [PATCH] arm: ftrace: Adds support for CONFIG_DYNAMIC_FTRACE_WITH_REGS
From: Abel Vesa @ 2016-12-08 21:46 UTC (permalink / raw)
To: linux-arm-kernel
From: Jean-Jacques Hiblot <jjhiblot@traphandler.com>
From: Jean-Jacques Hiblot <jjhiblot@traphandler.com>
The DYNAMIC_FTRACE_WITH_REGS configuration makes it possible for a ftrace
operation to specify if registers need to saved/restored by the ftrace handler.
This is needed by kgraft and possibly other ftrace-based tools, and the ARM
architecture is currently lacking this feature. It would also be the first step
to support the "Kprobes-on-ftrace" optimization on ARM.
This patch introduces a new ftrace handler that stores the registers on the
stack before calling the next stage. The registers are restored from the stack
before going back to the instrumented function.
A side-effect of this patch is to activate the support for ftrace_modify_call()
as it defines ARCH_SUPPORTS_FTRACE_OPS for the ARM architecture
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@traphandler.com>
Signed-off-by: Abel Vesa <abelvesa@linux.com>
---
arch/arm/Kconfig | 2 ++
arch/arm/include/asm/ftrace.h | 4 +++
arch/arm/kernel/entry-ftrace.S | 78 ++++++++++++++++++++++++++++++++++++++++++
arch/arm/kernel/ftrace.c | 33 ++++++++++++++++++
4 files changed, 117 insertions(+)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index b5d529f..87f1a9f 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -50,6 +50,7 @@ config ARM
select HAVE_DMA_API_DEBUG
select HAVE_DMA_CONTIGUOUS if MMU
select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL) && !CPU_ENDIAN_BE32 && MMU
+ select HAVE_DYNAMIC_FTRACE_WITH_REGS if HAVE_DYNAMIC_FTRACE
select HAVE_EFFICIENT_UNALIGNED_ACCESS if (CPU_V6 || CPU_V6K || CPU_V7) && MMU
select HAVE_EXIT_THREAD
select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
@@ -90,6 +91,7 @@ config ARM
select PERF_USE_VMALLOC
select RTC_LIB
select SYS_SUPPORTS_APM_EMULATION
+ select FRAME_POINTER if DYNAMIC_FTRACE_WITH_REGS && FUNCTION_GRAPH_TRACER
# Above selects are sorted alphabetically; please add new ones
# according to that. Thanks.
help
diff --git a/arch/arm/include/asm/ftrace.h b/arch/arm/include/asm/ftrace.h
index bfe2a2f..f434ce9 100644
--- a/arch/arm/include/asm/ftrace.h
+++ b/arch/arm/include/asm/ftrace.h
@@ -1,6 +1,10 @@
#ifndef _ASM_ARM_FTRACE
#define _ASM_ARM_FTRACE
+#ifdef CONFIG_DYNAMIC_FTRACE_WITH_REGS
+#define ARCH_SUPPORTS_FTRACE_OPS 1
+#endif
+
#ifdef CONFIG_FUNCTION_TRACER
#define MCOUNT_ADDR ((unsigned long)(__gnu_mcount_nc))
#define MCOUNT_INSN_SIZE 4 /* sizeof mcount call */
diff --git a/arch/arm/kernel/entry-ftrace.S b/arch/arm/kernel/entry-ftrace.S
index c73c403..fd75bae 100644
--- a/arch/arm/kernel/entry-ftrace.S
+++ b/arch/arm/kernel/entry-ftrace.S
@@ -92,12 +92,73 @@
2: mcount_exit
.endm
+#ifdef CONFIG_DYNAMIC_FTRACE_WITH_REGS
+
+.macro __ftrace_regs_caller
+
+ add ip, sp, #4 @ move in IP the value of SP as it was
+ @ before the push {lr} of the mcount mechanism
+ stmdb sp!, {ip,lr,pc}
+ stmdb sp!, {r0-r11,lr}
+
+ @ stack content at this point:
+ @ 0 4 44 48 52 56 60 64
+ @ RO | R1 | ... | R11 | LR | SP + 4 | LR | PC | previous LR |
+
+ mov r3, sp @ struct pt_regs*
+ ldr r2, =function_trace_op
+ ldr r2, [r2] @ pointer to the current
+ @ function tracing op
+ ldr r1, [sp, #64] @ lr of instrumented func
+ mcount_adjust_addr r0, lr @ instrumented function
+
+ .globl ftrace_regs_call
+ftrace_regs_call:
+ bl ftrace_stub
+
+#ifdef CONFIG_FUNCTION_GRAPH_TRACER
+ .globl ftrace_graph_regs_call
+ftrace_graph_regs_call:
+ mov r0, r0
+#endif
+ ldr lr, [sp, #64] @ get the previous LR value from stack
+ ldmia sp, {r0-r11, ip, sp} @ pop the saved registers INCLUDING
+ @ the stack pointer
+ ret ip
+.endm
+
+#ifdef CONFIG_FUNCTION_GRAPH_TRACER
+.macro __ftrace_graph_regs_caller
+
+ sub r0, fp, #4 @ lr of instrumented routine (parent)
+
+ @ called from __ftrace_regs_caller
+ ldr r1, [sp, #56] @ instrumented routine (func)
+ mcount_adjust_addr r1, r1
+
+ mov r2, fp @ frame pointer
+ bl prepare_ftrace_return
+
+ ldr lr, [fp, #-4] @ restore lr from the stack
+ ldmia sp, {r0-r11, ip, sp} @ restore r0 through sp
+ ret ip
+.endm
+#endif
+#endif
+
.macro __ftrace_caller suffix
mcount_enter
mcount_get_lr r1 @ lr of instrumented func
mcount_adjust_addr r0, lr @ instrumented function
+#ifdef CONFIG_DYNAMIC_FTRACE_WITH_REGS
+ ldr r2, =function_trace_op
+ ldr r2, [r2] @ pointer to the current
+ @ function tracing op
+ mov r3, #0 @ regs is NULL
+#endif
+
.globl ftrace_call\suffix
ftrace_call\suffix:
bl ftrace_stub
@@ -212,6 +273,15 @@ UNWIND(.fnstart)
__ftrace_caller
UNWIND(.fnend)
ENDPROC(ftrace_caller)
+
+#ifdef CONFIG_DYNAMIC_FTRACE_WITH_REGS
+ENTRY(ftrace_regs_caller)
+UNWIND(.fnstart)
+ __ftrace_regs_caller
+UNWIND(.fnend)
+ENDPROC(ftrace_regs_caller)
+#endif
+
#endif
#ifdef CONFIG_FUNCTION_GRAPH_TRACER
@@ -220,6 +290,14 @@ UNWIND(.fnstart)
__ftrace_graph_caller
UNWIND(.fnend)
ENDPROC(ftrace_graph_caller)
+
+#ifdef CONFIG_DYNAMIC_FTRACE_WITH_REGS
+ENTRY(ftrace_graph_regs_caller)
+UNWIND(.fnstart)
+ __ftrace_graph_regs_caller
+UNWIND(.fnend)
+ENDPROC(ftrace_graph_regs_caller)
+#endif
#endif
.purgem mcount_enter
diff --git a/arch/arm/kernel/ftrace.c b/arch/arm/kernel/ftrace.c
index 3f17594..d8d4753 100644
--- a/arch/arm/kernel/ftrace.c
+++ b/arch/arm/kernel/ftrace.c
@@ -139,6 +139,15 @@ int ftrace_update_ftrace_func(ftrace_func_t func)
ret = ftrace_modify_code(pc, 0, new, false);
+#ifdef CONFIG_DYNAMIC_FTRACE_WITH_REGS
+ if (!ret) {
+ pc = (unsigned long)&ftrace_regs_call;
+ new = ftrace_call_replace(pc, (unsigned long)func);
+
+ ret = ftrace_modify_code(pc, 0, new, false);
+ }
+#endif
+
#ifdef CONFIG_OLD_MCOUNT
if (!ret) {
pc = (unsigned long)&ftrace_call_old;
@@ -157,6 +166,20 @@ int ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr)
unsigned long ip = rec->ip;
old = ftrace_nop_replace(rec);
+
+ new = ftrace_call_replace(ip, adjust_address(rec, addr));
+
+ return ftrace_modify_code(rec->ip, old, new, true);
+}
+
+int ftrace_modify_call(struct dyn_ftrace *rec, unsigned long old_addr,
+ unsigned long addr)
+{
+ unsigned long new, old;
+ unsigned long ip = rec->ip;
+
+ old = ftrace_call_replace(ip, adjust_address(rec, old_addr));
+
new = ftrace_call_replace(ip, adjust_address(rec, addr));
return ftrace_modify_code(rec->ip, old, new, true);
@@ -229,6 +252,8 @@ void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr,
extern unsigned long ftrace_graph_call;
extern unsigned long ftrace_graph_call_old;
extern void ftrace_graph_caller_old(void);
+extern unsigned long ftrace_graph_regs_call;
+extern void ftrace_graph_regs_caller(void);
static int __ftrace_modify_caller(unsigned long *callsite,
void (*func) (void), bool enable)
@@ -251,6 +276,14 @@ static int ftrace_modify_graph_caller(bool enable)
ftrace_graph_caller,
enable);
+#ifdef CONFIG_DYNAMIC_FTRACE_WITH_REGS
+ if (!ret)
+ ret = __ftrace_modify_caller(&ftrace_graph_regs_call,
+ ftrace_graph_regs_caller,
+ enable);
+#endif
+
+
#ifdef CONFIG_OLD_MCOUNT
if (!ret)
ret = __ftrace_modify_caller(&ftrace_graph_call_old,
--
2.7.4
^ permalink raw reply related
* [PATCH pci/host-iproc] PCI: iproc: Allow more than slot 0 on PAXC
From: Andy Gospodarek @ 2016-12-08 21:30 UTC (permalink / raw)
To: linux-arm-kernel
The iproc host driver limits the number of slots that are available on
PAXC devices. Enforcing this limit prevents VFs from being created
beyond the first port. After this change it is possible to create VFs
associated with all four devices.
The first four devices below are the PFs and the next four are the newly
created VFs:
0008:01:00.0 Ethernet controller: Broadcom Limited Device 16cd
0008:01:00.1 Ethernet controller: Broadcom Limited Device 16cd
0008:01:00.2 Ethernet controller: Broadcom Limited Device 16cd
0008:01:00.3 Ethernet controller: Broadcom Limited Device 16cd
0008:01:00.4 Ethernet controller: Broadcom Limited BCM57304 NetXtreme-C Ethernet Virtual Function
0008:01:01.0 Ethernet controller: Broadcom Limited BCM57304 NetXtreme-C Ethernet Virtual Function
0008:01:01.4 Ethernet controller: Broadcom Limited BCM57304 NetXtreme-C Ethernet Virtual Function
0008:01:02.0 Ethernet controller: Broadcom Limited BCM57304 NetXtreme-C Ethernet Virtual Function
Based on the git history around 923c6bb1f641 ("PCI: iproc: Allow multiple
devices except on PAXC") and 943ebae781f5 ("PCI: iproc: Add PAXC interface
support") I expect there may be an unmentioned or unknown-to-me reason why this
code exists. I certainly cannot create and use VFs without some kind of change
around this space, so I would like to see the current limitation simply removed.
Fixes: 923c6bb1f641 ("PCI: iproc: Allow multiple devices except on PAXC")
Signed-off-by: Andy Gospodarek <gospo@broadcom.com>
---
drivers/pci/host/pcie-iproc.c | 8 --------
1 file changed, 8 deletions(-)
diff --git a/drivers/pci/host/pcie-iproc.c b/drivers/pci/host/pcie-iproc.c
index 3ebc025..9311826 100644
--- a/drivers/pci/host/pcie-iproc.c
+++ b/drivers/pci/host/pcie-iproc.c
@@ -477,14 +477,6 @@ static void __iomem *iproc_pcie_map_cfg_bus(struct pci_bus *bus,
return (pcie->base + offset);
}
- /*
- * PAXC is connected to an internally emulated EP within the SoC. It
- * allows only one device.
- */
- if (pcie->ep_is_internal)
- if (slot > 0)
- return NULL;
-
/* EP device access */
val = (busno << CFG_ADDR_BUS_NUM_SHIFT) |
(slot << CFG_ADDR_DEV_NUM_SHIFT) |
^ permalink raw reply related
* Odroid C2 crashes with Bad mode in Error handler detected on CPUx
From: Heinrich Schuchardt @ 2016-12-08 21:20 UTC (permalink / raw)
To: linux-arm-kernel
On Linux-Next 20160812 Hardkernel Ordroid C2 crashes reproducably with
errors like those listed below.
Same happened with 4.9.0-rc6-next-20161124
(cf. https://lkml.org/lkml/2016/11/26/63)
and v4.9-rc8.
The errors occur only under heavy CPU load like
git checkout linux-next
or building the kernel.
Could someone, please, give me a hint how to analyze the problem.
Best regards
Heinrich Schuchardt
[ 978.592628] CPU: 1 PID: 2240 Comm: git Not tainted
4.9.0-rc8-next-20161208-r002-arm64 #1
[ 978.600644] Hardware name: Hardkernel ODROID-C2 (DT)
[ 978.605561] task: ffff800070da7080 task.stack: ffff80007332c000
[ 978.611427] PC is at 0xffff8b9ed958
[ 978.614875] LR is at 0xaaaad12538d0
[ 978.618325] pc : [<0000ffff8b9ed958>] lr : [<0000aaaad12538d0>]
pstate: 80000000
[ 978.625655] sp : 0000ffffd0ea7c20
[ 978.628934] x29: 0000ffffd0ea7c20 x28: 0000000000000004
[ 978.634194] x27: 0000000000000000 x26: 0000aaaaead52414
[ 978.639455] x25: 0000ffffd0ea7c70 x24: 0000000000000004
[ 978.644717] x23: 0000ffffd0ea7d18 x22: 0000aaaad12b7000
[ 978.649978] x21: 0000000000000004 x20: 0000000000002722
[ 978.655239] x19: 0000000000002722 x18: 00000000000700d9
[ 978.660500] x17: 0000ffff8b9ed980 x16: 0000000000000000
[ 978.665762] x15: 0000000000052332 x14: 0000000000000008
[ 978.671023] x13: 5241574d5249465f x12: 454c55444f4d0a3b
[ 978.676284] x11: 0a3b29445f564552 x10: 5f455241574d5249
[ 978.681545] x9 : 465f353631324953 x8 : 0000000000000040
[ 978.686807] x7 : 465f454c55444f4d x6 : 0a3b29224c504722
[ 978.692068] x5 : 0000aaaad11af1c8 x4 : 0000ffffd0ea7ca0
[ 978.697329] x3 : 0000aaaaeb1189d8 x2 : 0000000000002722
[ 978.702590] x1 : 0000ffffd0ea7d18 x0 : 0000000000002722
[ 978.707851]
[ 978.709329] Internal error: Attempting to execute userspace memory:
8600000f [#1] PREEMPT SMP
[ 978.717771] Modules linked in: meson_rng rng_core iscsi_tcp
libiscsi_tcp libiscsi scsi_transport_iscsi ip_tables x_tables ipv6 realtek
[ 978.729762] CPU: 1 PID: 2240 Comm: git Not tainted
4.9.0-rc8-next-20161208-r002-arm64 #1
[ 978.737781] Hardware name: Hardkernel ODROID-C2 (DT)
[ 978.742698] task: ffff800070da7080 task.stack: ffff80007332c000
[ 978.748564] PC is at 0xaaaad12538d0
[ 978.752013] LR is at 0xaaaad12538d0
[ 978.755462] pc : [<0000aaaad12538d0>] lr : [<0000aaaad12538d0>]
pstate: 600003c5
[ 978.762793] sp : ffff80007332fec0
[ 978.766070] x29: 0000000000000000 x28: ffff800070da7080
[ 978.771332] x27: 0000000000000000 x26: 0000aaaaead52414
[ 978.776593] x25: 0000ffffd0ea7c70 x24: 0000000000000004
[ 978.781854] x23: 0000000080000000 x22: 0000ffff8b9ed958
[ 978.787116] x21: ffffffffffffffff x20: 000080006e534000
[ 978.792377] x19: 0000000000000000 x18: 0000000000000010
[ 978.797638] x17: 0000ffff8b9ed980 x16: 0000000000000000
[ 978.802899] x15: 0000000000000006 x14: ffff000088b1eabf
[ 978.808161] x13: ffff000008b1eacd x12: 0000000000000119
[ 978.813422] x11: 0000000000000002 x10: 000000000000011a
[ 978.818683] x9 : ffff80007332fb40 x8 : 00000000000acd0b
[ 978.823944] x7 : 0000000000000000 x6 : 000000000000014a
[ 978.829205] x5 : 00000000014b014a x4 : 0000000000000000
[ 978.834467] x3 : 0000000000000001 x2 : 000000000000014b
[ 978.839728] x1 : ffff800070da7080 x0 : 0000000000000000
[ 978.844989]
[ 978.846457] Process git (pid: 2240, stack limit = 0xffff80007332c000)
[ 978.852841] Stack: (0xffff80007332fec0 to 0xffff800073330000)
[ 978.858534] fec0: 0000000000002722 0000ffffd0ea7d18 0000000000002722
0000aaaaeb1189d8
[ 978.866296] fee0: 0000ffffd0ea7ca0 0000aaaad11af1c8 0a3b29224c504722
465f454c55444f4d
[ 978.874059] ff00: 0000000000000040 465f353631324953 5f455241574d5249
0a3b29445f564552
[ 978.881821] ff20: 454c55444f4d0a3b 5241574d5249465f 0000000000000008
0000000000052332
[ 978.889583] ff40: 0000000000000000 0000ffff8b9ed980 00000000000700d9
0000000000002722
[ 978.897345] ff60: 0000000000002722 0000000000000004 0000aaaad12b7000
0000ffffd0ea7d18
[ 978.905107] ff80: 0000000000000004 0000ffffd0ea7c70 0000aaaaead52414
0000000000000000
[ 978.912870] ffa0: 0000000000000004 0000ffffd0ea7c20 0000aaaad12538d0
0000ffffd0ea7c20
[ 978.920632] ffc0: 0000ffff8b9ed958 0000000080000000 0000000000000004
ffffffffffffffff
[ 978.928394] ffe0: 0000000000000000 0000000000000000 0000000000000000
0000000000000000
[ 978.936156] Call trace:
[ 978.938572] Exception stack(0xffff80007332fcf0 to 0xffff80007332fe20)
[ 978.944954] fce0: 0000000000000000
0001000000000000
[ 978.952717] fd00: ffff80007332fec0 0000aaaad12538d0 ffff800070e05320
0000000000000000
[ 978.960480] fd20: 0000000000000004 ffff000008aa9818 ffff800070da7080
000000000808540c
[ 978.968243] fd40: ffff80007332fd90 ffff0000080c87f8 ffff80007332fe40
ffff800070da7080
[ 978.976005] fd60: 0000000000000004 00000000000003c0 ffff80007332fe40
0000000000000004
[ 978.983767] fd80: 0000ffffd0ea7c70 0000aaaaead52414 0000000000000000
ffff800070da7080
[ 978.991529] fda0: 000000000000014b 0000000000000001 0000000000000000
00000000014b014a
[ 978.999292] fdc0: 000000000000014a 0000000000000000 00000000000acd0b
ffff80007332fb40
[ 979.007055] fde0: 000000000000011a 0000000000000002 0000000000000119
ffff000008b1eacd
[ 979.014817] fe00: ffff000088b1eabf 0000000000000006 0000000000000000
0000ffff8b9ed980
[ 979.022581] [<0000aaaad12538d0>] 0xaaaad12538d0
[ 979.027066] Code: aa1403e2 aa1703e1 2a1503e0 97fb0ffd (aa0003f3)
[ 979.033249] ---[ end trace e838c4fb0030772b ]---
[ 979.033826] Bad mode in Error handler detected on CPU0, code
0xbf000000 -- SError
[ 979.033834] CPU: 0 PID: 1096 Comm: rs:main Q:Reg Tainted: G D
4.9.0-rc8-next-20161208-r002-arm64 #1
[ 979.033836] Hardware name: Hardkernel ODROID-C2 (DT)
[ 979.033840] task: ffff800070d32580 task.stack: ffff800073b84000
[ 979.033845] PC is at 0xffff89a53ac0
[ 979.033846] LR is at 0xffff89a53aa0
[ 979.033848] pc : [<0000ffff89a53ac0>] lr : [<0000ffff89a53aa0>]
pstate: 80000000
[ 979.033849] sp : 0000ffff890270a0
[ 979.033853] x29: 0000ffff890270a0 x28: 0000ffff7c018850
[ 979.033856] x27: 0000000000000060 x26: 0000ffff800195c0
[ 979.033858] x25: 0000000000000090 x24: 0000ffff80000020
[ 979.033861] x23: 0000000000000110 x22: 0000ffff80027f20
[ 979.033865] x21: 0000ffff80000020 x20: 0000ffff80003f60
[ 979.033867] x19: 0000ffff80003ed0 x18: 0000000000000014
[ 979.033870] x17: 0000ffff89a55030 x16: 0000aaaacc0026d0
[ 979.033872] x15: 0000000000000014 x14: 000000000000003a
[ 979.033875] x13: 2032323732303030 x12: 3030303030303030
[ 979.033877] x11: 0000000000000001 x10: 0000ffff80028000
[ 979.033880] x9 : 0000ffff80000078 x8 : fffffffffffff000
[ 979.033883] x7 : 0000000000000fff x6 : 0000000000000001
[ 979.033885] x5 : 0000000000000111 x4 : 0000ffff80028020
[ 979.033887] x3 : 0000000000000115 x2 : 0000000000000088
[ 979.033890] x1 : 0000000000000011 x0 : 0000ffff80027f20
[ 979.033890]
[ 979.033905] Internal error: Attempting to execute userspace memory:
8600000f [#2] PREEMPT SMP
[ 979.033924] Modules linked in: meson_rng rng_core iscsi_tcp
libiscsi_tcp libiscsi scsi_transport_iscsi ip_tables x_tables ipv6 realtek
[ 979.033927] CPU: 0 PID: 1096 Comm: rs:main Q:Reg Tainted: G D
4.9.0-rc8-next-20161208-r002-arm64 #1
[ 979.033928] Hardware name: Hardkernel ODROID-C2 (DT)
[ 979.033929] task: ffff800070d32580 task.stack: ffff800073b84000
[ 979.033931] PC is at 0xffff89a53aa0
[ 979.033932] LR is at 0xffff89a53aa0
[ 979.033934] pc : [<0000ffff89a53aa0>] lr : [<0000ffff89a53aa0>]
pstate: 600003c5
[ 979.033935] sp : ffff800073b87ec0
[ 979.033938] x29: 0000000000000000 x28: ffff800070d32580
[ 979.033940] x27: 0000000000000060 x26: 0000ffff800195c0
[ 979.033942] x25: 0000000000000090 x24: 0000ffff80000020
[ 979.033945] x23: 0000000080000000 x22: 0000ffff89a53ac0
[ 979.033948] x21: ffffffffffffffff x20: 000080006e51f000
[ 979.033950] x19: 0000000000000000 x18: 0000000000000030
[ 979.033952] x17: 0000ffff89a55030 x16: 0000aaaacc0026d0
[ 979.033955] x15: 0000000000000010 x14: 00000000fffffff0
[ 979.033957] x13: ffff000008b20ee0 x12: ffff000008aacde0
[ 979.033960] x11: ffff000008aac000 x10: ffff000008b1e000
[ 979.033964] x9 : 0000000000000000 x8 : ffff800076f86318
[ 979.033967] x7 : 0000000000000000 x6 : 000000000000009e
[ 979.033969] x5 : 00000000009f009e x4 : 0000000000000000
[ 979.033971] x3 : 0000000000000000 x2 : 000000000000009f
[ 979.033974] x1 : ffff800070d32580 x0 : 0000000000000000
[ 979.033974]
[ 979.033976] Process rs:main Q:Reg (pid: 1096, stack limit =
0xffff800073b84000)
[ 979.033979] Stack: (0xffff800073b87ec0 to 0xffff800073b88000)
[ 979.033982] 7ec0: 0000ffff80027f20 0000000000000011 0000000000000088
0000000000000115
[ 979.033985] 7ee0: 0000ffff80028020 0000000000000111 0000000000000001
0000000000000fff
[ 979.033987] 7f00: fffffffffffff000 0000ffff80000078 0000ffff80028000
0000000000000001
[ 979.033990] 7f20: 3030303030303030 2032323732303030 000000000000003a
0000000000000014
[ 979.033993] 7f40: 0000aaaacc0026d0 0000ffff89a55030 0000000000000014
0000ffff80003ed0
[ 979.033996] 7f60: 0000ffff80003f60 0000ffff80000020 0000ffff80027f20
0000000000000110
[ 979.033999] 7f80: 0000ffff80000020 0000000000000090 0000ffff800195c0
0000000000000060
[ 979.034001] 7fa0: 0000ffff7c018850 0000ffff890270a0 0000ffff89a53aa0
0000ffff890270a0
[ 979.034004] 7fc0: 0000ffff89a53ac0 0000000080000000 0000ffff80028000
ffffffffffffffff
[ 979.034007] 7fe0: 0000000000000000 0000000000000000 ffffffffffffffff
ffffffffffffffff
[ 979.034009] Call trace:
[ 979.034012] Exception stack(0xffff800073b87cf0 to 0xffff800073b87e20)
[ 979.034014] 7ce0: 0000000000000000
0001000000000000
[ 979.034017] 7d00: ffff800073b87ec0 0000ffff89a53aa0 ffff8000738e35a0
0000000000000000
[ 979.034020] 7d20: 0000000000000004 ffff000008aa9818 ffff800070d32580
000000000808540c
[ 979.034023] 7d40: ffff800073b87d90 ffff0000080c87f8 ffff800073b87e40
ffff800070d32580
[ 979.034025] 7d60: 0000000000000004 00000000000003c0 ffff800073b87e40
0000ffff80000020
[ 979.034028] 7d80: 0000000000000090 0000ffff800195c0 0000000000000000
ffff800070d32580
[ 979.034030] 7da0: 000000000000009f 0000000000000000 0000000000000000
00000000009f009e
[ 979.034033] 7dc0: 000000000000009e 0000000000000000 ffff800076f86318
0000000000000000
[ 979.034037] 7de0: ffff000008b1e000 ffff000008aac000 ffff000008aacde0
ffff000008b20ee0
[ 979.034040] 7e00: 00000000fffffff0 0000000000000010 0000aaaacc0026d0
0000ffff89a55030
[ 979.034043] [<0000ffff89a53aa0>] 0xffff89a53aa0
[ 979.034047] Code: d1003ee1 aa1503e0 f90027a2 97fffb03 (aa0003f6)
[ 979.034053] ---[ end trace e838c4fb0030772c ]---
[ 979.035931] Bad mode in Error handler detected on CPU0, code
0xbf000000 -- SError
[ 979.035937] CPU: 0 PID: 1095 Comm: in:imklog Tainted: G D
4.9.0-rc8-next-20161208-r002-arm64 #1
[ 979.035938] Hardware name: Hardkernel ODROID-C2 (DT)
[ 979.035940] task: ffff800070e5f080 task.stack: ffff800071d6c000
[ 979.035942] PC is at 0xaaaacbfa3384
[ 979.035943] LR is at 0xaaaacbfa3360
[ 979.035945] pc : [<0000aaaacbfa3384>] lr : [<0000aaaacbfa3360>]
pstate: 80000000
[ 979.035946] sp : 0000ffff89406e40
[ 979.035949] x29: 0000ffff89406e40 x28: 0000ffff89407890
[ 979.035952] x27: 0000000000001f9f x26: 0000aaaacc002000
[ 979.035954] x25: 0000000000000000 x24: 0000aaaacbfdc870
[ 979.035957] x23: 0000aaaacc002000 x22: 0000aaaacc009a1c
[ 979.035959] x21: 0000aaaacc002000 x20: 0000000000000000
[ 979.035962] x19: 0000aaaae88c7e00 x18: 0000000000000014
[ 979.035964] x17: 0000ffff89bb5870 x16: 0000aaaacc002a70
[ 979.035967] x15: 0000000000000014 x14: 000000000000003a
[ 979.035969] x13: 2030303038323030 x12: 3866666666303030
[ 979.035972] x11: 30203a3031782031 x10: 3030303030303030
[ 979.035976] x9 : 0000000000000000 x8 : 0000ffff894288a0
[ 979.035978] x7 : 0000ffff894281b0 x6 : 0000ffff894282b8
[ 979.035981] x5 : 00000000000186a0 x4 : 0000ffff89829010
[ 979.035983] x3 : 00000000000001fe x2 : 0000000000000001
[ 979.035985] x1 : 000000000000005c x0 : 0000aaaae88c7e20
[ 979.035986]
[ 979.035996] Internal error: Attempting to execute userspace memory:
8600000f [#3] PREEMPT SMP
[ 979.036009] Modules linked in: meson_rng rng_core iscsi_tcp
libiscsi_tcp libiscsi scsi_transport_iscsi ip_tables x_tables ipv6 realtek
[ 979.036011] CPU: 0 PID: 1095 Comm: in:imklog Tainted: G D
4.9.0-rc8-next-20161208-r002-arm64 #1
[ 979.036012] Hardware name: Hardkernel ODROID-C2 (DT)
[ 979.036014] task: ffff800070e5f080 task.stack: ffff800071d6c000
[ 979.036015] PC is at 0xaaaacbfa3360
[ 979.036017] LR is at 0xaaaacbfa3360
[ 979.036018] pc : [<0000aaaacbfa3360>] lr : [<0000aaaacbfa3360>]
pstate: 600003c5
[ 979.036019] sp : ffff800071d6fec0
[ 979.036022] x29: 0000000000000000 x28: ffff800070e5f080
[ 979.036024] x27: 0000000000001f9f x26: 0000aaaacc002000
[ 979.036027] x25: 0000000000000000 x24: 0000aaaacbfdc870
[ 979.036030] x23: 0000000080000000 x22: 0000aaaacbfa3384
[ 979.036032] x21: ffffffffffffffff x20: 000080006e51f000
[ 979.036035] x19: 0000000000000000 x18: 0000000000000030
[ 979.036037] x17: 0000ffff89bb5870 x16: 0000aaaacc002a70
[ 979.036040] x15: 0000000000000010 x14: 00000000fffffff0
[ 979.036042] x13: ffff000008b20ee0 x12: ffff000008aacde0
[ 979.036047] x11: ffff000008aac000 x10: ffff000008b1e000
[ 979.036049] x9 : 0000000000000000 x8 : ffff800076f877dc
[ 979.036052] x7 : 0000000000000000 x6 : 00000000000000a4
[ 979.036054] x5 : 0000000000a500a4 x4 : 0000000000000000
[ 979.036056] x3 : 0000000000000000 x2 : 00000000000000a5
[ 979.036058] x1 : ffff800070e5f080 x0 : 0000000000000000
[ 979.036059]
[ 979.036061] Process in:imklog (pid: 1095, stack limit =
0xffff800071d6c000)
[ 979.036063] Stack: (0xffff800071d6fec0 to 0xffff800071d70000)
[ 979.036066] fec0: 0000aaaae88c7e20 000000000000005c 0000000000000001
00000000000001fe
[ 979.036069] fee0: 0000ffff89829010 00000000000186a0 0000ffff894282b8
0000ffff894281b0
[ 979.036072] ff00: 0000ffff894288a0 0000000000000000 3030303030303030
30203a3031782031
[ 979.036075] ff20: 3866666666303030 2030303038323030 000000000000003a
0000000000000014
[ 979.036078] ff40: 0000aaaacc002a70 0000ffff89bb5870 0000000000000014
0000aaaae88c7e00
[ 979.036081] ff60: 0000000000000000 0000aaaacc002000 0000aaaacc009a1c
0000aaaacc002000
[ 979.036084] ff80: 0000aaaacbfdc870 0000000000000000 0000aaaacc002000
0000000000001f9f
[ 979.036087] ffa0: 0000ffff89407890 0000ffff89406e40 0000aaaacbfa3360
0000ffff89406e40
[ 979.036090] ffc0: 0000aaaacbfa3384 0000000080000000 0000000000000004
ffffffffffffffff
[ 979.036092] ffe0: 0000000000000000 0000000000000000 0000000000000000
0000000000000000
[ 979.036093] Call trace:
[ 979.036096] Exception stack(0xffff800071d6fcf0 to 0xffff800071d6fe20)
[ 979.036098] fce0: 0000000000000000
0001000000000000
[ 979.036101] fd00: ffff800071d6fec0 0000aaaacbfa3360 ffff8000738e35a0
0000000000000000
[ 979.036104] fd20: 0000000000000004 ffff000008aa9818 ffff800070e5f080
000000000808540c
[ 979.036107] fd40: ffff800071d6fd90 ffff0000080c87f8 ffff800071d6fe40
ffff800070e5f080
[ 979.036110] fd60: 0000000000000004 00000000000003c0 ffff800071d6fe40
0000aaaacbfdc870
[ 979.036113] fd80: 0000000000000000 0000aaaacc002000 0000000000000000
ffff800070e5f080
[ 979.036116] fda0: 00000000000000a5 0000000000000000 0000000000000000
0000000000a500a4
[ 979.036118] fdc0: 00000000000000a4 0000000000000000 ffff800076f877dc
0000000000000000
[ 979.036122] fde0: ffff000008b1e000 ffff000008aac000 ffff000008aacde0
ffff000008b20ee0
[ 979.036126] fe00: 00000000fffffff0 0000000000000010 0000aaaacc002a70
0000ffff89bb5870
[ 979.036128] [<0000aaaacbfa3360>] 0xaaaacbfa3360
[ 979.036131] Code: f9406262 aa1303e0 f94017a1 d63f0040 (2a0003f4)
[ 979.036136] ---[ end trace e838c4fb0030772d ]---
[ 1009.980784] Bad mode in Error handler detected on CPU0, code
0xbf000000 -- SError
[ 1009.982634] CPU: 0 PID: 1148 Comm: iscsid Tainted: G D
4.9.0-rc8-next-20161208-r002-arm64 #1
[ 1009.992117] Hardware name: Hardkernel ODROID-C2 (DT)
[ 1009.997034] task: ffff800070e5b200 task.stack: ffff800071d10000
[ 1010.002900] PC is at 0xffffb1cae4f8
[ 1010.006347] LR is at 0xffffb1cae368
[ 1010.009797] pc : [<0000ffffb1cae4f8>] lr : [<0000ffffb1cae368>]
pstate: 00000000
[ 1010.017128] sp : 0000ffffd46cfa60
[ 1010.020406] x29: 0000ffffd46cfa60 x28: 0000aaaad0f76000
[ 1010.025666] x27: 0000aaaad0f76000 x26: 0000ffffb1e7f000
[ 1010.030928] x25: 0000ffffb1e7f000 x24: 0000000000000001
[ 1010.036189] x23: 0000000000010002 x22: 0000aaaad0f25000
[ 1010.041450] x21: 0000000000000002 x20: 0000ffffb1e76ff0
[ 1010.046711] x19: 0000000000000028 x18: 0000000000000000
[ 1010.051973] x17: 0000ffffb1cae330 x16: 0000000000000000
[ 1010.057234] x15: 0000000000000000 x14: 000000000000000c
[ 1010.062495] x13: 312e323931203a6c x12: 6174726f70202c31
[ 1010.067756] x11: 776f6e206c616e6f x10: 6974617265706f20
[ 1010.073018] x9 : 7369205d746c7561 x8 : 0000000000000065
[ 1010.078279] x7 : 000000000000007d x6 : 726874205d303632
[ 1010.083540] x5 : 0000000000000000 x4 : 0000000000000000
[ 1010.088801] x3 : 0000000000000000 x2 : 0000000000000000
[ 1010.094063] x1 : 0000ffffd46cfa90 x0 : 0000000000000000
[ 1010.099324]
[ 1010.100801] Internal error: Attempting to execute userspace memory:
8600000f [#4] PREEMPT SMP
[ 1010.109243] Modules linked in: meson_rng rng_core iscsi_tcp
libiscsi_tcp libiscsi scsi_transport_iscsi ip_tables x_tables ipv6 realtek
[ 1010.121233] CPU: 0 PID: 1148 Comm: iscsid Tainted: G D
4.9.0-rc8-next-20161208-r002-arm64 #1
[ 1010.130719] Hardware name: Hardkernel ODROID-C2 (DT)
[ 1010.135636] task: ffff800070e5b200 task.stack: ffff800071d10000
[ 1010.141501] PC is at 0xffffb1cae368
[ 1010.144950] LR is at 0xffffb1cae368
[ 1010.148401] pc : [<0000ffffb1cae368>] lr : [<0000ffffb1cae368>]
pstate: 600003c5
[ 1010.155731] sp : ffff800071d13ec0
[ 1010.159009] x29: 0000000000000000 x28: ffff800070e5b200
[ 1010.164270] x27: 0000aaaad0f76000 x26: 0000ffffb1e7f000
[ 1010.169531] x25: 0000ffffb1e7f000 x24: 0000000000000001
[ 1010.174793] x23: 0000000000000000 x22: 0000ffffb1cae4f8
[ 1010.180054] x21: ffffffffffffffff x20: 000080006e51f000
[ 1010.185315] x19: 0000000000000000 x18: 0000000000000010
[ 1010.190576] x17: 0000ffffb1cae330 x16: 0000000000000000
[ 1010.195838] x15: 0000000000000006 x14: ffff000088b1eabf
[ 1010.201099] x13: ffff000008b1eacd x12: 00000000000001fd
[ 1010.206360] x11: 0000000000000002 x10: 00000000000001fe
[ 1010.211621] x9 : ffff800071d13b40 x8 : 00000000000183fc
[ 1010.216883] x7 : 0000000000000000 x6 : 000000000000005a
[ 1010.222144] x5 : 00000000005b005a x4 : 0000000000000000
[ 1010.227405] x3 : 0000000000000000 x2 : 000000000000005b
[ 1010.232666] x1 : ffff800070e5b200 x0 : 0000000000000000
[ 1010.237927]
[ 1010.239395] Process iscsid (pid: 1148, stack limit = 0xffff800071d10000)
[ 1010.246037] Stack: (0xffff800071d13ec0 to 0xffff800071d14000)
[ 1010.251730] 3ec0: 0000000000000000 0000ffffd46cfa90 0000000000000000
0000000000000000
[ 1010.259492] 3ee0: 0000000000000000 0000000000000000 726874205d303632
000000000000007d
[ 1010.267255] 3f00: 0000000000000065 7369205d746c7561 6974617265706f20
776f6e206c616e6f
[ 1010.275017] 3f20: 6174726f70202c31 312e323931203a6c 000000000000000c
0000000000000000
[ 1010.282780] 3f40: 0000000000000000 0000ffffb1cae330 0000000000000000
0000000000000028
[ 1010.290542] 3f60: 0000ffffb1e76ff0 0000000000000002 0000aaaad0f25000
0000000000010002
[ 1010.298305] 3f80: 0000000000000001 0000ffffb1e7f000 0000ffffb1e7f000
0000aaaad0f76000
[ 1010.306067] 3fa0: 0000aaaad0f76000 0000ffffd46cfa60 0000ffffb1cae368
0000ffffd46cfa60
[ 1010.313830] 3fc0: 0000ffffb1cae4f8 0000000000000000 0000ffffd46cfa90
ffffffffffffffff
[ 1010.321592] 3fe0: 0000000000000000 0000000000000000 0000000000000000
0000000000000000
[ 1010.329353] Call trace:
[ 1010.331770] Exception stack(0xffff800071d13cf0 to 0xffff800071d13e20)
[ 1010.338151] 3ce0: 0000000000000000
0001000000000000
[ 1010.345915] 3d00: ffff800071d13ec0 0000ffffb1cae368 ffff8000738e3500
0000000000000000
[ 1010.353677] 3d20: 0000000000000004 ffff000008aa9818 ffff800070e5b200
000000000808540c
[ 1010.361440] 3d40: ffff800071d13d90 ffff0000080c87f8 ffff800071d13e40
ffff800070e5b200
[ 1010.369202] 3d60: 0000000000000004 00000000000003c0 ffff800071d13e40
0000000000000001
[ 1010.376965] 3d80: 0000ffffb1e7f000 0000ffffb1e7f000 0000000000000000
ffff800070e5b200
[ 1010.384727] 3da0: 000000000000005b 0000000000000000 0000000000000000
00000000005b005a
[ 1010.392490] 3dc0: 000000000000005a 0000000000000000 00000000000183fc
ffff800071d13b40
[ 1010.400252] 3de0: 00000000000001fe 0000000000000002 00000000000001fd
ffff000008b1eacd
[ 1010.408014] 3e00: ffff000088b1eabf 0000000000000006 0000000000000000
0000ffffb1cae330
[ 1010.415777] [<0000ffffb1cae368>] 0xffffb1cae368
[ 1010.420263] Code: f9001fbf aa0103e0 b8736a95 9400006b (37f80100)
[ 1010.426802] ---[ end trace e838c4fb0030772e ]---
[ 1031.557846] Bad mode in Error handler detected on CPU2, code
0xbf000000 -- SError
[ 1031.559702] CPU: 2 PID: 2108 Comm: sshd Tainted: G D
4.9.0-rc8-next-20161208-r002-arm64 #1
[ 1031.569012] Hardware name: Hardkernel ODROID-C2 (DT)
[ 1031.573929] task: ffff8000745c4b00 task.stack: ffff800071c28000
[ 1031.574091] Unhandled fault: synchronous external abort (0x82000010)
at 0x0000aaaae01fefa0
[ 1031.587988] PC is at 0xffff8e78644c
[ 1031.591435] LR is at 0xaaaae0574730
[ 1031.594886] pc : [<0000ffff8e78644c>] lr : [<0000aaaae0574730>]
pstate: 80000000
[ 1031.602216] sp : 0000fffff8925560
[ 1031.605495] x29: 0000fffff8925560 x28: 0000fffff89256b0
[ 1031.610755] x27: 0000fffff89256c0 x26: 0000000000000000
[ 1031.616016] x25: 0000aaaae0619000 x24: 0000fffff89256b8
[ 1031.621278] x23: 0000000000000000 x22: 0000aaaae0619000
[ 1031.626539] x21: 0000aaaae0619000 x20: 000000000000000c
[ 1031.631800] x19: 0000000000000000 x18: 00000000ceae377e
[ 1031.637061] x17: 0000ffff8e7863f8 x16: 0000aaaae0618fb0
[ 1031.642323] x15: 0000ffff8ece4cb8 x14: 0000000000000000
[ 1031.647584] x13: 0000000002e4fdf0 x12: 0000000001fb97c6
[ 1031.652845] x11: 00000000fee4fdf0 x10: 52477583383d0600
[ 1031.658106] x9 : 0000000000787943 x8 : 0000000000000048
[ 1031.663368] x7 : 0000000000000000 x6 : 0000000000002600
[ 1031.668629] x5 : 0000000000000000 x4 : 0000000000000000
[ 1031.673890] x3 : 0000000000000000 x2 : 0000aaab1776f990
[ 1031.679151] x1 : 0000aaab1776f970 x0 : 0000000000000001
[ 1031.684412]
[ 1031.685889] Internal error: Attempting to execute userspace memory:
8600000f [#5] PREEMPT SMP
[ 1031.694333] Modules linked in: meson_rng rng_core iscsi_tcp
libiscsi_tcp libiscsi scsi_transport_iscsi ip_tables x_tables ipv6 realtek
[ 1031.706322] CPU: 2 PID: 2108 Comm: sshd Tainted: G D
4.9.0-rc8-next-20161208-r002-arm64 #1
[ 1031.715635] Hardware name: Hardkernel ODROID-C2 (DT)
[ 1031.720552] task: ffff8000745c4b00 task.stack: ffff800071c28000
[ 1031.726418] PC is at 0xaaaae0574730
[ 1031.729867] LR is at 0xaaaae0574730
[ 1031.733317] pc : [<0000aaaae0574730>] lr : [<0000aaaae0574730>]
pstate: 600003c5
[ 1031.740648] sp : ffff800071c2bec0
[ 1031.743925] x29: 0000000000000000 x28: ffff8000745c4b00
[ 1031.749187] x27: 0000fffff89256c0 x26: 0000000000000000
[ 1031.754448] x25: 0000aaaae0619000 x24: 0000fffff89256b8
[ 1031.759709] x23: 0000000080000000 x22: 0000ffff8e78644c
[ 1031.764970] x21: ffffffffffffffff x20: 000080006e549000
[ 1031.770231] x19: 0000000000000000 x18: 0000000000000010
[ 1031.775493] x17: 0000ffff8e7863f8 x16: 0000aaaae0618fb0
[ 1031.780754] x15: 0000000000000006 x14: ffff000088b1eabf
[ 1031.786015] x13: ffff000008b1eacd x12: 000000000000024a
[ 1031.791276] x11: 0000000000000002 x10: 000000000000024b
[ 1031.796538] x9 : ffff800071c2bb40 x8 : 00000000000a717c
[ 1031.801799] x7 : 0000000000000000 x6 : 0000000000001016
[ 1031.807060] x5 : 0000000010171016 x4 : 0000000000000000
[ 1031.812321] x3 : 0000000000000002 x2 : 0000000000001017
[ 1031.817583] x1 : ffff8000745c4b00 x0 : 0000000000000000
[ 1031.822844]
[ 1031.824311] Process sshd (pid: 2108, stack limit = 0xffff800071c28000)
[ 1031.830781] Stack: (0xffff800071c2bec0 to 0xffff800071c2c000)
[ 1031.836474] bec0: 0000000000000001 0000aaab1776f970 0000aaab1776f990
0000000000000000
[ 1031.844236] bee0: 0000000000000000 0000000000000000 0000000000002600
0000000000000000
[ 1031.851998] bf00: 0000000000000048 0000000000787943 52477583383d0600
00000000fee4fdf0
[ 1031.859761] bf20: 0000000001fb97c6 0000000002e4fdf0 0000000000000000
0000ffff8ece4cb8
[ 1031.867523] bf40: 0000aaaae0618fb0 0000ffff8e7863f8 00000000ceae377e
0000000000000000
[ 1031.875286] bf60: 000000000000000c 0000aaaae0619000 0000aaaae0619000
0000000000000000
[ 1031.883048] bf80: 0000fffff89256b8 0000aaaae0619000 0000000000000000
0000fffff89256c0
[ 1031.890813] bfa0: 0000fffff89256b0 0000fffff8925560 0000aaaae0574730
0000fffff8925560
[ 1031.898573] bfc0: 0000ffff8e78644c 0000000080000000 000000000000000c
ffffffffffffffff
[ 1031.906336] bfe0: 0000000000000000 0000000000000000 f90789874c4fa304
6fb22db46d57240e
[ 1031.914097] Call trace:
[ 1031.916513] Exception stack(0xffff800071c2bcf0 to 0xffff800071c2be20)
[ 1031.922895] bce0: 0000000000000000
0001000000000000
[ 1031.930659] bd00: ffff800071c2bec0 0000aaaae0574730 ffff80007382d500
0000000000000000
[ 1031.938421] bd20: 0000000000000004 ffff000008aa9818 ffff8000745c4b00
000000000808540c
[ 1031.946184] bd40: ffff800071c2bd90 ffff0000080c87f8 ffff800071c2be40
ffff8000745c4b00
[ 1031.953946] bd60: 0000000000000004 00000000000003c0 ffff800071c2be40
0000fffff89256b8
[ 1031.961708] bd80: 0000aaaae0619000 0000000000000000 0000000000000000
ffff8000745c4b00
[ 1031.969471] bda0: 0000000000001017 0000000000000002 0000000000000000
0000000010171016
[ 1031.977234] bdc0: 0000000000001016 0000000000000000 00000000000a717c
ffff800071c2bb40
[ 1031.984996] bde0: 000000000000024b 0000000000000002 000000000000024a
ffff000008b1eacd
[ 1031.992758] be00: ffff000088b1eabf 0000000000000006 0000aaaae0618fb0
0000ffff8e7863f8
[ 1032.000522] [<0000aaaae0574730>] 0xaaaae0574730
[ 1032.005007] Code: d2800003 f9400362 f94037a4 97ffcdd9 (3100041f)
[ 1032.011090] ---[ end trace e838c4fb0030772f ]---
[ 1050.196320] Unhandled fault: synchronous external abort (0x82000010)
at 0x0000aaaac8ce7fa0
[ 1071.745314] Bad mode in Error handler detected on CPU3, code
0xbf000000 -- SError
[ 1071.747156] CPU: 3 PID: 2388 Comm: rm Tainted: G D
4.9.0-rc8-next-20161208-r002-arm64 #1
[ 1071.756293] Hardware name: Hardkernel ODROID-C2 (DT)
[ 1071.761210] task: ffff800070e37080 task.stack: ffff800073ad0000
[ 1071.767076] PC is at 0xffff9fc820c4
[ 1071.770523] LR is at 0xffff9fc7b704
[ 1071.773974] pc : [<0000ffff9fc820c4>] lr : [<0000ffff9fc7b704>]
pstate: 20000000
[ 1071.781304] sp : 0000fffffb1bd660
[ 1071.784582] x29: 0000fffffb1bd660 x28: 0000ffff9fc97000
[ 1071.789843] x27: 0000fffffb1bd7d0 x26: 0000ffff9fc97000
[ 1071.795104] x25: 0000fffffb1bde00 x24: 0000ffff9fc99168
[ 1071.800366] x23: 0000ffff9fc84000 x22: 0000ffff9fc98000
[ 1071.805627] x21: 0000ffff9fc94090 x20: 0000ffff9fc98030
[ 1071.810888] x19: 0000ffff9fc94780 x18: 0000000000040900
[ 1071.816149] x17: 0000ffff9fc7fe60 x16: 0000ffff9fc98000
[ 1071.821411] x15: 7fffffffffffffff x14: 0000000000000000
[ 1071.826672] x13: 0000000000000000 x12: 0000ffff9fc98030
[ 1071.831933] x11: 0000000000000040 x10: 0000000000000001
[ 1071.837194] x9 : 0000000000000000 x8 : 0000000000000010
[ 1071.842456] x7 : 0000ffff9fc93ca8 x6 : 0000000000000000
[ 1071.847717] x5 : 0000000000000004 x4 : 0000ffff9fc94790
[ 1071.852978] x3 : 0000ffff9fc943c0 x2 : 0000000000000350
[ 1071.858239] x1 : 0000000000000000 x0 : 0000ffff9fc94090
[ 1071.863500]
[ 1071.864975] Internal error: Attempting to execute userspace memory:
8600000f [#6] PREEMPT SMP
[ 1071.873420] Modules linked in: meson_rng rng_core iscsi_tcp
libiscsi_tcp libiscsi scsi_transport_iscsi ip_tables x_tables ipv6 realtek
[ 1071.885410] CPU: 3 PID: 2388 Comm: rm Tainted: G D
4.9.0-rc8-next-20161208-r002-arm64 #1
[ 1071.894551] Hardware name: Hardkernel ODROID-C2 (DT)
[ 1071.899467] task: ffff800070e37080 task.stack: ffff800073ad0000
[ 1071.905332] PC is at 0xffff9fc7b704
[ 1071.908782] LR is at 0xffff9fc7b704
[ 1071.912233] pc : [<0000ffff9fc7b704>] lr : [<0000ffff9fc7b704>]
pstate: 600003c5
[ 1071.919563] sp : ffff800073ad3ec0
[ 1071.922841] x29: 0000000000000000 x28: ffff800070e37080
[ 1071.928102] x27: 0000fffffb1bd7d0 x26: 0000ffff9fc97000
[ 1071.933363] x25: 0000fffffb1bde00 x24: 0000ffff9fc99168
[ 1071.938624] x23: 0000000020000000 x22: 0000ffff9fc820c4
[ 1071.943886] x21: ffffffffffffffff x20: 000080006e55e000
[ 1071.949147] x19: 0000000000000000 x18: 0000000000000010
[ 1071.954408] x17: 0000ffff9fc7fe60 x16: 0000ffff9fc98000
[ 1071.959669] x15: 0000000000000006 x14: ffff000088b1eabf
[ 1071.964931] x13: ffff000008b1eacd x12: 0000000000000297
[ 1071.970192] x11: 0000000000000002 x10: 0000000000000298
[ 1071.975453] x9 : ffff800073ad3b40 x8 : 00000000000d2d0c
[ 1071.980714] x7 : 0000000000000000 x6 : 0000000000000172
[ 1071.985976] x5 : 0000000001730172 x4 : 0000000000000000
[ 1071.991237] x3 : 0000000000000003 x2 : 0000000000000173
[ 1071.996498] x1 : ffff800070e37080 x0 : 0000000000000000
[ 1072.001759]
[ 1072.003227] Process rm (pid: 2388, stack limit = 0xffff800073ad0000)
[ 1072.009523] Stack: (0xffff800073ad3ec0 to 0xffff800073ad4000)
[ 1072.015217] 3ec0: 0000ffff9fc94090 0000000000000000 0000000000000350
0000ffff9fc943c0
[ 1072.022979] 3ee0: 0000ffff9fc94790 0000000000000004 0000000000000000
0000ffff9fc93ca8
[ 1072.030741] 3f00: 0000000000000010 0000000000000000 0000000000000001
0000000000000040
[ 1072.038504] 3f20: 0000ffff9fc98030 0000000000000000 0000000000000000
7fffffffffffffff
[ 1072.046266] 3f40: 0000ffff9fc98000 0000ffff9fc7fe60 0000000000040900
0000ffff9fc94780
[ 1072.054029] 3f60: 0000ffff9fc98030 0000ffff9fc94090 0000ffff9fc98000
0000ffff9fc84000
[ 1072.061791] 3f80: 0000ffff9fc99168 0000fffffb1bde00 0000ffff9fc97000
0000fffffb1bd7d0
[ 1072.069554] 3fa0: 0000ffff9fc97000 0000fffffb1bd660 0000ffff9fc7b704
0000fffffb1bd660
[ 1072.077316] 3fc0: 0000ffff9fc820c4 0000000020000000 0000000000000003
ffffffffffffffff
[ 1072.085079] 3fe0: 0000000000000000 0000000000000000 ffff80007455d970
0000000000000000
[ 1072.092841] Call trace:
[ 1072.095257] Exception stack(0xffff800073ad3cf0 to 0xffff800073ad3e20)
[ 1072.101638] 3ce0: 0000000000000000
0001000000000000
[ 1072.109401] 3d00: ffff800073ad3ec0 0000ffff9fc7b704 ffff800070fe8a00
0000000000000000
[ 1072.117164] 3d20: 0000000000000004 ffff000008aa9818 ffff800070e37080
000000000808540c
[ 1072.124926] 3d40: ffff800073ad3d90 ffff0000080c87f8 ffff800073ad3e40
ffff800070e37080
[ 1072.132689] 3d60: 0000000000000004 00000000000003c0 ffff800073ad3e40
0000ffff9fc99168
[ 1072.140451] 3d80: 0000fffffb1bde00 0000ffff9fc97000 0000000000000000
ffff800070e37080
[ 1072.148214] 3da0: 0000000000000173 0000000000000003 0000000000000000
0000000001730172
[ 1072.155976] 3dc0: 0000000000000172 0000000000000000 00000000000d2d0c
ffff800073ad3b40
[ 1072.163739] 3de0: 0000000000000298 0000000000000002 0000000000000297
ffff000008b1eacd
[ 1072.171501] 3e00: ffff000088b1eabf 0000000000000006 0000ffff9fc98000
0000ffff9fc7fe60
[ 1072.179263] [<0000ffff9fc7b704>] 0xffff9fc7b704
[ 1072.183750] Code: cb000273 8b1302b3 d11bc260 94001a30 (aa1303e0)
[ 1072.190141] ---[ end trace e838c4fb00307730 ]---
[ 1072.195201] Bad mode in Error handler detected on CPU3, code
0xbf000000 -- SError
[ 1072.201782] CPU: 3 PID: 2389 Comm: systemd-cgroups Tainted: G D
4.9.0-rc8-next-20161208-r002-arm64 #1
[ 1072.212044] Hardware name: Hardkernel ODROID-C2 (DT)
[ 1072.216956] task: ffff800070e31900 task.stack: ffff80007158c000
[ 1072.222821] PC is at 0xffff7f492d80
[ 1072.226268] LR is at 0x0
[ 1072.228770] pc : [<0000ffff7f492d80>] lr : [<0000000000000000>]
pstate: 00000000
[ 1072.236101] sp : 0000ffffc6a74060
[ 1072.239379] x29: 0000000000000000 x28: 0000000000000000
[ 1072.244640] x27: 0000000000000000 x26: 0000000000000000
[ 1072.249901] x25: 0000000000000000 x24: 0000000000000000
[ 1072.255162] x23: 0000000000000000 x22: 0000000000000000
[ 1072.260423] x21: 0000000000000000 x20: 0000000000000000
[ 1072.265685] x19: 0000000000000000 x18: 0000000000000000
[ 1072.270947] x17: 0000000000000000 x16: 0000000000000000
[ 1072.276208] x15: 0000000000000000 x14: 0000000000000000
[ 1072.281470] x13: 0000000000000000 x12: 0000000000000000
[ 1072.286730] x11: 0000000000000000 x10: 0000000000000000
[ 1072.291991] x9 : 0000000000000000 x8 : 0000000000000000
[ 1072.297252] x7 : 0000000000000000 x6 : 0000000000000000
[ 1072.302513] x5 : 0000000000000000 x4 : 0000000000000000
[ 1072.307774] x3 : 0000000000000000 x2 : 0000000000000000
[ 1072.313036] x1 : 0000000000000000 x0 : 0000000000000000
[ 1072.318297]
[ 1072.319774] Unable to handle kernel NULL pointer dereference at
virtual address 00000000
[ 1072.327786] pgd = ffff800071d79000
[ 1072.331148] [00000000] *pgd=0000000000000000[ 1072.335203]
[ 1072.336671] Internal error: Oops: 86000004 [#7] PREEMPT SMP
[ 1072.342189] Modules linked in: meson_rng rng_core iscsi_tcp
libiscsi_tcp libiscsi scsi_transport_iscsi ip_tables x_tables ipv6 realtek
[ 1072.354181] CPU: 3 PID: 2389 Comm: systemd-cgroups Tainted: G D
4.9.0-rc8-next-20161208-r002-arm64 #1
[ 1072.364441] Hardware name: Hardkernel ODROID-C2 (DT)
[ 1072.369358] task: ffff800070e31900 task.stack: ffff80007158c000
[ 1072.375224] PC is at 0x0
[ 1072.377723] LR is at 0x0
[ 1072.380225] pc : [<0000000000000000>] lr : [<0000000000000000>]
pstate: 600003c5
[ 1072.387556] sp : ffff80007158fec0
[ 1072.390833] x29: 0000000000000000 x28: ffff800070e31900
[ 1072.396094] x27: 0000000000000000 x26: 0000000000000000
[ 1072.401356] x25: 0000000000000000 x24: 0000000000000000
[ 1072.406617] x23: 0000000000000000 x22: 0000ffff7f492d80
[ 1072.411878] x21: ffffffffffffffff x20: 000080006e55e000
[ 1072.417139] x19: 0000000000000000 x18: 0000000000000010
[ 1072.422401] x17: 0000000000000000 x16: 0000000000000000
[ 1072.427662] x15: 0000000000000006 x14: ffff000088b1eabf
[ 1072.432923] x13: ffff000008b1eacd x12: 00000000000002e3
[ 1072.438184] x11: 0000000000000002 x10: 00000000000002e4
[ 1072.443446] x9 : ffff80007158fb40 x8 : 000000000004db59
[ 1072.448707] x7 : 0000000000000000 x6 : 000000000000047a
[ 1072.453968] x5 : 00000000047b047a x4 : 0000000000000000
[ 1072.459229] x3 : 0000000000000003 x2 : 000000000000047b
[ 1072.464491] x1 : ffff800070e31900 x0 : 0000000000000000
[ 1072.469751]
[ 1072.471219] Process systemd-cgroups (pid: 2389, stack limit =
0xffff80007158c000)
[ 1072.478637] Stack: (0xffff80007158fec0 to 0xffff800071590000)
[ 1072.484330] fec0: 0000000000000000 0000000000000000 0000000000000000
0000000000000000
[ 1072.492093] fee0: 0000000000000000 0000000000000000 0000000000000000
0000000000000000
[ 1072.499855] ff00: 0000000000000000 0000000000000000 0000000000000000
0000000000000000
[ 1072.507618] ff20: 0000000000000000 0000000000000000 0000000000000000
0000000000000000
[ 1072.515380] ff40: 0000000000000000 0000000000000000 0000000000000000
0000000000000000
[ 1072.523142] ff60: 0000000000000000 0000000000000000 0000000000000000
0000000000000000
[ 1072.530905] ff80: 0000000000000000 0000000000000000 0000000000000000
0000000000000000
[ 1072.538667] ffa0: 0000000000000000 0000000000000000 0000000000000000
0000ffffc6a74060
[ 1072.546430] ffc0: 0000ffff7f492d80 0000000000000000 0000000000000000
ffffffffffffffff
[ 1072.554192] ffe0: 0000000000000000 0000000000000000 0000000000000000
0000000000000000
[ 1072.561953] Call trace:
[ 1072.564370] Exception stack(0xffff80007158fcf0 to 0xffff80007158fe20)
[ 1072.570752] fce0: 0000000000000000
0001000000000000
[ 1072.578515] fd00: ffff80007158fec0 0000000000000000 ffff800070fe8aa0
0000000000000000
[ 1072.586278] fd20: 0000000000000004 ffff000008aa9818 ffff800070e31900
000000000808540c
[ 1072.594040] fd40: ffff80007158fd90 ffff0000080c87f8 ffff80007158fe40
ffff800070e31900
[ 1072.601803] fd60: 0000000000000004 00000000000003c0 ffff80007158fe40
0000000000000000
[ 1072.609565] fd80: 0000000000000000 0000000000000000 0000000000000000
ffff800070e31900
[ 1072.617328] fda0: 000000000000047b 0000000000000003 0000000000000000
00000000047b047a
[ 1072.625090] fdc0: 000000000000047a 0000000000000000 000000000004db59
ffff80007158fb40
[ 1072.632853] fde0: 00000000000002e4 0000000000000002 00000000000002e3
ffff000008b1eacd
[ 1072.640615] fe00: ffff000088b1eabf 0000000000000006 0000000000000000
0000000000000000
[ 1072.648376] [< (null)>] (null)
[ 1072.653036] Code: bad PC value
[ 1072.656128] ---[ end trace e838c4fb00307731 ]---
^ permalink raw reply
* [PATCH] ARM: keystone: dts: fix netcp clocks and add names
From: Grygorii Strashko @ 2016-12-08 21:11 UTC (permalink / raw)
To: linux-arm-kernel
From: Murali Karicheri <m-karicheri2@ti.com>
Fix the pa clock to point to the clkpa which has clock rate of 1/3 of PA
PLL clock and add clock names.
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
---
arch/arm/boot/dts/keystone-k2e-netcp.dtsi | 3 ++-
arch/arm/boot/dts/keystone-k2hk-netcp.dtsi | 3 ++-
arch/arm/boot/dts/keystone-k2l-netcp.dtsi | 3 ++-
3 files changed, 6 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/keystone-k2e-netcp.dtsi b/arch/arm/boot/dts/keystone-k2e-netcp.dtsi
index ac990f6..ba828cb 100644
--- a/arch/arm/boot/dts/keystone-k2e-netcp.dtsi
+++ b/arch/arm/boot/dts/keystone-k2e-netcp.dtsi
@@ -138,7 +138,8 @@ netcp: netcp at 24000000 {
/* NetCP address range */
ranges = <0 0x24000000 0x1000000>;
- clocks = <&papllclk>, <&clkcpgmac>, <&chipclk12>;
+ clocks = <&clkpa>, <&clkcpgmac>, <&chipclk12>;
+ clock-names = "pa_clk", "ethss_clk", "cpts";
dma-coherent;
ti,navigator-dmas = <&dma_gbe 0>,
diff --git a/arch/arm/boot/dts/keystone-k2hk-netcp.dtsi b/arch/arm/boot/dts/keystone-k2hk-netcp.dtsi
index f86d6dd..a5ac845 100644
--- a/arch/arm/boot/dts/keystone-k2hk-netcp.dtsi
+++ b/arch/arm/boot/dts/keystone-k2hk-netcp.dtsi
@@ -155,7 +155,8 @@ netcp: netcp at 2000000 {
/* NetCP address range */
ranges = <0 0x2000000 0x100000>;
- clocks = <&papllclk>, <&clkcpgmac>, <&chipclk12>;
+ clocks = <&clkpa>, <&clkcpgmac>, <&chipclk12>;
+ clock-names = "pa_clk", "ethss_clk", "cpts";
dma-coherent;
ti,navigator-dmas = <&dma_gbe 22>,
diff --git a/arch/arm/boot/dts/keystone-k2l-netcp.dtsi b/arch/arm/boot/dts/keystone-k2l-netcp.dtsi
index 5acbd0d..b6f2682 100644
--- a/arch/arm/boot/dts/keystone-k2l-netcp.dtsi
+++ b/arch/arm/boot/dts/keystone-k2l-netcp.dtsi
@@ -137,7 +137,8 @@ netcp: netcp at 26000000 {
/* NetCP address range */
ranges = <0 0x26000000 0x1000000>;
- clocks = <&clkosr>, <&papllclk>, <&clkcpgmac>, <&chipclk12>;
+ clocks = <&clkpa>, <&clkcpgmac>, <&chipclk12>, <&clkosr>;
+ clock-names = "pa_clk", "ethss_clk", "cpts", "osr_clk";
dma-coherent;
ti,navigator-dmas = <&dma_gbe 0>,
--
2.10.1
^ permalink raw reply related
* [PATCH 3/3] clk: keystone: Add sci-clk driver support
From: Stephen Boyd @ 2016-12-08 21:10 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cb608729-b617-0eab-5ddf-d78ff47b237e@ti.com>
On 12/08, Tero Kristo wrote:
> On 08/12/16 02:13, Stephen Boyd wrote:
> >On 10/21, Tero Kristo wrote:
> >>diff --git a/drivers/clk/keystone/sci-clk.c b/drivers/clk/keystone/sci-clk.c
> >>new file mode 100644
> >>index 0000000..f6af5bd
> >>--- /dev/null
> >>+++ b/drivers/clk/keystone/sci-clk.c
>
> >
> >>+
> >>+ handle = devm_ti_sci_get_handle(dev);
> >>+ if (IS_ERR(handle))
> >>+ return PTR_ERR(handle);
> >>+
> >>+ provider = devm_kzalloc(dev, sizeof(*provider), GFP_KERNEL);
> >>+ if (!provider)
> >>+ return -ENOMEM;
> >>+
> >>+ provider->clocks = data;
> >>+
> >>+ provider->sci = handle;
> >>+ provider->ops = &handle->ops.clk_ops;
> >>+ provider->dev = dev;
> >>+
> >>+ ti_sci_init_clocks(provider);
> >
> >And if this fails?
>
> Yea this is kind of controversial. ti_sci_init_clocks() can fail if
> any of the clocks registered will fail. I decided to have it this
> way so that at least some clocks might work in failure cause, and
> you might have a booting device instead of total lock-up.
>
> Obviously it could be done so that if any clock fails, we would
> de-register all clocks at that point, but personally I think this is
> a worse option.
>
> ti_sci_init_clocks could probably be modified to continue
> registering clocks when a single clock fails though. Currently it
> aborts at first failure.
>
That sounds like a better approach if we don't care about
failures to register a clock. Returning a value from a function
and not using it isn't really a great design.
I worry that if we start returning errors from clk_hw_register()
that something will go wrong though, so really I don't know why
we want to ignore errors at all. Just for debugging a boot hang?
Can't we use early console to at least see that this driver is
failing to probe and debug that way?
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply
* [PATCH v18 03/15] clocksource/drivers/arm_arch_timer: Improve printk relevant code
From: Joe Perches @ 2016-12-08 21:10 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161208173319.6618-4-fu.wei@linaro.org>
On Fri, 2016-12-09 at 01:33 +0800, fu.wei at linaro.org wrote:
> From: Fu Wei <fu.wei@linaro.org>
>
> This patch defines pr_fmt(fmt) for all pr_* functions,
> then the pr_* doesn't need to add "arch_timer:" everytime.
trivia:
> diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c
[]
> @@ -966,7 +967,7 @@ static int __init arch_timer_mem_init(struct device_node *np)
>
> ret = -EINVAL;
> if (!irq) {
> - pr_err("arch_timer: Frame missing %s irq",
> + pr_err("Frame missing %s irq",
> arch_timer_mem_use_virtual ? "virt" : "phys");
> goto out;
> }
Missing terminating newline
pr_err("Frame missing %s irq\n",
^ permalink raw reply
* [PATCH 2/2] clk: zte: add audio clocks for zx296718
From: Stephen Boyd @ 2016-12-08 21:04 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1481189157-8995-2-git-send-email-shawnguo@kernel.org>
On 12/08, Shawn Guo wrote:
> +
> +static int __init audio_clocks_init(struct device_node *np)
> +{
> + void __iomem *reg_base;
> + int i, ret;
> +
> + reg_base = of_iomap(np, 0);
> + if (!reg_base) {
> + pr_err("%s: Unable to map audio clk base\n", __func__);
> + return -ENXIO;
> + }
> +
> + for (i = 0; i < ARRAY_SIZE(audio_mux_clk); i++) {
> + if (audio_mux_clk[i].id)
> + audio_hw_onecell_data.hws[audio_mux_clk[i].id] =
> + &audio_mux_clk[i].mux.hw;
> +
> + audio_mux_clk[i].mux.reg += (u64)reg_base;
> + ret = clk_hw_register(NULL, &audio_mux_clk[i].mux.hw);
> + if (ret) {
> + pr_warn("audio clk %s init error!\n",
> + audio_mux_clk[i].mux.hw.init->name);
> + }
> + }
> +
> + for (i = 0; i < ARRAY_SIZE(audio_adiv_clk); i++) {
> + if (audio_adiv_clk[i].id)
> + audio_hw_onecell_data.hws[audio_adiv_clk[i].id] =
> + &audio_adiv_clk[i].hw;
> +
> + audio_adiv_clk[i].reg_base += (u64)reg_base;
> + ret = clk_hw_register(NULL, &audio_adiv_clk[i].hw);
> + if (ret) {
> + pr_warn("audio clk %s init error!\n",
> + audio_adiv_clk[i].hw.init->name);
> + }
> + }
> +
> + for (i = 0; i < ARRAY_SIZE(audio_div_clk); i++) {
> + if (audio_div_clk[i].id)
> + audio_hw_onecell_data.hws[audio_div_clk[i].id] =
> + &audio_div_clk[i].div.hw;
> +
> + audio_div_clk[i].div.reg += (u64)reg_base;
> + ret = clk_hw_register(NULL, &audio_div_clk[i].div.hw);
> + if (ret) {
> + pr_warn("audio clk %s init error!\n",
> + audio_div_clk[i].div.hw.init->name);
> + }
> + }
> +
> + for (i = 0; i < ARRAY_SIZE(audio_gate_clk); i++) {
> + if (audio_gate_clk[i].id)
> + audio_hw_onecell_data.hws[audio_gate_clk[i].id] =
> + &audio_gate_clk[i].gate.hw;
> +
> + audio_gate_clk[i].gate.reg += (u64)reg_base;
> + ret = clk_hw_register(NULL, &audio_gate_clk[i].gate.hw);
> + if (ret) {
> + pr_warn("audio clk %s init error!\n",
> + audio_gate_clk[i].gate.hw.init->name);
> + }
> + }
> +
> + if (of_clk_add_hw_provider(np, of_clk_hw_onecell_get, &audio_hw_onecell_data))
> + panic("could not register clk provider\n");
Why don't we return error? We returned errors before if we
couldn't map the ioregion.
> + pr_info("audio-clk init over, nr:%d\n", AUDIO_NR_CLKS);
debug noise?
> +
> + return 0;
> +}
> +
> static const struct of_device_id zx_clkc_match_table[] = {
> { .compatible = "zte,zx296718-topcrm", .data = &top_clocks_init },
> { .compatible = "zte,zx296718-lsp0crm", .data = &lsp0_clocks_init },
> { .compatible = "zte,zx296718-lsp1crm", .data = &lsp1_clocks_init },
> + { .compatible = "zte,zx296718-audiocrm", .data = &audio_clocks_init },
> { }
> };
>
> diff --git a/drivers/clk/zte/clk.c b/drivers/clk/zte/clk.c
> index c4c1251bc1e7..ea97024b37aa 100644
> --- a/drivers/clk/zte/clk.c
> +++ b/drivers/clk/zte/clk.c
> @@ -9,6 +9,7 @@
>
> #include <linux/clk-provider.h>
> #include <linux/err.h>
> +#include <linux/gcd.h>
> #include <linux/io.h>
> #include <linux/iopoll.h>
> #include <linux/slab.h>
> @@ -310,3 +311,151 @@ struct clk *clk_register_zx_audio(const char *name,
>
> return clk;
> }
> +
> +#define CLK_AUDIO_DIV_FRAC BIT(0)
> +#define CLK_AUDIO_DIV_INT BIT(1)
> +#define CLK_AUDIO_DIV_UNCOMMON BIT(1)
> +
> +#define CLK_AUDIO_DIV_FRAC_NSHIFT 16
> +#define CLK_AUDIO_DIV_INT_FRAC_RE BIT(16)
> +#define CLK_AUDIO_DIV_INT_FRAC_MAX (0xffff)
> +#define CLK_AUDIO_DIV_INT_FRAC_MIN (0x2)
> +#define CLK_AUDIO_DIV_INT_INT_SHIFT 24
> +#define CLK_AUDIO_DIV_INT_INT_WIDTH 4
> +
> +#define to_clk_zx_audio_div(_hw) container_of(_hw, struct clk_zx_audio_divider, hw)
> +
> +static unsigned long audio_calc_rate(struct clk_zx_audio_divider *audio_div,
> + u32 reg_frac, u32 reg_int,
> + unsigned long parent_rate)
> +{
> + unsigned long rate, m, n;
> +
> + if (audio_div->table) {
> + const struct zx_clk_audio_div_table *divt = audio_div->table;
> +
> + for (; divt->rate; divt++) {
> + if ((divt->int_reg == reg_int) && (divt->frac_reg == reg_frac))
Please remove extra parenthesis here.
> + return divt->rate;
> + }
> + }
> + if (audio_div->table)
> + pr_warn("cannot found the config(int_reg:0x%x, frac_reg:0x%x) in table, we will caculate it\n",
> + reg_int, reg_frac);
> +
> + m = reg_frac & 0xffff;
> + n = (reg_frac >> 16) & 0xffff;
> +
> + m = (reg_int & 0xffff) * n + m;
> + rate = (parent_rate * n) / m;
> +
> + return rate;
> +}
> +
> +static void audio_calc_reg(struct clk_zx_audio_divider *audio_div,
> + struct zx_clk_audio_div_table *div_table,
> + unsigned long rate, unsigned long parent_rate)
> +{
> + unsigned int reg_int, reg_frac;
> + unsigned long m, n, div;
> +
> + if (audio_div->table) {
> + const struct zx_clk_audio_div_table *divt = audio_div->table;
> +
> + for (; divt->rate; divt++) {
> + if (divt->rate == rate) {
> + div_table->rate = divt->rate;
> + div_table->int_reg = divt->int_reg;
> + div_table->frac_reg = divt->frac_reg;
> + return;
> + }
> + }
> + }
> + if (audio_div->table)
> + pr_warn("cannot found the rate(%ld) in table, we will caculate the config\n",
> + rate);
> +
> + reg_int = parent_rate / rate;
> +
> + if (reg_int > CLK_AUDIO_DIV_INT_FRAC_MAX)
> + reg_int = CLK_AUDIO_DIV_INT_FRAC_MAX;
> + else if (reg_int < CLK_AUDIO_DIV_INT_FRAC_MIN)
> + reg_int = 0;
> + m = parent_rate - rate * reg_int;
> + n = rate;
> +
> + div = gcd(m, n);
> + m = m / div;
> + n = n / div;
> +
> + if ((m >> 16) || (n >> 16)) {
> + if (m > n) {
> + n = n * 0xffff / m;
> + m = 0xffff;
> + } else {
> + m = m * 0xffff / n;
> + n = 0xffff;
> + }
> + }
> + reg_frac = m | (n << 16);
> +
> + div_table->rate = (ulong)(parent_rate * n) / ((ulong)reg_int * n + m);
Please don't use ulong, use unsigned long. Also consider using
local variables so the line isn't overly long.
> + div_table->int_reg = reg_int;
> + div_table->frac_reg = reg_frac;
> +}
[...]
> +
> +static int zx_audio_div_set_rate(struct clk_hw *hw, unsigned long rate,
> + unsigned long parent_rate)
> +{
> + struct clk_zx_audio_divider *zx_audio_div = to_clk_zx_audio_div(hw);
> + struct zx_clk_audio_div_table divt;
> + unsigned int val;
> +
> + audio_calc_reg(zx_audio_div, &divt, rate, parent_rate);
> + if (divt.rate != rate)
> + pr_info("the real rate is:%ld", divt.rate);
Debug noise?
> +
> + writel_relaxed(divt.frac_reg, zx_audio_div->reg_base);
> +
> + val = readl_relaxed(zx_audio_div->reg_base + 0x4);
> + val &= ~0xffff;
> + val |= divt.int_reg | CLK_AUDIO_DIV_INT_FRAC_RE;
> + writel_relaxed(val, zx_audio_div->reg_base + 0x4);
> +
> + mdelay(1);
> +
> + val = readl_relaxed(zx_audio_div->reg_base + 0x4);
> + val &= ~CLK_AUDIO_DIV_INT_FRAC_RE;
> + writel_relaxed(val, zx_audio_div->reg_base + 0x4);
> +
> + return 0;
> +}
> +
> +const struct clk_ops zx_audio_div_ops = {
> + .recalc_rate = zx_audio_div_recalc_rate,
> + .round_rate = zx_audio_div_round_rate,
> + .set_rate = zx_audio_div_set_rate,
> +};
>
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply
* [PATCH 08/16] drivers/fsi: Add crc4 helpers
From: Christopher Bostic @ 2016-12-08 19:43 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <81146f25-05fa-70f9-e8ff-49c17aede8f2@ozlabs.org>
On Wed, Dec 7, 2016 at 5:33 PM, Jeremy Kerr <jk@ozlabs.org> wrote:
> Hi Greg,
>
>> Why not just create lib/crc4.c with these functions, like the other crc
>> functions in the kernel?
>
> Two (bad) reasons:
>
> - The crc4 implementation here is pretty specific to the FSI
> usage (only supporting 4-bit-sized chunks), to keep the math & lookup
> table simple
>
> - I'm lazy
>
> So yes, we should spend the effort now to make this generic enough for
> a lib/crc4.c. Would we want to support different values for the
> polynomial?
>
> Chris: do you want me to to that, or will you?
Hi Jeremy,
I'll take this one. Will implement as per Greg's suggestions.
Thanks,
Chris
>
> Cheers,
>
>
> Jeremy
^ permalink raw reply
* [PATCH 1/1] arm64: mm: add config options for page table configuration
From: Scott Branden @ 2016-12-08 19:33 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161208185717.GC15141@e104818-lin.cambridge.arm.com>
On 16-12-08 10:57 AM, Catalin Marinas wrote:
> On Thu, Dec 08, 2016 at 08:30:36AM -0800, Scott Branden wrote:
>> On 16-12-08 02:00 AM, Catalin Marinas wrote:
>>> On Wed, Dec 07, 2016 at 11:40:00AM -0800, Scott Branden wrote:
>>>> Make MAX_PHYSMEM_BITS and SECTIONS_SIZE_BITS configurable by adding
>>>> config options.
>>>> Default to current settings currently defined in sparesmem.h.
>>>> For systems wishing to save memory the config options can be overridden.
>>>> Example, changing MAX_PHYSMEM_BITS from 48 to 36 at the same time as
>>>> changing SECTION_SIZE_BITS from 30 to 26 frees 13MB of memory.
> [...]
>>> I would rather reduce SECTION_SIZE_BITS permanently where
>>> feasible, like in this patch:
>>>
>>> http://lkml.kernel.org/r/1465821119-3384-1-git-send-email-jszhang at marvell.com
>>
>> This patch does not meet my requirements as I need SECTION_SIZE_BITS to be
>> set to 28 to reduce memory
>
> So with this patch, we reduce it to 27, it should be fine-grained enough
> for 128MB sections. Alternatively, there were other suggestions here:
>
> http://lkml.iu.edu/hypermail/linux/kernel/1604.1/03036.html
>
>> and to allow memory hotplug to allocate a 256 MB section.
>
> Can memory hotplug not work with 2*128MB sections in this case?
Yes, I then need to hotplug the memory at 2 locations for 1 memory
addition but that will work in my current use case. I'm one step away
from hotplug working on ARM64. Once that works I hope to break the
dependencies between hotplug memory size created based on
SECTION_SIZE_BITS in the future.
Since I currently have your attention: I do think there is fundamental
bug in the ARM64 mm implementation. If you look at
/sys/devices/system/memory it only shows the last memoryX section
created after init. It should be showing up multiple sections. As a
quick test change SECTION_SIZE_BITS and you look at
/sys/devices/system/memory to see what changes. Look at a standard x64
machine you will see all the memoryX entries present.
>
>> My patch future proofs the tuning of the parameters by allowing
>> any section size to be made.
>
> While MAX_PHYSMEM_BITS makes sense to users in general,
> SECTION_SIZE_BITS is not always clear to the average user what it means
> and its min/max boundaries. That's another reason (apart from single/few
> Image case) why I prefer to not expose it as configuration option.
I agree SECTION_SIZE_BITS is confusing. If you could provide more
documentation on what it means and how it is used that would help others
for sure. I just stumbled upon it while working on a tight memory
system and found it saves me significant memory.
>
>> I could combine the patch you list such that
>> SECTION_SIZE_BITS defaults to 30 when CONFIG_ARM64_64_PAGES is selected and
>> 27 otherwise. Should it default to something else for 16K and 4K pages?
>
> I haven't done any calculations for 16K yet but we could probably come
> up with some formula based on PAGE_SHIFT to cover all cases.
Yes, a calculation based on pages that modified SECTION_SIZE_BITS would
probably be a better solution.
>
>> In terms of MAX_PHYSMEM_BITS, if our SoCs only use 40 (or less) bits I would
>> also like the configuration functionality. This allows us to make the
>> SECTION_SIZE_BITS smaller.
>
> So how small do you want SECTION_SIZE_BITS to be? As I said above, 128MB
> sections should be sufficient in most cases and without the need to
> reduce MAX_PHYSMEM_BITS.
>
256MB works for my current use case. But appears somebody else was
looking for 64MB previously. So that is why adding support for
modifying MAX_PHYSMEM_BITS makes sense as it needs to be modified to
support the 64MB case:
https://lkml.org/lkml/2016/8/11/209
^ permalink raw reply
* [PATCH v2 4/4] ARM: treewide: Replace uses of virt_to_phys with __pa_symbol
From: Florian Fainelli @ 2016-12-08 18:59 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161208185933.13749-1-f.fainelli@gmail.com>
All low-level PM/SMP code using virt_to_phys() should actually use
__pa_symbol() against kernel symbols. Update code where relevant to move
away from virt_to_phys().
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm/common/mcpm_entry.c | 12 ++++++------
arch/arm/mach-alpine/platsmp.c | 2 +-
arch/arm/mach-axxia/platsmp.c | 2 +-
arch/arm/mach-bcm/bcm63xx_smp.c | 2 +-
arch/arm/mach-bcm/platsmp-brcmstb.c | 2 +-
arch/arm/mach-bcm/platsmp.c | 4 ++--
arch/arm/mach-berlin/platsmp.c | 2 +-
arch/arm/mach-exynos/firmware.c | 4 ++--
arch/arm/mach-exynos/mcpm-exynos.c | 2 +-
arch/arm/mach-exynos/platsmp.c | 4 ++--
arch/arm/mach-exynos/pm.c | 6 +++---
arch/arm/mach-exynos/suspend.c | 6 +++---
arch/arm/mach-hisi/platmcpm.c | 2 +-
arch/arm/mach-hisi/platsmp.c | 6 +++---
arch/arm/mach-imx/platsmp.c | 2 +-
arch/arm/mach-imx/pm-imx6.c | 2 +-
arch/arm/mach-imx/src.c | 2 +-
arch/arm/mach-mediatek/platsmp.c | 2 +-
arch/arm/mach-mvebu/pm.c | 2 +-
arch/arm/mach-mvebu/pmsu.c | 2 +-
arch/arm/mach-mvebu/system-controller.c | 2 +-
arch/arm/mach-omap2/control.c | 8 ++++----
arch/arm/mach-omap2/omap-mpuss-lowpower.c | 8 ++++----
arch/arm/mach-omap2/omap-smp.c | 4 ++--
arch/arm/mach-prima2/platsmp.c | 2 +-
arch/arm/mach-prima2/pm.c | 2 +-
arch/arm/mach-pxa/palmz72.c | 2 +-
arch/arm/mach-pxa/pxa25x.c | 2 +-
arch/arm/mach-pxa/pxa27x.c | 2 +-
arch/arm/mach-pxa/pxa3xx.c | 2 +-
arch/arm/mach-realview/platsmp-dt.c | 2 +-
arch/arm/mach-rockchip/platsmp.c | 4 ++--
arch/arm/mach-rockchip/pm.c | 2 +-
arch/arm/mach-s3c24xx/mach-jive.c | 2 +-
arch/arm/mach-s3c24xx/pm-s3c2410.c | 2 +-
arch/arm/mach-s3c24xx/pm-s3c2416.c | 2 +-
arch/arm/mach-s3c64xx/pm.c | 2 +-
arch/arm/mach-s5pv210/pm.c | 2 +-
arch/arm/mach-sa1100/pm.c | 2 +-
arch/arm/mach-shmobile/platsmp-apmu.c | 6 +++---
arch/arm/mach-shmobile/platsmp-scu.c | 4 ++--
arch/arm/mach-socfpga/platsmp.c | 4 ++--
arch/arm/mach-spear/platsmp.c | 2 +-
arch/arm/mach-sti/platsmp.c | 2 +-
arch/arm/mach-sunxi/platsmp.c | 4 ++--
arch/arm/mach-tango/platsmp.c | 2 +-
arch/arm/mach-tango/pm.c | 2 +-
arch/arm/mach-tegra/reset.c | 4 ++--
arch/arm/mach-ux500/platsmp.c | 2 +-
arch/arm/mach-vexpress/dcscb.c | 2 +-
arch/arm/mach-vexpress/platsmp.c | 2 +-
arch/arm/mach-vexpress/tc2_pm.c | 4 ++--
arch/arm/mach-zx/platsmp.c | 4 ++--
arch/arm/mach-zynq/platsmp.c | 2 +-
54 files changed, 84 insertions(+), 84 deletions(-)
diff --git a/arch/arm/common/mcpm_entry.c b/arch/arm/common/mcpm_entry.c
index a923524d1040..cf062472e07b 100644
--- a/arch/arm/common/mcpm_entry.c
+++ b/arch/arm/common/mcpm_entry.c
@@ -144,7 +144,7 @@ extern unsigned long mcpm_entry_vectors[MAX_NR_CLUSTERS][MAX_CPUS_PER_CLUSTER];
void mcpm_set_entry_vector(unsigned cpu, unsigned cluster, void *ptr)
{
- unsigned long val = ptr ? virt_to_phys(ptr) : 0;
+ unsigned long val = ptr ? __pa_symbol(ptr) : 0;
mcpm_entry_vectors[cluster][cpu] = val;
sync_cache_w(&mcpm_entry_vectors[cluster][cpu]);
}
@@ -299,8 +299,8 @@ void mcpm_cpu_power_down(void)
* the kernel as if the power_up method just had deasserted reset
* on the CPU.
*/
- phys_reset = (phys_reset_t)(unsigned long)virt_to_phys(cpu_reset);
- phys_reset(virt_to_phys(mcpm_entry_point));
+ phys_reset = (phys_reset_t)(unsigned long)__pa_symbol(cpu_reset);
+ phys_reset(__pa_symbol(mcpm_entry_point));
/* should never get here */
BUG();
@@ -388,8 +388,8 @@ static int __init nocache_trampoline(unsigned long _arg)
__mcpm_outbound_leave_critical(cluster, CLUSTER_DOWN);
__mcpm_cpu_down(cpu, cluster);
- phys_reset = (phys_reset_t)(unsigned long)virt_to_phys(cpu_reset);
- phys_reset(virt_to_phys(mcpm_entry_point));
+ phys_reset = (phys_reset_t)(unsigned long)__pa_symbol(cpu_reset);
+ phys_reset(__pa_symbol(mcpm_entry_point));
BUG();
}
@@ -449,7 +449,7 @@ int __init mcpm_sync_init(
sync_cache_w(&mcpm_sync);
if (power_up_setup) {
- mcpm_power_up_setup_phys = virt_to_phys(power_up_setup);
+ mcpm_power_up_setup_phys = __pa_symbol(power_up_setup);
sync_cache_w(&mcpm_power_up_setup_phys);
}
diff --git a/arch/arm/mach-alpine/platsmp.c b/arch/arm/mach-alpine/platsmp.c
index dd77ea25e7ca..6dc6d491f88a 100644
--- a/arch/arm/mach-alpine/platsmp.c
+++ b/arch/arm/mach-alpine/platsmp.c
@@ -27,7 +27,7 @@ static int alpine_boot_secondary(unsigned int cpu, struct task_struct *idle)
{
phys_addr_t addr;
- addr = virt_to_phys(secondary_startup);
+ addr = __pa_symbol(secondary_startup);
if (addr > (phys_addr_t)(uint32_t)(-1)) {
pr_err("FAIL: resume address over 32bit (%pa)", &addr);
diff --git a/arch/arm/mach-axxia/platsmp.c b/arch/arm/mach-axxia/platsmp.c
index ffbd71d45008..502e3df69f69 100644
--- a/arch/arm/mach-axxia/platsmp.c
+++ b/arch/arm/mach-axxia/platsmp.c
@@ -25,7 +25,7 @@
static void write_release_addr(u32 release_phys)
{
u32 *virt = (u32 *) phys_to_virt(release_phys);
- writel_relaxed(virt_to_phys(secondary_startup), virt);
+ writel_relaxed(__pa_symbol(secondary_startup), virt);
/* Make sure this store is visible to other CPUs */
smp_wmb();
__cpuc_flush_dcache_area(virt, sizeof(u32));
diff --git a/arch/arm/mach-bcm/bcm63xx_smp.c b/arch/arm/mach-bcm/bcm63xx_smp.c
index 9b6727ed68cd..f5fb10b4376f 100644
--- a/arch/arm/mach-bcm/bcm63xx_smp.c
+++ b/arch/arm/mach-bcm/bcm63xx_smp.c
@@ -135,7 +135,7 @@ static int bcm63138_smp_boot_secondary(unsigned int cpu,
}
/* Write the secondary init routine to the BootLUT reset vector */
- val = virt_to_phys(secondary_startup);
+ val = __pa_symbol(secondary_startup);
writel_relaxed(val, bootlut_base + BOOTLUT_RESET_VECT);
/* Power up the core, will jump straight to its reset vector when we
diff --git a/arch/arm/mach-bcm/platsmp-brcmstb.c b/arch/arm/mach-bcm/platsmp-brcmstb.c
index 40dc8448445e..12379960e982 100644
--- a/arch/arm/mach-bcm/platsmp-brcmstb.c
+++ b/arch/arm/mach-bcm/platsmp-brcmstb.c
@@ -151,7 +151,7 @@ static void brcmstb_cpu_boot(u32 cpu)
* Set the reset vector to point to the secondary_startup
* routine
*/
- cpu_set_boot_addr(cpu, virt_to_phys(secondary_startup));
+ cpu_set_boot_addr(cpu, __pa_symbol(secondary_startup));
/* Unhalt the cpu */
cpu_rst_cfg_set(cpu, 0);
diff --git a/arch/arm/mach-bcm/platsmp.c b/arch/arm/mach-bcm/platsmp.c
index 3ac3a9bc663c..582886d0d02f 100644
--- a/arch/arm/mach-bcm/platsmp.c
+++ b/arch/arm/mach-bcm/platsmp.c
@@ -116,7 +116,7 @@ static int nsp_write_lut(unsigned int cpu)
return -ENOMEM;
}
- secondary_startup_phy = virt_to_phys(secondary_startup);
+ secondary_startup_phy = __pa_symbol(secondary_startup);
BUG_ON(secondary_startup_phy > (phys_addr_t)U32_MAX);
writel_relaxed(secondary_startup_phy, sku_rom_lut);
@@ -189,7 +189,7 @@ static int kona_boot_secondary(unsigned int cpu, struct task_struct *idle)
* Secondary cores will start in secondary_startup(),
* defined in "arch/arm/kernel/head.S"
*/
- boot_func = virt_to_phys(secondary_startup);
+ boot_func = __pa_symbol(secondary_startup);
BUG_ON(boot_func & BOOT_ADDR_CPUID_MASK);
BUG_ON(boot_func > (phys_addr_t)U32_MAX);
diff --git a/arch/arm/mach-berlin/platsmp.c b/arch/arm/mach-berlin/platsmp.c
index 93f90688db18..1167b0ed92c8 100644
--- a/arch/arm/mach-berlin/platsmp.c
+++ b/arch/arm/mach-berlin/platsmp.c
@@ -92,7 +92,7 @@ static void __init berlin_smp_prepare_cpus(unsigned int max_cpus)
* Write the secondary startup address into the SW reset address
* vector. This is used by boot_inst.
*/
- writel(virt_to_phys(secondary_startup), vectors_base + SW_RESET_ADDR);
+ writel(__pa_symbol(secondary_startup), vectors_base + SW_RESET_ADDR);
iounmap(vectors_base);
unmap_scu:
diff --git a/arch/arm/mach-exynos/firmware.c b/arch/arm/mach-exynos/firmware.c
index fd6da5419b51..e81a78b125d9 100644
--- a/arch/arm/mach-exynos/firmware.c
+++ b/arch/arm/mach-exynos/firmware.c
@@ -41,7 +41,7 @@ static int exynos_do_idle(unsigned long mode)
case FW_DO_IDLE_AFTR:
if (read_cpuid_part() == ARM_CPU_PART_CORTEX_A9)
exynos_save_cp15();
- writel_relaxed(virt_to_phys(exynos_cpu_resume_ns),
+ writel_relaxed(__pa_symbol(exynos_cpu_resume_ns),
sysram_ns_base_addr + 0x24);
writel_relaxed(EXYNOS_AFTR_MAGIC, sysram_ns_base_addr + 0x20);
if (soc_is_exynos3250()) {
@@ -135,7 +135,7 @@ static int exynos_suspend(void)
exynos_save_cp15();
writel(EXYNOS_SLEEP_MAGIC, sysram_ns_base_addr + EXYNOS_BOOT_FLAG);
- writel(virt_to_phys(exynos_cpu_resume_ns),
+ writel(__pa_symbol(exynos_cpu_resume_ns),
sysram_ns_base_addr + EXYNOS_BOOT_ADDR);
return cpu_suspend(0, exynos_cpu_suspend);
diff --git a/arch/arm/mach-exynos/mcpm-exynos.c b/arch/arm/mach-exynos/mcpm-exynos.c
index f086bf615b29..214a9cfa92e9 100644
--- a/arch/arm/mach-exynos/mcpm-exynos.c
+++ b/arch/arm/mach-exynos/mcpm-exynos.c
@@ -221,7 +221,7 @@ static void exynos_mcpm_setup_entry_point(void)
*/
__raw_writel(0xe59f0000, ns_sram_base_addr); /* ldr r0, [pc, #0] */
__raw_writel(0xe12fff10, ns_sram_base_addr + 4); /* bx r0 */
- __raw_writel(virt_to_phys(mcpm_entry_point), ns_sram_base_addr + 8);
+ __raw_writel(__pa_symbol(mcpm_entry_point), ns_sram_base_addr + 8);
}
static struct syscore_ops exynos_mcpm_syscore_ops = {
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index 98ffe1e62ad5..9f4949f7ed88 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@ -353,7 +353,7 @@ static int exynos_boot_secondary(unsigned int cpu, struct task_struct *idle)
smp_rmb();
- boot_addr = virt_to_phys(exynos4_secondary_startup);
+ boot_addr = __pa_symbol(exynos4_secondary_startup);
ret = exynos_set_boot_addr(core_id, boot_addr);
if (ret)
@@ -443,7 +443,7 @@ static void __init exynos_smp_prepare_cpus(unsigned int max_cpus)
mpidr = cpu_logical_map(i);
core_id = MPIDR_AFFINITY_LEVEL(mpidr, 0);
- boot_addr = virt_to_phys(exynos4_secondary_startup);
+ boot_addr = __pa_symbol(exynos4_secondary_startup);
ret = exynos_set_boot_addr(core_id, boot_addr);
if (ret)
diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c
index 487295f4a56b..1a7e5b5d08d8 100644
--- a/arch/arm/mach-exynos/pm.c
+++ b/arch/arm/mach-exynos/pm.c
@@ -132,7 +132,7 @@ static void exynos_set_wakeupmask(long mask)
static void exynos_cpu_set_boot_vector(long flags)
{
- writel_relaxed(virt_to_phys(exynos_cpu_resume),
+ writel_relaxed(__pa_symbol(exynos_cpu_resume),
exynos_boot_vector_addr());
writel_relaxed(flags, exynos_boot_vector_flag());
}
@@ -238,7 +238,7 @@ static int exynos_cpu0_enter_aftr(void)
abort:
if (cpu_online(1)) {
- unsigned long boot_addr = virt_to_phys(exynos_cpu_resume);
+ unsigned long boot_addr = __pa_symbol(exynos_cpu_resume);
/*
* Set the boot vector to something non-zero
@@ -330,7 +330,7 @@ static int exynos_cpu1_powerdown(void)
static void exynos_pre_enter_aftr(void)
{
- unsigned long boot_addr = virt_to_phys(exynos_cpu_resume);
+ unsigned long boot_addr = __pa_symbol(exynos_cpu_resume);
(void)exynos_set_boot_addr(1, boot_addr);
}
diff --git a/arch/arm/mach-exynos/suspend.c b/arch/arm/mach-exynos/suspend.c
index 06332f626565..97765be2cc12 100644
--- a/arch/arm/mach-exynos/suspend.c
+++ b/arch/arm/mach-exynos/suspend.c
@@ -344,7 +344,7 @@ static void exynos_pm_prepare(void)
exynos_pm_enter_sleep_mode();
/* ensure at least INFORM0 has the resume address */
- pmu_raw_writel(virt_to_phys(exynos_cpu_resume), S5P_INFORM0);
+ pmu_raw_writel(__pa_symbol(exynos_cpu_resume), S5P_INFORM0);
}
static void exynos3250_pm_prepare(void)
@@ -361,7 +361,7 @@ static void exynos3250_pm_prepare(void)
exynos_pm_enter_sleep_mode();
/* ensure at least INFORM0 has the resume address */
- pmu_raw_writel(virt_to_phys(exynos_cpu_resume), S5P_INFORM0);
+ pmu_raw_writel(__pa_symbol(exynos_cpu_resume), S5P_INFORM0);
}
static void exynos5420_pm_prepare(void)
@@ -386,7 +386,7 @@ static void exynos5420_pm_prepare(void)
/* ensure at least INFORM0 has the resume address */
if (IS_ENABLED(CONFIG_EXYNOS5420_MCPM))
- pmu_raw_writel(virt_to_phys(mcpm_entry_point), S5P_INFORM0);
+ pmu_raw_writel(__pa_symbol(mcpm_entry_point), S5P_INFORM0);
tmp = pmu_raw_readl(EXYNOS5_ARM_L2_OPTION);
tmp &= ~EXYNOS5_USE_RETENTION;
diff --git a/arch/arm/mach-hisi/platmcpm.c b/arch/arm/mach-hisi/platmcpm.c
index 4b653a8cb75c..a6c117622d67 100644
--- a/arch/arm/mach-hisi/platmcpm.c
+++ b/arch/arm/mach-hisi/platmcpm.c
@@ -327,7 +327,7 @@ static int __init hip04_smp_init(void)
*/
writel_relaxed(hip04_boot_method[0], relocation);
writel_relaxed(0xa5a5a5a5, relocation + 4); /* magic number */
- writel_relaxed(virt_to_phys(secondary_startup), relocation + 8);
+ writel_relaxed(__pa_symbol(secondary_startup), relocation + 8);
writel_relaxed(0, relocation + 12);
iounmap(relocation);
diff --git a/arch/arm/mach-hisi/platsmp.c b/arch/arm/mach-hisi/platsmp.c
index e1d67648d5d0..91bb02dec20f 100644
--- a/arch/arm/mach-hisi/platsmp.c
+++ b/arch/arm/mach-hisi/platsmp.c
@@ -28,7 +28,7 @@ void hi3xxx_set_cpu_jump(int cpu, void *jump_addr)
cpu = cpu_logical_map(cpu);
if (!cpu || !ctrl_base)
return;
- writel_relaxed(virt_to_phys(jump_addr), ctrl_base + ((cpu - 1) << 2));
+ writel_relaxed(__pa_symbol(jump_addr), ctrl_base + ((cpu - 1) << 2));
}
int hi3xxx_get_cpu_jump(int cpu)
@@ -118,7 +118,7 @@ static int hix5hd2_boot_secondary(unsigned int cpu, struct task_struct *idle)
{
phys_addr_t jumpaddr;
- jumpaddr = virt_to_phys(secondary_startup);
+ jumpaddr = __pa_symbol(secondary_startup);
hix5hd2_set_scu_boot_addr(HIX5HD2_BOOT_ADDRESS, jumpaddr);
hix5hd2_set_cpu(cpu, true);
arch_send_wakeup_ipi_mask(cpumask_of(cpu));
@@ -156,7 +156,7 @@ static int hip01_boot_secondary(unsigned int cpu, struct task_struct *idle)
struct device_node *node;
- jumpaddr = virt_to_phys(secondary_startup);
+ jumpaddr = __pa_symbol(secondary_startup);
hip01_set_boot_addr(HIP01_BOOT_ADDRESS, jumpaddr);
node = of_find_compatible_node(NULL, NULL, "hisilicon,hip01-sysctrl");
diff --git a/arch/arm/mach-imx/platsmp.c b/arch/arm/mach-imx/platsmp.c
index 711dbbd5badd..c2d1b329fba1 100644
--- a/arch/arm/mach-imx/platsmp.c
+++ b/arch/arm/mach-imx/platsmp.c
@@ -117,7 +117,7 @@ static void __init ls1021a_smp_prepare_cpus(unsigned int max_cpus)
dcfg_base = of_iomap(np, 0);
BUG_ON(!dcfg_base);
- paddr = virt_to_phys(secondary_startup);
+ paddr = __pa_symbol(secondary_startup);
writel_relaxed(cpu_to_be32(paddr), dcfg_base + DCFG_CCSR_SCRATCHRW1);
iounmap(dcfg_base);
diff --git a/arch/arm/mach-imx/pm-imx6.c b/arch/arm/mach-imx/pm-imx6.c
index 1515e498d348..e61b1d1027e1 100644
--- a/arch/arm/mach-imx/pm-imx6.c
+++ b/arch/arm/mach-imx/pm-imx6.c
@@ -499,7 +499,7 @@ static int __init imx6q_suspend_init(const struct imx6_pm_socdata *socdata)
memset(suspend_ocram_base, 0, sizeof(*pm_info));
pm_info = suspend_ocram_base;
pm_info->pbase = ocram_pbase;
- pm_info->resume_addr = virt_to_phys(v7_cpu_resume);
+ pm_info->resume_addr = __pa_symbol(v7_cpu_resume);
pm_info->pm_info_size = sizeof(*pm_info);
/*
diff --git a/arch/arm/mach-imx/src.c b/arch/arm/mach-imx/src.c
index 70b083fe934a..495d85d0fe7e 100644
--- a/arch/arm/mach-imx/src.c
+++ b/arch/arm/mach-imx/src.c
@@ -99,7 +99,7 @@ void imx_enable_cpu(int cpu, bool enable)
void imx_set_cpu_jump(int cpu, void *jump_addr)
{
cpu = cpu_logical_map(cpu);
- writel_relaxed(virt_to_phys(jump_addr),
+ writel_relaxed(__pa_symbol(jump_addr),
src_base + SRC_GPR1 + cpu * 8);
}
diff --git a/arch/arm/mach-mediatek/platsmp.c b/arch/arm/mach-mediatek/platsmp.c
index b821e34474b6..726eb69bb655 100644
--- a/arch/arm/mach-mediatek/platsmp.c
+++ b/arch/arm/mach-mediatek/platsmp.c
@@ -122,7 +122,7 @@ static void __init __mtk_smp_prepare_cpus(unsigned int max_cpus, int trustzone)
* write the address of slave startup address into the system-wide
* jump register
*/
- writel_relaxed(virt_to_phys(secondary_startup_arm),
+ writel_relaxed(__pa_symbol(secondary_startup_arm),
mtk_smp_base + mtk_smp_info->jump_reg);
}
diff --git a/arch/arm/mach-mvebu/pm.c b/arch/arm/mach-mvebu/pm.c
index 2990c5269b18..c487be61d6d8 100644
--- a/arch/arm/mach-mvebu/pm.c
+++ b/arch/arm/mach-mvebu/pm.c
@@ -110,7 +110,7 @@ static void mvebu_pm_store_armadaxp_bootinfo(u32 *store_addr)
{
phys_addr_t resume_pc;
- resume_pc = virt_to_phys(armada_370_xp_cpu_resume);
+ resume_pc = __pa_symbol(armada_370_xp_cpu_resume);
/*
* The bootloader expects the first two words to be a magic
diff --git a/arch/arm/mach-mvebu/pmsu.c b/arch/arm/mach-mvebu/pmsu.c
index f39bd51bce18..27a78c80e5b1 100644
--- a/arch/arm/mach-mvebu/pmsu.c
+++ b/arch/arm/mach-mvebu/pmsu.c
@@ -112,7 +112,7 @@ static const struct of_device_id of_pmsu_table[] = {
void mvebu_pmsu_set_cpu_boot_addr(int hw_cpu, void *boot_addr)
{
- writel(virt_to_phys(boot_addr), pmsu_mp_base +
+ writel(__pa_symbol(boot_addr), pmsu_mp_base +
PMSU_BOOT_ADDR_REDIRECT_OFFSET(hw_cpu));
}
diff --git a/arch/arm/mach-mvebu/system-controller.c b/arch/arm/mach-mvebu/system-controller.c
index 76cbc82a7407..04d9ebe6a90a 100644
--- a/arch/arm/mach-mvebu/system-controller.c
+++ b/arch/arm/mach-mvebu/system-controller.c
@@ -153,7 +153,7 @@ void mvebu_system_controller_set_cpu_boot_addr(void *boot_addr)
if (of_machine_is_compatible("marvell,armada375"))
mvebu_armada375_smp_wa_init();
- writel(virt_to_phys(boot_addr), system_controller_base +
+ writel(__pa_symbol(boot_addr), system_controller_base +
mvebu_sc->resume_boot_addr);
}
#endif
diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c
index 1662071bb2cc..bd8089ff929f 100644
--- a/arch/arm/mach-omap2/control.c
+++ b/arch/arm/mach-omap2/control.c
@@ -315,15 +315,15 @@ void omap3_save_scratchpad_contents(void)
scratchpad_contents.boot_config_ptr = 0x0;
if (cpu_is_omap3630())
scratchpad_contents.public_restore_ptr =
- virt_to_phys(omap3_restore_3630);
+ __pa_symbol(omap3_restore_3630);
else if (omap_rev() != OMAP3430_REV_ES3_0 &&
omap_rev() != OMAP3430_REV_ES3_1 &&
omap_rev() != OMAP3430_REV_ES3_1_2)
scratchpad_contents.public_restore_ptr =
- virt_to_phys(omap3_restore);
+ __pa_symbol(omap3_restore);
else
scratchpad_contents.public_restore_ptr =
- virt_to_phys(omap3_restore_es3);
+ __pa_symbol(omap3_restore_es3);
if (omap_type() == OMAP2_DEVICE_TYPE_GP)
scratchpad_contents.secure_ram_restore_ptr = 0x0;
@@ -395,7 +395,7 @@ void omap3_save_scratchpad_contents(void)
sdrc_block_contents.flags = 0x0;
sdrc_block_contents.block_size = 0x0;
- arm_context_addr = virt_to_phys(omap3_arm_context);
+ arm_context_addr = __pa_symbol(omap3_arm_context);
/* Copy all the contents to the scratchpad location */
scratchpad_address = OMAP2_L4_IO_ADDRESS(OMAP343X_SCRATCHPAD);
diff --git a/arch/arm/mach-omap2/omap-mpuss-lowpower.c b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
index ad982465efd0..d1e03c03219e 100644
--- a/arch/arm/mach-omap2/omap-mpuss-lowpower.c
+++ b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
@@ -273,7 +273,7 @@ int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state)
cpu_clear_prev_logic_pwrst(cpu);
pwrdm_set_next_pwrst(pm_info->pwrdm, power_state);
pwrdm_set_logic_retst(pm_info->pwrdm, cpu_logic_state);
- set_cpu_wakeup_addr(cpu, virt_to_phys(omap_pm_ops.resume));
+ set_cpu_wakeup_addr(cpu, __pa_symbol(omap_pm_ops.resume));
omap_pm_ops.scu_prepare(cpu, power_state);
l2x0_pwrst_prepare(cpu, save_state);
@@ -325,7 +325,7 @@ int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state)
pwrdm_clear_all_prev_pwrst(pm_info->pwrdm);
pwrdm_set_next_pwrst(pm_info->pwrdm, power_state);
- set_cpu_wakeup_addr(cpu, virt_to_phys(omap_pm_ops.hotplug_restart));
+ set_cpu_wakeup_addr(cpu, __pa_symbol(omap_pm_ops.hotplug_restart));
omap_pm_ops.scu_prepare(cpu, power_state);
/*
@@ -459,9 +459,9 @@ void __init omap4_mpuss_early_init(void)
sar_base = omap4_get_sar_ram_base();
if (cpu_is_omap443x())
- startup_pa = virt_to_phys(omap4_secondary_startup);
+ startup_pa = __pa_symbol(omap4_secondary_startup);
else
- startup_pa = virt_to_phys(omap4460_secondary_startup);
+ startup_pa = __pa_symbol(omap4460_secondary_startup);
writel_relaxed(startup_pa, sar_base + CPU1_WAKEUP_NS_PA_ADDR_OFFSET);
}
diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c
index b4de3da6dffa..003353b0b794 100644
--- a/arch/arm/mach-omap2/omap-smp.c
+++ b/arch/arm/mach-omap2/omap-smp.c
@@ -316,9 +316,9 @@ static void __init omap4_smp_prepare_cpus(unsigned int max_cpus)
* A barrier is added to ensure that write buffer is drained
*/
if (omap_secure_apis_support())
- omap_auxcoreboot_addr(virt_to_phys(cfg.startup_addr));
+ omap_auxcoreboot_addr(__pa_symbol(cfg.startup_addr));
else
- writel_relaxed(virt_to_phys(cfg.startup_addr),
+ writel_relaxed(__pa_symbol(cfg.startup_addr),
base + OMAP_AUX_CORE_BOOT_1);
}
diff --git a/arch/arm/mach-prima2/platsmp.c b/arch/arm/mach-prima2/platsmp.c
index 0875b99add18..75ef5d4be554 100644
--- a/arch/arm/mach-prima2/platsmp.c
+++ b/arch/arm/mach-prima2/platsmp.c
@@ -65,7 +65,7 @@ static int sirfsoc_boot_secondary(unsigned int cpu, struct task_struct *idle)
* waiting for. This would wake up the secondary core from WFE
*/
#define SIRFSOC_CPU1_JUMPADDR_OFFSET 0x2bc
- __raw_writel(virt_to_phys(sirfsoc_secondary_startup),
+ __raw_writel(__pa_symbol(sirfsoc_secondary_startup),
clk_base + SIRFSOC_CPU1_JUMPADDR_OFFSET);
#define SIRFSOC_CPU1_WAKEMAGIC_OFFSET 0x2b8
diff --git a/arch/arm/mach-prima2/pm.c b/arch/arm/mach-prima2/pm.c
index 83e94c95e314..b0bcf1ff02dd 100644
--- a/arch/arm/mach-prima2/pm.c
+++ b/arch/arm/mach-prima2/pm.c
@@ -54,7 +54,7 @@ static void sirfsoc_set_sleep_mode(u32 mode)
static int sirfsoc_pre_suspend_power_off(void)
{
- u32 wakeup_entry = virt_to_phys(cpu_resume);
+ u32 wakeup_entry = __pa_symbol(cpu_resume);
sirfsoc_rtc_iobrg_writel(wakeup_entry, sirfsoc_pwrc_base +
SIRFSOC_PWRC_SCRATCH_PAD1);
diff --git a/arch/arm/mach-pxa/palmz72.c b/arch/arm/mach-pxa/palmz72.c
index 9c308de158c6..29630061e700 100644
--- a/arch/arm/mach-pxa/palmz72.c
+++ b/arch/arm/mach-pxa/palmz72.c
@@ -249,7 +249,7 @@ static int palmz72_pm_suspend(void)
store_ptr = *PALMZ72_SAVE_DWORD;
/* Setting PSPR to a proper value */
- PSPR = virt_to_phys(&palmz72_resume_info);
+ PSPR = __pa_symbol(&palmz72_resume_info);
return 0;
}
diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c
index 12b94357fbc1..d16ffcab0e45 100644
--- a/arch/arm/mach-pxa/pxa25x.c
+++ b/arch/arm/mach-pxa/pxa25x.c
@@ -85,7 +85,7 @@ static void pxa25x_cpu_pm_enter(suspend_state_t state)
static int pxa25x_cpu_pm_prepare(void)
{
/* set resume return address */
- PSPR = virt_to_phys(cpu_resume);
+ PSPR = __pa_symbol(cpu_resume);
return 0;
}
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c
index c0185c5c5a08..9b69be4e9fe3 100644
--- a/arch/arm/mach-pxa/pxa27x.c
+++ b/arch/arm/mach-pxa/pxa27x.c
@@ -168,7 +168,7 @@ static int pxa27x_cpu_pm_valid(suspend_state_t state)
static int pxa27x_cpu_pm_prepare(void)
{
/* set resume return address */
- PSPR = virt_to_phys(cpu_resume);
+ PSPR = __pa_symbol(cpu_resume);
return 0;
}
diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c
index 87acc96388c7..0cc9f124c9ac 100644
--- a/arch/arm/mach-pxa/pxa3xx.c
+++ b/arch/arm/mach-pxa/pxa3xx.c
@@ -123,7 +123,7 @@ static void pxa3xx_cpu_pm_suspend(void)
PSPR = 0x5c014000;
/* overwrite with the resume address */
- *p = virt_to_phys(cpu_resume);
+ *p = __pa_symbol(cpu_resume);
cpu_suspend(0, pxa3xx_finish_suspend);
diff --git a/arch/arm/mach-realview/platsmp-dt.c b/arch/arm/mach-realview/platsmp-dt.c
index 70ca99eb52c6..2edd1715bd94 100644
--- a/arch/arm/mach-realview/platsmp-dt.c
+++ b/arch/arm/mach-realview/platsmp-dt.c
@@ -76,7 +76,7 @@ static void __init realview_smp_prepare_cpus(unsigned int max_cpus)
}
/* Put the boot address in this magic register */
regmap_write(map, REALVIEW_SYS_FLAGSSET_OFFSET,
- virt_to_phys(versatile_secondary_startup));
+ __pa_symbol((versatile_secondary_startup));)
}
static const struct smp_operations realview_dt_smp_ops __initconst = {
diff --git a/arch/arm/mach-rockchip/platsmp.c b/arch/arm/mach-rockchip/platsmp.c
index 4d827a069d49..3abafdbdd7f4 100644
--- a/arch/arm/mach-rockchip/platsmp.c
+++ b/arch/arm/mach-rockchip/platsmp.c
@@ -156,7 +156,7 @@ static int rockchip_boot_secondary(unsigned int cpu, struct task_struct *idle)
*/
mdelay(1); /* ensure the cpus other than cpu0 to startup */
- writel(virt_to_phys(secondary_startup), sram_base_addr + 8);
+ writel(__pa_symbol(secondary_startup), sram_base_addr + 8);
writel(0xDEADBEAF, sram_base_addr + 4);
dsb_sev();
}
@@ -195,7 +195,7 @@ static int __init rockchip_smp_prepare_sram(struct device_node *node)
}
/* set the boot function for the sram code */
- rockchip_boot_fn = virt_to_phys(secondary_startup);
+ rockchip_boot_fn = __pa_symbol(secondary_startup);
/* copy the trampoline to sram, that runs during startup of the core */
memcpy(sram_base_addr, &rockchip_secondary_trampoline, trampoline_sz);
diff --git a/arch/arm/mach-rockchip/pm.c b/arch/arm/mach-rockchip/pm.c
index bee8c8051929..0592534e0b88 100644
--- a/arch/arm/mach-rockchip/pm.c
+++ b/arch/arm/mach-rockchip/pm.c
@@ -62,7 +62,7 @@ static inline u32 rk3288_l2_config(void)
static void rk3288_config_bootdata(void)
{
rkpm_bootdata_cpusp = rk3288_bootram_phy + (SZ_4K - 8);
- rkpm_bootdata_cpu_code = virt_to_phys(cpu_resume);
+ rkpm_bootdata_cpu_code = __pa_symbol(cpu_resume);
rkpm_bootdata_l2ctlr_f = 1;
rkpm_bootdata_l2ctlr = rk3288_l2_config();
diff --git a/arch/arm/mach-s3c24xx/mach-jive.c b/arch/arm/mach-s3c24xx/mach-jive.c
index 7d99fe8f6157..4f2ffca88e6c 100644
--- a/arch/arm/mach-s3c24xx/mach-jive.c
+++ b/arch/arm/mach-s3c24xx/mach-jive.c
@@ -483,7 +483,7 @@ static int jive_pm_suspend(void)
* correct address to resume from. */
__raw_writel(0x2BED, S3C2412_INFORM0);
- __raw_writel(virt_to_phys(s3c_cpu_resume), S3C2412_INFORM1);
+ __raw_writel(__pa_symbol(s3c_cpu_resume), S3C2412_INFORM1);
return 0;
}
diff --git a/arch/arm/mach-s3c24xx/pm-s3c2410.c b/arch/arm/mach-s3c24xx/pm-s3c2410.c
index 20e481d8a33a..a4588daeddb0 100644
--- a/arch/arm/mach-s3c24xx/pm-s3c2410.c
+++ b/arch/arm/mach-s3c24xx/pm-s3c2410.c
@@ -45,7 +45,7 @@ static void s3c2410_pm_prepare(void)
{
/* ensure at least GSTATUS3 has the resume address */
- __raw_writel(virt_to_phys(s3c_cpu_resume), S3C2410_GSTATUS3);
+ __raw_writel(__pa_symbol(s3c_cpu_resume), S3C2410_GSTATUS3);
S3C_PMDBG("GSTATUS3 0x%08x\n", __raw_readl(S3C2410_GSTATUS3));
S3C_PMDBG("GSTATUS4 0x%08x\n", __raw_readl(S3C2410_GSTATUS4));
diff --git a/arch/arm/mach-s3c24xx/pm-s3c2416.c b/arch/arm/mach-s3c24xx/pm-s3c2416.c
index c0e328e37bd6..b5bbf0d5985c 100644
--- a/arch/arm/mach-s3c24xx/pm-s3c2416.c
+++ b/arch/arm/mach-s3c24xx/pm-s3c2416.c
@@ -48,7 +48,7 @@ static void s3c2416_pm_prepare(void)
* correct address to resume from.
*/
__raw_writel(0x2BED, S3C2412_INFORM0);
- __raw_writel(virt_to_phys(s3c_cpu_resume), S3C2412_INFORM1);
+ __raw_writel(__pa_symbol(s3c_cpu_resume), S3C2412_INFORM1);
}
static int s3c2416_pm_add(struct device *dev, struct subsys_interface *sif)
diff --git a/arch/arm/mach-s3c64xx/pm.c b/arch/arm/mach-s3c64xx/pm.c
index 59d91b83b03d..945a9d1e1a71 100644
--- a/arch/arm/mach-s3c64xx/pm.c
+++ b/arch/arm/mach-s3c64xx/pm.c
@@ -304,7 +304,7 @@ static void s3c64xx_pm_prepare(void)
wake_irqs, ARRAY_SIZE(wake_irqs));
/* store address of resume. */
- __raw_writel(virt_to_phys(s3c_cpu_resume), S3C64XX_INFORM0);
+ __raw_writel(__pa_symbol(s3c_cpu_resume), S3C64XX_INFORM0);
/* ensure previous wakeup state is cleared before sleeping */
__raw_writel(__raw_readl(S3C64XX_WAKEUP_STAT), S3C64XX_WAKEUP_STAT);
diff --git a/arch/arm/mach-s5pv210/pm.c b/arch/arm/mach-s5pv210/pm.c
index 21b4b13c5ab7..2d5f08015e34 100644
--- a/arch/arm/mach-s5pv210/pm.c
+++ b/arch/arm/mach-s5pv210/pm.c
@@ -69,7 +69,7 @@ static void s5pv210_pm_prepare(void)
__raw_writel(s5pv210_irqwake_intmask, S5P_WAKEUP_MASK);
/* ensure at least INFORM0 has the resume address */
- __raw_writel(virt_to_phys(s5pv210_cpu_resume), S5P_INFORM0);
+ __raw_writel(__pa_symbol(s5pv210_cpu_resume), S5P_INFORM0);
tmp = __raw_readl(S5P_SLEEP_CFG);
tmp &= ~(S5P_SLEEP_CFG_OSC_EN | S5P_SLEEP_CFG_USBOSC_EN);
diff --git a/arch/arm/mach-sa1100/pm.c b/arch/arm/mach-sa1100/pm.c
index 34853d5dfda2..9a7079f565bd 100644
--- a/arch/arm/mach-sa1100/pm.c
+++ b/arch/arm/mach-sa1100/pm.c
@@ -73,7 +73,7 @@ static int sa11x0_pm_enter(suspend_state_t state)
RCSR = RCSR_HWR | RCSR_SWR | RCSR_WDR | RCSR_SMR;
/* set resume return address */
- PSPR = virt_to_phys(cpu_resume);
+ PSPR = __pa_symbol(cpu_resume);
/* go zzz */
cpu_suspend(0, sa1100_finish_suspend);
diff --git a/arch/arm/mach-shmobile/platsmp-apmu.c b/arch/arm/mach-shmobile/platsmp-apmu.c
index 0c6bb458b7a4..71729b8d1900 100644
--- a/arch/arm/mach-shmobile/platsmp-apmu.c
+++ b/arch/arm/mach-shmobile/platsmp-apmu.c
@@ -171,7 +171,7 @@ static void apmu_parse_dt(void (*fn)(struct resource *res, int cpu, int bit))
static void __init shmobile_smp_apmu_setup_boot(void)
{
/* install boot code shared by all CPUs */
- shmobile_boot_fn = virt_to_phys(shmobile_smp_boot);
+ shmobile_boot_fn = __pa_symbol(shmobile_smp_boot);
}
void __init shmobile_smp_apmu_prepare_cpus(unsigned int max_cpus,
@@ -185,7 +185,7 @@ void __init shmobile_smp_apmu_prepare_cpus(unsigned int max_cpus,
int shmobile_smp_apmu_boot_secondary(unsigned int cpu, struct task_struct *idle)
{
/* For this particular CPU register boot vector */
- shmobile_smp_hook(cpu, virt_to_phys(secondary_startup), 0);
+ shmobile_smp_hook(cpu, __pa_symbol(secondary_startup), 0);
return apmu_wrap(cpu, apmu_power_on);
}
@@ -301,7 +301,7 @@ int shmobile_smp_apmu_cpu_kill(unsigned int cpu)
#if defined(CONFIG_SUSPEND)
static int shmobile_smp_apmu_do_suspend(unsigned long cpu)
{
- shmobile_smp_hook(cpu, virt_to_phys(cpu_resume), 0);
+ shmobile_smp_hook(cpu, __pa_symbol(cpu_resume), 0);
shmobile_smp_apmu_cpu_shutdown(cpu);
cpu_do_idle(); /* WFI selects Core Standby */
return 1;
diff --git a/arch/arm/mach-shmobile/platsmp-scu.c b/arch/arm/mach-shmobile/platsmp-scu.c
index d1ecaf37d142..f1a1efde4beb 100644
--- a/arch/arm/mach-shmobile/platsmp-scu.c
+++ b/arch/arm/mach-shmobile/platsmp-scu.c
@@ -24,7 +24,7 @@ static void __iomem *shmobile_scu_base;
static int shmobile_scu_cpu_prepare(unsigned int cpu)
{
/* For this particular CPU register SCU SMP boot vector */
- shmobile_smp_hook(cpu, virt_to_phys(shmobile_boot_scu),
+ shmobile_smp_hook(cpu, __pa_symbol(shmobile_boot_scu),
shmobile_scu_base_phys);
return 0;
}
@@ -33,7 +33,7 @@ void __init shmobile_smp_scu_prepare_cpus(phys_addr_t scu_base_phys,
unsigned int max_cpus)
{
/* install boot code shared by all CPUs */
- shmobile_boot_fn = virt_to_phys(shmobile_smp_boot);
+ shmobile_boot_fn = __pa_symbol(shmobile_smp_boot);
/* enable SCU and cache coherency on booting CPU */
shmobile_scu_base_phys = scu_base_phys;
diff --git a/arch/arm/mach-socfpga/platsmp.c b/arch/arm/mach-socfpga/platsmp.c
index 07945748b571..0ee76772b507 100644
--- a/arch/arm/mach-socfpga/platsmp.c
+++ b/arch/arm/mach-socfpga/platsmp.c
@@ -40,7 +40,7 @@ static int socfpga_boot_secondary(unsigned int cpu, struct task_struct *idle)
memcpy(phys_to_virt(0), &secondary_trampoline, trampoline_size);
- writel(virt_to_phys(secondary_startup),
+ writel(__pa_symbol(secondary_startup),
sys_manager_base_addr + (socfpga_cpu1start_addr & 0x000000ff));
flush_cache_all();
@@ -63,7 +63,7 @@ static int socfpga_a10_boot_secondary(unsigned int cpu, struct task_struct *idle
SOCFPGA_A10_RSTMGR_MODMPURST);
memcpy(phys_to_virt(0), &secondary_trampoline, trampoline_size);
- writel(virt_to_phys(secondary_startup),
+ writel(__pa_symbol(secondary_startup),
sys_manager_base_addr + (socfpga_cpu1start_addr & 0x00000fff));
flush_cache_all();
diff --git a/arch/arm/mach-spear/platsmp.c b/arch/arm/mach-spear/platsmp.c
index 8d1e2d551786..39038a03836a 100644
--- a/arch/arm/mach-spear/platsmp.c
+++ b/arch/arm/mach-spear/platsmp.c
@@ -117,7 +117,7 @@ static void __init spear13xx_smp_prepare_cpus(unsigned int max_cpus)
* (presently it is in SRAM). The BootMonitor waits until it receives a
* soft interrupt, and then the secondary CPU branches to this address.
*/
- __raw_writel(virt_to_phys(spear13xx_secondary_startup), SYS_LOCATION);
+ __raw_writel(__pa_symbol(spear13xx_secondary_startup), SYS_LOCATION);
}
const struct smp_operations spear13xx_smp_ops __initconst = {
diff --git a/arch/arm/mach-sti/platsmp.c b/arch/arm/mach-sti/platsmp.c
index ea5a2277ee46..231f19e17436 100644
--- a/arch/arm/mach-sti/platsmp.c
+++ b/arch/arm/mach-sti/platsmp.c
@@ -103,7 +103,7 @@ static void __init sti_smp_prepare_cpus(unsigned int max_cpus)
u32 __iomem *cpu_strt_ptr;
u32 release_phys;
int cpu;
- unsigned long entry_pa = virt_to_phys(sti_secondary_startup);
+ unsigned long entry_pa = __pa_symbol(sti_secondary_startup);
np = of_find_compatible_node(NULL, NULL, "arm,cortex-a9-scu");
diff --git a/arch/arm/mach-sunxi/platsmp.c b/arch/arm/mach-sunxi/platsmp.c
index 6642267812c9..8fb5088464db 100644
--- a/arch/arm/mach-sunxi/platsmp.c
+++ b/arch/arm/mach-sunxi/platsmp.c
@@ -80,7 +80,7 @@ static int sun6i_smp_boot_secondary(unsigned int cpu,
spin_lock(&cpu_lock);
/* Set CPU boot address */
- writel(virt_to_phys(secondary_startup),
+ writel(__pa_symbol(secondary_startup),
cpucfg_membase + CPUCFG_PRIVATE0_REG);
/* Assert the CPU core in reset */
@@ -162,7 +162,7 @@ static int sun8i_smp_boot_secondary(unsigned int cpu,
spin_lock(&cpu_lock);
/* Set CPU boot address */
- writel(virt_to_phys(secondary_startup),
+ writel(__pa_symbol(secondary_startup),
cpucfg_membase + CPUCFG_PRIVATE0_REG);
/* Assert the CPU core in reset */
diff --git a/arch/arm/mach-tango/platsmp.c b/arch/arm/mach-tango/platsmp.c
index 98c62a4a8623..2f0c6c050fed 100644
--- a/arch/arm/mach-tango/platsmp.c
+++ b/arch/arm/mach-tango/platsmp.c
@@ -5,7 +5,7 @@
static int tango_boot_secondary(unsigned int cpu, struct task_struct *idle)
{
- tango_set_aux_boot_addr(virt_to_phys(secondary_startup));
+ tango_set_aux_boot_addr(__pa_symbol(secondary_startup));
tango_start_aux_core(cpu);
return 0;
}
diff --git a/arch/arm/mach-tango/pm.c b/arch/arm/mach-tango/pm.c
index b05c6d6f99d0..406c0814eb6e 100644
--- a/arch/arm/mach-tango/pm.c
+++ b/arch/arm/mach-tango/pm.c
@@ -5,7 +5,7 @@
static int tango_pm_powerdown(unsigned long arg)
{
- tango_suspend(virt_to_phys(cpu_resume));
+ tango_suspend(__pa_symbol(cpu_resume));
return -EIO; /* tango_suspend has failed */
}
diff --git a/arch/arm/mach-tegra/reset.c b/arch/arm/mach-tegra/reset.c
index 6fd9db54887e..dc558892753c 100644
--- a/arch/arm/mach-tegra/reset.c
+++ b/arch/arm/mach-tegra/reset.c
@@ -94,14 +94,14 @@ void __init tegra_cpu_reset_handler_init(void)
__tegra_cpu_reset_handler_data[TEGRA_RESET_MASK_PRESENT] =
*((u32 *)cpu_possible_mask);
__tegra_cpu_reset_handler_data[TEGRA_RESET_STARTUP_SECONDARY] =
- virt_to_phys((void *)secondary_startup);
+ __pa_symbol((void *)secondary_startup);
#endif
#ifdef CONFIG_PM_SLEEP
__tegra_cpu_reset_handler_data[TEGRA_RESET_STARTUP_LP1] =
TEGRA_IRAM_LPx_RESUME_AREA;
__tegra_cpu_reset_handler_data[TEGRA_RESET_STARTUP_LP2] =
- virt_to_phys((void *)tegra_resume);
+ __pa_symbol((void *)tegra_resume);
#endif
tegra_cpu_reset_handler_enable();
diff --git a/arch/arm/mach-ux500/platsmp.c b/arch/arm/mach-ux500/platsmp.c
index 8f2f615ff958..8c8f26389067 100644
--- a/arch/arm/mach-ux500/platsmp.c
+++ b/arch/arm/mach-ux500/platsmp.c
@@ -54,7 +54,7 @@ static void wakeup_secondary(void)
* backup ram register at offset 0x1FF0, which is what boot rom code
* is waiting for. This will wake up the secondary core from WFE.
*/
- writel(virt_to_phys(secondary_startup),
+ writel(__pa_symbol(secondary_startup),
backupram + UX500_CPU1_JUMPADDR_OFFSET);
writel(0xA1FEED01,
backupram + UX500_CPU1_WAKEMAGIC_OFFSET);
diff --git a/arch/arm/mach-vexpress/dcscb.c b/arch/arm/mach-vexpress/dcscb.c
index 5cedcf572104..ee2a0faafaa1 100644
--- a/arch/arm/mach-vexpress/dcscb.c
+++ b/arch/arm/mach-vexpress/dcscb.c
@@ -166,7 +166,7 @@ static int __init dcscb_init(void)
* Future entries into the kernel can now go
* through the cluster entry vectors.
*/
- vexpress_flags_set(virt_to_phys(mcpm_entry_point));
+ vexpress_flags_set(__pa_symbol(mcpm_entry_point));
return 0;
}
diff --git a/arch/arm/mach-vexpress/platsmp.c b/arch/arm/mach-vexpress/platsmp.c
index 8b8d0724f6c6..575588633a36 100644
--- a/arch/arm/mach-vexpress/platsmp.c
+++ b/arch/arm/mach-vexpress/platsmp.c
@@ -61,7 +61,7 @@ static void __init vexpress_smp_dt_prepare_cpus(unsigned int max_cpus)
* until it receives a soft interrupt, and then the
* secondary CPU branches to this address.
*/
- vexpress_flags_set(virt_to_phys(versatile_secondary_startup));
+ vexpress_flags_set(__pa_symbol(versatile_secondary_startup));
}
const struct smp_operations vexpress_smp_dt_ops __initconst = {
diff --git a/arch/arm/mach-vexpress/tc2_pm.c b/arch/arm/mach-vexpress/tc2_pm.c
index 1aa4ccece69f..9b5f3c427086 100644
--- a/arch/arm/mach-vexpress/tc2_pm.c
+++ b/arch/arm/mach-vexpress/tc2_pm.c
@@ -54,7 +54,7 @@ static int tc2_pm_cpu_powerup(unsigned int cpu, unsigned int cluster)
if (cluster >= TC2_CLUSTERS || cpu >= tc2_nr_cpus[cluster])
return -EINVAL;
ve_spc_set_resume_addr(cluster, cpu,
- virt_to_phys(mcpm_entry_point));
+ __pa_symbol(mcpm_entry_point));
ve_spc_cpu_wakeup_irq(cluster, cpu, true);
return 0;
}
@@ -159,7 +159,7 @@ static int tc2_pm_wait_for_powerdown(unsigned int cpu, unsigned int cluster)
static void tc2_pm_cpu_suspend_prepare(unsigned int cpu, unsigned int cluster)
{
- ve_spc_set_resume_addr(cluster, cpu, virt_to_phys(mcpm_entry_point));
+ ve_spc_set_resume_addr(cluster, cpu, __pa_symbol(mcpm_entry_point));
}
static void tc2_pm_cpu_is_up(unsigned int cpu, unsigned int cluster)
diff --git a/arch/arm/mach-zx/platsmp.c b/arch/arm/mach-zx/platsmp.c
index 0297f92084e0..a316db478250 100644
--- a/arch/arm/mach-zx/platsmp.c
+++ b/arch/arm/mach-zx/platsmp.c
@@ -76,7 +76,7 @@ void __init zx_smp_prepare_cpus(unsigned int max_cpus)
* until it receives a soft interrupt, and then the
* secondary CPU branches to this address.
*/
- __raw_writel(virt_to_phys(zx_secondary_startup),
+ __raw_writel(__pa_symbol(zx_secondary_startup),
aonsysctrl_base + AON_SYS_CTRL_RESERVED1);
iounmap(aonsysctrl_base);
@@ -94,7 +94,7 @@ void __init zx_smp_prepare_cpus(unsigned int max_cpus)
/* Map the first 4 KB IRAM for suspend usage */
sys_iram = __arm_ioremap_exec(ZX_IRAM_BASE, PAGE_SIZE, false);
- zx_secondary_startup_pa = virt_to_phys(zx_secondary_startup);
+ zx_secondary_startup_pa = __pa_symbol((zx_secondary_startup);)
fncpy(sys_iram, &zx_resume_jump, zx_suspend_iram_sz);
}
diff --git a/arch/arm/mach-zynq/platsmp.c b/arch/arm/mach-zynq/platsmp.c
index 7cd9865bdeb7..caa6d5fe9078 100644
--- a/arch/arm/mach-zynq/platsmp.c
+++ b/arch/arm/mach-zynq/platsmp.c
@@ -89,7 +89,7 @@ EXPORT_SYMBOL(zynq_cpun_start);
static int zynq_boot_secondary(unsigned int cpu, struct task_struct *idle)
{
- return zynq_cpun_start(virt_to_phys(secondary_startup), cpu);
+ return zynq_cpun_start(__pa_symbol(secondary_startup), cpu);
}
/*
--
2.9.3
^ permalink raw reply related
* [PATCH v2 3/4] ARM: Add support for CONFIG_DEBUG_VIRTUAL
From: Florian Fainelli @ 2016-12-08 18:59 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161208185933.13749-1-f.fainelli@gmail.com>
x86 has an option: CONFIG_DEBUG_VIRTUAL to do additional checks on
virt_to_phys calls. The goal is to catch users who are calling
virt_to_phys on non-linear addresses immediately. This includes caller
using __virt_to_phys() on image addresses instead of __pa_symbol(). This
is a generally useful debug feature to spot bad code (particulary in
drivers).
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm/Kconfig | 1 +
arch/arm/include/asm/memory.h | 16 ++++++++++++--
arch/arm/mm/Makefile | 1 +
arch/arm/mm/physaddr.c | 51 +++++++++++++++++++++++++++++++++++++++++++
4 files changed, 67 insertions(+), 2 deletions(-)
create mode 100644 arch/arm/mm/physaddr.c
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index b5d529fdffab..5e66173c5787 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -2,6 +2,7 @@ config ARM
bool
default y
select ARCH_CLOCKSOURCE_DATA
+ select ARCH_HAS_DEBUG_VIRTUAL
select ARCH_HAS_DEVMEM_IS_ALLOWED
select ARCH_HAS_ELF_RANDOMIZE
select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
diff --git a/arch/arm/include/asm/memory.h b/arch/arm/include/asm/memory.h
index bee7511c5098..d90300193adf 100644
--- a/arch/arm/include/asm/memory.h
+++ b/arch/arm/include/asm/memory.h
@@ -213,7 +213,7 @@ extern const void *__pv_table_begin, *__pv_table_end;
: "r" (x), "I" (__PV_BITS_31_24) \
: "cc")
-static inline phys_addr_t __virt_to_phys(unsigned long x)
+static inline phys_addr_t __virt_to_phys_nodebug(unsigned long x)
{
phys_addr_t t;
@@ -245,7 +245,7 @@ static inline unsigned long __phys_to_virt(phys_addr_t x)
#define PHYS_OFFSET PLAT_PHYS_OFFSET
#define PHYS_PFN_OFFSET ((unsigned long)(PHYS_OFFSET >> PAGE_SHIFT))
-static inline phys_addr_t __virt_to_phys(unsigned long x)
+static inline phys_addr_t __virt_to_phys_nodebug(unsigned long x)
{
return (phys_addr_t)x - PAGE_OFFSET + PHYS_OFFSET;
}
@@ -261,6 +261,16 @@ static inline unsigned long __phys_to_virt(phys_addr_t x)
((((unsigned long)(kaddr) - PAGE_OFFSET) >> PAGE_SHIFT) + \
PHYS_PFN_OFFSET)
+#define __pa_symbol_nodebug(x) __virt_to_phys_nodebug((x))
+
+#ifdef CONFIG_DEBUG_VIRTUAL
+extern phys_addr_t __virt_to_phys(unsigned long x);
+extern phys_addr_t __phys_addr_symbol(unsigned long x);
+#else
+#define __virt_to_phys(x) __virt_to_phys_nodebug(x)
+#define __phys_addr_symbol(x) __pa_symbol_nodebug(x)
+#endif
+
/*
* These are *only* valid on the kernel direct mapped RAM memory.
* Note: Drivers should NOT use these. They are the wrong
@@ -283,9 +293,11 @@ static inline void *phys_to_virt(phys_addr_t x)
* Drivers should NOT use these either.
*/
#define __pa(x) __virt_to_phys((unsigned long)(x))
+#define __pa_symbol(x) __phys_addr_symbol(RELOC_HIDE((unsigned long)(x), 0))
#define __va(x) ((void *)__phys_to_virt((phys_addr_t)(x)))
#define pfn_to_kaddr(pfn) __va((phys_addr_t)(pfn) << PAGE_SHIFT)
+
extern long long arch_phys_to_idmap_offset;
/*
diff --git a/arch/arm/mm/Makefile b/arch/arm/mm/Makefile
index e8698241ece9..b3dea80715b4 100644
--- a/arch/arm/mm/Makefile
+++ b/arch/arm/mm/Makefile
@@ -14,6 +14,7 @@ endif
obj-$(CONFIG_ARM_PTDUMP) += dump.o
obj-$(CONFIG_MODULES) += proc-syms.o
+obj-$(CONFIG_DEBUG_VIRTUAL) += physaddr.o
obj-$(CONFIG_ALIGNMENT_TRAP) += alignment.o
obj-$(CONFIG_HIGHMEM) += highmem.o
diff --git a/arch/arm/mm/physaddr.c b/arch/arm/mm/physaddr.c
new file mode 100644
index 000000000000..0288760306ce
--- /dev/null
+++ b/arch/arm/mm/physaddr.c
@@ -0,0 +1,51 @@
+#include <linux/bug.h>
+#include <linux/export.h>
+#include <linux/types.h>
+#include <linux/mmdebug.h>
+#include <linux/mm.h>
+
+#include <asm/sections.h>
+#include <asm/memory.h>
+#include <asm/fixmap.h>
+#include <asm/dma.h>
+
+#include "mm.h"
+
+static inline bool __virt_addr_valid(unsigned long x)
+{
+ /* high_memory does not get immediately defined, and there
+ * are early callers of __pa() against PAGE_OFFSET, just catch
+ * these here, then do normal checks, with the exception of
+ * MAX_DMA_ADDRESS.
+ */
+ if ((x >= PAGE_OFFSET && !high_memory) ||
+ (x >= PAGE_OFFSET &&
+ high_memory && x < (unsigned long)high_memory) ||
+ x == MAX_DMA_ADDRESS)
+ return true;
+
+ return false;
+}
+
+phys_addr_t __virt_to_phys(unsigned long x)
+{
+ WARN(!__virt_addr_valid(x),
+ "virt_to_phys used for non-linear address: %pK (%pS)\n",
+ (void *)x,
+ (void *)x);
+
+ return __virt_to_phys_nodebug(x);
+}
+EXPORT_SYMBOL(__virt_to_phys);
+
+phys_addr_t __phys_addr_symbol(unsigned long x)
+{
+ /* This is bounds checking against the kernel image only.
+ * __pa_symbol should only be used on kernel symbol addresses.
+ */
+ VIRTUAL_BUG_ON(x < (unsigned long)KERNEL_START ||
+ x > (unsigned long)KERNEL_END);
+
+ return __pa_symbol_nodebug(x);
+}
+EXPORT_SYMBOL(__phys_addr_symbol);
--
2.9.3
^ permalink raw reply related
* [PATCH v2 2/4] ARM: Define KERNEL_START and KERNEL_END
From: Florian Fainelli @ 2016-12-08 18:59 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161208185933.13749-1-f.fainelli@gmail.com>
In preparation for adding CONFIG_DEBUG_VIRTUAL support, define a set of
common constants: KERNEL_START and KERNEL_END which abstract
CONFIG_XIP_KERNEL vs. !CONFIG_XIP_KERNEL. Update the code where
relevant.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm/include/asm/memory.h | 7 +++++++
arch/arm/mm/init.c | 7 ++-----
arch/arm/mm/mmu.c | 6 +-----
3 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/arch/arm/include/asm/memory.h b/arch/arm/include/asm/memory.h
index 76cbd9c674df..bee7511c5098 100644
--- a/arch/arm/include/asm/memory.h
+++ b/arch/arm/include/asm/memory.h
@@ -111,6 +111,13 @@
#endif /* !CONFIG_MMU */
+#ifdef CONFIG_XIP_KERNEL
+#define KERNEL_START _sdata
+#else
+#define KERNEL_START _stext
+#endif
+#define KERNEL_END _end
+
/*
* We fix the TCM memories max 32 KiB ITCM resp DTCM at these
* locations
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c
index 370581aeb871..c87d0d5b65f2 100644
--- a/arch/arm/mm/init.c
+++ b/arch/arm/mm/init.c
@@ -230,11 +230,8 @@ phys_addr_t __init arm_memblock_steal(phys_addr_t size, phys_addr_t align)
void __init arm_memblock_init(const struct machine_desc *mdesc)
{
/* Register the kernel text, kernel data and initrd with memblock. */
-#ifdef CONFIG_XIP_KERNEL
- memblock_reserve(__pa(_sdata), _end - _sdata);
-#else
- memblock_reserve(__pa(_stext), _end - _stext);
-#endif
+ memblock_reserve(__pa(KERNEL_START), _end - KERNEL_START);
+
#ifdef CONFIG_BLK_DEV_INITRD
/* FDT scan will populate initrd_start */
if (initrd_start && !phys_initrd_size) {
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index 4001dd15818d..f0fd1a2db036 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -1437,11 +1437,7 @@ static void __init kmap_init(void)
static void __init map_lowmem(void)
{
struct memblock_region *reg;
-#ifdef CONFIG_XIP_KERNEL
- phys_addr_t kernel_x_start = round_down(__pa(_sdata), SECTION_SIZE);
-#else
- phys_addr_t kernel_x_start = round_down(__pa(_stext), SECTION_SIZE);
-#endif
+ phys_addr_t kernel_x_start = round_down(__pa(KERNEL_START), SECTION_SIZE);
phys_addr_t kernel_x_end = round_up(__pa(__init_end), SECTION_SIZE);
/* Map all the lowmem memory banks. */
--
2.9.3
^ permalink raw reply related
* [PATCH v2 1/4] mtd: lart: Rename partition defines to be prefixed with PART_
From: Florian Fainelli @ 2016-12-08 18:59 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161208185933.13749-1-f.fainelli@gmail.com>
In preparation for defining KERNEL_START on ARM, rename KERNEL_START to
PART_KERNEL_START, and to be consistent, do this for all
partition-related constants.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
drivers/mtd/devices/lart.c | 24 ++++++++++++------------
1 file changed, 12 insertions(+), 12 deletions(-)
diff --git a/drivers/mtd/devices/lart.c b/drivers/mtd/devices/lart.c
index 82bd00af5cc3..268aae45b514 100644
--- a/drivers/mtd/devices/lart.c
+++ b/drivers/mtd/devices/lart.c
@@ -75,18 +75,18 @@ static char module_name[] = "lart";
/* blob */
#define NUM_BLOB_BLOCKS FLASH_NUMBLOCKS_16m_PARAM
-#define BLOB_START 0x00000000
-#define BLOB_LEN (NUM_BLOB_BLOCKS * FLASH_BLOCKSIZE_PARAM)
+#define PART_BLOB_START 0x00000000
+#define PART_BLOB_LEN (NUM_BLOB_BLOCKS * FLASH_BLOCKSIZE_PARAM)
/* kernel */
#define NUM_KERNEL_BLOCKS 7
-#define KERNEL_START (BLOB_START + BLOB_LEN)
-#define KERNEL_LEN (NUM_KERNEL_BLOCKS * FLASH_BLOCKSIZE_MAIN)
+#define PART_KERNEL_START (PART_BLOB_START + PART_BLOB_LEN)
+#define PART_KERNEL_LEN (NUM_KERNEL_BLOCKS * FLASH_BLOCKSIZE_MAIN)
/* initial ramdisk */
#define NUM_INITRD_BLOCKS 24
-#define INITRD_START (KERNEL_START + KERNEL_LEN)
-#define INITRD_LEN (NUM_INITRD_BLOCKS * FLASH_BLOCKSIZE_MAIN)
+#define PART_INITRD_START (PART_KERNEL_START + PART_KERNEL_LEN)
+#define PART_INITRD_LEN (NUM_INITRD_BLOCKS * FLASH_BLOCKSIZE_MAIN)
/*
* See section 4.0 in "3 Volt Fast Boot Block Flash Memory" Intel Datasheet
@@ -587,20 +587,20 @@ static struct mtd_partition lart_partitions[] = {
/* blob */
{
.name = "blob",
- .offset = BLOB_START,
- .size = BLOB_LEN,
+ .offset = PART_BLOB_START,
+ .size = PART_BLOB_LEN,
},
/* kernel */
{
.name = "kernel",
- .offset = KERNEL_START, /* MTDPART_OFS_APPEND */
- .size = KERNEL_LEN,
+ .offset = PART_KERNEL_START, /* MTDPART_OFS_APPEND */
+ .size = PART_KERNEL_LEN,
},
/* initial ramdisk / file system */
{
.name = "file system",
- .offset = INITRD_START, /* MTDPART_OFS_APPEND */
- .size = INITRD_LEN, /* MTDPART_SIZ_FULL */
+ .offset = PART_INITRD_START, /* MTDPART_OFS_APPEND */
+ .size = PART_INITRD_LEN, /* MTDPART_SIZ_FULL */
}
};
#define NUM_PARTITIONS ARRAY_SIZE(lart_partitions)
--
2.9.3
^ permalink raw reply related
* [PATCH v2 0/4] ARM: Add support for CONFIG_DEBUG_VIRTUAL
From: Florian Fainelli @ 2016-12-08 18:59 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1481068257-6367-1-git-send-email-labbott@redhat.com>
This patch series builds on top of Laura's [PATCHv5 00/10] CONFIG_DEBUG_VIRTUAL
for arm64 to add support for CONFIG_DEBUG_VIRTUAL for ARM.
This was tested on a Brahma B15 platform (ARMv7 + HIGHMEM + LPAE).
Note that the treewide changes would involve a huge CC list, which
is why it has been purposely trimmed to just focusing on the DEBUG_VIRTUAL
aspect.
Changes in v2:
- Modified MTD LART driver not to create symbol conflicts with
KERNEL_START
- Fixed patch that defines and uses KERNEL_START/END
- Fixed __pa_symbol()'s definition
- Inline __pa_symbol() check wihtin the VIRTUAL_BUG_ON statement
- Simplified check for virtual addresses
- Added a tree-wide patch changing SMP/PM implementations to use
__pa_symbol(), build tested against multi_v{5,7}_defconfig
Thanks!
Florian Fainelli (4):
mtd: lart: Rename partition defines to be prefixed with PART_
ARM: Define KERNEL_START and KERNEL_END
ARM: Add support for CONFIG_DEBUG_VIRTUAL
ARM: treewide: Replace uses of virt_to_phys with __pa_symbol
arch/arm/Kconfig | 1 +
arch/arm/boot/compressed/piggy.xzkern | Bin 0 -> 2998584 bytes
arch/arm/common/mcpm_entry.c | 12 +++----
arch/arm/include/asm/memory.h | 23 ++++++++++++--
arch/arm/mach-alpine/platsmp.c | 2 +-
arch/arm/mach-axxia/platsmp.c | 2 +-
arch/arm/mach-bcm/bcm63xx_smp.c | 2 +-
arch/arm/mach-bcm/platsmp-brcmstb.c | 2 +-
arch/arm/mach-bcm/platsmp.c | 4 +--
arch/arm/mach-berlin/platsmp.c | 2 +-
arch/arm/mach-exynos/firmware.c | 4 +--
arch/arm/mach-exynos/mcpm-exynos.c | 2 +-
arch/arm/mach-exynos/platsmp.c | 4 +--
arch/arm/mach-exynos/pm.c | 6 ++--
arch/arm/mach-exynos/suspend.c | 6 ++--
arch/arm/mach-hisi/platmcpm.c | 2 +-
arch/arm/mach-hisi/platsmp.c | 6 ++--
arch/arm/mach-imx/platsmp.c | 2 +-
arch/arm/mach-imx/pm-imx6.c | 2 +-
arch/arm/mach-imx/src.c | 2 +-
arch/arm/mach-mediatek/platsmp.c | 2 +-
arch/arm/mach-mvebu/pm.c | 2 +-
arch/arm/mach-mvebu/pmsu.c | 2 +-
arch/arm/mach-mvebu/system-controller.c | 2 +-
arch/arm/mach-omap2/control.c | 8 ++---
arch/arm/mach-omap2/omap-mpuss-lowpower.c | 8 ++---
arch/arm/mach-omap2/omap-smp.c | 4 +--
arch/arm/mach-prima2/platsmp.c | 2 +-
arch/arm/mach-prima2/pm.c | 2 +-
arch/arm/mach-pxa/palmz72.c | 2 +-
arch/arm/mach-pxa/pxa25x.c | 2 +-
arch/arm/mach-pxa/pxa27x.c | 2 +-
arch/arm/mach-pxa/pxa3xx.c | 2 +-
arch/arm/mach-realview/platsmp-dt.c | 2 +-
arch/arm/mach-rockchip/platsmp.c | 4 +--
arch/arm/mach-rockchip/pm.c | 2 +-
arch/arm/mach-s3c24xx/mach-jive.c | 2 +-
arch/arm/mach-s3c24xx/pm-s3c2410.c | 2 +-
arch/arm/mach-s3c24xx/pm-s3c2416.c | 2 +-
arch/arm/mach-s3c64xx/pm.c | 2 +-
arch/arm/mach-s5pv210/pm.c | 2 +-
arch/arm/mach-sa1100/pm.c | 2 +-
arch/arm/mach-shmobile/platsmp-apmu.c | 6 ++--
arch/arm/mach-shmobile/platsmp-scu.c | 4 +--
arch/arm/mach-socfpga/platsmp.c | 4 +--
arch/arm/mach-spear/platsmp.c | 2 +-
arch/arm/mach-sti/platsmp.c | 2 +-
arch/arm/mach-sunxi/platsmp.c | 4 +--
arch/arm/mach-tango/platsmp.c | 2 +-
arch/arm/mach-tango/pm.c | 2 +-
arch/arm/mach-tegra/reset.c | 4 +--
arch/arm/mach-ux500/platsmp.c | 2 +-
arch/arm/mach-vexpress/dcscb.c | 2 +-
arch/arm/mach-vexpress/platsmp.c | 2 +-
arch/arm/mach-vexpress/tc2_pm.c | 4 +--
arch/arm/mach-zx/platsmp.c | 4 +--
arch/arm/mach-zynq/platsmp.c | 2 +-
arch/arm/mm/Makefile | 1 +
arch/arm/mm/init.c | 7 ++--
arch/arm/mm/mmu.c | 6 +---
arch/arm/mm/physaddr.c | 51 ++++++++++++++++++++++++++++++
drivers/mtd/devices/lart.c | 24 +++++++-------
62 files changed, 173 insertions(+), 108 deletions(-)
create mode 100644 arch/arm/boot/compressed/piggy.xzkern
create mode 100644 arch/arm/mm/physaddr.c
--
2.9.3
^ permalink raw reply
* [PATCH 1/1] arm64: mm: add config options for page table configuration
From: Catalin Marinas @ 2016-12-08 18:57 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <762b8bec-60da-0bb8-28f4-b407ad70687b@broadcom.com>
On Thu, Dec 08, 2016 at 08:30:36AM -0800, Scott Branden wrote:
> On 16-12-08 02:00 AM, Catalin Marinas wrote:
> >On Wed, Dec 07, 2016 at 11:40:00AM -0800, Scott Branden wrote:
> >>Make MAX_PHYSMEM_BITS and SECTIONS_SIZE_BITS configurable by adding
> >>config options.
> >>Default to current settings currently defined in sparesmem.h.
> >>For systems wishing to save memory the config options can be overridden.
> >>Example, changing MAX_PHYSMEM_BITS from 48 to 36 at the same time as
> >>changing SECTION_SIZE_BITS from 30 to 26 frees 13MB of memory.
[...]
> > I would rather reduce SECTION_SIZE_BITS permanently where
> >feasible, like in this patch:
> >
> >http://lkml.kernel.org/r/1465821119-3384-1-git-send-email-jszhang at marvell.com
>
> This patch does not meet my requirements as I need SECTION_SIZE_BITS to be
> set to 28 to reduce memory
So with this patch, we reduce it to 27, it should be fine-grained enough
for 128MB sections. Alternatively, there were other suggestions here:
http://lkml.iu.edu/hypermail/linux/kernel/1604.1/03036.html
> and to allow memory hotplug to allocate a 256 MB section.
Can memory hotplug not work with 2*128MB sections in this case?
> My patch future proofs the tuning of the parameters by allowing
> any section size to be made.
While MAX_PHYSMEM_BITS makes sense to users in general,
SECTION_SIZE_BITS is not always clear to the average user what it means
and its min/max boundaries. That's another reason (apart from single/few
Image case) why I prefer to not expose it as configuration option.
> I could combine the patch you list such that
> SECTION_SIZE_BITS defaults to 30 when CONFIG_ARM64_64_PAGES is selected and
> 27 otherwise. Should it default to something else for 16K and 4K pages?
I haven't done any calculations for 16K yet but we could probably come
up with some formula based on PAGE_SHIFT to cover all cases.
> In terms of MAX_PHYSMEM_BITS, if our SoCs only use 40 (or less) bits I would
> also like the configuration functionality. This allows us to make the
> SECTION_SIZE_BITS smaller.
So how small do you want SECTION_SIZE_BITS to be? As I said above, 128MB
sections should be sufficient in most cases and without the need to
reduce MAX_PHYSMEM_BITS.
--
Catalin
^ permalink raw reply
* [PATCH] ARM: Ignore compressed kernel build products
From: Florian Fainelli @ 2016-12-08 18:54 UTC (permalink / raw)
To: linux-arm-kernel
When we select a kernel compression scheme, we will end-up with e.g:
piggy.xzkern under arch/arm/boot/compressed/, let's ignore these files.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm/boot/compressed/.gitignore | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/compressed/.gitignore b/arch/arm/boot/compressed/.gitignore
index 86b2f5d28240..06686768610f 100644
--- a/arch/arm/boot/compressed/.gitignore
+++ b/arch/arm/boot/compressed/.gitignore
@@ -4,6 +4,7 @@ font.c
lib1funcs.S
hyp-stub.S
piggy_data
+piggy.*
vmlinux
vmlinux.lds
--
2.9.3
^ permalink raw reply related
* [PATCH] ARM: Ignore compressed kernel build products
From: Florian Fainelli @ 2016-12-08 18:54 UTC (permalink / raw)
To: linux-arm-kernel
When we select a kernel compression scheme, we will end-up with e.g:
piggy.xzkern under arch/arm/boot/compressed/, let's ignore these files.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm/boot/compressed/.gitignore | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/compressed/.gitignore b/arch/arm/boot/compressed/.gitignore
index 86b2f5d28240..06686768610f 100644
--- a/arch/arm/boot/compressed/.gitignore
+++ b/arch/arm/boot/compressed/.gitignore
@@ -4,6 +4,7 @@ font.c
lib1funcs.S
hyp-stub.S
piggy_data
+piggy.*
vmlinux
vmlinux.lds
--
2.9.3
^ permalink raw reply related
* [GIT PULL 1/3] ARM: exynos: Soc/mach for v4.10
From: Krzysztof Kozlowski @ 2016-12-08 18:46 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAOesGMicc8xEvxn1k6Te20rTEv36it0PZmnXyhhn+U+oh7jdeQ@mail.gmail.com>
On Thu, Dec 08, 2016 at 10:25:35AM -0800, Olof Johansson wrote:
> On Thu, Dec 8, 2016 at 7:28 AM, Pankaj Dubey <dubepankaj1980@gmail.com> wrote:
> > On 3 December 2016 at 22:33, Krzysztof Kozlowski <krzk@kernel.org> wrote:
> >> On Fri, Dec 02, 2016 at 10:52:57PM +0100, Arnd Bergmann wrote:
> >>>
> >>> Sorry, I initially deferred it and then didn't get back to it.
> >>>
> >>> The dependency on the .dts changes made me a bit nervous about
> >>> taking it, mostly because the changelog fails to explain the
> >>> exact dependencies.
> >>>
> >>> This breaks compatibility with existing .dtb files, right?
> >>
> >> No, strictly speaking not. There was no dt-bindings change here, no DT
> >> properties for SCU before. We are converting our drivers to DTB so this
> >> is the same as before when switching for pinctrl, clocks or all other
> >> drivers to DT.
> >>
> >> We are not braking DTB ABI because there was no ABI around it before.
> >> Otherwise, one would say that lack of SCU DT node was an ABI. That is
> >> wrong, because DT should describe the hardware and SCU is in hardware.
> >>
> >>> What I'd like to see here is an explanation about:
> >>>
> >>> - what the upside of breaking compatibility is
> >>
> >> DTBs which do not have SCU are not proper because they skip that part of
> >> hardware. However we are breaking them in the way the SMP won't work
> >> there. It is not an ABI break, as I mentioned above.
> >>
> >>> - what exactly stops working with an old dtb
> >>> - why we don't keep a fallback for handling old dtb files
> >>
> >> What is the point for it? This is not an ABI break. Even if it was,
> >> Samsung guys don't care for ABI breaks at all (and in fact we wanted to
> >> mark the platform experimental...).
> >>
> >>> It would also be helpful to have a separate pull request for
> >>> the commits require the new dtb, and the stuff that is unrelated.
> >>
> >> I can do that but the pull will be small.
> >>
> >
> > Arnd,
> >
> > Any update on this? Intention of this change is to improve
> > Exynos SoC's DT support in mainline kernel. This will help in removing static
> > mapping from exynos machine files and simplify mach-exynos code-base.
>
> Adding the SCU nodes now makes sense. So does using them if they're available.
>
> Given the prevalence of exynos systems with DTS already out there, it
> would make sense to give an overlap of making the kernel work without
> the SCU in DT for a period of time.
>
> This isn't like the old days of when we were mass-converting things
> and breakage was expected. We're well into a steady state here, so
> being nicer to downstream users is likely the right thing to do here.
I think that either we treat this as an ABI break, or just "being
nice to downstream".
In the first case, not breaking things would be a valid reason. But I
believe this is not an ABI break. ABI is about an interface, not about
being nice. The SCU should be defined by downstream users because this
is the description of the hardware. In the same time, kernel did not
document as an interface something like "there should be no SCU node
defined" so creating a requirement of SCU is not an breakage of existing
interface.
The second case then, being nice to downstream. Do we want to be nice or
do we want to push them to mainline? Okay, it is never black or white...
yet we should rather encourage downstream to mainline and creating
compatibility periods is rather opposite of that.
Best regards,
Krzysztof
^ permalink raw reply
* [RFC v3 00/10] KVM PCIe/MSI passthrough on ARM/ARM64 and IOVA reserved regions
From: Robin Murphy @ 2016-12-08 18:42 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161208100132.4e9cc3c5@t450s.home>
On 08/12/16 17:01, Alex Williamson wrote:
> On Thu, 8 Dec 2016 13:14:04 +0000
> Robin Murphy <robin.murphy@arm.com> wrote:
>> On 08/12/16 09:36, Auger Eric wrote:
>>> 3) RMRR reporting in the iommu group sysfs? Joerg: yes; Don: no
>>> My current series does not expose them in iommu group sysfs.
>>> I understand we can expose the RMRR regions in the iomm group sysfs
>>> without necessarily supporting RMRR requiring device assignment.
>>> We can also add this support later.
>>
>> As you say, reporting them doesn't necessitate allowing device
>> assignment, and it's information which can already be easily grovelled
>> out of dmesg (for intel-iommu at least) - there doesn't seem to be any
>> need to hide them, but the x86 folks can have the final word on that.
>
> Eric and I talked about this and I don't see the value in identifying
> an RMRR as anything other than a reserved range for a device. It's not
> userspace's job to maintain an identify mapped range for the device,
> and it can't be trusted to do so anyway. It does throw a kink in the
> machinery though as an RMRR is a reserved memory range unique to a
> device. It doesn't really fit into a monolithic /sys/class/iommu view
> of global reserved regions as an RMRR is only relevant to the device
> paths affected.
I think we're in violent agreement then - to clarify, I was thinking in
terms of patch 7 of this series, where everything relevant to a
particular group would be exposed as just an opaque "don't use this
address range" regardless of the internal type.
I'm less convinced the kernel has any need to provide its own 'global'
view of reservations which strictly are always at least per-IOMMU, if
not per-root-complex, even when all the instances do share the same
address by design. The group-based interface fits the reality neatly,
and userspace can easily iterate all the groups if it wants to consider
everything. Plus if it doesn't want to, then it needn't bother reserving
anything which doesn't apply to the group(s) it's going to bind to VFIO.
Robin.
> Another kink is that sometimes we know what the RMRR is for, know that
> it's irrelevant for our use case, and ignore it. This is true for USB
> and Intel graphics use cases of RMRRs.
>
> Also, aside from the above mentioned cases, devices with RMRRs are
> currently excluded from participating in the IOMMU API by the
> intel-iommu driver and I expect this to continue in the general case
> regardless of whether the ranges are more easily exposed to userspace.
> ARM may have to deal with mangling a guest memory map due to lack of
> any standard layout, de facto or otherwise, but for x86 I don't think
> it's worth the migration and hotplug implications. Thanks,
>
> Alex
>
^ permalink raw reply
* [PATCH pci/host-iproc] pci-iproc: skip check for legacy IRQ on PAXC buses
From: Bjorn Helgaas @ 2016-12-08 18:26 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1480624492-32420-1-git-send-email-gospo@broadcom.com>
On Thu, Dec 01, 2016 at 03:34:52PM -0500, Andy Gospodarek wrote:
> PAXC and PAXCv2 buses do not support legacy IRQs so there is no reason
> to even try and map them. Without a change like this, one cannot create
> VFs on Nitro ports since legacy interrupts are checked as part of the
> PCI device creation process. Testing on PAXC hardware showed that VFs
> are properly created with only the change to not set pcie->map_irq, but
> just to be safe the change in iproc_pcie_setup will ensure that
> pdev_fixup_irq will not panic.
>
> Signed-off-by: Andy Gospodarek <gospo@broadcom.com>
> Signed-off-by: Ray Jui <rjui@broadcom.com>
Applied to pci/host-iproc for v4.10 with Ray's acked-by, thanks!
> ---
> drivers/pci/host/pcie-iproc-platform.c | 9 ++++++++-
> drivers/pci/host/pcie-iproc.c | 5 ++++-
> 2 files changed, 12 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/pci/host/pcie-iproc-platform.c b/drivers/pci/host/pcie-iproc-platform.c
> index fd3ed9b..22d814a 100644
> --- a/drivers/pci/host/pcie-iproc-platform.c
> +++ b/drivers/pci/host/pcie-iproc-platform.c
> @@ -108,7 +108,14 @@ static int iproc_pcie_pltfm_probe(struct platform_device *pdev)
> return ret;
> }
>
> - pcie->map_irq = of_irq_parse_and_map_pci;
> + /* PAXC doesn't support legacy IRQs, skip mapping */
> + switch (pcie->type) {
> + case IPROC_PCIE_PAXC:
> + case IPROC_PCIE_PAXC_V2:
> + break;
> + default:
> + pcie->map_irq = of_irq_parse_and_map_pci;
> + }
>
> ret = iproc_pcie_setup(pcie, &res);
> if (ret)
> diff --git a/drivers/pci/host/pcie-iproc.c b/drivers/pci/host/pcie-iproc.c
> index cd51334..3ebc025 100644
> --- a/drivers/pci/host/pcie-iproc.c
> +++ b/drivers/pci/host/pcie-iproc.c
> @@ -1274,7 +1274,10 @@ int iproc_pcie_setup(struct iproc_pcie *pcie, struct list_head *res)
>
> pci_scan_child_bus(bus);
> pci_assign_unassigned_bus_resources(bus);
> - pci_fixup_irqs(pci_common_swizzle, pcie->map_irq);
> +
> + if (pcie->map_irq)
> + pci_fixup_irqs(pci_common_swizzle, pcie->map_irq);
> +
> pci_bus_add_devices(bus);
>
> return 0;
> --
> 2.1.0
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* [GIT PULL 1/3] ARM: exynos: Soc/mach for v4.10
From: Olof Johansson @ 2016-12-08 18:25 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CAGcde9HwfPbw6NMEmcTfn+Df+-AkyyrP3u=7NUyT1XDVbCjtqg@mail.gmail.com>
On Thu, Dec 8, 2016 at 7:28 AM, Pankaj Dubey <dubepankaj1980@gmail.com> wrote:
> On 3 December 2016 at 22:33, Krzysztof Kozlowski <krzk@kernel.org> wrote:
>> On Fri, Dec 02, 2016 at 10:52:57PM +0100, Arnd Bergmann wrote:
>>> On Thursday, December 1, 2016 8:34:04 PM CET Krzysztof Kozlowski wrote:
>>> > On Thu, Nov 24, 2016 at 08:08:27AM +0200, Krzysztof Kozlowski wrote:
>>> > > Hi,
>>> > >
>>> > > This contains previous dts branch because SCU node in dts is needed
>>> > > prior to removing it from mach code.
>>> > >
>>> > > Below you will find full pull request and one stripped from dependency.
>>> > >
>>> >
>>> > Hi Arnd, Kevin and Olof,
>>> >
>>> > What about this pull from the set?
>>> >
>>>
>>> Sorry, I initially deferred it and then didn't get back to it.
>>>
>>> The dependency on the .dts changes made me a bit nervous about
>>> taking it, mostly because the changelog fails to explain the
>>> exact dependencies.
>>>
>>> This breaks compatibility with existing .dtb files, right?
>>
>> No, strictly speaking not. There was no dt-bindings change here, no DT
>> properties for SCU before. We are converting our drivers to DTB so this
>> is the same as before when switching for pinctrl, clocks or all other
>> drivers to DT.
>>
>> We are not braking DTB ABI because there was no ABI around it before.
>> Otherwise, one would say that lack of SCU DT node was an ABI. That is
>> wrong, because DT should describe the hardware and SCU is in hardware.
>>
>>> What I'd like to see here is an explanation about:
>>>
>>> - what the upside of breaking compatibility is
>>
>> DTBs which do not have SCU are not proper because they skip that part of
>> hardware. However we are breaking them in the way the SMP won't work
>> there. It is not an ABI break, as I mentioned above.
>>
>>> - what exactly stops working with an old dtb
>>> - why we don't keep a fallback for handling old dtb files
>>
>> What is the point for it? This is not an ABI break. Even if it was,
>> Samsung guys don't care for ABI breaks at all (and in fact we wanted to
>> mark the platform experimental...).
>>
>>> It would also be helpful to have a separate pull request for
>>> the commits require the new dtb, and the stuff that is unrelated.
>>
>> I can do that but the pull will be small.
>>
>
> Arnd,
>
> Any update on this? Intention of this change is to improve
> Exynos SoC's DT support in mainline kernel. This will help in removing static
> mapping from exynos machine files and simplify mach-exynos code-base.
Adding the SCU nodes now makes sense. So does using them if they're available.
Given the prevalence of exynos systems with DTS already out there, it
would make sense to give an overlap of making the kernel work without
the SCU in DT for a period of time.
This isn't like the old days of when we were mass-converting things
and breakage was expected. We're well into a steady state here, so
being nicer to downstream users is likely the right thing to do here.
-Olof
^ permalink raw reply
* [GIT PULL] ARM: mvebu: fixes for v4.9 (#2)
From: Olof Johansson @ 2016-12-08 18:19 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <87r35ifl13.fsf@free-electrons.com>
On Thu, Dec 8, 2016 at 8:22 AM, Gregory CLEMENT
<gregory.clement@free-electrons.com> wrote:
> Hi,
>
> Here is the second pull request for fixes for mvebu for v4.9.
>
> Gregory
>
> The following changes since commit 8d897006fe9206d64cbe353310be26d7c911e69d:
>
> arm64: dts: marvell: add unique identifiers for Armada A8k SPI controllers (2016-11-09 09:44:08 +0100)
>
> are available in the git repository at:
>
> git://git.infradead.org/linux-mvebu.git tags/mvebu-fixes-4.9-2
>
> for you to fetch changes up to b150e59f1d217473b3eab354a9e5e9fe907868ff:
>
> ARM: dts: orion5x: fix number of sata port for linkstation ls-gl (2016-12-05 16:43:05 +0100)
>
> ----------------------------------------------------------------
> mvebu fixes for 4.9 (part 2)
>
> Fix number of sata port for linkstation ls-gl: without this the hard
> drive is not detected as it was before the dt conversion
Merged, thanks.
-Olof
^ permalink raw reply
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