* [PATCH v2 3/3] ARM: dts: imx: Add ocotp node for imx6ul
From: Shawn Guo @ 2017-01-10 1:35 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1479344899-3141-3-git-send-email-ping.bai@nxp.com>
On Thu, Nov 17, 2016 at 09:08:19AM +0800, Bai Ping wrote:
> Add ocotp node for i.MX6UL SOC.
>
> Signed-off-by: Bai Ping <ping.bai@nxp.com>
Applied, thanks.
^ permalink raw reply
* [PATCH v4] arm64: Add DTS support for FSL's LS1012A SoC
From: Shawn Guo @ 2017-01-10 2:17 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1483437451-20971-1-git-send-email-harninder.rai@nxp.com>
On Tue, Jan 03, 2017 at 03:27:31PM +0530, Harninder Rai wrote:
> LS1012A features an advanced 64-bit ARM v8 CortexA53 processor
> with 32 KB of parity protected L1-I cache, 32 KB of ECC protected
> L1-D cache, as well as 256 KB of ECC protected L2 cache.
>
> Features summary
> One 64-bit ARM-v8 Cortex-A53 core with the following capabilities
> - Arranged as a cluster of one core supporting a 256 KB L2 cache with ECC
> protection
> - Speed up to 800 MHz
> - Parity-protected 32 KB L1 instruction cache and 32 KB L1 data cache
> - Neon SIMD engine
> - ARM v8 cryptography extensions
> One 16-bit DDR3L SDRAM memory controller
> ARM core-link CCI-400 cache coherent interconnect
> Cryptography acceleration (SEC)
> One Configurable x3 SerDes
> One PCI Express Gen2 controller, supporting x1 operation
> One serial ATA (SATA Gen 3.0) controller
> One USB 3.0/2.0 controller with integrated PHY
>
> Following levels of DTSI/DTS files have been created for the LS1012A
> SoC family:
>
> - fsl-ls1012a.dtsi:
> DTS-Include file for FSL LS1012A SoC.
>
> - fsl-ls1012a-frdm.dts:
> DTS file for FSL LS1012A FRDM board.
>
> - fsl-ls1012a-qds.dts:
> DTS file for FSL LS1012A QDS board.
>
> - fsl-ls1012a-rdb.dts:
> DTS file for FSL LS1012A RDB board.
>
> Signed-off-by: Harninder Rai <harninder.rai@nxp.com>
> Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>
I changed subject a bit as below and applied patch.
arm64: dts: Add support for FSL's LS1012A SoC
Shawn
^ permalink raw reply
* [PATCH v4] arm64: Add DTS support for FSL's LS1012A SoC
From: Harninder Rai @ 2017-01-10 2:19 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20170110021717.GR20956@dragon>
>
> I changed subject a bit as below and applied patch.
>
> arm64: dts: Add support for FSL's LS1012A SoC
Thanks Shawn
Regards
Harry++
^ permalink raw reply
* [PATCH v2] ARM: dts: imx/vf: Correct license text
From: Shawn Guo @ 2017-01-10 2:19 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20170103102713.10341-1-alexandre.belloni@free-electrons.com>
On Tue, Jan 03, 2017 at 11:27:13AM +0100, Alexandre Belloni wrote:
> The license text has been mangled at some point then copy pasted across
> multiple files. Restore it to what it should be.
> Note that this is not intended as a license change.
>
> Reviewed-by: Heiko Schocher <hs@denx.de>
> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
> Acked-by: Uwe Kleine-K?nig <u.kleine-koenig@pengutronix.de>
> Acked-by: Afzal Mohammed <afzal.mohd.ma@gmail.com>
> Acked-by: Michael Trimarchi <michael@amarulasolutions.com>
> Acked-by: Stefan Agner <stefan@agner.ch>
> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Applied, thanks.
^ permalink raw reply
* [PATCH] usb: dwc3-exynos fix unspecified suspend clk error handling
From: Shuah Khan @ 2017-01-10 2:21 UTC (permalink / raw)
To: linux-arm-kernel
Fix dwc3_exynos_probe() to call clk_prepare_enable() only when suspend
clock is specified. Call clk_disable_unprepare() from remove and probe
error path only when susp_clk has been set from remove and probe error
paths.
Signed-off-by: Shuah Khan <shuahkh@osg.samsung.com>
---
drivers/usb/dwc3/dwc3-exynos.c | 10 ++++++----
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/drivers/usb/dwc3/dwc3-exynos.c b/drivers/usb/dwc3/dwc3-exynos.c
index e27899b..f97a3d7 100644
--- a/drivers/usb/dwc3/dwc3-exynos.c
+++ b/drivers/usb/dwc3/dwc3-exynos.c
@@ -131,8 +131,8 @@ static int dwc3_exynos_probe(struct platform_device *pdev)
if (IS_ERR(exynos->susp_clk)) {
dev_info(dev, "no suspend clk specified\n");
exynos->susp_clk = NULL;
- }
- clk_prepare_enable(exynos->susp_clk);
+ } else
+ clk_prepare_enable(exynos->susp_clk);
if (of_device_is_compatible(node, "samsung,exynos7-dwusb3")) {
exynos->axius_clk = devm_clk_get(dev, "usbdrd30_axius_clk");
@@ -196,7 +196,8 @@ static int dwc3_exynos_probe(struct platform_device *pdev)
regulator_disable(exynos->vdd33);
err2:
clk_disable_unprepare(exynos->axius_clk);
- clk_disable_unprepare(exynos->susp_clk);
+ if (exynos->susp_clk)
+ clk_disable_unprepare(exynos->susp_clk);
clk_disable_unprepare(exynos->clk);
return ret;
}
@@ -210,7 +211,8 @@ static int dwc3_exynos_remove(struct platform_device *pdev)
platform_device_unregister(exynos->usb3_phy);
clk_disable_unprepare(exynos->axius_clk);
- clk_disable_unprepare(exynos->susp_clk);
+ if (exynos->susp_clk)
+ clk_disable_unprepare(exynos->susp_clk);
clk_disable_unprepare(exynos->clk);
regulator_disable(exynos->vdd33);
--
2.7.4
^ permalink raw reply related
* [PATCH 1/2] Documentation: devicetree: Add document bindings for mtk-cir
From: Sean Wang @ 2017-01-10 2:35 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20170109183214.xonv52sn3fo4exqp@rob-hp-laptop>
Hi Rob,
thanks for your effort for reviewing. I added comments inline.
On Mon, 2017-01-09 at 12:32 -0600, Rob Herring wrote:
> On Fri, Jan 06, 2017 at 12:06:23AM +0800, sean.wang at mediatek.com wrote:
> > From: Sean Wang <sean.wang@mediatek.com>
> >
> > This patch adds documentation for devicetree bindings for
> > Mediatek IR controller.
> >
> > Signed-off-by: Sean Wang <sean.wang@mediatek.com>
> > ---
> > .../devicetree/bindings/media/mtk-cir.txt | 23 ++++++++++++++++++++++
> > 1 file changed, 23 insertions(+)
> > create mode 100644 linux-4.8.rc1_p0/Documentation/devicetree/bindings/media/mtk-cir.txt
> >
> > diff --git a/Documentation/devicetree/bindings/media/mtk-cir.txt b/Documentation/devicetree/bindings/media/mtk-cir.txt
> > new file mode 100644
> > index 0000000..bbedd71
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/media/mtk-cir.txt
> > @@ -0,0 +1,23 @@
> > +Device-Tree bindings for Mediatek IR controller found in Mediatek SoC family
> > +
> > +Required properties:
> > +- compatible : "mediatek,mt7623-ir"
> > +- clocks : list of clock specifiers, corresponding to
> > + entries in clock-names property;
> > +- clock-names : should contain "clk" entries;
> > +- interrupts : should contain IR IRQ number;
> > +- reg : should contain IO map address for IR.
> > +
> > +Optional properties:
> > +- linux,rc-map-name : Remote control map name.
>
> Would 'label' be appropriate here instead? If not, this needs to be
> documented in a common location and explained better.
>
I checked with how the way applied in other IR drivers is and found that
most IR driver also use the same label to identify the scan/key table
they prefer to use such as gpio-ir-recv, ir-hix5hd2, meson-ir and
sunxi-cir or use hard coding inside the driver. So I thought it should
be appropriate here currently.
> > +
> > +Example:
> > +
> > +cir: cir at 0x10013000 {
>
> Drop the '0x'.
>
okay, I will.
> > + compatible = "mediatek,mt7623-ir";
> > + reg = <0 0x10013000 0 0x1000>;
> > + interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_LOW>;
> > + clocks = <&infracfg CLK_INFRA_IRRX>;
> > + clock-names = "clk";
> > + linux,rc-map-name = "rc-rc6-mce";
> > +};
> > --
> > 1.9.1
> >
^ permalink raw reply
* [PATCH v3] arm64: dts: rockchip: add "rockchip, grf" property for RK3399 PMUCRU/CRU
From: Shawn Lin @ 2017-01-10 2:37 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1484011661-13474-1-git-send-email-zhengxing@rock-chips.com>
On 2017/1/10 9:27, Xing Zheng wrote:
> The structure rockchip_clk_provider needs to refer the GRF regmap
> in somewhere, if the CRU node has not "rockchip,grf" property,
> calling syscon_regmap_lookup_by_phandle will return an invalid GRF
> regmap, and the MUXGRF type clock will be not supported.
>
> Therefore, we need to add them.
>
> Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
> ---
>
> Changes in v3:
> - add optional roperty rockchip,grf in rockchip,rk3399-cru.txt
>
> Changes in v2:
> - referring pmugrf for PMUGRU
> - fix the typo "invaild" in COMMIT message
>
> Documentation/devicetree/bindings/clock/rockchip,rk3399-cru.txt | 5 +++++
> arch/arm64/boot/dts/rockchip/rk3399.dtsi | 2 ++
> 2 files changed, 7 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3399-cru.txt b/Documentation/devicetree/bindings/clock/rockchip,rk3399-cru.txt
> index 3888dd3..f476b3d 100644
> --- a/Documentation/devicetree/bindings/clock/rockchip,rk3399-cru.txt
> +++ b/Documentation/devicetree/bindings/clock/rockchip,rk3399-cru.txt
> @@ -13,6 +13,11 @@ Required Properties:
> - #clock-cells: should be 1.
> - #reset-cells: should be 1.
>
> +Optional Properties:
> +
> +- rockchip,grf: phandle to the syscon managing the "general register files"
> + If missing pll rates are not changable, due to the missing pll lock status.
> +
It twists my tongue w/o proper punctuation:)
- rockchip,grf: phandle to the syscon managing the "general register
files". If missing, pll rates are not changable due to the missing pll
lock status.
> Each clock is assigned an identifier and client nodes can use this identifier
> to specify the clock which they consume. All available clocks are defined as
> preprocessor macros in the dt-bindings/clock/rk3399-cru.h headers and can be
> diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> index c928015..081621b 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> @@ -1077,6 +1077,7 @@
> pmucru: pmu-clock-controller at ff750000 {
> compatible = "rockchip,rk3399-pmucru";
> reg = <0x0 0xff750000 0x0 0x1000>;
> + rockchip,grf = <&pmugrf>;
> #clock-cells = <1>;
> #reset-cells = <1>;
> assigned-clocks = <&pmucru PLL_PPLL>;
> @@ -1086,6 +1087,7 @@
> cru: clock-controller at ff760000 {
> compatible = "rockchip,rk3399-cru";
> reg = <0x0 0xff760000 0x0 0x1000>;
> + rockchip,grf = <&grf>;
> #clock-cells = <1>;
> #reset-cells = <1>;
> assigned-clocks =
>
--
Best Regards
Shawn Lin
^ permalink raw reply
* [PATCH v3 1/2] Doc: devicetree: bindings: Add vendor prefix entry - lwn
From: Shawn Guo @ 2017-01-10 2:48 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1483440381-24268-1-git-send-email-lukma@denx.de>
On Tue, Jan 03, 2017 at 11:46:20AM +0100, Lukasz Majewski wrote:
> This patch adds entry for LWN - the Liebherr-Werk Nenzing GmbH company to
> vendor-prefixes.txt file.
>
> Signed-off-by: Lukasz Majewski <lukma@denx.de>
Applied both, thanks.
^ permalink raw reply
* [PATCH 0/2] ARM: dts: boundary: fix sgtl5000 pinctrl init
From: Shawn Guo @ 2017-01-10 2:59 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20170103112247.4563-1-gary.bisson@boundarydevices.com>
On Tue, Jan 03, 2017 at 12:22:45PM +0100, Gary Bisson wrote:
> Gary Bisson (2):
> ARM: dts: imx6qdl-nitrogen6_max: fix sgtl5000 pinctrl init
> ARM: dts: imx6qdl-nitrogen6_som2: fix sgtl5000 pinctrl init
Applied both, thanks.
^ permalink raw reply
* [PATCH] ARM: dts: imx53-qsb: Provide the TVE DAC regulators
From: Shawn Guo @ 2017-01-10 3:06 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1483470751-8073-1-git-send-email-festevam@gmail.com>
On Tue, Jan 03, 2017 at 05:12:31PM -0200, Fabio Estevam wrote:
> From: Fabio Estevam <fabio.estevam@nxp.com>
>
> On imx53-qsb the TVE DAC regulator comes from:
>
> - LDO7 on the board with the Dialog DA9052 PMIC
> - VDAC on the board with the MC34708 PMIC
>
> Pass them in the 'dac-supply' node.
>
> While at it, remove the 'regulator-always-on/regulator-boot-on'
> properties as the TVE driver will properly handle it.
>
> Tested on a imx53-qsb board with a Dialog DA9052 PMIC.
>
> Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Applied, thanks.
^ permalink raw reply
* [PATCH v3] arm64: dts: rockchip: add "rockchip, grf" property for RK3399 PMUCRU/CRU
From: Doug Anderson @ 2017-01-10 3:06 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1484011661-13474-1-git-send-email-zhengxing@rock-chips.com>
Hi,
On Mon, Jan 9, 2017 at 5:27 PM, Xing Zheng <zhengxing@rock-chips.com> wrote:
> The structure rockchip_clk_provider needs to refer the GRF regmap
> in somewhere, if the CRU node has not "rockchip,grf" property,
> calling syscon_regmap_lookup_by_phandle will return an invalid GRF
> regmap, and the MUXGRF type clock will be not supported.
>
> Therefore, we need to add them.
>
> Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
> ---
>
> Changes in v3:
> - add optional roperty rockchip,grf in rockchip,rk3399-cru.txt
>
> Changes in v2:
> - referring pmugrf for PMUGRU
> - fix the typo "invaild" in COMMIT message
>
> Documentation/devicetree/bindings/clock/rockchip,rk3399-cru.txt | 5 +++++
> arch/arm64/boot/dts/rockchip/rk3399.dtsi | 2 ++
"dts" and bindings shouldn't change in the same patch since they go
through different trees. This is why I said:
> This looks sane to me, but before you land it you need to first send
> up a (separate) patch that adjusts:
> --------
AKA: you need a two patch series here.
Sometimes it's OK to include bindings together with code changes
(depends on the maintainer), but never with dts changes.
-Doug
^ permalink raw reply
* [GIT PULL] ARM: Xilinx ZynqMP DT fixes for v4.10
From: Olof Johansson @ 2017-01-10 3:07 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1f71e528-74b0-c160-783f-0e41bf189f5e@monstr.eu>
On Mon, Jan 02, 2017 at 02:35:12PM +0100, Michal Simek wrote:
> Hi,
>
> please pull these two fixes to your tree. Will be good to get them to
> v4.10. If not possible, please queue them for 4.11.
>
> Thanks,
> Michal
>
>
> The following changes since commit 7ce7d89f48834cefece7804d38fc5d85382edf77:
>
> Linux 4.10-rc1 (2016-12-25 16:13:08 -0800)
>
> are available in the git repository at:
>
> https://github.com/Xilinx/linux-xlnx.git tags/zynmp-dt-fixes-for-4.10
>
> for you to fetch changes up to c415f9e8304a1d235ef118d912f374ee2e46c45d:
>
> ARM64: zynqmp: Fix i2c node's compatible string (2017-01-02 14:14:36
> +0100)
Merged.
Please use lowercase arm64: as prefix in the future. If ever in doubt, look at
the history and what most others have used for format. Thanks!
-Olof
^ permalink raw reply
* [PATCH v3] arm64: dts: rockchip: add "rockchip, grf" property for RK3399 PMUCRU/CRU
From: Doug Anderson @ 2017-01-10 3:08 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1484011661-13474-1-git-send-email-zhengxing@rock-chips.com>
Hi,
On Mon, Jan 9, 2017 at 5:27 PM, Xing Zheng <zhengxing@rock-chips.com> wrote:
> +Optional Properties:
> +
> +- rockchip,grf: phandle to the syscon managing the "general register files"
> + If missing pll rates are not changable, due to the missing pll lock status.
On rk3399 the GRF isn't used for pll lock status. It's used for PLL muxes.
...so technically if you don't include it then the PLL muxes won't be
changeable. Hopefully the code handles this if the property is listed
as "Optional". ...and unless Heiko says otherwise, you probably need
to list it as "Optional" since (presumably) there might be backward
compatibility issues.
-Doug
^ permalink raw reply
* [PATCH] ARM: multi_v7_defconfig: enable Qualcomm RPMCC
From: Olof Johansson @ 2017-01-10 3:10 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20170103185232.GJ10531@minitux>
On Tue, Jan 03, 2017 at 10:52:32AM -0800, Bjorn Andersson wrote:
> On Mon 02 Jan 12:35 PST 2017, Andy Gross wrote:
>
> > This patch enables the Qualcomm RPM based Clock Controller present on
> > A-family boards.
> >
> > Signed-off-by: Andy Gross <andy.gross@linaro.org>
>
> Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Applied to next/defconfig. Thanks.
-Olof
^ permalink raw reply
* [PATCH 0/3] MPU-3050 defconfig updates
From: Olof Johansson @ 2017-01-10 3:10 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161227120530.31190-1-linus.walleij@linaro.org>
On Tue, Dec 27, 2016 at 01:05:27PM +0100, Linus Walleij wrote:
> Here are three defconfig patches to the ARM SoC tree that replace
> the use of the partial input driver for MPU-3050 with the fully featured
> IIO replacement driver.
>
> Please apply these directly for defconfig updates post-v4.10-rc1.
>
> Linus Walleij (3):
> ARM: defconfig: replace MPU3050 driver on multi_v7
> ARM: defconfig: tegra: switch to MPU3050 IIO driver
> ARM: defconfig: pxa: cut MPU3050 input driver
Applied to next/defconfig. Thanks!
-Olof
^ permalink raw reply
* [PATCH] ARM, ARM64: dts: drop "arm,amba-bus" in favor of "simple-bus" part 3
From: Olof Johansson @ 2017-01-10 3:11 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1482853886-7932-1-git-send-email-yamada.masahiro@socionext.com>
On Wed, Dec 28, 2016 at 12:51:26AM +0900, Masahiro Yamada wrote:
> Tree-wide replacement was done by commit 2ef7d5f342c1 ("ARM, ARM64:
> dts: drop "arm,amba-bus" in favor of "simple-bus"), then the 2nd
> round by commit 15b7cc78f095 ("arm64: dts: drop "arm,amba-bus" in
> favor of "simple-bus" part 2").
>
> Here, some new users have appeared for Linux v4.10-rc1. Eliminate
> them now.
>
> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
> ---
>
> Hi Arnd, Olof,
>
> Can you pick this up for v4.10 fixes?
>
> If we carry arm,amba-bus until the release, we will need to
> take more time to deprecate it.
Applied to fixes for 4.10.
Thanks,
-Olof
^ permalink raw reply
* [PATCH V3] arm64: dts: ls1046a: Add TMU device tree support
From: Shawn Guo @ 2017-01-10 3:12 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1483497385-22121-1-git-send-email-hongtao.jia@nxp.com>
On Wed, Jan 04, 2017 at 10:36:25AM +0800, Jia Hongtao wrote:
> Also add nodes and properties for thermal management support.
>
> Signed-off-by: Jia Hongtao <hongtao.jia@nxp.com>
Applied, thanks.
^ permalink raw reply
* [GIT PULL] Renesas ARM Based SoC Defconfig Updates for v4.11
From: Olof Johansson @ 2017-01-10 3:13 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1483701293.git.horms+renesas@verge.net.au>
On Fri, Jan 06, 2017 at 12:18:10PM +0100, Simon Horman wrote:
> Hi Olof, Hi Kevin, Hi Arnd,
>
> Please consider these Renesas ARM based SoC defconfig updates for v4.11.
>
>
> The following changes since commit 7ce7d89f48834cefece7804d38fc5d85382edf77:
>
> Linux 4.10-rc1 (2016-12-25 16:13:08 -0800)
>
> are available in the git repository at:
>
> https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git tags/renesas-defconfig-for-v4.11
>
> for you to fetch changes up to e37278d83e348eb53029452e65892780359b6bea:
>
> ARM: multi_v7_defconfig: Enable r8a774[35] SoCs (2017-01-03 10:44:04 +0100)
>
> ----------------------------------------------------------------
> Renesas ARM Based SoC Defconfig Updates for v4.11
>
> Enable:
> * Recently added Enable r8a774[35] SoCs
> * CMA for DMA to allow use of VIN with large frame sizes
> * CONFIG_VIDEO_ADV7604 to allow use of HDMI input
Merged into next/defconfig. Thanks.
-Olof
^ permalink raw reply
* [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.11
From: Olof Johansson @ 2017-01-10 3:15 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1483700694.git.horms+renesas@verge.net.au>
On Fri, Jan 06, 2017 at 12:17:56PM +0100, Simon Horman wrote:
> Hi Olof, Hi Kevin, Hi Arnd,
>
> Please consider these Renesas ARM64 based SoC DT updates for v4.11.
>
> This is based on v4.10-rc2 as v4.10-rc1 does not compile using
> the defconfig.
>
>
> The following changes since commit 0c744ea4f77d72b3dcebb7a8f2684633ec79be88:
>
> Linux 4.10-rc2 (2017-01-01 14:31:53 -0800)
>
> are available in the git repository at:
>
> https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git tags/renesas-arm64-dt-for-v4.11
>
> for you to fetch changes up to b2b9443beee5017ebdb3f2be9ef472c73d260481:
>
> arm64: dts: r8a7795: Add PWM support (2017-01-04 10:00:44 +0100)
>
> ----------------------------------------------------------------
> Renesas ARM64 Based SoC DT Updates for v4.11
>
> * Add PWM, and sound MIX and CTU support to r8a7795 SoC
> * Add CAN, CAN FD and all MSIOF nodes to r8a7796 SoC
> * Use Gen 3 fallback binding for i2c, msiof, PCIE and USB2 phy
> * Enable Ethernet and 4 GiB memory on r8a7796/salvator-x board
> * Add r8a7796/salvator-x board part number to bindings
Merged, thanks.
> ----------------------------------------------------------------
> Chris Paterson (3):
> arm64: dts: r8a7796: Add CAN external clock support
> arm64: dts: r8a7796: Add CAN support
> arm64: dts: r8a7796: Add CAN FD support
>
> Geert Uytterhoeven (2):
> arm64: dts: r8a7796: Add all MSIOF nodes
> arm64: renesas: r8a7796/salvator-x: Add board part number to DT bindings
Nit: When you look at the shortlog, these with different/random format
stand out. Feel free to fix them before sending next time.
-Olof
^ permalink raw reply
* [GIT PULL] Renesas ARM Based SoC DT Updates for v4.11
From: Olof Johansson @ 2017-01-10 3:16 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1483700969.git.horms+renesas@verge.net.au>
On Fri, Jan 06, 2017 at 12:18:31PM +0100, Simon Horman wrote:
> Hi Olof, Hi Kevin, Hi Arnd,
>
> Please consider these Renesas ARM based SoC DT updates for v4.11.
>
>
> The following changes since commit 7ce7d89f48834cefece7804d38fc5d85382edf77:
>
> Linux 4.10-rc1 (2016-12-25 16:13:08 -0800)
>
> are available in the git repository at:
>
> https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git tags/renesas-dt-for-v4.11
>
> for you to fetch changes up to 654450baf2afba86cf328e1849ccac61ec4630af:
>
> ARM: dts: r8a7790: Use R-Car Gen 2 fallback binding for msiof nodes (2017-01-03 10:47:05 +0100)
>
> ----------------------------------------------------------------
> Renesas ARM Based SoC DT Updates for v4.11
>
> * Add da9063 PMIC device node for system restart to gose board
> * Add device node for PRR to SoCs where it was missing
> * Move RST node before SYSC node where it was incorrectly placed
> * Use Gen 2 fallback bindings for I2C, IIC, MSIOf and USB2 phy
> * Use SoC-specific compat string for MMCIF where it was missing
Merged, thanks.
-Olof
^ permalink raw reply
* [GIT PULL] Renesas ARM Based SoC Updates for v4.11
From: Olof Johansson @ 2017-01-10 3:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1483701101.git.horms+renesas@verge.net.au>
On Fri, Jan 06, 2017 at 12:18:48PM +0100, Simon Horman wrote:
> Hi Olof, Hi Kevin, Hi Arnd,
>
> Please consider these Renesas ARM based SoC updates for v4.11.
>
>
> The following changes since commit 7ce7d89f48834cefece7804d38fc5d85382edf77:
>
> Linux 4.10-rc1 (2016-12-25 16:13:08 -0800)
>
> are available in the git repository at:
>
> https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git tags/renesas-soc-for-v4.11
>
> for you to fetch changes up to 70def3e53694a65c5583fb5f411491a5074bab18:
>
> ARM: shmobile: rcar-gen2: Remove unused rcar_gen2_read_mode_pins() (2017-01-03 10:50:45 +0100)
>
> ----------------------------------------------------------------
> Renesas ARM Based SoC Updates for v4.11
>
> * Allow booting secondary CPU cores in debug mode
Merged, thanks.
-Olof
^ permalink raw reply
* [PATCH v2 04/12] driver: clk: imx: Add clock driver for imx6sll
From: Jacky Bai @ 2017-01-10 3:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20170110003753.GM17126@codeaurora.org>
> > +#include <dt-bindings/clock/imx6sll-clock.h>
> > +#include <linux/clk.h>
> > +#include <linux/clkdev.h>
>
> Is this used?
Sorry, this should be removed.
>
> > +#include <linux/err.h>
> > +#include <linux/init.h>
> > +#include <linux/io.h>
> > +#include <linux/of.h>
> > +#include <linux/of_address.h>
> > +#include <linux/of_irq.h>
>
> Is this used?
I will remove it.
>
> > +#include <linux/types.h>
> > +
> > +#include "clk.h"
> > +
> > +#define CCM_ANALOG_PLL_BYPASS (0x1 << 16)
> > +#define BM_CCM_CCDR_MMDC_CH0_MASK (0x2 << 16)
> > +#define CCDR 0x4
> > +#define xPLL_CLR(offset) (offset + 0x8)
> > +
> > +static const char *pll_bypass_src_sels[] = { "osc", "dummy", };
>
> All these should be const char * const unless something is wrong.
If changed to 'const char * const', it vill has argument type mismatch error, as imx_clk_* wrapper function
has argument type 'const char *'.
>
> > +static const char *pll1_bypass_sels[] = { "pll1", "pll1_bypass_src",
> > +}; static const char *pll2_bypass_sels[] = { "pll2",
> > +"pll2_bypass_src", }; static const char *pll3_bypass_sels[] = {
> > +"pll3", "pll3_bypass_src", }; static const char *pll4_bypass_sels[] =
> > +{ "pll4", "pll4_bypass_src", }; static const char *pll5_bypass_sels[]
> > += { "pll5", "pll5_bypass_src", }; static const char
> > +*pll6_bypass_sels[] = { "pll6", "pll6_bypass_src", };
> [...]
> > + clks[IMX6SLL_CLK_USDHC3] = imx_clk_gate2("usdhc3",
> "usdhc3_podf", base + 0x80, 6);
> > +
> > + /* mask handshake of mmdc */
> > + writel_relaxed(BM_CCM_CCDR_MMDC_CH0_MASK, base + CCDR);
> > +
> > + for (i = 0; i < ARRAY_SIZE(clks); i++)
> > + if (IS_ERR(clks[i]))
> > + pr_err("i.MX6SLL clk %d: register failed with %ld\n", i,
> > +PTR_ERR(clks[i]));
> > +
> > + clk_data.clks = clks;
> > + clk_data.clk_num = ARRAY_SIZE(clks);
> > + of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data);
> > +
> > + /* set perclk to from OSC */
> > + clk_set_parent(clks[IMX6SLL_CLK_PERCLK_SEL],
> clks[IMX6SLL_CLK_OSC]);
>
> Can this be done with assigned-clocks in DT?
Ok, I will move it to assigned-clocks in DT.
>
> > +
> > + for (i = 0; i < ARRAY_SIZE(clks_init_on); i++)
> > + clk_prepare_enable(clks[clks_init_on[i]]);
>
> Critical clocks?
Yes, these clocks must be always on.
>
> > +
> > + if (IS_ENABLED(CONFIG_USB_MXS_PHY)) {
> > + clk_prepare_enable(clks[IMX6SLL_CLK_USBPHY1_GATE]);
> > + clk_prepare_enable(clks[IMX6SLL_CLK_USBPHY2_GATE]);
>
> The phy driver can't enable these?
The reason why we enable these two clks here is in below commit
commit a5120e89e7e187a91852896f586876c7a2030804
Author: Peter Chen <peter.chen@freescale.com>
Date: Fri Jan 18 10:38:05 2013 +0800
ARM i.MX6: change mxs usbphy clock usage
>
> > + }
> > +
> > + /* Lower the AHB clock rate before changing the clock source. */
> > + clk_set_rate(clks[IMX6SLL_CLK_AHB], 99000000);
> > +
> > + /* Change periph_pre clock to pll2_bus to adjust AXI rate to 264MHz */
> > + clk_set_parent(clks[IMX6SLL_CLK_PERIPH_CLK2_SEL],
> clks[IMX6SLL_CLK_PLL3_USB_OTG]);
> > + clk_set_parent(clks[IMX6SLL_CLK_PERIPH],
> clks[IMX6SLL_CLK_PERIPH_CLK2]);
> > + clk_set_parent(clks[IMX6SLL_CLK_PERIPH_PRE],
> clks[IMX6SLL_CLK_PLL2_BUS]);
> > + clk_set_parent(clks[IMX6SLL_CLK_PERIPH],
> > +clks[IMX6SLL_CLK_PERIPH_PRE]);
> > +
> > + clk_set_rate(clks[IMX6SLL_CLK_AHB], 132000000);
>
> assigned-clocks for rates now? Or perhaps we shouldn't be exposing these as
> clks if they have some sort of complicated rate sequence switch that we can't
> guarantee with the clk_ops we have today.
These clks will be used by some peripherals, so we need to expose these clocks.
And the above parent and rate swith sequence is not very easy to be handled in assigned-clocks,
So we leave it in this place.
>
> > +}
> > +
> > +CLK_OF_DECLARE(imx6sll, "fsl,imx6sll-ccm", imx6sll_clocks_init);
> > +
>
> Please drop this extra newline.
>
Thanks, will remove in V3.
> --
> Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux
> Foundation Collaborative Project
^ permalink raw reply
* [GIT PULL] ARM: OXNAS SoC DT updates for 4.11
From: Olof Johansson @ 2017-01-10 3:19 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <fc1ba783-7bb6-2aa2-3e63-fdf318984eb8@baylibre.com>
On Fri, Jan 06, 2017 at 02:39:57PM +0100, Neil Armstrong wrote:
> Dear arm-soc maintainers,
>
> The following changes since commit 0c744ea4f77d72b3dcebb7a8f2684633ec79be88:
>
> Linux 4.10-rc2 (2017-01-01 14:31:53 -0800)
>
> are available in the git repository at:
>
> https://github.com/OXNAS/linux.git tags/oxnas-arm-soc-dt-for-4.11
>
> for you to fetch changes up to 0c5987d3e3c5bf7fb861230ee6d2a0f17a1dcd3b:
>
> ARM: dts: OX820: Update with dt-bindings includes (2017-01-04 10:31:34 +0100)
>
> ----------------------------------------------------------------
> - Add dt-bindings includes for OX820 and OX810SE dtsi
> - Replace reset and clock magic numbers for OX820 and OX810SE
Excellent, thanks! Merged into next/dt.
-Olof
^ permalink raw reply
* [GIT PULL] Allwinner conversion to generic pin properties
From: Olof Johansson @ 2017-01-10 3:21 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20161226074214.sd53ozm6hvzkdb26@lukather>
Hi,
On Mon, Dec 26, 2016 at 08:42:14AM +0100, Maxime Ripard wrote:
> Hi Arnd, Olof,
>
> Like we discussed it last time, here is a pull request with the
> convertion patches to the generic pin properties for 4.10.
>
> Thanks,
> Maxime
>
> The following changes since commit 7ce7d89f48834cefece7804d38fc5d85382edf77:
>
> Linux 4.10-rc1 (2016-12-25 16:13:08 -0800)
>
> are available in the git repository at:
>
> https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux.git tags/sunxi-generic-pinconf-for-4.10
>
> for you to fetch changes up to 1edcd36fcb48fe841bcc62eda36c105037d9583c:
>
> ARM: sunxi: Convert pinctrl nodes to generic bindings (2016-12-26 08:27:11 +0100)
>
> ----------------------------------------------------------------
> Allwinner conversion to generic pin muxing properties
>
> Here is a list of patches that converts the current DT to the generic pin
> control and muxing properties, now that the pinctrl driver supports it.
I dropped the ball on this over the holidays for a few reasons, none of them
good. Unfortunately we're at -rc3+ now, so I've queued this up in next/dt for
v4.11 at this point. Hope that's alright.
You might want to use your branch as a base for new DT contents for
v4.11 in case it ends up being conflict-heavy, which would work fine at our
end.
Regards,
-Olof
^ permalink raw reply
* [PATCH resend v4 2/3] ARM: dts: imx6: Support Savageboard dual
From: Shawn Guo @ 2017-01-10 3:27 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20170104070436.3425-1-woogyom.kim@gmail.com>
On Wed, Jan 04, 2017 at 04:04:36PM +0900, Milo Kim wrote:
> Common savageboard DT file is used for board support.
> Add the vendor name and specify the dtb file for i.MX6Q build.
>
> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
> Signed-off-by: Milo Kim <woogyom.kim@gmail.com>
> ---
> .../devicetree/bindings/vendor-prefixes.txt | 1 +
The bindings change should be ideally a separate patch. But since Rob
seems to be fine with it this time, I just applied the whole series.
Shawn
> arch/arm/boot/dts/Makefile | 1 +
> arch/arm/boot/dts/imx6dl-savageboard.dts | 51 ++++++++++++++++++++++
> 3 files changed, 53 insertions(+)
> create mode 100644 arch/arm/boot/dts/imx6dl-savageboard.dts
^ permalink raw reply
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