* [PATCH v3 3/5] ARM: davinci: make davinci_clk_reset() static
From: David Lechner @ 2017-12-09 2:15 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1512785711-15064-1-git-send-email-david@lechnology.com>
This makes davinci_clk_reset() static. It is not used anywhere else.
Signed-off-by: David Lechner <david@lechnology.com>
---
arch/arm/mach-davinci/clock.c | 3 +--
arch/arm/mach-davinci/clock.h | 1 -
2 files changed, 1 insertion(+), 3 deletions(-)
diff --git a/arch/arm/mach-davinci/clock.c b/arch/arm/mach-davinci/clock.c
index 5f0a31d..c149b24 100644
--- a/arch/arm/mach-davinci/clock.c
+++ b/arch/arm/mach-davinci/clock.c
@@ -59,7 +59,7 @@ void davinci_clk_disable(struct clk *clk)
davinci_clk_disable(clk->parent);
}
-int davinci_clk_reset(struct clk *clk, bool reset)
+static int davinci_clk_reset(struct clk *clk, bool reset)
{
unsigned long flags;
@@ -73,7 +73,6 @@ int davinci_clk_reset(struct clk *clk, bool reset)
return 0;
}
-EXPORT_SYMBOL(davinci_clk_reset);
int davinci_clk_reset_assert(struct clk *clk)
{
diff --git a/arch/arm/mach-davinci/clock.h b/arch/arm/mach-davinci/clock.h
index e4afaa9..bf60cdf 100644
--- a/arch/arm/mach-davinci/clock.h
+++ b/arch/arm/mach-davinci/clock.h
@@ -124,7 +124,6 @@ int davinci_set_pllrate(struct pll_data *pll, unsigned int prediv,
int davinci_set_sysclk_rate(struct clk *clk, unsigned long rate);
int davinci_set_refclk_rate(unsigned long rate);
int davinci_simple_set_rate(struct clk *clk, unsigned long rate);
-int davinci_clk_reset(struct clk *clk, bool reset);
void davinci_clk_enable(struct clk *clk);
void davinci_clk_disable(struct clk *clk);
--
2.7.4
^ permalink raw reply related
* [PATCH v3 4/5] ARM: davinci: convert to common clock framework
From: David Lechner @ 2017-12-09 2:15 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1512785711-15064-1-git-send-email-david@lechnology.com>
This converts the clocks in mach-davinci to the common clock framework.
Most of the patch just involves renaming struct clk to struct davinci_clk.
There is also a struct clk_hw added to provide the bridge between the
existing clock implementation and the common clock framework.
The clk_get_parent and clk_set_parent callbacks are dropped because all
clocks currently (effectivly) have a single parent, in which case the
common clock framework does not want you to implement these functions
yourself.
clk_unregister() is dropped because it is not used anywhere in
mach-davinci.
EXPORT_SYMBOL() is removed from functions not used outside of mach-davinci.
Fixed checkpatch.pl warning about bare use of unsigned in dump_clock().
Signed-off-by: David Lechner <david@lechnology.com>
---
arch/arm/Kconfig | 2 +-
arch/arm/mach-davinci/clock.c | 162 ++++++++++++-----------------
arch/arm/mach-davinci/clock.h | 40 ++++---
arch/arm/mach-davinci/da830.c | 100 +++++++++---------
arch/arm/mach-davinci/da850.c | 153 +++++++++++++--------------
arch/arm/mach-davinci/devices-da8xx.c | 6 +-
arch/arm/mach-davinci/dm355.c | 84 +++++++--------
arch/arm/mach-davinci/dm365.c | 112 ++++++++++----------
arch/arm/mach-davinci/dm644x.c | 72 ++++++-------
arch/arm/mach-davinci/dm646x.c | 78 +++++++-------
arch/arm/mach-davinci/include/mach/clock.h | 3 -
arch/arm/mach-davinci/usb-da8xx.c | 48 +++++----
12 files changed, 425 insertions(+), 435 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 51c8df5..3a12f9e 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -604,7 +604,7 @@ config ARCH_S3C24XX
config ARCH_DAVINCI
bool "TI DaVinci"
select ARCH_HAS_HOLES_MEMORYMODEL
- select CLKDEV_LOOKUP
+ select COMMON_CLK
select CPU_ARM926T
select GENERIC_ALLOCATOR
select GENERIC_CLOCKEVENTS
diff --git a/arch/arm/mach-davinci/clock.c b/arch/arm/mach-davinci/clock.c
index c149b24..0e63d93 100644
--- a/arch/arm/mach-davinci/clock.c
+++ b/arch/arm/mach-davinci/clock.c
@@ -31,7 +31,7 @@ static LIST_HEAD(clocks);
static DEFINE_MUTEX(clocks_mutex);
static DEFINE_SPINLOCK(clockfw_lock);
-void davinci_clk_enable(struct clk *clk)
+void davinci_clk_enable(struct davinci_clk *clk)
{
if (clk->parent)
davinci_clk_enable(clk->parent);
@@ -44,7 +44,7 @@ void davinci_clk_enable(struct clk *clk)
}
}
-void davinci_clk_disable(struct clk *clk)
+void davinci_clk_disable(struct davinci_clk *clk)
{
if (WARN_ON(clk->usecount == 0))
return;
@@ -59,7 +59,7 @@ void davinci_clk_disable(struct clk *clk)
davinci_clk_disable(clk->parent);
}
-static int davinci_clk_reset(struct clk *clk, bool reset)
+static int davinci_clk_reset(struct davinci_clk *clk, bool reset)
{
unsigned long flags;
@@ -76,24 +76,29 @@ static int davinci_clk_reset(struct clk *clk, bool reset)
int davinci_clk_reset_assert(struct clk *clk)
{
- if (clk == NULL || IS_ERR(clk) || !clk->reset)
+ struct davinci_clk *dclk = to_davinci_clk(__clk_get_hw(clk));
+
+ if (IS_ERR_OR_NULL(dclk) || !dclk->reset)
return -EINVAL;
- return clk->reset(clk, true);
+ return dclk->reset(dclk, true);
}
EXPORT_SYMBOL(davinci_clk_reset_assert);
int davinci_clk_reset_deassert(struct clk *clk)
{
- if (clk == NULL || IS_ERR(clk) || !clk->reset)
+ struct davinci_clk *dclk = to_davinci_clk(__clk_get_hw(clk));
+
+ if (IS_ERR_OR_NULL(dclk) || !dclk->reset)
return -EINVAL;
- return clk->reset(clk, false);
+ return dclk->reset(dclk, false);
}
EXPORT_SYMBOL(davinci_clk_reset_deassert);
-int clk_enable(struct clk *clk)
+static int _clk_enable(struct clk_hw *hw)
{
+ struct davinci_clk *clk = to_davinci_clk(hw);
unsigned long flags;
if (!clk)
@@ -107,10 +112,10 @@ int clk_enable(struct clk *clk)
return 0;
}
-EXPORT_SYMBOL(clk_enable);
-void clk_disable(struct clk *clk)
+static void _clk_disable(struct clk_hw *hw)
{
+ struct davinci_clk *clk = to_davinci_clk(hw);
unsigned long flags;
if (clk == NULL || IS_ERR(clk))
@@ -120,19 +125,26 @@ void clk_disable(struct clk *clk)
davinci_clk_disable(clk);
spin_unlock_irqrestore(&clockfw_lock, flags);
}
-EXPORT_SYMBOL(clk_disable);
-unsigned long clk_get_rate(struct clk *clk)
+static unsigned long _clk_recalc_rate(struct clk_hw *hw,
+ unsigned long parent_rate)
{
+ struct davinci_clk *clk = to_davinci_clk(hw);
+
if (clk == NULL || IS_ERR(clk))
return 0;
+ if (clk->recalc)
+ return clk->recalc(clk);
+
return clk->rate;
}
-EXPORT_SYMBOL(clk_get_rate);
-long clk_round_rate(struct clk *clk, unsigned long rate)
+static long _clk_round_rate(struct clk_hw *hw, unsigned long rate,
+ unsigned long *parent_rate)
{
+ struct davinci_clk *clk = to_davinci_clk(hw);
+
if (clk == NULL || IS_ERR(clk))
return 0;
@@ -141,12 +153,11 @@ long clk_round_rate(struct clk *clk, unsigned long rate)
return clk->rate;
}
-EXPORT_SYMBOL(clk_round_rate);
/* Propagate rate to children */
-static void propagate_rate(struct clk *root)
+static void propagate_rate(struct davinci_clk *root)
{
- struct clk *clk;
+ struct davinci_clk *clk;
list_for_each_entry(clk, &root->children, childnode) {
if (clk->recalc)
@@ -155,8 +166,10 @@ static void propagate_rate(struct clk *root)
}
}
-int clk_set_rate(struct clk *clk, unsigned long rate)
+static int _clk_set_rate(struct clk_hw *hw, unsigned long rate,
+ unsigned long parent_rate)
{
+ struct davinci_clk *clk = to_davinci_clk(hw);
unsigned long flags;
int ret = -EINVAL;
@@ -178,56 +191,20 @@ int clk_set_rate(struct clk *clk, unsigned long rate)
return ret;
}
-EXPORT_SYMBOL(clk_set_rate);
-
-int clk_set_parent(struct clk *clk, struct clk *parent)
-{
- unsigned long flags;
-
- if (!clk)
- return 0;
- else if (IS_ERR(clk))
- return -EINVAL;
-
- /* Cannot change parent on enabled clock */
- if (WARN_ON(clk->usecount))
- return -EINVAL;
-
- mutex_lock(&clocks_mutex);
- if (clk->set_parent) {
- int ret = clk->set_parent(clk, parent);
-
- if (ret) {
- mutex_unlock(&clocks_mutex);
- return ret;
- }
- }
- clk->parent = parent;
- list_del_init(&clk->childnode);
- list_add(&clk->childnode, &clk->parent->children);
- mutex_unlock(&clocks_mutex);
-
- spin_lock_irqsave(&clockfw_lock, flags);
- if (clk->recalc)
- clk->rate = clk->recalc(clk);
- propagate_rate(clk);
- spin_unlock_irqrestore(&clockfw_lock, flags);
- return 0;
-}
-EXPORT_SYMBOL(clk_set_parent);
+static const struct clk_ops davinci_clk_ops = {
+ .enable = _clk_enable,
+ .disable = _clk_disable,
+ .recalc_rate = _clk_recalc_rate,
+ .round_rate = _clk_round_rate,
+ .set_rate = _clk_set_rate,
+};
-struct clk *clk_get_parent(struct clk *clk)
+int davinci_clk_register(struct davinci_clk *clk)
{
- if (!clk)
- return NULL;
-
- return clk->parent;
-}
-EXPORT_SYMBOL(clk_get_parent);
+ struct clk_init_data init = {};
+ int ret;
-int clk_register(struct clk *clk)
-{
if (clk == NULL || IS_ERR(clk))
return -EINVAL;
@@ -242,7 +219,7 @@ int clk_register(struct clk *clk)
list_add_tail(&clk->node, &clocks);
if (clk->parent) {
if (clk->set_parent) {
- int ret = clk->set_parent(clk, clk->parent);
+ ret = clk->set_parent(clk, clk->parent);
if (ret) {
mutex_unlock(&clocks_mutex);
@@ -253,6 +230,18 @@ int clk_register(struct clk *clk)
}
mutex_unlock(&clocks_mutex);
+ init.name = clk->name;
+ init.ops = &davinci_clk_ops;
+ if (clk->parent) {
+ init.parent_names = &clk->parent->name;
+ init.num_parents = 1;
+ }
+ clk->hw.init = &init;
+
+ ret = clk_hw_register(NULL, &clk->hw);
+ if (WARN(ret, "Failed to register clock '%s'\n", clk->name))
+ return ret;
+
/* If rate is already set, use it */
if (clk->rate)
return 0;
@@ -267,19 +256,6 @@ int clk_register(struct clk *clk)
return 0;
}
-EXPORT_SYMBOL(clk_register);
-
-void clk_unregister(struct clk *clk)
-{
- if (clk == NULL || IS_ERR(clk))
- return;
-
- mutex_lock(&clocks_mutex);
- list_del(&clk->node);
- list_del(&clk->childnode);
- mutex_unlock(&clocks_mutex);
-}
-EXPORT_SYMBOL(clk_unregister);
#ifdef CONFIG_DAVINCI_RESET_CLOCKS
/*
@@ -287,7 +263,7 @@ EXPORT_SYMBOL(clk_unregister);
*/
int __init davinci_clk_disable_unused(void)
{
- struct clk *ck;
+ struct davinci_clk *ck;
spin_lock_irq(&clockfw_lock);
list_for_each_entry(ck, &clocks, node) {
@@ -311,7 +287,7 @@ int __init davinci_clk_disable_unused(void)
}
#endif
-static unsigned long clk_sysclk_recalc(struct clk *clk)
+static unsigned long clk_sysclk_recalc(struct davinci_clk *clk)
{
u32 v, plldiv;
struct pll_data *pll;
@@ -349,7 +325,7 @@ static unsigned long clk_sysclk_recalc(struct clk *clk)
return rate;
}
-int davinci_set_sysclk_rate(struct clk *clk, unsigned long rate)
+int davinci_set_sysclk_rate(struct davinci_clk *clk, unsigned long rate)
{
unsigned v;
struct pll_data *pll;
@@ -420,9 +396,8 @@ int davinci_set_sysclk_rate(struct clk *clk, unsigned long rate)
return 0;
}
-EXPORT_SYMBOL(davinci_set_sysclk_rate);
-static unsigned long clk_leafclk_recalc(struct clk *clk)
+static unsigned long clk_leafclk_recalc(struct davinci_clk *clk)
{
if (WARN_ON(!clk->parent))
return clk->rate;
@@ -430,13 +405,13 @@ static unsigned long clk_leafclk_recalc(struct clk *clk)
return clk->parent->rate;
}
-int davinci_simple_set_rate(struct clk *clk, unsigned long rate)
+int davinci_simple_set_rate(struct davinci_clk *clk, unsigned long rate)
{
clk->rate = rate;
return 0;
}
-static unsigned long clk_pllclk_recalc(struct clk *clk)
+static unsigned long clk_pllclk_recalc(struct davinci_clk *clk)
{
u32 ctrl, mult = 1, prediv = 1, postdiv = 1;
u8 bypass;
@@ -572,7 +547,6 @@ int davinci_set_pllrate(struct pll_data *pll, unsigned int prediv,
return 0;
}
-EXPORT_SYMBOL(davinci_set_pllrate);
/**
* davinci_set_refclk_rate() - Set the reference clock rate
@@ -606,7 +580,7 @@ int davinci_set_refclk_rate(unsigned long rate)
return 0;
}
-void __init davinci_clk_init(struct clk *clk, const char *con_id,
+void __init davinci_clk_init(struct davinci_clk *clk, const char *con_id,
const char *dev_id)
{
if (!clk->recalc) {
@@ -645,12 +619,12 @@ void __init davinci_clk_init(struct clk *clk, const char *con_id,
if (clk->flags & PSC_LRST)
clk->reset = davinci_clk_reset;
- clk_register(clk);
- clk_register_clkdev(clk, con_id, dev_id);
+ davinci_clk_register(clk);
+ clk_register_clkdev(clk->hw.clk, con_id, dev_id);
/* Turn on clocks that Linux doesn't otherwise manage */
if (clk->flags & ALWAYS_ENABLED)
- clk_enable(clk);
+ clk_prepare_enable(clk->hw.clk);
}
#ifdef CONFIG_DEBUG_FS
@@ -663,11 +637,11 @@ void __init davinci_clk_init(struct clk *clk, const char *con_id,
#define NEST_MAX 4
static void
-dump_clock(struct seq_file *s, unsigned nest, struct clk *parent)
+dump_clock(struct seq_file *s, unsigned int nest, struct davinci_clk *parent)
{
char *state;
char buf[CLKNAME_MAX + NEST_DELTA * NEST_MAX];
- struct clk *clk;
+ struct davinci_clk *clk;
unsigned i;
if (parent->flags & CLK_PLL)
@@ -685,7 +659,7 @@ dump_clock(struct seq_file *s, unsigned nest, struct clk *parent)
min(i, (unsigned)(sizeof(buf) - 1 - nest)));
seq_printf(s, "%s users=%2d %-3s %9ld Hz\n",
- buf, parent->usecount, state, clk_get_rate(parent));
+ buf, parent->usecount, state, parent->rate);
/* REVISIT show device associations too */
/* cost is now small, but not linear... */
@@ -696,7 +670,7 @@ dump_clock(struct seq_file *s, unsigned nest, struct clk *parent)
static int davinci_ck_show(struct seq_file *m, void *v)
{
- struct clk *clk;
+ struct davinci_clk *clk;
/*
* Show clock tree; We trust nonzero usecounts equate to PSC enables...
diff --git a/arch/arm/mach-davinci/clock.h b/arch/arm/mach-davinci/clock.h
index bf60cdf..aea4f14 100644
--- a/arch/arm/mach-davinci/clock.h
+++ b/arch/arm/mach-davinci/clock.h
@@ -68,6 +68,7 @@
#ifndef __ASSEMBLER__
#include <linux/list.h>
+#include <linux/clk-provider.h>
#include <linux/clkdev.h>
#define PLLSTAT_GOSTAT BIT(0)
@@ -84,7 +85,8 @@ struct pll_data {
#define PLL_HAS_PREDIV 0x01
#define PLL_HAS_POSTDIV 0x02
-struct clk {
+struct davinci_clk {
+ struct clk_hw hw;
struct list_head node;
struct module *owner;
const char *name;
@@ -95,18 +97,18 @@ struct clk {
u8 gpsc;
u8 domain;
u32 flags;
- struct clk *parent;
+ struct davinci_clk *parent;
struct list_head children; /* list of children */
struct list_head childnode; /* parent's child list node */
struct pll_data *pll_data;
u32 div_reg;
- unsigned long (*recalc) (struct clk *);
- int (*set_rate) (struct clk *clk, unsigned long rate);
- int (*round_rate) (struct clk *clk, unsigned long rate);
- int (*reset) (struct clk *clk, bool reset);
- void (*clk_enable) (struct clk *clk);
- void (*clk_disable) (struct clk *clk);
- int (*set_parent) (struct clk *clk, struct clk *parent);
+ unsigned long (*recalc)(struct davinci_clk *clk);
+ int (*set_rate)(struct davinci_clk *clk, unsigned long rate);
+ int (*round_rate)(struct davinci_clk *clk, unsigned long rate);
+ int (*reset)(struct davinci_clk *clk, bool reset);
+ void (*clk_enable)(struct davinci_clk *clk);
+ void (*clk_disable)(struct davinci_clk *clk);
+ int (*set_parent)(struct davinci_clk *clk, struct davinci_clk *parent);
};
/* Clock flags: SoC-specific flags start at BIT(16) */
@@ -118,18 +120,28 @@ struct clk {
#define PSC_FORCE BIT(6) /* Force module state transtition */
#define PSC_LRST BIT(8) /* Use local reset on enable/disable */
-void davinci_clk_init(struct clk *clk, const char *con_id, const char *dev_id);
+void davinci_clk_init(struct davinci_clk *clk, const char *con_id,
+ const char *dev_id);
int davinci_set_pllrate(struct pll_data *pll, unsigned int prediv,
unsigned int mult, unsigned int postdiv);
-int davinci_set_sysclk_rate(struct clk *clk, unsigned long rate);
+int davinci_set_sysclk_rate(struct davinci_clk *clk, unsigned long rate);
int davinci_set_refclk_rate(unsigned long rate);
-int davinci_simple_set_rate(struct clk *clk, unsigned long rate);
-void davinci_clk_enable(struct clk *clk);
-void davinci_clk_disable(struct clk *clk);
+int davinci_simple_set_rate(struct davinci_clk *clk, unsigned long rate);
+void davinci_clk_enable(struct davinci_clk *clk);
+void davinci_clk_disable(struct davinci_clk *clk);
+int davinci_clk_register(struct davinci_clk *clk);
extern struct platform_device davinci_wdt_device;
extern void davinci_watchdog_reset(struct platform_device *);
+static inline struct davinci_clk *to_davinci_clk(struct clk_hw *hw)
+{
+ if (IS_ERR_OR_NULL(hw))
+ return (struct davinci_clk *)hw;
+
+ return container_of(hw, struct davinci_clk, hw);
+}
+
#endif
#endif
diff --git a/arch/arm/mach-davinci/da830.c b/arch/arm/mach-davinci/da830.c
index 1a99d22..7f276a5 100644
--- a/arch/arm/mach-davinci/da830.c
+++ b/arch/arm/mach-davinci/da830.c
@@ -43,322 +43,322 @@ static struct pll_data pll0_data = {
.flags = PLL_HAS_PREDIV | PLL_HAS_POSTDIV,
};
-static struct clk ref_clk = {
+static struct davinci_clk ref_clk = {
.name = "ref_clk",
.rate = DA830_REF_FREQ,
};
-static struct clk pll0_clk = {
+static struct davinci_clk pll0_clk = {
.name = "pll0",
.parent = &ref_clk,
.pll_data = &pll0_data,
.flags = CLK_PLL,
};
-static struct clk pll0_aux_clk = {
+static struct davinci_clk pll0_aux_clk = {
.name = "pll0_aux_clk",
.parent = &pll0_clk,
.flags = CLK_PLL | PRE_PLL,
};
-static struct clk pll0_sysclk2 = {
+static struct davinci_clk pll0_sysclk2 = {
.name = "pll0_sysclk2",
.parent = &pll0_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV2,
};
-static struct clk pll0_sysclk3 = {
+static struct davinci_clk pll0_sysclk3 = {
.name = "pll0_sysclk3",
.parent = &pll0_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV3,
};
-static struct clk pll0_sysclk4 = {
+static struct davinci_clk pll0_sysclk4 = {
.name = "pll0_sysclk4",
.parent = &pll0_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV4,
};
-static struct clk pll0_sysclk5 = {
+static struct davinci_clk pll0_sysclk5 = {
.name = "pll0_sysclk5",
.parent = &pll0_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV5,
};
-static struct clk pll0_sysclk6 = {
+static struct davinci_clk pll0_sysclk6 = {
.name = "pll0_sysclk6",
.parent = &pll0_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV6,
};
-static struct clk pll0_sysclk7 = {
+static struct davinci_clk pll0_sysclk7 = {
.name = "pll0_sysclk7",
.parent = &pll0_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV7,
};
-static struct clk i2c0_clk = {
+static struct davinci_clk i2c0_clk = {
.name = "i2c0",
.parent = &pll0_aux_clk,
};
-static struct clk timerp64_0_clk = {
+static struct davinci_clk timerp64_0_clk = {
.name = "timer0",
.parent = &pll0_aux_clk,
};
-static struct clk timerp64_1_clk = {
+static struct davinci_clk timerp64_1_clk = {
.name = "timer1",
.parent = &pll0_aux_clk,
};
-static struct clk arm_rom_clk = {
+static struct davinci_clk arm_rom_clk = {
.name = "arm_rom",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC0_ARM_RAM_ROM,
.flags = ALWAYS_ENABLED,
};
-static struct clk scr0_ss_clk = {
+static struct davinci_clk scr0_ss_clk = {
.name = "scr0_ss",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC0_SCR0_SS,
.flags = ALWAYS_ENABLED,
};
-static struct clk scr1_ss_clk = {
+static struct davinci_clk scr1_ss_clk = {
.name = "scr1_ss",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC0_SCR1_SS,
.flags = ALWAYS_ENABLED,
};
-static struct clk scr2_ss_clk = {
+static struct davinci_clk scr2_ss_clk = {
.name = "scr2_ss",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC0_SCR2_SS,
.flags = ALWAYS_ENABLED,
};
-static struct clk dmax_clk = {
+static struct davinci_clk dmax_clk = {
.name = "dmax",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC0_PRUSS,
.flags = ALWAYS_ENABLED,
};
-static struct clk tpcc_clk = {
+static struct davinci_clk tpcc_clk = {
.name = "tpcc",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC0_TPCC,
.flags = ALWAYS_ENABLED | CLK_PSC,
};
-static struct clk tptc0_clk = {
+static struct davinci_clk tptc0_clk = {
.name = "tptc0",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC0_TPTC0,
.flags = ALWAYS_ENABLED,
};
-static struct clk tptc1_clk = {
+static struct davinci_clk tptc1_clk = {
.name = "tptc1",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC0_TPTC1,
.flags = ALWAYS_ENABLED,
};
-static struct clk mmcsd_clk = {
+static struct davinci_clk mmcsd_clk = {
.name = "mmcsd",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC0_MMC_SD,
};
-static struct clk uart0_clk = {
+static struct davinci_clk uart0_clk = {
.name = "uart0",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC0_UART0,
};
-static struct clk uart1_clk = {
+static struct davinci_clk uart1_clk = {
.name = "uart1",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC1_UART1,
.gpsc = 1,
};
-static struct clk uart2_clk = {
+static struct davinci_clk uart2_clk = {
.name = "uart2",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC1_UART2,
.gpsc = 1,
};
-static struct clk spi0_clk = {
+static struct davinci_clk spi0_clk = {
.name = "spi0",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC0_SPI0,
};
-static struct clk spi1_clk = {
+static struct davinci_clk spi1_clk = {
.name = "spi1",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC1_SPI1,
.gpsc = 1,
};
-static struct clk ecap0_clk = {
+static struct davinci_clk ecap0_clk = {
.name = "ecap0",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC1_ECAP,
.gpsc = 1,
};
-static struct clk ecap1_clk = {
+static struct davinci_clk ecap1_clk = {
.name = "ecap1",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC1_ECAP,
.gpsc = 1,
};
-static struct clk ecap2_clk = {
+static struct davinci_clk ecap2_clk = {
.name = "ecap2",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC1_ECAP,
.gpsc = 1,
};
-static struct clk pwm0_clk = {
+static struct davinci_clk pwm0_clk = {
.name = "pwm0",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC1_PWM,
.gpsc = 1,
};
-static struct clk pwm1_clk = {
+static struct davinci_clk pwm1_clk = {
.name = "pwm1",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC1_PWM,
.gpsc = 1,
};
-static struct clk pwm2_clk = {
+static struct davinci_clk pwm2_clk = {
.name = "pwm2",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC1_PWM,
.gpsc = 1,
};
-static struct clk eqep0_clk = {
+static struct davinci_clk eqep0_clk = {
.name = "eqep0",
.parent = &pll0_sysclk2,
.lpsc = DA830_LPSC1_EQEP,
.gpsc = 1,
};
-static struct clk eqep1_clk = {
+static struct davinci_clk eqep1_clk = {
.name = "eqep1",
.parent = &pll0_sysclk2,
.lpsc = DA830_LPSC1_EQEP,
.gpsc = 1,
};
-static struct clk lcdc_clk = {
+static struct davinci_clk lcdc_clk = {
.name = "lcdc",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC1_LCDC,
.gpsc = 1,
};
-static struct clk mcasp0_clk = {
+static struct davinci_clk mcasp0_clk = {
.name = "mcasp0",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC1_McASP0,
.gpsc = 1,
};
-static struct clk mcasp1_clk = {
+static struct davinci_clk mcasp1_clk = {
.name = "mcasp1",
.parent = &pll0_sysclk2,
.lpsc = DA830_LPSC1_McASP1,
.gpsc = 1,
};
-static struct clk mcasp2_clk = {
+static struct davinci_clk mcasp2_clk = {
.name = "mcasp2",
.parent = &pll0_sysclk2,
.lpsc = DA830_LPSC1_McASP2,
.gpsc = 1,
};
-static struct clk usb20_clk = {
+static struct davinci_clk usb20_clk = {
.name = "usb20",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC1_USB20,
.gpsc = 1,
};
-static struct clk cppi41_clk = {
+static struct davinci_clk cppi41_clk = {
.name = "cppi41",
.parent = &usb20_clk,
};
-static struct clk aemif_clk = {
+static struct davinci_clk aemif_clk = {
.name = "aemif",
.parent = &pll0_sysclk3,
.lpsc = DA8XX_LPSC0_EMIF25,
.flags = ALWAYS_ENABLED,
};
-static struct clk aintc_clk = {
+static struct davinci_clk aintc_clk = {
.name = "aintc",
.parent = &pll0_sysclk4,
.lpsc = DA8XX_LPSC0_AINTC,
.flags = ALWAYS_ENABLED,
};
-static struct clk secu_mgr_clk = {
+static struct davinci_clk secu_mgr_clk = {
.name = "secu_mgr",
.parent = &pll0_sysclk4,
.lpsc = DA8XX_LPSC0_SECU_MGR,
.flags = ALWAYS_ENABLED,
};
-static struct clk emac_clk = {
+static struct davinci_clk emac_clk = {
.name = "emac",
.parent = &pll0_sysclk4,
.lpsc = DA8XX_LPSC1_CPGMAC,
.gpsc = 1,
};
-static struct clk gpio_clk = {
+static struct davinci_clk gpio_clk = {
.name = "gpio",
.parent = &pll0_sysclk4,
.lpsc = DA8XX_LPSC1_GPIO,
.gpsc = 1,
};
-static struct clk i2c1_clk = {
+static struct davinci_clk i2c1_clk = {
.name = "i2c1",
.parent = &pll0_sysclk4,
.lpsc = DA8XX_LPSC1_I2C,
.gpsc = 1,
};
-static struct clk usb11_clk = {
+static struct davinci_clk usb11_clk = {
.name = "usb11",
.parent = &pll0_sysclk4,
.lpsc = DA8XX_LPSC1_USB11,
.gpsc = 1,
};
-static struct clk emif3_clk = {
+static struct davinci_clk emif3_clk = {
.name = "emif3",
.parent = &pll0_sysclk5,
.lpsc = DA8XX_LPSC1_EMIF3C,
@@ -366,14 +366,14 @@ static struct clk emif3_clk = {
.flags = ALWAYS_ENABLED,
};
-static struct clk arm_clk = {
+static struct davinci_clk arm_clk = {
.name = "arm",
.parent = &pll0_sysclk6,
.lpsc = DA8XX_LPSC0_ARM,
.flags = ALWAYS_ENABLED,
};
-static struct clk rmii_clk = {
+static struct davinci_clk rmii_clk = {
.name = "rmii",
.parent = &pll0_sysclk7,
};
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index ab287d4..8a29aef 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -44,9 +44,9 @@
#define CFGCHIP3_PLL1_MASTER_LOCK BIT(5)
#define CFGCHIP0_PLL_MASTER_LOCK BIT(4)
-static int da850_set_armrate(struct clk *clk, unsigned long rate);
-static int da850_round_armrate(struct clk *clk, unsigned long rate);
-static int da850_set_pll0rate(struct clk *clk, unsigned long armrate);
+static int da850_set_armrate(struct davinci_clk *clk, unsigned long rate);
+static int da850_round_armrate(struct davinci_clk *clk, unsigned long rate);
+static int da850_set_pll0rate(struct davinci_clk *clk, unsigned long armrate);
static struct pll_data pll0_data = {
.num = 1,
@@ -54,13 +54,13 @@ static struct pll_data pll0_data = {
.flags = PLL_HAS_PREDIV | PLL_HAS_POSTDIV,
};
-static struct clk ref_clk = {
+static struct davinci_clk ref_clk = {
.name = "ref_clk",
.rate = DA850_REF_FREQ,
.set_rate = davinci_simple_set_rate,
};
-static struct clk pll0_clk = {
+static struct davinci_clk pll0_clk = {
.name = "pll0",
.parent = &ref_clk,
.pll_data = &pll0_data,
@@ -68,27 +68,27 @@ static struct clk pll0_clk = {
.set_rate = da850_set_pll0rate,
};
-static struct clk pll0_aux_clk = {
+static struct davinci_clk pll0_aux_clk = {
.name = "pll0_aux_clk",
.parent = &pll0_clk,
.flags = CLK_PLL | PRE_PLL,
};
-static struct clk pll0_sysclk1 = {
+static struct davinci_clk pll0_sysclk1 = {
.name = "pll0_sysclk1",
.parent = &pll0_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV1,
};
-static struct clk pll0_sysclk2 = {
+static struct davinci_clk pll0_sysclk2 = {
.name = "pll0_sysclk2",
.parent = &pll0_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV2,
};
-static struct clk pll0_sysclk3 = {
+static struct davinci_clk pll0_sysclk3 = {
.name = "pll0_sysclk3",
.parent = &pll0_clk,
.flags = CLK_PLL,
@@ -97,28 +97,28 @@ static struct clk pll0_sysclk3 = {
.maxrate = 100000000,
};
-static struct clk pll0_sysclk4 = {
+static struct davinci_clk pll0_sysclk4 = {
.name = "pll0_sysclk4",
.parent = &pll0_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV4,
};
-static struct clk pll0_sysclk5 = {
+static struct davinci_clk pll0_sysclk5 = {
.name = "pll0_sysclk5",
.parent = &pll0_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV5,
};
-static struct clk pll0_sysclk6 = {
+static struct davinci_clk pll0_sysclk6 = {
.name = "pll0_sysclk6",
.parent = &pll0_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV6,
};
-static struct clk pll0_sysclk7 = {
+static struct davinci_clk pll0_sysclk7 = {
.name = "pll0_sysclk7",
.parent = &pll0_clk,
.flags = CLK_PLL,
@@ -131,34 +131,35 @@ static struct pll_data pll1_data = {
.flags = PLL_HAS_POSTDIV,
};
-static struct clk pll1_clk = {
+static struct davinci_clk pll1_clk = {
.name = "pll1",
.parent = &ref_clk,
.pll_data = &pll1_data,
.flags = CLK_PLL,
};
-static struct clk pll1_aux_clk = {
+static struct davinci_clk pll1_aux_clk = {
.name = "pll1_aux_clk",
.parent = &pll1_clk,
.flags = CLK_PLL | PRE_PLL,
};
-static struct clk pll1_sysclk2 = {
+static struct davinci_clk pll1_sysclk2 = {
.name = "pll1_sysclk2",
.parent = &pll1_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV2,
};
-static struct clk pll1_sysclk3 = {
+static struct davinci_clk pll1_sysclk3 = {
.name = "pll1_sysclk3",
.parent = &pll1_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV3,
};
-static int da850_async3_set_parent(struct clk *clk, struct clk *parent)
+static int da850_async3_set_parent(struct davinci_clk *clk,
+ struct davinci_clk *parent)
{
u32 val;
@@ -178,56 +179,56 @@ static int da850_async3_set_parent(struct clk *clk, struct clk *parent)
return 0;
}
-static struct clk async3_clk = {
+static struct davinci_clk async3_clk = {
.name = "async3",
.parent = &pll1_sysclk2,
.set_parent = da850_async3_set_parent,
};
-static struct clk i2c0_clk = {
+static struct davinci_clk i2c0_clk = {
.name = "i2c0",
.parent = &pll0_aux_clk,
};
-static struct clk timerp64_0_clk = {
+static struct davinci_clk timerp64_0_clk = {
.name = "timer0",
.parent = &pll0_aux_clk,
};
-static struct clk timerp64_1_clk = {
+static struct davinci_clk timerp64_1_clk = {
.name = "timer1",
.parent = &pll0_aux_clk,
};
-static struct clk arm_rom_clk = {
+static struct davinci_clk arm_rom_clk = {
.name = "arm_rom",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC0_ARM_RAM_ROM,
.flags = ALWAYS_ENABLED,
};
-static struct clk tpcc0_clk = {
+static struct davinci_clk tpcc0_clk = {
.name = "tpcc0",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC0_TPCC,
.flags = ALWAYS_ENABLED | CLK_PSC,
};
-static struct clk tptc0_clk = {
+static struct davinci_clk tptc0_clk = {
.name = "tptc0",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC0_TPTC0,
.flags = ALWAYS_ENABLED,
};
-static struct clk tptc1_clk = {
+static struct davinci_clk tptc1_clk = {
.name = "tptc1",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC0_TPTC1,
.flags = ALWAYS_ENABLED,
};
-static struct clk tpcc1_clk = {
+static struct davinci_clk tpcc1_clk = {
.name = "tpcc1",
.parent = &pll0_sysclk2,
.lpsc = DA850_LPSC1_TPCC1,
@@ -235,7 +236,7 @@ static struct clk tpcc1_clk = {
.flags = CLK_PSC | ALWAYS_ENABLED,
};
-static struct clk tptc2_clk = {
+static struct davinci_clk tptc2_clk = {
.name = "tptc2",
.parent = &pll0_sysclk2,
.lpsc = DA850_LPSC1_TPTC2,
@@ -243,54 +244,54 @@ static struct clk tptc2_clk = {
.flags = ALWAYS_ENABLED,
};
-static struct clk pruss_clk = {
+static struct davinci_clk pruss_clk = {
.name = "pruss",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC0_PRUSS,
};
-static struct clk uart0_clk = {
+static struct davinci_clk uart0_clk = {
.name = "uart0",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC0_UART0,
};
-static struct clk uart1_clk = {
+static struct davinci_clk uart1_clk = {
.name = "uart1",
.parent = &async3_clk,
.lpsc = DA8XX_LPSC1_UART1,
.gpsc = 1,
};
-static struct clk uart2_clk = {
+static struct davinci_clk uart2_clk = {
.name = "uart2",
.parent = &async3_clk,
.lpsc = DA8XX_LPSC1_UART2,
.gpsc = 1,
};
-static struct clk aintc_clk = {
+static struct davinci_clk aintc_clk = {
.name = "aintc",
.parent = &pll0_sysclk4,
.lpsc = DA8XX_LPSC0_AINTC,
.flags = ALWAYS_ENABLED,
};
-static struct clk gpio_clk = {
+static struct davinci_clk gpio_clk = {
.name = "gpio",
.parent = &pll0_sysclk4,
.lpsc = DA8XX_LPSC1_GPIO,
.gpsc = 1,
};
-static struct clk i2c1_clk = {
+static struct davinci_clk i2c1_clk = {
.name = "i2c1",
.parent = &pll0_sysclk4,
.lpsc = DA8XX_LPSC1_I2C,
.gpsc = 1,
};
-static struct clk emif3_clk = {
+static struct davinci_clk emif3_clk = {
.name = "emif3",
.parent = &pll0_sysclk5,
.lpsc = DA8XX_LPSC1_EMIF3C,
@@ -298,7 +299,7 @@ static struct clk emif3_clk = {
.flags = ALWAYS_ENABLED,
};
-static struct clk arm_clk = {
+static struct davinci_clk arm_clk = {
.name = "arm",
.parent = &pll0_sysclk6,
.lpsc = DA8XX_LPSC0_ARM,
@@ -307,12 +308,12 @@ static struct clk arm_clk = {
.round_rate = da850_round_armrate,
};
-static struct clk rmii_clk = {
+static struct davinci_clk rmii_clk = {
.name = "rmii",
.parent = &pll0_sysclk7,
};
-static struct clk emac_clk = {
+static struct davinci_clk emac_clk = {
.name = "emac",
.parent = &pll0_sysclk4,
.lpsc = DA8XX_LPSC1_CPGMAC,
@@ -324,53 +325,53 @@ static struct clk emac_clk = {
* screwing up the linked list in the process) create a separate clock for
* mdio inheriting the rate from emac_clk.
*/
-static struct clk mdio_clk = {
+static struct davinci_clk mdio_clk = {
.name = "mdio",
.parent = &emac_clk,
};
-static struct clk mcasp_clk = {
+static struct davinci_clk mcasp_clk = {
.name = "mcasp",
.parent = &async3_clk,
.lpsc = DA8XX_LPSC1_McASP0,
.gpsc = 1,
};
-static struct clk mcbsp0_clk = {
+static struct davinci_clk mcbsp0_clk = {
.name = "mcbsp0",
.parent = &async3_clk,
.lpsc = DA850_LPSC1_McBSP0,
.gpsc = 1,
};
-static struct clk mcbsp1_clk = {
+static struct davinci_clk mcbsp1_clk = {
.name = "mcbsp1",
.parent = &async3_clk,
.lpsc = DA850_LPSC1_McBSP1,
.gpsc = 1,
};
-static struct clk lcdc_clk = {
+static struct davinci_clk lcdc_clk = {
.name = "lcdc",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC1_LCDC,
.gpsc = 1,
};
-static struct clk mmcsd0_clk = {
+static struct davinci_clk mmcsd0_clk = {
.name = "mmcsd0",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC0_MMC_SD,
};
-static struct clk mmcsd1_clk = {
+static struct davinci_clk mmcsd1_clk = {
.name = "mmcsd1",
.parent = &pll0_sysclk2,
.lpsc = DA850_LPSC1_MMC_SD1,
.gpsc = 1,
};
-static struct clk aemif_clk = {
+static struct davinci_clk aemif_clk = {
.name = "aemif",
.parent = &pll0_sysclk3,
.lpsc = DA8XX_LPSC0_EMIF25,
@@ -382,51 +383,51 @@ static struct clk aemif_clk = {
* screwing up the linked list in the process) create a separate clock for
* nand inheriting the rate from aemif_clk.
*/
-static struct clk aemif_nand_clk = {
+static struct davinci_clk aemif_nand_clk = {
.name = "nand",
.parent = &aemif_clk,
};
-static struct clk usb11_clk = {
+static struct davinci_clk usb11_clk = {
.name = "usb11",
.parent = &pll0_sysclk4,
.lpsc = DA8XX_LPSC1_USB11,
.gpsc = 1,
};
-static struct clk usb20_clk = {
+static struct davinci_clk usb20_clk = {
.name = "usb20",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC1_USB20,
.gpsc = 1,
};
-static struct clk cppi41_clk = {
+static struct davinci_clk cppi41_clk = {
.name = "cppi41",
.parent = &usb20_clk,
};
-static struct clk spi0_clk = {
+static struct davinci_clk spi0_clk = {
.name = "spi0",
.parent = &pll0_sysclk2,
.lpsc = DA8XX_LPSC0_SPI0,
};
-static struct clk spi1_clk = {
+static struct davinci_clk spi1_clk = {
.name = "spi1",
.parent = &async3_clk,
.lpsc = DA8XX_LPSC1_SPI1,
.gpsc = 1,
};
-static struct clk vpif_clk = {
+static struct davinci_clk vpif_clk = {
.name = "vpif",
.parent = &pll0_sysclk2,
.lpsc = DA850_LPSC1_VPIF,
.gpsc = 1,
};
-static struct clk sata_clk = {
+static struct davinci_clk sata_clk = {
.name = "sata",
.parent = &pll0_sysclk2,
.lpsc = DA850_LPSC1_SATA,
@@ -434,7 +435,7 @@ static struct clk sata_clk = {
.flags = PSC_FORCE,
};
-static struct clk dsp_clk = {
+static struct davinci_clk dsp_clk = {
.name = "dsp",
.parent = &pll0_sysclk1,
.domain = DAVINCI_GPSC_DSPDOMAIN,
@@ -442,26 +443,26 @@ static struct clk dsp_clk = {
.flags = PSC_LRST | PSC_FORCE,
};
-static struct clk ehrpwm_clk = {
+static struct davinci_clk ehrpwm_clk = {
.name = "ehrpwm",
.parent = &async3_clk,
.lpsc = DA8XX_LPSC1_PWM,
.gpsc = 1,
};
-static struct clk ehrpwm0_clk = {
+static struct davinci_clk ehrpwm0_clk = {
.name = "ehrpwm0",
.parent = &ehrpwm_clk,
};
-static struct clk ehrpwm1_clk = {
+static struct davinci_clk ehrpwm1_clk = {
.name = "ehrpwm1",
.parent = &ehrpwm_clk,
};
#define DA8XX_EHRPWM_TBCLKSYNC BIT(12)
-static void ehrpwm_tblck_enable(struct clk *clk)
+static void ehrpwm_tblck_enable(struct davinci_clk *clk)
{
u32 val;
@@ -470,7 +471,7 @@ static void ehrpwm_tblck_enable(struct clk *clk)
writel(val, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP1_REG));
}
-static void ehrpwm_tblck_disable(struct clk *clk)
+static void ehrpwm_tblck_disable(struct davinci_clk *clk)
{
u32 val;
@@ -479,41 +480,41 @@ static void ehrpwm_tblck_disable(struct clk *clk)
writel(val, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP1_REG));
}
-static struct clk ehrpwm_tbclk = {
+static struct davinci_clk ehrpwm_tbclk = {
.name = "ehrpwm_tbclk",
.parent = &ehrpwm_clk,
.clk_enable = ehrpwm_tblck_enable,
.clk_disable = ehrpwm_tblck_disable,
};
-static struct clk ehrpwm0_tbclk = {
+static struct davinci_clk ehrpwm0_tbclk = {
.name = "ehrpwm0_tbclk",
.parent = &ehrpwm_tbclk,
};
-static struct clk ehrpwm1_tbclk = {
+static struct davinci_clk ehrpwm1_tbclk = {
.name = "ehrpwm1_tbclk",
.parent = &ehrpwm_tbclk,
};
-static struct clk ecap_clk = {
+static struct davinci_clk ecap_clk = {
.name = "ecap",
.parent = &async3_clk,
.lpsc = DA8XX_LPSC1_ECAP,
.gpsc = 1,
};
-static struct clk ecap0_clk = {
+static struct davinci_clk ecap0_clk = {
.name = "ecap0_clk",
.parent = &ecap_clk,
};
-static struct clk ecap1_clk = {
+static struct davinci_clk ecap1_clk = {
.name = "ecap1_clk",
.parent = &ecap_clk,
};
-static struct clk ecap2_clk = {
+static struct davinci_clk ecap2_clk = {
.name = "ecap2_clk",
.parent = &ecap_clk,
};
@@ -1170,7 +1171,7 @@ int da850_register_cpufreq(char *async_clk)
return platform_device_register(&da850_cpufreq_device);
}
-static int da850_round_armrate(struct clk *clk, unsigned long rate)
+static int da850_round_armrate(struct davinci_clk *clk, unsigned long rate)
{
int ret = 0, diff;
unsigned int best = (unsigned int) -1;
@@ -1193,14 +1194,14 @@ static int da850_round_armrate(struct clk *clk, unsigned long rate)
return ret * 1000;
}
-static int da850_set_armrate(struct clk *clk, unsigned long index)
+static int da850_set_armrate(struct davinci_clk *clk, unsigned long index)
{
- struct clk *pllclk = &pll0_clk;
+ struct davinci_clk *pllclk = &pll0_clk;
- return clk_set_rate(pllclk, index);
+ return clk_set_rate(pllclk->hw.clk, index);
}
-static int da850_set_pll0rate(struct clk *clk, unsigned long rate)
+static int da850_set_pll0rate(struct davinci_clk *clk, unsigned long rate)
{
struct pll_data *pll = clk->pll_data;
struct cpufreq_frequency_table *freq;
@@ -1238,17 +1239,17 @@ int __init da850_register_cpufreq(char *async_clk)
return 0;
}
-static int da850_set_armrate(struct clk *clk, unsigned long rate)
+static int da850_set_armrate(struct davinci_clk *clk, unsigned long rate)
{
return -EINVAL;
}
-static int da850_set_pll0rate(struct clk *clk, unsigned long armrate)
+static int da850_set_pll0rate(struct davinci_clk *clk, unsigned long armrate)
{
return -EINVAL;
}
-static int da850_round_armrate(struct clk *clk, unsigned long rate)
+static int da850_round_armrate(struct davinci_clk *clk, unsigned long rate)
{
return clk->rate;
}
diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c
index cc497f4..8d6deee 100644
--- a/arch/arm/mach-davinci/devices-da8xx.c
+++ b/arch/arm/mach-davinci/devices-da8xx.c
@@ -1054,7 +1054,7 @@ int __init da8xx_register_spi_bus(int instance, unsigned num_chipselect)
}
#ifdef CONFIG_ARCH_DAVINCI_DA850
-static struct clk sata_refclk = {
+static struct davinci_clk sata_refclk = {
.name = "sata_refclk",
.set_rate = davinci_simple_set_rate,
};
@@ -1064,11 +1064,11 @@ int __init da850_register_sata_refclk(int rate)
int ret;
sata_refclk.rate = rate;
- ret = clk_register(&sata_refclk);
+ ret = davinci_clk_register(&sata_refclk);
if (ret)
return ret;
- clk_register_clkdev(&sata_refclk, "refclk", "ahci_da850");
+ clk_register_clkdev(sata_refclk.hw.clk, "refclk", "ahci_da850");
return 0;
}
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index 5d8a986..90d0e65 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -55,118 +55,118 @@ static struct pll_data pll2_data = {
.flags = PLL_HAS_PREDIV,
};
-static struct clk ref_clk = {
+static struct davinci_clk ref_clk = {
.name = "ref_clk",
/* FIXME -- crystal rate is board-specific */
.rate = DM355_REF_FREQ,
};
-static struct clk pll1_clk = {
+static struct davinci_clk pll1_clk = {
.name = "pll1",
.parent = &ref_clk,
.flags = CLK_PLL,
.pll_data = &pll1_data,
};
-static struct clk pll1_aux_clk = {
+static struct davinci_clk pll1_aux_clk = {
.name = "pll1_aux_clk",
.parent = &pll1_clk,
.flags = CLK_PLL | PRE_PLL,
};
-static struct clk pll1_sysclk1 = {
+static struct davinci_clk pll1_sysclk1 = {
.name = "pll1_sysclk1",
.parent = &pll1_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV1,
};
-static struct clk pll1_sysclk2 = {
+static struct davinci_clk pll1_sysclk2 = {
.name = "pll1_sysclk2",
.parent = &pll1_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV2,
};
-static struct clk pll1_sysclk3 = {
+static struct davinci_clk pll1_sysclk3 = {
.name = "pll1_sysclk3",
.parent = &pll1_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV3,
};
-static struct clk pll1_sysclk4 = {
+static struct davinci_clk pll1_sysclk4 = {
.name = "pll1_sysclk4",
.parent = &pll1_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV4,
};
-static struct clk pll1_sysclkbp = {
+static struct davinci_clk pll1_sysclkbp = {
.name = "pll1_sysclkbp",
.parent = &pll1_clk,
.flags = CLK_PLL | PRE_PLL,
.div_reg = BPDIV
};
-static struct clk vpss_dac_clk = {
+static struct davinci_clk vpss_dac_clk = {
.name = "vpss_dac",
.parent = &pll1_sysclk3,
.lpsc = DM355_LPSC_VPSS_DAC,
};
-static struct clk vpss_master_clk = {
+static struct davinci_clk vpss_master_clk = {
.name = "vpss_master",
.parent = &pll1_sysclk4,
.lpsc = DAVINCI_LPSC_VPSSMSTR,
.flags = CLK_PSC,
};
-static struct clk vpss_slave_clk = {
+static struct davinci_clk vpss_slave_clk = {
.name = "vpss_slave",
.parent = &pll1_sysclk4,
.lpsc = DAVINCI_LPSC_VPSSSLV,
};
-static struct clk clkout1_clk = {
+static struct davinci_clk clkout1_clk = {
.name = "clkout1",
.parent = &pll1_aux_clk,
/* NOTE: clkout1 can be externally gated by muxing GPIO-18 */
};
-static struct clk clkout2_clk = {
+static struct davinci_clk clkout2_clk = {
.name = "clkout2",
.parent = &pll1_sysclkbp,
};
-static struct clk pll2_clk = {
+static struct davinci_clk pll2_clk = {
.name = "pll2",
.parent = &ref_clk,
.flags = CLK_PLL,
.pll_data = &pll2_data,
};
-static struct clk pll2_sysclk1 = {
+static struct davinci_clk pll2_sysclk1 = {
.name = "pll2_sysclk1",
.parent = &pll2_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV1,
};
-static struct clk pll2_sysclkbp = {
+static struct davinci_clk pll2_sysclkbp = {
.name = "pll2_sysclkbp",
.parent = &pll2_clk,
.flags = CLK_PLL | PRE_PLL,
.div_reg = BPDIV
};
-static struct clk clkout3_clk = {
+static struct davinci_clk clkout3_clk = {
.name = "clkout3",
.parent = &pll2_sysclkbp,
/* NOTE: clkout3 can be externally gated by muxing GPIO-16 */
};
-static struct clk arm_clk = {
+static struct davinci_clk arm_clk = {
.name = "arm_clk",
.parent = &pll1_sysclk1,
.lpsc = DAVINCI_LPSC_ARM,
@@ -192,146 +192,146 @@ static struct clk arm_clk = {
* .lpsc = DAVINCI_LPSC_CFG5, // "test"
*/
-static struct clk mjcp_clk = {
+static struct davinci_clk mjcp_clk = {
.name = "mjcp",
.parent = &pll1_sysclk1,
.lpsc = DAVINCI_LPSC_IMCOP,
};
-static struct clk uart0_clk = {
+static struct davinci_clk uart0_clk = {
.name = "uart0",
.parent = &pll1_aux_clk,
.lpsc = DAVINCI_LPSC_UART0,
};
-static struct clk uart1_clk = {
+static struct davinci_clk uart1_clk = {
.name = "uart1",
.parent = &pll1_aux_clk,
.lpsc = DAVINCI_LPSC_UART1,
};
-static struct clk uart2_clk = {
+static struct davinci_clk uart2_clk = {
.name = "uart2",
.parent = &pll1_sysclk2,
.lpsc = DAVINCI_LPSC_UART2,
};
-static struct clk i2c_clk = {
+static struct davinci_clk i2c_clk = {
.name = "i2c",
.parent = &pll1_aux_clk,
.lpsc = DAVINCI_LPSC_I2C,
};
-static struct clk asp0_clk = {
+static struct davinci_clk asp0_clk = {
.name = "asp0",
.parent = &pll1_sysclk2,
.lpsc = DAVINCI_LPSC_McBSP,
};
-static struct clk asp1_clk = {
+static struct davinci_clk asp1_clk = {
.name = "asp1",
.parent = &pll1_sysclk2,
.lpsc = DM355_LPSC_McBSP1,
};
-static struct clk mmcsd0_clk = {
+static struct davinci_clk mmcsd0_clk = {
.name = "mmcsd0",
.parent = &pll1_sysclk2,
.lpsc = DAVINCI_LPSC_MMC_SD,
};
-static struct clk mmcsd1_clk = {
+static struct davinci_clk mmcsd1_clk = {
.name = "mmcsd1",
.parent = &pll1_sysclk2,
.lpsc = DM355_LPSC_MMC_SD1,
};
-static struct clk spi0_clk = {
+static struct davinci_clk spi0_clk = {
.name = "spi0",
.parent = &pll1_sysclk2,
.lpsc = DAVINCI_LPSC_SPI,
};
-static struct clk spi1_clk = {
+static struct davinci_clk spi1_clk = {
.name = "spi1",
.parent = &pll1_sysclk2,
.lpsc = DM355_LPSC_SPI1,
};
-static struct clk spi2_clk = {
+static struct davinci_clk spi2_clk = {
.name = "spi2",
.parent = &pll1_sysclk2,
.lpsc = DM355_LPSC_SPI2,
};
-static struct clk gpio_clk = {
+static struct davinci_clk gpio_clk = {
.name = "gpio",
.parent = &pll1_sysclk2,
.lpsc = DAVINCI_LPSC_GPIO,
};
-static struct clk aemif_clk = {
+static struct davinci_clk aemif_clk = {
.name = "aemif",
.parent = &pll1_sysclk2,
.lpsc = DAVINCI_LPSC_AEMIF,
};
-static struct clk pwm0_clk = {
+static struct davinci_clk pwm0_clk = {
.name = "pwm0",
.parent = &pll1_aux_clk,
.lpsc = DAVINCI_LPSC_PWM0,
};
-static struct clk pwm1_clk = {
+static struct davinci_clk pwm1_clk = {
.name = "pwm1",
.parent = &pll1_aux_clk,
.lpsc = DAVINCI_LPSC_PWM1,
};
-static struct clk pwm2_clk = {
+static struct davinci_clk pwm2_clk = {
.name = "pwm2",
.parent = &pll1_aux_clk,
.lpsc = DAVINCI_LPSC_PWM2,
};
-static struct clk pwm3_clk = {
+static struct davinci_clk pwm3_clk = {
.name = "pwm3",
.parent = &pll1_aux_clk,
.lpsc = DM355_LPSC_PWM3,
};
-static struct clk timer0_clk = {
+static struct davinci_clk timer0_clk = {
.name = "timer0",
.parent = &pll1_aux_clk,
.lpsc = DAVINCI_LPSC_TIMER0,
};
-static struct clk timer1_clk = {
+static struct davinci_clk timer1_clk = {
.name = "timer1",
.parent = &pll1_aux_clk,
.lpsc = DAVINCI_LPSC_TIMER1,
};
-static struct clk timer2_clk = {
+static struct davinci_clk timer2_clk = {
.name = "timer2",
.parent = &pll1_aux_clk,
.lpsc = DAVINCI_LPSC_TIMER2,
.usecount = 1, /* REVISIT: why can't this be disabled? */
};
-static struct clk timer3_clk = {
+static struct davinci_clk timer3_clk = {
.name = "timer3",
.parent = &pll1_aux_clk,
.lpsc = DM355_LPSC_TIMER3,
};
-static struct clk rto_clk = {
+static struct davinci_clk rto_clk = {
.name = "rto",
.parent = &pll1_aux_clk,
.lpsc = DM355_LPSC_RTO,
};
-static struct clk usb_clk = {
+static struct davinci_clk usb_clk = {
.name = "usb",
.parent = &pll1_sysclk2,
.lpsc = DAVINCI_LPSC_USB,
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index 74037a6..49b46b5 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -66,360 +66,360 @@ static struct pll_data pll2_data = {
.flags = PLL_HAS_POSTDIV | PLL_HAS_PREDIV,
};
-static struct clk ref_clk = {
+static struct davinci_clk ref_clk = {
.name = "ref_clk",
.rate = DM365_REF_FREQ,
};
-static struct clk pll1_clk = {
+static struct davinci_clk pll1_clk = {
.name = "pll1",
.parent = &ref_clk,
.flags = CLK_PLL,
.pll_data = &pll1_data,
};
-static struct clk pll1_aux_clk = {
+static struct davinci_clk pll1_aux_clk = {
.name = "pll1_aux_clk",
.parent = &pll1_clk,
.flags = CLK_PLL | PRE_PLL,
};
-static struct clk pll1_sysclkbp = {
+static struct davinci_clk pll1_sysclkbp = {
.name = "pll1_sysclkbp",
.parent = &pll1_clk,
.flags = CLK_PLL | PRE_PLL,
.div_reg = BPDIV
};
-static struct clk clkout0_clk = {
+static struct davinci_clk clkout0_clk = {
.name = "clkout0",
.parent = &pll1_clk,
.flags = CLK_PLL | PRE_PLL,
};
-static struct clk pll1_sysclk1 = {
+static struct davinci_clk pll1_sysclk1 = {
.name = "pll1_sysclk1",
.parent = &pll1_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV1,
};
-static struct clk pll1_sysclk2 = {
+static struct davinci_clk pll1_sysclk2 = {
.name = "pll1_sysclk2",
.parent = &pll1_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV2,
};
-static struct clk pll1_sysclk3 = {
+static struct davinci_clk pll1_sysclk3 = {
.name = "pll1_sysclk3",
.parent = &pll1_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV3,
};
-static struct clk pll1_sysclk4 = {
+static struct davinci_clk pll1_sysclk4 = {
.name = "pll1_sysclk4",
.parent = &pll1_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV4,
};
-static struct clk pll1_sysclk5 = {
+static struct davinci_clk pll1_sysclk5 = {
.name = "pll1_sysclk5",
.parent = &pll1_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV5,
};
-static struct clk pll1_sysclk6 = {
+static struct davinci_clk pll1_sysclk6 = {
.name = "pll1_sysclk6",
.parent = &pll1_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV6,
};
-static struct clk pll1_sysclk7 = {
+static struct davinci_clk pll1_sysclk7 = {
.name = "pll1_sysclk7",
.parent = &pll1_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV7,
};
-static struct clk pll1_sysclk8 = {
+static struct davinci_clk pll1_sysclk8 = {
.name = "pll1_sysclk8",
.parent = &pll1_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV8,
};
-static struct clk pll1_sysclk9 = {
+static struct davinci_clk pll1_sysclk9 = {
.name = "pll1_sysclk9",
.parent = &pll1_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV9,
};
-static struct clk pll2_clk = {
+static struct davinci_clk pll2_clk = {
.name = "pll2",
.parent = &ref_clk,
.flags = CLK_PLL,
.pll_data = &pll2_data,
};
-static struct clk pll2_aux_clk = {
+static struct davinci_clk pll2_aux_clk = {
.name = "pll2_aux_clk",
.parent = &pll2_clk,
.flags = CLK_PLL | PRE_PLL,
};
-static struct clk clkout1_clk = {
+static struct davinci_clk clkout1_clk = {
.name = "clkout1",
.parent = &pll2_clk,
.flags = CLK_PLL | PRE_PLL,
};
-static struct clk pll2_sysclk1 = {
+static struct davinci_clk pll2_sysclk1 = {
.name = "pll2_sysclk1",
.parent = &pll2_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV1,
};
-static struct clk pll2_sysclk2 = {
+static struct davinci_clk pll2_sysclk2 = {
.name = "pll2_sysclk2",
.parent = &pll2_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV2,
};
-static struct clk pll2_sysclk3 = {
+static struct davinci_clk pll2_sysclk3 = {
.name = "pll2_sysclk3",
.parent = &pll2_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV3,
};
-static struct clk pll2_sysclk4 = {
+static struct davinci_clk pll2_sysclk4 = {
.name = "pll2_sysclk4",
.parent = &pll2_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV4,
};
-static struct clk pll2_sysclk5 = {
+static struct davinci_clk pll2_sysclk5 = {
.name = "pll2_sysclk5",
.parent = &pll2_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV5,
};
-static struct clk pll2_sysclk6 = {
+static struct davinci_clk pll2_sysclk6 = {
.name = "pll2_sysclk6",
.parent = &pll2_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV6,
};
-static struct clk pll2_sysclk7 = {
+static struct davinci_clk pll2_sysclk7 = {
.name = "pll2_sysclk7",
.parent = &pll2_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV7,
};
-static struct clk pll2_sysclk8 = {
+static struct davinci_clk pll2_sysclk8 = {
.name = "pll2_sysclk8",
.parent = &pll2_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV8,
};
-static struct clk pll2_sysclk9 = {
+static struct davinci_clk pll2_sysclk9 = {
.name = "pll2_sysclk9",
.parent = &pll2_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV9,
};
-static struct clk vpss_dac_clk = {
+static struct davinci_clk vpss_dac_clk = {
.name = "vpss_dac",
.parent = &pll1_sysclk3,
.lpsc = DM365_LPSC_DAC_CLK,
};
-static struct clk vpss_master_clk = {
+static struct davinci_clk vpss_master_clk = {
.name = "vpss_master",
.parent = &pll1_sysclk5,
.lpsc = DM365_LPSC_VPSSMSTR,
.flags = CLK_PSC,
};
-static struct clk vpss_slave_clk = {
+static struct davinci_clk vpss_slave_clk = {
.name = "vpss_slave",
.parent = &pll1_sysclk5,
.lpsc = DAVINCI_LPSC_VPSSSLV,
};
-static struct clk arm_clk = {
+static struct davinci_clk arm_clk = {
.name = "arm_clk",
.parent = &pll2_sysclk2,
.lpsc = DAVINCI_LPSC_ARM,
.flags = ALWAYS_ENABLED,
};
-static struct clk uart0_clk = {
+static struct davinci_clk uart0_clk = {
.name = "uart0",
.parent = &pll1_aux_clk,
.lpsc = DAVINCI_LPSC_UART0,
};
-static struct clk uart1_clk = {
+static struct davinci_clk uart1_clk = {
.name = "uart1",
.parent = &pll1_sysclk4,
.lpsc = DAVINCI_LPSC_UART1,
};
-static struct clk i2c_clk = {
+static struct davinci_clk i2c_clk = {
.name = "i2c",
.parent = &pll1_aux_clk,
.lpsc = DAVINCI_LPSC_I2C,
};
-static struct clk mmcsd0_clk = {
+static struct davinci_clk mmcsd0_clk = {
.name = "mmcsd0",
.parent = &pll1_sysclk8,
.lpsc = DAVINCI_LPSC_MMC_SD,
};
-static struct clk mmcsd1_clk = {
+static struct davinci_clk mmcsd1_clk = {
.name = "mmcsd1",
.parent = &pll1_sysclk4,
.lpsc = DM365_LPSC_MMC_SD1,
};
-static struct clk spi0_clk = {
+static struct davinci_clk spi0_clk = {
.name = "spi0",
.parent = &pll1_sysclk4,
.lpsc = DAVINCI_LPSC_SPI,
};
-static struct clk spi1_clk = {
+static struct davinci_clk spi1_clk = {
.name = "spi1",
.parent = &pll1_sysclk4,
.lpsc = DM365_LPSC_SPI1,
};
-static struct clk spi2_clk = {
+static struct davinci_clk spi2_clk = {
.name = "spi2",
.parent = &pll1_sysclk4,
.lpsc = DM365_LPSC_SPI2,
};
-static struct clk spi3_clk = {
+static struct davinci_clk spi3_clk = {
.name = "spi3",
.parent = &pll1_sysclk4,
.lpsc = DM365_LPSC_SPI3,
};
-static struct clk spi4_clk = {
+static struct davinci_clk spi4_clk = {
.name = "spi4",
.parent = &pll1_aux_clk,
.lpsc = DM365_LPSC_SPI4,
};
-static struct clk gpio_clk = {
+static struct davinci_clk gpio_clk = {
.name = "gpio",
.parent = &pll1_sysclk4,
.lpsc = DAVINCI_LPSC_GPIO,
};
-static struct clk aemif_clk = {
+static struct davinci_clk aemif_clk = {
.name = "aemif",
.parent = &pll1_sysclk4,
.lpsc = DAVINCI_LPSC_AEMIF,
};
-static struct clk pwm0_clk = {
+static struct davinci_clk pwm0_clk = {
.name = "pwm0",
.parent = &pll1_aux_clk,
.lpsc = DAVINCI_LPSC_PWM0,
};
-static struct clk pwm1_clk = {
+static struct davinci_clk pwm1_clk = {
.name = "pwm1",
.parent = &pll1_aux_clk,
.lpsc = DAVINCI_LPSC_PWM1,
};
-static struct clk pwm2_clk = {
+static struct davinci_clk pwm2_clk = {
.name = "pwm2",
.parent = &pll1_aux_clk,
.lpsc = DAVINCI_LPSC_PWM2,
};
-static struct clk pwm3_clk = {
+static struct davinci_clk pwm3_clk = {
.name = "pwm3",
.parent = &ref_clk,
.lpsc = DM365_LPSC_PWM3,
};
-static struct clk timer0_clk = {
+static struct davinci_clk timer0_clk = {
.name = "timer0",
.parent = &pll1_aux_clk,
.lpsc = DAVINCI_LPSC_TIMER0,
};
-static struct clk timer1_clk = {
+static struct davinci_clk timer1_clk = {
.name = "timer1",
.parent = &pll1_aux_clk,
.lpsc = DAVINCI_LPSC_TIMER1,
};
-static struct clk timer2_clk = {
+static struct davinci_clk timer2_clk = {
.name = "timer2",
.parent = &pll1_aux_clk,
.lpsc = DAVINCI_LPSC_TIMER2,
.usecount = 1,
};
-static struct clk timer3_clk = {
+static struct davinci_clk timer3_clk = {
.name = "timer3",
.parent = &pll1_aux_clk,
.lpsc = DM365_LPSC_TIMER3,
};
-static struct clk usb_clk = {
+static struct davinci_clk usb_clk = {
.name = "usb",
.parent = &pll1_aux_clk,
.lpsc = DAVINCI_LPSC_USB,
};
-static struct clk emac_clk = {
+static struct davinci_clk emac_clk = {
.name = "emac",
.parent = &pll1_sysclk4,
.lpsc = DM365_LPSC_EMAC,
};
-static struct clk voicecodec_clk = {
+static struct davinci_clk voicecodec_clk = {
.name = "voice_codec",
.parent = &pll2_sysclk4,
.lpsc = DM365_LPSC_VOICE_CODEC,
};
-static struct clk asp0_clk = {
+static struct davinci_clk asp0_clk = {
.name = "asp0",
.parent = &pll1_sysclk4,
.lpsc = DM365_LPSC_McBSP1,
};
-static struct clk rto_clk = {
+static struct davinci_clk rto_clk = {
.name = "rto",
.parent = &pll1_sysclk4,
.lpsc = DM365_LPSC_RTO,
};
-static struct clk mjcp_clk = {
+static struct davinci_clk mjcp_clk = {
.name = "mjcp",
.parent = &pll1_sysclk3,
.lpsc = DM365_LPSC_MJCP,
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index 1b27849..af2f767 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -53,88 +53,88 @@ static struct pll_data pll2_data = {
.phys_base = DAVINCI_PLL2_BASE,
};
-static struct clk ref_clk = {
+static struct davinci_clk ref_clk = {
.name = "ref_clk",
.rate = DM644X_REF_FREQ,
};
-static struct clk pll1_clk = {
+static struct davinci_clk pll1_clk = {
.name = "pll1",
.parent = &ref_clk,
.pll_data = &pll1_data,
.flags = CLK_PLL,
};
-static struct clk pll1_sysclk1 = {
+static struct davinci_clk pll1_sysclk1 = {
.name = "pll1_sysclk1",
.parent = &pll1_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV1,
};
-static struct clk pll1_sysclk2 = {
+static struct davinci_clk pll1_sysclk2 = {
.name = "pll1_sysclk2",
.parent = &pll1_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV2,
};
-static struct clk pll1_sysclk3 = {
+static struct davinci_clk pll1_sysclk3 = {
.name = "pll1_sysclk3",
.parent = &pll1_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV3,
};
-static struct clk pll1_sysclk5 = {
+static struct davinci_clk pll1_sysclk5 = {
.name = "pll1_sysclk5",
.parent = &pll1_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV5,
};
-static struct clk pll1_aux_clk = {
+static struct davinci_clk pll1_aux_clk = {
.name = "pll1_aux_clk",
.parent = &pll1_clk,
.flags = CLK_PLL | PRE_PLL,
};
-static struct clk pll1_sysclkbp = {
+static struct davinci_clk pll1_sysclkbp = {
.name = "pll1_sysclkbp",
.parent = &pll1_clk,
.flags = CLK_PLL | PRE_PLL,
.div_reg = BPDIV
};
-static struct clk pll2_clk = {
+static struct davinci_clk pll2_clk = {
.name = "pll2",
.parent = &ref_clk,
.pll_data = &pll2_data,
.flags = CLK_PLL,
};
-static struct clk pll2_sysclk1 = {
+static struct davinci_clk pll2_sysclk1 = {
.name = "pll2_sysclk1",
.parent = &pll2_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV1,
};
-static struct clk pll2_sysclk2 = {
+static struct davinci_clk pll2_sysclk2 = {
.name = "pll2_sysclk2",
.parent = &pll2_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV2,
};
-static struct clk pll2_sysclkbp = {
+static struct davinci_clk pll2_sysclkbp = {
.name = "pll2_sysclkbp",
.parent = &pll2_clk,
.flags = CLK_PLL | PRE_PLL,
.div_reg = BPDIV
};
-static struct clk dsp_clk = {
+static struct davinci_clk dsp_clk = {
.name = "dsp",
.parent = &pll1_sysclk1,
.lpsc = DAVINCI_LPSC_GEM,
@@ -142,14 +142,14 @@ static struct clk dsp_clk = {
.usecount = 1, /* REVISIT how to disable? */
};
-static struct clk arm_clk = {
+static struct davinci_clk arm_clk = {
.name = "arm",
.parent = &pll1_sysclk2,
.lpsc = DAVINCI_LPSC_ARM,
.flags = ALWAYS_ENABLED,
};
-static struct clk vicp_clk = {
+static struct davinci_clk vicp_clk = {
.name = "vicp",
.parent = &pll1_sysclk2,
.lpsc = DAVINCI_LPSC_IMCOP,
@@ -157,128 +157,128 @@ static struct clk vicp_clk = {
.usecount = 1, /* REVISIT how to disable? */
};
-static struct clk vpss_master_clk = {
+static struct davinci_clk vpss_master_clk = {
.name = "vpss_master",
.parent = &pll1_sysclk3,
.lpsc = DAVINCI_LPSC_VPSSMSTR,
.flags = CLK_PSC,
};
-static struct clk vpss_slave_clk = {
+static struct davinci_clk vpss_slave_clk = {
.name = "vpss_slave",
.parent = &pll1_sysclk3,
.lpsc = DAVINCI_LPSC_VPSSSLV,
};
-static struct clk uart0_clk = {
+static struct davinci_clk uart0_clk = {
.name = "uart0",
.parent = &pll1_aux_clk,
.lpsc = DAVINCI_LPSC_UART0,
};
-static struct clk uart1_clk = {
+static struct davinci_clk uart1_clk = {
.name = "uart1",
.parent = &pll1_aux_clk,
.lpsc = DAVINCI_LPSC_UART1,
};
-static struct clk uart2_clk = {
+static struct davinci_clk uart2_clk = {
.name = "uart2",
.parent = &pll1_aux_clk,
.lpsc = DAVINCI_LPSC_UART2,
};
-static struct clk emac_clk = {
+static struct davinci_clk emac_clk = {
.name = "emac",
.parent = &pll1_sysclk5,
.lpsc = DAVINCI_LPSC_EMAC_WRAPPER,
};
-static struct clk i2c_clk = {
+static struct davinci_clk i2c_clk = {
.name = "i2c",
.parent = &pll1_aux_clk,
.lpsc = DAVINCI_LPSC_I2C,
};
-static struct clk ide_clk = {
+static struct davinci_clk ide_clk = {
.name = "ide",
.parent = &pll1_sysclk5,
.lpsc = DAVINCI_LPSC_ATA,
};
-static struct clk asp_clk = {
+static struct davinci_clk asp_clk = {
.name = "asp0",
.parent = &pll1_sysclk5,
.lpsc = DAVINCI_LPSC_McBSP,
};
-static struct clk mmcsd_clk = {
+static struct davinci_clk mmcsd_clk = {
.name = "mmcsd",
.parent = &pll1_sysclk5,
.lpsc = DAVINCI_LPSC_MMC_SD,
};
-static struct clk spi_clk = {
+static struct davinci_clk spi_clk = {
.name = "spi",
.parent = &pll1_sysclk5,
.lpsc = DAVINCI_LPSC_SPI,
};
-static struct clk gpio_clk = {
+static struct davinci_clk gpio_clk = {
.name = "gpio",
.parent = &pll1_sysclk5,
.lpsc = DAVINCI_LPSC_GPIO,
};
-static struct clk usb_clk = {
+static struct davinci_clk usb_clk = {
.name = "usb",
.parent = &pll1_sysclk5,
.lpsc = DAVINCI_LPSC_USB,
};
-static struct clk vlynq_clk = {
+static struct davinci_clk vlynq_clk = {
.name = "vlynq",
.parent = &pll1_sysclk5,
.lpsc = DAVINCI_LPSC_VLYNQ,
};
-static struct clk aemif_clk = {
+static struct davinci_clk aemif_clk = {
.name = "aemif",
.parent = &pll1_sysclk5,
.lpsc = DAVINCI_LPSC_AEMIF,
};
-static struct clk pwm0_clk = {
+static struct davinci_clk pwm0_clk = {
.name = "pwm0",
.parent = &pll1_aux_clk,
.lpsc = DAVINCI_LPSC_PWM0,
};
-static struct clk pwm1_clk = {
+static struct davinci_clk pwm1_clk = {
.name = "pwm1",
.parent = &pll1_aux_clk,
.lpsc = DAVINCI_LPSC_PWM1,
};
-static struct clk pwm2_clk = {
+static struct davinci_clk pwm2_clk = {
.name = "pwm2",
.parent = &pll1_aux_clk,
.lpsc = DAVINCI_LPSC_PWM2,
};
-static struct clk timer0_clk = {
+static struct davinci_clk timer0_clk = {
.name = "timer0",
.parent = &pll1_aux_clk,
.lpsc = DAVINCI_LPSC_TIMER0,
};
-static struct clk timer1_clk = {
+static struct davinci_clk timer1_clk = {
.name = "timer1",
.parent = &pll1_aux_clk,
.lpsc = DAVINCI_LPSC_TIMER1,
};
-static struct clk timer2_clk = {
+static struct davinci_clk timer2_clk = {
.name = "timer2",
.parent = &pll1_aux_clk,
.lpsc = DAVINCI_LPSC_TIMER2,
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
index 1ecca9b..ed55d17 100644
--- a/arch/arm/mach-davinci/dm646x.c
+++ b/arch/arm/mach-davinci/dm646x.c
@@ -62,258 +62,258 @@ static struct pll_data pll2_data = {
.phys_base = DAVINCI_PLL2_BASE,
};
-static struct clk ref_clk = {
+static struct davinci_clk ref_clk = {
.name = "ref_clk",
.rate = DM646X_REF_FREQ,
.set_rate = davinci_simple_set_rate,
};
-static struct clk aux_clkin = {
+static struct davinci_clk aux_clkin = {
.name = "aux_clkin",
.rate = DM646X_AUX_FREQ,
};
-static struct clk pll1_clk = {
+static struct davinci_clk pll1_clk = {
.name = "pll1",
.parent = &ref_clk,
.pll_data = &pll1_data,
.flags = CLK_PLL,
};
-static struct clk pll1_sysclk1 = {
+static struct davinci_clk pll1_sysclk1 = {
.name = "pll1_sysclk1",
.parent = &pll1_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV1,
};
-static struct clk pll1_sysclk2 = {
+static struct davinci_clk pll1_sysclk2 = {
.name = "pll1_sysclk2",
.parent = &pll1_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV2,
};
-static struct clk pll1_sysclk3 = {
+static struct davinci_clk pll1_sysclk3 = {
.name = "pll1_sysclk3",
.parent = &pll1_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV3,
};
-static struct clk pll1_sysclk4 = {
+static struct davinci_clk pll1_sysclk4 = {
.name = "pll1_sysclk4",
.parent = &pll1_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV4,
};
-static struct clk pll1_sysclk5 = {
+static struct davinci_clk pll1_sysclk5 = {
.name = "pll1_sysclk5",
.parent = &pll1_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV5,
};
-static struct clk pll1_sysclk6 = {
+static struct davinci_clk pll1_sysclk6 = {
.name = "pll1_sysclk6",
.parent = &pll1_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV6,
};
-static struct clk pll1_sysclk8 = {
+static struct davinci_clk pll1_sysclk8 = {
.name = "pll1_sysclk8",
.parent = &pll1_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV8,
};
-static struct clk pll1_sysclk9 = {
+static struct davinci_clk pll1_sysclk9 = {
.name = "pll1_sysclk9",
.parent = &pll1_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV9,
};
-static struct clk pll1_sysclkbp = {
+static struct davinci_clk pll1_sysclkbp = {
.name = "pll1_sysclkbp",
.parent = &pll1_clk,
.flags = CLK_PLL | PRE_PLL,
.div_reg = BPDIV,
};
-static struct clk pll1_aux_clk = {
+static struct davinci_clk pll1_aux_clk = {
.name = "pll1_aux_clk",
.parent = &pll1_clk,
.flags = CLK_PLL | PRE_PLL,
};
-static struct clk pll2_clk = {
+static struct davinci_clk pll2_clk = {
.name = "pll2_clk",
.parent = &ref_clk,
.pll_data = &pll2_data,
.flags = CLK_PLL,
};
-static struct clk pll2_sysclk1 = {
+static struct davinci_clk pll2_sysclk1 = {
.name = "pll2_sysclk1",
.parent = &pll2_clk,
.flags = CLK_PLL,
.div_reg = PLLDIV1,
};
-static struct clk dsp_clk = {
+static struct davinci_clk dsp_clk = {
.name = "dsp",
.parent = &pll1_sysclk1,
.lpsc = DM646X_LPSC_C64X_CPU,
.usecount = 1, /* REVISIT how to disable? */
};
-static struct clk arm_clk = {
+static struct davinci_clk arm_clk = {
.name = "arm",
.parent = &pll1_sysclk2,
.lpsc = DM646X_LPSC_ARM,
.flags = ALWAYS_ENABLED,
};
-static struct clk edma_cc_clk = {
+static struct davinci_clk edma_cc_clk = {
.name = "edma_cc",
.parent = &pll1_sysclk2,
.lpsc = DM646X_LPSC_TPCC,
.flags = ALWAYS_ENABLED,
};
-static struct clk edma_tc0_clk = {
+static struct davinci_clk edma_tc0_clk = {
.name = "edma_tc0",
.parent = &pll1_sysclk2,
.lpsc = DM646X_LPSC_TPTC0,
.flags = ALWAYS_ENABLED,
};
-static struct clk edma_tc1_clk = {
+static struct davinci_clk edma_tc1_clk = {
.name = "edma_tc1",
.parent = &pll1_sysclk2,
.lpsc = DM646X_LPSC_TPTC1,
.flags = ALWAYS_ENABLED,
};
-static struct clk edma_tc2_clk = {
+static struct davinci_clk edma_tc2_clk = {
.name = "edma_tc2",
.parent = &pll1_sysclk2,
.lpsc = DM646X_LPSC_TPTC2,
.flags = ALWAYS_ENABLED,
};
-static struct clk edma_tc3_clk = {
+static struct davinci_clk edma_tc3_clk = {
.name = "edma_tc3",
.parent = &pll1_sysclk2,
.lpsc = DM646X_LPSC_TPTC3,
.flags = ALWAYS_ENABLED,
};
-static struct clk uart0_clk = {
+static struct davinci_clk uart0_clk = {
.name = "uart0",
.parent = &aux_clkin,
.lpsc = DM646X_LPSC_UART0,
};
-static struct clk uart1_clk = {
+static struct davinci_clk uart1_clk = {
.name = "uart1",
.parent = &aux_clkin,
.lpsc = DM646X_LPSC_UART1,
};
-static struct clk uart2_clk = {
+static struct davinci_clk uart2_clk = {
.name = "uart2",
.parent = &aux_clkin,
.lpsc = DM646X_LPSC_UART2,
};
-static struct clk i2c_clk = {
+static struct davinci_clk i2c_clk = {
.name = "I2CCLK",
.parent = &pll1_sysclk3,
.lpsc = DM646X_LPSC_I2C,
};
-static struct clk gpio_clk = {
+static struct davinci_clk gpio_clk = {
.name = "gpio",
.parent = &pll1_sysclk3,
.lpsc = DM646X_LPSC_GPIO,
};
-static struct clk mcasp0_clk = {
+static struct davinci_clk mcasp0_clk = {
.name = "mcasp0",
.parent = &pll1_sysclk3,
.lpsc = DM646X_LPSC_McASP0,
};
-static struct clk mcasp1_clk = {
+static struct davinci_clk mcasp1_clk = {
.name = "mcasp1",
.parent = &pll1_sysclk3,
.lpsc = DM646X_LPSC_McASP1,
};
-static struct clk aemif_clk = {
+static struct davinci_clk aemif_clk = {
.name = "aemif",
.parent = &pll1_sysclk3,
.lpsc = DM646X_LPSC_AEMIF,
.flags = ALWAYS_ENABLED,
};
-static struct clk emac_clk = {
+static struct davinci_clk emac_clk = {
.name = "emac",
.parent = &pll1_sysclk3,
.lpsc = DM646X_LPSC_EMAC,
};
-static struct clk pwm0_clk = {
+static struct davinci_clk pwm0_clk = {
.name = "pwm0",
.parent = &pll1_sysclk3,
.lpsc = DM646X_LPSC_PWM0,
.usecount = 1, /* REVIST: disabling hangs system */
};
-static struct clk pwm1_clk = {
+static struct davinci_clk pwm1_clk = {
.name = "pwm1",
.parent = &pll1_sysclk3,
.lpsc = DM646X_LPSC_PWM1,
.usecount = 1, /* REVIST: disabling hangs system */
};
-static struct clk timer0_clk = {
+static struct davinci_clk timer0_clk = {
.name = "timer0",
.parent = &pll1_sysclk3,
.lpsc = DM646X_LPSC_TIMER0,
};
-static struct clk timer1_clk = {
+static struct davinci_clk timer1_clk = {
.name = "timer1",
.parent = &pll1_sysclk3,
.lpsc = DM646X_LPSC_TIMER1,
};
-static struct clk timer2_clk = {
+static struct davinci_clk timer2_clk = {
.name = "timer2",
.parent = &pll1_sysclk3,
.flags = ALWAYS_ENABLED, /* no LPSC, always enabled; c.f. spruep9a */
};
-static struct clk ide_clk = {
+static struct davinci_clk ide_clk = {
.name = "ide",
.parent = &pll1_sysclk4,
.lpsc = DAVINCI_LPSC_ATA,
};
-static struct clk vpif0_clk = {
+static struct davinci_clk vpif0_clk = {
.name = "vpif0",
.parent = &ref_clk,
.lpsc = DM646X_LPSC_VPSSMSTR,
.flags = ALWAYS_ENABLED,
};
-static struct clk vpif1_clk = {
+static struct davinci_clk vpif1_clk = {
.name = "vpif1",
.parent = &ref_clk,
.lpsc = DM646X_LPSC_VPSSSLV,
diff --git a/arch/arm/mach-davinci/include/mach/clock.h b/arch/arm/mach-davinci/include/mach/clock.h
index 3e8af6a..42ed4f2 100644
--- a/arch/arm/mach-davinci/include/mach/clock.h
+++ b/arch/arm/mach-davinci/include/mach/clock.h
@@ -15,9 +15,6 @@
struct clk;
-extern int clk_register(struct clk *clk);
-extern void clk_unregister(struct clk *clk);
-
int davinci_clk_reset_assert(struct clk *c);
int davinci_clk_reset_deassert(struct clk *c);
diff --git a/arch/arm/mach-davinci/usb-da8xx.c b/arch/arm/mach-davinci/usb-da8xx.c
index a2e575e..7ea1343 100644
--- a/arch/arm/mach-davinci/usb-da8xx.c
+++ b/arch/arm/mach-davinci/usb-da8xx.c
@@ -23,7 +23,7 @@
#define DA8XX_USB0_BASE 0x01e00000
#define DA8XX_USB1_BASE 0x01e25000
-static struct clk *usb20_clk;
+static struct davinci_clk *usb20_clk;
static struct platform_device da8xx_usb_phy = {
.name = "da8xx-usb-phy",
@@ -128,7 +128,7 @@ int __init da8xx_register_usb11(struct da8xx_ohci_root_hub *pdata)
return platform_device_register(&da8xx_usb11_device);
}
-static struct clk usb_refclkin = {
+static struct davinci_clk usb_refclkin = {
.name = "usb_refclkin",
.set_rate = davinci_simple_set_rate,
};
@@ -147,16 +147,16 @@ int __init da8xx_register_usb_refclkin(int rate)
int ret;
usb_refclkin.rate = rate;
- ret = clk_register(&usb_refclkin);
+ ret = davinci_clk_register(&usb_refclkin);
if (ret)
return ret;
- clk_register_clkdev(&usb_refclkin, "usb_refclkin", NULL);
+ clk_register_clkdev(usb_refclkin.hw.clk, "usb_refclkin", NULL);
return 0;
}
-static void usb20_phy_clk_enable(struct clk *clk)
+static void usb20_phy_clk_enable(struct davinci_clk *clk)
{
u32 val;
u32 timeout = 500000; /* 500 msec */
@@ -187,7 +187,7 @@ static void usb20_phy_clk_enable(struct clk *clk)
davinci_clk_disable(usb20_clk);
}
-static void usb20_phy_clk_disable(struct clk *clk)
+static void usb20_phy_clk_disable(struct davinci_clk *clk)
{
u32 val;
@@ -196,7 +196,8 @@ static void usb20_phy_clk_disable(struct clk *clk)
writel(val, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));
}
-static int usb20_phy_clk_set_parent(struct clk *clk, struct clk *parent)
+static int usb20_phy_clk_set_parent(struct davinci_clk *clk,
+ struct davinci_clk *parent)
{
u32 val;
@@ -214,7 +215,7 @@ static int usb20_phy_clk_set_parent(struct clk *clk, struct clk *parent)
/* reference frequency also comes from parent clock */
val &= ~CFGCHIP2_REFFREQ_MASK;
- switch (clk_get_rate(parent)) {
+ switch (parent->rate) {
case 12000000:
val |= CFGCHIP2_REFFREQ_12MHZ;
break;
@@ -252,7 +253,7 @@ static int usb20_phy_clk_set_parent(struct clk *clk, struct clk *parent)
return 0;
}
-static struct clk usb20_phy_clk = {
+static struct davinci_clk usb20_phy_clk = {
.name = "usb20_phy",
.clk_enable = usb20_phy_clk_enable,
.clk_disable = usb20_phy_clk_disable,
@@ -267,32 +268,36 @@ static struct clk usb20_phy_clk = {
*/
int __init da8xx_register_usb20_phy_clk(bool use_usb_refclkin)
{
- struct clk *parent;
+ struct clk *clk, *parent;
int ret;
- usb20_clk = clk_get(&da8xx_usb20_dev.dev, "usb20");
- ret = PTR_ERR_OR_ZERO(usb20_clk);
+ clk = clk_get(&da8xx_usb20_dev.dev, "usb20");
+ ret = PTR_ERR_OR_ZERO(clk);
if (ret)
return ret;
parent = clk_get(NULL, use_usb_refclkin ? "usb_refclkin" : "pll0_aux");
ret = PTR_ERR_OR_ZERO(parent);
if (ret) {
- clk_put(usb20_clk);
+ clk_put(clk);
return ret;
}
- usb20_phy_clk.parent = parent;
- ret = clk_register(&usb20_phy_clk);
+ usb20_clk = to_davinci_clk(__clk_get_hw(clk));
+
+ usb20_phy_clk.parent = to_davinci_clk(__clk_get_hw(parent));
+ ret = davinci_clk_register(&usb20_phy_clk);
if (!ret)
- clk_register_clkdev(&usb20_phy_clk, "usb20_phy", "da8xx-usb-phy");
+ clk_register_clkdev(usb20_phy_clk.hw.clk, "usb20_phy",
+ "da8xx-usb-phy");
clk_put(parent);
return ret;
}
-static int usb11_phy_clk_set_parent(struct clk *clk, struct clk *parent)
+static int usb11_phy_clk_set_parent(struct davinci_clk *clk,
+ struct davinci_clk *parent)
{
u32 val;
@@ -313,7 +318,7 @@ static int usb11_phy_clk_set_parent(struct clk *clk, struct clk *parent)
return 0;
}
-static struct clk usb11_phy_clk = {
+static struct davinci_clk usb11_phy_clk = {
.name = "usb11_phy",
.set_parent = usb11_phy_clk_set_parent,
};
@@ -336,10 +341,11 @@ int __init da8xx_register_usb11_phy_clk(bool use_usb_refclkin)
if (IS_ERR(parent))
return PTR_ERR(parent);
- usb11_phy_clk.parent = parent;
- ret = clk_register(&usb11_phy_clk);
+ usb11_phy_clk.parent = to_davinci_clk(__clk_get_hw(parent));
+ ret = davinci_clk_register(&usb11_phy_clk);
if (!ret)
- clk_register_clkdev(&usb11_phy_clk, "usb11_phy", "da8xx-usb-phy");
+ clk_register_clkdev(usb11_phy_clk.hw.clk, "usb11_phy",
+ "da8xx-usb-phy");
clk_put(parent);
--
2.7.4
^ permalink raw reply related
* [PATCH v3 5/5] ARM: davinci: remove clock debugfs
From: David Lechner @ 2017-12-09 2:15 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1512785711-15064-1-git-send-email-david@lechnology.com>
This removed the debugfs entry for mach-davinci clocks. The clocks now use
the common clock framework, which provides debugfs already, so this code is
redundant.
Signed-off-by: David Lechner <david@lechnology.com>
---
arch/arm/mach-davinci/clock.c | 79 -------------------------------------------
1 file changed, 79 deletions(-)
diff --git a/arch/arm/mach-davinci/clock.c b/arch/arm/mach-davinci/clock.c
index 0e63d93..347902e 100644
--- a/arch/arm/mach-davinci/clock.c
+++ b/arch/arm/mach-davinci/clock.c
@@ -626,82 +626,3 @@ void __init davinci_clk_init(struct davinci_clk *clk, const char *con_id,
if (clk->flags & ALWAYS_ENABLED)
clk_prepare_enable(clk->hw.clk);
}
-
-#ifdef CONFIG_DEBUG_FS
-
-#include <linux/debugfs.h>
-#include <linux/seq_file.h>
-
-#define CLKNAME_MAX 10 /* longest clock name */
-#define NEST_DELTA 2
-#define NEST_MAX 4
-
-static void
-dump_clock(struct seq_file *s, unsigned nest, struct davinci_clk *parent)
-{
- char *state;
- char buf[CLKNAME_MAX + NEST_DELTA * NEST_MAX];
- struct davinci_clk *clk;
- unsigned i;
-
- if (parent->flags & CLK_PLL)
- state = "pll";
- else if (parent->flags & CLK_PSC)
- state = "psc";
- else
- state = "";
-
- /* <nest spaces> name <pad to end> */
- memset(buf, ' ', sizeof(buf) - 1);
- buf[sizeof(buf) - 1] = 0;
- i = strlen(parent->name);
- memcpy(buf + nest, parent->name,
- min(i, (unsigned)(sizeof(buf) - 1 - nest)));
-
- seq_printf(s, "%s users=%2d %-3s %9ld Hz\n",
- buf, parent->usecount, state, parent->rate);
- /* REVISIT show device associations too */
-
- /* cost is now small, but not linear... */
- list_for_each_entry(clk, &parent->children, childnode) {
- dump_clock(s, nest + NEST_DELTA, clk);
- }
-}
-
-static int davinci_ck_show(struct seq_file *m, void *v)
-{
- struct davinci_clk *clk;
-
- /*
- * Show clock tree; We trust nonzero usecounts equate to PSC enables...
- */
- mutex_lock(&clocks_mutex);
- list_for_each_entry(clk, &clocks, node)
- if (!clk->parent)
- dump_clock(m, 0, clk);
- mutex_unlock(&clocks_mutex);
-
- return 0;
-}
-
-static int davinci_ck_open(struct inode *inode, struct file *file)
-{
- return single_open(file, davinci_ck_show, NULL);
-}
-
-static const struct file_operations davinci_ck_operations = {
- .open = davinci_ck_open,
- .read = seq_read,
- .llseek = seq_lseek,
- .release = single_release,
-};
-
-static int __init davinci_clk_debugfs_init(void)
-{
- debugfs_create_file("davinci_clocks", S_IFREG | S_IRUGO, NULL, NULL,
- &davinci_ck_operations);
- return 0;
-
-}
-device_initcall(davinci_clk_debugfs_init);
-#endif /* CONFIG_DEBUG_FS */
--
2.7.4
^ permalink raw reply related
* [RFC PATCH 2/5] perf jevents: add support for arch recommended events
From: Jiri Olsa @ 2017-12-09 7:26 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <df2f2547-85b3-b522-4021-a2aa84333559@huawei.com>
On Fri, Dec 08, 2017 at 03:38:06PM +0000, John Garry wrote:
SNIP
> > >
> > > Hi jirka,
> > >
>
> Hi jirka,
>
> > > The linux kernel headers are not used for jevents tool. I would rather use
> > > them if possible...
> >
> > should be as easy as adding #include <linux/list.h> ;-)
> >
>
> Hi jirka,
>
> I think the issue is that jevents is a "hostprogs", which does not use
> kernel headers.
>
> FWIW, here is the symptom:
> pmu-events/jevents.c:51:24: fatal error: linux/list.h: No such file or
> directory
> #include <linux/list.h>
> ^
> compilation terminated.
> mv: cannot stat ?pmu-events/.jevents.o.tmp?: No such file or directory
>
> perf tool build is different.
yep, need additional in Bukld file, attached
jirka
---
diff --git a/tools/perf/pmu-events/Build b/tools/perf/pmu-events/Build
index 999a4e878162..b7d2e0e9cbd0 100644
--- a/tools/perf/pmu-events/Build
+++ b/tools/perf/pmu-events/Build
@@ -1,5 +1,6 @@
hostprogs := jevents
+CHOSTFLAGS = -I$(srctree)/tools/include
jevents-y += json.o jsmn.o jevents.o
pmu-events-y += pmu-events.o
JDIR = pmu-events/arch/$(SRCARCH)
diff --git a/tools/perf/pmu-events/jevents.c b/tools/perf/pmu-events/jevents.c
index b578aa26e375..5b9b1fee3dfe 100644
--- a/tools/perf/pmu-events/jevents.c
+++ b/tools/perf/pmu-events/jevents.c
@@ -47,6 +47,7 @@
#include "jsmn.h"
#include "json.h"
#include "jevents.h"
+#include <linux/list.h>
int verbose;
char *prog;
@@ -884,6 +885,7 @@ int main(int argc, char *argv[])
const char *output_file;
const char *start_dirname;
struct stat stbuf;
+ struct list_head krava __maybe_unused;
prog = basename(argv[0]);
if (argc < 4) {
^ permalink raw reply related
* [RFC PATCH 2/5] perf jevents: add support for arch recommended events
From: Jiri Olsa @ 2017-12-09 7:31 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <afd7bf2a-4d94-0db0-640d-b1c93c8ba230@huawei.com>
On Fri, Dec 08, 2017 at 03:42:10PM +0000, John Garry wrote:
> On 08/12/2017 12:29, Jiri Olsa wrote:
> > On Wed, Dec 06, 2017 at 03:20:14PM +0000, John Garry wrote:
> > > On 06/12/2017 13:36, Jiri Olsa wrote:
> > > > On Wed, Dec 06, 2017 at 12:13:16AM +0800, John Garry wrote:
> > > > > For some architectures (like arm64), there are architecture-
> > > > > defined recommended events. Vendors may not be obliged to
> > > > > follow the recommendation and may implement their own pmu
> > > > > event for a specific event code.
> > > > >
> > > > > This patch adds support for parsing events from arch-defined
> > > > > recommended JSONs, and then fixing up vendor events when
> > > > > they have implemented these events as recommended.
> > > >
> > > > in the previous patch you added the vendor support, so
> > > > you have arch|vendor|platform key for the event list
> > > > and perf have the most current/local event list
> > > >
> > > > why would you need to fix it? if there's new event list,
> > > > the table gets updated, perf is rebuilt.. I'm clearly
> > > > missing something ;-)
> > >
> > > The 2 patches are quite separate. In the first patch, I just added support
> > > for the vendor subdirectory.
> > >
> > > So this patch is not related to rebuilding when adding a new event list or
> > > dependency checking.
> > >
> > > Here we are trying to allow the vendor to just specify that an event is
> > > supported as standard in their platform, without duplicating all the
> > > standard event fields in their JSON. When processing the vendor JSONs, the
> > > jevents tool can figure which events are standard and create the proper
> > > event entries in the pmu events table, referencing the architecture JSON.
> >
>
> Hi jirka,
>
> > I think we should keep this simple and mangle this with some pointer logic
sry for confusion, of course it should have been '.. and NOT mangle..' ;-)
> >
> > now you have arch/vendor/platform directory structure..
>
> I'm glad that there seems to be no objection to this, as I feel that this
> was a problem.
>
> why don't
> > you add events for every such directory? I understand there will
> > be duplications, but we already have them for other archs and it's
> > not big deal:
>
> The amount of duplication was the concern. As mentioned earlier, it would be
> anticipated that every vendor would implement these events as recommended,
> so a copy for every platform from every vendor. We're looking for a way to
> avoid this.
>
> Actually having a scalable JSON standard format for pmu events, which allows
> us to define common events per architecture / vendor and reference them per
> platform JSON could be useful.
>
> Here we're dealing with trade-off between duplication (simplicity) vs
> complexity (or over-engineering).
understood, but as I said we already are ok with duplicates,
if it's reasonable size as is for x86 now.. how much amount
are we talking about for arm?
jirka
^ permalink raw reply
* [PATCH 0/7] Add USB remote wakeup driver
From: Chunfeng Yun @ 2017-12-09 8:45 UTC (permalink / raw)
To: linux-arm-kernel
These patches introduce the SSUSB and SPM glue layer driver which is
used to support usb remote wakeup. Usually the glue layer is put into
a system controller, such as PERICFG module.
The old way to support usb wakeup is put into SSUSB controller drivers,
including xhci-mtk driver and mtu3 driver, but there are some problems:
1. can't disdinguish the relation between glue layer and SSUSB IP
when SoCs supports multi SSUSB IPs;
2. duplicated code for wakeup are put into both xhci-mtk and mtu3
drivers;
3. the glue layer may vary on different SoCs with SSUSB IP, and will
make SSUSB controller drivers complicated;
In order to resolve these problems, it's useful to make the glue layer
transparent by extracting a seperated driver, meanwhile to reduce the
duplicated code and simplify SSUSB controller drivers.
Changes from v1:
* Introduce USB remote wakeup driver
* Use the new way to support remote wakeup for SSUSB controller drivers
* Add binding document for USB remote wakeup driver
* Update binding documents of SSUSB controller drivers
* Update DTS of MT8173 platform
Chunfeng Yun (7):
soc: mediatek: Add USB wakeup driver
dt-bindings: soc: mediatek: add bindings document for USB wakeup
usb: xhci-mtk: use APIs of mtu_wakeup to support remote wakeup
usb: mtu3: use APIs of mtu_wakeup to support remote wakeup
dt-bindings: usb: mtk-xhci: add USB wakeup properties
dt-bindings: usb: mtu3: add USB wakeup properties
arm64: dts: mt8173: add uwk node and remove unused usb property
.../bindings/soc/mediatek/usb-wakeup.txt | 77 +++
.../devicetree/bindings/usb/mediatek,mtk-xhci.txt | 15 +-
.../devicetree/bindings/usb/mediatek,mtu3.txt | 14 +-
arch/arm64/boot/dts/mediatek/mt8173-evb.dts | 28 +-
arch/arm64/boot/dts/mediatek/mt8173.dtsi | 16 +-
drivers/soc/mediatek/Kconfig | 8 +
drivers/soc/mediatek/Makefile | 1 +
drivers/soc/mediatek/mtk-usb-wakeup.c | 519 +++++++++++++++++++++
drivers/usb/host/xhci-mtk.c | 39 +-
drivers/usb/host/xhci-mtk.h | 2 +
drivers/usb/mtu3/mtu3.h | 2 +
drivers/usb/mtu3/mtu3_host.c | 39 +-
include/dt-bindings/soc/mediatek,usb-wakeup.h | 15 +
include/linux/soc/mediatek/usb-wakeup.h | 88 ++++
14 files changed, 803 insertions(+), 60 deletions(-)
create mode 100644 Documentation/devicetree/bindings/soc/mediatek/usb-wakeup.txt
create mode 100644 drivers/soc/mediatek/mtk-usb-wakeup.c
create mode 100644 include/dt-bindings/soc/mediatek,usb-wakeup.h
create mode 100644 include/linux/soc/mediatek/usb-wakeup.h
--
1.9.1
^ permalink raw reply
* [PATCH 1/7] soc: mediatek: Add USB wakeup driver
From: Chunfeng Yun @ 2017-12-09 8:45 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1512809136-2779-1-git-send-email-chunfeng.yun@mediatek.com>
This driver is used to support usb wakeup which is controlled by
the glue layer between SSUSB and SPM. Usually the glue layer is put
into a system controller, such as pericfg module, which is
represented by a syscon node in DTS.
Due to the glue layer may vary on different SoCs, it's useful to
extract a separated driver to simplify usb controller drivers.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
---
drivers/soc/mediatek/Kconfig | 8 +
drivers/soc/mediatek/Makefile | 1 +
drivers/soc/mediatek/mtk-usb-wakeup.c | 519 ++++++++++++++++++++++++++
include/dt-bindings/soc/mediatek,usb-wakeup.h | 15 +
include/linux/soc/mediatek/usb-wakeup.h | 88 +++++
5 files changed, 631 insertions(+)
create mode 100644 drivers/soc/mediatek/mtk-usb-wakeup.c
create mode 100644 include/dt-bindings/soc/mediatek,usb-wakeup.h
create mode 100644 include/linux/soc/mediatek/usb-wakeup.h
diff --git a/drivers/soc/mediatek/Kconfig b/drivers/soc/mediatek/Kconfig
index a7d0667..30cd226 100644
--- a/drivers/soc/mediatek/Kconfig
+++ b/drivers/soc/mediatek/Kconfig
@@ -31,4 +31,12 @@ config MTK_SCPSYS
Say yes here to add support for the MediaTek SCPSYS power domain
driver.
+config MTK_UWK
+ bool "MediaTek USB Wakeup Support"
+ select REGMAP
+ help
+ Say yes here to add support for the MediaTek SSUSB-SPM glue layer
+ which supports some different type of USB wakeup, such as IP-SLEEP,
+ LINESTATE, IDDIG etc, and it can support multi SSUSB controllers.
+
endmenu
diff --git a/drivers/soc/mediatek/Makefile b/drivers/soc/mediatek/Makefile
index 12998b0..66fbb54f 100644
--- a/drivers/soc/mediatek/Makefile
+++ b/drivers/soc/mediatek/Makefile
@@ -1,3 +1,4 @@
obj-$(CONFIG_MTK_INFRACFG) += mtk-infracfg.o
obj-$(CONFIG_MTK_PMIC_WRAP) += mtk-pmic-wrap.o
obj-$(CONFIG_MTK_SCPSYS) += mtk-scpsys.o
+obj-$(CONFIG_MTK_UWK) += mtk-usb-wakeup.o
diff --git a/drivers/soc/mediatek/mtk-usb-wakeup.c b/drivers/soc/mediatek/mtk-usb-wakeup.c
new file mode 100644
index 0000000..16539a6
--- /dev/null
+++ b/drivers/soc/mediatek/mtk-usb-wakeup.c
@@ -0,0 +1,519 @@
+/*
+ * Copyright (c) 2017 MediaTek Inc.
+ * Author: Chunfeng Yun <chunfeng.yun@mediatek.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0
+ *
+ */
+
+#include <dt-bindings/soc/mediatek,usb-wakeup.h>
+#include <linux/kernel.h>
+#include <linux/mfd/syscon.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_platform.h>
+#include <linux/regmap.h>
+#include <linux/slab.h>
+#include <linux/soc/mediatek/usb-wakeup.h>
+
+/* mt8173, mt8176 etc */
+#define PERI_WK_CTRL1 0x4
+#define WC1_IS_C(x) (((x) & 0xf) << 26) /* cycle debounce */
+#define WC1_IS_EN BIT(25)
+#define WC1_IS_P BIT(6) /* polarity for ip sleep */
+
+/* mt2712 etc */
+#define PERI_SSUSB_SPM_CTRL 0x0
+#define SSC_LINE_STATE_CHG GENMASK(11, 8)
+#define SSC_LINE_STATE_EN GENMASK(6, 5)
+#define SSC_IP_SLEEP_EN BIT(4)
+#define SSC_SPM_INT_EN BIT(1)
+
+enum mtk_uwk_vers {
+ MTK_UWK_V1 = 1,
+ MTK_UWK_V2,
+};
+
+struct mtk_uwk_pdata {
+ enum mtk_uwk_vers vers;
+};
+
+/**
+ * @reg_base: register offset within a syscon @wkc (e.g. pericfg module)
+ * @type: the types of wakeup, such as IP-SLEEP, LINE-STATE etc
+ */
+struct mtk_uwk_instance {
+ struct mtu_wakeup uwk;
+ u32 reg_base;
+ u32 reg_len;
+ u32 type;
+};
+
+struct mtk_uwk {
+ struct device *dev;
+ struct regmap *wkc;
+ const struct mtk_uwk_pdata *data;
+ struct mtk_uwk_instance **inst;
+ int num_inst;
+};
+
+static LIST_HEAD(of_uwk_providers);
+static DEFINE_MUTEX(of_uwk_mutex);
+
+static struct mtu_wakeup_provider *of_uwk_provider_add(struct device *dev,
+ struct mtu_wakeup *(*of_xlate)(struct device *dev,
+ struct of_phandle_args *args))
+{
+ struct mtu_wakeup_provider *provider;
+
+ provider = kzalloc(sizeof(*provider), GFP_KERNEL);
+ if (!provider)
+ return ERR_PTR(-ENOMEM);
+
+ provider->dev = dev;
+ provider->of_node = of_node_get(dev->of_node);
+ provider->of_xlate = of_xlate;
+
+ mutex_lock(&of_uwk_mutex);
+ list_add_tail(&provider->list, &of_uwk_providers);
+ mutex_unlock(&of_uwk_mutex);
+
+ return provider;
+}
+
+static void of_uwk_provider_del(struct device_node *np)
+{
+ struct mtu_wakeup_provider *provider;
+
+ mutex_lock(&of_uwk_mutex);
+ list_for_each_entry(provider, &of_uwk_providers, list) {
+ if (provider->of_node == np) {
+ list_del(&provider->list);
+ of_node_put(provider->of_node);
+ kfree(provider);
+ break;
+ }
+ }
+ mutex_unlock(&of_uwk_mutex);
+}
+
+static struct mtu_wakeup *of_uwk_get_from_provider(
+ struct of_phandle_args *args)
+{
+ struct mtu_wakeup_provider *provider;
+ struct device_node *child_np;
+ struct mtu_wakeup *uwk;
+
+ mutex_lock(&of_uwk_mutex);
+ list_for_each_entry(provider, &of_uwk_providers, list) {
+ for_each_child_of_node(provider->of_node, child_np) {
+ if (child_np == args->np) {
+ uwk = provider->of_xlate(provider->dev, args);
+ mutex_unlock(&of_uwk_mutex);
+ return uwk;
+ }
+ }
+ }
+ mutex_unlock(&of_uwk_mutex);
+
+ return ERR_PTR(-EPROBE_DEFER);
+}
+
+static struct mtu_wakeup *of_uwk_get(struct device_node *np, int index)
+{
+ struct mtu_wakeup *uwk = NULL;
+ struct of_phandle_args args;
+ int ret;
+
+ ret = of_parse_phandle_with_args(np, "mediatek,uwks",
+ "#mediatek,uwk-cells", index, &args);
+ if (ret)
+ return ERR_PTR(-ENODEV);
+
+ if (!of_device_is_available(args.np)) {
+ dev_warn(uwk->parent, "Requested uwk is disabled\n");
+ uwk = ERR_PTR(-ENODEV);
+ goto put_node;
+ }
+
+ uwk = of_uwk_get_from_provider(&args);
+
+put_node:
+ of_node_put(args.np);
+ return uwk;
+}
+
+static void devm_uwk_release(struct device *dev, void *res)
+{
+ struct mtu_wakeup *uwk = *(struct mtu_wakeup **)res;
+
+ if (IS_ERR_OR_NULL(uwk))
+ return;
+
+ module_put(uwk->ops->owner);
+ put_device(uwk->parent);
+}
+
+struct mtu_wakeup *devm_of_uwk_get_by_index(
+ struct device *dev, struct device_node *np, int index)
+{
+ struct mtu_wakeup **ptr, *uwk;
+
+ ptr = devres_alloc(devm_uwk_release, sizeof(*ptr), GFP_KERNEL);
+ if (!ptr)
+ return ERR_PTR(-ENOMEM);
+
+ uwk = of_uwk_get(np, index);
+ if (IS_ERR(uwk)) {
+ devres_free(ptr);
+ return uwk;
+ }
+
+ if (!try_module_get(uwk->ops->owner)) {
+ devres_free(ptr);
+ return ERR_PTR(-EPROBE_DEFER);
+ }
+
+ get_device(uwk->parent);
+
+ *ptr = uwk;
+ devres_add(dev, ptr);
+
+ return uwk;
+}
+EXPORT_SYMBOL_GPL(devm_of_uwk_get_by_index);
+
+int mtu_wakeup_enable(struct mtu_wakeup *uwk)
+{
+ int ret = 0;
+
+ if (!uwk)
+ return 0;
+
+ mutex_lock(&uwk->mutex);
+ if (uwk->count == 0 && uwk->ops->enable) {
+ ret = uwk->ops->enable(uwk);
+ if (ret) {
+ dev_err(uwk->parent, "uwk enable failed(%d)\n", ret);
+ goto out;
+ }
+ }
+ ++uwk->count;
+
+out:
+ mutex_unlock(&uwk->mutex);
+ return ret;
+}
+EXPORT_SYMBOL_GPL(mtu_wakeup_enable);
+
+int mtu_wakeup_disable(struct mtu_wakeup *uwk)
+{
+ int ret = 0;
+
+ if (!uwk)
+ return 0;
+
+ mutex_lock(&uwk->mutex);
+ if (uwk->count == 1 && uwk->ops->disable) {
+ ret = uwk->ops->disable(uwk);
+ if (ret) {
+ dev_err(uwk->parent, "uwk disable failed(%d)\n", ret);
+ goto out;
+ }
+ }
+ --uwk->count;
+
+out:
+ mutex_unlock(&uwk->mutex);
+ return ret;
+}
+EXPORT_SYMBOL_GPL(mtu_wakeup_disable);
+
+static struct mtk_uwk_instance *to_mwk_inst(struct mtu_wakeup *uwk)
+{
+ return uwk ? container_of(uwk, struct mtk_uwk_instance, uwk) : NULL;
+}
+
+static int mwk_v1_enable(struct mtk_uwk *mwk, struct mtk_uwk_instance *inst)
+{
+ struct regmap *wkc = mwk->wkc;
+ u32 val;
+
+ /* Only IP-SLEEP is supported */
+ if (inst->type != MTU_WK_IP_SLEEP)
+ return 0;
+
+ regmap_read(wkc, PERI_WK_CTRL1, &val);
+ val &= ~(WC1_IS_P | WC1_IS_C(0xf));
+ val |= WC1_IS_EN | WC1_IS_C(0x8);
+ regmap_write(wkc, PERI_WK_CTRL1, val);
+ regmap_read(wkc, PERI_WK_CTRL1, &val);
+ dev_dbg(mwk->dev, "%s: WK_CTRL1=%#x, type=%d\n",
+ __func__, val, inst->type);
+
+ return 0;
+}
+
+static int mwk_v1_disable(struct mtk_uwk *mwk, struct mtk_uwk_instance *inst)
+{
+ if (inst->type == MTU_WK_IP_SLEEP)
+ regmap_update_bits(mwk->wkc, PERI_WK_CTRL1, WC1_IS_EN, 0);
+
+ return 0;
+}
+
+static int mwk_v2_enable(struct mtk_uwk *mwk, struct mtk_uwk_instance *inst)
+{
+ struct regmap *wkc = mwk->wkc;
+ u32 rbase = inst->reg_base;
+ u32 val;
+
+ regmap_read(wkc, rbase + PERI_SSUSB_SPM_CTRL, &val);
+ switch (inst->type) {
+ case MTU_WK_IP_SLEEP:
+ val |= SSC_IP_SLEEP_EN;
+ break;
+ case MTU_WK_LINE_STATE:
+ val |= SSC_LINE_STATE_EN | SSC_LINE_STATE_CHG;
+ break;
+ default:
+ /* checked by xlate, ignore the error */
+ break;
+ }
+ val |= SSC_SPM_INT_EN;
+ regmap_write(wkc, rbase + PERI_SSUSB_SPM_CTRL, val);
+ regmap_read(wkc, rbase + PERI_SSUSB_SPM_CTRL, &val);
+ dev_dbg(mwk->dev, "%s: CTRL=%#x, type=%d\n",
+ __func__, val, inst->type);
+
+ return 0;
+}
+
+static int mwk_v2_disable(struct mtk_uwk *mwk, struct mtk_uwk_instance *inst)
+{
+ struct regmap *wkc = mwk->wkc;
+ u32 rbase = inst->reg_base;
+ u32 val;
+
+ regmap_read(wkc, rbase + PERI_SSUSB_SPM_CTRL, &val);
+ switch (inst->type) {
+ case MTU_WK_IP_SLEEP:
+ val &= ~SSC_IP_SLEEP_EN;
+ break;
+ case MTU_WK_LINE_STATE:
+ val &= ~(SSC_LINE_STATE_EN | SSC_LINE_STATE_CHG);
+ break;
+ default:
+ break;
+ }
+ val &= ~SSC_SPM_INT_EN;
+ regmap_write(wkc, rbase + PERI_SSUSB_SPM_CTRL, val);
+ dev_dbg(mwk->dev, "%s: type=%d\n", __func__, inst->type);
+
+ return 0;
+}
+
+static int mwk_enable(struct mtu_wakeup *uwk)
+{
+ struct mtk_uwk_instance *inst = to_mwk_inst(uwk);
+ struct mtk_uwk *mwk = dev_get_drvdata(uwk->parent);
+ int ret = 0;
+
+ switch (mwk->data->vers) {
+ case MTK_UWK_V1:
+ ret = mwk_v1_enable(mwk, inst);
+ break;
+ case MTK_UWK_V2:
+ ret = mwk_v2_enable(mwk, inst);
+ break;
+ default:
+ break;
+ }
+ return ret;
+}
+
+static int mwk_disable(struct mtu_wakeup *uwk)
+{
+ struct mtk_uwk_instance *inst = to_mwk_inst(uwk);
+ struct mtk_uwk *mwk = dev_get_drvdata(uwk->parent);
+ int ret = 0;
+
+ switch (mwk->data->vers) {
+ case MTK_UWK_V1:
+ ret = mwk_v1_disable(mwk, inst);
+ break;
+ case MTK_UWK_V2:
+ ret = mwk_v2_disable(mwk, inst);
+ break;
+ default:
+ break;
+ }
+ return ret;
+}
+
+static struct mtk_uwk_instance *mwk_inst_create(struct device *dev,
+ struct device_node *np,
+ const struct mtu_wakeup_ops *ops)
+{
+ struct mtk_uwk_instance *inst;
+ struct mtu_wakeup *uwk;
+ u32 buf[2];
+ int ret;
+
+ inst = devm_kzalloc(dev, sizeof(*inst), GFP_KERNEL);
+ if (!inst)
+ return ERR_PTR(-ENOMEM);
+
+ ret = of_property_read_u32_array(np, "reg", buf, ARRAY_SIZE(buf));
+ if (ret) {
+ dev_err(dev, "fail to read reg\n");
+ return ERR_PTR(ret);
+ }
+
+ inst->reg_base = buf[0];
+ inst->reg_len = buf[1];
+ uwk = &inst->uwk;
+ uwk->node = np;
+ uwk->ops = ops;
+ uwk->parent = dev;
+ mutex_init(&uwk->mutex);
+ dev_dbg(dev, "reg: %#x/%#x\n", inst->reg_base, inst->reg_len);
+
+ return inst;
+}
+
+static struct mtu_wakeup *mwk_xlate(struct device *dev,
+ struct of_phandle_args *args)
+{
+ struct mtk_uwk *mwk = dev_get_drvdata(dev);
+ struct mtk_uwk_instance *inst = NULL;
+ struct device_node *uwk_np = args->np;
+ int index;
+
+ if (args->args_count != 1) {
+ dev_err(dev, "invalid number of cells in uwk property\n");
+ return ERR_PTR(-EINVAL);
+ }
+
+ for (index = 0; index < mwk->num_inst; index++)
+ if (uwk_np == mwk->inst[index]->uwk.node) {
+ inst = mwk->inst[index];
+ break;
+ }
+
+ if (!inst) {
+ dev_err(dev, "failed to find appropriate uwk\n");
+ return ERR_PTR(-EINVAL);
+ }
+
+ inst->type = args->args[0];
+ if (!(inst->type == MTU_WK_IP_SLEEP ||
+ inst->type == MTU_WK_LINE_STATE)) {
+ dev_err(dev, "unsupported uwk type=%d\n", inst->type);
+ return ERR_PTR(-EINVAL);
+ }
+
+ return &inst->uwk;
+}
+
+static const struct mtu_wakeup_ops mwk_ops = {
+ .enable = mwk_enable,
+ .disable = mwk_disable,
+ .owner = THIS_MODULE,
+};
+
+static const struct mtk_uwk_pdata mwk_v1_pdata = {
+ .vers = MTK_UWK_V1,
+};
+
+static const struct mtk_uwk_pdata mwk_v2_pdata = {
+ .vers = MTK_UWK_V2,
+};
+
+static const struct of_device_id mwk_id_table[] = {
+ { .compatible = "mediatek,usb-wk-v1", .data = &mwk_v1_pdata },
+ { .compatible = "mediatek,usb-wk-v2", .data = &mwk_v2_pdata },
+ { },
+};
+MODULE_DEVICE_TABLE(of, mwk_id_table);
+
+static int mtk_uwk_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct device_node *np = dev->of_node;
+ struct device_node *child_np;
+ struct mtu_wakeup_provider *provider;
+ struct mtk_uwk *mwk;
+ int index;
+ int ret;
+
+ mwk = devm_kzalloc(dev, sizeof(*mwk), GFP_KERNEL);
+ if (!mwk)
+ return -ENOMEM;
+
+ mwk->data = of_device_get_match_data(dev);
+ if (!mwk->data)
+ return -EINVAL;
+
+ mwk->num_inst = of_get_child_count(np);
+ mwk->inst = devm_kcalloc(dev, mwk->num_inst,
+ sizeof(*mwk->inst), GFP_KERNEL);
+ if (!mwk->inst)
+ return -ENOMEM;
+
+ mwk->dev = dev;
+ platform_set_drvdata(pdev, mwk);
+
+ mwk->wkc = syscon_regmap_lookup_by_phandle(np, "mediatek,wkc");
+ if (IS_ERR(mwk->wkc)) {
+ dev_err(dev, "fail to get mediatek,wkc syscon\n");
+ return PTR_ERR(mwk->wkc);
+ }
+
+ index = 0;
+ for_each_child_of_node(np, child_np) {
+ struct mtk_uwk_instance *inst;
+
+ inst = mwk_inst_create(dev, child_np, &mwk_ops);
+ if (IS_ERR(inst)) {
+ dev_err(dev, "failed to create mwk instance\n");
+ ret = PTR_ERR(inst);
+ goto put_child;
+ }
+
+ mwk->inst[index] = inst;
+ index++;
+ }
+
+ provider = of_uwk_provider_add(dev, mwk_xlate);
+
+ return PTR_ERR_OR_ZERO(provider);
+
+put_child:
+ of_node_put(child_np);
+ return ret;
+}
+
+static int mtk_uwk_remove(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct device_node *np = dev->of_node;
+
+ of_uwk_provider_del(np);
+ return 0;
+}
+
+static struct platform_driver mtk_uwk_drv = {
+ .probe = mtk_uwk_probe,
+ .remove = mtk_uwk_remove,
+ .driver = {
+ .name = "mtk_uwk",
+ .owner = THIS_MODULE,
+ .of_match_table = mwk_id_table,
+ },
+};
+
+module_platform_driver(mtk_uwk_drv);
+MODULE_AUTHOR("Chunfeng Yun <chunfeng.yun@mediatek.com>");
+MODULE_DESCRIPTION("MediaTek USB Wakeup driver");
+MODULE_LICENSE("GPL v2");
diff --git a/include/dt-bindings/soc/mediatek,usb-wakeup.h b/include/dt-bindings/soc/mediatek,usb-wakeup.h
new file mode 100644
index 0000000..2461795
--- /dev/null
+++ b/include/dt-bindings/soc/mediatek,usb-wakeup.h
@@ -0,0 +1,15 @@
+/*
+ * Copyright (c) 2017 MediaTek Inc.
+ * Author: Chunfeng Yun <chunfeng.yun@mediatek.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0
+ *
+ */
+
+#ifndef __DT_BINDINGS_MTK_USB_WK_H__
+#define __DT_BINDINGS_MTK_USB_WK_H__
+
+#define MTU_WK_IP_SLEEP 1
+#define MTU_WK_LINE_STATE 2
+
+#endif
diff --git a/include/linux/soc/mediatek/usb-wakeup.h b/include/linux/soc/mediatek/usb-wakeup.h
new file mode 100644
index 0000000..5697367
--- /dev/null
+++ b/include/linux/soc/mediatek/usb-wakeup.h
@@ -0,0 +1,88 @@
+/*
+ * Copyright (c) 2017 MediaTek Inc.
+ * Author: Chunfeng Yun <chunfeng.yun@mediatek.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0
+ *
+ */
+
+#ifndef __MTK_USB_WAKEUP_H__
+#define __MTK_USB_WAKEUP_H__
+
+#include <linux/device.h>
+#include <linux/err.h>
+#include <linux/mutex.h>
+#include <linux/of.h>
+
+struct mtu_wakeup;
+
+/**
+ * struct mtu_wakeup_ops - set of function pointers for performing
+ * mtu_wakeup operations
+ * @enable: enable a type of usb wakeup when system suspend
+ * @disable: disable a type of usb wakeup when system resume
+ * @owner: the module owner using the ops
+ */
+struct mtu_wakeup_ops {
+ int (*enable)(struct mtu_wakeup *uwk);
+ int (*disable)(struct mtu_wakeup *uwk);
+ struct module *owner;
+};
+
+/**
+ * struct mtu_wakeup - represents the MediaTek USB wakeup device
+ * @parent: the parent device of the mtu_wakeup
+ * @node: associated device tree node
+ * @ops: function pointers for performing mtu_wakeup operations
+ * @mutex: mutex to protect @ops
+ * @count: used to protect when the mtu_wakeup is used by multiple consumers
+ */
+struct mtu_wakeup {
+ struct device *parent;
+ struct device_node *node;
+ const struct mtu_wakeup_ops *ops;
+ struct mutex mutex;
+ int count;
+};
+
+/**
+ * struct mtu_wakeup_provider - represents the mtu_wakeup provider
+ * @dev: the parent device of the mtu_wakeup
+ * @list: to maintain a linked list of mtu_wakeup providers
+ * @of_node: associated device tree node
+ * @of_xlate: function pointer to obtain mtu_wakeup instance from
+ * its tree node
+ */
+struct mtu_wakeup_provider {
+ struct device *dev;
+ struct list_head list;
+ struct device_node *of_node;
+ struct mtu_wakeup *(*of_xlate)(struct device *dev,
+ struct of_phandle_args *args);
+};
+
+#if IS_ENABLED(CONFIG_MTK_UWK)
+struct mtu_wakeup *devm_of_uwk_get_by_index(
+ struct device *dev, struct device_node *np, int index);
+int mtu_wakeup_enable(struct mtu_wakeup *uwk);
+int mtu_wakeup_disable(struct mtu_wakeup *uwk);
+
+#else
+struct mtu_wakeup *devm_of_uwk_get_by_index(
+ struct device *dev, struct device_node *np, int index)
+{
+ return ERR_PTR(-ENODEV);
+}
+
+int mtu_wakeup_enable(struct mtu_wakeup *uwk)
+{
+ return uwk ? -ENODEV : 0;
+}
+
+int mtu_wakeup_disable(struct mtu_wakeup *uwk)
+{
+ return uwk ? -ENODEV : 0;
+}
+#endif
+
+#endif /* __MTK_USB_WAKEUP_H__ */
--
1.9.1
^ permalink raw reply related
* [PATCH 2/7] dt-bindings: soc: mediatek: add bindings document for USB wakeup
From: Chunfeng Yun @ 2017-12-09 8:45 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1512809136-2779-1-git-send-email-chunfeng.yun@mediatek.com>
This adds bindings document for the SSUSB-SPM glue layer driver found
in MediaTek SoCs which is used to support usb remote wakeup.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
---
.../bindings/soc/mediatek/usb-wakeup.txt | 77 ++++++++++++++++++++++
1 file changed, 77 insertions(+)
create mode 100644 Documentation/devicetree/bindings/soc/mediatek/usb-wakeup.txt
diff --git a/Documentation/devicetree/bindings/soc/mediatek/usb-wakeup.txt b/Documentation/devicetree/bindings/soc/mediatek/usb-wakeup.txt
new file mode 100644
index 0000000..313d927
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/mediatek/usb-wakeup.txt
@@ -0,0 +1,77 @@
+MediaTek USB Wakeup binding
+-----------------------------
+
+The SSUSB-SPM glue layer is used to control some signals of USB
+wakeup, such as IP-SLEEP, LINE-STATE, IDDIG etc, which are mutually
+exclusive.
+
+Required properties (controller (parent) node):
+- compatible: Should be one of:
+ - "mediatek,<soc-model>-uwk","mediatek,usb-wk-v1"
+ soc-model is the name of SoC, supports one of:
+ - mt8173, mt8176
+ - "mediatek,<soc-model>-uwk","mediatek,usb-wk-v2"
+ soc-model is the name of SoC, supports one of:
+ - mt2712
+
+- mediatek,wkc: must contain a syscon phandle, such as pericfg controller
+- #address-cells : should be '1'
+- #size-cells : should be '1'
+
+Required nodes: a sub-node is required for each glue layer provided for
+ each SSUSB IP. Address range information including the usual 'reg'
+ property is used inside these nodes to describe the controller's
+ topology.
+
+Required properties (glue layer (child) node):
+- reg: address and length of the register set within the syscon which is
+ assigned to @mediatek,wkc.
+- #mediatek,uwk-cells: should be 1 (see the second example), cell after
+ glue layer phandle is wakeup type from:
+ - MTU_WK_IP_SLEEP
+ - MTU_WK_LINE_STATE
+ The wakeup types defined in
+ - include/dt-bindings/soc/mediatek,usb-wakeup.h
+
+
+Example:
+
+usb_wakeup: uwk at 0 {
+ compatible = "mediatek,mt2712-uwk","mediatek,usb-wk-v2";
+ mediatek,wkc = <&pericfg>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ status = "okay";
+
+ usb_wk0: uwk at 510 {
+ reg = <0x510 0x4>;
+ #mediatek,uwk-cells = <1>;
+ status = "okay";
+ };
+
+ usb_wk1: uwk at 514 {
+ reg = <0x514 0x4>;
+ #mediatek,uwk-cells = <1>;
+ status = "okay";
+ };
+};
+
+
+Specifying wakeup control of devices
+---------------------------------
+
+Device nodes should specify the configuration required in their
+"mediatek,uwks" property, containing a phandle to the glue layer
+node and a wakeup type, because each USB controller has just one
+glue layer for wakeup, so only one phandle is supported;
+
+Example:
+
+#include <dt-bindings/soc/mediatek,usb-wakeup.h>
+
+usb_host1: xhci at 112c0000 {
+ ...
+ mediatek,uwks = <&usb_wk2 MTU_WK_IP_SLEEP>;
+ ...
+};
+
--
1.9.1
^ permalink raw reply related
* [PATCH 3/7] usb: xhci-mtk: use APIs of mtu_wakeup to support remote wakeup
From: Chunfeng Yun @ 2017-12-09 8:45 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1512809136-2779-1-git-send-email-chunfeng.yun@mediatek.com>
On some platforms, there are two xHCI IPs, but the old way of
usb wakeup doesn't support it, so use the new APIs of mtu_wakeup
to support it.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
---
drivers/usb/host/xhci-mtk.c | 39 +++++++++++++++++++++++----------------
drivers/usb/host/xhci-mtk.h | 2 ++
2 files changed, 25 insertions(+), 16 deletions(-)
diff --git a/drivers/usb/host/xhci-mtk.c b/drivers/usb/host/xhci-mtk.c
index b62a1d2..3176a10 100644
--- a/drivers/usb/host/xhci-mtk.c
+++ b/drivers/usb/host/xhci-mtk.c
@@ -19,6 +19,7 @@
#include <linux/pm_runtime.h>
#include <linux/regmap.h>
#include <linux/regulator/consumer.h>
+#include <linux/soc/mediatek/usb-wakeup.h>
#include "xhci.h"
#include "xhci-mtk.h"
@@ -366,7 +367,9 @@ static void usb_wakeup_line_state_dis(struct xhci_hcd_mtk *mtk)
static void usb_wakeup_enable(struct xhci_hcd_mtk *mtk)
{
- if (mtk->wakeup_src == SSUSB_WK_IP_SLEEP)
+ if (mtk->wakeup)
+ mtu_wakeup_enable(mtk->uwk);
+ else if (mtk->wakeup_src == SSUSB_WK_IP_SLEEP)
usb_wakeup_ip_sleep_en(mtk);
else if (mtk->wakeup_src == SSUSB_WK_LINE_STATE)
usb_wakeup_line_state_en(mtk);
@@ -374,7 +377,9 @@ static void usb_wakeup_enable(struct xhci_hcd_mtk *mtk)
static void usb_wakeup_disable(struct xhci_hcd_mtk *mtk)
{
- if (mtk->wakeup_src == SSUSB_WK_IP_SLEEP)
+ if (mtk->wakeup)
+ mtu_wakeup_disable(mtk->uwk);
+ else if (mtk->wakeup_src == SSUSB_WK_IP_SLEEP)
usb_wakeup_ip_sleep_dis(mtk);
else if (mtk->wakeup_src == SSUSB_WK_LINE_STATE)
usb_wakeup_line_state_dis(mtk);
@@ -383,24 +388,26 @@ static void usb_wakeup_disable(struct xhci_hcd_mtk *mtk)
static int usb_wakeup_of_property_parse(struct xhci_hcd_mtk *mtk,
struct device_node *dn)
{
- struct device *dev = mtk->dev;
+ /* try the new way first */
+ mtk->wakeup = of_property_read_bool(dn, "wakeup-source");
+ if (mtk->wakeup) {
+ mtk->uwk = devm_of_uwk_get_by_index(mtk->dev, dn, 0);
+ if (IS_ERR(mtk->uwk))
+ dev_err(mtk->dev, "fail to get uwk\n");
+
+ return PTR_ERR_OR_ZERO(mtk->uwk);
+ }
- /*
- * wakeup function is optional, so it is not an error if this property
- * does not exist, and in such case, no need to get relative
- * properties anymore.
- */
+ /* wakeup function is optional (deprecated, use the new way instead) */
of_property_read_u32(dn, "mediatek,wakeup-src", &mtk->wakeup_src);
- if (!mtk->wakeup_src)
- return 0;
-
- mtk->pericfg = syscon_regmap_lookup_by_phandle(dn,
+ if (mtk->wakeup_src) {
+ mtk->pericfg = syscon_regmap_lookup_by_phandle(dn,
"mediatek,syscon-wakeup");
- if (IS_ERR(mtk->pericfg)) {
- dev_err(dev, "fail to get pericfg regs\n");
- return PTR_ERR(mtk->pericfg);
+ if (IS_ERR(mtk->pericfg)) {
+ dev_err(mtk->dev, "fail to get pericfg regs\n");
+ return PTR_ERR(mtk->pericfg);
+ }
}
-
return 0;
}
diff --git a/drivers/usb/host/xhci-mtk.h b/drivers/usb/host/xhci-mtk.h
index 6b74ce5..95bd6ca 100644
--- a/drivers/usb/host/xhci-mtk.h
+++ b/drivers/usb/host/xhci-mtk.h
@@ -124,6 +124,8 @@ struct xhci_hcd_mtk {
int num_phys;
int wakeup_src;
bool lpm_support;
+ struct mtu_wakeup *uwk;
+ bool wakeup;
};
static inline struct xhci_hcd_mtk *hcd_to_mtk(struct usb_hcd *hcd)
--
1.9.1
^ permalink raw reply related
* [PATCH 4/7] usb: mtu3: use APIs of mtu_wakeup to support remote wakeup
From: Chunfeng Yun @ 2017-12-09 8:45 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1512809136-2779-1-git-send-email-chunfeng.yun@mediatek.com>
On some platforms, there are two SSUSB IPs, but the old way of
usb wakeup doesn't support it, so use the new APIs of mtu_wakeup
to support it.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
---
drivers/usb/mtu3/mtu3.h | 2 ++
drivers/usb/mtu3/mtu3_host.c | 39 +++++++++++++++++++++++----------------
2 files changed, 25 insertions(+), 16 deletions(-)
diff --git a/drivers/usb/mtu3/mtu3.h b/drivers/usb/mtu3/mtu3.h
index 3c888d9..9f3eb79 100644
--- a/drivers/usb/mtu3/mtu3.h
+++ b/drivers/usb/mtu3/mtu3.h
@@ -255,6 +255,8 @@ struct ssusb_mtk {
/* usb wakeup for host mode */
bool wakeup_en;
struct regmap *pericfg;
+ struct mtu_wakeup *uwk;
+ bool new_wakeup;
};
/**
diff --git a/drivers/usb/mtu3/mtu3_host.c b/drivers/usb/mtu3/mtu3_host.c
index 7e948c0..f769b65 100644
--- a/drivers/usb/mtu3/mtu3_host.c
+++ b/drivers/usb/mtu3/mtu3_host.c
@@ -14,6 +14,7 @@
#include <linux/mfd/syscon.h>
#include <linux/of_device.h>
#include <linux/regmap.h>
+#include <linux/soc/mediatek/usb-wakeup.h>
#include "mtu3.h"
#include "mtu3_dr.h"
@@ -56,24 +57,26 @@ static void ssusb_wakeup_ip_sleep_dis(struct ssusb_mtk *ssusb)
int ssusb_wakeup_of_property_parse(struct ssusb_mtk *ssusb,
struct device_node *dn)
{
- struct device *dev = ssusb->dev;
+ /* try the new way first */
+ ssusb->new_wakeup = of_property_read_bool(dn, "wakeup-source");
+ if (ssusb->new_wakeup) {
+ ssusb->uwk = devm_of_uwk_get_by_index(ssusb->dev, dn, 0);
+ if (IS_ERR(ssusb->uwk))
+ dev_err(ssusb->dev, "fail to get mtu_wakeup\n");
+
+ return PTR_ERR_OR_ZERO(ssusb->uwk);
+ }
- /*
- * Wakeup function is optional, so it is not an error if this property
- * does not exist, and in such case, no need to get relative
- * properties anymore.
- */
+ /* Wakeup function is optional. (deprecated, use the new way instead) */
ssusb->wakeup_en = of_property_read_bool(dn, "mediatek,enable-wakeup");
- if (!ssusb->wakeup_en)
- return 0;
-
- ssusb->pericfg = syscon_regmap_lookup_by_phandle(dn,
+ if (ssusb->wakeup_en) {
+ ssusb->pericfg = syscon_regmap_lookup_by_phandle(dn,
"mediatek,syscon-wakeup");
- if (IS_ERR(ssusb->pericfg)) {
- dev_err(dev, "fail to get pericfg regs\n");
- return PTR_ERR(ssusb->pericfg);
+ if (IS_ERR(ssusb->pericfg)) {
+ dev_err(ssusb->dev, "fail to get pericfg regs\n");
+ return PTR_ERR(ssusb->pericfg);
+ }
}
-
return 0;
}
@@ -235,7 +238,9 @@ void ssusb_host_exit(struct ssusb_mtk *ssusb)
int ssusb_wakeup_enable(struct ssusb_mtk *ssusb)
{
- if (ssusb->wakeup_en)
+ if (ssusb->new_wakeup)
+ mtu_wakeup_enable(ssusb->uwk);
+ else if (ssusb->wakeup_en)
ssusb_wakeup_ip_sleep_en(ssusb);
return 0;
@@ -243,6 +248,8 @@ int ssusb_wakeup_enable(struct ssusb_mtk *ssusb)
void ssusb_wakeup_disable(struct ssusb_mtk *ssusb)
{
- if (ssusb->wakeup_en)
+ if (ssusb->new_wakeup)
+ mtu_wakeup_disable(ssusb->uwk);
+ else if (ssusb->wakeup_en)
ssusb_wakeup_ip_sleep_dis(ssusb);
}
--
1.9.1
^ permalink raw reply related
* [PATCH 5/7] dt-bindings: usb: mtk-xhci: add USB wakeup properties
From: Chunfeng Yun @ 2017-12-09 8:45 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1512809136-2779-1-git-send-email-chunfeng.yun@mediatek.com>
Modify the properties of usb wakeup, and use the new way of mtu_wakeup
which is extracted from SSUSB controller dirver as a new one.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
---
.../devicetree/bindings/usb/mediatek,mtk-xhci.txt | 15 +++++++++++----
1 file changed, 11 insertions(+), 4 deletions(-)
diff --git a/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.txt b/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.txt
index 3059596..88984d8 100644
--- a/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.txt
+++ b/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.txt
@@ -35,10 +35,17 @@ Required properties:
- phys : a list of phandle + phy specifier pairs
Optional properties:
- - mediatek,wakeup-src : 1: ip sleep wakeup mode; 2: line state wakeup
- mode;
- - mediatek,syscon-wakeup : phandle to syscon used to access USB wakeup
- control register, it depends on "mediatek,wakeup-src".
+ - mediatek,uwks : a phandle to USB-Wakeup node to control the type of
+ wakeup, it's used to replace the old way which is realized by the
+ property of "mediatek,wakeup-src" and "mediatek,syscon-wakeup",
+ see: Documentation/devicetree/bindings/soc/mediatek/usb-wakeup.txt
+ - wakeup-source : Decides if the new way of USB wakeup is supported or
+ not, it depends on "mediatek,uwks" property.
+ - mediatek,wakeup-src : (deprecated) 1: ip sleep wakeup mode; 2: line
+ state wakeup mode; only supports mt8173 platform, use the property
+ of "mediatek,uwks" instead on other SoCs.
+ - mediatek,syscon-wakeup : (deprecated) phandle to syscon used to access
+ USB wakeup control register, depends on "mediatek,wakeup-src".
- mediatek,u3p-dis-msk : mask to disable u3ports, bit0 for u3port0,
bit1 for u3port1, ... etc;
- vbus-supply : reference to the VBUS regulator;
--
1.9.1
^ permalink raw reply related
* [PATCH 6/7] dt-bindings: usb: mtu3: add USB wakeup properties
From: Chunfeng Yun @ 2017-12-09 8:45 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1512809136-2779-1-git-send-email-chunfeng.yun@mediatek.com>
Modify the properties of usb wakeup, and use the new way of mtu_wakeup
which is extracted from SSUSB controller dirver as a new driver.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
---
Documentation/devicetree/bindings/usb/mediatek,mtu3.txt | 14 +++++++++++---
1 file changed, 11 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/usb/mediatek,mtu3.txt b/Documentation/devicetree/bindings/usb/mediatek,mtu3.txt
index b2271d8..2ed546d 100644
--- a/Documentation/devicetree/bindings/usb/mediatek,mtu3.txt
+++ b/Documentation/devicetree/bindings/usb/mediatek,mtu3.txt
@@ -42,9 +42,17 @@ Optional properties:
- enable-manual-drd : supports manual dual-role switch via debugfs; usually
used when receptacle is TYPE-A and also wants to support dual-role
mode.
- - mediatek,enable-wakeup : supports ip sleep wakeup used by host mode
- - mediatek,syscon-wakeup : phandle to syscon used to access USB wakeup
- control register, it depends on "mediatek,enable-wakeup".
+ - mediatek,uwks : a phandle to USB-Wakeup node to control the type of wakeup,
+ it's used to replace the old way which is realized by the property of
+ "mediatek,wakeup-wakeup" and "mediatek,syscon-wakeup",
+ see: Documentation/devicetree/bindings/soc/mediatek/usb-wakeup.txt
+ - wakeup-source : Decides if the new way of USB wakeup is supported or
+ not, it depends on "mediatek,uwks" property.
+ - mediatek,enable-wakeup : (deprecated) supports ip sleep wakeup used by
+ host mode, only supports mt8173 platform, use the property of
+ "mediatek,uwks" instead on other SoCs.
+ - mediatek,syscon-wakeup : (deprecated) phandle to syscon used to access
+ USB wakeup control register, it depends on "mediatek,enable-wakeup".
- mediatek,u3p-dis-msk : mask to disable u3ports, bit0 for u3port0,
bit1 for u3port1, ... etc;
--
1.9.1
^ permalink raw reply related
* [PATCH 7/7] arm64: dts: mt8173: add uwk node and remove unused usb property
From: Chunfeng Yun @ 2017-12-09 8:45 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1512809136-2779-1-git-send-email-chunfeng.yun@mediatek.com>
Add uwk node for new way of usb remote wakeup instead of old one,
and modify some usb properties according binding documents
of mediatek,mtu3.txt and mediatek,mtk-xhci.txt
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
---
arch/arm64/boot/dts/mediatek/mt8173-evb.dts | 28 ++++++++++++++++++----------
arch/arm64/boot/dts/mediatek/mt8173.dtsi | 16 +++++-----------
2 files changed, 23 insertions(+), 21 deletions(-)
diff --git a/arch/arm64/boot/dts/mediatek/mt8173-evb.dts b/arch/arm64/boot/dts/mediatek/mt8173-evb.dts
index 1c3634f..08a323b 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173-evb.dts
+++ b/arch/arm64/boot/dts/mediatek/mt8173-evb.dts
@@ -14,6 +14,7 @@
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/soc/mediatek,usb-wakeup.h>
#include "mt8173.dtsi"
/ {
@@ -68,6 +69,20 @@
gpio = <&pio 9 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
+
+ usb_wakeup: uwk at 0 {
+ compatible = "mediatek,mt8173-uwk","mediatek,usb-wk-v1";
+ mediatek,wkc = <&pericfg>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ status = "okay";
+
+ usb_wk0: uwk at 400 {
+ reg = <0x400 0x8>;
+ #mediatek,uwk-cells = <1>;
+ status = "okay";
+ };
+ };
};
&cec {
@@ -268,12 +283,6 @@
};
};
- usb_id_pins_ground: usb_iddig_pull_down {
- pins_iddig {
- pinmux = <MT8173_PIN_16_IDDIG__FUNC_IDDIG>;
- bias-pull-down;
- };
- };
};
&pwm0 {
@@ -501,15 +510,14 @@
};
&ssusb {
+ mediatek,uwks = <&usb_wk0 MTU_WK_IP_SLEEP>;
vusb33-supply = <&mt6397_vusb_reg>;
vbus-supply = <&usb_p0_vbus>;
extcon = <&extcon_usb>;
dr_mode = "otg";
- mediatek,enable-wakeup;
- pinctrl-names = "default", "id_float", "id_ground";
+ wakeup-source;
+ pinctrl-names = "default";
pinctrl-0 = <&usb_id_pins_float>;
- pinctrl-1 = <&usb_id_pins_float>;
- pinctrl-2 = <&usb_id_pins_ground>;
status = "okay";
};
diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index 26396ef..818ead7 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -722,7 +722,7 @@
};
ssusb: usb at 11271000 {
- compatible = "mediatek,mt8173-mtu3";
+ compatible = "mediatek,mt8173-mtu3", "mediatek,mtu3";
reg = <0 0x11271000 0 0x3000>,
<0 0x11280700 0 0x0100>;
reg-names = "mac", "ippc";
@@ -731,22 +731,16 @@
<&u3port0 PHY_TYPE_USB3>,
<&u2port1 PHY_TYPE_USB2>;
power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>;
- clocks = <&topckgen CLK_TOP_USB30_SEL>,
- <&clk26m>,
- <&pericfg CLK_PERI_USB0>,
- <&pericfg CLK_PERI_USB1>;
- clock-names = "sys_ck",
- "ref_ck",
- "wakeup_deb_p0",
- "wakeup_deb_p1";
- mediatek,syscon-wakeup = <&pericfg>;
+ clocks = <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>;
+ clock-names = "sys_ck", "ref_ck";
#address-cells = <2>;
#size-cells = <2>;
ranges;
status = "disabled";
usb_host: xhci at 11270000 {
- compatible = "mediatek,mt8173-xhci";
+ compatible = "mediatek,mt8173-xhci",
+ "mediatek,mtk-xhci";
reg = <0 0x11270000 0 0x1000>;
reg-names = "mac";
interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_LOW>;
--
1.9.1
^ permalink raw reply related
* [clk:clk-next 32/61] ERROR: "clk_alpha_pll_regs" [drivers/clk/qcom/mmcc-msm8996.ko] undefined!
From: kbuild test robot @ 2017-12-09 11:02 UTC (permalink / raw)
To: linux-arm-kernel
tree: https://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git clk-next
head: 3279e463717f719f7dc16c9fc39fb0bad43b574e
commit: d1506b749e92056b72d9b93f606adb6a4f229ac2 [32/61] clk: qcom: support for alpha pll properties
config: i386-allmodconfig (attached as .config)
compiler: gcc-7 (Debian 7.2.0-12) 7.2.1 20171025
reproduce:
git checkout d1506b749e92056b72d9b93f606adb6a4f229ac2
# save the attached .config to linux build tree
make ARCH=i386
All errors (new ones prefixed by >>):
WARNING: modpost: missing MODULE_LICENSE() in drivers/auxdisplay/img-ascii-lcd.o
see include/linux/module.h for more information
WARNING: modpost: missing MODULE_LICENSE() in drivers/gpio/gpio-ath79.o
see include/linux/module.h for more information
WARNING: modpost: missing MODULE_LICENSE() in drivers/gpio/gpio-iop.o
see include/linux/module.h for more information
WARNING: modpost: missing MODULE_LICENSE() in drivers/iio/accel/kxsd9-i2c.o
see include/linux/module.h for more information
WARNING: modpost: missing MODULE_LICENSE() in drivers/iio/adc/qcom-vadc-common.o
see include/linux/module.h for more information
WARNING: modpost: missing MODULE_LICENSE() in drivers/media/platform/mtk-vcodec/mtk-vcodec-common.o
see include/linux/module.h for more information
WARNING: modpost: missing MODULE_LICENSE() in drivers/media/platform/soc_camera/soc_scale_crop.o
see include/linux/module.h for more information
WARNING: modpost: missing MODULE_LICENSE() in drivers/media/platform/tegra-cec/tegra_cec.o
see include/linux/module.h for more information
WARNING: modpost: missing MODULE_LICENSE() in drivers/mtd/nand/denali_pci.o
see include/linux/module.h for more information
WARNING: modpost: missing MODULE_LICENSE() in drivers/net/ethernet/cirrus/cs89x0.o
see include/linux/module.h for more information
WARNING: modpost: missing MODULE_LICENSE() in drivers/pinctrl/pxa/pinctrl-pxa2xx.o
see include/linux/module.h for more information
WARNING: modpost: missing MODULE_LICENSE() in drivers/power/reset/zx-reboot.o
see include/linux/module.h for more information
WARNING: modpost: missing MODULE_LICENSE() in drivers/staging/comedi/drivers/ni_atmio.o
see include/linux/module.h for more information
WARNING: modpost: missing MODULE_LICENSE() in sound/soc/codecs/snd-soc-pcm512x-spi.o
see include/linux/module.h for more information
>> ERROR: "clk_alpha_pll_regs" [drivers/clk/qcom/mmcc-msm8996.ko] undefined!
>> ERROR: "clk_alpha_pll_regs" [drivers/clk/qcom/gcc-msm8996.ko] undefined!
>> ERROR: "clk_alpha_pll_regs" [drivers/clk/qcom/gcc-msm8994.ko] undefined!
>> ERROR: "clk_alpha_pll_regs" [drivers/clk/qcom/gcc-ipq8074.ko] undefined!
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
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^ permalink raw reply
* [PATCH V3 0/2] ARM: dts: bcm283x: Fix probing of bcm2835-i2s
From: Stefan Wahren @ 2017-12-09 11:26 UTC (permalink / raw)
To: linux-arm-kernel
This small series fixes the probing of bcm2835-i2s, which is broken
since 517e7a1537a ("ASoC: bcm2835: move to use the clock framework").
Changes in V3:
* split up patch into dt-binding and functional part
Changes in V2:
* add Fixes, Reviewed-by and Tested-by tags
Stefan Wahren (2):
dt-bindings: bcm283x: Fix register ranges of bcm2835-i2s
ARM: dts: bcm283x: Fix probing of bcm2835-i2s
Documentation/devicetree/bindings/dma/brcm,bcm2835-dma.txt | 4 ++--
Documentation/devicetree/bindings/sound/brcm,bcm2835-i2s.txt | 9 ++++-----
arch/arm/boot/dts/bcm283x.dtsi | 4 ++--
3 files changed, 8 insertions(+), 9 deletions(-)
--
2.7.4
^ permalink raw reply
* [PATCH V3 1/2] dt-bindings: bcm283x: Fix register ranges of bcm2835-i2s
From: Stefan Wahren @ 2017-12-09 11:26 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1512818795-1441-1-git-send-email-stefan.wahren@i2se.com>
Since 517e7a1537a ("ASoC: bcm2835: move to use the clock framework")
the bcm2835-i2s requires a clock as DT property. Unfortunately
the necessary DT change has never been applied. While we are at it
also fix the first PCM register range to cover the PCM_GRAY register.
This patch only fixes the affected dt-bindings.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
---
Documentation/devicetree/bindings/dma/brcm,bcm2835-dma.txt | 4 ++--
Documentation/devicetree/bindings/sound/brcm,bcm2835-i2s.txt | 9 ++++-----
2 files changed, 6 insertions(+), 7 deletions(-)
diff --git a/Documentation/devicetree/bindings/dma/brcm,bcm2835-dma.txt b/Documentation/devicetree/bindings/dma/brcm,bcm2835-dma.txt
index baf9b34..b6a8cc0 100644
--- a/Documentation/devicetree/bindings/dma/brcm,bcm2835-dma.txt
+++ b/Documentation/devicetree/bindings/dma/brcm,bcm2835-dma.txt
@@ -74,8 +74,8 @@ Example:
bcm2835_i2s: i2s at 7e203000 {
compatible = "brcm,bcm2835-i2s";
- reg = < 0x7e203000 0x20>,
- < 0x7e101098 0x02>;
+ reg = < 0x7e203000 0x24>;
+ clocks = <&clocks BCM2835_CLOCK_PCM>;
dmas = <&dma 2>,
<&dma 3>;
diff --git a/Documentation/devicetree/bindings/sound/brcm,bcm2835-i2s.txt b/Documentation/devicetree/bindings/sound/brcm,bcm2835-i2s.txt
index 65783de..7bb0362 100644
--- a/Documentation/devicetree/bindings/sound/brcm,bcm2835-i2s.txt
+++ b/Documentation/devicetree/bindings/sound/brcm,bcm2835-i2s.txt
@@ -2,9 +2,8 @@
Required properties:
- compatible: "brcm,bcm2835-i2s"
-- reg: A list of base address and size entries:
- * The first entry should cover the PCM registers
- * The second entry should cover the PCM clock registers
+- reg: Should contain PCM registers location and length.
+- clocks: the (PCM) clock to use
- dmas: List of DMA controller phandle and DMA request line ordered pairs.
- dma-names: Identifier string for each DMA request line in the dmas property.
These strings correspond 1:1 with the ordered pairs in dmas.
@@ -16,8 +15,8 @@ Example:
bcm2835_i2s: i2s at 7e203000 {
compatible = "brcm,bcm2835-i2s";
- reg = <0x7e203000 0x20>,
- <0x7e101098 0x02>;
+ reg = <0x7e203000 0x24>;
+ clocks = <&clocks BCM2835_CLOCK_PCM>;
dmas = <&dma 2>,
<&dma 3>;
--
2.7.4
^ permalink raw reply related
* [PATCH V3 2/2] ARM: dts: bcm283x: Fix probing of bcm2835-i2s
From: Stefan Wahren @ 2017-12-09 11:26 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1512818795-1441-1-git-send-email-stefan.wahren@i2se.com>
Since 517e7a1537a ("ASoC: bcm2835: move to use the clock framework")
the bcm2835-i2s requires a clock as DT property. Unfortunately
the necessary DT change has never been applied. While we are at it
also fix the first PCM register range to cover the PCM_GRAY register.
Fixes: 517e7a1537a ("ASoC: bcm2835: move to use the clock framework")
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Matthias Reichl <hias@horus.com>
---
arch/arm/boot/dts/bcm283x.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi
index 013431e..e08203c 100644
--- a/arch/arm/boot/dts/bcm283x.dtsi
+++ b/arch/arm/boot/dts/bcm283x.dtsi
@@ -396,8 +396,8 @@
i2s: i2s at 7e203000 {
compatible = "brcm,bcm2835-i2s";
- reg = <0x7e203000 0x20>,
- <0x7e101098 0x02>;
+ reg = <0x7e203000 0x24>;
+ clocks = <&clocks BCM2835_CLOCK_PCM>;
dmas = <&dma 2>,
<&dma 3>;
--
2.7.4
^ permalink raw reply related
* [PATCH v2] net: ethernet: arc: fix error handling in emac_rockchip_probe
From: Branislav Radocaj @ 2017-12-09 11:51 UTC (permalink / raw)
To: linux-arm-kernel
If clk_set_rate() fails, we should disable clk before return.
Found by Linux Driver Verification project (linuxtesting.org).
Signed-off-by: Branislav Radocaj <branislav@radocaj.org>
---
Changes since v2:
* Improved inconsistent failure handling of clock rate setting
* For completeness of usecase, added arc_emac_probe error handling
---
drivers/net/ethernet/arc/emac_rockchip.c | 13 ++++++++++---
1 file changed, 10 insertions(+), 3 deletions(-)
diff --git a/drivers/net/ethernet/arc/emac_rockchip.c b/drivers/net/ethernet/arc/emac_rockchip.c
index e278e3d96ee0..16f9bee992fe 100644
--- a/drivers/net/ethernet/arc/emac_rockchip.c
+++ b/drivers/net/ethernet/arc/emac_rockchip.c
@@ -199,9 +199,11 @@ static int emac_rockchip_probe(struct platform_device *pdev)
/* RMII interface needs always a rate of 50MHz */
err = clk_set_rate(priv->refclk, 50000000);
- if (err)
+ if (err) {
dev_err(dev,
"failed to change reference clock rate (%d)\n", err);
+ goto out_regulator_disable;
+ }
if (priv->soc_data->need_div_macclk) {
priv->macclk = devm_clk_get(dev, "macclk");
@@ -220,19 +222,24 @@ static int emac_rockchip_probe(struct platform_device *pdev)
/* RMII TX/RX needs always a rate of 25MHz */
err = clk_set_rate(priv->macclk, 25000000);
- if (err)
+ if (err) {
dev_err(dev,
"failed to change mac clock rate (%d)\n", err);
+ goto out_clk_disable_macclk;
+ }
}
err = arc_emac_probe(ndev, interface);
if (err) {
dev_err(dev, "failed to probe arc emac (%d)\n", err);
- goto out_regulator_disable;
+ goto out_clk_disable_macclk;
}
return 0;
+out_clk_disable_macclk:
+ if (priv->soc_data->need_div_macclk)
+ clk_disable_unprepare(priv->macclk);
out_regulator_disable:
if (priv->regulator)
regulator_disable(priv->regulator);
--
2.11.0
^ permalink raw reply related
* [PATCH V3] ACPI / GED: unregister interrupts during shutdown
From: Rafael J. Wysocki @ 2017-12-09 14:12 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <158410c8-2861-a2c9-1246-9604ab9a8e91@codeaurora.org>
On Sat, Dec 9, 2017 at 2:54 AM, Sinan Kaya <okaya@codeaurora.org> wrote:
> On 12/8/2017 8:54 AM, Rafael J. Wysocki wrote:
>>> static int ged_remove(struct platform_device *pdev)
>>> +{
>>> + struct acpi_ged_device *geddev = platform_get_drvdata(pdev);
>>>
>>> + ged_cleanup_irq(geddev);
>> Do you really need this duplication? You may as well call
>> ged_shutdown() from here.
>>
>> And the local variable is redundant too.
>>
>> I guess it would be better to just fold ged_cleanup_irq() into
>> ged_shutdown() and call that from ged_remove().
>>
>
> I originally tried to make these two APIs as common as possible and tried
> calling shutdown from remove. However, the calling convention of shutdown
> and remove are different.
Look at the code in your patch: ged_shutdown() does exactly the same
things as ged_remove(), except that ged_remove() returns 0 in addition
to that, so you can do it this way:
static int int ged_remove(struct platform_device *pdev)
{
ged_shutdown(pdev);
return 0;
}
Why wouldn't that work?
> Shutdown returns void; whereas, remove returns an integer. That's why, I
> created a common function and called from both places.
>
> I can probably make the calling parameter of ged_cleanup_irq() a pdev and
> get rid of the additional casting in these two different functions.
>
> Let me know if you have a better idea.
And with the above, you can fold your ged_cleanup_irq() into
ged_shutdown(), can't you?
^ permalink raw reply
* [PATCH] arm64: v8.4: Support for new floating point multiplication variant
From: Dongjiu Geng @ 2017-12-09 15:11 UTC (permalink / raw)
To: linux-arm-kernel
ARM v8.4 extensions include support for new floating point
multiplication variant instructions to the AArch64 SIMD
instructions set. Let the userspace know about it via a
HWCAP bit and MRS emulation.
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Dongjiu Geng <gengdongjiu@huawei.com>
---
My platform supports this feature, so I need to add it.
---
Documentation/arm64/cpu-feature-registers.txt | 4 +++-
arch/arm64/include/asm/sysreg.h | 1 +
arch/arm64/include/uapi/asm/hwcap.h | 1 +
arch/arm64/kernel/cpufeature.c | 2 ++
arch/arm64/kernel/cpuinfo.c | 1 +
5 files changed, 8 insertions(+), 1 deletion(-)
diff --git a/Documentation/arm64/cpu-feature-registers.txt b/Documentation/arm64/cpu-feature-registers.txt
index bd9b3fa..a70090b 100644
--- a/Documentation/arm64/cpu-feature-registers.txt
+++ b/Documentation/arm64/cpu-feature-registers.txt
@@ -110,7 +110,9 @@ infrastructure:
x--------------------------------------------------x
| Name | bits | visible |
|--------------------------------------------------|
- | RES0 | [63-48] | n |
+ | RES0 | [63-52] | n |
+ |--------------------------------------------------|
+ | FHM | [51-48] | y |
|--------------------------------------------------|
| DP | [47-44] | y |
|--------------------------------------------------|
diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index 08cc885..1818077 100644
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -419,6 +419,7 @@
#define SCTLR_EL1_CP15BEN (1 << 5)
/* id_aa64isar0 */
+#define ID_AA64ISAR0_FHM_SHIFT 48
#define ID_AA64ISAR0_DP_SHIFT 44
#define ID_AA64ISAR0_SM4_SHIFT 40
#define ID_AA64ISAR0_SM3_SHIFT 36
diff --git a/arch/arm64/include/uapi/asm/hwcap.h b/arch/arm64/include/uapi/asm/hwcap.h
index cda76fa..f018c3d 100644
--- a/arch/arm64/include/uapi/asm/hwcap.h
+++ b/arch/arm64/include/uapi/asm/hwcap.h
@@ -43,5 +43,6 @@
#define HWCAP_ASIMDDP (1 << 20)
#define HWCAP_SHA512 (1 << 21)
#define HWCAP_SVE (1 << 22)
+#define HWCAP_ASIMDFHM (1 << 23)
#endif /* _UAPI__ASM_HWCAP_H */
diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
index c5ba009..bc7e707 100644
--- a/arch/arm64/kernel/cpufeature.c
+++ b/arch/arm64/kernel/cpufeature.c
@@ -123,6 +123,7 @@ static int __init register_cpu_hwcaps_dumper(void)
* sync with the documentation of the CPU feature register ABI.
*/
static const struct arm64_ftr_bits ftr_id_aa64isar0[] = {
+ ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR0_FHM_SHIFT, 4, 0),
ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR0_DP_SHIFT, 4, 0),
ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR0_SM4_SHIFT, 4, 0),
ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR0_SM3_SHIFT, 4, 0),
@@ -991,6 +992,7 @@ static bool has_no_fpsimd(const struct arm64_cpu_capabilities *entry, int __unus
HWCAP_CAP(SYS_ID_AA64ISAR0_EL1, ID_AA64ISAR0_SM3_SHIFT, FTR_UNSIGNED, 1, CAP_HWCAP, HWCAP_SM3),
HWCAP_CAP(SYS_ID_AA64ISAR0_EL1, ID_AA64ISAR0_SM4_SHIFT, FTR_UNSIGNED, 1, CAP_HWCAP, HWCAP_SM4),
HWCAP_CAP(SYS_ID_AA64ISAR0_EL1, ID_AA64ISAR0_DP_SHIFT, FTR_UNSIGNED, 1, CAP_HWCAP, HWCAP_ASIMDDP),
+ HWCAP_CAP(SYS_ID_AA64ISAR0_EL1, ID_AA64ISAR0_FHM_SHIFT, FTR_UNSIGNED, 1, CAP_HWCAP, HWCAP_ASIMDFHM),
HWCAP_CAP(SYS_ID_AA64PFR0_EL1, ID_AA64PFR0_FP_SHIFT, FTR_SIGNED, 0, CAP_HWCAP, HWCAP_FP),
HWCAP_CAP(SYS_ID_AA64PFR0_EL1, ID_AA64PFR0_FP_SHIFT, FTR_SIGNED, 1, CAP_HWCAP, HWCAP_FPHP),
HWCAP_CAP(SYS_ID_AA64PFR0_EL1, ID_AA64PFR0_ASIMD_SHIFT, FTR_SIGNED, 0, CAP_HWCAP, HWCAP_ASIMD),
diff --git a/arch/arm64/kernel/cpuinfo.c b/arch/arm64/kernel/cpuinfo.c
index 1e25545..7f94623 100644
--- a/arch/arm64/kernel/cpuinfo.c
+++ b/arch/arm64/kernel/cpuinfo.c
@@ -76,6 +76,7 @@
"asimddp",
"sha512",
"sve",
+ "asimdfhm",
NULL
};
--
1.9.1
^ permalink raw reply related
* [RESEND PATCH] arm64: v8.4: Support for new floating point multiplication variant
From: Dongjiu Geng @ 2017-12-09 15:28 UTC (permalink / raw)
To: linux-arm-kernel
ARM v8.4 extensions include support for new floating point
multiplication variant instructions to the AArch64 SIMD
instructions set. Let the userspace know about it via a
HWCAP bit and MRS emulation.
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Dongjiu Geng <gengdongjiu@huawei.com>
---
My platform supports this feature, so I need to add it.
---
Documentation/arm64/cpu-feature-registers.txt | 4 +++-
arch/arm64/include/asm/sysreg.h | 1 +
arch/arm64/include/uapi/asm/hwcap.h | 1 +
arch/arm64/kernel/cpufeature.c | 2 ++
arch/arm64/kernel/cpuinfo.c | 1 +
5 files changed, 8 insertions(+), 1 deletion(-)
diff --git a/Documentation/arm64/cpu-feature-registers.txt b/Documentation/arm64/cpu-feature-registers.txt
index bd9b3fa..a70090b 100644
--- a/Documentation/arm64/cpu-feature-registers.txt
+++ b/Documentation/arm64/cpu-feature-registers.txt
@@ -110,7 +110,9 @@ infrastructure:
x--------------------------------------------------x
| Name | bits | visible |
|--------------------------------------------------|
- | RES0 | [63-48] | n |
+ | RES0 | [63-52] | n |
+ |--------------------------------------------------|
+ | FHM | [51-48] | y |
|--------------------------------------------------|
| DP | [47-44] | y |
|--------------------------------------------------|
diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index 08cc885..1818077 100644
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -419,6 +419,7 @@
#define SCTLR_EL1_CP15BEN (1 << 5)
/* id_aa64isar0 */
+#define ID_AA64ISAR0_FHM_SHIFT 48
#define ID_AA64ISAR0_DP_SHIFT 44
#define ID_AA64ISAR0_SM4_SHIFT 40
#define ID_AA64ISAR0_SM3_SHIFT 36
diff --git a/arch/arm64/include/uapi/asm/hwcap.h b/arch/arm64/include/uapi/asm/hwcap.h
index cda76fa..f018c3d 100644
--- a/arch/arm64/include/uapi/asm/hwcap.h
+++ b/arch/arm64/include/uapi/asm/hwcap.h
@@ -43,5 +43,6 @@
#define HWCAP_ASIMDDP (1 << 20)
#define HWCAP_SHA512 (1 << 21)
#define HWCAP_SVE (1 << 22)
+#define HWCAP_ASIMDFHM (1 << 23)
#endif /* _UAPI__ASM_HWCAP_H */
diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
index c5ba009..bc7e707 100644
--- a/arch/arm64/kernel/cpufeature.c
+++ b/arch/arm64/kernel/cpufeature.c
@@ -123,6 +123,7 @@ static int __init register_cpu_hwcaps_dumper(void)
* sync with the documentation of the CPU feature register ABI.
*/
static const struct arm64_ftr_bits ftr_id_aa64isar0[] = {
+ ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR0_FHM_SHIFT, 4, 0),
ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR0_DP_SHIFT, 4, 0),
ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR0_SM4_SHIFT, 4, 0),
ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR0_SM3_SHIFT, 4, 0),
@@ -991,6 +992,7 @@ static bool has_no_fpsimd(const struct arm64_cpu_capabilities *entry, int __unus
HWCAP_CAP(SYS_ID_AA64ISAR0_EL1, ID_AA64ISAR0_SM3_SHIFT, FTR_UNSIGNED, 1, CAP_HWCAP, HWCAP_SM3),
HWCAP_CAP(SYS_ID_AA64ISAR0_EL1, ID_AA64ISAR0_SM4_SHIFT, FTR_UNSIGNED, 1, CAP_HWCAP, HWCAP_SM4),
HWCAP_CAP(SYS_ID_AA64ISAR0_EL1, ID_AA64ISAR0_DP_SHIFT, FTR_UNSIGNED, 1, CAP_HWCAP, HWCAP_ASIMDDP),
+ HWCAP_CAP(SYS_ID_AA64ISAR0_EL1, ID_AA64ISAR0_FHM_SHIFT, FTR_UNSIGNED, 1, CAP_HWCAP, HWCAP_ASIMDFHM),
HWCAP_CAP(SYS_ID_AA64PFR0_EL1, ID_AA64PFR0_FP_SHIFT, FTR_SIGNED, 0, CAP_HWCAP, HWCAP_FP),
HWCAP_CAP(SYS_ID_AA64PFR0_EL1, ID_AA64PFR0_FP_SHIFT, FTR_SIGNED, 1, CAP_HWCAP, HWCAP_FPHP),
HWCAP_CAP(SYS_ID_AA64PFR0_EL1, ID_AA64PFR0_ASIMD_SHIFT, FTR_SIGNED, 0, CAP_HWCAP, HWCAP_ASIMD),
diff --git a/arch/arm64/kernel/cpuinfo.c b/arch/arm64/kernel/cpuinfo.c
index 1e25545..7f94623 100644
--- a/arch/arm64/kernel/cpuinfo.c
+++ b/arch/arm64/kernel/cpuinfo.c
@@ -76,6 +76,7 @@
"asimddp",
"sha512",
"sve",
+ "asimdfhm",
NULL
};
--
1.9.1
^ permalink raw reply related
* 4.15-rc2 crash on RPi2 in teardown_hyp_mode()
From: Marc Zyngier @ 2017-12-09 16:33 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <d0168f56-cb8e-add8-5fd0-18599af13886@suse.de>
On Sat, 09 Dec 2017 15:48:05 +0000,
Andreas F?rber wrote:
>
> [1 <text/plain; utf-8 (8bit)>]
> Hi,
>
> Am 06.12.2017 um 15:11 schrieb Andre Przywara:
> > while trying to boot 4.15-rc1 on my Calxeda Midway I observed a crash
> [snip]
>
> I'm seeing a possibly related crash in 4.15-rc2 on Raspberry Pi 2.
> Using its 4.15-rc2 dtb I see a ton of timer interrupt errors (attached)
> and then KVM runs into an error in unmap_hyp_range():
>
> [ 3.974575] kvm [1]: 8-bit VMID
> [ 3.977734] kvm [1]: IDMAP page: 401000
> [ 3.981632] kvm [1]: HYP VA range: c0000000:ffffffff
> [ 3.987575] kvm [1]: Invalid trigger for IRQ19, assuming level low
> [ 3.993864] kvm [1]: kvm_arch_timer: error setting vcpu affinity
> [ 4.000174] Unable to handle kernel paging request at virtual address
> ae46a000
> [ 4.007470] pgd = 6db59d0e
> [ 4.010206] [ae46a000] *pgd=80000000306003, *pmd=00000000
> [ 4.015666] Internal error: Oops: 206 [#1] PREEMPT SMP ARM
> [ 4.021181] Modules linked in:
> [ 4.024259] CPU: 1 PID: 1 Comm: swapper/0 Not tainted
> 4.15.0-rc2-2.gef715eb-lpae #1
> [ 4.031955] Hardware name: BCM2835
> [ 4.035373] task: 27c0e1b0 task.stack: 6730d7bc
> [ 4.039936] PC is at unmap_hyp_range+0x130/0x414
> [ 4.044580] LR is at 0x40000000
> [...]
> [ 4.273820] [<c0425b0c>] (unmap_hyp_range) from [<c0427728>]
> (free_hyp_pgds+0x10c/0x18c)
> [ 4.281965] [<c0427728>] (free_hyp_pgds) from [<c0423338>]
> (teardown_hyp_mode+0x28/0x84)
> [ 4.290109] [<c0423338>] (teardown_hyp_mode) from [<c04256b0>]
> (kvm_arch_init+0x324/0x52c)
>
> 4.14.3 boots fine on RPi2 with the same dtb.
> 4.15-rc2 boots fine on RPi3 with its latest dtb.
>
> I'm assuming there's two bugs here, one in the RPi2 dts for the
No. Or rather, the RPi bug is to lack a GIC altogether.
> arch_timer and that error triggering Andre's kvm teardown bug that
> hopefully will be fixed with Marc's patch.
Only you can tell. You'll probably need both of these patches:
https://lists.cs.columbia.edu/pipermail/kvmarm/2017-December/028864.html
https://lists.cs.columbia.edu/pipermail/kvmarm/2017-December/028865.html
M.
--
Jazz is not dead, it just smell funny.
^ permalink raw reply
* [PATCH v2 01/36] KVM: arm64: Avoid storing the vcpu pointer on the stack
From: Marc Zyngier @ 2017-12-09 17:19 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171207170630.592-2-christoffer.dall@linaro.org>
On Thu, 07 Dec 2017 17:05:55 +0000,
Christoffer Dall wrote:
>
> We already have the percpu area for the host cpu state, which points to
> the VCPU, so there's no need to store the VCPU pointer on the stack on
> every context switch. We can be a little more clever and just use
> tpidr_el2 for the percpu offset and load the VCPU pointer from the host
> context.
>
> This does require us to calculate the percpu offset without including
> the offset from the kernel mapping of the percpu array to the linaro
"linaro"?
> mapping of the array (which is what we store in tpidr_el1), because a
> PC-relative generated address in EL2 is already giving us the hyp alias
> of the linear mapping of a kernel address. We do this in
> __cpu_init_hyp_mode() by using kvm_ksym_ref().
>
> This change also requires us to have a scratch register, so we take the
> chance to rearrange some of the el1_sync code to only look at the
> vttbr_el2 to determine if this is a trap from the guest or an HVC from
> the host. We do add an extra check to call the panic code if the kernel
> is configured with debugging enabled and we saw a trap from the host
> which wasn't an HVC, indicating that we left some EL2 trap configured by
> mistake.
>
> The code that accesses ESR_EL2 was previously using an alternative to
> use the _EL1 accessor on VHE systems, but this was actually unnecessary
> as the _EL1 accessor aliases the ESR_EL2 register on VHE, and the _EL2
> accessor does the same thing on both systems.
>
> Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
> ---
>
> Notes:
> Changes since v1:
> - Use PC-relative addressing to access per-cpu variables instead of
> using a load from the literal pool.
> - Remove stale comments as pointed out by Marc
> - Reworded the commit message as suggested by Drew
>
> arch/arm64/include/asm/kvm_asm.h | 15 ++++++++++++++
> arch/arm64/include/asm/kvm_host.h | 15 ++++++++++++++
> arch/arm64/kernel/asm-offsets.c | 1 +
> arch/arm64/kvm/hyp/entry.S | 6 +-----
> arch/arm64/kvm/hyp/hyp-entry.S | 41 ++++++++++++++++++---------------------
> arch/arm64/kvm/hyp/switch.c | 5 +----
> arch/arm64/kvm/hyp/sysreg-sr.c | 5 +++++
> 7 files changed, 57 insertions(+), 31 deletions(-)
>
> diff --git a/arch/arm64/include/asm/kvm_asm.h b/arch/arm64/include/asm/kvm_asm.h
> index ab4d0a926043..33e0edc6f8be 100644
> --- a/arch/arm64/include/asm/kvm_asm.h
> +++ b/arch/arm64/include/asm/kvm_asm.h
> @@ -33,6 +33,7 @@
> #define KVM_ARM64_DEBUG_DIRTY_SHIFT 0
> #define KVM_ARM64_DEBUG_DIRTY (1 << KVM_ARM64_DEBUG_DIRTY_SHIFT)
>
> +/* Translate a kernel address of @sym into its equivalent linear mapping */
> #define kvm_ksym_ref(sym) \
> ({ \
> void *val = &sym; \
> @@ -70,4 +71,18 @@ extern u32 __init_stage2_translation(void);
>
> #endif
>
> +#ifdef __ASSEMBLY__
You could turn this and the previous #endif into a simple #else.
> +.macro get_host_ctxt reg, tmp
> + adr_l \reg, kvm_host_cpu_state
> + mrs \tmp, tpidr_el2
> + add \reg, \reg, \tmp
> +.endm
> +
> +.macro get_vcpu vcpu, ctxt
> + ldr \vcpu, [\ctxt, #HOST_CONTEXT_VCPU]
> + kern_hyp_va \vcpu
> +.endm
> +
> +#endif
> +
> #endif /* __ARM_KVM_ASM_H__ */
> diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h
> index 7ee72b402907..af58deb6ec3c 100644
> --- a/arch/arm64/include/asm/kvm_host.h
> +++ b/arch/arm64/include/asm/kvm_host.h
> @@ -348,10 +348,15 @@ int kvm_perf_teardown(void);
>
> struct kvm_vcpu *kvm_mpidr_to_vcpu(struct kvm *kvm, unsigned long mpidr);
>
> +extern void __kvm_set_tpidr_el2(u64 tpidr_el2);
Is there any advantage in having this prototype in kvm_host.h, instead
of putting it in kvm_hyp.h (which feels more appropriate)?
> +DECLARE_PER_CPU(kvm_cpu_context_t, kvm_host_cpu_state);
> +
> static inline void __cpu_init_hyp_mode(phys_addr_t pgd_ptr,
> unsigned long hyp_stack_ptr,
> unsigned long vector_ptr)
> {
> + u64 tpidr_el2;
> +
> /*
> * Call initialization code, and switch to the full blown HYP code.
> * If the cpucaps haven't been finalized yet, something has gone very
> @@ -360,6 +365,16 @@ static inline void __cpu_init_hyp_mode(phys_addr_t pgd_ptr,
> */
> BUG_ON(!static_branch_likely(&arm64_const_caps_ready));
> __kvm_call_hyp((void *)pgd_ptr, hyp_stack_ptr, vector_ptr);
> +
> + /*
> + * Calculate the raw per-cpu offset without a translation from the
> + * kernel's mapping to the linear mapping, and store it in tpidr_el2
> + * so that we can use adr_l to access per-cpu variables in EL2.
> + */
> + tpidr_el2 = (u64)this_cpu_ptr(&kvm_host_cpu_state)
> + - (u64)kvm_ksym_ref(kvm_host_cpu_state);
> +
> + kvm_call_hyp(__kvm_set_tpidr_el2, tpidr_el2);
> }
>
> static inline void kvm_arch_hardware_unsetup(void) {}
> diff --git a/arch/arm64/kernel/asm-offsets.c b/arch/arm64/kernel/asm-offsets.c
> index 71bf088f1e4b..612021dce84f 100644
> --- a/arch/arm64/kernel/asm-offsets.c
> +++ b/arch/arm64/kernel/asm-offsets.c
> @@ -135,6 +135,7 @@ int main(void)
> DEFINE(CPU_FP_REGS, offsetof(struct kvm_regs, fp_regs));
> DEFINE(VCPU_FPEXC32_EL2, offsetof(struct kvm_vcpu, arch.ctxt.sys_regs[FPEXC32_EL2]));
> DEFINE(VCPU_HOST_CONTEXT, offsetof(struct kvm_vcpu, arch.host_cpu_context));
> + DEFINE(HOST_CONTEXT_VCPU, offsetof(struct kvm_cpu_context, __hyp_running_vcpu));
> #endif
> #ifdef CONFIG_CPU_PM
> DEFINE(CPU_SUSPEND_SZ, sizeof(struct cpu_suspend_ctx));
> diff --git a/arch/arm64/kvm/hyp/entry.S b/arch/arm64/kvm/hyp/entry.S
> index 9a8ab5dddd9e..a360ac6e89e9 100644
> --- a/arch/arm64/kvm/hyp/entry.S
> +++ b/arch/arm64/kvm/hyp/entry.S
> @@ -62,9 +62,6 @@ ENTRY(__guest_enter)
> // Store the host regs
> save_callee_saved_regs x1
>
> - // Store host_ctxt and vcpu for use at exit time
> - stp x1, x0, [sp, #-16]!
> -
> add x18, x0, #VCPU_CONTEXT
>
> // Restore guest regs x0-x17
> @@ -118,8 +115,7 @@ ENTRY(__guest_exit)
> // Store the guest regs x19-x29, lr
> save_callee_saved_regs x1
>
> - // Restore the host_ctxt from the stack
> - ldr x2, [sp], #16
> + get_host_ctxt x2, x3
>
> // Now restore the host regs
> restore_callee_saved_regs x2
> diff --git a/arch/arm64/kvm/hyp/hyp-entry.S b/arch/arm64/kvm/hyp/hyp-entry.S
> index e4f37b9dd47c..71b4cc92895e 100644
> --- a/arch/arm64/kvm/hyp/hyp-entry.S
> +++ b/arch/arm64/kvm/hyp/hyp-entry.S
> @@ -56,18 +56,15 @@ ENDPROC(__vhe_hyp_call)
> el1_sync: // Guest trapped into EL2
> stp x0, x1, [sp, #-16]!
>
> -alternative_if_not ARM64_HAS_VIRT_HOST_EXTN
> - mrs x1, esr_el2
> -alternative_else
> - mrs x1, esr_el1
> -alternative_endif
> - lsr x0, x1, #ESR_ELx_EC_SHIFT
> + mrs x1, vttbr_el2 // If vttbr is valid, this is a trap
> + cbnz x1, el1_trap // from the guest
>
> - cmp x0, #ESR_ELx_EC_HVC64
> - b.ne el1_trap
> -
> - mrs x1, vttbr_el2 // If vttbr is valid, the 64bit guest
> - cbnz x1, el1_trap // called HVC
> +#ifdef CONFIG_DEBUG
> + mrs x0, esr_el2
> + lsr x0, x0, #ESR_ELx_EC_SHIFT
> + cmp x0, #ESR_ELx_EC_HVC64
> + b.ne __hyp_panic
> +#endif
>
> /* Here, we're pretty sure the host called HVC. */
> ldp x0, x1, [sp], #16
> @@ -101,10 +98,15 @@ alternative_endif
> eret
>
> el1_trap:
> + get_host_ctxt x0, x1
> + get_vcpu x1, x0
> +
> + mrs x0, esr_el2
> + lsr x0, x0, #ESR_ELx_EC_SHIFT
> /*
> * x0: ESR_EC
> + * x1: vcpu pointer
> */
> - ldr x1, [sp, #16 + 8] // vcpu stored by __guest_enter
>
> /*
> * We trap the first access to the FP/SIMD to save the host context
> @@ -122,13 +124,15 @@ alternative_else_nop_endif
>
> el1_irq:
> stp x0, x1, [sp, #-16]!
> - ldr x1, [sp, #16 + 8]
> + get_host_ctxt x0, x1
> + get_vcpu x1, x0
> mov x0, #ARM_EXCEPTION_IRQ
> b __guest_exit
>
> el1_error:
> stp x0, x1, [sp, #-16]!
> - ldr x1, [sp, #16 + 8]
> + get_host_ctxt x0, x1
> + get_vcpu x1, x0
> mov x0, #ARM_EXCEPTION_EL1_SERROR
> b __guest_exit
>
> @@ -164,14 +168,7 @@ ENTRY(__hyp_do_panic)
> ENDPROC(__hyp_do_panic)
>
> ENTRY(__hyp_panic)
> - /*
> - * '=kvm_host_cpu_state' is a host VA from the constant pool, it may
> - * not be accessible by this address from EL2, hyp_panic() converts
> - * it with kern_hyp_va() before use.
> - */
> - ldr x0, =kvm_host_cpu_state
> - mrs x1, tpidr_el2
> - add x0, x0, x1
> + get_host_ctxt x0, x1
> b hyp_panic
> ENDPROC(__hyp_panic)
>
> diff --git a/arch/arm64/kvm/hyp/switch.c b/arch/arm64/kvm/hyp/switch.c
> index f7307b6b42f0..6fcb37e220b5 100644
> --- a/arch/arm64/kvm/hyp/switch.c
> +++ b/arch/arm64/kvm/hyp/switch.c
> @@ -449,7 +449,7 @@ static hyp_alternate_select(__hyp_call_panic,
> __hyp_call_panic_nvhe, __hyp_call_panic_vhe,
> ARM64_HAS_VIRT_HOST_EXTN);
>
> -void __hyp_text __noreturn hyp_panic(struct kvm_cpu_context *__host_ctxt)
> +void __hyp_text __noreturn hyp_panic(struct kvm_cpu_context *host_ctxt)
> {
> struct kvm_vcpu *vcpu = NULL;
>
> @@ -458,9 +458,6 @@ void __hyp_text __noreturn hyp_panic(struct kvm_cpu_context *__host_ctxt)
> u64 par = read_sysreg(par_el1);
>
> if (read_sysreg(vttbr_el2)) {
> - struct kvm_cpu_context *host_ctxt;
> -
> - host_ctxt = kern_hyp_va(__host_ctxt);
> vcpu = host_ctxt->__hyp_running_vcpu;
> __timer_disable_traps(vcpu);
> __deactivate_traps(vcpu);
> diff --git a/arch/arm64/kvm/hyp/sysreg-sr.c b/arch/arm64/kvm/hyp/sysreg-sr.c
> index c54cc2afb92b..e19d89cabf2a 100644
> --- a/arch/arm64/kvm/hyp/sysreg-sr.c
> +++ b/arch/arm64/kvm/hyp/sysreg-sr.c
> @@ -183,3 +183,8 @@ void __hyp_text __sysreg32_restore_state(struct kvm_vcpu *vcpu)
> if (vcpu->arch.debug_flags & KVM_ARM64_DEBUG_DIRTY)
> write_sysreg(sysreg[DBGVCR32_EL2], dbgvcr32_el2);
> }
> +
> +void __hyp_text __kvm_set_tpidr_el2(u64 tpidr_el2)
> +{
> + asm("msr tpidr_el2, %0": : "r" (tpidr_el2));
> +}
> --
> 2.14.2
>
Other than the couple of nits above:
Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
M.
--
Jazz is not dead, it just smell funny.
^ permalink raw reply
* [PATCH v2 02/36] KVM: arm64: Rework hyp_panic for VHE and non-VHE
From: Marc Zyngier @ 2017-12-09 17:24 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171207170630.592-3-christoffer.dall@linaro.org>
On Thu, 07 Dec 2017 17:05:56 +0000,
Christoffer Dall wrote:
>
> VHE actually doesn't rely on clearing the VTTBR when returning to the
> host kernel, and that is the current key mechanism of hyp_panic to
> figure out how to attempt to return to a state good enough to print a
> panic statement.
>
> Therefore, we split the hyp_panic function into two functions, a VHE and
> a non-VHE, keeping the non-VHE version intact, but changing the VHE
> behavior.
>
> The vttbr_el2 check on VHE doesn't really make that much sense, because
> the only situation where we can get here on VHE is when the hypervisor
> assembly code actually called into hyp_panic, which only happens when
> VBAR_EL2 has been set to the KVM exception vectors. On VHE, we can
> always safely disable the traps and restore the host registers at this
> point, so we simply do that unconditionally and call into the panic
> function directly.
>
> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
M.
--
Jazz is not dead, it just smell funny.
^ permalink raw reply
* [PATCH v2 05/36] KVM: arm/arm64: Add kvm_vcpu_load_sysregs and kvm_vcpu_put_sysregs
From: Marc Zyngier @ 2017-12-09 17:30 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171207170630.592-6-christoffer.dall@linaro.org>
On Thu, 07 Dec 2017 17:05:59 +0000,
Christoffer Dall wrote:
>
> As we are about to move a bunch of save/restore logic for VHE kernels to
> the load and put functions, we need some infrastructure to do this.
>
> Reviewed-by: Andrew Jones <drjones@redhat.com>
> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
M.
--
Jazz is not dead, it just smell funny.
^ permalink raw reply
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