* [RFT PATCH] ARM: dts: exynos: Enable Mixer node for Exynos5800 Peach Pi machine
From: Marek Szyprowski @ 2017-12-12 7:01 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171211224856.29264-1-javierm@redhat.com>
Hi
On 2017-12-11 23:48, Javier Martinez Canillas wrote:
> Commit 1cb686c08d12 ("ARM: dts: exynos: Add status property to Exynos 542x
> Mixer nodes") disabled the Mixer node by default in the DTSI and enabled
> for each Exynos 542x DTS. But unfortunately it missed to enable it for the
> Exynos5800 Peach Pi machine, since the 5800 is also an 542x SoC variant.
>
> Signed-off-by: Javier Martinez Canillas <javierm@redhat.com>
Acked-by: Marek Szyprowski <m.szyprowski@samsung.com>
> ---
>
> I believe this may cause the boot issues reported on Exynos5800 Peach Pi
> from v4.15-rc3, the mentioned commit made to v4.15-rc1 but it seems that
> didn't cause any harm until commit ("510353a63796 drm/bridge: analogix
> dp: Fix runtime PM state in get_modes() callback") fixed the runtime PM
> management in the DP driver.
Thanks for analyzing this. Lack of this change was probably responsible for
Exynos DRM initialization failure ("exynos-drm exynos-drm: failed to bind
14530000.hdmi (ops hdmi_component_ops): -1" message and probably further
error "unbalanced disables for lcd_vdd", which shows that failure path of
analogix dp and simple panel causes unbalanced regulator disable.
This patch should go to v4.15-rcX (fixes) if possible.
> I can't test right now, but I'm posting anyways as a RFT in case others
> that have access to a Peach Pi can test it.
>
> Best regards,
> Javier
>
> arch/arm/boot/dts/exynos5800-peach-pi.dts | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/arch/arm/boot/dts/exynos5800-peach-pi.dts b/arch/arm/boot/dts/exynos5800-peach-pi.dts
> index b2b95ff205e8..0029ec27819c 100644
> --- a/arch/arm/boot/dts/exynos5800-peach-pi.dts
> +++ b/arch/arm/boot/dts/exynos5800-peach-pi.dts
> @@ -664,6 +664,10 @@
> status = "okay";
> };
>
> +&mixer {
> + status = "okay";
> +};
> +
> /* eMMC flash */
> &mmc_0 {
> status = "okay";
Best regards
--
Marek Szyprowski, PhD
Samsung R&D Institute Poland
^ permalink raw reply
* [PATCH v5 1/8] clocksource: dmtimer: Remove all the exports
From: Ladislav Michl @ 2017-12-12 7:16 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1513059137-21593-2-git-send-email-j-keerthy@ti.com>
Keerthy,
On Tue, Dec 12, 2017 at 11:42:10AM +0530, Keerthy wrote:
> Remove all the unwanted exports from the driver
I'm adding event capture capability to the pwm-omap driver and so far used
v4.15-rc3 as codebase.
Intended use is an IR receiver; for that I need to measure pulses width and
spaces between pulses. So DM timer was setup to generate interupt after
both TCAR1 and TCAR2 are filled, values are passed to IR decoder and
TCAR_IT_FLAG is cleared.
Of course, this is just proof of concept and needs to be polished and
generalized, but to make it at least work I need functions you just
unexported (plus some new).
Question is whenever we need this level of indirection (omap_dm_timer_ops)
or plain exports are enough.
Thank you,
ladis
> Signed-off-by: Keerthy <j-keerthy@ti.com>
> Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
> ---
> Changes in v3:
>
> * Added Sebastian's Reviewed-by.
>
> Changes in v2:
>
> * No code changes in this v2 version. Only enhanced patch
> statistics for renames.
>
> arch/arm/plat-omap/dmtimer.c | 27 ---------------------------
> 1 file changed, 27 deletions(-)
>
> diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c
> index d443e48..72565fc 100644
> --- a/arch/arm/plat-omap/dmtimer.c
> +++ b/arch/arm/plat-omap/dmtimer.c
> @@ -302,7 +302,6 @@ struct omap_dm_timer *omap_dm_timer_request(void)
> {
> return _omap_dm_timer_request(REQUEST_ANY, NULL);
> }
> -EXPORT_SYMBOL_GPL(omap_dm_timer_request);
>
> struct omap_dm_timer *omap_dm_timer_request_specific(int id)
> {
> @@ -315,7 +314,6 @@ struct omap_dm_timer *omap_dm_timer_request_specific(int id)
>
> return _omap_dm_timer_request(REQUEST_BY_ID, &id);
> }
> -EXPORT_SYMBOL_GPL(omap_dm_timer_request_specific);
>
> /**
> * omap_dm_timer_request_by_cap - Request a timer by capability
> @@ -330,7 +328,6 @@ struct omap_dm_timer *omap_dm_timer_request_by_cap(u32 cap)
> {
> return _omap_dm_timer_request(REQUEST_BY_CAP, &cap);
> }
> -EXPORT_SYMBOL_GPL(omap_dm_timer_request_by_cap);
>
> /**
> * omap_dm_timer_request_by_node - Request a timer by device-tree node
> @@ -346,7 +343,6 @@ struct omap_dm_timer *omap_dm_timer_request_by_node(struct device_node *np)
>
> return _omap_dm_timer_request(REQUEST_BY_NODE, np);
> }
> -EXPORT_SYMBOL_GPL(omap_dm_timer_request_by_node);
>
> int omap_dm_timer_free(struct omap_dm_timer *timer)
> {
> @@ -359,7 +355,6 @@ int omap_dm_timer_free(struct omap_dm_timer *timer)
> timer->reserved = 0;
> return 0;
> }
> -EXPORT_SYMBOL_GPL(omap_dm_timer_free);
>
> void omap_dm_timer_enable(struct omap_dm_timer *timer)
> {
> @@ -379,13 +374,11 @@ void omap_dm_timer_enable(struct omap_dm_timer *timer)
> }
> }
> }
> -EXPORT_SYMBOL_GPL(omap_dm_timer_enable);
>
> void omap_dm_timer_disable(struct omap_dm_timer *timer)
> {
> pm_runtime_put_sync(&timer->pdev->dev);
> }
> -EXPORT_SYMBOL_GPL(omap_dm_timer_disable);
>
> int omap_dm_timer_get_irq(struct omap_dm_timer *timer)
> {
> @@ -393,7 +386,6 @@ int omap_dm_timer_get_irq(struct omap_dm_timer *timer)
> return timer->irq;
> return -EINVAL;
> }
> -EXPORT_SYMBOL_GPL(omap_dm_timer_get_irq);
>
> #if defined(CONFIG_ARCH_OMAP1)
> #include <mach/hardware.h>
> @@ -429,7 +421,6 @@ __u32 omap_dm_timer_modify_idlect_mask(__u32 inputmask)
>
> return inputmask;
> }
> -EXPORT_SYMBOL_GPL(omap_dm_timer_modify_idlect_mask);
>
> #else
>
> @@ -439,7 +430,6 @@ struct clk *omap_dm_timer_get_fclk(struct omap_dm_timer *timer)
> return timer->fclk;
> return NULL;
> }
> -EXPORT_SYMBOL_GPL(omap_dm_timer_get_fclk);
>
> __u32 omap_dm_timer_modify_idlect_mask(__u32 inputmask)
> {
> @@ -447,7 +437,6 @@ __u32 omap_dm_timer_modify_idlect_mask(__u32 inputmask)
>
> return 0;
> }
> -EXPORT_SYMBOL_GPL(omap_dm_timer_modify_idlect_mask);
>
> #endif
>
> @@ -461,7 +450,6 @@ int omap_dm_timer_trigger(struct omap_dm_timer *timer)
> omap_dm_timer_write_reg(timer, OMAP_TIMER_TRIGGER_REG, 0);
> return 0;
> }
> -EXPORT_SYMBOL_GPL(omap_dm_timer_trigger);
>
> int omap_dm_timer_start(struct omap_dm_timer *timer)
> {
> @@ -482,7 +470,6 @@ int omap_dm_timer_start(struct omap_dm_timer *timer)
> timer->context.tclr = l;
> return 0;
> }
> -EXPORT_SYMBOL_GPL(omap_dm_timer_start);
>
> int omap_dm_timer_stop(struct omap_dm_timer *timer)
> {
> @@ -506,7 +493,6 @@ int omap_dm_timer_stop(struct omap_dm_timer *timer)
> omap_dm_timer_disable(timer);
> return 0;
> }
> -EXPORT_SYMBOL_GPL(omap_dm_timer_stop);
>
> int omap_dm_timer_set_source(struct omap_dm_timer *timer, int source)
> {
> @@ -569,7 +555,6 @@ int omap_dm_timer_set_source(struct omap_dm_timer *timer, int source)
>
> return ret;
> }
> -EXPORT_SYMBOL_GPL(omap_dm_timer_set_source);
>
> int omap_dm_timer_set_load(struct omap_dm_timer *timer, int autoreload,
> unsigned int load)
> @@ -595,7 +580,6 @@ int omap_dm_timer_set_load(struct omap_dm_timer *timer, int autoreload,
> omap_dm_timer_disable(timer);
> return 0;
> }
> -EXPORT_SYMBOL_GPL(omap_dm_timer_set_load);
>
> /* Optimized set_load which removes costly spin wait in timer_start */
> int omap_dm_timer_set_load_start(struct omap_dm_timer *timer, int autoreload,
> @@ -625,7 +609,6 @@ int omap_dm_timer_set_load_start(struct omap_dm_timer *timer, int autoreload,
> timer->context.tcrr = load;
> return 0;
> }
> -EXPORT_SYMBOL_GPL(omap_dm_timer_set_load_start);
>
> int omap_dm_timer_set_match(struct omap_dm_timer *timer, int enable,
> unsigned int match)
> @@ -650,7 +633,6 @@ int omap_dm_timer_set_match(struct omap_dm_timer *timer, int enable,
> omap_dm_timer_disable(timer);
> return 0;
> }
> -EXPORT_SYMBOL_GPL(omap_dm_timer_set_match);
>
> int omap_dm_timer_set_pwm(struct omap_dm_timer *timer, int def_on,
> int toggle, int trigger)
> @@ -676,7 +658,6 @@ int omap_dm_timer_set_pwm(struct omap_dm_timer *timer, int def_on,
> omap_dm_timer_disable(timer);
> return 0;
> }
> -EXPORT_SYMBOL_GPL(omap_dm_timer_set_pwm);
>
> int omap_dm_timer_set_prescaler(struct omap_dm_timer *timer, int prescaler)
> {
> @@ -699,7 +680,6 @@ int omap_dm_timer_set_prescaler(struct omap_dm_timer *timer, int prescaler)
> omap_dm_timer_disable(timer);
> return 0;
> }
> -EXPORT_SYMBOL_GPL(omap_dm_timer_set_prescaler);
>
> int omap_dm_timer_set_int_enable(struct omap_dm_timer *timer,
> unsigned int value)
> @@ -716,7 +696,6 @@ int omap_dm_timer_set_int_enable(struct omap_dm_timer *timer,
> omap_dm_timer_disable(timer);
> return 0;
> }
> -EXPORT_SYMBOL_GPL(omap_dm_timer_set_int_enable);
>
> /**
> * omap_dm_timer_set_int_disable - disable timer interrupts
> @@ -747,7 +726,6 @@ int omap_dm_timer_set_int_disable(struct omap_dm_timer *timer, u32 mask)
> omap_dm_timer_disable(timer);
> return 0;
> }
> -EXPORT_SYMBOL_GPL(omap_dm_timer_set_int_disable);
>
> unsigned int omap_dm_timer_read_status(struct omap_dm_timer *timer)
> {
> @@ -762,7 +740,6 @@ unsigned int omap_dm_timer_read_status(struct omap_dm_timer *timer)
>
> return l;
> }
> -EXPORT_SYMBOL_GPL(omap_dm_timer_read_status);
>
> int omap_dm_timer_write_status(struct omap_dm_timer *timer, unsigned int value)
> {
> @@ -773,7 +750,6 @@ int omap_dm_timer_write_status(struct omap_dm_timer *timer, unsigned int value)
>
> return 0;
> }
> -EXPORT_SYMBOL_GPL(omap_dm_timer_write_status);
>
> unsigned int omap_dm_timer_read_counter(struct omap_dm_timer *timer)
> {
> @@ -784,7 +760,6 @@ unsigned int omap_dm_timer_read_counter(struct omap_dm_timer *timer)
>
> return __omap_dm_timer_read_counter(timer, timer->posted);
> }
> -EXPORT_SYMBOL_GPL(omap_dm_timer_read_counter);
>
> int omap_dm_timer_write_counter(struct omap_dm_timer *timer, unsigned int value)
> {
> @@ -799,7 +774,6 @@ int omap_dm_timer_write_counter(struct omap_dm_timer *timer, unsigned int value)
> timer->context.tcrr = value;
> return 0;
> }
> -EXPORT_SYMBOL_GPL(omap_dm_timer_write_counter);
>
> int omap_dm_timers_active(void)
> {
> @@ -816,7 +790,6 @@ int omap_dm_timers_active(void)
> }
> return 0;
> }
> -EXPORT_SYMBOL_GPL(omap_dm_timers_active);
>
> static const struct of_device_id omap_timer_match[];
>
> --
> 1.9.1
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-omap" in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply
* [PATCH v2 4/7] cpufreq: mvebu: Use dev_pm_opp_remove()
From: Viresh Kumar @ 2017-12-12 7:21 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171207135616.23670-5-gregory.clement@free-electrons.com>
On 07-12-17, 14:56, Gregory CLEMENT wrote:
> Since the introduction of this driver, the dev_pm_opp_remove() was
> added. So stop claiming we can't remove opp and use it in case of
> failure.
>
> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
> ---
> drivers/cpufreq/mvebu-cpufreq.c | 11 +++++------
> 1 file changed, 5 insertions(+), 6 deletions(-)
There is no reason for this patch to be part of your series. You should have
sent it separately. Please do it now.
And while you do it, you can add
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
--
viresh
^ permalink raw reply
* [PATCH v2 5/7] MAINTAINERS: add new entries for Armada 37xx cpufreq driver
From: Viresh Kumar @ 2017-12-12 7:22 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171207135616.23670-6-gregory.clement@free-electrons.com>
On 07-12-17, 14:56, Gregory CLEMENT wrote:
> This new driver belongs to the mvebu family, update the MAINTAINER file
> to document it.
>
> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
> ---
> MAINTAINERS | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index aa71ab52fd76..98dcee849481 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -1582,6 +1582,7 @@ F: arch/arm/boot/dts/kirkwood*
> F: arch/arm/configs/mvebu_*_defconfig
> F: arch/arm/mach-mvebu/
> F: arch/arm64/boot/dts/marvell/armada*
> +F: drivers/cpufreq/armada-37xx-cpufreq.c
> F: drivers/cpufreq/mvebu-cpufreq.c
> F: drivers/irqchip/irq-armada-370-xp.c
> F: drivers/irqchip/irq-mvebu-*
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
--
viresh
^ permalink raw reply
* [PATCH v2 6/7] cpufreq: Add DVFS support for Armada 37xx
From: Viresh Kumar @ 2017-12-12 7:24 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171207135616.23670-7-gregory.clement@free-electrons.com>
On 07-12-17, 14:56, Gregory CLEMENT wrote:
> +/* Power management in North Bridge register set */
> +#define ARMADA_37XX_NB_L0L1 0x18
> +#define ARMADA_37XX_NB_L2L3 0x1C
> +#define ARMADA_37XX_NB_TBG_DIV_OFF 13
> +#define ARMADA_37XX_NB_TBG_DIV_MASK 0x7
> +#define ARMADA_37XX_NB_CLK_SEL_OFF 11
> +#define ARMADA_37XX_NB_CLK_SEL_MASK 0x1
> +#define ARMADA_37XX_NB_CLK_SEL_TBG 0x1
> +#define ARMADA_37XX_NB_TBG_SEL_OFF 9
> +#define ARMADA_37XX_NB_TBG_SEL_MASK 0x3
> +#define ARMADA_37XX_NB_VDD_SEL_OFF 6
> +#define ARMADA_37XX_NB_VDD_SEL_MASK 0x3
> +#define ARMADA_37XX_NB_CONFIG_SHIFT 16
> +#define ARMADA_37XX_NB_DYN_MOD 0x24
> +#define ARMADA_37XX_NB_CLK_SEL_EN BIT(26)
> +#define ARMADA_37XX_NB_TBG_EN BIT(28)
> +#define ARMADA_37XX_NB_DIV_EN BIT(29)
> +#define ARMADA_37XX_NB_VDD_EN BIT(30)
> +#define ARMADA_37XX_NB_DFS_EN BIT(31)
> +#define ARMADA_37XX_NB_CPU_LOAD 0x30
> +#define ARMADA_37XX_NB_CPU_LOAD_MASK 0x3
> +#define ARMADA_37XX_DVFS_LOAD_0 0
> +#define ARMADA_37XX_DVFS_LOAD_1 1
> +#define ARMADA_37XX_DVFS_LOAD_2 2
> +#define ARMADA_37XX_DVFS_LOAD_3 3
I thought you agreed to using space instead of tab after #define ?
Looks fine otherwise. You can add below after fixing above tab/space thing:
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
--
viresh
^ permalink raw reply
* [PATCH v1 4/4] arm64: dts: mediatek: add mt2712 cpufreq related device nodes
From: Viresh Kumar @ 2017-12-12 7:26 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1758225.tOgn8eUOoH@aspire.rjw.lan>
On 12-12-17, 02:17, Rafael J. Wysocki wrote:
> On Monday, December 11, 2017 8:57:19 AM CET Viresh Kumar wrote:
> > On 08-12-17, 14:07, Andrew-sh Cheng wrote:
> > > Add opp v2 information,
> > > and also add clocks, regulators and opp information into cpu nodes
> > >
> > > Signed-off-by: Andrew-sh Cheng <andrew-sh.cheng@mediatek.com>
> > > ---
> > > arch/arm64/boot/dts/mediatek/mt2712-evb.dts | 27 ++++++++++++++
> > > arch/arm64/boot/dts/mediatek/mt2712e.dtsi | 57 +++++++++++++++++++++++++++++
> > > 2 files changed, 84 insertions(+)
> >
> > Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
>
> Of course, DT bindings require ACKs from DT maintainers to be applied.
I didn't knew that we need Acks from DT maintainers for dts files as well? Yeah,
its very much required while defining new bindings for sure.
--
viresh
^ permalink raw reply
* [PATCH v2 4/7] cpufreq: mvebu: Use dev_pm_opp_remove()
From: Thomas Petazzoni @ 2017-12-12 7:28 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171207135616.23670-5-gregory.clement@free-electrons.com>
Hello,
On Thu, 7 Dec 2017 14:56:13 +0100, Gregory CLEMENT wrote:
> - /*
> - * In case of a failure of dev_pm_opp_add(), we don't
> - * bother with cleaning up the registered OPP (there's
> - * no function to do so), and simply cancel the
> - * registration of the cpufreq device.
> - */
> ret = dev_pm_opp_add(cpu_dev, clk_get_rate(clk), 0);
> if (ret) {
> clk_put(clk);
> @@ -90,6 +84,11 @@ static int __init armada_xp_pmsu_cpufreq_init(void)
>
> ret = dev_pm_opp_add(cpu_dev, clk_get_rate(clk) / 2, 0);
> if (ret) {
> + /*
> + * The second opp failed to be added, remove
> + * the first one before exiting.
> + */
> + dev_pm_opp_remove(cpu_dev, clk_get_rate(clk));
> clk_put(clk);
> return ret;
> }
This still doesn't fix the failure situation. Indeed, you are only
removing the OPP at full rate for the current CPU, but you are not
removing the OPPs for the N-1 previous CPUs that have been handled in
previous iterations of the loop.
Thomas
--
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
^ permalink raw reply
* [BUG] drivers/spi: a possible sleep-in-atomic bug in atmel_spi_remove
From: Jia-Ju Bai @ 2017-12-12 7:30 UTC (permalink / raw)
To: linux-arm-kernel
According to drivers/spi/spi-atmel.c, the kernel module may sleep under
a spinlock.
The function call path is:
atmel_spi_remove (acquire the spinlock)
atmel_spi_release_dma
dma_release_channel
mutex_lock --> may sleep
I do not find a good way to fix it, so I only report.
This possible bug is found by my static analysis tool (DSAC) and checked
by my code review.
Thanks,
Jia-Ju Bai
^ permalink raw reply
* [PATCH v5 1/8] clocksource: dmtimer: Remove all the exports
From: Keerthy @ 2017-12-12 7:31 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171212071624.GA3453@lenoch>
On Tuesday 12 December 2017 12:46 PM, Ladislav Michl wrote:
> Keerthy,
>
> On Tue, Dec 12, 2017 at 11:42:10AM +0530, Keerthy wrote:
>> Remove all the unwanted exports from the driver
>
> I'm adding event capture capability to the pwm-omap driver and so far used
> v4.15-rc3 as codebase.
>
> Intended use is an IR receiver; for that I need to measure pulses width and
> spaces between pulses. So DM timer was setup to generate interupt after
> both TCAR1 and TCAR2 are filled, values are passed to IR decoder and
> TCAR_IT_FLAG is cleared.
>
> Of course, this is just proof of concept and needs to be polished and
> generalized, but to make it at least work I need functions you just
> unexported (plus some new).
>
> Question is whenever we need this level of indirection (omap_dm_timer_ops)
> or plain exports are enough.
The general guidance is not to do plain exports and go via
omap_dm_timer_ops.
>
> Thank you,
> ladis
>
>> Signed-off-by: Keerthy <j-keerthy@ti.com>
>> Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
>> ---
>> Changes in v3:
>>
>> * Added Sebastian's Reviewed-by.
>>
>> Changes in v2:
>>
>> * No code changes in this v2 version. Only enhanced patch
>> statistics for renames.
>>
>> arch/arm/plat-omap/dmtimer.c | 27 ---------------------------
>> 1 file changed, 27 deletions(-)
>>
>> diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c
>> index d443e48..72565fc 100644
>> --- a/arch/arm/plat-omap/dmtimer.c
>> +++ b/arch/arm/plat-omap/dmtimer.c
>> @@ -302,7 +302,6 @@ struct omap_dm_timer *omap_dm_timer_request(void)
>> {
>> return _omap_dm_timer_request(REQUEST_ANY, NULL);
>> }
>> -EXPORT_SYMBOL_GPL(omap_dm_timer_request);
>>
>> struct omap_dm_timer *omap_dm_timer_request_specific(int id)
>> {
>> @@ -315,7 +314,6 @@ struct omap_dm_timer *omap_dm_timer_request_specific(int id)
>>
>> return _omap_dm_timer_request(REQUEST_BY_ID, &id);
>> }
>> -EXPORT_SYMBOL_GPL(omap_dm_timer_request_specific);
>>
>> /**
>> * omap_dm_timer_request_by_cap - Request a timer by capability
>> @@ -330,7 +328,6 @@ struct omap_dm_timer *omap_dm_timer_request_by_cap(u32 cap)
>> {
>> return _omap_dm_timer_request(REQUEST_BY_CAP, &cap);
>> }
>> -EXPORT_SYMBOL_GPL(omap_dm_timer_request_by_cap);
>>
>> /**
>> * omap_dm_timer_request_by_node - Request a timer by device-tree node
>> @@ -346,7 +343,6 @@ struct omap_dm_timer *omap_dm_timer_request_by_node(struct device_node *np)
>>
>> return _omap_dm_timer_request(REQUEST_BY_NODE, np);
>> }
>> -EXPORT_SYMBOL_GPL(omap_dm_timer_request_by_node);
>>
>> int omap_dm_timer_free(struct omap_dm_timer *timer)
>> {
>> @@ -359,7 +355,6 @@ int omap_dm_timer_free(struct omap_dm_timer *timer)
>> timer->reserved = 0;
>> return 0;
>> }
>> -EXPORT_SYMBOL_GPL(omap_dm_timer_free);
>>
>> void omap_dm_timer_enable(struct omap_dm_timer *timer)
>> {
>> @@ -379,13 +374,11 @@ void omap_dm_timer_enable(struct omap_dm_timer *timer)
>> }
>> }
>> }
>> -EXPORT_SYMBOL_GPL(omap_dm_timer_enable);
>>
>> void omap_dm_timer_disable(struct omap_dm_timer *timer)
>> {
>> pm_runtime_put_sync(&timer->pdev->dev);
>> }
>> -EXPORT_SYMBOL_GPL(omap_dm_timer_disable);
>>
>> int omap_dm_timer_get_irq(struct omap_dm_timer *timer)
>> {
>> @@ -393,7 +386,6 @@ int omap_dm_timer_get_irq(struct omap_dm_timer *timer)
>> return timer->irq;
>> return -EINVAL;
>> }
>> -EXPORT_SYMBOL_GPL(omap_dm_timer_get_irq);
>>
>> #if defined(CONFIG_ARCH_OMAP1)
>> #include <mach/hardware.h>
>> @@ -429,7 +421,6 @@ __u32 omap_dm_timer_modify_idlect_mask(__u32 inputmask)
>>
>> return inputmask;
>> }
>> -EXPORT_SYMBOL_GPL(omap_dm_timer_modify_idlect_mask);
>>
>> #else
>>
>> @@ -439,7 +430,6 @@ struct clk *omap_dm_timer_get_fclk(struct omap_dm_timer *timer)
>> return timer->fclk;
>> return NULL;
>> }
>> -EXPORT_SYMBOL_GPL(omap_dm_timer_get_fclk);
>>
>> __u32 omap_dm_timer_modify_idlect_mask(__u32 inputmask)
>> {
>> @@ -447,7 +437,6 @@ __u32 omap_dm_timer_modify_idlect_mask(__u32 inputmask)
>>
>> return 0;
>> }
>> -EXPORT_SYMBOL_GPL(omap_dm_timer_modify_idlect_mask);
>>
>> #endif
>>
>> @@ -461,7 +450,6 @@ int omap_dm_timer_trigger(struct omap_dm_timer *timer)
>> omap_dm_timer_write_reg(timer, OMAP_TIMER_TRIGGER_REG, 0);
>> return 0;
>> }
>> -EXPORT_SYMBOL_GPL(omap_dm_timer_trigger);
>>
>> int omap_dm_timer_start(struct omap_dm_timer *timer)
>> {
>> @@ -482,7 +470,6 @@ int omap_dm_timer_start(struct omap_dm_timer *timer)
>> timer->context.tclr = l;
>> return 0;
>> }
>> -EXPORT_SYMBOL_GPL(omap_dm_timer_start);
>>
>> int omap_dm_timer_stop(struct omap_dm_timer *timer)
>> {
>> @@ -506,7 +493,6 @@ int omap_dm_timer_stop(struct omap_dm_timer *timer)
>> omap_dm_timer_disable(timer);
>> return 0;
>> }
>> -EXPORT_SYMBOL_GPL(omap_dm_timer_stop);
>>
>> int omap_dm_timer_set_source(struct omap_dm_timer *timer, int source)
>> {
>> @@ -569,7 +555,6 @@ int omap_dm_timer_set_source(struct omap_dm_timer *timer, int source)
>>
>> return ret;
>> }
>> -EXPORT_SYMBOL_GPL(omap_dm_timer_set_source);
>>
>> int omap_dm_timer_set_load(struct omap_dm_timer *timer, int autoreload,
>> unsigned int load)
>> @@ -595,7 +580,6 @@ int omap_dm_timer_set_load(struct omap_dm_timer *timer, int autoreload,
>> omap_dm_timer_disable(timer);
>> return 0;
>> }
>> -EXPORT_SYMBOL_GPL(omap_dm_timer_set_load);
>>
>> /* Optimized set_load which removes costly spin wait in timer_start */
>> int omap_dm_timer_set_load_start(struct omap_dm_timer *timer, int autoreload,
>> @@ -625,7 +609,6 @@ int omap_dm_timer_set_load_start(struct omap_dm_timer *timer, int autoreload,
>> timer->context.tcrr = load;
>> return 0;
>> }
>> -EXPORT_SYMBOL_GPL(omap_dm_timer_set_load_start);
>>
>> int omap_dm_timer_set_match(struct omap_dm_timer *timer, int enable,
>> unsigned int match)
>> @@ -650,7 +633,6 @@ int omap_dm_timer_set_match(struct omap_dm_timer *timer, int enable,
>> omap_dm_timer_disable(timer);
>> return 0;
>> }
>> -EXPORT_SYMBOL_GPL(omap_dm_timer_set_match);
>>
>> int omap_dm_timer_set_pwm(struct omap_dm_timer *timer, int def_on,
>> int toggle, int trigger)
>> @@ -676,7 +658,6 @@ int omap_dm_timer_set_pwm(struct omap_dm_timer *timer, int def_on,
>> omap_dm_timer_disable(timer);
>> return 0;
>> }
>> -EXPORT_SYMBOL_GPL(omap_dm_timer_set_pwm);
>>
>> int omap_dm_timer_set_prescaler(struct omap_dm_timer *timer, int prescaler)
>> {
>> @@ -699,7 +680,6 @@ int omap_dm_timer_set_prescaler(struct omap_dm_timer *timer, int prescaler)
>> omap_dm_timer_disable(timer);
>> return 0;
>> }
>> -EXPORT_SYMBOL_GPL(omap_dm_timer_set_prescaler);
>>
>> int omap_dm_timer_set_int_enable(struct omap_dm_timer *timer,
>> unsigned int value)
>> @@ -716,7 +696,6 @@ int omap_dm_timer_set_int_enable(struct omap_dm_timer *timer,
>> omap_dm_timer_disable(timer);
>> return 0;
>> }
>> -EXPORT_SYMBOL_GPL(omap_dm_timer_set_int_enable);
>>
>> /**
>> * omap_dm_timer_set_int_disable - disable timer interrupts
>> @@ -747,7 +726,6 @@ int omap_dm_timer_set_int_disable(struct omap_dm_timer *timer, u32 mask)
>> omap_dm_timer_disable(timer);
>> return 0;
>> }
>> -EXPORT_SYMBOL_GPL(omap_dm_timer_set_int_disable);
>>
>> unsigned int omap_dm_timer_read_status(struct omap_dm_timer *timer)
>> {
>> @@ -762,7 +740,6 @@ unsigned int omap_dm_timer_read_status(struct omap_dm_timer *timer)
>>
>> return l;
>> }
>> -EXPORT_SYMBOL_GPL(omap_dm_timer_read_status);
>>
>> int omap_dm_timer_write_status(struct omap_dm_timer *timer, unsigned int value)
>> {
>> @@ -773,7 +750,6 @@ int omap_dm_timer_write_status(struct omap_dm_timer *timer, unsigned int value)
>>
>> return 0;
>> }
>> -EXPORT_SYMBOL_GPL(omap_dm_timer_write_status);
>>
>> unsigned int omap_dm_timer_read_counter(struct omap_dm_timer *timer)
>> {
>> @@ -784,7 +760,6 @@ unsigned int omap_dm_timer_read_counter(struct omap_dm_timer *timer)
>>
>> return __omap_dm_timer_read_counter(timer, timer->posted);
>> }
>> -EXPORT_SYMBOL_GPL(omap_dm_timer_read_counter);
>>
>> int omap_dm_timer_write_counter(struct omap_dm_timer *timer, unsigned int value)
>> {
>> @@ -799,7 +774,6 @@ int omap_dm_timer_write_counter(struct omap_dm_timer *timer, unsigned int value)
>> timer->context.tcrr = value;
>> return 0;
>> }
>> -EXPORT_SYMBOL_GPL(omap_dm_timer_write_counter);
>>
>> int omap_dm_timers_active(void)
>> {
>> @@ -816,7 +790,6 @@ int omap_dm_timers_active(void)
>> }
>> return 0;
>> }
>> -EXPORT_SYMBOL_GPL(omap_dm_timers_active);
>>
>> static const struct of_device_id omap_timer_match[];
>>
>> --
>> 1.9.1
>>
>> --
>> To unsubscribe from this list: send the line "unsubscribe linux-omap" in
>> the body of a message to majordomo at vger.kernel.org
>> More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply
* [PATCH v2 4/7] cpufreq: mvebu: Use dev_pm_opp_remove()
From: Viresh Kumar @ 2017-12-12 7:33 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171212082846.4e201953@windsurf.png.is.keysight.com>
On 12-12-17, 08:28, Thomas Petazzoni wrote:
> Hello,
>
> On Thu, 7 Dec 2017 14:56:13 +0100, Gregory CLEMENT wrote:
>
> > - /*
> > - * In case of a failure of dev_pm_opp_add(), we don't
> > - * bother with cleaning up the registered OPP (there's
> > - * no function to do so), and simply cancel the
> > - * registration of the cpufreq device.
> > - */
> > ret = dev_pm_opp_add(cpu_dev, clk_get_rate(clk), 0);
> > if (ret) {
> > clk_put(clk);
> > @@ -90,6 +84,11 @@ static int __init armada_xp_pmsu_cpufreq_init(void)
> >
> > ret = dev_pm_opp_add(cpu_dev, clk_get_rate(clk) / 2, 0);
> > if (ret) {
> > + /*
> > + * The second opp failed to be added, remove
> > + * the first one before exiting.
> > + */
> > + dev_pm_opp_remove(cpu_dev, clk_get_rate(clk));
> > clk_put(clk);
> > return ret;
> > }
>
> This still doesn't fix the failure situation. Indeed, you are only
> removing the OPP at full rate for the current CPU, but you are not
> removing the OPPs for the N-1 previous CPUs that have been handled in
> previous iterations of the loop.
Sorry for missing that, I quickly looked at source and missed seeing the
for_each_cpu loop :(
--
viresh
^ permalink raw reply
* [PATCHv2 11/13] irq debug: do not use print_symbol()
From: Sergey Senozhatsky @ 2017-12-12 7:34 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171211125025.2270-12-sergey.senozhatsky@gmail.com>
print_symbol() uses extra stack space to sprintf() symbol
information and then to feed that buffer to printk()
char buffer[KSYM_SYMBOL_LEN];
sprint_symbol(buffer, address);
printk(fmt, buffer);
Replace print_symbol() with a direct printk("%pS") call.
Signed-off-by: Sergey Senozhatsky <sergey.senozhatsky@gmail.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
---
kernel/irq/debug.h | 14 ++++++--------
1 file changed, 6 insertions(+), 8 deletions(-)
diff --git a/kernel/irq/debug.h b/kernel/irq/debug.h
index 17f05ef8f575..7e06dd275c17 100644
--- a/kernel/irq/debug.h
+++ b/kernel/irq/debug.h
@@ -3,8 +3,6 @@
* Debugging printout:
*/
-#include <linux/kallsyms.h>
-
#define ___P(f) if (desc->status_use_accessors & f) printk("%14s set\n", #f)
#define ___PS(f) if (desc->istate & f) printk("%14s set\n", #f)
/* FIXME */
@@ -14,14 +12,14 @@ static inline void print_irq_desc(unsigned int irq, struct irq_desc *desc)
{
printk("irq %d, desc: %p, depth: %d, count: %d, unhandled: %d\n",
irq, desc, desc->depth, desc->irq_count, desc->irqs_unhandled);
- printk("->handle_irq(): %p, ", desc->handle_irq);
- print_symbol("%s\n", (unsigned long)desc->handle_irq);
- printk("->irq_data.chip(): %p, ", desc->irq_data.chip);
- print_symbol("%s\n", (unsigned long)desc->irq_data.chip);
+ printk("->handle_irq(): %p, %pS\n",
+ desc->handle_irq, desc->handle_irq);
+ printk("->irq_data.chip(): %p, %pS\n",
+ desc->irq_data.chip, desc->irq_data.chip);
printk("->action(): %p\n", desc->action);
if (desc->action) {
- printk("->action->handler(): %p, ", desc->action->handler);
- print_symbol("%s\n", (unsigned long)desc->action->handler);
+ printk("->action->handler(): %p, %pS\n",
+ desc->action->handler, desc->action->handler);
}
___P(IRQ_LEVEL);
--
2.15.1
^ permalink raw reply related
* [RFT PATCH] ARM: dts: exynos: Enable Mixer node for Exynos5800 Peach Pi machine
From: Javier Martinez Canillas @ 2017-12-12 7:41 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <3e6e4b15-9f8a-bea1-3c8e-2d85fc4c512d@samsung.com>
Hello Marek,
On 12/12/2017 08:01 AM, Marek Szyprowski wrote:
> Hi
>
> On 2017-12-11 23:48, Javier Martinez Canillas wrote:
>> Commit 1cb686c08d12 ("ARM: dts: exynos: Add status property to Exynos 542x
>> Mixer nodes") disabled the Mixer node by default in the DTSI and enabled
>> for each Exynos 542x DTS. But unfortunately it missed to enable it for the
>> Exynos5800 Peach Pi machine, since the 5800 is also an 542x SoC variant.
>>
>> Signed-off-by: Javier Martinez Canillas <javierm@redhat.com>
>
> Acked-by: Marek Szyprowski <m.szyprowski@samsung.com>
>
Thanks.
>> ---
>>
>> I believe this may cause the boot issues reported on Exynos5800 Peach Pi
>> from v4.15-rc3, the mentioned commit made to v4.15-rc1 but it seems that
>> didn't cause any harm until commit ("510353a63796 drm/bridge: analogix
>> dp: Fix runtime PM state in get_modes() callback") fixed the runtime PM
>> management in the DP driver.
>
> Thanks for analyzing this. Lack of this change was probably responsible for
> Exynos DRM initialization failure ("exynos-drm exynos-drm: failed to bind
> 14530000.hdmi (ops hdmi_component_ops): -1" message and probably further
> error "unbalanced disables for lcd_vdd", which shows that failure path of
> analogix dp and simple panel causes unbalanced regulator disable.
>
Yes, I came to the same conclusion than you in the thread started by
Guillaume. I just couldn't test it.
> This patch should go to v4.15-rcX (fixes) if possible.
>
Indeed. I wondered if it also needed a Fixes tag. I didn't include it because
I thought that both the culprit and the fix would be in the same kernel release.
But I'll include it anyways.
>> I can't test right now, but I'm posting anyways as a RFT in case others
>> that have access to a Peach Pi can test it.
>>
>> Best regards,
>> Javier
>>
>> arch/arm/boot/dts/exynos5800-peach-pi.dts | 4 ++++
>> 1 file changed, 4 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/exynos5800-peach-pi.dts b/arch/arm/boot/dts/exynos5800-peach-pi.dts
>> index b2b95ff205e8..0029ec27819c 100644
>> --- a/arch/arm/boot/dts/exynos5800-peach-pi.dts
>> +++ b/arch/arm/boot/dts/exynos5800-peach-pi.dts
>> @@ -664,6 +664,10 @@
>> status = "okay";
>> };
>>
>> +&mixer {
>> + status = "okay";
>> +};
>> +
>> /* eMMC flash */
>> &mmc_0 {
>> status = "okay";
>
> Best regards
>
Best regards,
--
Javier Martinez Canillas
Software Engineer - Desktop Hardware Enablement
Red Hat
^ permalink raw reply
* [PATCH v2] ARM: dts: exynos: Enable Mixer node for Exynos5800 Peach Pi machine
From: Javier Martinez Canillas @ 2017-12-12 7:42 UTC (permalink / raw)
To: linux-arm-kernel
Commit 1cb686c08d12 ("ARM: dts: exynos: Add status property to Exynos 542x
Mixer nodes") disabled the Mixer node by default in the DTSI and enabled
for each Exynos 542x DTS. But unfortunately it missed to enable it for the
Exynos5800 Peach Pi machine, since the 5800 is also an 542x SoC variant.
Fixes: 1cb686c08d12 ("ARM: dts: exynos: Add status property to Exynos 542x Mixer nodes")
Signed-off-by: Javier Martinez Canillas <javierm@redhat.com>
Acked-by: Marek Szyprowski <m.szyprowski@samsung.com>
---
Changes in v2:
- Remove RFT tag.
- Add Marek's Acked-by tag.
- Add fixes tag.
arch/arm/boot/dts/exynos5800-peach-pi.dts | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5800-peach-pi.dts b/arch/arm/boot/dts/exynos5800-peach-pi.dts
index b2b95ff205e8..0029ec27819c 100644
--- a/arch/arm/boot/dts/exynos5800-peach-pi.dts
+++ b/arch/arm/boot/dts/exynos5800-peach-pi.dts
@@ -664,6 +664,10 @@
status = "okay";
};
+&mixer {
+ status = "okay";
+};
+
/* eMMC flash */
&mmc_0 {
status = "okay";
--
2.14.3
^ permalink raw reply related
* mainline/master boot bisection: v4.15-rc3 on peach-pi #3228-staging
From: Marek Szyprowski @ 2017-12-12 7:54 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <2df0fc74-8b79-5cca-7a8a-9e005b44d8d8@osg.samsung.com>
Hi Shuah,
On 2017-12-12 00:25, Shuah Khan wrote:
> On 12/11/2017 04:02 PM, Russell King - ARM Linux wrote:
>> On Mon, Dec 11, 2017 at 10:58:29PM +0000, Russell King - ARM Linux wrote:
>>> On Mon, Dec 11, 2017 at 11:54:48PM +0100, Javier Martinez Canillas wrote:
>>>> So I gave a quick look to this, and at the very least there's a bug in
>>>> the Exynos5800 Peach Pi DTS caused by commit 1cb686c08d12 ("ARM: dts:
>>>> exynos: Add status property to Exynos 542x Mixer nodes").
>>>>
>>>> I've posted a fix for that:
>>>>
>>>> https://patchwork.kernel.org/patch/10105921/
>>>>
>>>> I believe this could be also be the cause for the boot failure, since
>>>> I see in the boot log that things start to go wrong after exynos-drm
>>>> fails to bind the HDMI component:
>>>>
>>>> [ 2.916347] exynos-drm exynos-drm: failed to bind 14530000.hdmi (ops
>>>> 0xc1398690): -1
>>> Umm, -1 ? Looking that error code up in
>>> include/uapi/asm-generic/errno-base.h says it's -EPERM.
>>>
>>> I suspect that's someone just returning -1 because they're lazy...
>>> which is real bad form and needs fixing.
>> Oh, it really is -EPERM:
>>
>> struct exynos_drm_crtc *exynos_drm_crtc_get_by_type(struct drm_device *drm_dev,
>> enum exynos_drm_output_type out_type)
>> {
>> struct drm_crtc *crtc;
>>
>> drm_for_each_crtc(crtc, drm_dev)
>> if (to_exynos_crtc(crtc)->type == out_type)
>> return to_exynos_crtc(crtc);
>>
>> return ERR_PTR(-EPERM);
>> }
>>
>> Does "Operation not permitted" really convey the error here? It doesn't
>> look like a permission error to me.
>>
>> Can we please avoid abusing errno codes?
> I tried 4.15-rc3 on odroid-xu4 after seeing drm issues reported. 4.15-rc2+
> with top commit g968edbd worked just fine for me last Friday. I ran several
> tests and everything checked out except the exynos-gsc lockdep issue I sent
> a 4.14 patch for.
>
> However, with 4.15-rc3, dmesg is gets filled with
>
> [ 342.337181] [drm] Non-contiguous allocation is not supported without IOMMU, falling back to contiguous buffer
> [ 342.337470] [drm] Non-contiguous allocation is not supported without IOMMU, falling back to contiguous buffer
> [ 342.337851] [drm] Non-contiguous allocation is not supported without IOMMU, falling back to contiguous buffer
> [ 402.382346] [drm] Non-contiguous allocation is not supported without IOMMU, falling back to contiguous buffer
> [ 402.396682] [drm] Non-contiguous allocation is not supported without IOMMU, falling back to contiguous buffer
> [ 402.399244] [drm] Non-contiguous allocation is not supported without IOMMU, falling back to contiguous buffer
> [ 402.399496] [drm] Non-contiguous allocation is not supported without IOMMU, falling back to contiguous buffer
> [ 402.399848] [drm] Non-contiguous allocation is not supported without IOMMU, falling back to contiguous buffer
> [ 402.400163] [drm] Non-contiguous allocation is not supported without IOMMU, falling back to contiguous buffer
> [ 402.400495] [drm] Non-contiguous allocation is not supported without IOMMU, falling back to contiguous buffer
> [ 402.401294] [drm] Non-contiguous allocation is not supported without IOMMU, falling back to contiguous buffer
> [ 402.401595] [drm] Non-contiguous allocation is not supported without IOMMU, falling back to contiguous buffer
>
> Something broke in 4.15-rc3 on odroix-xu4 badly with exynos_defconfig.
>
> I will start bisect and try to isolate the problem. I suspect this is related to dts
> changes perhaps? I used to this problem a while back and it has been fixed.
This warning has been added intentionally, see following discussions:
https://patchwork.kernel.org/patch/10034919/
https://patchwork.kernel.org/patch/10070475/
This means that your test apps should be updated or you should enable Exynos
IOMMU support in your config. Maybe it is a good time to finally enable it
in exynos_defconfig.
Best regards
--
Marek Szyprowski, PhD
Samsung R&D Institute Poland
^ permalink raw reply
* mainline/master boot bisection: v4.15-rc3 on peach-pi #3228-staging
From: Javier Martinez Canillas @ 2017-12-12 8:00 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <2139f436-5646-7f9f-a6cb-285a0fd31969@samsung.com>
Hello Marek,
On Tue, Dec 12, 2017 at 8:54 AM, Marek Szyprowski
<m.szyprowski@samsung.com> wrote:
> Hi Shuah,
>
>
> On 2017-12-12 00:25, Shuah Khan wrote:
>>
>> On 12/11/2017 04:02 PM, Russell King - ARM Linux wrote:
>>>
>>> On Mon, Dec 11, 2017 at 10:58:29PM +0000, Russell King - ARM Linux wrote:
>>>>
>>>> On Mon, Dec 11, 2017 at 11:54:48PM +0100, Javier Martinez Canillas
>>>> wrote:
>>>>>
>>>>> So I gave a quick look to this, and at the very least there's a bug in
>>>>> the Exynos5800 Peach Pi DTS caused by commit 1cb686c08d12 ("ARM: dts:
>>>>> exynos: Add status property to Exynos 542x Mixer nodes").
>>>>>
>>>>> I've posted a fix for that:
>>>>>
>>>>> https://patchwork.kernel.org/patch/10105921/
>>>>>
>>>>> I believe this could be also be the cause for the boot failure, since
>>>>> I see in the boot log that things start to go wrong after exynos-drm
>>>>> fails to bind the HDMI component:
>>>>>
>>>>> [ 2.916347] exynos-drm exynos-drm: failed to bind 14530000.hdmi (ops
>>>>> 0xc1398690): -1
>>>>
>>>> Umm, -1 ? Looking that error code up in
>>>> include/uapi/asm-generic/errno-base.h says it's -EPERM.
>>>>
>>>> I suspect that's someone just returning -1 because they're lazy...
>>>> which is real bad form and needs fixing.
>>>
>>> Oh, it really is -EPERM:
>>>
>>> struct exynos_drm_crtc *exynos_drm_crtc_get_by_type(struct drm_device
>>> *drm_dev,
>>> enum exynos_drm_output_type
>>> out_type)
>>> {
>>> struct drm_crtc *crtc;
>>>
>>> drm_for_each_crtc(crtc, drm_dev)
>>> if (to_exynos_crtc(crtc)->type == out_type)
>>> return to_exynos_crtc(crtc);
>>>
>>> return ERR_PTR(-EPERM);
>>> }
>>>
>>> Does "Operation not permitted" really convey the error here? It doesn't
>>> look like a permission error to me.
>>>
>>> Can we please avoid abusing errno codes?
>>
>> I tried 4.15-rc3 on odroid-xu4 after seeing drm issues reported. 4.15-rc2+
>> with top commit g968edbd worked just fine for me last Friday. I ran
>> several
>> tests and everything checked out except the exynos-gsc lockdep issue I
>> sent
>> a 4.14 patch for.
>>
>> However, with 4.15-rc3, dmesg is gets filled with
>>
>> [ 342.337181] [drm] Non-contiguous allocation is not supported without
>> IOMMU, falling back to contiguous buffer
>> [ 342.337470] [drm] Non-contiguous allocation is not supported without
>> IOMMU, falling back to contiguous buffer
>> [ 342.337851] [drm] Non-contiguous allocation is not supported without
>> IOMMU, falling back to contiguous buffer
>> [ 402.382346] [drm] Non-contiguous allocation is not supported without
>> IOMMU, falling back to contiguous buffer
>> [ 402.396682] [drm] Non-contiguous allocation is not supported without
>> IOMMU, falling back to contiguous buffer
>> [ 402.399244] [drm] Non-contiguous allocation is not supported without
>> IOMMU, falling back to contiguous buffer
>> [ 402.399496] [drm] Non-contiguous allocation is not supported without
>> IOMMU, falling back to contiguous buffer
>> [ 402.399848] [drm] Non-contiguous allocation is not supported without
>> IOMMU, falling back to contiguous buffer
>> [ 402.400163] [drm] Non-contiguous allocation is not supported without
>> IOMMU, falling back to contiguous buffer
>> [ 402.400495] [drm] Non-contiguous allocation is not supported without
>> IOMMU, falling back to contiguous buffer
>> [ 402.401294] [drm] Non-contiguous allocation is not supported without
>> IOMMU, falling back to contiguous buffer
>> [ 402.401595] [drm] Non-contiguous allocation is not supported without
>> IOMMU, falling back to contiguous buffer
>>
>> Something broke in 4.15-rc3 on odroix-xu4 badly with exynos_defconfig.
>>
>> I will start bisect and try to isolate the problem. I suspect this is
>> related to dts
>> changes perhaps? I used to this problem a while back and it has been
>> fixed.
>
>
> This warning has been added intentionally, see following discussions:
> https://patchwork.kernel.org/patch/10034919/
> https://patchwork.kernel.org/patch/10070475/
>
> This means that your test apps should be updated or you should enable Exynos
> IOMMU support in your config. Maybe it is a good time to finally enable it
> in exynos_defconfig.
>
Has the issue that the boot-loader keeps the display controller
enabled and scanning pages on the Exynos Chromebooks resolved?
I think that's that preventing to enable it by default in
exynos_defconfig since it caused boot failures when enabled on these
machines. I don't follow exynos development too closely nowadays so
maybe there's a fix in place now.
> Best regards
> --
> Marek Szyprowski, PhD
> Samsung R&D Institute Poland
Best regards,
Javier
^ permalink raw reply
* [PATCH v5 1/8] clocksource: dmtimer: Remove all the exports
From: Ladislav Michl @ 2017-12-12 8:01 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <c6a407a8-41c5-f0fd-931c-a58e7e627c82@ti.com>
On Tue, Dec 12, 2017 at 01:01:51PM +0530, Keerthy wrote:
>
>
> On Tuesday 12 December 2017 12:46 PM, Ladislav Michl wrote:
> > Keerthy,
> >
> > On Tue, Dec 12, 2017 at 11:42:10AM +0530, Keerthy wrote:
> >> Remove all the unwanted exports from the driver
> >
> > I'm adding event capture capability to the pwm-omap driver and so far used
> > v4.15-rc3 as codebase.
> >
> > Intended use is an IR receiver; for that I need to measure pulses width and
> > spaces between pulses. So DM timer was setup to generate interupt after
> > both TCAR1 and TCAR2 are filled, values are passed to IR decoder and
> > TCAR_IT_FLAG is cleared.
> >
> > Of course, this is just proof of concept and needs to be polished and
> > generalized, but to make it at least work I need functions you just
> > unexported (plus some new).
> >
> > Question is whenever we need this level of indirection (omap_dm_timer_ops)
> > or plain exports are enough.
>
> The general guidance is not to do plain exports and go via
> omap_dm_timer_ops.
...in contrary what other clocksource drivers are doing.
Now I'm assuming it is okay to extend omap_dm_timer_ops. That would mean
check for ops members to be assigned should be also extended or we should
delete it altogether and assume all members are populated?
Thanks,
ladis
^ permalink raw reply
* [PATCH v5 1/8] clocksource: dmtimer: Remove all the exports
From: Keerthy @ 2017-12-12 8:08 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171212080134.GA9589@lenoch>
On Tuesday 12 December 2017 01:31 PM, Ladislav Michl wrote:
> On Tue, Dec 12, 2017 at 01:01:51PM +0530, Keerthy wrote:
>>
>>
>> On Tuesday 12 December 2017 12:46 PM, Ladislav Michl wrote:
>>> Keerthy,
>>>
>>> On Tue, Dec 12, 2017 at 11:42:10AM +0530, Keerthy wrote:
>>>> Remove all the unwanted exports from the driver
>>>
>>> I'm adding event capture capability to the pwm-omap driver and so far used
>>> v4.15-rc3 as codebase.
>>>
>>> Intended use is an IR receiver; for that I need to measure pulses width and
>>> spaces between pulses. So DM timer was setup to generate interupt after
>>> both TCAR1 and TCAR2 are filled, values are passed to IR decoder and
>>> TCAR_IT_FLAG is cleared.
>>>
>>> Of course, this is just proof of concept and needs to be polished and
>>> generalized, but to make it at least work I need functions you just
>>> unexported (plus some new).
>>>
>>> Question is whenever we need this level of indirection (omap_dm_timer_ops)
>>> or plain exports are enough.
>>
>> The general guidance is not to do plain exports and go via
>> omap_dm_timer_ops.
>
> ...in contrary what other clocksource drivers are doing.
>
> Now I'm assuming it is okay to extend omap_dm_timer_ops. That would mean
> check for ops members to be assigned should be also extended or we should
> delete it altogether and assume all members are populated?
It should be fine to extend omap_dm_timer_ops. What are the ops missing
for your new implementation?
Tony,
Your thoughts on the above?
Regards,
Keerthy
>
> Thanks,
> ladis
>
^ permalink raw reply
* [PATCH 0/4] ARM: sun8i: a83t: Add support for I2S and I2C
From: Chen-Yu Tsai @ 2017-12-12 8:11 UTC (permalink / raw)
To: linux-arm-kernel
Hi everyone,
This series adds support for I2S and I2C on the Allwinner A83T SoC.
The I2S controllers are similar to the ones found on the A31. However
the TX FIFO and interrupt status registers were swapped around. This
seems to be a recurring theme for the audio related hardware blocks.
Patch 1 adds support for the A83T variant with a compatible string
and associated quirks structure.
Patch 2 adds device nodes and default pinmux settings for the I2S
controllers.
Patch 3 adds device nodes and default pinmux settings for the I2C
controllers.
Patch 4 is an example of a PCM5122 codec tied to I2C2 and I2S1 over
the GPIO header of the Banana Pi M3. This patch should not be merged.
Please have a look.
Regards
ChenYu
Chen-Yu Tsai (4):
ASoC: sun4i-i2s: Add support for A83T
ARM: dts: sun8i: a83t: Add I2S controller device nodes
ARM: dts: sun8i: a83t: Add I2C device nodes and pinmux settings
[DO NOT MERGE] ARM: dts: sun8i: a83t: bpi-m3: Enable PCM5122 codec
with I2S1
.../devicetree/bindings/sound/sun4i-i2s.txt | 2 +
arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts | 33 ++++++++
arch/arm/boot/dts/sun8i-a83t.dtsi | 99 ++++++++++++++++++++++
sound/soc/sunxi/sun4i-i2s.c | 21 +++++
4 files changed, 155 insertions(+)
--
2.15.0
^ permalink raw reply
* [PATCH 1/4] ASoC: sun4i-i2s: Add support for A83T
From: Chen-Yu Tsai @ 2017-12-12 8:11 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171212081148.9194-1-wens@csie.org>
The I2S controller in the A83T is mostly compatible with the one found
in earlier SoCs such as the A20 and A31. While the documents publicly
available for the A83T do not cover this hardware, the officially
released BSP kernel does have register definitions for it. These were
matched against the A20 user manual. The only difference is the TX FIFO
and interrupt status registers have been swapped around, like what we
have seen with the SPDIF controller.
This patch adds support for this hardware.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
.../devicetree/bindings/sound/sun4i-i2s.txt | 2 ++
sound/soc/sunxi/sun4i-i2s.c | 21 +++++++++++++++++++++
2 files changed, 23 insertions(+)
diff --git a/Documentation/devicetree/bindings/sound/sun4i-i2s.txt b/Documentation/devicetree/bindings/sound/sun4i-i2s.txt
index 05d7135a8d2f..b9d50d6cdef3 100644
--- a/Documentation/devicetree/bindings/sound/sun4i-i2s.txt
+++ b/Documentation/devicetree/bindings/sound/sun4i-i2s.txt
@@ -8,6 +8,7 @@ Required properties:
- compatible: should be one of the following:
- "allwinner,sun4i-a10-i2s"
- "allwinner,sun6i-a31-i2s"
+ - "allwinner,sun8i-a83t-i2s"
- "allwinner,sun8i-h3-i2s"
- reg: physical base address of the controller and length of memory mapped
region.
@@ -23,6 +24,7 @@ Required properties:
Required properties for the following compatibles:
- "allwinner,sun6i-a31-i2s"
+ - "allwinner,sun8i-a83t-i2s"
- "allwinner,sun8i-h3-i2s"
- resets: phandle to the reset line for this codec
diff --git a/sound/soc/sunxi/sun4i-i2s.c b/sound/soc/sunxi/sun4i-i2s.c
index bc147e2dcff5..dca1143c1150 100644
--- a/sound/soc/sunxi/sun4i-i2s.c
+++ b/sound/soc/sunxi/sun4i-i2s.c
@@ -921,6 +921,23 @@ static const struct sun4i_i2s_quirks sun6i_a31_i2s_quirks = {
.field_rxchansel = REG_FIELD(SUN4I_I2S_RX_CHAN_SEL_REG, 0, 2),
};
+static const struct sun4i_i2s_quirks sun8i_a83t_i2s_quirks = {
+ .has_reset = true,
+ .reg_offset_txdata = SUN8I_I2S_FIFO_TX_REG,
+ .sun4i_i2s_regmap = &sun4i_i2s_regmap_config,
+ .field_clkdiv_mclk_en = REG_FIELD(SUN4I_I2S_CLK_DIV_REG, 7, 7),
+ .field_fmt_wss = REG_FIELD(SUN4I_I2S_FMT0_REG, 2, 3),
+ .field_fmt_sr = REG_FIELD(SUN4I_I2S_FMT0_REG, 4, 5),
+ .field_fmt_bclk = REG_FIELD(SUN4I_I2S_FMT0_REG, 6, 6),
+ .field_fmt_lrclk = REG_FIELD(SUN4I_I2S_FMT0_REG, 7, 7),
+ .has_slave_select_bit = true,
+ .field_fmt_mode = REG_FIELD(SUN4I_I2S_FMT0_REG, 0, 1),
+ .field_txchanmap = REG_FIELD(SUN4I_I2S_TX_CHAN_MAP_REG, 0, 31),
+ .field_rxchanmap = REG_FIELD(SUN4I_I2S_RX_CHAN_MAP_REG, 0, 31),
+ .field_txchansel = REG_FIELD(SUN4I_I2S_TX_CHAN_SEL_REG, 0, 2),
+ .field_rxchansel = REG_FIELD(SUN4I_I2S_RX_CHAN_SEL_REG, 0, 2),
+};
+
static const struct sun4i_i2s_quirks sun8i_h3_i2s_quirks = {
.has_reset = true,
.reg_offset_txdata = SUN8I_I2S_FIFO_TX_REG,
@@ -1144,6 +1161,10 @@ static const struct of_device_id sun4i_i2s_match[] = {
.compatible = "allwinner,sun6i-a31-i2s",
.data = &sun6i_a31_i2s_quirks,
},
+ {
+ .compatible = "allwinner,sun8i-a83t-i2s",
+ .data = &sun8i_a83t_i2s_quirks,
+ },
{
.compatible = "allwinner,sun8i-h3-i2s",
.data = &sun8i_h3_i2s_quirks,
--
2.15.0
^ permalink raw reply related
* [PATCH 2/4] ARM: dts: sun8i: a83t: Add I2S controller device nodes
From: Chen-Yu Tsai @ 2017-12-12 8:11 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171212081148.9194-1-wens@csie.org>
The A83T has 3 I2S controllers. The first is multiplexed with the TDM
controller. The pins are generally connected to the codec side of the
AXP81x PMIC/codec/RTC chip. The second is free for other uses. The
third only supports output, and is connected internally to the HDMI
controller for HDMI audio output.
This patch adds device nodes for the controllers, and a default pinmux
setting for the second controller.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 47 +++++++++++++++++++++++++++++++++++++++
1 file changed, 47 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
index a384b766f3dc..354cb4b48f47 100644
--- a/arch/arm/boot/dts/sun8i-a83t.dtsi
+++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
@@ -348,6 +348,12 @@
drive-strength = <40>;
};
+ i2s1_pins: i2s1-pins {
+ /* I2S1 does not have external MCLK pin */
+ pins = "PG10", "PG11", "PG12", "PG13";
+ function = "i2s1";
+ };
+
mmc0_pins: mmc0-pins {
pins = "PF0", "PF1", "PF2",
"PF3", "PF4", "PF5";
@@ -430,6 +436,47 @@
status = "disabled";
};
+ i2s0: i2s at 1c22000 {
+ #sound-dai-cells = <0>;
+ compatible = "allwinner,sun8i-a83t-i2s";
+ reg = <0x01c22000 0x400>;
+ interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_I2S0>, <&ccu CLK_I2S0>;
+ clock-names = "apb", "mod";
+ dmas = <&dma 3>, <&dma 3>;
+ resets = <&ccu RST_BUS_I2S0>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
+
+ i2s1: i2s at 1c22400 {
+ #sound-dai-cells = <0>;
+ compatible = "allwinner,sun8i-a83t-i2s";
+ reg = <0x01c22400 0x400>;
+ interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_I2S1>, <&ccu CLK_I2S1>;
+ clock-names = "apb", "mod";
+ dmas = <&dma 4>, <&dma 4>;
+ resets = <&ccu RST_BUS_I2S1>;
+ dma-names = "rx", "tx";
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2s1_pins>;
+ status = "disabled";
+ };
+
+ i2s2: i2s at 1c22800 {
+ #sound-dai-cells = <0>;
+ compatible = "allwinner,sun8i-a83t-i2s";
+ reg = <0x01c22800 0x400>;
+ interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_I2S2>, <&ccu CLK_I2S2>;
+ clock-names = "apb", "mod";
+ dmas = <&dma 27>;
+ resets = <&ccu RST_BUS_I2S2>;
+ dma-names = "tx";
+ status = "disabled";
+ };
+
uart0: serial at 1c28000 {
compatible = "snps,dw-apb-uart";
reg = <0x01c28000 0x400>;
--
2.15.0
^ permalink raw reply related
* [PATCH 3/4] ARM: dts: sun8i: a83t: Add I2C device nodes and pinmux settings
From: Chen-Yu Tsai @ 2017-12-12 8:11 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171212081148.9194-1-wens@csie.org>
The A83T has 3 I2C controllers under the standard bus. There is one
more in the R_ block section. The pin functions for the 3 controllers
are on PH 0~6. I2C2 can also be used on pins PE14 and PE15, but these
pins can also mux the CSI (camera sensor interface) controller's
embedded I2C controller. The latter seems to be preferred in the
reference designs for I2C camera sensor access, freeing I2C2 for other
uses.
This patch adds device nodes for the three standard I2C controllers,
as well as pinmux settings for the PH pins. For I2C0 and I2C1, since
they only have one possible setting, just set them by default.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 52 +++++++++++++++++++++++++++++++++++++++
1 file changed, 52 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
index 354cb4b48f47..b8c5f0a2c463 100644
--- a/arch/arm/boot/dts/sun8i-a83t.dtsi
+++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
@@ -348,6 +348,21 @@
drive-strength = <40>;
};
+ i2c0_pins: i2c0-pins {
+ pins = "PH0", "PH1";
+ function = "i2c0";
+ };
+
+ i2c1_pins: i2c1-pins {
+ pins = "PH2", "PH3";
+ function = "i2c1";
+ };
+
+ i2c2_ph_pins: i2c2-ph-pins {
+ pins = "PH4", "PH5";
+ function = "i2c2";
+ };
+
i2s1_pins: i2s1-pins {
/* I2S1 does not have external MCLK pin */
pins = "PG10", "PG11", "PG12", "PG13";
@@ -499,6 +514,43 @@
status = "disabled";
};
+ i2c0: i2c at 1c2ac00 {
+ compatible = "allwinner,sun6i-a31-i2c";
+ reg = <0x01c2ac00 0x400>;
+ interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_I2C0>;
+ resets = <&ccu RST_BUS_I2C0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0_pins>;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ i2c1: i2c at 1c2b000 {
+ compatible = "allwinner,sun6i-a31-i2c";
+ reg = <0x01c2b000 0x400>;
+ interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_I2C1>;
+ resets = <&ccu RST_BUS_I2C1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c1_pins>;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ i2c2: i2c at 1c2b400 {
+ compatible = "allwinner,sun6i-a31-i2c";
+ reg = <0x01c2b400 0x400>;
+ interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_I2C2>;
+ resets = <&ccu RST_BUS_I2C2>;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
emac: ethernet at 1c30000 {
compatible = "allwinner,sun8i-a83t-emac";
syscon = <&syscon>;
--
2.15.0
^ permalink raw reply related
* [PATCH 4/4] [DO NOT MERGE] ARM: dts: sun8i: a83t: bpi-m3: Enable PCM5122 codec with I2S1
From: Chen-Yu Tsai @ 2017-12-12 8:11 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171212081148.9194-1-wens@csie.org>
This patch enables a PiFi DAC+ V2.0, which is a PCM5122-based audio
output DAC add-on board for the Raspberry Pi B+ and later, connected
to the GPIO header of the Bananapi M3 via jumper cables. The power,
ground, and I2C pins are in the same position, but the I2S ones are
not.
The I2C controller used is I2C2, while the I2S controller is I2S1.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
I'm sure I've asked this before, and IIRC the answer was yes: The I2C
controllers available on the GPIO header all have proper, always-on,
external pull-ups. Does that mean we can enable them by default, seeing
as they are likely intended to be used this way (as I2C pins)?
I think we have a few boards where either I2C or UARTs on the GPIO
header are enabled by default.
---
arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts | 33 ++++++++++++++++++++++++++++
1 file changed, 33 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts b/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts
index 6550bf0e594b..a9a208ebda12 100644
--- a/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts
+++ b/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts
@@ -70,6 +70,23 @@
gpio = <&pio 3 24 GPIO_ACTIVE_HIGH>; /* PD24 */
};
+ sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,name = "PiFi DAC+ v2.0";
+ simple-audio-card,format = "i2s";
+ simple-audio-card,mclk-fs = <512>;
+ simple-audio-card,frame-master = <&link_cpu>;
+ simple-audio-card,bitclock-master = <&link_cpu>;
+
+ link_cpu: simple-audio-card,cpu {
+ sound-dai = <&i2s1>;
+ };
+
+ simple-audio-card,codec {
+ sound-dai = <&pcm5122>;
+ };
+ };
+
wifi_pwrseq: wifi_pwrseq {
compatible = "mmc-pwrseq-simple";
clocks = <&ac100_rtc 1>;
@@ -100,6 +117,22 @@
status = "okay";
};
+&i2c2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c2_ph_pins>;
+ status = "okay";
+
+ pcm5122: pcm5122 at 4d {
+ #sound-dai-cells = <0>;
+ compatible = "ti,pcm5122";
+ reg = <0x4d>;
+ };
+};
+
+&i2s1 {
+ status = "okay";
+};
+
&mdio {
rgmii_phy: ethernet-phy at 1 {
compatible = "ethernet-phy-ieee802.3-c22";
--
2.15.0
^ permalink raw reply related
* [PATCH] arm64: allwinner: a64: a64-olinuxino: add usb otg
From: Maxime Ripard @ 2017-12-12 8:13 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1513058169-25516-1-git-send-email-jagan@amarulasolutions.com>
Hi,
On Tue, Dec 12, 2017 at 11:26:09AM +0530, Jagan Teki wrote:
> Add usb otg support for a64-olinuxino board,
> - USB0-ID connected with PH9
> - USB0-VBUSDET connected with PH6
> - USB-DRVVBUS controlled by N_VBUSEN pin from PMIC
>
> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
How was this tested? Did you test the OTG part, or only the peripheral
part?
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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^ permalink raw reply
* [PATCH v5 1/8] clocksource: dmtimer: Remove all the exports
From: Ladislav Michl @ 2017-12-12 8:19 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <9de9b3dc-09f4-d58b-ba5a-60fcb563c665@ti.com>
On Tue, Dec 12, 2017 at 01:38:04PM +0530, Keerthy wrote:
> On Tuesday 12 December 2017 01:31 PM, Ladislav Michl wrote:
> > On Tue, Dec 12, 2017 at 01:01:51PM +0530, Keerthy wrote:
> >>
> >>
> >> On Tuesday 12 December 2017 12:46 PM, Ladislav Michl wrote:
> >>> Keerthy,
> >>>
> >>> On Tue, Dec 12, 2017 at 11:42:10AM +0530, Keerthy wrote:
> >>>> Remove all the unwanted exports from the driver
> >>>
> >>> I'm adding event capture capability to the pwm-omap driver and so far used
> >>> v4.15-rc3 as codebase.
> >>>
> >>> Intended use is an IR receiver; for that I need to measure pulses width and
> >>> spaces between pulses. So DM timer was setup to generate interupt after
> >>> both TCAR1 and TCAR2 are filled, values are passed to IR decoder and
> >>> TCAR_IT_FLAG is cleared.
> >>>
> >>> Of course, this is just proof of concept and needs to be polished and
> >>> generalized, but to make it at least work I need functions you just
> >>> unexported (plus some new).
> >>>
> >>> Question is whenever we need this level of indirection (omap_dm_timer_ops)
> >>> or plain exports are enough.
> >>
> >> The general guidance is not to do plain exports and go via
> >> omap_dm_timer_ops.
> >
> > ...in contrary what other clocksource drivers are doing.
> >
> > Now I'm assuming it is okay to extend omap_dm_timer_ops. That would mean
> > check for ops members to be assigned should be also extended or we should
> > delete it altogether and assume all members are populated?
>
> It should be fine to extend omap_dm_timer_ops. What are the ops missing
> for your new implementation?
Read capture registers, configure capture and ack interrupt. Perhaps set_pwm
could be extended to configure capture as well.
I'll update my code on top of your changes and we'll see how it would work.
> Tony,
>
> Your thoughts on the above?
>
> R
^ permalink raw reply
* [PATCH 0/4] Sunxi: Add SMP support on A83T
From: Mylene JOSSERAND @ 2017-12-12 8:19 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171211193534.GA3967@Red>
Hello Corentin,
Le Mon, 11 Dec 2017 20:35:34 +0100,
Corentin Labbe <clabbe.montjoie@gmail.com> a ?crit :
> On Mon, Dec 11, 2017 at 08:49:57AM +0100, Myl?ne Josserand wrote:
> > Hello everyone,
> >
> > This series adds SMP support for Allwinner Sun8i-a83t
> > with MCPM (Multi-Cluster Power Management).
> > Series information:
> > - Based on last linux-next (next-20171211)
> > - Had dependencies on Chen Yu's patch that add MCPM
> > support:
> > https://patchwork.kernel.org/patch/6402801/
> >
> > Patch 01: Convert the mcpm driver (initially for A80) to be able
> > to use it for A83T. This SoC has a bit flip that needs to be
> > handled. Patch 02: Add registers nodes (prcm, cpucfg and r_cpucfg)
> > needed for MCPM.
> > Patch 03: Add CCI-400 node for a83t.
> > Patch 04: Fix the use of virtual timers that hangs the kernel in
> > case of SMP support.
> >
> > If you have any remarks/questions, let me know.
> > Thank you in advance,
> > Myl?ne
> >
>
> Hello
>
> As we discussed in private, Chen Yu's patch should be added in your
> series.
Yep, I will do that.
>
> Furthermore, MCPM is not automaticaly selected via imply.
It is selected if you run again a sunxi_defconfig. I guess I can change
to "select".
>
> With all patchs I hit a bug:
> [ 0.898668] BUG: sleeping function called from invalid context at
> kernel/locking/mutex.c:238 [ 0.911162] in_atomic(): 1,
> irqs_disabled(): 0, pid: 1, name: swapper/0 [ 0.917776] CPU: 0
> PID: 1 Comm: swapper/0 Not tainted 4.15.0-rc2-next-20171211+ #73
> [ 0.925418] Hardware name: Allwinner sun8i Family [ 0.930118]
> Backtrace: [ 0.932596] [<c010cc50>] (dump_backtrace) from
> [<c010cf0c>] (show_stack+0x18/0x1c) [ 0.940158] r7:c0b261e4
> r6:60000013 r5:00000000 r4:c0b51958 [ 0.945820] [<c010cef4>]
> (show_stack) from [<c06baccc>] (dump_stack+0x8c/0xa0) [ 0.953045]
> [<c06bac40>] (dump_stack) from [<c0149d40>]
> (___might_sleep+0x150/0x170) [ 0.960779] r7:c0b261e4 r6:00000000
> r5:000000ee r4:ee844000 [ 0.966437] [<c0149bf0>] (___might_sleep)
> from [<c0149dc8>] (__might_sleep+0x68/0xa0) [ 0.974253]
> r4:c0861690 [ 0.976796] [<c0149d60>] (__might_sleep) from
> [<c06d2918>] (mutex_lock+0x24/0x68) [ 0.984269] r6:c0892f6c
> r5:ffffffff r4:c0b1bb24 [ 0.988891] [<c06d28f4>] (mutex_lock) from
> [<c01ccb6c>] (perf_pmu_register+0x24/0x3e4) [ 0.996795]
> r5:ffffffff r4:ee98b014 [ 1.000375] [<c01ccb48>]
> (perf_pmu_register) from [<c03efabc>] (cci_pmu_probe+0x340/0x484)
> [ 1.008631] r10:c0892f6c r9:c0bfd5f0 r8:eea19010 r7:c0b261e4
> r6:c0b26240 r5:eea19000 [ 1.016447] r4:ee98b010 [ 1.018989]
> [<c03ef77c>] (cci_pmu_probe) from [<c045e21c>]
> (platform_drv_probe+0x58/0xb8) [ 1.027158] r10:00000000
> r9:c0b2610c r8:00000000 r7:fffffdfb r6:c0b2610c r5:ffffffed
> [ 1.034974] r4:eea19010 [ 1.037511] [<c045e1c4>]
> (platform_drv_probe) from [<c045c984>]
> (driver_probe_device+0x254/0x330) [ 1.046371] r7:00000000
> r6:c0bff498 r5:c0bff494 r4:eea19010 [ 1.052026] [<c045c730>]
> (driver_probe_device) from [<c045cbc4>]
> (__device_attach_driver+0xa0/0xd4) [ 1.061062] r10:00000000
> r9:c0bff470 r8:00000000 r7:00000001 r6:eea19010 r5:ee845ac0
> [ 1.068879] r4:c0b2610c r3:00000000 [ 1.072454] [<c045cb24>]
> (__device_attach_driver) from [<c045ad68>]
> (bus_for_each_drv+0x68/0x9c) [ 1.081228] r7:00000001 r6:c045cb24
> r5:ee845ac0 r4:00000000 [ 1.086883] [<c045ad00>]
> (bus_for_each_drv) from [<c045c60c>] (__device_attach+0xb8/0x11c)
> [ 1.095135] r6:c0b3e848 r5:eea19044 r4:eea19010 [ 1.099750]
> [<c045c554>] (__device_attach) from [<c045cc44>]
> (device_initial_probe+0x14/0x18) [ 1.108263] r7:c0b0a4c8
> r6:c0b3e848 r5:eea19010 r4:eea19018 [ 1.113919] [<c045cc30>]
> (device_initial_probe) from [<c045bb58>] (bus_probe_device+0x8c/0x94)
> [ 1.122523] [<c045bacc>] (bus_probe_device) from [<c0459db8>]
> (device_add+0x40c/0x5a0) [ 1.130429] r7:c0b0a4c8 r6:eea19010
> r5:eea18a10 r4:eea19018 [ 1.136089] [<c04599ac>] (device_add) from
> [<c0582a58>] (of_device_add+0x3c/0x44) [ 1.143564] r10:00000000
> r9:00000000 r8:00000000 r7:eedf21a4 r6:eea18a10 r5:00000000
> [ 1.151380] r4:eea19000 [ 1.153915] [<c0582a1c>]
> (of_device_add) from [<c0582f80>]
> (of_platform_device_create_pdata+0x7c/0xac) [ 1.163210]
> [<c0582f04>] (of_platform_device_create_pdata) from [<c0583100>]
> (of_platform_bus_create+0xf4/0x1f0) [ 1.173372] r9:00000000
> r8:00000000 r7:00000001 r6:00000000 r5:eedf2154 r4:00000000
> [ 1.181107] [<c058300c>] (of_platform_bus_create) from
> [<c0583374>] (of_platform_populate+0x74/0xd4) [ 1.190229]
> r10:00000001 r9:eea18a10 r8:00000000 r7:00000000 r6:00000000
> r5:eedf1d04 [ 1.198045] r4:eedf2154 [ 1.200580] [<c0583300>]
> (of_platform_populate) from [<c03ef2a8>]
> (cci_platform_probe+0x3c/0x54) [ 1.209356] r10:00000000
> r9:c0b26168 r8:00000000 r7:fffffdfb r6:c0b26168 r5:ffffffed
> [ 1.217172] r4:eea18a00 [ 1.219708] [<c03ef26c>]
> (cci_platform_probe) from [<c045e21c>] (platform_drv_probe+0x58/0xb8)
> [ 1.228306] r5:ffffffed r4:eea18a10 [ 1.231881] [<c045e1c4>]
> (platform_drv_probe) from [<c045c984>]
> (driver_probe_device+0x254/0x330) [ 1.240742] r7:00000000
> r6:c0bff498 r5:c0bff494 r4:eea18a10 [ 1.246397] [<c045c730>]
> (driver_probe_device) from [<c045cbc4>]
> (__device_attach_driver+0xa0/0xd4) [ 1.255433] r10:00000000
> r9:c0bff470 r8:00000000 r7:00000001 r6:eea18a10 r5:ee845ce8
> [ 1.263250] r4:c0b26168 r3:00000000 [ 1.266825] [<c045cb24>]
> (__device_attach_driver) from [<c045ad68>]
> (bus_for_each_drv+0x68/0x9c) [ 1.275598] r7:00000001 r6:c045cb24
> r5:ee845ce8 r4:00000000 [ 1.281253] [<c045ad00>]
> (bus_for_each_drv) from [<c045c60c>] (__device_attach+0xb8/0x11c)
> [ 1.289506] r6:c0b3e848 r5:eea18a44 r4:eea18a10 [ 1.294120]
> [<c045c554>] (__device_attach) from [<c045cc44>]
> (device_initial_probe+0x14/0x18) [ 1.302633] r7:c0b0a4c8
> r6:c0b3e848 r5:eea18a10 r4:eea18a18 [ 1.308288] [<c045cc30>]
> (device_initial_probe) from [<c045bb58>] (bus_probe_device+0x8c/0x94)
> [ 1.316890] [<c045bacc>] (bus_probe_device) from [<c0459db8>]
> (device_add+0x40c/0x5a0) [ 1.324796] r7:c0b0a4c8 r6:eea18a10
> r5:ee993810 r4:eea18a18 [ 1.330450] [<c04599ac>] (device_add) from
> [<c0582a58>] (of_device_add+0x3c/0x44) [ 1.337926] r10:00000000
> r9:c07759d8 r8:00000000 r7:eedf1d54 r6:ee993810 r5:00000000
> [ 1.345743] r4:eea18a00 [ 1.348277] [<c0582a1c>]
> (of_device_add) from [<c0582f80>]
> (of_platform_device_create_pdata+0x7c/0xac) [ 1.357572]
> [<c0582f04>] (of_platform_device_create_pdata) from [<c0583100>]
> (of_platform_bus_create+0xf4/0x1f0) [ 1.367734] r9:c07759d8
> r8:00000000 r7:00000001 r6:00000000 r5:eedf1d04 r4:00000000
> [ 1.375469] [<c058300c>] (of_platform_bus_create) from
> [<c058315c>] (of_platform_bus_create+0x150/0x1f0) [ 1.384938]
> r10:ee993810 r9:c07759d8 r8:00000000 r7:00000001 r6:00000000
> r5:eedefe1c [ 1.392754] r4:eedf1d04 [ 1.395289] [<c058300c>]
> (of_platform_bus_create) from [<c0583374>]
> (of_platform_populate+0x74/0xd4) [ 1.404411] r10:00000001
> r9:00000000 r8:00000000 r7:c07759d8 r6:00000000 r5:eedee844
> [ 1.412228] r4:eedefe1c [ 1.414769] [<c0583300>]
> (of_platform_populate) from [<c0a25ee8>]
> (of_platform_default_populate_init+0x80/0x94) [ 1.424844]
> r10:c0a37848 r9:00000000 r8:c0b59680 r7:c0a37834 r6:ffffe000
> r5:c0775ce8 [ 1.432661] r4:00000000 [ 1.435200] [<c0a25e68>]
> (of_platform_default_populate_init) from [<c0102794>]
> (do_one_initcall+0x5c/0x194) [ 1.444925] r5:c0a25e68 r4:c0b0a4c8
> [ 1.448506] [<c0102738>] (do_one_initcall) from [<c0a00f88>]
> (kernel_init_freeable+0x1d4/0x268) [ 1.457195] r9:00000004
> r8:c0b59680 r7:c0a37834 r6:c0b59680 r5:c0a47308 r4:c090cfb8
> [ 1.464932] [<c0a00db4>] (kernel_init_freeable) from [<c06cf3b0>]
> (kernel_init+0x10/0x118) [ 1.473187] r10:00000000 r9:00000000
> r8:00000000 r7:00000000 r6:00000000 r5:c06cf3a0 [ 1.481004]
> r4:00000000 [ 1.483540] [<c06cf3a0>] (kernel_init) from
> [<c01010e8>] (ret_from_fork+0x14/0x2c) [ 1.491098] Exception
> stack(0xee845fb0 to 0xee845ff8) [ 1.496146]
> 5fa0: 00000000 00000000 00000000
> 00000000 [ 1.504313] 5fc0: 00000000 00000000 00000000 00000000
> 00000000 00000000 00000000 00000000 [ 1.512480] 5fe0: 00000000
> 00000000 00000000 00000000 00000013 00000000 [ 1.519084]
> r5:c06cf3a0 r4:00000000 [ 1.522737] ARM CCI_400_r1 PMU driver
> probed
>
> And only CPU 0 show up.
I am really sorry about that. I tested the patches but not with my last
modifications, I guess...
I will fix it in a V2.
Thank you for reporting the bug.
Best regards,
--
Myl?ne Josserand, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
^ permalink raw reply
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