* [PATCH v3 4/9] ARM: dts: imx7-colibri: use NAND_CE1 as GPIO
From: Stefan Agner @ 2017-12-19 18:10 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171219181038.1369-1-stefan@agner.ch>
All Colibri iMX7 SKUs use either single-die NAND or eMMC, hence
NAND_CE1 is not used on the module and can be used as a GPIO by
carrier boards.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
---
arch/arm/boot/dts/imx7-colibri.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi b/arch/arm/boot/dts/imx7-colibri.dtsi
index e4e32aa786f4..f61041af026a 100644
--- a/arch/arm/boot/dts/imx7-colibri.dtsi
+++ b/arch/arm/boot/dts/imx7-colibri.dtsi
@@ -329,6 +329,7 @@
MX7D_PAD_EPDC_SDCE2__GPIO2_IO22 0x14 /* SODIMM 127 */
MX7D_PAD_UART3_RTS_B__GPIO4_IO6 0x14 /* SODIMM 131 */
MX7D_PAD_EPDC_GDRL__GPIO2_IO26 0x14 /* SODIMM 133 */
+ MX7D_PAD_SAI1_RX_DATA__GPIO6_IO12 0x14 /* SODIMM 169 */
MX7D_PAD_SAI1_RX_BCLK__GPIO6_IO17 0x14 /* SODIMM 24 */
MX7D_PAD_SD2_DATA2__GPIO5_IO16 0x14 /* SODIMM 100 */
MX7D_PAD_SD2_DATA3__GPIO5_IO17 0x14 /* SODIMM 102 */
@@ -439,7 +440,6 @@
MX7D_PAD_SD3_CLK__NAND_CLE 0x71
MX7D_PAD_SD3_CMD__NAND_ALE 0x71
MX7D_PAD_SAI1_TX_BCLK__NAND_CE0_B 0x71
- MX7D_PAD_SAI1_RX_DATA__NAND_CE1_B 0x71
MX7D_PAD_SAI1_TX_DATA__NAND_READY_B 0x74
MX7D_PAD_SD3_STROBE__NAND_RE_B 0x71
MX7D_PAD_SD3_RESET_B__NAND_WE_B 0x71
--
2.15.1
^ permalink raw reply related
* [PATCH v3 5/9] ARM: dts: imx7-colibri: specify cpu-supply
From: Stefan Agner @ 2017-12-19 18:10 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171219181038.1369-1-stefan@agner.ch>
Specify CPU supply using the "cpu-supply" property instead of
the invalid "arm-supply" property.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
---
arch/arm/boot/dts/imx7-colibri.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi b/arch/arm/boot/dts/imx7-colibri.dtsi
index f61041af026a..6498c1136ef1 100644
--- a/arch/arm/boot/dts/imx7-colibri.dtsi
+++ b/arch/arm/boot/dts/imx7-colibri.dtsi
@@ -86,7 +86,7 @@
};
&cpu0 {
- arm-supply = <®_DCDC2>;
+ cpu-supply = <®_DCDC2>;
};
&fec1 {
--
2.15.1
^ permalink raw reply related
* [PATCH v3 6/9] ARM: dts: imx7-colibri: specify usdhc1 supplies
From: Stefan Agner @ 2017-12-19 18:10 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171219181038.1369-1-stefan@agner.ch>
The usdhc1 controller instance is used to provide the default
SD/MMC capabilities of the Colibri standard. The IO pins are
supplied to the SoC on the module whereas the SD-card is powered
by the Carrier Board supply.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
---
arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi | 1 +
arch/arm/boot/dts/imx7-colibri.dtsi | 1 +
2 files changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
index 5ecb3a858c5a..87c23b769a08 100644
--- a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
+++ b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
@@ -158,5 +158,6 @@
&usdhc1 {
keep-power-in-suspend;
wakeup-source;
+ vmmc-supply = <®_3v3>;
status = "okay";
};
diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi b/arch/arm/boot/dts/imx7-colibri.dtsi
index 6498c1136ef1..d623ef0f6e3e 100644
--- a/arch/arm/boot/dts/imx7-colibri.dtsi
+++ b/arch/arm/boot/dts/imx7-colibri.dtsi
@@ -299,6 +299,7 @@
no-1-8-v;
cd-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
disable-wp;
+ vqmmc-supply = <®_LDO2>;
};
&iomuxc {
--
2.15.1
^ permalink raw reply related
* [PATCH v3 7/9] ARM: dts: imx7-colibri: specify backlight GPIO
From: Stefan Agner @ 2017-12-19 18:10 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171219181038.1369-1-stefan@agner.ch>
The Colibri standard defines SODIMM 71 as backlight enable
GPIO. Assign the GPIO to the backlight node in the module
level device tree.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
---
arch/arm/boot/dts/imx7-colibri.dtsi | 10 +++++++++-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi b/arch/arm/boot/dts/imx7-colibri.dtsi
index d623ef0f6e3e..689ff6822634 100644
--- a/arch/arm/boot/dts/imx7-colibri.dtsi
+++ b/arch/arm/boot/dts/imx7-colibri.dtsi
@@ -43,7 +43,10 @@
/ {
bl: backlight {
compatible = "pwm-backlight";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpio_bl_on>;
pwms = <&pwm1 0 5000000 0>;
+ enable-gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
};
reg_module_3v3: regulator-module-3v3 {
@@ -360,7 +363,6 @@
fsl,pins = <
MX7D_PAD_ECSPI2_SS0__GPIO4_IO23 0x14 /* SODIMM 65 */
MX7D_PAD_SD1_CD_B__GPIO5_IO0 0x74 /* SODIMM 69 */
- MX7D_PAD_SD1_WP__GPIO5_IO1 0x14 /* SODIMM 71 */
MX7D_PAD_I2C4_SDA__GPIO4_IO15 0x14 /* SODIMM 75 */
MX7D_PAD_ECSPI1_MISO__GPIO4_IO18 0x14 /* SODIMM 79 */
MX7D_PAD_I2C3_SCL__GPIO4_IO12 0x14 /* SODIMM 81 */
@@ -436,6 +438,12 @@
>;
};
+ pinctrl_gpio_bl_on: gpio-bl-on {
+ fsl,pins = <
+ MX7D_PAD_SD1_WP__GPIO5_IO1 0x14 /* SODIMM 71 */
+ >;
+ };
+
pinctrl_gpmi_nand: gpmi-nand-grp {
fsl,pins = <
MX7D_PAD_SD3_CLK__NAND_CLE 0x71
--
2.15.1
^ permalink raw reply related
* [PATCH v3 8/9] ARM: dts: imx7-colibri: add MCP2515 CAN controller
From: Stefan Agner @ 2017-12-19 18:10 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171219181038.1369-1-stefan@agner.ch>
The Colibri Evaluation Carrier Board provides a MCP2515 CAN
controller connected via SPI. Note that the i.MX 7 provides
an internal CAN controller which is much better suited for CAN
operations. Using the MCP2515 with a Colibri iMX7 module is
mainly useful to test the SPI interface.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
---
Changes since v1:
- Changed label and node name for MCP2515
- Drop num-cs from ecspi3
arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi | 25 +++++++++++++++++++++++++
arch/arm/boot/dts/imx7-colibri.dtsi | 13 ++++++++++++-
2 files changed, 37 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
index 87c23b769a08..e2b99bb48250 100644
--- a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
+++ b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
@@ -45,6 +45,13 @@
stdout-path = "serial0:115200n8";
};
+ /* fixed crystal dedicated to mpc258x */
+ clk16m: clk16m {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <16000000>;
+ };
+
panel: panel {
compatible = "edt,et057090dhu";
backlight = <&bl>;
@@ -99,6 +106,24 @@
status = "okay";
};
+&ecspi3 {
+ status = "okay";
+
+ mcp2515: can at 0 {
+ compatible = "microchip,mcp2515";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_can_int>;
+ reg = <0>;
+ clocks = <&clk16m>;
+ interrupt-parent = <&gpio5>;
+ interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
+ spi-max-frequency = <10000000>;
+ vdd-supply = <®_3v3>;
+ xceiver-supply = <®_5v0>;
+ status = "okay";
+ };
+};
+
&fec1 {
status = "okay";
};
diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi b/arch/arm/boot/dts/imx7-colibri.dtsi
index 689ff6822634..c28a483b786d 100644
--- a/arch/arm/boot/dts/imx7-colibri.dtsi
+++ b/arch/arm/boot/dts/imx7-colibri.dtsi
@@ -92,6 +92,12 @@
cpu-supply = <®_DCDC2>;
};
+&ecspi3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ecspi3 &pinctrl_ecspi3_cs>;
+ cs-gpios = <&gpio4 11 GPIO_ACTIVE_HIGH>;
+};
+
&fec1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet1>;
@@ -313,7 +319,6 @@
fsl,pins = <
MX7D_PAD_ENET1_RGMII_RD3__GPIO7_IO3 0x74 /* SODIMM 55 */
MX7D_PAD_ENET1_RGMII_RD2__GPIO7_IO2 0x74 /* SODIMM 63 */
- MX7D_PAD_SD1_RESET_B__GPIO5_IO2 0X14 /* SODIMM 73 */
MX7D_PAD_SAI1_RX_SYNC__GPIO6_IO16 0x14 /* SODIMM 77 */
MX7D_PAD_EPDC_DATA09__GPIO2_IO9 0x14 /* SODIMM 89 */
MX7D_PAD_EPDC_DATA08__GPIO2_IO8 0x74 /* SODIMM 91 */
@@ -400,6 +405,12 @@
>;
};
+ pinctrl_can_int: can-int-grp {
+ fsl,pins = <
+ MX7D_PAD_SD1_RESET_B__GPIO5_IO2 0X14 /* SODIMM 73 */
+ >;
+ };
+
pinctrl_enet1: enet1grp {
fsl,pins = <
MX7D_PAD_ENET1_CRS__GPIO7_IO14 0x14
--
2.15.1
^ permalink raw reply related
* [PATCH v3 9/9] ARM: dts: imx7: add Toradex Colibri iMX7D 1GB (eMMC) support
From: Stefan Agner @ 2017-12-19 18:10 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171219181038.1369-1-stefan@agner.ch>
Add support for the Computer on Module Colibri iMX7D 1GB along
with the Colibri Evaluation Board device trees. Follow the usual
hierarchic include model, maintaining shared configuration in
imx7-colibri.dtsi and imx7-colibri-eval-v3.dtsi respectively.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
---
Changes since v2:
- Fix SPDX header location and use GPL-2.0 only license
Changes since v1:
- Use SPDX-License-Identifier: (GPL-2.0+ OR MIT)
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/imx7-colibri.dtsi | 64 +++++++++++++++++++++++-
arch/arm/boot/dts/imx7d-colibri-emmc-eval-v3.dts | 19 +++++++
arch/arm/boot/dts/imx7d-colibri-emmc.dtsi | 21 ++++++++
arch/arm/boot/dts/imx7d-colibri.dtsi | 4 ++
5 files changed, 108 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/boot/dts/imx7d-colibri-emmc-eval-v3.dts
create mode 100644 arch/arm/boot/dts/imx7d-colibri-emmc.dtsi
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index b5ba7ad6ae30..9e4b4ecae572 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -519,6 +519,7 @@ dtb-$(CONFIG_SOC_IMX6UL) += \
imx6ull-14x14-evk.dtb
dtb-$(CONFIG_SOC_IMX7D) += \
imx7d-cl-som-imx7.dtb \
+ imx7d-colibri-emmc-eval-v3.dtb \
imx7d-colibri-eval-v3.dtb \
imx7d-nitrogen7.dtb \
imx7d-pico.dtb \
diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi b/arch/arm/boot/dts/imx7-colibri.dtsi
index c28a483b786d..895fbde4d433 100644
--- a/arch/arm/boot/dts/imx7-colibri.dtsi
+++ b/arch/arm/boot/dts/imx7-colibri.dtsi
@@ -121,7 +121,6 @@
fsl,use-minimum-ecc;
nand-on-flash-bbt;
nand-ecc-mode = "hw";
- status = "okay";
};
&i2c1 {
@@ -311,6 +310,21 @@
vqmmc-supply = <®_LDO2>;
};
+&usdhc3 {
+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
+ pinctrl-0 = <&pinctrl_usdhc3>;
+ pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
+ pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
+ assigned-clocks = <&clks IMX7D_USDHC3_ROOT_CLK>;
+ assigned-clock-rates = <400000000>;
+ bus-width = <8>;
+ fsl,tuning-step = <2>;
+ max-frequency = <100000000>;
+ vmmc-supply = <®_module_3v3>;
+ vqmmc-supply = <®_DCDC3>;
+ non-removable;
+};
+
&iomuxc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio1 &pinctrl_gpio2 &pinctrl_gpio3 &pinctrl_gpio4>;
@@ -598,6 +612,54 @@
>;
};
+ pinctrl_usdhc3: usdhc3grp {
+ fsl,pins = <
+ MX7D_PAD_SD3_CMD__SD3_CMD 0x59
+ MX7D_PAD_SD3_CLK__SD3_CLK 0x19
+ MX7D_PAD_SD3_DATA0__SD3_DATA0 0x59
+ MX7D_PAD_SD3_DATA1__SD3_DATA1 0x59
+ MX7D_PAD_SD3_DATA2__SD3_DATA2 0x59
+ MX7D_PAD_SD3_DATA3__SD3_DATA3 0x59
+ MX7D_PAD_SD3_DATA4__SD3_DATA4 0x59
+ MX7D_PAD_SD3_DATA5__SD3_DATA5 0x59
+ MX7D_PAD_SD3_DATA6__SD3_DATA6 0x59
+ MX7D_PAD_SD3_DATA7__SD3_DATA7 0x59
+ MX7D_PAD_SD3_STROBE__SD3_STROBE 0x19
+ >;
+ };
+
+ pinctrl_usdhc3_100mhz: usdhc3grp_100mhz {
+ fsl,pins = <
+ MX7D_PAD_SD3_CMD__SD3_CMD 0x5a
+ MX7D_PAD_SD3_CLK__SD3_CLK 0x1a
+ MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5a
+ MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5a
+ MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5a
+ MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5a
+ MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5a
+ MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5a
+ MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5a
+ MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5a
+ MX7D_PAD_SD3_STROBE__SD3_STROBE 0x1a
+ >;
+ };
+
+ pinctrl_usdhc3_200mhz: usdhc3grp_200mhz {
+ fsl,pins = <
+ MX7D_PAD_SD3_CMD__SD3_CMD 0x5b
+ MX7D_PAD_SD3_CLK__SD3_CLK 0x1b
+ MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5b
+ MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5b
+ MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5b
+ MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5b
+ MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5b
+ MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5b
+ MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5b
+ MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5b
+ MX7D_PAD_SD3_STROBE__SD3_STROBE 0x1b
+ >;
+ };
+
pinctrl_sai1: sai1-grp {
fsl,pins = <
MX7D_PAD_ENET1_RX_CLK__SAI1_TX_BCLK 0x1f
diff --git a/arch/arm/boot/dts/imx7d-colibri-emmc-eval-v3.dts b/arch/arm/boot/dts/imx7d-colibri-emmc-eval-v3.dts
new file mode 100644
index 000000000000..8ee73c870b12
--- /dev/null
+++ b/arch/arm/boot/dts/imx7d-colibri-emmc-eval-v3.dts
@@ -0,0 +1,19 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright 2017 Toradex AG
+ */
+
+/dts-v1/;
+#include "imx7d-colibri-emmc.dtsi"
+#include "imx7-colibri-eval-v3.dtsi"
+
+/ {
+ model = "Toradex Colibri iMX7D 1GB (eMMC) on Colibri Evaluation Board V3";
+ compatible = "toradex,colibri-imx7d-emmc-eval-v3",
+ "toradex,colibri-imx7d-emmc", "fsl,imx7d";
+};
+
+&usbotg2 {
+ vbus-supply = <®_usbh_vbus>;
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/imx7d-colibri-emmc.dtsi b/arch/arm/boot/dts/imx7d-colibri-emmc.dtsi
new file mode 100644
index 000000000000..9b63b9c89e4b
--- /dev/null
+++ b/arch/arm/boot/dts/imx7d-colibri-emmc.dtsi
@@ -0,0 +1,21 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright 2017 Toradex AG
+ */
+
+#include "imx7d.dtsi"
+#include "imx7-colibri.dtsi"
+
+/ {
+ memory {
+ reg = <0x80000000 0x40000000>;
+ };
+};
+
+&usbotg2 {
+ dr_mode = "host";
+};
+
+&usdhc3 {
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/imx7d-colibri.dtsi b/arch/arm/boot/dts/imx7d-colibri.dtsi
index 3c2cb502b388..6f2bb70c1fbd 100644
--- a/arch/arm/boot/dts/imx7d-colibri.dtsi
+++ b/arch/arm/boot/dts/imx7d-colibri.dtsi
@@ -49,6 +49,10 @@
};
};
+&gpmi {
+ status = "okay";
+};
+
&usbotg2 {
dr_mode = "host";
};
--
2.15.1
^ permalink raw reply related
* [-next PATCH 0/4] sysfs and DEVICE_ATTR_<foo>
From: Joe Perches @ 2017-12-19 18:15 UTC (permalink / raw)
To: linux-arm-kernel
Joe Perches (4):
sysfs.h: Use octal permissions
treewide: Use DEVICE_ATTR_RW
treewide: Use DEVICE_ATTR_RO
treewide: Use DEVICE_ATTR_WO
arch/arm/mach-pxa/sharpsl_pm.c | 4 +-
arch/s390/kernel/smp.c | 2 +-
arch/s390/kernel/topology.c | 3 +-
arch/sh/drivers/push-switch.c | 2 +-
arch/tile/kernel/sysfs.c | 12 ++--
arch/x86/kernel/cpu/microcode/core.c | 2 +-
drivers/acpi/device_sysfs.c | 6 +-
drivers/char/ipmi/ipmi_msghandler.c | 17 +++---
drivers/gpu/drm/i915/i915_sysfs.c | 12 ++--
drivers/input/touchscreen/elants_i2c.c | 2 +-
drivers/net/ethernet/ibm/ibmvnic.c | 2 +-
drivers/net/wimax/i2400m/sysfs.c | 3 +-
drivers/nvme/host/core.c | 10 ++--
drivers/platform/x86/compal-laptop.c | 18 ++----
drivers/s390/cio/css.c | 8 +--
drivers/s390/cio/device.c | 10 ++--
drivers/s390/crypto/ap_card.c | 2 +-
drivers/scsi/hpsa.c | 10 ++--
drivers/scsi/lpfc/lpfc_attr.c | 64 ++++++++--------------
.../staging/media/atomisp/pci/atomisp2/hmm/hmm.c | 8 +--
drivers/thermal/thermal_sysfs.c | 17 +++---
drivers/tty/serial/sh-sci.c | 2 +-
drivers/usb/host/xhci-dbgcap.c | 2 +-
drivers/usb/phy/phy-tahvo.c | 2 +-
drivers/video/fbdev/auo_k190x.c | 4 +-
drivers/video/fbdev/w100fb.c | 4 +-
include/linux/sysfs.h | 14 ++---
lib/test_firmware.c | 14 ++---
lib/test_kmod.c | 14 ++---
sound/soc/omap/mcbsp.c | 4 +-
sound/soc/soc-core.c | 2 +-
sound/soc/soc-dapm.c | 2 +-
32 files changed, 120 insertions(+), 158 deletions(-)
--
2.15.0
^ permalink raw reply
* [RESEND PATCH v2 1/2] media: exynos-gsc: fix lockdep warning
From: Shuah Khan @ 2017-12-19 18:18 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1507935819.git.shuahkh@osg.samsung.com>
The driver mmap functions shouldn't take lock when calling vb2_mmap().
Fix it to not take the lock.
Reference: commit log for f035eb4e976ef5a059e30bc91cfd310ff030a7d3
and e752577ed7bf55c81e10343fced8b378cda2b63b
The following lockdep warning is fixed with this change.
[ 1990.972058] ======================================================
[ 1990.978172] WARNING: possible circular locking dependency detected
[ 1990.984327] 4.14.0-rc2-00002-gfab205f-dirty #4 Not tainted
[ 1990.989783] ------------------------------------------------------
[ 1990.995937] qtdemux0:sink/2765 is trying to acquire lock:
[ 1991.001309] (&gsc->lock){+.+.}, at: [<bf1729f0>] gsc_m2m_mmap+0x24/0x5c [exynos_gsc]
[ 1991.009108]
but task is already holding lock:
[ 1991.014913] (&mm->mmap_sem){++++}, at: [<c01df2e4>] vm_mmap_pgoff+0x44/0xb8
[ 1991.021932]
which lock already depends on the new lock.
[ 1991.030078]
the existing dependency chain (in reverse order) is:
[ 1991.037530]
-> #1 (&mm->mmap_sem){++++}:
[ 1991.042913] __might_fault+0x80/0xb0
[ 1991.047096] video_usercopy+0x1cc/0x510 [videodev]
[ 1991.052297] v4l2_ioctl+0xa4/0xdc [videodev]
[ 1991.057036] do_vfs_ioctl+0xa0/0xa18
[ 1991.061102] SyS_ioctl+0x34/0x5c
[ 1991.064834] ret_fast_syscall+0x0/0x28
[ 1991.069072]
-> #0 (&gsc->lock){+.+.}:
[ 1991.074193] lock_acquire+0x6c/0x88
[ 1991.078179] __mutex_lock+0x68/0xa34
[ 1991.082247] mutex_lock_interruptible_nested+0x1c/0x24
[ 1991.087888] gsc_m2m_mmap+0x24/0x5c [exynos_gsc]
[ 1991.093029] v4l2_mmap+0x54/0x88 [videodev]
[ 1991.097673] mmap_region+0x3a8/0x638
[ 1991.101743] do_mmap+0x330/0x3a4
[ 1991.105470] vm_mmap_pgoff+0x90/0xb8
[ 1991.109542] SyS_mmap_pgoff+0x90/0xc0
[ 1991.113702] ret_fast_syscall+0x0/0x28
[ 1991.117945]
other info that might help us debug this:
[ 1991.125918] Possible unsafe locking scenario:
[ 1991.131810] CPU0 CPU1
[ 1991.136315] ---- ----
[ 1991.140821] lock(&mm->mmap_sem);
[ 1991.144201] lock(&gsc->lock);
[ 1991.149833] lock(&mm->mmap_sem);
[ 1991.155725] lock(&gsc->lock);
[ 1991.158845]
*** DEADLOCK ***
[ 1991.164740] 1 lock held by qtdemux0:sink/2765:
[ 1991.169157] #0: (&mm->mmap_sem){++++}, at: [<c01df2e4>] vm_mmap_pgoff+0x44/0xb8
[ 1991.176609]
stack backtrace:
[ 1991.180946] CPU: 2 PID: 2765 Comm: qtdemux0:sink Not tainted 4.14.0-rc2-00002-gfab205f-dirty #4
[ 1991.189608] Hardware name: SAMSUNG EXYNOS (Flattened Device Tree)
[ 1991.195686] [<c01102c8>] (unwind_backtrace) from [<c010cabc>] (show_stack+0x10/0x14)
[ 1991.203393] [<c010cabc>] (show_stack) from [<c08543a4>] (dump_stack+0x98/0xc4)
[ 1991.210586] [<c08543a4>] (dump_stack) from [<c016b2fc>] (print_circular_bug+0x254/0x410)
[ 1991.218644] [<c016b2fc>] (print_circular_bug) from [<c016c580>] (check_prev_add+0x468/0x938)
[ 1991.227049] [<c016c580>] (check_prev_add) from [<c016f4dc>] (__lock_acquire+0x1314/0x14fc)
[ 1991.235281] [<c016f4dc>] (__lock_acquire) from [<c016fefc>] (lock_acquire+0x6c/0x88)
[ 1991.242993] [<c016fefc>] (lock_acquire) from [<c0869fb4>] (__mutex_lock+0x68/0xa34)
[ 1991.250620] [<c0869fb4>] (__mutex_lock) from [<c086aa08>] (mutex_lock_interruptible_nested+0x1c/0x24)
[ 1991.259812] [<c086aa08>] (mutex_lock_interruptible_nested) from [<bf1729f0>] (gsc_m2m_mmap+0x24/0x5c [exynos_gsc])
[ 1991.270159] [<bf1729f0>] (gsc_m2m_mmap [exynos_gsc]) from [<bf037120>] (v4l2_mmap+0x54/0x88 [videodev])
[ 1991.279510] [<bf037120>] (v4l2_mmap [videodev]) from [<c01f4798>] (mmap_region+0x3a8/0x638)
[ 1991.287792] [<c01f4798>] (mmap_region) from [<c01f4d58>] (do_mmap+0x330/0x3a4)
[ 1991.294986] [<c01f4d58>] (do_mmap) from [<c01df330>] (vm_mmap_pgoff+0x90/0xb8)
[ 1991.302178] [<c01df330>] (vm_mmap_pgoff) from [<c01f28cc>] (SyS_mmap_pgoff+0x90/0xc0)
[ 1991.309977] [<c01f28cc>] (SyS_mmap_pgoff) from [<c0108820>] (ret_fast_syscall+0x0/0x28)
Signed-off-by: Shuah Khan <shuahkh@osg.samsung.com>
Suggested-by: Hans Verkuil <hansverk@cisco.com>
Acked-by: Marek Szyprowski <m.szyprowski@samsung.com>
Acked-by: Hans Verkuil <hansverk@cisco.com>
---
Somehow this patch never made it in. linux-tv patchwork doesn't
show this patch. Resending it with Han's Ack.
drivers/media/platform/exynos-gsc/gsc-m2m.c | 5 -----
1 file changed, 5 deletions(-)
diff --git a/drivers/media/platform/exynos-gsc/gsc-m2m.c b/drivers/media/platform/exynos-gsc/gsc-m2m.c
index 2a2994e..722d7c4 100644
--- a/drivers/media/platform/exynos-gsc/gsc-m2m.c
+++ b/drivers/media/platform/exynos-gsc/gsc-m2m.c
@@ -726,14 +726,9 @@ static unsigned int gsc_m2m_poll(struct file *file,
static int gsc_m2m_mmap(struct file *file, struct vm_area_struct *vma)
{
struct gsc_ctx *ctx = fh_to_ctx(file->private_data);
- struct gsc_dev *gsc = ctx->gsc_dev;
int ret;
- if (mutex_lock_interruptible(&gsc->lock))
- return -ERESTARTSYS;
-
ret = v4l2_m2m_mmap(file, ctx->m2m_ctx, vma);
- mutex_unlock(&gsc->lock);
return ret;
}
--
2.7.4
^ permalink raw reply related
* [PATCH] arm64: defconfig: Select schedutil as default cpufreq governor
From: Marc Zyngier @ 2017-12-19 18:30 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171218042917.GB19815@vireshk-i7>
On 18/12/17 04:29, Viresh Kumar wrote:
> On 15-12-17, 15:50, Catalin Marinas wrote:
>> On Thu, Nov 16, 2017 at 11:51:36AM +0530, Viresh Kumar wrote:
>>> Currently performance governor is getting selected by default, which is
>>> surely not a very good choice as its pretty much power hungry.
>>>
>>> Select schedutil instead.
>>
>> And why do we care about this in defconfig? People deploying their own
>> kernels in mobile may opt for this config, others may prefer the default
>> governor.
>>
>> Also it seems it would be the only architecture make this governor the
>> default, so NAK.
>
> This is a bit dangerous configuration IMHO.
>
> Other architectures have some *real* governor selected by default, like Ondemand
> or Conservative. Running your CPUs at max (because of the default performance
> governor in arm64 config) may end up burning some SoCs accidentally just because
> their thermal stuff doesn't kick in to cool SoC down properly.
Honestly, this feels like widening a road because someone wants to drive
a car with no steering wheel. If an SoC is broken enough not to to into
thermal throttling on its own, I'm tempted to say "let it burn".
And on-demand is just as bad as performance in that respect, as it will
to the same thing as soon as you run (for example) Firefox. Or Emacs.
> So, we should have one of ondemand, conservative and schedutil selected by
> default for arm64 as well IMO and schedutil is the one which every one is
> falling back to now a days, even android.
I'll have my bike shed painted pink, thank you very much! :-)
M.
--
Jazz is not dead. It just smells funny...
^ permalink raw reply
* [PATCH v2 3/8] media: v4l2-async: simplify v4l2_async_subdev structure
From: Hyun Kwon @ 2017-12-19 18:38 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <9702fbf0c9dd2f6a657aff0c7fff3ca849d76713.1513682135.git.mchehab@s-opensource.com>
Hi Mauro,
Thanks for the patch.
> -----Original Message-----
> From: Mauro Carvalho Chehab [mailto:mchehab at smtp.s-opensource.com]
> On Behalf Of Mauro Carvalho Chehab
> Sent: Tuesday, December 19, 2017 3:18 AM
> To: Linux Media Mailing List <linux-media@vger.kernel.org>
> Cc: Mauro Carvalho Chehab <mchehab@s-opensource.com>; Mauro
> Carvalho Chehab <mchehab@infradead.org>; Lad, Prabhakar
> <prabhakar.csengg@gmail.com>; Songjun Wu
> <songjun.wu@microchip.com>; Nicolas Ferre
> <nicolas.ferre@microchip.com>; Alexandre Belloni <alexandre.belloni@free-
> electrons.com>; Ludovic Desroches <ludovic.desroches@microchip.com>;
> Kyungmin Park <kyungmin.park@samsung.com>; Sylwester Nawrocki
> <s.nawrocki@samsung.com>; Kukjin Kim <kgene@kernel.org>; Krzysztof
> Kozlowski <krzk@kernel.org>; Todor Tomov <todor.tomov@linaro.org>;
> Niklas S?derlund <niklas.soderlund@ragnatech.se>; Ramesh
> Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>;
> Guennadi Liakhovetski <g.liakhovetski@gmx.de>; Maxime Coquelin
> <mcoquelin.stm32@gmail.com>; Alexandre Torgue
> <alexandre.torgue@st.com>; Benoit Parrot <bparrot@ti.com>; Hyun Kwon
> <hyunk@xilinx.com>; Laurent Pinchart
> <laurent.pinchart@ideasonboard.com>; Michal Simek
> <michal.simek@xilinx.com>; Steve Longerbeam <slongerbeam@gmail.com>;
> Philipp Zabel <p.zabel@pengutronix.de>; Greg Kroah-Hartman
> <gregkh@linuxfoundation.org>; Hans Verkuil <hverkuil@xs4all.nl>; Petr
> Cvek <petr.cvek@tul.cz>; Sakari Ailus <sakari.ailus@iki.fi>; Julia Lawall
> <Julia.Lawall@lip6.fr>; Arnd Bergmann <arnd@arndb.de>; Hugues Fruchet
> <hugues.fruchet@st.com>; Gustavo A. R. Silva
> <garsilva@embeddedor.com>; Sebastian Reichel <sre@kernel.org>; Tomasz
> Figa <tfiga@chromium.org>; linux-arm-kernel at lists.infradead.org; linux-
> samsung-soc at vger.kernel.org; linux-renesas-soc at vger.kernel.org;
> devel at driverdev.osuosl.org
> Subject: [PATCH v2 3/8] media: v4l2-async: simplify v4l2_async_subdev
> structure
>
> The V4L2_ASYNC_MATCH_FWNODE match criteria requires just one
> struct to be filled (struct fwnode_handle). The
> V4L2_ASYNC_MATCH_DEVNAME
> match criteria requires just a device name.
>
> So, it doesn't make sense to enclose those into structs,
> as the criteria can go directly into the union.
>
> That makes easier to document it, as we don't need to document
> weird senseless structs.
>
> At drivers, this makes even clearer about the match criteria.
>
> Acked-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
> Acked-by: Benoit Parrot <bparrot@ti.com>
> Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
> Acked-by: Sakari Ailus <sakari.ailus@linux.intel.com>
> Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
> Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
For xilinx-vipp.c, please add,
Acked-by: Hyun Kwon <hyun.kwon@xilinx.com>
Thanks,
-hyun
> ---
> drivers/media/platform/am437x/am437x-vpfe.c | 6 +++---
> drivers/media/platform/atmel/atmel-isc.c | 2 +-
> drivers/media/platform/atmel/atmel-isi.c | 2 +-
> drivers/media/platform/davinci/vpif_capture.c | 4 ++--
> drivers/media/platform/exynos4-is/media-dev.c | 4 ++--
> drivers/media/platform/pxa_camera.c | 2 +-
> drivers/media/platform/qcom/camss-8x16/camss.c | 2 +-
> drivers/media/platform/rcar-vin/rcar-core.c | 2 +-
> drivers/media/platform/rcar_drif.c | 4 ++--
> drivers/media/platform/soc_camera/soc_camera.c | 2 +-
> drivers/media/platform/stm32/stm32-dcmi.c | 2 +-
> drivers/media/platform/ti-vpe/cal.c | 2 +-
> drivers/media/platform/xilinx/xilinx-vipp.c | 2 +-
> drivers/media/v4l2-core/v4l2-async.c | 16 ++++++++--------
> drivers/media/v4l2-core/v4l2-fwnode.c | 10 +++++-----
> drivers/staging/media/imx/imx-media-dev.c | 4 ++--
> include/media/v4l2-async.h | 8 ++------
> 17 files changed, 35 insertions(+), 39 deletions(-)
>
> diff --git a/drivers/media/platform/am437x/am437x-vpfe.c
> b/drivers/media/platform/am437x/am437x-vpfe.c
> index 0997c640191d..601ae6487617 100644
> --- a/drivers/media/platform/am437x/am437x-vpfe.c
> +++ b/drivers/media/platform/am437x/am437x-vpfe.c
> @@ -2304,8 +2304,8 @@ vpfe_async_bound(struct v4l2_async_notifier
> *notifier,
> vpfe_dbg(1, vpfe, "vpfe_async_bound\n");
>
> for (i = 0; i < ARRAY_SIZE(vpfe->cfg->asd); i++) {
> - if (vpfe->cfg->asd[i]->match.fwnode.fwnode ==
> - asd[i].match.fwnode.fwnode) {
> + if (vpfe->cfg->asd[i]->match.fwnode ==
> + asd[i].match.fwnode) {
> sdinfo = &vpfe->cfg->sub_devs[i];
> vpfe->sd[i] = subdev;
> vpfe->sd[i]->grp_id = sdinfo->grp_id;
> @@ -2510,7 +2510,7 @@ vpfe_get_pdata(struct platform_device *pdev)
> }
>
> pdata->asd[i]->match_type =
> V4L2_ASYNC_MATCH_FWNODE;
> - pdata->asd[i]->match.fwnode.fwnode =
> of_fwnode_handle(rem);
> + pdata->asd[i]->match.fwnode = of_fwnode_handle(rem);
> of_node_put(rem);
> }
>
> diff --git a/drivers/media/platform/atmel/atmel-isc.c
> b/drivers/media/platform/atmel/atmel-isc.c
> index 0c2635647f69..34676409ca08 100644
> --- a/drivers/media/platform/atmel/atmel-isc.c
> +++ b/drivers/media/platform/atmel/atmel-isc.c
> @@ -2088,7 +2088,7 @@ static int isc_parse_dt(struct device *dev, struct
> isc_device *isc)
> subdev_entity->pfe_cfg0 |=
> ISC_PFE_CFG0_PPOL_LOW;
>
> subdev_entity->asd->match_type =
> V4L2_ASYNC_MATCH_FWNODE;
> - subdev_entity->asd->match.fwnode.fwnode =
> + subdev_entity->asd->match.fwnode =
> of_fwnode_handle(rem);
> list_add_tail(&subdev_entity->list, &isc->subdev_entities);
> }
> diff --git a/drivers/media/platform/atmel/atmel-isi.c
> b/drivers/media/platform/atmel/atmel-isi.c
> index e900995143a3..9958918e2449 100644
> --- a/drivers/media/platform/atmel/atmel-isi.c
> +++ b/drivers/media/platform/atmel/atmel-isi.c
> @@ -1128,7 +1128,7 @@ static int isi_graph_parse(struct atmel_isi *isi,
> struct device_node *node)
> /* Remote node to connect */
> isi->entity.node = remote;
> isi->entity.asd.match_type =
> V4L2_ASYNC_MATCH_FWNODE;
> - isi->entity.asd.match.fwnode.fwnode =
> of_fwnode_handle(remote);
> + isi->entity.asd.match.fwnode = of_fwnode_handle(remote);
> return 0;
> }
> }
> diff --git a/drivers/media/platform/davinci/vpif_capture.c
> b/drivers/media/platform/davinci/vpif_capture.c
> index e45916f69def..e1c273c8b9a6 100644
> --- a/drivers/media/platform/davinci/vpif_capture.c
> +++ b/drivers/media/platform/davinci/vpif_capture.c
> @@ -1390,7 +1390,7 @@ static int vpif_async_bound(struct
> v4l2_async_notifier *notifier,
>
> for (i = 0; i < vpif_obj.config->asd_sizes[0]; i++) {
> struct v4l2_async_subdev *_asd = vpif_obj.config->asd[i];
> - const struct fwnode_handle *fwnode = _asd-
> >match.fwnode.fwnode;
> + const struct fwnode_handle *fwnode = _asd-
> >match.fwnode;
>
> if (fwnode == subdev->fwnode) {
> vpif_obj.sd[i] = subdev;
> @@ -1595,7 +1595,7 @@ vpif_capture_get_pdata(struct platform_device
> *pdev)
> }
>
> pdata->asd[i]->match_type =
> V4L2_ASYNC_MATCH_FWNODE;
> - pdata->asd[i]->match.fwnode.fwnode =
> of_fwnode_handle(rem);
> + pdata->asd[i]->match.fwnode = of_fwnode_handle(rem);
> of_node_put(rem);
> }
>
> diff --git a/drivers/media/platform/exynos4-is/media-dev.c
> b/drivers/media/platform/exynos4-is/media-dev.c
> index 0ef583cfc424..78b48a1fa26c 100644
> --- a/drivers/media/platform/exynos4-is/media-dev.c
> +++ b/drivers/media/platform/exynos4-is/media-dev.c
> @@ -456,7 +456,7 @@ static int fimc_md_parse_port_node(struct
> fimc_md *fmd,
> }
>
> fmd->sensor[index].asd.match_type =
> V4L2_ASYNC_MATCH_FWNODE;
> - fmd->sensor[index].asd.match.fwnode.fwnode =
> of_fwnode_handle(rem);
> + fmd->sensor[index].asd.match.fwnode = of_fwnode_handle(rem);
> fmd->async_subdevs[index] = &fmd->sensor[index].asd;
>
> fmd->num_sensors++;
> @@ -1364,7 +1364,7 @@ static int subdev_notifier_bound(struct
> v4l2_async_notifier *notifier,
>
> /* Find platform data for this sensor subdev */
> for (i = 0; i < ARRAY_SIZE(fmd->sensor); i++)
> - if (fmd->sensor[i].asd.match.fwnode.fwnode ==
> + if (fmd->sensor[i].asd.match.fwnode ==
> of_fwnode_handle(subdev->dev->of_node))
> si = &fmd->sensor[i];
>
> diff --git a/drivers/media/platform/pxa_camera.c
> b/drivers/media/platform/pxa_camera.c
> index 305cf1cac210..f028084f0775 100644
> --- a/drivers/media/platform/pxa_camera.c
> +++ b/drivers/media/platform/pxa_camera.c
> @@ -2335,7 +2335,7 @@ static int pxa_camera_pdata_from_dt(struct
> device *dev,
> asd->match_type = V4L2_ASYNC_MATCH_FWNODE;
> remote = of_graph_get_remote_port(np);
> if (remote) {
> - asd->match.fwnode.fwnode = of_fwnode_handle(remote);
> + asd->match.fwnode = of_fwnode_handle(remote);
> of_node_put(remote);
> } else {
> dev_notice(dev, "no remote for %pOF\n", np);
> diff --git a/drivers/media/platform/qcom/camss-8x16/camss.c
> b/drivers/media/platform/qcom/camss-8x16/camss.c
> index 390a42c17b66..05f06c98aa64 100644
> --- a/drivers/media/platform/qcom/camss-8x16/camss.c
> +++ b/drivers/media/platform/qcom/camss-8x16/camss.c
> @@ -341,7 +341,7 @@ static int camss_of_parse_ports(struct device *dev,
> }
>
> csd->asd.match_type = V4L2_ASYNC_MATCH_FWNODE;
> - csd->asd.match.fwnode.fwnode =
> of_fwnode_handle(remote);
> + csd->asd.match.fwnode = of_fwnode_handle(remote);
> }
>
> return notifier->num_subdevs;
> diff --git a/drivers/media/platform/rcar-vin/rcar-core.c
> b/drivers/media/platform/rcar-vin/rcar-core.c
> index 108d776f3265..f1fc7978d6d1 100644
> --- a/drivers/media/platform/rcar-vin/rcar-core.c
> +++ b/drivers/media/platform/rcar-vin/rcar-core.c
> @@ -187,7 +187,7 @@ static int rvin_digital_graph_init(struct rvin_dev
> *vin)
> return -ENODEV;
>
> vin_dbg(vin, "Found digital subdevice %pOF\n",
> - to_of_node(vin->digital->asd.match.fwnode.fwnode));
> + to_of_node(vin->digital->asd.match.fwnode));
>
> vin->notifier.ops = &rvin_digital_notify_ops;
> ret = v4l2_async_notifier_register(&vin->v4l2_dev, &vin->notifier);
> diff --git a/drivers/media/platform/rcar_drif.c
> b/drivers/media/platform/rcar_drif.c
> index 63c94f4028a7..b2e080ef5391 100644
> --- a/drivers/media/platform/rcar_drif.c
> +++ b/drivers/media/platform/rcar_drif.c
> @@ -1107,7 +1107,7 @@ static int rcar_drif_notify_bound(struct
> v4l2_async_notifier *notifier,
> struct rcar_drif_sdr *sdr =
> container_of(notifier, struct rcar_drif_sdr, notifier);
>
> - if (sdr->ep.asd.match.fwnode.fwnode !=
> + if (sdr->ep.asd.match.fwnode !=
> of_fwnode_handle(subdev->dev->of_node)) {
> rdrif_err(sdr, "subdev %s cannot bind\n", subdev->name);
> return -EINVAL;
> @@ -1235,7 +1235,7 @@ static int rcar_drif_parse_subdevs(struct
> rcar_drif_sdr *sdr)
> return -EINVAL;
> }
>
> - sdr->ep.asd.match.fwnode.fwnode = fwnode;
> + sdr->ep.asd.match.fwnode = fwnode;
> sdr->ep.asd.match_type = V4L2_ASYNC_MATCH_FWNODE;
> notifier->num_subdevs++;
>
> diff --git a/drivers/media/platform/soc_camera/soc_camera.c
> b/drivers/media/platform/soc_camera/soc_camera.c
> index 916ff68b73d4..d13e2c5fb06f 100644
> --- a/drivers/media/platform/soc_camera/soc_camera.c
> +++ b/drivers/media/platform/soc_camera/soc_camera.c
> @@ -1517,7 +1517,7 @@ static int soc_of_bind(struct soc_camera_host
> *ici,
> if (!info)
> return -ENOMEM;
>
> - info->sasd.asd.match.fwnode.fwnode = of_fwnode_handle(remote);
> + info->sasd.asd.match.fwnode = of_fwnode_handle(remote);
> info->sasd.asd.match_type = V4L2_ASYNC_MATCH_FWNODE;
> info->subdev = &info->sasd.asd;
>
> diff --git a/drivers/media/platform/stm32/stm32-dcmi.c
> b/drivers/media/platform/stm32/stm32-dcmi.c
> index ac4c450a6c7d..9460b3080dca 100644
> --- a/drivers/media/platform/stm32/stm32-dcmi.c
> +++ b/drivers/media/platform/stm32/stm32-dcmi.c
> @@ -1520,7 +1520,7 @@ static int dcmi_graph_parse(struct stm32_dcmi
> *dcmi, struct device_node *node)
> /* Remote node to connect */
> dcmi->entity.node = remote;
> dcmi->entity.asd.match_type =
> V4L2_ASYNC_MATCH_FWNODE;
> - dcmi->entity.asd.match.fwnode.fwnode =
> of_fwnode_handle(remote);
> + dcmi->entity.asd.match.fwnode =
> of_fwnode_handle(remote);
> return 0;
> }
> }
> diff --git a/drivers/media/platform/ti-vpe/cal.c
> b/drivers/media/platform/ti-vpe/cal.c
> index 719ed1d79957..d1febe5baa6d 100644
> --- a/drivers/media/platform/ti-vpe/cal.c
> +++ b/drivers/media/platform/ti-vpe/cal.c
> @@ -1702,7 +1702,7 @@ static int of_cal_create_instance(struct cal_ctx
> *ctx, int inst)
> goto cleanup_exit;
> }
> asd->match_type = V4L2_ASYNC_MATCH_FWNODE;
> - asd->match.fwnode.fwnode = of_fwnode_handle(sensor_node);
> + asd->match.fwnode = of_fwnode_handle(sensor_node);
>
> remote_ep = of_graph_get_remote_endpoint(ep_node);
> if (!remote_ep) {
> diff --git a/drivers/media/platform/xilinx/xilinx-vipp.c
> b/drivers/media/platform/xilinx/xilinx-vipp.c
> index f4c3e48ed2c0..6bb28cd49dae 100644
> --- a/drivers/media/platform/xilinx/xilinx-vipp.c
> +++ b/drivers/media/platform/xilinx/xilinx-vipp.c
> @@ -387,7 +387,7 @@ static int xvip_graph_parse_one(struct
> xvip_composite_device *xdev,
>
> entity->node = remote;
> entity->asd.match_type = V4L2_ASYNC_MATCH_FWNODE;
> - entity->asd.match.fwnode.fwnode =
> of_fwnode_handle(remote);
> + entity->asd.match.fwnode = of_fwnode_handle(remote);
> list_add_tail(&entity->list, &xdev->entities);
> xdev->num_subdevs++;
> }
> diff --git a/drivers/media/v4l2-core/v4l2-async.c b/drivers/media/v4l2-
> core/v4l2-async.c
> index e5acfab470a5..2b08d03b251d 100644
> --- a/drivers/media/v4l2-core/v4l2-async.c
> +++ b/drivers/media/v4l2-core/v4l2-async.c
> @@ -68,12 +68,12 @@ static bool match_i2c(struct v4l2_subdev *sd,
> struct v4l2_async_subdev *asd)
> static bool match_devname(struct v4l2_subdev *sd,
> struct v4l2_async_subdev *asd)
> {
> - return !strcmp(asd->match.device_name.name, dev_name(sd-
> >dev));
> + return !strcmp(asd->match.device_name, dev_name(sd->dev));
> }
>
> static bool match_fwnode(struct v4l2_subdev *sd, struct
> v4l2_async_subdev *asd)
> {
> - return sd->fwnode == asd->match.fwnode.fwnode;
> + return sd->fwnode == asd->match.fwnode;
> }
>
> static bool match_custom(struct v4l2_subdev *sd, struct
> v4l2_async_subdev *asd)
> @@ -319,7 +319,7 @@ static bool
> __v4l2_async_notifier_fwnode_has_async_subdev(
> if (asd->match_type != V4L2_ASYNC_MATCH_FWNODE)
> continue;
>
> - if (asd->match.fwnode.fwnode == fwnode)
> + if (asd->match.fwnode == fwnode)
> return true;
> }
>
> @@ -330,7 +330,7 @@ static bool
> __v4l2_async_notifier_fwnode_has_async_subdev(
> if (sd->asd->match_type != V4L2_ASYNC_MATCH_FWNODE)
> continue;
>
> - if (sd->asd->match.fwnode.fwnode == fwnode)
> + if (sd->asd->match.fwnode == fwnode)
> return true;
> }
>
> @@ -355,8 +355,8 @@ static bool
> v4l2_async_notifier_fwnode_has_async_subdev(
> struct v4l2_async_subdev *other_asd = notifier->subdevs[j];
>
> if (other_asd->match_type ==
> V4L2_ASYNC_MATCH_FWNODE &&
> - asd->match.fwnode.fwnode ==
> - other_asd->match.fwnode.fwnode)
> + asd->match.fwnode ==
> + other_asd->match.fwnode)
> return true;
> }
>
> @@ -395,7 +395,7 @@ static int __v4l2_async_notifier_register(struct
> v4l2_async_notifier *notifier)
> break;
> case V4L2_ASYNC_MATCH_FWNODE:
> if (v4l2_async_notifier_fwnode_has_async_subdev(
> - notifier, asd->match.fwnode.fwnode, i)) {
> + notifier, asd->match.fwnode, i)) {
> dev_err(dev,
> "fwnode has already been registered
> or in notifier's subdev list\n");
> ret = -EEXIST;
> @@ -510,7 +510,7 @@ void v4l2_async_notifier_cleanup(struct
> v4l2_async_notifier *notifier)
>
> switch (asd->match_type) {
> case V4L2_ASYNC_MATCH_FWNODE:
> - fwnode_handle_put(asd->match.fwnode.fwnode);
> + fwnode_handle_put(asd->match.fwnode);
> break;
> default:
> WARN_ON_ONCE(true);
> diff --git a/drivers/media/v4l2-core/v4l2-fwnode.c b/drivers/media/v4l2-
> core/v4l2-fwnode.c
> index fb72c7ac04d4..d630640642ee 100644
> --- a/drivers/media/v4l2-core/v4l2-fwnode.c
> +++ b/drivers/media/v4l2-core/v4l2-fwnode.c
> @@ -359,9 +359,9 @@ static int
> v4l2_async_notifier_fwnode_parse_endpoint(
> return -ENOMEM;
>
> asd->match_type = V4L2_ASYNC_MATCH_FWNODE;
> - asd->match.fwnode.fwnode =
> + asd->match.fwnode =
> fwnode_graph_get_remote_port_parent(endpoint);
> - if (!asd->match.fwnode.fwnode) {
> + if (!asd->match.fwnode) {
> dev_warn(dev, "bad remote port parent\n");
> ret = -EINVAL;
> goto out_err;
> @@ -393,7 +393,7 @@ static int
> v4l2_async_notifier_fwnode_parse_endpoint(
> return 0;
>
> out_err:
> - fwnode_handle_put(asd->match.fwnode.fwnode);
> + fwnode_handle_put(asd->match.fwnode);
> kfree(asd);
>
> return ret == -ENOTCONN ? 0 : ret;
> @@ -566,7 +566,7 @@ static int v4l2_fwnode_reference_parse(
> }
>
> notifier->subdevs[notifier->num_subdevs] = asd;
> - asd->match.fwnode.fwnode = args.fwnode;
> + asd->match.fwnode = args.fwnode;
> asd->match_type = V4L2_ASYNC_MATCH_FWNODE;
> notifier->num_subdevs++;
> }
> @@ -853,7 +853,7 @@ static int v4l2_fwnode_reference_parse_int_props(
> }
>
> notifier->subdevs[notifier->num_subdevs] = asd;
> - asd->match.fwnode.fwnode = fwnode;
> + asd->match.fwnode = fwnode;
> asd->match_type = V4L2_ASYNC_MATCH_FWNODE;
> notifier->num_subdevs++;
> }
> diff --git a/drivers/staging/media/imx/imx-media-dev.c
> b/drivers/staging/media/imx/imx-media-dev.c
> index 2800700482d6..f7ed5f506fa9 100644
> --- a/drivers/staging/media/imx/imx-media-dev.c
> +++ b/drivers/staging/media/imx/imx-media-dev.c
> @@ -48,7 +48,7 @@ find_async_subdev(struct imx_media_dev *imxmd,
> asd = &imxasd->asd;
> switch (asd->match_type) {
> case V4L2_ASYNC_MATCH_FWNODE:
> - if (fwnode && asd->match.fwnode.fwnode ==
> fwnode)
> + if (fwnode && asd->match.fwnode == fwnode)
> return asd;
> break;
> case V4L2_ASYNC_MATCH_DEVNAME:
> @@ -104,7 +104,7 @@ int imx_media_add_async_subdev(struct
> imx_media_dev *imxmd,
>
> if (fwnode) {
> asd->match_type = V4L2_ASYNC_MATCH_FWNODE;
> - asd->match.fwnode.fwnode = fwnode;
> + asd->match.fwnode = fwnode;
> } else {
> asd->match_type = V4L2_ASYNC_MATCH_DEVNAME;
> asd->match.device_name.name = devname;
> diff --git a/include/media/v4l2-async.h b/include/media/v4l2-async.h
> index 6152434cbe82..a010af5134b2 100644
> --- a/include/media/v4l2-async.h
> +++ b/include/media/v4l2-async.h
> @@ -58,12 +58,8 @@ enum v4l2_async_match_type {
> struct v4l2_async_subdev {
> enum v4l2_async_match_type match_type;
> union {
> - struct {
> - struct fwnode_handle *fwnode;
> - } fwnode;
> - struct {
> - const char *name;
> - } device_name;
> + struct fwnode_handle *fwnode;
> + const char *device_name;
> struct {
> int adapter_id;
> unsigned short address;
> --
> 2.14.3
^ permalink raw reply
* [net-next: PATCH 0/8] Armada 7k/8k PP2 ACPI support
From: David Miller @ 2017-12-19 18:48 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1513588684-15647-1-git-send-email-mw@semihalf.com>
From: Marcin Wojtas <mw@semihalf.com>
Date: Mon, 18 Dec 2017 10:17:56 +0100
> Above support configures 1G to use its PHY normally. 10G can work now
> only with the link interrupt mode. Somehow reading of the
> string property in fwnode_mdiobus_child_is_phy works only with
> DT and cannot cope with 10G PHY nodes as in:
> https://pastebin.com/3JnYpU0A
>
> Above root cause will be further checked. In the meantime I will
> appreciate any comments or remarks for the kernel patches.
I would like you to figure this out before these changes go in.
Thanks.
^ permalink raw reply
* [PATCH 0/3] irqchip: irq-bcm2836: add support for DT interrupt polarity
From: Marc Zyngier @ 2017-12-19 18:50 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <8737461ry0.fsf@anholt.net>
On 19/12/17 18:41, Eric Anholt wrote:
> Marc Zyngier <marc.zyngier@arm.com> writes:
>
>> On 19/12/17 07:02, Stefan Wahren wrote:
>>> Hi Marc,
>>>
>>> Am 11.12.2017 um 21:39 schrieb Stefan Wahren:
>>>> This patch series implements DT polarity support for the 1st level interrupt
>>>> controller.
>>>>
>>>> Stefan Wahren (3):
>>>> dt-bindings: bcm2836-l1-intc: add interrupt polarity support
>>>> irqchip: irq-bcm2836: add support for DT interrupt polarity
>>>> ARM: dts: bcm283x: Define polarity of per-cpu interrupts
>>>>
>>>> .../interrupt-controller/brcm,bcm2836-l1-intc.txt | 4 +-
>>>> arch/arm/boot/dts/bcm2836.dtsi | 14 +++----
>>>> arch/arm/boot/dts/bcm2837.dtsi | 12 +++---
>>>> arch/arm/boot/dts/bcm283x.dtsi | 1 +
>>>> drivers/irqchip/irq-bcm2836.c | 46 +++++++++++++---------
>>>> 5 files changed, 44 insertions(+), 33 deletions(-)
>>>>
>>>
>>> is this series okay?
>>
>> Yes, it does look good. I'll queue that for 4.16.
>
> Are you grabbing all 3, or should I be grabbing the DT one?
All 3, if that's OK with you.
M.
--
Jazz is not dead. It just smells funny...
^ permalink raw reply
* [-next PATCH 0/4] sysfs and DEVICE_ATTR_<foo>
From: Jani Nikula @ 2017-12-19 18:54 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <cover.1513706701.git.joe@perches.com>
On Tue, 19 Dec 2017, Joe Perches <joe@perches.com> wrote:
> drivers/gpu/drm/i915/i915_sysfs.c | 12 ++--
For i915,
Acked-by: Jani Nikula <jani.nikula@intel.com>
--
Jani Nikula, Intel Open Source Technology Center
^ permalink raw reply
* [PATCH 4/9] ARM: trusted_foundations: enable L2x0 cache via firmware_ops
From: Dmitry Osipenko @ 2017-12-19 18:56 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1d12ea86cca40749731a594afc165830c0b2463d.1500510157.git.mirq-linux@rere.qmqm.pl>
On 20.07.2017 03:29, Micha? Miros?aw wrote:
> Use firmware_ops to provide hook for cache initialization through
> Trusted Foundations firmware, as some writes need Secure mode.
>
> Signed-off-by: Micha? Miros?aw <mirq-linux@rere.qmqm.pl>
> ---
I've tested this patch on my T30, which I ported to current linux-next, and it
works excellent. Micha?, are you going to re-spin this patch?
^ permalink raw reply
* [net-next: PATCH 0/8] Armada 7k/8k PP2 ACPI support
From: Marcin Wojtas @ 2017-12-19 18:59 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171219.134810.48027351795338458.davem@davemloft.net>
Hi David,
2017-12-19 19:48 GMT+01:00 David Miller <davem@davemloft.net>:
> From: Marcin Wojtas <mw@semihalf.com>
> Date: Mon, 18 Dec 2017 10:17:56 +0100
>
>> Above support configures 1G to use its PHY normally. 10G can work now
>> only with the link interrupt mode. Somehow reading of the
>> string property in fwnode_mdiobus_child_is_phy works only with
>> DT and cannot cope with 10G PHY nodes as in:
>> https://pastebin.com/3JnYpU0A
>>
>> Above root cause will be further checked. In the meantime I will
>> appreciate any comments or remarks for the kernel patches.
>
> I would like you to figure this out before these changes go in.
>
Of course! v2 will not have such problem, I've been waiting however
for the feedback about the ACPI representation. Anyway, I'm strongly
leaning towards using _ADR/_CID objects in PHY's nodes for ACPI, so
maybe I'll just issue the v2 in order to push the discussion a bit
forward.
Thanks,
Marcin
^ permalink raw reply
* [RFC PATCH xlnx] staging: xilinx: Si5324_RatApprox() can be static
From: kbuild test robot @ 2017-12-19 19:01 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <201712200342.PY8E7FkU%fengguang.wu@intel.com>
Fixes: b58dab7f9cf1 ("staging: xilinx: Add xilinx hdmi drivers to staging area")
Signed-off-by: Fengguang Wu <fengguang.wu@intel.com>
---
clk/si5324drv.c | 2 +-
hdmi/phy-xilinx-vphy/aes256.c | 24 ++++++++++++------------
hdmi/phy-xilinx-vphy/bigdigits.c | 2 +-
hdmi/phy-xilinx-vphy/xdebug.c | 6 +++---
hdmi/phy-xilinx-vphy/xhdcp22_tx.c | 4 ++--
hdmi/phy-xilinx-vphy/xvidc.c | 4 ++--
hdmi/phy-xilinx-vphy/xvphy_gthe4.c | 16 ++++++++--------
hdmi/phy-xilinx-vphy/xvphy_hdmi_intr.c | 22 +++++++++++-----------
hdmi/xilinx-hdmi-rx/xv_hdmirx.c | 4 ++--
hdmi/xilinx-hdmi-rx/xv_hdmirx_vsif.c | 2 +-
hdmi/xilinx-hdmi-rx/xv_hdmirxss.c | 4 ++--
hdmi/xilinx-hdmi-tx/xv_hdmitx.c | 2 +-
hdmi/xilinx-hdmi-tx/xv_hdmitx_vsif.c | 4 ++--
hdmi/xilinx-hdmi-tx/xv_hdmitxss.c | 4 ++--
hdmi/xilinx_drm_hdmi.c | 4 ++--
misc/dp159.c | 8 ++++----
16 files changed, 56 insertions(+), 56 deletions(-)
diff --git a/drivers/staging/xilinx/clk/si5324drv.c b/drivers/staging/xilinx/clk/si5324drv.c
index 9e2a519..d7f4e45 100644
--- a/drivers/staging/xilinx/clk/si5324drv.c
+++ b/drivers/staging/xilinx/clk/si5324drv.c
@@ -14,7 +14,7 @@
* @param num Will store the numinator (N2_LS) found.
* @param denom Will store the denominator (N3) found.
*/
-void Si5324_RatApprox(u64 f, u64 md, u32 *num, u32 *denom)
+static void Si5324_RatApprox(u64 f, u64 md, u32 *num, u32 *denom)
{
/* a: Continued fraction coefficients. */
u64 a, h[3] = { 0, 1, 0 }, k[3] = { 1, 0, 0 };
diff --git a/drivers/staging/xilinx/hdmi/phy-xilinx-vphy/aes256.c b/drivers/staging/xilinx/hdmi/phy-xilinx-vphy/aes256.c
index e3c502f..4eeb952 100644
--- a/drivers/staging/xilinx/hdmi/phy-xilinx-vphy/aes256.c
+++ b/drivers/staging/xilinx/hdmi/phy-xilinx-vphy/aes256.c
@@ -72,7 +72,7 @@ const uint8_t sbox[256] = {
0x8c, 0xa1, 0x89, 0x0d, 0xbf, 0xe6, 0x42, 0x68,
0x41, 0x99, 0x2d, 0x0f, 0xb0, 0x54, 0xbb, 0x16
};
-const uint8_t sboxinv[256] = {
+static const uint8_t sboxinv[256] = {
0x52, 0x09, 0x6a, 0xd5, 0x30, 0x36, 0xa5, 0x38,
0xbf, 0x40, 0xa3, 0x9e, 0x81, 0xf3, 0xd7, 0xfb,
0x7c, 0xe3, 0x39, 0x82, 0x9b, 0x2f, 0xff, 0x87,
@@ -169,13 +169,13 @@ uint8_t rj_sbox_inv(uint8_t x)
#endif
/* -------------------------------------------------------------------------- */
-uint8_t rj_xtime(uint8_t x)
+static uint8_t rj_xtime(uint8_t x)
{
return (x & 0x80) ? ((x << 1) ^ 0x1b) : (x << 1);
} /* rj_xtime */
/* -------------------------------------------------------------------------- */
-void aes_subBytes(uint8_t *buf)
+static void aes_subBytes(uint8_t *buf)
{
register uint8_t i = 16;
@@ -183,7 +183,7 @@ void aes_subBytes(uint8_t *buf)
} /* aes_subBytes */
/* -------------------------------------------------------------------------- */
-void aes_subBytes_inv(uint8_t *buf)
+static void aes_subBytes_inv(uint8_t *buf)
{
register uint8_t i = 16;
@@ -191,7 +191,7 @@ void aes_subBytes_inv(uint8_t *buf)
} /* aes_subBytes_inv */
/* -------------------------------------------------------------------------- */
-void aes_addRoundKey(uint8_t *buf, uint8_t *key)
+static void aes_addRoundKey(uint8_t *buf, uint8_t *key)
{
register uint8_t i = 16;
@@ -199,7 +199,7 @@ void aes_addRoundKey(uint8_t *buf, uint8_t *key)
} /* aes_addRoundKey */
/* -------------------------------------------------------------------------- */
-void aes_addRoundKey_cpy(uint8_t *buf, uint8_t *key, uint8_t *cpk)
+static void aes_addRoundKey_cpy(uint8_t *buf, uint8_t *key, uint8_t *cpk)
{
register uint8_t i = 16;
@@ -208,7 +208,7 @@ void aes_addRoundKey_cpy(uint8_t *buf, uint8_t *key, uint8_t *cpk)
/* -------------------------------------------------------------------------- */
-void aes_shiftRows(uint8_t *buf)
+static void aes_shiftRows(uint8_t *buf)
{
register uint8_t i, j; /* to make it potentially parallelable :) */
@@ -220,7 +220,7 @@ void aes_shiftRows(uint8_t *buf)
} /* aes_shiftRows */
/* -------------------------------------------------------------------------- */
-void aes_shiftRows_inv(uint8_t *buf)
+static void aes_shiftRows_inv(uint8_t *buf)
{
register uint8_t i, j; /* same as above :) */
@@ -232,7 +232,7 @@ void aes_shiftRows_inv(uint8_t *buf)
} /* aes_shiftRows_inv */
/* -------------------------------------------------------------------------- */
-void aes_mixColumns(uint8_t *buf)
+static void aes_mixColumns(uint8_t *buf)
{
register uint8_t i, a, b, c, d, e;
@@ -246,7 +246,7 @@ void aes_mixColumns(uint8_t *buf)
} /* aes_mixColumns */
/* -------------------------------------------------------------------------- */
-void aes_mixColumns_inv(uint8_t *buf)
+static void aes_mixColumns_inv(uint8_t *buf)
{
register uint8_t i, a, b, c, d, e, x, y, z;
@@ -262,7 +262,7 @@ void aes_mixColumns_inv(uint8_t *buf)
} /* aes_mixColumns_inv */
/* -------------------------------------------------------------------------- */
-void aes_expandEncKey(uint8_t *k, uint8_t *rc)
+static void aes_expandEncKey(uint8_t *k, uint8_t *rc)
{
register uint8_t i;
@@ -285,7 +285,7 @@ void aes_expandEncKey(uint8_t *k, uint8_t *rc)
} /* aes_expandEncKey */
/* -------------------------------------------------------------------------- */
-void aes_expandDecKey(uint8_t *k, uint8_t *rc)
+static void aes_expandDecKey(uint8_t *k, uint8_t *rc)
{
uint8_t i;
diff --git a/drivers/staging/xilinx/hdmi/phy-xilinx-vphy/bigdigits.c b/drivers/staging/xilinx/hdmi/phy-xilinx-vphy/bigdigits.c
index 9235176..37f2671 100644
--- a/drivers/staging/xilinx/hdmi/phy-xilinx-vphy/bigdigits.c
+++ b/drivers/staging/xilinx/hdmi/phy-xilinx-vphy/bigdigits.c
@@ -44,7 +44,7 @@
#endif
/* Added in [v2.4] for ALLOC_BYTES and FREE_BYTES */
-volatile uint8_t zeroise_bytes(volatile void *v, size_t n)
+static volatile uint8_t zeroise_bytes(volatile void *v, size_t n)
{ /* Zeroise byte array b and make sure optimiser does not ignore this */
volatile uint8_t optdummy;
volatile uint8_t *b = (uint8_t*)v;
diff --git a/drivers/staging/xilinx/hdmi/phy-xilinx-vphy/xdebug.c b/drivers/staging/xilinx/hdmi/phy-xilinx-vphy/xdebug.c
index 4d2e9cc..de7fd51 100644
--- a/drivers/staging/xilinx/hdmi/phy-xilinx-vphy/xdebug.c
+++ b/drivers/staging/xilinx/hdmi/phy-xilinx-vphy/xdebug.c
@@ -24,9 +24,9 @@ XDebug_Printf xdebugPrintf = NULL; /**< Instance of function
* interface used for debug
* print statement */
-char *xdebugBuff = NULL;
-int xdebugBuffSize = 0;
-int *xdebugBuffPos = NULL;
+static char *xdebugBuff = NULL;
+static int xdebugBuffSize = 0;
+static int *xdebugBuffPos = NULL;
static void XDebug_DebugBufPrintf(const char *fmt, ...)
{
diff --git a/drivers/staging/xilinx/hdmi/phy-xilinx-vphy/xhdcp22_tx.c b/drivers/staging/xilinx/hdmi/phy-xilinx-vphy/xhdcp22_tx.c
index 5b21f71..0da569f 100644
--- a/drivers/staging/xilinx/hdmi/phy-xilinx-vphy/xhdcp22_tx.c
+++ b/drivers/staging/xilinx/hdmi/phy-xilinx-vphy/xhdcp22_tx.c
@@ -213,7 +213,7 @@ static u32 XHdcp22Tx_GetTopologyHdcp1DeviceDownstream(XHdcp22_Tx *InstancePtr);
* This table contains the function pointers for all possible states.
* The order of elements must match the #XHdcp22_Tx_StateType enumerator definitions.
*/
-XHdcp22Tx_StateFuncType* const XHdcp22_Tx_StateTable[XHDCP22_TX_NUM_STATES] =
+static XHdcp22Tx_StateFuncType* const XHdcp22_Tx_StateTable[XHDCP22_TX_NUM_STATES] =
{
XHdcp22Tx_StateH0, XHdcp22Tx_StateH1, XHdcp22Tx_StateA0,
XHdcp22Tx_StateA1, Xhdcp22Tx_StateA1_1,
@@ -1672,7 +1672,7 @@ static XHdcp22_Tx_StateType XHdcp22Tx_StateA1(XHdcp22_Tx *InstancePtr)
* @note None.
*
******************************************************************************/
-XHdcp22_Tx_StateType Xhdcp22Tx_StateA1_1(XHdcp22_Tx *InstancePtr)
+static XHdcp22_Tx_StateType Xhdcp22Tx_StateA1_1(XHdcp22_Tx *InstancePtr)
{
int Result = XST_SUCCESS;
XHdcp22_Tx_DDCMessage *MsgPtr = (XHdcp22_Tx_DDCMessage *)InstancePtr->MessageBuffer;
diff --git a/drivers/staging/xilinx/hdmi/phy-xilinx-vphy/xvidc.c b/drivers/staging/xilinx/hdmi/phy-xilinx-vphy/xvidc.c
index 647d61d..5b38cad 100644
--- a/drivers/staging/xilinx/hdmi/phy-xilinx-vphy/xvidc.c
+++ b/drivers/staging/xilinx/hdmi/phy-xilinx-vphy/xvidc.c
@@ -61,8 +61,8 @@
/*************************** Variable Declarations ****************************/
extern const XVidC_VideoTimingMode XVidC_VideoTimingModes[XVIDC_VM_NUM_SUPPORTED];
-const XVidC_VideoTimingMode *XVidC_CustomTimingModes = NULL;
-int XVidC_NumCustomModes = 0;
+static const XVidC_VideoTimingMode *XVidC_CustomTimingModes = NULL;
+static int XVidC_NumCustomModes = 0;
/**************************** Function Prototypes *****************************/
diff --git a/drivers/staging/xilinx/hdmi/phy-xilinx-vphy/xvphy_gthe4.c b/drivers/staging/xilinx/hdmi/phy-xilinx-vphy/xvphy_gthe4.c
index 4827c87..ade5968 100644
--- a/drivers/staging/xilinx/hdmi/phy-xilinx-vphy/xvphy_gthe4.c
+++ b/drivers/staging/xilinx/hdmi/phy-xilinx-vphy/xvphy_gthe4.c
@@ -122,20 +122,20 @@ u32 XVphy_Gthe4RxPllRefClkDiv1Reconfig(XVphy *InstancePtr, u8 QuadId,
#define XVPHY_CPLL_MIN 2000000000LL
#define XVPHY_CPLL_MAX 6250000000LL
-const u8 Gthe4CpllDivsM[] = {1, 2, 0};
-const u8 Gthe4CpllDivsN1[] = {4, 5, 0};
+static const u8 Gthe4CpllDivsM[] = {1, 2, 0};
+static const u8 Gthe4CpllDivsN1[] = {4, 5, 0};
#if (XPAR_VPHY_0_TX_PROTOCOL == 0 || XPAR_VPHY_0_RX_PROTOCOL == 0)
const u8 Gthe4CpllDivsN2[] = {1, 2, 3, 4, 5, 8, 0};
#else
-const u8 Gthe4CpllDivsN2[] = {1, 2, 3, 4, 5, 0};
+static const u8 Gthe4CpllDivsN2[] = {1, 2, 3, 4, 5, 0};
#endif
-const u8 Gthe4CpllDivsD[] = {1, 2, 4, 8, 0};
+static const u8 Gthe4CpllDivsD[] = {1, 2, 4, 8, 0};
-const u8 Gthe4QpllDivsM[] = {4, 3, 2, 1, 0};
-const u8 Gthe4QpllDivsN1[] = {16, 20, 32, 40, 60, 64, 66, 75, 80, 84, 90,
+static const u8 Gthe4QpllDivsM[] = {4, 3, 2, 1, 0};
+static const u8 Gthe4QpllDivsN1[] = {16, 20, 32, 40, 60, 64, 66, 75, 80, 84, 90,
96, 100, 112, 120, 125, 150, 160, 0};
-const u8 Gthe4QpllDivsN2[] = {1, 0};
-const u8 Gthe4QpllDivsD[] = {16, 8, 4, 2, 1, 0};
+static const u8 Gthe4QpllDivsN2[] = {1, 0};
+static const u8 Gthe4QpllDivsD[] = {16, 8, 4, 2, 1, 0};
const XVphy_GtConfig Gthe4Config = {
.CfgSetCdr = XVphy_Gthe4CfgSetCdr,
diff --git a/drivers/staging/xilinx/hdmi/phy-xilinx-vphy/xvphy_hdmi_intr.c b/drivers/staging/xilinx/hdmi/phy-xilinx-vphy/xvphy_hdmi_intr.c
index 9ae61db..9e23f31 100644
--- a/drivers/staging/xilinx/hdmi/phy-xilinx-vphy/xvphy_hdmi_intr.c
+++ b/drivers/staging/xilinx/hdmi/phy-xilinx-vphy/xvphy_hdmi_intr.c
@@ -202,7 +202,7 @@ void XVphy_HdmiIntrHandlerCallbackInit(XVphy *InstancePtr)
* @note None.
*
******************************************************************************/
-void XVphy_HdmiQpllLockHandler(XVphy *InstancePtr)
+static void XVphy_HdmiQpllLockHandler(XVphy *InstancePtr)
{
XVphy_PllType TxPllType;
XVphy_PllType RxPllType;
@@ -421,7 +421,7 @@ void XVphy_HdmiGtpPllLockHandler(XVphy *InstancePtr, u8 Pll)
* @note None.
*
******************************************************************************/
-void XVphy_HdmiCpllLockHandler(XVphy *InstancePtr)
+static void XVphy_HdmiCpllLockHandler(XVphy *InstancePtr)
{
XVphy_PllType TxPllType;
XVphy_PllType RxPllType;
@@ -520,7 +520,7 @@ void XVphy_HdmiCpllLockHandler(XVphy *InstancePtr)
* @note None.
*
******************************************************************************/
-void XVphy_HdmiGtTxResetDoneLockHandler(XVphy *InstancePtr)
+static void XVphy_HdmiGtTxResetDoneLockHandler(XVphy *InstancePtr)
{
u8 Id, Id0, Id1;
@@ -570,7 +570,7 @@ void XVphy_HdmiGtTxResetDoneLockHandler(XVphy *InstancePtr)
* @note None.
*
******************************************************************************/
-void XVphy_HdmiGtTxAlignDoneLockHandler(XVphy *InstancePtr)
+static void XVphy_HdmiGtTxAlignDoneLockHandler(XVphy *InstancePtr)
{
u8 Id, Id0, Id1;
@@ -605,7 +605,7 @@ void XVphy_HdmiGtTxAlignDoneLockHandler(XVphy *InstancePtr)
* @note None.
*
******************************************************************************/
-void XVphy_HdmiGtRxResetDoneLockHandler(XVphy *InstancePtr)
+static void XVphy_HdmiGtRxResetDoneLockHandler(XVphy *InstancePtr)
{
u8 Id, Id0, Id1;
@@ -654,7 +654,7 @@ void XVphy_HdmiGtRxResetDoneLockHandler(XVphy *InstancePtr)
* @note None.
*
******************************************************************************/
-void XVphy_HdmiTxClkDetFreqChangeHandler(XVphy *InstancePtr)
+static void XVphy_HdmiTxClkDetFreqChangeHandler(XVphy *InstancePtr)
{
XVphy_PllType PllType;
u8 Id, Id0, Id1;
@@ -741,7 +741,7 @@ void XVphy_HdmiTxClkDetFreqChangeHandler(XVphy *InstancePtr)
* @note None.
*
******************************************************************************/
-void XVphy_HdmiRxClkDetFreqChangeHandler(XVphy *InstancePtr)
+static void XVphy_HdmiRxClkDetFreqChangeHandler(XVphy *InstancePtr)
{
XVphy_PllType PllType;
u32 RxRefClkHz;
@@ -836,7 +836,7 @@ void XVphy_HdmiRxClkDetFreqChangeHandler(XVphy *InstancePtr)
* @note None.
*
******************************************************************************/
-void XVphy_HdmiTxTimerTimeoutHandler(XVphy *InstancePtr)
+static void XVphy_HdmiTxTimerTimeoutHandler(XVphy *InstancePtr)
{
XVphy_ChannelId ChId;
XVphy_PllType PllType;
@@ -944,7 +944,7 @@ void XVphy_HdmiTxTimerTimeoutHandler(XVphy *InstancePtr)
* @note None.
*
******************************************************************************/
-void XVphy_HdmiRxTimerTimeoutHandler(XVphy *InstancePtr)
+static void XVphy_HdmiRxTimerTimeoutHandler(XVphy *InstancePtr)
{
XVphy_ChannelId ChId;
XVphy_PllType PllType;
@@ -1133,7 +1133,7 @@ void XVphy_HdmiTxMmcmLockHandler(XVphy *InstancePtr)
* @note None.
*
******************************************************************************/
-void XVphy_HdmiGtHandler(XVphy *InstancePtr)
+static void XVphy_HdmiGtHandler(XVphy *InstancePtr)
{
u32 Event;
u32 EventMask;
@@ -1209,7 +1209,7 @@ void XVphy_HdmiGtHandler(XVphy *InstancePtr)
* @note None.
*
******************************************************************************/
-void XVphy_ClkDetHandler(XVphy *InstancePtr)
+static void XVphy_ClkDetHandler(XVphy *InstancePtr)
{
u32 Event;
u32 EventMask;
diff --git a/drivers/staging/xilinx/hdmi/xilinx-hdmi-rx/xv_hdmirx.c b/drivers/staging/xilinx/hdmi/xilinx-hdmi-rx/xv_hdmirx.c
index 803030a1..3be878f 100644
--- a/drivers/staging/xilinx/hdmi/xilinx-hdmi-rx/xv_hdmirx.c
+++ b/drivers/staging/xilinx/hdmi/xilinx-hdmi-rx/xv_hdmirx.c
@@ -708,7 +708,7 @@ u32 XV_HdmiRx_GetAcrN(XV_HdmiRx *InstancePtr)
* @note None.
*
******************************************************************************/
-u16 XV_HdmiRx_DdcGetEdidWords(XV_HdmiRx *InstancePtr)
+static u16 XV_HdmiRx_DdcGetEdidWords(XV_HdmiRx *InstancePtr)
{
u32 Data;
@@ -1240,7 +1240,7 @@ u32 XV_HdmiRx_Divide(u32 Dividend, u32 Divisor)
* @note None.
*
******************************************************************************/
-XVidC_VideoMode XV_HdmiRx_LookupVmId(u8 Vic)
+static XVidC_VideoMode XV_HdmiRx_LookupVmId(u8 Vic)
{
XV_HdmiRx_VicTable const *Entry;
u8 Index;
diff --git a/drivers/staging/xilinx/hdmi/xilinx-hdmi-rx/xv_hdmirx_vsif.c b/drivers/staging/xilinx/hdmi/xilinx-hdmi-rx/xv_hdmirx_vsif.c
index 25d3c4c..156618a 100644
--- a/drivers/staging/xilinx/hdmi/xilinx-hdmi-rx/xv_hdmirx_vsif.c
+++ b/drivers/staging/xilinx/hdmi/xilinx-hdmi-rx/xv_hdmirx_vsif.c
@@ -340,7 +340,7 @@ int XV_HdmiRx_VSIF_ParsePacket(XV_HdmiRx_Aux *AuxPtr, XV_HdmiRx_VSIF *VSIFPtr)
* - XST_FAILURE if an error was detected during parsing
*
******************************************************************************/
-int XV_HdmiRx_VSIF_Extract3DInfo(u8 *VSIFRaw, XV_HdmiRx_3D_Info *InstancePtr)
+static int XV_HdmiRx_VSIF_Extract3DInfo(u8 *VSIFRaw, XV_HdmiRx_3D_Info *InstancePtr)
{
u8 *pData;
u8 temp;
diff --git a/drivers/staging/xilinx/hdmi/xilinx-hdmi-rx/xv_hdmirxss.c b/drivers/staging/xilinx/hdmi/xilinx-hdmi-rx/xv_hdmirxss.c
index 5201425..993924a 100644
--- a/drivers/staging/xilinx/hdmi/xilinx-hdmi-rx/xv_hdmirxss.c
+++ b/drivers/staging/xilinx/hdmi/xilinx-hdmi-rx/xv_hdmirxss.c
@@ -111,7 +111,7 @@ typedef struct
/**************************** Local Global ***********************************/
/** Define Driver instance of all sub-core included in the design */
-XV_HdmiRxSs_SubCores XV_HdmiRxSs_SubCoreRepo[XPAR_XV_HDMIRXSS_NUM_INSTANCES];
+static XV_HdmiRxSs_SubCores XV_HdmiRxSs_SubCoreRepo[XPAR_XV_HDMIRXSS_NUM_INSTANCES];
/************************** Function Prototypes ******************************/
static void XV_HdmiRxSs_GetIncludedSubcores(XV_HdmiRxSs *HdmiRxSsPtr,
@@ -1680,7 +1680,7 @@ static void XV_HdmiRxSs_ReportInfoFrame(XV_HdmiRxSs *InstancePtr)
* @note None.
*
******************************************************************************/
-void XV_HdmiRxSs_ReportSubcoreVersion(XV_HdmiRxSs *InstancePtr)
+static void XV_HdmiRxSs_ReportSubcoreVersion(XV_HdmiRxSs *InstancePtr)
{
u32 Data;
diff --git a/drivers/staging/xilinx/hdmi/xilinx-hdmi-tx/xv_hdmitx.c b/drivers/staging/xilinx/hdmi/xilinx-hdmi-tx/xv_hdmitx.c
index 1e5a301..f36eef07 100644
--- a/drivers/staging/xilinx/hdmi/xilinx-hdmi-tx/xv_hdmitx.c
+++ b/drivers/staging/xilinx/hdmi/xilinx-hdmi-tx/xv_hdmitx.c
@@ -352,7 +352,7 @@ void XV_HdmiTx_Clear(XV_HdmiTx *InstancePtr)
* @note None.
*
******************************************************************************/
-u8 XV_HdmiTx_LookupVic(XVidC_VideoMode VideoMode)
+static u8 XV_HdmiTx_LookupVic(XVidC_VideoMode VideoMode)
{
XV_HdmiTx_VicTable const *Entry;
u8 Index;
diff --git a/drivers/staging/xilinx/hdmi/xilinx-hdmi-tx/xv_hdmitx_vsif.c b/drivers/staging/xilinx/hdmi/xilinx-hdmi-tx/xv_hdmitx_vsif.c
index 805d99a..c187591 100644
--- a/drivers/staging/xilinx/hdmi/xilinx-hdmi-tx/xv_hdmitx_vsif.c
+++ b/drivers/staging/xilinx/hdmi/xilinx-hdmi-tx/xv_hdmitx_vsif.c
@@ -287,7 +287,7 @@ static XVidC_3DSamplingPosition XV_HdmiTx_VSIF_Conv3DSampPosTo3DSampPos(XV_HdmiT
* - XST_FAILURE if an error was detected during parsing
*
******************************************************************************/
-int XV_HdmiTx_VSIF_ParsePacket(XV_HdmiTx_Aux *AuxPtr, XV_HdmiTx_VSIF *VSIFPtr)
+static int XV_HdmiTx_VSIF_ParsePacket(XV_HdmiTx_Aux *AuxPtr, XV_HdmiTx_VSIF *VSIFPtr)
{
u8 *pData;
u32 temp;
@@ -361,7 +361,7 @@ int XV_HdmiTx_VSIF_ParsePacket(XV_HdmiTx_Aux *AuxPtr, XV_HdmiTx_VSIF *VSIFPtr)
* - XST_FAILURE if an error was detected during parsing
*
******************************************************************************/
-int XV_HdmiTx_VSIF_Extract3DInfo(u8 *VSIFRaw, XV_HdmiTx_3D_Info *InstancePtr)
+static int XV_HdmiTx_VSIF_Extract3DInfo(u8 *VSIFRaw, XV_HdmiTx_3D_Info *InstancePtr)
{
u8 *pData;
u8 temp;
diff --git a/drivers/staging/xilinx/hdmi/xilinx-hdmi-tx/xv_hdmitxss.c b/drivers/staging/xilinx/hdmi/xilinx-hdmi-tx/xv_hdmitxss.c
index 1d02c74..7f40186 100644
--- a/drivers/staging/xilinx/hdmi/xilinx-hdmi-tx/xv_hdmitxss.c
+++ b/drivers/staging/xilinx/hdmi/xilinx-hdmi-tx/xv_hdmitxss.c
@@ -153,7 +153,7 @@ typedef struct
}XV_HdmiTxSs_SubCores;
/**************************** Local Global ***********************************/
-XV_HdmiTxSs_SubCores XV_HdmiTxSs_SubCoreRepo[XPAR_XV_HDMITXSS_NUM_INSTANCES];
+static XV_HdmiTxSs_SubCores XV_HdmiTxSs_SubCoreRepo[XPAR_XV_HDMITXSS_NUM_INSTANCES];
/**< Define Driver instance of all sub-core
included in the design */
@@ -2069,7 +2069,7 @@ void XV_HdmiTxSs_RefClockChangeInit(XV_HdmiTxSs *InstancePtr)
* @note None.
*
******************************************************************************/
-void XV_HdmiTxSs_ReportTiming(XV_HdmiTxSs *InstancePtr)
+static void XV_HdmiTxSs_ReportTiming(XV_HdmiTxSs *InstancePtr)
{
if (((u32) XV_HdmiTx_GetMode(InstancePtr->HdmiTxPtr)) == 0) {
xil_printf("HDMI TX Mode - DVI \r\n");
diff --git a/drivers/staging/xilinx/hdmi/xilinx_drm_hdmi.c b/drivers/staging/xilinx/hdmi/xilinx_drm_hdmi.c
index 34ee632..e1fd1ed 100644
--- a/drivers/staging/xilinx/hdmi/xilinx_drm_hdmi.c
+++ b/drivers/staging/xilinx/hdmi/xilinx_drm_hdmi.c
@@ -522,7 +522,7 @@ static void TxStreamDownCallback(void *CallbackRef)
hdcp_protect_content(xhdmi);
}
-void TxHdcpAuthenticatedCallback(void *CallbackRef)
+static void TxHdcpAuthenticatedCallback(void *CallbackRef)
{
struct xilinx_drm_hdmi *xhdmi = (struct xilinx_drm_hdmi *)CallbackRef;
XV_HdmiTxSs *HdmiTxSsPtr;
@@ -549,7 +549,7 @@ void TxHdcpAuthenticatedCallback(void *CallbackRef)
}
}
-void TxHdcpUnauthenticatedCallback(void *CallbackRef)
+static void TxHdcpUnauthenticatedCallback(void *CallbackRef)
{
struct xilinx_drm_hdmi *xhdmi = (struct xilinx_drm_hdmi *)CallbackRef;
XV_HdmiTxSs *HdmiTxSsPtr;
diff --git a/drivers/staging/xilinx/misc/dp159.c b/drivers/staging/xilinx/misc/dp159.c
index 368b0ff..33a2b5b 100644
--- a/drivers/staging/xilinx/misc/dp159.c
+++ b/drivers/staging/xilinx/misc/dp159.c
@@ -98,7 +98,7 @@ static int dp159_program(struct i2c_client *client, unsigned long rate)
#define to_clk_tx_linerate(_hw) container_of(_hw, struct clk_tx_linerate, hw)
-int clk_tx_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate)
+static int clk_tx_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate)
{
struct clk_tx_linerate *clk;
clk = to_clk_tx_linerate(hw);
@@ -108,7 +108,7 @@ int clk_tx_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_
return 0;
};
-unsigned long clk_tx_recalc_rate(struct clk_hw *hw, unsigned long parent_rate)
+static unsigned long clk_tx_recalc_rate(struct clk_hw *hw, unsigned long parent_rate)
{
struct clk_tx_linerate *clk;
clk = to_clk_tx_linerate(hw);
@@ -116,7 +116,7 @@ unsigned long clk_tx_recalc_rate(struct clk_hw *hw, unsigned long parent_rate)
return clk->rate;
};
-long clk_tx_round_rate(struct clk_hw *hw,
+static long clk_tx_round_rate(struct clk_hw *hw,
unsigned long rate, unsigned long *parent_rate)
{
struct clk_tx_linerate *clk;
@@ -124,7 +124,7 @@ long clk_tx_round_rate(struct clk_hw *hw,
return rate;
};
-struct clk_ops clk_tx_rate_ops = {
+static struct clk_ops clk_tx_rate_ops = {
.set_rate = &clk_tx_set_rate,
.recalc_rate = &clk_tx_recalc_rate,
.round_rate = &clk_tx_round_rate,
^ permalink raw reply related
* [PATCH 7/9] ARM: tegra: enable cache via TF
From: Dmitry Osipenko @ 2017-12-19 19:07 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <6a164b2270a3e996c083e94bf5b1e27028c1135e.1500510157.git.mirq-linux@rere.qmqm.pl>
On 20.07.2017 03:29, Micha? Miros?aw wrote:
> Cache enable needs to go via firmware call with TF running.
>
> Signed-off-by: Micha? Miros?aw <mirq-linux@rere.qmqm.pl>
> ---
Perhaps we can unify secure and non-secure modes. The code below works on both
secure-t30 and nonsecure-t20, all CPU's booted and working fine.
The "ARM: enable secure platform-only erratas" patch isn't needed in this case.
diff --git a/arch/arm/mach-tegra/reset-handler.S
b/arch/arm/mach-tegra/reset-handler.S
index 805f306fa6f7..9a92bbf8b5b0 100644
--- a/arch/arm/mach-tegra/reset-handler.S
+++ b/arch/arm/mach-tegra/reset-handler.S
@@ -80,6 +80,28 @@ ENTRY(tegra_resume)
#endif
#ifdef CONFIG_CACHE_L2X0
+#ifdef CONFIG_TRUSTED_FOUNDATIONS
+ adr r3, __tegra_cpu_reset_handler_data
+ ldr r0, [r3, #RESET_DATA(TF_PRESENT)]
+ cmp r0, #0
+ beq ca9_scu_l2_resume
+
+ adr r3, __tegra_smc_stack
+ stmia r3, {r4-r12, sp, lr}
+
+ mov r0, #3 // local wake
+ mov r3, #0
+ mov r4, #0
+ dsb
+ .arch_extension sec
+ smc #0
+
+ adr r3, __tegra_smc_stack
+ ldmia r3, {r4-r12, sp, pc}
+
+ b end_ca9_scu_l2_resume
+ca9_scu_l2_resume:
+#endif
/* L2 cache resume & re-enable */
bl l2c310_early_resume
#endif
@@ -92,6 +114,16 @@ end_ca9_scu_l2_resume:
ENDPROC(tegra_resume)
#endif
+#ifdef CONFIG_TRUSTED_FOUNDATIONS
+ .align L1_CACHE_SHIFT
+ .type __tegra_smc_stack, %object
+__tegra_smc_stack:
+ .rept 11
+ .long 0
+ .endr
+ .size __tegra_smc_stack, . - __tegra_smc_stack
+#endif /* CONFIG_TRUSTED_FOUNDATIONS */
+
.align L1_CACHE_SHIFT
ENTRY(__tegra_cpu_reset_handler_start)
@@ -121,6 +153,12 @@ ENTRY(__tegra_cpu_reset_handler)
cpsid aif, 0x13 @ SVC mode, interrupts disabled
tegra_get_soc_id TEGRA_APB_MISC_BASE, r6
+
+ adr r5, __tegra_cpu_reset_handler_data
+ ldr r0, [r5, #RESET_DATA(TF_PRESENT)]
+ cmp r0, #0
+ bne after_errata
+
#ifdef CONFIG_ARCH_TEGRA_2x_SOC
t20_check:
cmp r6, #TEGRA20
@@ -285,6 +323,10 @@ __tegra_cpu_reset_handler_data:
.equ __tegra20_cpu1_resettable_status_offset, \
. - __tegra_cpu_reset_handler_start
.byte 0
+ .align 4
+ .globl __tegra_tf_present
+ .equ __tegra_tf_present, . - __tegra_cpu_reset_handler_start
+ .long 0
.align L1_CACHE_SHIFT
ENTRY(__tegra_cpu_reset_handler_end)
diff --git a/arch/arm/mach-tegra/reset.c b/arch/arm/mach-tegra/reset.c
index dc558892753c..9b6558a69308 100644
--- a/arch/arm/mach-tegra/reset.c
+++ b/arch/arm/mach-tegra/reset.c
@@ -18,6 +18,7 @@
#include <linux/cpumask.h>
#include <linux/init.h>
#include <linux/io.h>
+#include <linux/of.h>
#include <soc/tegra/fuse.h>
@@ -89,6 +90,15 @@ static void __init tegra_cpu_reset_handler_enable(void)
void __init tegra_cpu_reset_handler_init(void)
{
+#ifdef CONFIG_TRUSTED_FOUNDATIONS
+ struct device_node *np;
+
+ np = of_find_compatible_node(NULL, NULL, "tlm,trusted-foundations");
+ if (np) {
+ __tegra_cpu_reset_handler_data[TEGRA_RESET_TF_PRESENT] = true;
+ of_node_put(np);
+ }
+#endif
#ifdef CONFIG_SMP
__tegra_cpu_reset_handler_data[TEGRA_RESET_MASK_PRESENT] =
diff --git a/arch/arm/mach-tegra/reset.h b/arch/arm/mach-tegra/reset.h
index 9c479c7925b8..0d9ddc022ece 100644
--- a/arch/arm/mach-tegra/reset.h
+++ b/arch/arm/mach-tegra/reset.h
@@ -25,7 +25,9 @@
#define TEGRA_RESET_STARTUP_SECONDARY 3
#define TEGRA_RESET_STARTUP_LP2 4
#define TEGRA_RESET_STARTUP_LP1 5
-#define TEGRA_RESET_DATA_SIZE 6
+#define TEGRA_RESET_RESETTABLE_STATUS 6
+#define TEGRA_RESET_TF_PRESENT 7
+#define TEGRA_RESET_DATA_SIZE 8
#ifndef __ASSEMBLY__
^ permalink raw reply related
* [PATCH 3/3] [v6] pinctrl: qcom: qdf2xxx: add support for new ACPI HID QCOM8002
From: Stephen Boyd @ 2017-12-19 19:10 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <13bbaec1-31d9-f9fe-71b1-5b991f123108@codeaurora.org>
On 12/18, Timur Tabi wrote:
> On 12/18/17 8:39 PM, Stephen Boyd wrote:
> >Ah I missed that the u16 array can't be iterated through. Any
> >chance the ACPI tables can be changed to list pin ranges, like
> ><33 3>, <90 2>, to indicate that pins 33, 34, 35 and pins 90, 91
> >are available?
>
> It's too late. Firmware is already shipping with the current
> layout. Unfortunately, there's no good peer review process for DSDs
> that don't have a DT equivalent.
Alright!
>
> >That would allow us to put that into the core
> >pinctrl-msm.c file a little better and then only expose pins on
> >the gpiochip when call gpiochip_add_pin_range(). If we want to
> >support this in DT, I think we would have a DT property like
> >available-gpios = <33 3>, <90 2>, <100 34> that we can then
> >iterate through and add only these pins to the gpiochip. That's
> >better than a bitmap in DT and is still compressed somewhat.
>
> Keep in mind that all this ACPI junk is localized to
> pinctrl-qdf2xxx. pinctrl-msm does not define any new data
> structures, it just reuses the existing one. You can still define
> your DT properties any way you want in your client drivers.
> pinctrl-qdf2xxx is specific to the Centriq chips.
Of course.
>
> >Without going all the way down into that path, here's my patch to
> >make your patch smaller, but perhaps we can just look for the
> >ACPI property or the DT property in the pinctrl-msm.c core and
> >then add pin ranges directly. Then this ACPI driver doesn't
> >really need to change besides for the ID update. We can expose
> >all the pins and offsets, etc. from the hardware driver but cut
> >out gpios in the core layer in a generic way.
>
> Ok, let me review this. I don't think there's any gain in moving
> the ACPI processing to pinctrl-msm, however.
>
I will attempt to implement the DT part today. It may make the
get_direction() revert irrelevant if the gpios aren't even
exposed to gpiolib in the first place.
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply
* [PATCH v2 0/9] soc: brcmstb: biuctrl updates for 64-bit chips
From: Florian Fainelli @ 2017-12-19 19:22 UTC (permalink / raw)
To: linux-arm-kernel
Hi all,
This patch series updates the Broadcom STB Bus Interface Unit controller to
support newer chips such as 7260, 7268, 7271 and 7278. These chips require
additional tuning in order to provide the expected bus throughput.
In the process, we need to re-organize the common.c file a little bit in order
to extract the family and product identifiers a little earlier.
Finally, by moving the biuctrl initialization an early_initcall level, we can
remove some code from the ARM-32bit machine descriptor file.
Provided that we are happy with these changes, I would route them through my
drivers/next branch and a subsequent Broadcom ARM SoC pull request.
Thank you
Changes in v2:
- collect Rob's acked-by on the first patch
- fixed the binding as suggested by Rob
Florian Fainelli (9):
dt-bindings: arm: Add entry for Broadcom Brahma-B53
dt-bindings: arm: brcmstb: Correct BIUCTRL node documentation
soc: brcmstb: Make CPU credit offset more parameterized
soc: brcmstb: Correct CPU_CREDIT_REG offset for Brahma-B53 CPUs
soc: brcmstb: biuctrl: Prepare for saving/restoring other registers
soc: brcmstb: biuctrl: Wire-up new registers
soc: brcmstb: biuctrl: Fine tune B53 MCP interface settings
soc: brcmstb: Split initialization
soc: brcmstb: biuctrl: Move to early_initcall
.../devicetree/bindings/arm/bcm/brcm,brcmstb.txt | 22 +--
Documentation/devicetree/bindings/arm/cpus.txt | 1 +
arch/arm/mach-bcm/brcmstb.c | 2 -
drivers/soc/bcm/brcmstb/biuctrl.c | 176 +++++++++++++++++++--
drivers/soc/bcm/brcmstb/common.c | 27 ++--
include/linux/soc/brcmstb/brcmstb.h | 6 -
6 files changed, 186 insertions(+), 48 deletions(-)
--
2.9.3
^ permalink raw reply
* [PATCH v2 1/9] dt-bindings: arm: Add entry for Broadcom Brahma-B53
From: Florian Fainelli @ 2017-12-19 19:22 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171219192247.29799-1-f.fainelli@gmail.com>
Broadcom's Brahma-B53 CPU is an ARMv8A processor used on a number of
DSL, Cable Modem and Set-top-box SoCs.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
Documentation/devicetree/bindings/arm/cpus.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/arm/cpus.txt b/Documentation/devicetree/bindings/arm/cpus.txt
index a0009b72e9be..f4a777039f03 100644
--- a/Documentation/devicetree/bindings/arm/cpus.txt
+++ b/Documentation/devicetree/bindings/arm/cpus.txt
@@ -169,6 +169,7 @@ described below.
"arm,cortex-r5"
"arm,cortex-r7"
"brcm,brahma-b15"
+ "brcm,brahma-b53"
"brcm,vulcan"
"cavium,thunder"
"cavium,thunder2"
--
2.9.3
^ permalink raw reply related
* [PATCH v2 2/9] dt-bindings: arm: brcmstb: Correct BIUCTRL node documentation
From: Florian Fainelli @ 2017-12-19 19:22 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171219192247.29799-1-f.fainelli@gmail.com>
Correct the Device Tree bindings for the HIF_CPUBIUCTRL node whose
compatible string is actually brcm,bcm<chip-id>-cpu-biu-ctrl. Also
document in the binding the fallback property
("brcm,brcmstb-cpu-biu-ctrl") and update the example accordingly.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
.../devicetree/bindings/arm/bcm/brcm,brcmstb.txt | 22 ++++++++++++----------
1 file changed, 12 insertions(+), 10 deletions(-)
diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,brcmstb.txt b/Documentation/devicetree/bindings/arm/bcm/brcm,brcmstb.txt
index 790e6b0b8306..ed4bf3f388a3 100644
--- a/Documentation/devicetree/bindings/arm/bcm/brcm,brcmstb.txt
+++ b/Documentation/devicetree/bindings/arm/bcm/brcm,brcmstb.txt
@@ -17,21 +17,23 @@ Further, syscon nodes that map platform-specific registers used for general
system control is required:
- compatible: "brcm,bcm<chip_id>-sun-top-ctrl", "syscon"
- - compatible: "brcm,bcm<chip_id>-hif-cpubiuctrl", "syscon"
+ - compatible: "brcm,bcm<chip_id>-cpu-biu-ctrl",
+ "brcm,brcmstb-cpu-biu-ctrl",
+ "syscon"
- compatible: "brcm,bcm<chip_id>-hif-continuation", "syscon"
-hif-cpubiuctrl node
+cpu-biu-ctrl node
-------------------
-SoCs with Broadcom Brahma15 ARM-based CPUs have a specific Bus Interface Unit
-(BIU) block which controls and interfaces the CPU complex to the different
-Memory Controller Ports (MCP), one per memory controller (MEMC). This BIU block
-offers a feature called Write Pairing which consists in collapsing two adjacent
-cache lines into a single (bursted) write transaction towards the memory
-controller (MEMC) to maximize write bandwidth.
+SoCs with Broadcom Brahma15 ARM-based and Brahma53 ARM64-based CPUs have a
+specific Bus Interface Unit (BIU) block which controls and interfaces the CPU
+complex to the different Memory Controller Ports (MCP), one per memory
+controller (MEMC). This BIU block offers a feature called Write Pairing which
+consists in collapsing two adjacent cache lines into a single (bursted) write
+transaction towards the memory controller (MEMC) to maximize write bandwidth.
Required properties:
- - compatible: must be "brcm,bcm7445-hif-cpubiuctrl", "syscon"
+ - compatible: must be "brcm,bcm7445-cpu-biu-ctrl", ""brcm,brcmstb-cpu-biu-ctrl", "syscon"
Optional properties:
@@ -52,7 +54,7 @@ example:
};
hif_cpubiuctrl: syscon at 3e2400 {
- compatible = "brcm,bcm7445-hif-cpubiuctrl", "syscon";
+ compatible = "brcm,bcm7445-cpu-biu-ctrl", "brcm,brcmstb-cpu-biu-ctrl", "syscon";
reg = <0x3e2400 0x5b4>;
brcm,write-pairing;
};
--
2.9.3
^ permalink raw reply related
* [PATCH v2 3/9] soc: brcmstb: Make CPU credit offset more parameterized
From: Florian Fainelli @ 2017-12-19 19:22 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171219192247.29799-1-f.fainelli@gmail.com>
In preparation for fixing and changing values in the CPU_CREDIT_REG
register for B53-based systems, make the offset parameterized.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
drivers/soc/bcm/brcmstb/biuctrl.c | 11 ++++++-----
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/drivers/soc/bcm/brcmstb/biuctrl.c b/drivers/soc/bcm/brcmstb/biuctrl.c
index 3c39415d484f..c3c548fcaa8c 100644
--- a/drivers/soc/bcm/brcmstb/biuctrl.c
+++ b/drivers/soc/bcm/brcmstb/biuctrl.c
@@ -26,6 +26,7 @@
static void __iomem *cpubiuctrl_base;
static bool mcp_wr_pairing_en;
+static unsigned int cpu_credit_reg_offset = CPU_CREDIT_REG_OFFSET;
static int __init mcp_write_pairing_set(void)
{
@@ -34,15 +35,15 @@ static int __init mcp_write_pairing_set(void)
if (!cpubiuctrl_base)
return -1;
- creds = readl_relaxed(cpubiuctrl_base + CPU_CREDIT_REG_OFFSET);
+ creds = readl_relaxed(cpubiuctrl_base + cpu_credit_reg_offset);
if (mcp_wr_pairing_en) {
pr_info("MCP: Enabling write pairing\n");
writel_relaxed(creds | CPU_CREDIT_REG_MCPx_WR_PAIRING_EN_MASK,
- cpubiuctrl_base + CPU_CREDIT_REG_OFFSET);
+ cpubiuctrl_base + cpu_credit_reg_offset);
} else if (creds & CPU_CREDIT_REG_MCPx_WR_PAIRING_EN_MASK) {
pr_info("MCP: Disabling write pairing\n");
writel_relaxed(creds & ~CPU_CREDIT_REG_MCPx_WR_PAIRING_EN_MASK,
- cpubiuctrl_base + CPU_CREDIT_REG_OFFSET);
+ cpubiuctrl_base + cpu_credit_reg_offset);
} else {
pr_info("MCP: Write pairing already disabled\n");
}
@@ -81,7 +82,7 @@ static int brcmstb_cpu_credit_reg_suspend(void)
{
if (cpubiuctrl_base)
cpu_credit_reg_dump =
- readl_relaxed(cpubiuctrl_base + CPU_CREDIT_REG_OFFSET);
+ readl_relaxed(cpubiuctrl_base + cpu_credit_reg_offset);
return 0;
}
@@ -89,7 +90,7 @@ static void brcmstb_cpu_credit_reg_resume(void)
{
if (cpubiuctrl_base)
writel_relaxed(cpu_credit_reg_dump,
- cpubiuctrl_base + CPU_CREDIT_REG_OFFSET);
+ cpubiuctrl_base + cpu_credit_reg_offset);
}
static struct syscore_ops brcmstb_cpu_credit_syscore_ops = {
--
2.9.3
^ permalink raw reply related
* [PATCH v2 4/9] soc: brcmstb: Correct CPU_CREDIT_REG offset for Brahma-B53 CPUs
From: Florian Fainelli @ 2017-12-19 19:22 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171219192247.29799-1-f.fainelli@gmail.com>
On Broadcom Brahma-B53 CPUs, the CPU_CREDIT_REG offset got moved to
0x0b0 instead of 0x184, correct this such that we correcty
enable/disable write-pairing for these chips.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
drivers/soc/bcm/brcmstb/biuctrl.c | 24 +++++++++++++++++++++---
1 file changed, 21 insertions(+), 3 deletions(-)
diff --git a/drivers/soc/bcm/brcmstb/biuctrl.c b/drivers/soc/bcm/brcmstb/biuctrl.c
index c3c548fcaa8c..e8322e663831 100644
--- a/drivers/soc/bcm/brcmstb/biuctrl.c
+++ b/drivers/soc/bcm/brcmstb/biuctrl.c
@@ -21,12 +21,13 @@
#include <linux/syscore_ops.h>
#include <linux/soc/brcmstb/brcmstb.h>
-#define CPU_CREDIT_REG_OFFSET 0x184
+#define B15_CPU_CREDIT_REG_OFFSET 0x184
+#define B53_CPU_CREDIT_REG_OFFSET 0x0b0
#define CPU_CREDIT_REG_MCPx_WR_PAIRING_EN_MASK 0x70000000
static void __iomem *cpubiuctrl_base;
static bool mcp_wr_pairing_en;
-static unsigned int cpu_credit_reg_offset = CPU_CREDIT_REG_OFFSET;
+static unsigned int cpu_credit_reg_offset;
static int __init mcp_write_pairing_set(void)
{
@@ -53,7 +54,7 @@ static int __init mcp_write_pairing_set(void)
static int __init setup_hifcpubiuctrl_regs(void)
{
- struct device_node *np;
+ struct device_node *np, *cpu_dn;
int ret = 0;
np = of_find_compatible_node(NULL, NULL, "brcm,brcmstb-cpu-biu-ctrl");
@@ -70,6 +71,23 @@ static int __init setup_hifcpubiuctrl_regs(void)
}
mcp_wr_pairing_en = of_property_read_bool(np, "brcm,write-pairing");
+
+ cpu_dn = of_get_cpu_node(0, NULL);
+ if (!cpu_dn) {
+ pr_err("failed to obtain CPU device node\n");
+ ret = -ENODEV;
+ goto out;
+ }
+
+ if (of_device_is_compatible(cpu_dn, "brcm,brahma-b15"))
+ cpu_credit_reg_offset = B15_CPU_CREDIT_REG_OFFSET;
+ else if (of_device_is_compatible(cpu_dn, "brcm,brahma-b53"))
+ cpu_credit_reg_offset = B53_CPU_CREDIT_REG_OFFSET;
+ else {
+ pr_err("unsupported CPU\n");
+ ret = -EINVAL;
+ }
+ of_node_put(cpu_dn);
out:
of_node_put(np);
return ret;
--
2.9.3
^ permalink raw reply related
* [PATCH v2 5/9] soc: brcmstb: biuctrl: Prepare for saving/restoring other registers
From: Florian Fainelli @ 2017-12-19 19:22 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171219192247.29799-1-f.fainelli@gmail.com>
In preparation for saving/restoring additional registers required on
some newer platforms (7268, 7271, 7278), migrate the code to use enums
and helper functions to access registers.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
drivers/soc/bcm/brcmstb/biuctrl.c | 75 ++++++++++++++++++++++++++++++---------
1 file changed, 58 insertions(+), 17 deletions(-)
diff --git a/drivers/soc/bcm/brcmstb/biuctrl.c b/drivers/soc/bcm/brcmstb/biuctrl.c
index e8322e663831..16cbfc2e953a 100644
--- a/drivers/soc/bcm/brcmstb/biuctrl.c
+++ b/drivers/soc/bcm/brcmstb/biuctrl.c
@@ -21,13 +21,45 @@
#include <linux/syscore_ops.h>
#include <linux/soc/brcmstb/brcmstb.h>
-#define B15_CPU_CREDIT_REG_OFFSET 0x184
-#define B53_CPU_CREDIT_REG_OFFSET 0x0b0
#define CPU_CREDIT_REG_MCPx_WR_PAIRING_EN_MASK 0x70000000
static void __iomem *cpubiuctrl_base;
static bool mcp_wr_pairing_en;
-static unsigned int cpu_credit_reg_offset;
+static const int *cpubiuctrl_regs;
+
+static inline u32 cbc_readl(int reg)
+{
+ int offset = cpubiuctrl_regs[reg];
+
+ if (offset == -1)
+ return (u32)-1;
+
+ return readl_relaxed(cpubiuctrl_base + offset);
+}
+
+static inline void cbc_writel(u32 val, int reg)
+{
+ int offset = cpubiuctrl_regs[reg];
+
+ if (offset == -1)
+ return;
+
+ writel_relaxed(val, cpubiuctrl_base + offset);
+}
+
+enum cpubiuctrl_regs {
+ CPU_CREDIT_REG = 0,
+};
+
+static const int b15_cpubiuctrl_regs[] = {
+ [CPU_CREDIT_REG] = 0x184,
+};
+
+static const int b53_cpubiuctrl_regs[] = {
+ [CPU_CREDIT_REG] = 0x0b0,
+};
+
+#define NUM_CPU_BIUCTRL_REGS 1
static int __init mcp_write_pairing_set(void)
{
@@ -36,15 +68,15 @@ static int __init mcp_write_pairing_set(void)
if (!cpubiuctrl_base)
return -1;
- creds = readl_relaxed(cpubiuctrl_base + cpu_credit_reg_offset);
+ creds = cbc_readl(CPU_CREDIT_REG);
if (mcp_wr_pairing_en) {
pr_info("MCP: Enabling write pairing\n");
- writel_relaxed(creds | CPU_CREDIT_REG_MCPx_WR_PAIRING_EN_MASK,
- cpubiuctrl_base + cpu_credit_reg_offset);
+ cbc_writel(creds | CPU_CREDIT_REG_MCPx_WR_PAIRING_EN_MASK,
+ CPU_CREDIT_REG);
} else if (creds & CPU_CREDIT_REG_MCPx_WR_PAIRING_EN_MASK) {
pr_info("MCP: Disabling write pairing\n");
- writel_relaxed(creds & ~CPU_CREDIT_REG_MCPx_WR_PAIRING_EN_MASK,
- cpubiuctrl_base + cpu_credit_reg_offset);
+ cbc_writel(creds & ~CPU_CREDIT_REG_MCPx_WR_PAIRING_EN_MASK,
+ CPU_CREDIT_REG);
} else {
pr_info("MCP: Write pairing already disabled\n");
}
@@ -80,9 +112,9 @@ static int __init setup_hifcpubiuctrl_regs(void)
}
if (of_device_is_compatible(cpu_dn, "brcm,brahma-b15"))
- cpu_credit_reg_offset = B15_CPU_CREDIT_REG_OFFSET;
+ cpubiuctrl_regs = b15_cpubiuctrl_regs;
else if (of_device_is_compatible(cpu_dn, "brcm,brahma-b53"))
- cpu_credit_reg_offset = B53_CPU_CREDIT_REG_OFFSET;
+ cpubiuctrl_regs = b53_cpubiuctrl_regs;
else {
pr_err("unsupported CPU\n");
ret = -EINVAL;
@@ -94,21 +126,30 @@ static int __init setup_hifcpubiuctrl_regs(void)
}
#ifdef CONFIG_PM_SLEEP
-static u32 cpu_credit_reg_dump; /* for save/restore */
+static u32 cpubiuctrl_reg_save[NUM_CPU_BIUCTRL_REGS];
static int brcmstb_cpu_credit_reg_suspend(void)
{
- if (cpubiuctrl_base)
- cpu_credit_reg_dump =
- readl_relaxed(cpubiuctrl_base + cpu_credit_reg_offset);
+ unsigned int i;
+
+ if (!cpubiuctrl_base)
+ return 0;
+
+ for (i = 0; i < NUM_CPU_BIUCTRL_REGS; i++)
+ cpubiuctrl_reg_save[i] = cbc_readl(i);
+
return 0;
}
static void brcmstb_cpu_credit_reg_resume(void)
{
- if (cpubiuctrl_base)
- writel_relaxed(cpu_credit_reg_dump,
- cpubiuctrl_base + cpu_credit_reg_offset);
+ unsigned int i;
+
+ if (!cpubiuctrl_base)
+ return;
+
+ for (i = 0; i < NUM_CPU_BIUCTRL_REGS; i++)
+ cbc_writel(cpubiuctrl_reg_save[i], i);
}
static struct syscore_ops brcmstb_cpu_credit_syscore_ops = {
--
2.9.3
^ permalink raw reply related
* [PATCH v2 6/9] soc: brcmstb: biuctrl: Wire-up new registers
From: Florian Fainelli @ 2017-12-19 19:22 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171219192247.29799-1-f.fainelli@gmail.com>
Add definitions for B53 systems register: CPU_MCP_FLOW_REG and
CPU_WRITEBACK_CTRL_REG. These register will be saved and restored
accordingly.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
drivers/soc/bcm/brcmstb/biuctrl.c | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/soc/bcm/brcmstb/biuctrl.c b/drivers/soc/bcm/brcmstb/biuctrl.c
index 16cbfc2e953a..d498f9db01ab 100644
--- a/drivers/soc/bcm/brcmstb/biuctrl.c
+++ b/drivers/soc/bcm/brcmstb/biuctrl.c
@@ -49,17 +49,23 @@ static inline void cbc_writel(u32 val, int reg)
enum cpubiuctrl_regs {
CPU_CREDIT_REG = 0,
+ CPU_MCP_FLOW_REG,
+ CPU_WRITEBACK_CTRL_REG
};
static const int b15_cpubiuctrl_regs[] = {
[CPU_CREDIT_REG] = 0x184,
+ [CPU_MCP_FLOW_REG] = -1,
+ [CPU_WRITEBACK_CTRL_REG] = -1,
};
static const int b53_cpubiuctrl_regs[] = {
[CPU_CREDIT_REG] = 0x0b0,
+ [CPU_MCP_FLOW_REG] = 0x0b4,
+ [CPU_WRITEBACK_CTRL_REG] = 0x22c,
};
-#define NUM_CPU_BIUCTRL_REGS 1
+#define NUM_CPU_BIUCTRL_REGS 3
static int __init mcp_write_pairing_set(void)
{
--
2.9.3
^ permalink raw reply related
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