* [PATCH resend] arm: dts: ls1021a: add reboot node to .dtsi
From: Shawn Guo @ 2017-12-21 8:05 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1512461568-12102-1-git-send-email-rasmus.villemoes@prevas.dk>
On Tue, Dec 05, 2017 at 09:12:47AM +0100, Rasmus Villemoes wrote:
> The LS1021A can be reset via the dcfg regmap in the same way as the
> arm64 layerscape SoCs, so add the corresponding DT node.
>
> Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
We use "ARM: ..." instead of "arm: ..." as prefix for DTS patches going
through i.MX tree.
I fixed prefix up and applied the patch.
Shawn
^ permalink raw reply
* [PATCH 2/2] ARM: dts: imx51-babbage: Fix the 26MHz clock modelling
From: Shawn Guo @ 2017-12-21 7:54 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1512246365-3657-2-git-send-email-festevam@gmail.com>
On Sat, Dec 02, 2017 at 06:26:05PM -0200, Fabio Estevam wrote:
> From: Fabio Estevam <fabio.estevam@nxp.com>
>
> On imx51-babbage there is a 26MHz oscillator that is gated by GPIO3_1.
>
> The output of this clock feeds audio codec clock and USB PHY clocks,
> which are gated by GPIO4_26 and GPIO2_1 respectively.
>
> Fix the clock representation by properly using gpio-gate-clock.
>
> The clock nodes can be moved out of the 'clocks' node.
>
> Based on a commit from Lucas Stach for imx51-zii-rdu1 board.
>
> This also fixes the following build warning with W=1:
>
> arch/arm/boot/dts/imx51-babbage.dtb: Warning (unit_address_vs_reg): Node /clocks/codec_clock has a reg or ranges property, but no unit name
>
> Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
> ---
> arch/arm/boot/dts/imx51-babbage.dts | 67 +++++++++++++++++++++++++++----------
> 1 file changed, 50 insertions(+), 17 deletions(-)
>
> diff --git a/arch/arm/boot/dts/imx51-babbage.dts b/arch/arm/boot/dts/imx51-babbage.dts
> index c432de7..663a3cd 100644
> --- a/arch/arm/boot/dts/imx51-babbage.dts
> +++ b/arch/arm/boot/dts/imx51-babbage.dts
> @@ -25,18 +25,41 @@
> reg = <0x90000000 0x20000000>;
> };
>
> - clocks {
> - ckih1 {
> - clock-frequency = <22579200>;
> - };
> + ckih1 {
> + clock-frequency = <22579200>;
> + };
>
> - clk_26M: codec_clock {
> - compatible = "fixed-clock";
> - reg=<0>;
> - #clock-cells = <0>;
> - clock-frequency = <26000000>;
> - gpios = <&gpio4 26 GPIO_ACTIVE_LOW>;
> - };
> + clk_26M_osc: 26M_osc {
While at it, I suggest we use hyphen rather than underscore in node
name, and all lowercase for node name.
Shawn
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <26000000>;
> + };
> +
> + clk_26M_osc_gate: 26M_gate {
> + compatible = "gpio-gate-clock";
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_clk26mhz_osc>;
> + clocks = <&clk_26M_osc>;
> + #clock-cells = <0>;
> + enable-gpios = <&gpio3 1 GPIO_ACTIVE_HIGH>;
> + };
> +
> + clk_26M_audio: audio_gate {
> + compatible = "gpio-gate-clock";
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_clk26mhz_audio>;
> + clocks = <&clk_26M_osc_gate>;
> + #clock-cells = <0>;
> + enable-gpios = <&gpio4 26 GPIO_ACTIVE_LOW>;
> + };
> +
> + clk_26M_usb: usbhost_gate {
> + compatible = "gpio-gate-clock";
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_clk26mhz_usb>;
> + clocks = <&clk_26M_osc_gate>;
> + #clock-cells = <0>;
> + enable-gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
> };
>
> display1: disp1 {
> @@ -162,7 +185,7 @@
> usbh1phy: usbh1phy at 0 {
> compatible = "usb-nop-xceiv";
> reg = <0>;
> - clocks = <&clks IMX5_CLK_DUMMY>;
> + clocks = <&clk_26M_usb>;
> clock-names = "main_clk";
> reset-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>;
> vcc-supply = <&vusb_reg>;
> @@ -345,10 +368,8 @@
>
> sgtl5000: codec at a {
> compatible = "fsl,sgtl5000";
> - pinctrl-names = "default";
> - pinctrl-0 = <&pinctrl_clkcodec>;
> reg = <0x0a>;
> - clocks = <&clk_26M>;
> + clocks = <&clk_26M_audio>;
> VDDA-supply = <&vdig_reg>;
> VDDIO-supply = <&vvideo_reg>;
> };
> @@ -441,9 +462,21 @@
> >;
> };
>
> - pinctrl_clkcodec: clkcodecgrp {
> + pinctrl_clk26mhz_audio: clk26mhzaudiocgrp {
> + fsl,pins = <
> + MX51_PAD_CSPI1_RDY__GPIO4_26 0x85
> + >;
> + };
> +
> + pinctrl_clk26mhz_osc: clk26mhzoscgrp {
> + fsl,pins = <
> + MX51_PAD_DI1_PIN12__GPIO3_1 0x85
> + >;
> + };
> +
> + pinctrl_clk26mhz_usb: clk26mhzusbgrp {
> fsl,pins = <
> - MX51_PAD_CSPI1_RDY__GPIO4_26 0x80000000
> + MX51_PAD_EIM_D17__GPIO2_1 0x85
> >;
> };
>
> --
> 2.7.4
>
^ permalink raw reply
* [kernel-hardening] [PATCH] arm: kernel: implement fast refcount checking
From: Jinbum Park @ 2017-12-21 7:50 UTC (permalink / raw)
To: linux-arm-kernel
This adds support to arm for fast refcount checking.
It's heavily based on x86, arm64 implementation.
(7a46ec0e2f48 ("locking/refcounts,
x86/asm: Implement fast refcount overflow protection)
This doesn't support under-ARMv6, thumb2-kernel yet.
Test result of this patch is as follows.
1. LKDTM test
- All REFCOUNT_* tests in LKDTM have passed.
2. Performance test
- Cortex-A7, Quad Core, 450 MHz
- Case with CONFIG_ARCH_HAS_REFCOUNT,
perf stat -B -- echo ATOMIC_TIMING \
>/sys/kernel/debug/provoke-crash/DIRECT
204.364247057 seconds time elapsed
perf stat -B -- echo REFCOUNT_TIMING \
>/sys/kernel/debug/provoke-crash/DIRECT
208.006062212 seconds time elapsed
- Case with CONFIG_REFCOUNT_FULL,
perf stat -B -- echo REFCOUNT_TIMING \
>/sys/kernel/debug/provoke-crash/DIRECT
369.256523453 seconds time elapsed
Signed-off-by: Jinbum Park <jinb.park7@gmail.com>
---
arch/arm/Kconfig | 1 +
arch/arm/include/asm/atomic.h | 82 +++++++++++++++++++++++++++++++++++++++++
arch/arm/include/asm/refcount.h | 55 +++++++++++++++++++++++++++
arch/arm/kernel/traps.c | 44 ++++++++++++++++++++++
4 files changed, 182 insertions(+)
create mode 100644 arch/arm/include/asm/refcount.h
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 3ea00d6..e07b986 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -7,6 +7,7 @@ config ARM
select ARCH_HAS_DEBUG_VIRTUAL
select ARCH_HAS_DEVMEM_IS_ALLOWED
select ARCH_HAS_ELF_RANDOMIZE
+ select ARCH_HAS_REFCOUNT if __LINUX_ARM_ARCH__ >= 6 && (!THUMB2_KERNEL)
select ARCH_HAS_SET_MEMORY
select ARCH_HAS_STRICT_KERNEL_RWX if MMU && !XIP_KERNEL
select ARCH_HAS_STRICT_MODULE_RWX if MMU
diff --git a/arch/arm/include/asm/atomic.h b/arch/arm/include/asm/atomic.h
index 66d0e21..b203396 100644
--- a/arch/arm/include/asm/atomic.h
+++ b/arch/arm/include/asm/atomic.h
@@ -17,6 +17,7 @@
#include <linux/irqflags.h>
#include <asm/barrier.h>
#include <asm/cmpxchg.h>
+#include <asm/opcodes.h>
#define ATOMIC_INIT(i) { (i) }
@@ -32,6 +33,87 @@
#if __LINUX_ARM_ARCH__ >= 6
+#ifdef CONFIG_ARCH_HAS_REFCOUNT
+
+#define REFCOUNT_ARM_BKPT_INSTR 0xfff001fc
+
+/*
+ * 1) encode call site that detect overflow in dummy b instruction.
+ * 2) overflow handler can decode dummy b, and get call site.
+ * 3) "(call site + 4) == strex" is always true.
+ * 4) the handler can get counter address via decoding strex.
+ */
+#define REFCOUNT_TRIGGER_BKPT \
+ __inst_arm(REFCOUNT_ARM_BKPT_INSTR) \
+" b 22b\n"
+
+/* If bkpt is triggered, skip strex routines after handling overflow */
+#define REFCOUNT_CHECK_TAIL \
+" strex %1, %0, [%3]\n" \
+" teq %1, #0\n" \
+" bne 1b\n" \
+" .subsection 1\n" \
+"33:\n" \
+ REFCOUNT_TRIGGER_BKPT \
+" .previous\n"
+
+#define REFCOUNT_POST_CHECK_NEG \
+"22: bmi 33f\n" \
+ REFCOUNT_CHECK_TAIL
+
+#define REFCOUNT_POST_CHECK_NEG_OR_ZERO \
+" beq 33f\n" \
+ REFCOUNT_POST_CHECK_NEG
+
+#define REFCOUNT_SMP_MB smp_mb()
+#define REFCOUNT_SMP_NONE_MB
+
+#define REFCOUNT_OP(op, c_op, asm_op, post, mb) \
+static inline int __refcount_##op(int i, atomic_t *v) \
+{ \
+ unsigned long tmp; \
+ int result; \
+\
+ REFCOUNT_SMP_ ## mb; \
+ prefetchw(&v->counter); \
+ __asm__ __volatile__("@ __refcount_" #op "\n" \
+"1: ldrex %0, [%3]\n" \
+" " #asm_op " %0, %0, %4\n" \
+ REFCOUNT_POST_CHECK_ ## post \
+ : "=&r" (result), "=&r" (tmp), "+Qo" (v->counter) \
+ : "r" (&v->counter), "Ir" (i) \
+ : "cc"); \
+\
+ REFCOUNT_SMP_ ## mb; \
+ return result; \
+} \
+
+REFCOUNT_OP(add_lt, +=, adds, NEG_OR_ZERO, NONE_MB);
+REFCOUNT_OP(sub_lt, -=, subs, NEG, MB);
+REFCOUNT_OP(sub_le, -=, subs, NEG_OR_ZERO, NONE_MB);
+
+static inline int __refcount_add_not_zero(int i, atomic_t *v)
+{
+ unsigned long tmp;
+ int result;
+
+ prefetchw(&v->counter);
+ __asm__ __volatile__("@ __refcount_add_not_zero\n"
+"1: ldrex %0, [%3]\n"
+" teq %0, #0\n"
+" beq 2f\n"
+" adds %0, %0, %4\n"
+ REFCOUNT_POST_CHECK_NEG
+"2:"
+ : "=&r" (result), "=&r" (tmp), "+Qo" (v->counter)
+ : "r" (&v->counter), "Ir" (i)
+ : "cc");
+
+ return result;
+}
+
+#endif /* CONFIG_ARCH_HAS_REFCOUNT */
+
/*
* ARMv6 UP and SMP safe atomic ops. We use load exclusive and
* store exclusive to ensure that these are atomic. We may loop
diff --git a/arch/arm/include/asm/refcount.h b/arch/arm/include/asm/refcount.h
new file mode 100644
index 0000000..300a2d5
--- /dev/null
+++ b/arch/arm/include/asm/refcount.h
@@ -0,0 +1,55 @@
+/*
+ * arm-specific implementation of refcount_t. Based on x86 version and
+ * PAX_REFCOUNT from PaX/grsecurity.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __ASM_REFCOUNT_H
+#define __ASM_REFCOUNT_H
+
+#include <linux/refcount.h>
+
+#include <asm/atomic.h>
+#include <asm/uaccess.h>
+
+static __always_inline void refcount_add(int i, refcount_t *r)
+{
+ __refcount_add_lt(i, &r->refs);
+}
+
+static __always_inline void refcount_inc(refcount_t *r)
+{
+ __refcount_add_lt(1, &r->refs);
+}
+
+static __always_inline void refcount_dec(refcount_t *r)
+{
+ __refcount_sub_le(1, &r->refs);
+}
+
+static __always_inline __must_check bool refcount_sub_and_test(unsigned int i,
+ refcount_t *r)
+{
+ return __refcount_sub_lt(i, &r->refs) == 0;
+}
+
+static __always_inline __must_check bool refcount_dec_and_test(refcount_t *r)
+{
+ return __refcount_sub_lt(1, &r->refs) == 0;
+}
+
+static __always_inline __must_check bool refcount_add_not_zero(unsigned int i,
+ refcount_t *r)
+{
+ return __refcount_add_not_zero(i, &r->refs) != 0;
+}
+
+static __always_inline __must_check bool refcount_inc_not_zero(refcount_t *r)
+{
+ return __refcount_add_not_zero(1, &r->refs) != 0;
+}
+
+#endif
diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c
index 5cf0488..a309215 100644
--- a/arch/arm/kernel/traps.c
+++ b/arch/arm/kernel/traps.c
@@ -795,8 +795,52 @@ void abort(void)
}
EXPORT_SYMBOL(abort);
+#ifdef CONFIG_ARCH_HAS_REFCOUNT
+
+static int refcount_overflow_handler(struct pt_regs *regs, unsigned int instr)
+{
+ u32 dummy_b = le32_to_cpup((__le32 *)(regs->ARM_pc + 4));
+ u32 strex;
+ u32 rt;
+ bool zero = regs->ARM_cpsr & PSR_Z_BIT;
+
+ /* point pc to the branch instruction that detected the overflow */
+ regs->ARM_pc += 4 + (((s32)dummy_b << 8) >> 6) + 8;
+
+ /* decode strex to set refcount */
+ strex = le32_to_cpup((__le32 *)(regs->ARM_pc + 4));
+ rt = (strex << 12) >> 28;
+
+ /* unconditionally saturate the refcount */
+ *(int *)regs->uregs[rt] = INT_MIN / 2;
+
+ /* report error */
+ refcount_error_report(regs, zero ? "hit zero" : "overflow");
+
+ /* advance pc and proceed, skip "strex" routine */
+ regs->ARM_pc += 16;
+ return 0;
+}
+
+static struct undef_hook refcount_break_hook = {
+ .instr_mask = 0xffffffff,
+ .instr_val = REFCOUNT_ARM_BKPT_INSTR,
+ .cpsr_mask = 0,
+ .cpsr_val = 0,
+ .fn = refcount_overflow_handler,
+};
+
+#define register_refcount_break_hook() register_undef_hook(&refcount_break_hook)
+
+#else /* !CONFIG_ARCH_HAS_REFCOUNT */
+
+#define register_refcount_break_hook()
+
+#endif /* CONFIG_ARCH_HAS_REFCOUNT */
+
void __init trap_init(void)
{
+ register_refcount_break_hook();
return;
}
--
1.9.1
^ permalink raw reply related
* [PATCH 1/2] ARM: dts: imx51-babbage: Pass the USB PHY regulator
From: Shawn Guo @ 2017-12-21 7:48 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1512246365-3657-1-git-send-email-festevam@gmail.com>
On Sat, Dec 02, 2017 at 06:26:04PM -0200, Fabio Estevam wrote:
> From: Fabio Estevam <fabio.estevam@nxp.com>
>
> The USB PHYs are supplied via MC13892 VUSB regulator rail,
> so properly describe this in the device tree.
>
> Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Applied this one, thanks.
^ permalink raw reply
* [PATCH 0/6] Add CPU Frequency scaling support on Armada 37xx
From: Andre Heider @ 2017-12-21 7:45 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <87wp1kge99.fsf@free-electrons.com>
On 18/12/17 18:03, Gregory CLEMENT wrote:
> Hi Andre,
>
> On mer., d?c. 06 2017, Andre Heider <a.heider@gmail.com> wrote:
>
>> On 06/12/17 12:50, Gregory CLEMENT wrote:
>>> I did a last rebase before sending the series to remove the avs part not
>>> working yet. And during this rebase I introduced an bug.
>>>
>>> I will send a v2 soon if you are intersected by testing it right now,
>>> here it is the fix:
>>>
>>> iff --git a/drivers/cpufreq/armada-37xx-cpufreq.c b/drivers/cpufreq/armada-37xx-cpufreq.c
>>> index 40c9a744cc6e..96c2600009b5 100644
>>> --- a/drivers/cpufreq/armada-37xx-cpufreq.c
>>> +++ b/drivers/cpufreq/armada-37xx-cpufreq.c
>>> @@ -219,7 +219,8 @@ static int __init armada37xx_cpufreq_driver_init(void)
>>> */
>>> for (load_level = ARMADA_37XX_DVFS_LOAD_0; load_level < LOAD_LEVEL_NR;
>>> load_level++) {
>>> - unsigned long freq = dvfs->divider[load_level];
>>> + unsigned long freq = cur_frequency /
>>> + dvfs->divider[load_level];
>>> ret = dev_pm_opp_add(cpu_dev, freq, 0);
>>> if (ret)
>>
>> Much better, that seems to work so far, thanks!
>>
>> My espressobin now gets these frequencies: 200 MHz, 250 MHz, 500 MHz
>> and 1000 MHz.
>>
>> With the schedutil governor and `watch -n 0.2 cpufreq-info -f -m` it
>> jumps over all of those depending on the load, nice:
>>
>> Tested-by: Andre Heider <a.heider@gmail.com>
>>
>> The measured power usage doesn't drop though, I guess that requires
>> the AVS part you mentioned? Looking forward to it ;)
>
> Well I did some measurement and i saw some drop, according to my notes:
>
> @ 250MHz: 222mA at 12V => 2.66W
> @ 1000MHz: 238mA at 12CV => 2.87W
>
> Not something huge, but only the CPUs which are concerned so it's not so
> bad.
Oh, okay, my cheap equipment isn't capable to measure a difference of
just 0.2w... Guess I was hoping for more ;)
>> On a related note: Do you know if power usage can be lowered by
>> disabling eth phys? Is that possible on mainline?
>
> For the test I have done just by removing an Ethernet cable we save a
> lot of power, so it helps. I'm sure it is doable on mainline, but maybe
> currently, there is something still missing.
Promising, was that with a downstream kernel?
Thanks,
Andre
^ permalink raw reply
* [PATCH] ARM: dts: imx6qdl-zii-rdu2: Remove device_type from PCI subnode
From: Shawn Guo @ 2017-12-21 7:44 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1512234488-8760-1-git-send-email-festevam@gmail.com>
On Sat, Dec 02, 2017 at 03:08:08PM -0200, Fabio Estevam wrote:
> From: Fabio Estevam <fabio.estevam@nxp.com>
>
> device_type = "pci" should be used for the SoC level PCI controller and
> it is already present at imx6qdl.dtsi.
>
> Remove it from the subnode in order to fix the following build
> warnings with W=1:
>
> arch/arm/boot/dts/imx6q-zii-rdu2.dtb: Warning (pci_bridge): Node /soc/pcie at 1ffc000/pci at 0 missing ranges for PCI bridge (or not a bridge)
> arch/arm/boot/dts/imx6q-zii-rdu2.dtb: Warning (pci_bridge): Node /soc/pcie at 1ffc000/pci at 0 missing bus-range for PCI bridge
> arch/arm/boot/dts/imx6q-zii-rdu2.dtb: Warning (unit_address_format): Failed prerequisite 'pci_bridge'
> arch/arm/boot/dts/imx6q-zii-rdu2.dtb: Warning (pci_device_reg): Failed prerequisite 'pci_bridge'
> arch/arm/boot/dts/imx6q-zii-rdu2.dtb: Warning (pci_device_bus_num): Failed prerequisite 'pci_bridge'
>
> Cc: Lucas Stach <l.stach@pengutronix.de>
> Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Applied, thanks.
^ permalink raw reply
* [PATCH v2 01/12] ARM: dts: imx51-ts4800: Fix syscon and touschscreen nodes
From: Shawn Guo @ 2017-12-21 7:41 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1512390016-703-1-git-send-email-festevam@gmail.com>
On Mon, Dec 04, 2017 at 10:20:05AM -0200, Fabio Estevam wrote:
> From: Fabio Estevam <fabio.estevam@nxp.com>
>
> The syscon node has an incorrect notation for its unit address and the
> wdt node has an unneeded unit address.
>
> Fix them so that the following build warnings with W=1 are gone:
>
> arch/arm/boot/dts/imx51-ts4800.dtb: Warning (unit_address_vs_reg): Node /soc/aips at 80000000/weim at 83fda000/fpga at 0/syscon at b0010000/wdt at e has a unit name, but no reg property
> arch/arm/boot/dts/imx51-ts4800.dtb: Warning (unit_address_vs_reg): Node /soc/aips at 80000000/weim at 83fda000/fpga at 0/touchscreen has a reg or ranges property, but no unit name
> arch/arm/boot/dts/imx51-ts4800.dtb: Warning (simple_bus_reg): Node /soc/aips at 80000000/weim at 83fda000/fpga at 0/syscon at b0010000 simple-bus unit address format error, expected "10000"
> arch/arm/boot/dts/imx51-ts4800.dtb: Warning (simple_bus_reg): Node /soc/aips at 80000000/weim at 83fda000/fpga at 0/touchscreen simple-bus unit address format error, expected "12000"
>
> Cc: Damien Riegel <damien.riegel@savoirfairelinux.com>
> Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
> Reviewed-by: Damien Riegel <damien.riegel@savoirfairelinux.com>
Applied all, thanks.
^ permalink raw reply
* [PATCH 1/2][v2] ARM: dts: Add big-endian for IFC on LS1021A
From: Shawn Guo @ 2017-12-21 7:32 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <HE1PR04MB1241243DE5FE86833DD0B509970D0@HE1PR04MB1241.eurprd04.prod.outlook.com>
On Thu, Dec 21, 2017 at 07:19:12AM +0000, Prabhakar Kushwaha wrote:
> Are you referring to this discussion https://patchwork.ozlabs.org/patch/842543/?
> Due to which binding are not ACK-ed.
Hmm, I'm talking about Rob's comment below.
https://www.spinics.net/lists/arm-kernel/msg620518.html
In any case, I cannot apply the dts change before the bindings part gets
ACK-ed by DT maintainer.
Shawn
^ permalink raw reply
* [RESEND PATCH v5 0/6] ARM: Add Variscite DART-MX6 SoM and Carrier-board support
From: Shawn Guo @ 2017-12-21 7:26 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1512379270-27436-1-git-send-email-narmstrong@baylibre.com>
On Mon, Dec 04, 2017 at 10:21:04AM +0100, Neil Armstrong wrote:
> Neil Armstrong (6):
> ARM: dts: imx6qdl-pinfunc: Add missing
> MX6QDL_PAD_ENET_RXD0__OSC32K_32K_OUT
> dt-bindings: Add vendor prefix for Solomon Goldentek Display
> Corporation
> dt-bindings: display: Add bindings for SGD GKTW70SDAE4SE Panel
> ARM: dts: imx6qdl: Add Variscite DART-MX6 SoM support
> ARM: dts: imx6q: Add Variscite DART-MX6 Carrier-board support
> ARM: imx_v6_v7_defconfig: Add missing config for DART-MX6 SoM
Applied all, thanks.
^ permalink raw reply
* [PATCH 1/2][v2] ARM: dts: Add big-endian for IFC on LS1021A
From: Prabhakar Kushwaha @ 2017-12-21 7:19 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171221071056.GF3766@dragon>
Hi Shawn,
> -----Original Message-----
> From: Shawn Guo [mailto:shawnguo at kernel.org]
> Sent: Thursday, December 21, 2017 12:41 PM
> To: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
> Cc: devicetree at vger.kernel.org; robh at kernel.org; mark.rutland at arm.com;
> Alison Wang <alison.wang@nxp.com>; Jagdish Gediya
> <jagdish.gediya@nxp.com>; linux-arm-kernel at lists.infradead.org
> Subject: Re: [PATCH 1/2][v2] ARM: dts: Add big-endian for IFC on LS1021A
>
> On Thu, Dec 21, 2017 at 05:14:36AM +0000, Prabhakar Kushwaha wrote:
> > Hi Shawn,
> >
> > > -----Original Message-----
> > > From: Prabhakar Kushwaha [mailto:prabhakar.kushwaha at nxp.com]
> > > Sent: Thursday, November 30, 2017 9:12 AM
> > > To: devicetree at vger.kernel.org; robh at kernel.org; mark.rutland at arm.com;
> > > shawnguo at kernel.org
> > > Cc: linux-arm-kernel at lists.infradead.org; Jagdish Gediya
> > > <jagdish.gediya@nxp.com>; Alison Wang <alison.wang@nxp.com>;
> Prabhakar
> > > Kushwaha <prabhakar.kushwaha@nxp.com>
> > > Subject: [PATCH 1/2][v2] ARM: dts: Add big-endian for IFC on LS1021A
> > >
> > > From: Jagdish Gediya <jagdish.gediya@nxp.com>
> > >
> > > For the patch to update struct map_info's swap field based on device
> > > characteristics defined in device tree, big-endian parameter is added
> > > for LS1021A.
> > >
> > > Signed-off-by: Alison Wang <alison.wang@nxp.com>
> > > Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com>
> > > Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
> > > ---
> > > Changes for v2: updated subject
> > >
> > > arch/arm/boot/dts/ls1021a.dtsi | 1 +
> > > 1 file changed, 1 insertion(+)
> > >
> > > diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
> > > index 9319e1f..babb086 100644
> > > --- a/arch/arm/boot/dts/ls1021a.dtsi
> > > +++ b/arch/arm/boot/dts/ls1021a.dtsi
> > > @@ -145,6 +145,7 @@
> > > ifc: ifc at 1530000 {
> > > compatible = "fsl,ifc", "simple-bus";
> > > reg = <0x0 0x1530000 0x0 0x10000>;
> > > + big-endian;
> > > interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
> > > };
> > >
> > > --
> > > 1.9.1
> >
> > There are no review comments on this patch.
> >
> > Can you please accept this patch
>
> It seems that the bindings hasn't been ACK-ed by DT maintainer.
>
Are you referring to this discussion https://patchwork.ozlabs.org/patch/842543/?
Due to which binding are not ACK-ed.
--pk
^ permalink raw reply
* [PATCH 2/2][v2] ARM: dts: ls1021aqds: Add nand node for ifc controller
From: Shawn Guo @ 2017-12-21 7:14 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1512013344-4042-3-git-send-email-prabhakar.kushwaha@nxp.com>
On Thu, Nov 30, 2017 at 09:12:24AM +0530, Prabhakar Kushwaha wrote:
> LS1021AQDS support NAND flash on IFC chip-select 2.
>
> So add NAND node in device tree for IFC controller.
>
> Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com>
> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Applied, thanks.
^ permalink raw reply
* [PATCH 1/2][v2] ARM: dts: Add big-endian for IFC on LS1021A
From: Shawn Guo @ 2017-12-21 7:10 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <HE1PR04MB1241E7538E97597B76606FF4970D0@HE1PR04MB1241.eurprd04.prod.outlook.com>
On Thu, Dec 21, 2017 at 05:14:36AM +0000, Prabhakar Kushwaha wrote:
> Hi Shawn,
>
> > -----Original Message-----
> > From: Prabhakar Kushwaha [mailto:prabhakar.kushwaha at nxp.com]
> > Sent: Thursday, November 30, 2017 9:12 AM
> > To: devicetree at vger.kernel.org; robh at kernel.org; mark.rutland at arm.com;
> > shawnguo at kernel.org
> > Cc: linux-arm-kernel at lists.infradead.org; Jagdish Gediya
> > <jagdish.gediya@nxp.com>; Alison Wang <alison.wang@nxp.com>; Prabhakar
> > Kushwaha <prabhakar.kushwaha@nxp.com>
> > Subject: [PATCH 1/2][v2] ARM: dts: Add big-endian for IFC on LS1021A
> >
> > From: Jagdish Gediya <jagdish.gediya@nxp.com>
> >
> > For the patch to update struct map_info's swap field based on device
> > characteristics defined in device tree, big-endian parameter is added
> > for LS1021A.
> >
> > Signed-off-by: Alison Wang <alison.wang@nxp.com>
> > Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com>
> > Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
> > ---
> > Changes for v2: updated subject
> >
> > arch/arm/boot/dts/ls1021a.dtsi | 1 +
> > 1 file changed, 1 insertion(+)
> >
> > diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
> > index 9319e1f..babb086 100644
> > --- a/arch/arm/boot/dts/ls1021a.dtsi
> > +++ b/arch/arm/boot/dts/ls1021a.dtsi
> > @@ -145,6 +145,7 @@
> > ifc: ifc at 1530000 {
> > compatible = "fsl,ifc", "simple-bus";
> > reg = <0x0 0x1530000 0x0 0x10000>;
> > + big-endian;
> > interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
> > };
> >
> > --
> > 1.9.1
>
> There are no review comments on this patch.
>
> Can you please accept this patch
It seems that the bindings hasn't been ACK-ed by DT maintainer.
Shawn
^ permalink raw reply
* [PATCH v2 2/2] PCI: mediatek: Fixup class type for MT7622
From: Honghui Zhang @ 2017-12-21 7:01 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1513838476.23174.3.camel@mhfsdcap03>
On Thu, 2017-12-21 at 14:41 +0800, Yong Wu wrote:
> On Thu, 2017-12-21 at 10:11 +0800, honghui.zhang at mediatek.com wrote:
> > From: Honghui Zhang <honghui.zhang@mediatek.com>
> >
> > The host bridge of MT7622 has hardware code the class code to an
> > arbitrary, meaningless value, fix that.
> >
> > Signed-off-by: Honghui Zhang <honghui.zhang@mediatek.com>
> > ---
> > drivers/pci/host/pcie-mediatek.c | 12 ++++++++++++
> > 1 file changed, 12 insertions(+)
> >
> > diff --git a/drivers/pci/host/pcie-mediatek.c b/drivers/pci/host/pcie-mediatek.c
> > index 3248771..ae8d367 100644
> > --- a/drivers/pci/host/pcie-mediatek.c
> > +++ b/drivers/pci/host/pcie-mediatek.c
> > @@ -1174,3 +1174,15 @@ static struct platform_driver mtk_pcie_driver = {
> > },
> > };
> > builtin_platform_driver(mtk_pcie_driver);
> > +
> > +/* The host bridge of MT7622 advertises the wrong device class. */
> > +static void mtk_fixup_class(struct pci_dev *dev)
> > +{
> > + dev->class = PCI_CLASS_BRIDGE_PCI << 8;
> > +}
> > +
> > +/*
> > + * The HW default value of vendor id and device id for mt7622 are 0x0e8d,
> > + * 0x3258, which are arbitrary, meaningless values.
> > + */
>
> What's the right vendor id and device id? is it possible to fix them
> too?
Vendor ID is managed by PCI-SIG, you may get the assigned vendor ID
from:
https://pci-ids.ucw.cz/read/PC?restrict=
The vendor ID for Mediatek Corp. should be 14c3.
Device ID is something like vendor-defined.
Those values are in the configuration space and are read-only defined by
spec, it's been stored at the pci_dev, we may change the vendor and
device values in pci_dev, but I don't think it's necessary to change
that.
BTW, Does anyone really cares about the vendor ID and device ID except
the device's driver?
thanks.
>
> > +DECLARE_PCI_FIXUP_EARLY(0x0e8d, 0x3258, mtk_fixup_class);
>
>
^ permalink raw reply
* [PATCH 1/7] soc: mediatek: Add USB wakeup driver
From: Chunfeng Yun @ 2017-12-21 6:50 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171215205550.dkiymkok6arheidg@rob-hp-laptop>
On Fri, 2017-12-15 at 14:55 -0600, Rob Herring wrote:
> On Sat, Dec 09, 2017 at 04:45:30PM +0800, Chunfeng Yun wrote:
> > This driver is used to support usb wakeup which is controlled by
> > the glue layer between SSUSB and SPM. Usually the glue layer is put
> > into a system controller, such as pericfg module, which is
> > represented by a syscon node in DTS.
> > Due to the glue layer may vary on different SoCs, it's useful to
> > extract a separated driver to simplify usb controller drivers.
> >
> > Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
> > ---
> > drivers/soc/mediatek/Kconfig | 8 +
> > drivers/soc/mediatek/Makefile | 1 +
> > drivers/soc/mediatek/mtk-usb-wakeup.c | 519 ++++++++++++++++++++++++++
> > include/dt-bindings/soc/mediatek,usb-wakeup.h | 15 +
>
> This belongs in the binding patch and that should come first.
>
> > include/linux/soc/mediatek/usb-wakeup.h | 88 +++++
> > 5 files changed, 631 insertions(+)
> > create mode 100644 drivers/soc/mediatek/mtk-usb-wakeup.c
> > create mode 100644 include/dt-bindings/soc/mediatek,usb-wakeup.h
> > create mode 100644 include/linux/soc/mediatek/usb-wakeup.h
>
> > +++ b/drivers/soc/mediatek/mtk-usb-wakeup.c
> > @@ -0,0 +1,519 @@
> > +/*
> > + * Copyright (c) 2017 MediaTek Inc.
> > + * Author: Chunfeng Yun <chunfeng.yun@mediatek.com>
> > + *
> > + * SPDX-License-Identifier: GPL-2.0
>
> This should be the first line of the file and use a // style comment.
>
> [...]
>
> > diff --git a/include/dt-bindings/soc/mediatek,usb-wakeup.h b/include/dt-bindings/soc/mediatek,usb-wakeup.h
> > new file mode 100644
> > index 0000000..2461795
> > --- /dev/null
> > +++ b/include/dt-bindings/soc/mediatek,usb-wakeup.h
> > @@ -0,0 +1,15 @@
> > +/*
> > + * Copyright (c) 2017 MediaTek Inc.
> > + * Author: Chunfeng Yun <chunfeng.yun@mediatek.com>
> > + *
> > + * SPDX-License-Identifier: GPL-2.0
>
> ditto. Except headers use /* */ comments...
modify it next version. Thanks
^ permalink raw reply
* [PATCH] irqchip/gic-v3-its: Flush GICR caching for a cross node collection move of an irq
From: Ganapatrao Kulkarni @ 2017-12-21 6:49 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <acac628e-d4fa-5b16-2619-144818f2261a@arm.com>
On Wed, Dec 20, 2017 at 6:42 PM, Marc Zyngier <marc.zyngier@arm.com> wrote:
> On 20/12/17 09:34, Ganapatrao Kulkarni wrote:
>> Hi Marc,
>>
>> On Wed, Dec 20, 2017 at 2:56 PM, Marc Zyngier <marc.zyngier@arm.com> wrote:
>>> On 20/12/17 09:15, Ganapatrao Kulkarni wrote:
>>>> When an interrupt is moved, it is possible that an implementation that
>>>> supports caching might still have cached data for a previous
>>>> (no longer valid) mapping of the interrupt. In particular, in a distributed
>>>> GIC implementation like multi-socket SoC platfroms. Hence it is necessary
>>>> to flush cached entries after cross node collection migration.
>>>>
>>>> Signed-off-by: Ganapatrao Kulkarni <ganapatrao.kulkarni@cavium.com>
>>>> ---
>>>> drivers/irqchip/irq-gic-v3-its.c | 6 ++++++
>>>> 1 file changed, 6 insertions(+)
>>>>
>>>> diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c
>>>> index 4039e64..ea849a1 100644
>>>> --- a/drivers/irqchip/irq-gic-v3-its.c
>>>> +++ b/drivers/irqchip/irq-gic-v3-its.c
>>>> @@ -1119,6 +1119,12 @@ static int its_set_affinity(struct irq_data *d, const struct cpumask *mask_val,
>>>> if (cpu != its_dev->event_map.col_map[id]) {
>>>> target_col = &its_dev->its->collections[cpu];
>>>> its_send_movi(its_dev, target_col, id);
>>>> + /* Issue INV for cross node collection move on
>>>> + * multi socket systems.
>>>> + */
>>>> + if (cpu_to_node(cpu) !=
>>>> + cpu_to_node(its_dev->event_map.col_map[id]))
>>>> + its_send_inv(its_dev, id);
>>>> its_dev->event_map.col_map[id] = cpu;
>>>> irq_data_update_effective_affinity(d, cpumask_of(cpu));
>>>> }
>>>>
>>>
>>> The MOVI command doesn't have any such requirement (it only mandates
>>> synchronization), and doesn't say anything about distributed vs monolithic.
>>
>> GIC-v3 spec do mention to issue ITS INV command or a write to GICR_INVLPIR.
>> pasting below snippet of MOVI command description.
>>
>> "When an interrupt is moved to a collection, it is possible that an
>> implementation that supports speculative caching
>> might still have cached data for a previous (no longer valid) mapping
>> of the interrupt. Hence, implementations
>> must take care to invalidate any data associated with an interrupt
>> when it is moved. In particular, in a distributed
>> implementation, the ITS must write to the appropriate GICR_* register
>> to perform the invalidation in the redistributor."
>
> Doing some documentation archaeology, I found that this wording has been
> dropped from the engineering specification in August 2014, and was never
> included in the architecture specification. I suggest you start using a
> slightly more up-to-date set of documentation...
thanks Marc for digging in to archive.
>
> Now, back to your point: what it says in the bit of (confidential)
> document that you quoted is that the *HW* must perform the invalidation
> (that's what the words "implementations" and "ITS" refer to), not some
> random bits of SW.
>
> If you know of an implementation that suffers from this, please resend a
> patch that handles this as a quirk, with a proper erratum number.
Sure, this is being discussed internally and will repost as errata fix
at the earliest.
>
> Thanks,
>
> M.
> --
> Jazz is not dead. It just smells funny...
thanks
Ganapat
^ permalink raw reply
* [PATCH 0/7] Add USB remote wakeup driver
From: Chunfeng Yun @ 2017-12-21 6:48 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171215205504.r6ol7fbbeyghb73w@rob-hp-laptop>
On Fri, 2017-12-15 at 14:55 -0600, Rob Herring wrote:
> On Sat, Dec 09, 2017 at 04:45:29PM +0800, Chunfeng Yun wrote:
> > These patches introduce the SSUSB and SPM glue layer driver which is
> > used to support usb remote wakeup. Usually the glue layer is put into
> > a system controller, such as PERICFG module.
> > The old way to support usb wakeup is put into SSUSB controller drivers,
> > including xhci-mtk driver and mtu3 driver, but there are some problems:
> > 1. can't disdinguish the relation between glue layer and SSUSB IP
> > when SoCs supports multi SSUSB IPs;
> > 2. duplicated code for wakeup are put into both xhci-mtk and mtu3
> > drivers;
> > 3. the glue layer may vary on different SoCs with SSUSB IP, and will
> > make SSUSB controller drivers complicated;
> > In order to resolve these problems, it's useful to make the glue layer
> > transparent by extracting a seperated driver, meanwhile to reduce the
> > duplicated code and simplify SSUSB controller drivers.
>
> Both the driver and binding look overly complicated to me when it looks
> like you just have 2 versions of enable/disable functions which modify
> a single register. The complexity may be justified if this was a common
> binding and driver, but it is not.
>
> You already have a phandle to the system controller. Can't you add cells
> to it to handle any differences between instances? That and SoC specific
> compatible strings should be enough to handle differences.
Yes, adding cells will also work well, I'll try it, thanks a lot
>
> Rob
^ permalink raw reply
* [PATCH v2 2/2] PCI: mediatek: Fixup class type for MT7622
From: Yong Wu @ 2017-12-21 6:41 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1513822277-18329-3-git-send-email-honghui.zhang@mediatek.com>
On Thu, 2017-12-21 at 10:11 +0800, honghui.zhang at mediatek.com wrote:
> From: Honghui Zhang <honghui.zhang@mediatek.com>
>
> The host bridge of MT7622 has hardware code the class code to an
> arbitrary, meaningless value, fix that.
>
> Signed-off-by: Honghui Zhang <honghui.zhang@mediatek.com>
> ---
> drivers/pci/host/pcie-mediatek.c | 12 ++++++++++++
> 1 file changed, 12 insertions(+)
>
> diff --git a/drivers/pci/host/pcie-mediatek.c b/drivers/pci/host/pcie-mediatek.c
> index 3248771..ae8d367 100644
> --- a/drivers/pci/host/pcie-mediatek.c
> +++ b/drivers/pci/host/pcie-mediatek.c
> @@ -1174,3 +1174,15 @@ static struct platform_driver mtk_pcie_driver = {
> },
> };
> builtin_platform_driver(mtk_pcie_driver);
> +
> +/* The host bridge of MT7622 advertises the wrong device class. */
> +static void mtk_fixup_class(struct pci_dev *dev)
> +{
> + dev->class = PCI_CLASS_BRIDGE_PCI << 8;
> +}
> +
> +/*
> + * The HW default value of vendor id and device id for mt7622 are 0x0e8d,
> + * 0x3258, which are arbitrary, meaningless values.
> + */
What's the right vendor id and device id? is it possible to fix them
too?
> +DECLARE_PCI_FIXUP_EARLY(0x0e8d, 0x3258, mtk_fixup_class);
^ permalink raw reply
* [PATCH 00/13] replace print_symbol() with printk()-s
From: Sergey Senozhatsky @ 2017-12-21 5:54 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1513048252.3036.23.camel@perches.com>
On (12/11/17 19:10), Joe Perches wrote:
[..]
> As far as I'm concerned, as soon as there is
> no longer a single user in the kernel tree,
> better to delete it instead.
sounds good to me. can drop it, once the series upstreamed.
8< ---
From: Sergey Senozhatsky <sergey.senozhatsky@gmail.com>
Subject: [PATCH] kallsyms: remove print_symbol() function
No more print_symbol()/__print_symbol() users left, remove these
symbols.
Signed-off-by: Sergey Senozhatsky <sergey.senozhatsky@gmail.com>
Suggested-by: Joe Perches <joe@perches.com>
---
Documentation/filesystems/sysfs.txt | 4 ++--
Documentation/translations/zh_CN/filesystems/sysfs.txt | 4 ++--
include/linux/kallsyms.h | 18 ------------------
kernel/kallsyms.c | 11 -----------
4 files changed, 4 insertions(+), 33 deletions(-)
diff --git a/Documentation/filesystems/sysfs.txt b/Documentation/filesystems/sysfs.txt
index 9a3658cc399e..a1426cabcef1 100644
--- a/Documentation/filesystems/sysfs.txt
+++ b/Documentation/filesystems/sysfs.txt
@@ -154,8 +154,8 @@ static ssize_t dev_attr_show(struct kobject *kobj, struct attribute *attr,
if (dev_attr->show)
ret = dev_attr->show(dev, dev_attr, buf);
if (ret >= (ssize_t)PAGE_SIZE) {
- print_symbol("dev_attr_show: %s returned bad count\n",
- (unsigned long)dev_attr->show);
+ printk("dev_attr_show: %pS returned bad count\n",
+ dev_attr->show);
}
return ret;
}
diff --git a/Documentation/translations/zh_CN/filesystems/sysfs.txt b/Documentation/translations/zh_CN/filesystems/sysfs.txt
index 7d3b05edb8ce..452271dda141 100644
--- a/Documentation/translations/zh_CN/filesystems/sysfs.txt
+++ b/Documentation/translations/zh_CN/filesystems/sysfs.txt
@@ -167,8 +167,8 @@ static ssize_t dev_attr_show(struct kobject *kobj, struct attribute *attr,
if (dev_attr->show)
ret = dev_attr->show(dev, dev_attr, buf);
if (ret >= (ssize_t)PAGE_SIZE) {
- print_symbol("dev_attr_show: %s returned bad count\n",
- (unsigned long)dev_attr->show);
+ printk("dev_attr_show: %pS returned bad count\n",
+ dev_attr->show);
}
return ret;
}
diff --git a/include/linux/kallsyms.h b/include/linux/kallsyms.h
index 7288f9c395b6..d79d1e7486bd 100644
--- a/include/linux/kallsyms.h
+++ b/include/linux/kallsyms.h
@@ -94,9 +94,6 @@ extern int sprint_symbol(char *buffer, unsigned long address);
extern int sprint_symbol_no_offset(char *buffer, unsigned long address);
extern int sprint_backtrace(char *buffer, unsigned long address);
-/* Look up a kernel symbol and print it to the kernel messages. */
-extern void __print_symbol(const char *fmt, unsigned long address);
-
int lookup_symbol_name(unsigned long addr, char *symname);
int lookup_symbol_attrs(unsigned long addr, unsigned long *size, unsigned long *offset, char *modname, char *name);
@@ -166,23 +163,8 @@ static inline int kallsyms_show_value(void)
return false;
}
-/* Stupid that this does nothing, but I didn't create this mess. */
-#define __print_symbol(fmt, addr)
#endif /*CONFIG_KALLSYMS*/
-/* This macro allows us to keep printk typechecking */
-static __printf(1, 2)
-void __check_printsym_format(const char *fmt, ...)
-{
-}
-
-static inline void print_symbol(const char *fmt, unsigned long addr)
-{
- __check_printsym_format(fmt, "");
- __print_symbol(fmt, (unsigned long)
- __builtin_extract_return_addr((void *)addr));
-}
-
static inline void print_ip_sym(unsigned long ip)
{
printk("[<%p>] %pS\n", (void *) ip, (void *) ip);
diff --git a/kernel/kallsyms.c b/kernel/kallsyms.c
index 24f456689f9c..a23e21ada81b 100644
--- a/kernel/kallsyms.c
+++ b/kernel/kallsyms.c
@@ -429,17 +429,6 @@ int sprint_backtrace(char *buffer, unsigned long address)
return __sprint_symbol(buffer, address, -1, 1);
}
-/* Look up a kernel symbol and print it to the kernel messages. */
-void __print_symbol(const char *fmt, unsigned long address)
-{
- char buffer[KSYM_SYMBOL_LEN];
-
- sprint_symbol(buffer, address);
-
- printk(fmt, buffer);
-}
-EXPORT_SYMBOL(__print_symbol);
-
/* To avoid using get_symbol_offset for every symbol, we carry prefix along. */
struct kallsym_iter {
loff_t pos;
--
2.15.1
^ permalink raw reply related
* [PATCH 2/2][v2] ARM: dts: ls1021aqds: Add nand node for ifc controller
From: Prabhakar Kushwaha @ 2017-12-21 5:14 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1512013344-4042-3-git-send-email-prabhakar.kushwaha@nxp.com>
Hi Shawn,
> -----Original Message-----
> From: Prabhakar Kushwaha [mailto:prabhakar.kushwaha at nxp.com]
> Sent: Thursday, November 30, 2017 9:12 AM
> To: devicetree at vger.kernel.org; robh at kernel.org; mark.rutland at arm.com;
> shawnguo at kernel.org
> Cc: linux-arm-kernel at lists.infradead.org; Prabhakar Kushwaha
> <prabhakar.kushwaha@nxp.com>; Jagdish Gediya <jagdish.gediya@nxp.com>
> Subject: [PATCH 2/2][v2] ARM: dts: ls1021aqds: Add nand node for ifc controller
>
> LS1021AQDS support NAND flash on IFC chip-select 2.
>
> So add NAND node in device tree for IFC controller.
>
> Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com>
> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
> ---
> Changes for v2: updated subject
>
> arch/arm/boot/dts/ls1021a-qds.dts | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/arch/arm/boot/dts/ls1021a-qds.dts b/arch/arm/boot/dts/ls1021a-
> qds.dts
> index 9408753..2b37d04 100644
> --- a/arch/arm/boot/dts/ls1021a-qds.dts
> +++ b/arch/arm/boot/dts/ls1021a-qds.dts
> @@ -239,6 +239,11 @@
> device-width = <1>;
> };
>
> + nand at 2,0 {
> + compatible = "fsl,ifc-nand";
> + reg = <0x2 0x0 0x10000>;
> + };
> +
> fpga: board-control at 3,0 {
> #address-cells = <1>;
> #size-cells = <1>;
> --
There are no review comments on this patch.
Can you please accept this patch
--pk
^ permalink raw reply
* [PATCH 1/2][v2] ARM: dts: Add big-endian for IFC on LS1021A
From: Prabhakar Kushwaha @ 2017-12-21 5:14 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1512013344-4042-2-git-send-email-prabhakar.kushwaha@nxp.com>
Hi Shawn,
> -----Original Message-----
> From: Prabhakar Kushwaha [mailto:prabhakar.kushwaha at nxp.com]
> Sent: Thursday, November 30, 2017 9:12 AM
> To: devicetree at vger.kernel.org; robh at kernel.org; mark.rutland at arm.com;
> shawnguo at kernel.org
> Cc: linux-arm-kernel at lists.infradead.org; Jagdish Gediya
> <jagdish.gediya@nxp.com>; Alison Wang <alison.wang@nxp.com>; Prabhakar
> Kushwaha <prabhakar.kushwaha@nxp.com>
> Subject: [PATCH 1/2][v2] ARM: dts: Add big-endian for IFC on LS1021A
>
> From: Jagdish Gediya <jagdish.gediya@nxp.com>
>
> For the patch to update struct map_info's swap field based on device
> characteristics defined in device tree, big-endian parameter is added
> for LS1021A.
>
> Signed-off-by: Alison Wang <alison.wang@nxp.com>
> Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com>
> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
> ---
> Changes for v2: updated subject
>
> arch/arm/boot/dts/ls1021a.dtsi | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
> index 9319e1f..babb086 100644
> --- a/arch/arm/boot/dts/ls1021a.dtsi
> +++ b/arch/arm/boot/dts/ls1021a.dtsi
> @@ -145,6 +145,7 @@
> ifc: ifc at 1530000 {
> compatible = "fsl,ifc", "simple-bus";
> reg = <0x0 0x1530000 0x0 0x10000>;
> + big-endian;
> interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
> };
>
> --
> 1.9.1
There are no review comments on this patch.
Can you please accept this patch
--pk
^ permalink raw reply
* [PATCH v2] ARM: NOMMU: Setup VBAR/Hivecs for secondaries cores
From: afzal mohammed @ 2017-12-21 4:23 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1513694293-5441-1-git-send-email-vladimir.murzin@arm.com>
Hi,
On Tue, Dec 19, 2017 at 02:38:13PM +0000, Vladimir Murzin wrote:
> With switch to dynamic exception base address setting, VBAR/Hivecs
> set only for boot CPU, but secondaries stay unaware of that. That
> might lead to weird effects when trying up to bring up secondaries.
>
> Fixes: ad475117d201 ("ARM: 8649/2: nommu: remove Hivecs configuration is asm")
> Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
> +#ifndef CONFIG_MMU
> + setup_vectors_base();
> +#endif
i would have preferred instead,
if (!IS_ENABLED(CONFIG_MMU))
setup_vectors_base();
either way,
Acked-by: afzal mohammed <afzal.mohd.ma@gmail.com>
afzal
^ permalink raw reply
* [PATCH] ARM: NOMMU: Setup VBAR/Hivecs for secondaries cores
From: afzal mohammed @ 2017-12-21 4:05 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <38fb32ef-9e2f-01c0-c89f-7d05fe8bcf60@arm.com>
Hi Vladimir,
On Wed, Dec 20, 2017 at 12:22:38PM +0000, Vladimir Murzin wrote:
> > To add, i am not against your patch, just seeing if we can avoid
> > having this change, lesser code ... lesser bugs.
>
> Look, I hit that issue and without this change the issue does not
> magically disappear for me - the only way to avoid this change is
> to propose alternative patch.
> I don't want to jump into these "it should not happen" or "nobody"
> cares" discussions just because it is not true - it happened to
> me and I do care. However, I do open to discuss technical aspects.
Okay sir, my reading of your other mail was that you caught this issue
by code inspection and not by hitting the issue in practice, seems
there was a communication gap. Now i am deducing from your mails you
actually have hit some issue because of my change, then your fix is
absolutely required, no question about it.
i was trying to find out the specific scenario where the issue would
be be hit because of my change. But since you are able to fix the
issue in your specific scenario w/ with this fix, no more questions
from my side. Some of my comments are made jokingly to keep the
spirits high, but at times it is being misread it seems.
afzal
^ permalink raw reply
* [PATCH] ARM: NOMMU: Setup VBAR/Hivecs for secondaries cores
From: afzal mohammed @ 2017-12-21 3:44 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <db12818a-509f-2b28-7df0-dd923d956057@arm.com>
Hi,
On Wed, Dec 20, 2017 at 12:22:16PM +0000, Vladimir Murzin wrote:
> >> Additionally, patch is not about Hivec only, but VBAR as well and TBH I
> >> don't follow what is your proposal...
> >
> > i was referring to the fact that vector remapping can't be done in
> > Cortex-R, as security extension is a requisite for this feature, which
> > Cortex-R don't have on ARMv7.
>
> For instance, just think of ARMv7A with 1:1 MMU running in SMP...
Hmm, 3 things,
1. MMU on would not take the path being patched here
2. w/ MMU on, currently it is always Hivecs
3. w/ MMU on & 1:1 mapping & due to pt. 2 above, if there is no memory
@0xFFFF0000, suspect things might go wrong.
afzal
^ permalink raw reply
* [PATCH v2 2/3] dt-bindings: media: Add Allwinner V3s Camera Sensor Interface (CSI)
From: Yong @ 2017-12-21 2:49 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171219115327.ofs5xwwimpn7x72n@valkosipuli.retiisi.org.uk>
Hi,
On Tue, 19 Dec 2017 13:53:28 +0200
Sakari Ailus <sakari.ailus@iki.fi> wrote:
> Hi Yong,
>
> On Thu, Jul 27, 2017 at 01:01:36PM +0800, Yong Deng wrote:
> > Add binding documentation for Allwinner V3s CSI.
> >
> > Signed-off-by: Yong Deng <yong.deng@magewell.com>
>
> DT bindings should precede the driver.
OK.
>
> > ---
> > .../devicetree/bindings/media/sun6i-csi.txt | 49 ++++++++++++++++++++++
> > 1 file changed, 49 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/media/sun6i-csi.txt
> >
> > diff --git a/Documentation/devicetree/bindings/media/sun6i-csi.txt b/Documentation/devicetree/bindings/media/sun6i-csi.txt
> > new file mode 100644
> > index 0000000..f8d83f6
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/media/sun6i-csi.txt
> > @@ -0,0 +1,49 @@
> > +Allwinner V3s Camera Sensor Interface
> > +------------------------------
> > +
> > +Required properties:
> > + - compatible: value must be "allwinner,sun8i-v3s-csi"
>
> What are sun6i and sun8i? Is this device first present in sun6i SoCs,
> whereas you have only defined bindings for sun8i?
Yes, some sun6i SoCs has the almost same CSI module.
There is only V3s on my hand. So, I only tested it on V3s. But
some people work on the others.
>
> > + - reg: base address and size of the memory-mapped region.
> > + - interrupts: interrupt associated to this IP
> > + - clocks: phandles to the clocks feeding the CSI
> > + * ahb: the CSI interface clock
> > + * mod: the CSI module clock
> > + * ram: the CSI DRAM clock
> > + - clock-names: the clock names mentioned above
> > + - resets: phandles to the reset line driving the CSI
> > +
> > +- ports: A ports node with endpoint definitions as defined in
> > + Documentation/devicetree/bindings/media/video-interfaces.txt.
>
> Please document mandatory and optional endpoint properties relevant for the
> hardware.
I have added below commit in my v3:
Currently, the driver only support the parallel interface. So, a single port
node with one endpoint and parallel bus is supported.
>
> > +
> > +Example:
> > +
> > + csi1: csi at 01cb4000 {
> > + compatible = "allwinner,sun8i-v3s-csi";
> > + reg = <0x01cb4000 0x1000>;
> > + interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&ccu CLK_BUS_CSI>,
> > + <&ccu CLK_CSI1_SCLK>,
> > + <&ccu CLK_DRAM_CSI>;
> > + clock-names = "ahb", "mod", "ram";
> > + resets = <&ccu RST_BUS_CSI>;
> > +
> > + port {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > +
> > + /* Parallel bus endpoint */
> > + csi1_ep: endpoint {
> > + remote-endpoint = <&adv7611_ep>;
> > + bus-width = <16>;
> > + data-shift = <0>;
> > +
> > + /* If hsync-active/vsync-active are missing,
> > + embedded BT.656 sync is used */
> > + hsync-active = <0>; /* Active low */
> > + vsync-active = <0>; /* Active low */
> > + data-active = <1>; /* Active high */
> > + pclk-sample = <1>; /* Rising */
> > + };
> > + };
> > + };
> > +
>
> --
> Kind regards,
>
> Sakari Ailus
> e-mail: sakari.ailus at iki.fi
Thanks,
Yong
^ permalink raw reply
* [PATCH v2 3/3] media: MAINTAINERS: add entries for Allwinner V3s CSI
From: Yong @ 2017-12-21 2:40 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20171219114802.gi7db7xhm3eh4udt@valkosipuli.retiisi.org.uk>
On Tue, 19 Dec 2017 13:48:03 +0200
Sakari Ailus <sakari.ailus@iki.fi> wrote:
> On Thu, Jul 27, 2017 at 01:01:37PM +0800, Yong Deng wrote:
> > Signed-off-by: Yong Deng <yong.deng@magewell.com>
> > ---
> > MAINTAINERS | 8 ++++++++
> > 1 file changed, 8 insertions(+)
> >
> > diff --git a/MAINTAINERS b/MAINTAINERS
> > index 9826a91..b91fa27 100644
> > --- a/MAINTAINERS
> > +++ b/MAINTAINERS
> > @@ -3686,6 +3686,14 @@ M: Jaya Kumar <jayakumar.alsa@gmail.com>
> > S: Maintained
> > F: sound/pci/cs5535audio/
> >
> > +CSI DRIVERS FOR ALLWINNER V3s
> > +M: Yong Deng <yong.deng@magewell.com>
> > +L: linux-media at vger.kernel.org
> > +T: git git://linuxtv.org/media_tree.git
> > +S: Maintained
> > +F: drivers/media/platform/sun6i-csi/
> > +F: Documentation/devicetree/bindings/media/sun6i-csi.txt
> > +
> > CW1200 WLAN driver
> > M: Solomon Peachy <pizza@shaftnet.org>
> > S: Maintained
>
> Please squash to the driver patch. Thanks.
OK.
>
> --
> Sakari Ailus
> e-mail: sakari.ailus at iki.fi
Thanks,
Yong
^ permalink raw reply
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