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* [GIT PULL] arm64: dts: uniphier: UniPhier DT updates (64bit) for v4.16
From: Olof Johansson @ 2018-01-05  7:29 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <CAK7LNAR+RgxHGa8ZgVUsUbJAeaQqvm-mh=Xrss-JHsDNM79t_A@mail.gmail.com>

On Fri, Dec 29, 2017 at 10:35:38PM +0900, Masahiro Yamada wrote:
> Hi Arnd, Olof,
> 
> Here are UniPhier DT (64bit) updates for the v4.16 merge window.
> Please pull!
> 
> 
> The following changes since commit 50c4c4e268a2d7a3e58ebb698ac74da0de40ae36:
> 
>   Linux 4.15-rc3 (2017-12-10 17:56:26 -0800)
> 
> are available in the git repository at:
> 
>   git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier.git
> tags/uniphier-dt64-v4.16
> 
> for you to fetch changes up to dbdae8474e08fc1194102bef95dc96db435c15da:
> 
>   arm64: dts: uniphier: enable more serial ports for PXs3 ref board
> (2017-12-29 22:03:26 +0900)
> 
> ----------------------------------------------------------------
> UniPhier ARM64 SoC DT updates for v4.16
> 
> - clean up gpios properties by macro
> - add GPIO hog for PXs3 reference node
> - add has-transaction-translator property to generic-ehci nodes
> - enable more serial ports for PXs3 reference node

Merged, thanks!


-Olof

^ permalink raw reply

* [GIT PULL] ARM: at91: DT for 4.16
From: Olof Johansson @ 2018-01-05  7:30 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <20171231151127.GA19853@piout.net>

On Sun, Dec 31, 2017 at 04:11:27PM +0100, Alexandre Belloni wrote:
> Arnd, Olof,
> 
> This is the at91 DT pull request. The bulk of it is the switch to the
> new TCB bindings that were acked a long time ago. These changes are
> compatible with the current driver and taking them now will allow for a
> smooth transition.
> 
> The following changes since commit 4fbd8d194f06c8a3fd2af1ce560ddb31f7ec8323:
> 
>   Linux 4.15-rc1 (2017-11-26 16:01:47 -0800)
> 
> are available in the Git repository at:
> 
>   git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux.git tags/at91-ab-4.16-dt
> 
> for you to fetch changes up to 34a7fc3147bcc14127d941f228ce3b1737e66381:
> 
>   ARM: dts: at91: sama5d2_ptc_ek: use TCB0 as timers (2017-12-31 15:50:20 +0100)

Merged, thanks!


-Olof

^ permalink raw reply

* [GIT PULL] ARM: at91: drivers for 4.16
From: Olof Johansson @ 2018-01-05  7:32 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <20171231153442.GA22004@piout.net>

On Sun, Dec 31, 2017 at 04:34:42PM +0100, Alexandre Belloni wrote:
> Arnd, Olof,
> 
> A single harmless change for this pull request. I hope you'll enjoy this
> New Year's Eve.
> 
> The following changes since commit 4fbd8d194f06c8a3fd2af1ce560ddb31f7ec8323:
> 
>   Linux 4.15-rc1 (2017-11-26 16:01:47 -0800)
> 
> are available in the Git repository at:
> 
>   git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux.git tags/at91-ab-4.16-drivers
> 
> for you to fetch changes up to 1203839290f151b84f5e54165d6d039e9514b236:
> 
>   pcmcia: at91_cf: Use PTR_ERR_OR_ZERO() (2017-11-29 21:58:58 +0100)
> 
> ----------------------------------------------------------------
> drivers for 4.16
> 
>  - use PTR_ERR_OR_ZERO were relevant in at91_cf

Merged, thanks.


-Olof

^ permalink raw reply

* [PATCH] ARM: dts: Delete bogus reference to the charlcd
From: Olof Johansson @ 2018-01-05  7:34 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <20180102075717.7374-1-linus.walleij@linaro.org>

On Tue, Jan 02, 2018 at 08:57:17AM +0100, Linus Walleij wrote:
> The EB MP board probably has a character LCD but the board manual does
> not really state which IRQ it has assigned to this device. The invalid
> assignment was a mistake by me during submission of the DTSI where I was
> looking for the reference, didn't find it and didn't fill it in.
> 
> Delete this for now: it can probably be fixed but that requires access
> to the actual board for some trial-and-error experiments.
> 
> Reported-by: Arnd Bergmann <arnd@arndb.de>
> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
> ---
> ARM SoC folks: please apply this directly for next to fix the DTS
> compiler noise it is generating.

Applied, thanks.


-Olof

^ permalink raw reply

* [PATCH v3] arm64: v8.4: Support for new floating point multiplication instructions
From: Greg KH @ 2018-01-05  7:57 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <cae4f913-6d75-e92c-1add-247b07efaf9d@huawei.com>

On Fri, Jan 05, 2018 at 09:22:54AM +0800, gengdongjiu wrote:
> Hi will/catalin
> 
> On 2017/12/13 18:09, Suzuki K Poulose wrote:
> > On 13/12/17 10:13, Dongjiu Geng wrote:
> >> ARM v8.4 extensions add new neon instructions for performing a
> >> multiplication of each FP16 element of one vector with the corresponding
> >> FP16 element of a second vector, and to add or subtract this without an
> >> intermediate rounding to the corresponding FP32 element in a third vector.
> >>
> >> This patch detects this feature and let the userspace know about it via a
> >> HWCAP bit and MRS emulation.
> >>
> >> Cc: Dave Martin <Dave.Martin@arm.com>
> >> Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
> >> Signed-off-by: Dongjiu Geng <gengdongjiu@huawei.com>
> >> Reviewed-by: Dave Martin <Dave.Martin@arm.com>
> > 
> > Looks good to me.
> > 
> > Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
> 
>  sorry to disturb you. Reminder, hope this patch can be applied to Linux 4.15-rc7.

New features should not be going into 4.15-rc, that should be a 4.16-rc1
thing, right?

thanks,

greg k-h

^ permalink raw reply

* [PATCH v4 2/3] mailbox: Add support for Hi3660 mailbox
From: Leo Yan @ 2018-01-05  8:08 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <CABb+yY2z4jDWJdDY2WRw5Mhv+ArTuvLgqJ9RyVoUJj3O1d=o6A@mail.gmail.com>

Hi Jassi,

On Fri, Jan 05, 2018 at 09:58:57AM +0530, Jassi Brar wrote:
> On Tue, Dec 19, 2017 at 4:45 PM, Kaihua Zhong <zhongkaihua@huawei.com> wrote:
> 
> .....
> > diff --git a/drivers/mailbox/hi3660-mailbox.c b/drivers/mailbox/hi3660-mailbox.c
> > new file mode 100644
> > index 0000000..3ceca40
> > --- /dev/null
> > +++ b/drivers/mailbox/hi3660-mailbox.c
> > @@ -0,0 +1,319 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +// Copyright (c) 2017 Hisilicon Limited.
> > +// Copyright (c) 2017 Linaro Limited.
> 
> A blank here please.

Will fix.

> > +#include <linux/bitops.h>
> > +#include <linux/delay.h>
> > +#include <linux/device.h>
> > +#include <linux/err.h>
> > +#include <linux/interrupt.h>
> > +#include <linux/io.h>
> > +#include <linux/iopoll.h>

Will add blank.

> .....
> > +
> > +static inline struct hi3660_mbox *to_hi3660_mbox(struct mbox_controller *mbox)
> >
> inline in .c is out of fasion these days

Will remove 'inline'.

> > +{
> > +       return container_of(mbox, struct hi3660_mbox, controller);
> > +}
> > +
> 
> ....
> > +
> > +static int hi3660_mbox_startup(struct mbox_chan *chan)
> > +{
> > +       int ret;
> > +
> > +       ret = hi3660_mbox_check_state(chan);
> > +       if (ret)
> > +               return ret;
> > +
> > +       ret = hi3660_mbox_unlock(chan);
> > +       if (ret)
> > +               return ret;
> > +
> > +       ret = hi3660_mbox_acquire_channel(chan);
> > +       if (ret)
> > +               return ret;
> > +
> > +       return 0;
> > +}
> Do you not need to do "release channel" for shutdown() ?

>From my testing, the driver don't need "release channel" operations.

> .....
> > +
> > +static int hi3660_mbox_send_data(struct mbox_chan *chan, void *msg)
> > +{
> > +       return hi3660_mbox_send(chan, msg);
> >
> Please directly have hi3660_mbox_send as .send_data

Will fix.

Thanks,
Leo Yan

^ permalink raw reply

* [GIT PULL] ARM: mvebu: dt64 for v4.16 (#2)
From: Gregory CLEMENT @ 2018-01-05  8:12 UTC (permalink / raw)
  To: linux-arm-kernel

Hi,

Here is the second pull request for dt64 for mvebu for v4.16.

Gregory

The following changes since commit 4cada03801992d09ccceaf5f462e9dadb75a9613:

  ARM64: dts: marvell: Add thermal support for A7K/A8K (2017-12-18 17:13:17 +0100)

are available in the Git repository at:

  git://git.infradead.org/linux-mvebu.git tags/mvebu-dt64-4.16-2

for you to fetch changes up to 38027b7d7c27c185a3e4e70f8d83509c3eda0daf:

  arm64: dts: marvell: add Ethernet aliases (2018-01-03 17:07:50 +0100)

----------------------------------------------------------------
mvebu dt64 for 4.16 (part 2)

The main change here are the series of commits doing the Armada 7K/8K
CP110 DT de-duplication, they include the de-duplication itself and
small fixes in the device tree files.

Besides them there are 2 other patches:
 - One adding the crypto support for Armada 37xx SoCs
 - An other adding Ethernet aliases on A7K/A8K base boards

----------------------------------------------------------------
Antoine Tenart (1):
      arm64: dts: marvell: armada-37xx: add a crypto node

Thomas Petazzoni (8):
      arm64: dts: marvell: fix watchdog unit address in Armada AP806
      arm64: dts: marvell: use lower case for unit address and reg property
      arm64: dts: marvell: fix typos in comment describing the NAND controller
      arm64: dts: marvell: fix compatible string list for Armada CP110 slave NAND
      arm64: dts: marvell: use mvebu-icu.h where possible
      arm64: dts: marvell: use aliases for SPI busses on Armada 7K/8K
      arm64: dts: marvell: de-duplicate CP110 description
      arm64: dts: marvell: replace cpm by cp0, cps by cp1

Yan Markman (1):
      arm64: dts: marvell: add Ethernet aliases

 arch/arm64/boot/dts/marvell/armada-37xx.dtsi       |  14 +
 arch/arm64/boot/dts/marvell/armada-7040-db.dts     |  52 +--
 arch/arm64/boot/dts/marvell/armada-70x0.dtsi       |  37 +-
 arch/arm64/boot/dts/marvell/armada-8020.dtsi       |   2 +-
 arch/arm64/boot/dts/marvell/armada-8040-db.dts     |  87 ++--
 arch/arm64/boot/dts/marvell/armada-8040-mcbin.dts  |  82 ++--
 arch/arm64/boot/dts/marvell/armada-8040.dtsi       |   2 +-
 arch/arm64/boot/dts/marvell/armada-80x0.dtsi       |  80 +++-
 arch/arm64/boot/dts/marvell/armada-ap806.dtsi      |   8 +-
 arch/arm64/boot/dts/marvell/armada-common.dtsi     |  10 +
 .../boot/dts/marvell/armada-cp110-master.dtsi      | 449 ---------------------
 .../arm64/boot/dts/marvell/armada-cp110-slave.dtsi | 448 --------------------
 arch/arm64/boot/dts/marvell/armada-cp110.dtsi      | 422 +++++++++++++++++++
 13 files changed, 668 insertions(+), 1025 deletions(-)
 create mode 100644 arch/arm64/boot/dts/marvell/armada-common.dtsi
 delete mode 100644 arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi
 delete mode 100644 arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi
 create mode 100644 arch/arm64/boot/dts/marvell/armada-cp110.dtsi

^ permalink raw reply

* [PATCH 05/12] arm64: dts: mt7622: add PMIC MT6380 related nodes
From: Philippe Ombredanne @ 2018-01-05  8:21 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <1515123759.30687.71.camel@mtkswgap22>

Sean,

On Fri, Jan 5, 2018 at 4:42 AM, Sean Wang <sean.wang@mediatek.com> wrote:
> On Thu, 2018-01-04 at 11:27 +0100, Philippe Ombredanne wrote:
>> Sean,
>>
>> On Thu, Jan 4, 2018 at 10:40 AM,  <sean.wang@mediatek.com> wrote:
>> > From: Sean Wang <sean.wang@mediatek.com>
>> >
>> > Enable pwrap and MT6380 on mt7622-rfb1 board. Also add all mt6380
>> > regulator nodes in an alone file to allow similar boards using MT6380
>> > able to resue the configuration.
>> >
>> > Signed-off-by: Sean Wang <sean.wang@mediatek.com>
>> > Cc: Mark Brown <broonie@kernel.org>
>> > Cc: Matthias Brugger <matthias.bgg@gmail.com>
>> > ---
>> >  arch/arm64/boot/dts/mediatek/mt6380.dtsi     | 91 ++++++++++++++++++++++++++++
>> >  arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts |  8 +++
>> >  arch/arm64/boot/dts/mediatek/mt7622.dtsi     | 12 ++++
>> >  3 files changed, 111 insertions(+)
>> >  create mode 100644 arch/arm64/boot/dts/mediatek/mt6380.dtsi
>> >
>> > diff --git a/arch/arm64/boot/dts/mediatek/mt6380.dtsi b/arch/arm64/boot/dts/mediatek/mt6380.dtsi
>> > new file mode 100644
>> > index 0000000..7eb7dc2
>> > --- /dev/null
>> > +++ b/arch/arm64/boot/dts/mediatek/mt6380.dtsi
>> > @@ -0,0 +1,91 @@
>> > +/*
>> > + * Copyright (c) 2018 MediaTek Inc.
>> > + * Author: Chenglin Xu <chenglin.xu@mediatek.com>
>> > + *        Sean Wang <sean.wang@mediatek.com>
>> > + *
>> > + * This program is free software; you can redistribute it and/or modify
>> > + * it under the terms of the GNU General Public License version 2 as
>> > + * published by the Free Software Foundation.
>> > + *
>> > + * This program is distributed in the hope that it will be useful,
>> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
>> > + * GNU General Public License for more details.
>> > + */
>>
>> Would you mind using SPDX tags instead of this fine but long legalese?
>> This is documented in Thomas patches [1].
>
>> Also if you could spread the word in your team, this would earn you
>> good karma points.
>> Thank you!
>>
>> [1] https://lkml.org/lkml/2017/12/28/323
>
>
> Hi, Philippe
>
> thanks for your suggestion
>
> Certainly, this can be replaced with
>
> SPDX-License-Identifier: GPL-2.0
>
> most drivers from MediaTek use the similar disclaimer, it should be fine
> to use SPDX tags instead.
>
>         Sean
>

Thank you! that's great.

-- 
Cordially
Philippe Ombredanne

^ permalink raw reply

* [PATCH v3] arm64: v8.4: Support for new floating point multiplication instructions
From: gengdongjiu @ 2018-01-05  8:22 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <20180105075732.GA8801@kroah.com>

On 2018/1/5 15:57, Greg KH wrote:
> On Fri, Jan 05, 2018 at 09:22:54AM +0800, gengdongjiu wrote:
>> Hi will/catalin
>>
>> On 2017/12/13 18:09, Suzuki K Poulose wrote:
>>> On 13/12/17 10:13, Dongjiu Geng wrote:
>>>> ARM v8.4 extensions add new neon instructions for performing a
>>>> multiplication of each FP16 element of one vector with the corresponding
>>>> FP16 element of a second vector, and to add or subtract this without an
>>>> intermediate rounding to the corresponding FP32 element in a third vector.
>>>>
>>>> This patch detects this feature and let the userspace know about it via a
>>>> HWCAP bit and MRS emulation.
>>>>
>>>> Cc: Dave Martin <Dave.Martin@arm.com>
>>>> Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
>>>> Signed-off-by: Dongjiu Geng <gengdongjiu@huawei.com>
>>>> Reviewed-by: Dave Martin <Dave.Martin@arm.com>
>>>
>>> Looks good to me.
>>>
>>> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
>>
>>  sorry to disturb you. Reminder, hope this patch can be applied to Linux 4.15-rc7.
> 
> New features should not be going into 4.15-rc, that should be a 4.16-rc1
> thing, right?

It is also great if it can be applied to 4.16-rc1. Thanks a lot!


> 
> thanks,
> 
> greg k-h
> 
> .
> 

^ permalink raw reply

* v4.14.9 on ARMv5: OK with gcc 4.8/5.4, NOK with gcc 7.2
From: Thomas Petazzoni @ 2018-01-05  8:29 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <20180104224741.GA17719@n2100.armlinux.org.uk>

Hello,

On Thu, 4 Jan 2018 22:47:41 +0000, Russell King - ARM Linux wrote:

> > I am happy to report the gcc bug has been fixed in trunk.
> > I am as well dubious where they say this should also fix gcc6 where we
> > have no known issues with gcc6.
> > 
> > "
> > This should also fix
> > incorrect generation of ldrd/strd with unaligned accesses that could
> > previously have occurred on ARMv5e where all such operations must be
> > 64-bit aligned."
> > 
> > https://github.com/gcc-mirror/gcc/commit/f59996b56aaa1c1d62a16cbb4010775b624cbde0
> > 
> > In OpenEmbedded we backported the patch a while ago, see the
> > discussion about qemu booting where real hw doesn't:
> > http://lists.openembedded.org/pipermail/openembedded-core/2017-November/144045.html  
> 
> Thanks for reporting the update Andrea!

Thanks Russell and Andrea for the feedback. Good to know that the
problem was already known and even fixed. I'll wait for the gcc 7.x fix
to land in my distro toolchain, and will keep using an older toolchain
until then.

Thanks!

Thomas
-- 
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

^ permalink raw reply

* [PATCH] ARM: dts: kirkwood: fix pin-muxing of MPP7
From: Thomas Petazzoni @ 2018-01-05  8:36 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <20180104165312.14052-1-thomas.petazzoni@free-electrons.com>

Hello,

On Thu,  4 Jan 2018 17:53:12 +0100, Thomas Petazzoni wrote:
> MPP7 is currently muxed as "gpio", but this function doesn't exist for
> MPP7, only "gpo" is available. This causes the following error:
> 
> kirkwood-pinctrl f1010000.pin-controller: unsupported function gpio on pin mpp7
> pinctrl core: failed to register map default (6): invalid type given
> kirkwood-pinctrl f1010000.pin-controller: error claiming hogs: -22
> kirkwood-pinctrl f1010000.pin-controller: could not claim hogs: -22
> kirkwood-pinctrl f1010000.pin-controller: unable to register pinctrl driver
> kirkwood-pinctrl: probe of f1010000.pin-controller failed with error -22
> 
> So the pinctrl driver is not probed, all device drivers (including the
> UART driver) do a -EPROBE_DEFER, and therefore the system doesn't
> really boot (well, it boots, but with no UART, and no devices that
> require pin-muxing).
> 
> Back when the Device Tree file for this board was introduced, the
> definition was already wrong. The pinctrl driver also always described
> as "gpo" this function for MPP7. However, between Linux 4.10 and 4.11,
> a hog pin failing to be muxed was turned from a simple warning to a
> hard error that caused the entire pinctrl driver probe to bail
> out. This is probably the result of commit 6118714275f0a ("pinctrl:
> core: Fix pinctrl_register_and_init() with pinctrl_enable()").
> 
> This commit fixes the Device Tree to use the proper "gpo" function for
> MPP7, which fixes the boot of OpenBlocks A7, which was broken since
> Linux 4.11.
> 
> Fixes: f24b56cbcd9d ("ARM: kirkwood: add support for OpenBlocks A7 platform")
> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>

I just realized that my commit title isn't that great, as it doesn't
mention the board. Something like:

	ARM: dts: kirkwood: fix pin-muxing of MPP7 on OpenBlocks A7

would have been better.

Gr?gory: let me know if you want me to send a v2, or if you can fix up
this while applying.

Thanks!

Thomas
-- 
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

^ permalink raw reply

* [PATCH] ARM: dts: kirkwood: fix pin-muxing of MPP7
From: Gregory CLEMENT @ 2018-01-05  8:55 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <20180105093634.6736747c@windsurf.lan>

Hi Thomas,
 
 On ven., janv. 05 2018, Thomas Petazzoni <thomas.petazzoni@free-electrons.com> wrote:

> Hello,
>
> On Thu,  4 Jan 2018 17:53:12 +0100, Thomas Petazzoni wrote:
>> MPP7 is currently muxed as "gpio", but this function doesn't exist for
>> MPP7, only "gpo" is available. This causes the following error:
>> 
>> kirkwood-pinctrl f1010000.pin-controller: unsupported function gpio on pin mpp7
>> pinctrl core: failed to register map default (6): invalid type given
>> kirkwood-pinctrl f1010000.pin-controller: error claiming hogs: -22
>> kirkwood-pinctrl f1010000.pin-controller: could not claim hogs: -22
>> kirkwood-pinctrl f1010000.pin-controller: unable to register pinctrl driver
>> kirkwood-pinctrl: probe of f1010000.pin-controller failed with error -22
>> 
>> So the pinctrl driver is not probed, all device drivers (including the
>> UART driver) do a -EPROBE_DEFER, and therefore the system doesn't
>> really boot (well, it boots, but with no UART, and no devices that
>> require pin-muxing).
>> 
>> Back when the Device Tree file for this board was introduced, the
>> definition was already wrong. The pinctrl driver also always described
>> as "gpo" this function for MPP7. However, between Linux 4.10 and 4.11,
>> a hog pin failing to be muxed was turned from a simple warning to a
>> hard error that caused the entire pinctrl driver probe to bail
>> out. This is probably the result of commit 6118714275f0a ("pinctrl:
>> core: Fix pinctrl_register_and_init() with pinctrl_enable()").
>> 
>> This commit fixes the Device Tree to use the proper "gpo" function for
>> MPP7, which fixes the boot of OpenBlocks A7, which was broken since
>> Linux 4.11.
>> 
>> Fixes: f24b56cbcd9d ("ARM: kirkwood: add support for OpenBlocks A7 platform")
>> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
>
> I just realized that my commit title isn't that great, as it doesn't
> mention the board. Something like:
>
> 	ARM: dts: kirkwood: fix pin-muxing of MPP7 on OpenBlocks A7
>
> would have been better.
>
> Gr?gory: let me know if you want me to send a v2, or if you can fix up
> this while applying.
>

I applied it on mvebu/fixes with this new title, as well as the reviewed-by
flag form Andrew, ands I also added the "Cc: <stable@vger.kernel.org>"
line.

Thanks,

Gregory


> Thanks!
>
> Thomas
> -- 
> Thomas Petazzoni, CTO, Free Electrons
> Embedded Linux and Kernel engineering
> http://free-electrons.com
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

-- 
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com

^ permalink raw reply

* [kernel-hardening] [PATCH v2] arm: Always use REFCOUNT_FULL
From: Jinbum Park @ 2018-01-05  9:02 UTC (permalink / raw)
  To: linux-arm-kernel

refcount_t overflow detection is implemented as two way.

1. REFCOUNT_FULL

- It means the full refcount_t implementation
  which has validation but is slightly slower.
- (fd25d19f6b8d ("locking/refcount:
  Create unchecked atomic_t implementation"))

2. ARCH_HAS_REFCOUNT

- refcount_t overflow detection can be optimized
  via an arch-dependent way.
- It is based on atomic_t infrastructure
  with some instruction added for detection.
- It is faster than REFCOUNT_FULL,
  as fast as unprotected atomic_t infrastructure.
- (7a46ec0e2f48 ("locking/refcounts, x86/asm:
  Implement fast refcount overflow protection"))

ARCH_HAS_REFCOUNT has implemented for x86,
not implemented for others.

In the case of arm64,
Will Deacon said he didn't want the specialized
"fast but technically incomplete" refcounting as seen with x86's.

But rather to set REFCOUNT_FULL by default
because no one could point to real-world performance impacts with
REFCOUNT_FULL vs unprotected atomic_t infrastructure.

This is the reason arm64 ended up enabling REFCOUNT_FULL.
(4adcec1164de ("arm64: Always use REFCOUNT_FULL"))

As with the decision of arm64,
arm can set REFCOUNT_FULL by default.

Signed-off-by: Jinbum Park <jinb.park7@gmail.com>
---
v2: Write a better commit message
---
 arch/arm/Kconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 64713b6..e111a62 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -101,6 +101,7 @@ config ARM
 	select OLD_SIGACTION
 	select OLD_SIGSUSPEND3
 	select PERF_USE_VMALLOC
+	select REFCOUNT_FULL
 	select RTC_LIB
 	select SYS_SUPPORTS_APM_EMULATION
 	# Above selects are sorted alphabetically; please add new ones
-- 
1.9.1

^ permalink raw reply related

* [PATCH -next] clk: meson-axg: fix potential NULL dereference in axg_clkc_probe()
From: Jerome Brunet @ 2018-01-05  9:09 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <1515117059-176004-1-git-send-email-weiyongjun1@huawei.com>

On Fri, 2018-01-05 at 01:50 +0000, Wei Yongjun wrote:
> platform_get_resource() may return NULL, add proper
> check to avoid potential NULL dereferencing.
> 
> This is detected by Coccinelle semantic patch.
> 
> @@
> expression pdev, res, n, t, e, e1, e2;
> @@
> 
> res = platform_get_resource(pdev, t, n);
> + if (!res)
> +   return -EINVAL;
> ... when != res == NULL
> e = devm_ioremap(e1, res->start, e2);
> 
> Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com>
> ---

Looks good. Thank you.

Stephen, do you prefer to take this directly ?

^ permalink raw reply

* [PATCH v5 00/12] drm/sun4i: Add A83t LVDS support
From: Maxime Ripard @ 2018-01-05  9:39 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <cover.e5a47cc96ec5274dd932daa2bde47df073087da9.1513854122.git-series.maxime.ripard@free-electrons.com>

On Thu, Dec 21, 2017 at 12:02:26PM +0100, Maxime Ripard wrote:
> Hi,
> 
> Here is an attempt at supporting the LVDS output in our DRM driver. This
> has been tested on the A83T (with DE2), but since everything is basically
> in the TCON, it should also be usable on the older SoCs with minor
> modifications.
> 
> This was the occasion to refactor a bunch of things. The most notable ones
> would be the documentation, and split of the UI layers in the mixer code,
> and the switch to kfifo for our endpoint parsing code in the driver that
> fixes an issue introduced by the switch to BFS.
> 
> Let me know what you think,
> Maxime

I've applied all the patches.

Thanks!
Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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* [PATCH 1/4] arm: dts: ls1021a: Enable usb3-lpm-capable for usb3 node
From: Ran Wang @ 2018-01-05  9:40 UTC (permalink / raw)
  To: linux-arm-kernel

Enable USB3 HW LPM feature for ls1021a and active patch for
snps erratum A-010131. It will disable U1/U2 temperary when
initiate U3 request.

Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
---
 arch/arm/boot/dts/ls1021a.dtsi |    2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)

diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
index f81fad2..21a4488 100644
--- a/arch/arm/boot/dts/ls1021a.dtsi
+++ b/arch/arm/boot/dts/ls1021a.dtsi
@@ -709,6 +709,8 @@
 			dr_mode = "host";
 			snps,quirk-frame-length-adjustment = <0x20>;
 			snps,dis_rxdet_inp3_quirk;
+			usb3-lpm-capable;
+			snps,dis-u1u2-when-u3-quirk;
 		};
 
 		pcie at 3400000 {
-- 
1.7.1

^ permalink raw reply related

* [PATCH 2/4] arm64: dts: ls1043a: Enable usb3-lpm-capable for usb3 node
From: Ran Wang @ 2018-01-05  9:40 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <20180105094009.22599-1-ran.wang_1@nxp.com>

Enable USB3 HW LPM feature for ls1043a and active patch for
snps erratum A-010131. It will disable U1/U2 temperary when
initiate U3 request.

Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
---
 arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi |    6 ++++++
 1 files changed, 6 insertions(+), 0 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
index e4fed04..686c7db 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
@@ -698,6 +698,8 @@
 			dr_mode = "host";
 			snps,quirk-frame-length-adjustment = <0x20>;
 			snps,dis_rxdet_inp3_quirk;
+			usb3-lpm-capable;
+			snps,dis-u1u2-when-u3-quirk;
 		};
 
 		usb1: usb3 at 3000000 {
@@ -707,6 +709,8 @@
 			dr_mode = "host";
 			snps,quirk-frame-length-adjustment = <0x20>;
 			snps,dis_rxdet_inp3_quirk;
+			usb3-lpm-capable;
+			snps,dis-u1u2-when-u3-quirk;
 		};
 
 		usb2: usb3 at 3100000 {
@@ -716,6 +720,8 @@
 			dr_mode = "host";
 			snps,quirk-frame-length-adjustment = <0x20>;
 			snps,dis_rxdet_inp3_quirk;
+			usb3-lpm-capable;
+			snps,dis-u1u2-when-u3-quirk;
 		};
 
 		sata: sata at 3200000 {
-- 
1.7.1

^ permalink raw reply related

* [PATCH 3/4] arm64: dts: ls1046a: Enable usb3-lpm-capable for usb3 node
From: Ran Wang @ 2018-01-05  9:40 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <20180105094009.22599-1-ran.wang_1@nxp.com>

Enable USB3 HW LPM feature for ls1046a and active patch for
snps erratum A-010131. It will disable U1/U2 temperary when
initiate U3 request.

Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
---
 arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi |    6 ++++++
 1 files changed, 6 insertions(+), 0 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
index c115f17..07ca420 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
@@ -611,6 +611,8 @@
 			dr_mode = "host";
 			snps,quirk-frame-length-adjustment = <0x20>;
 			snps,dis_rxdet_inp3_quirk;
+			usb3-lpm-capable;
+			snps,dis-u1u2-when-u3-quirk;
 		};
 
 		usb1: usb at 3000000 {
@@ -620,6 +622,8 @@
 			dr_mode = "host";
 			snps,quirk-frame-length-adjustment = <0x20>;
 			snps,dis_rxdet_inp3_quirk;
+			usb3-lpm-capable;
+			snps,dis-u1u2-when-u3-quirk;
 		};
 
 		usb2: usb at 3100000 {
@@ -629,6 +633,8 @@
 			dr_mode = "host";
 			snps,quirk-frame-length-adjustment = <0x20>;
 			snps,dis_rxdet_inp3_quirk;
+			usb3-lpm-capable;
+			snps,dis-u1u2-when-u3-quirk;
 		};
 
 		sata: sata at 3200000 {
-- 
1.7.1

^ permalink raw reply related

* [PATCH 4/4] xHCI: Handle dwc3 erratum on USB3 HW LPM feature.
From: Ran Wang @ 2018-01-05  9:40 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <20180105094009.22599-1-ran.wang_1@nxp.com>

Synopsys STARS ticket: 90000969472(A-010131)

Description: This erratum is applicable for the USB 3.0 Super
Speed host mode operation. When the U2 timer expires while in
U1 mode, the USB 3.0 controller completes a U1->U2 entry operation
lasting three mac3_clk (24 ns). If the xHCI driver issues a
U3 request during this operation, thecontroller drops this request.

Impact: The controller ignores the request when the xHCI driver
programs the U3 entry (PORTSC.PLS = U3).

Workaround:
1. Before initiating U3 entry, save PORTPMSC.
2. Disable U2 entry by programming PORTPMSC[U2 Timeout] = h'FF.
3. After U3 entry, re-enable the U2 timer by programming PORTPMSC
with the value saved in Step 1.

Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
---
 drivers/usb/host/xhci-hub.c  |   22 ++++++++++++++++++++++
 drivers/usb/host/xhci-plat.c |    6 +++++-
 drivers/usb/host/xhci.h      |    1 +
 3 files changed, 28 insertions(+), 1 deletions(-)

diff --git a/drivers/usb/host/xhci-hub.c b/drivers/usb/host/xhci-hub.c
index f070f94..a61185e 100644
--- a/drivers/usb/host/xhci-hub.c
+++ b/drivers/usb/host/xhci-hub.c
@@ -676,12 +676,34 @@ void xhci_set_link_state(struct xhci_hcd *xhci, __le32 __iomem **port_array,
 				int port_id, u32 link_state)
 {
 	u32 temp;
+	u32 portpmsc_u2_backup = 0;
+
+	/* Backup U2 timeout info before initiating U3 entry erratum A-010131 */
+	if (xhci->shared_hcd->speed >= HCD_USB3 &&
+			link_state == USB_SS_PORT_LS_U3 &&
+			(xhci->quirks & XHCI_DIS_U1U2_WHEN_U3)) {
+		portpmsc_u2_backup = readl(port_array[port_id] + PORTPMSC);
+		portpmsc_u2_backup &= PORT_U2_TIMEOUT_MASK;
+		temp = readl(port_array[port_id] + PORTPMSC);
+		temp |= PORT_U2_TIMEOUT_MASK;
+		writel(temp, port_array[port_id] + PORTPMSC);
+	}
 
 	temp = readl(port_array[port_id]);
 	temp = xhci_port_state_to_neutral(temp);
 	temp &= ~PORT_PLS_MASK;
 	temp |= PORT_LINK_STROBE | link_state;
 	writel(temp, port_array[port_id]);
+
+	/* Restore U2 timeout info after U3 entry complete */
+	if (xhci->shared_hcd->speed >= HCD_USB3 &&
+			link_state == USB_SS_PORT_LS_U3 &&
+			(xhci->quirks & XHCI_DIS_U1U2_WHEN_U3)) {
+		temp = readl(port_array[port_id] + PORTPMSC);
+		temp &= ~PORT_U2_TIMEOUT_MASK;
+		temp |= portpmsc_u2_backup;
+		writel(temp, port_array[port_id] + PORTPMSC);
+	}
 }
 
 static void xhci_set_remote_wake_mask(struct xhci_hcd *xhci,
diff --git a/drivers/usb/host/xhci-plat.c b/drivers/usb/host/xhci-plat.c
index 1969e56..616c56e 100644
--- a/drivers/usb/host/xhci-plat.c
+++ b/drivers/usb/host/xhci-plat.c
@@ -266,8 +266,12 @@ static int xhci_plat_probe(struct platform_device *pdev)
 	if (device_property_read_bool(sysdev, "usb2-lpm-disable"))
 		xhci->quirks |= XHCI_HW_LPM_DISABLE;
 
-	if (device_property_read_bool(sysdev, "usb3-lpm-capable"))
+	if (device_property_read_bool(sysdev, "usb3-lpm-capable")) {
 		xhci->quirks |= XHCI_LPM_SUPPORT;
+		if (device_property_read_bool(sysdev,
+					"snps,dis-u1u2-when-u3-quirk"))
+			xhci->quirks |= XHCI_DIS_U1U2_WHEN_U3;
+	}
 
 	if (device_property_read_bool(&pdev->dev, "quirk-broken-port-ped"))
 		xhci->quirks |= XHCI_BROKEN_PORT_PED;
diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h
index b966cd8..9704779 100644
--- a/drivers/usb/host/xhci.h
+++ b/drivers/usb/host/xhci.h
@@ -1835,6 +1835,7 @@ struct xhci_hcd {
 /* Reserved. It was XHCI_U2_DISABLE_WAKE */
 #define XHCI_ASMEDIA_MODIFY_FLOWCONTROL	(1 << 28)
 #define XHCI_HW_LPM_DISABLE	(1 << 29)
+#define XHCI_DIS_U1U2_WHEN_U3 (1 << 30)
 
 	unsigned int		num_active_eps;
 	unsigned int		limit_active_eps;
-- 
1.7.1

^ permalink raw reply related

* [PATCH] ARM: imx_v6_v7_defconfig: enable OP-TEE
From: Peng Fan @ 2018-01-05  9:40 UTC (permalink / raw)
  To: linux-arm-kernel

This patch enables configs for Trusted Execution Environment(TEE) and
Open Portable Trusted Execution Environment(OP-TEE).

With Linux running in Trustzone non-secure world, OP-TEE OS runs in
secure world, linux could use secure services provided by OP-TEE.
With TEE/OP-TEE options selected, use the bindings
in Documentation/devicetree/bindings/arm/firmware/linaro,optee-tz.txt
to let the driver probe work.

On i.MX6/7, now the bootflow is U-Boot->OP-TEE->Linux, OP-TEE will
automatically create that node.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---

V1:
 Tested on i.MX7D-SDB with/without OP-TEE OS.
 OP-TEE needs https://github.com/OP-TEE/optee_os/pull/2052

 arch/arm/configs/imx_v6_v7_defconfig | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/configs/imx_v6_v7_defconfig b/arch/arm/configs/imx_v6_v7_defconfig
index 29cd1ac48987..72c4231d1b62 100644
--- a/arch/arm/configs/imx_v6_v7_defconfig
+++ b/arch/arm/configs/imx_v6_v7_defconfig
@@ -368,6 +368,8 @@ CONFIG_PWM=y
 CONFIG_PWM_FSL_FTM=y
 CONFIG_PWM_IMX=y
 CONFIG_NVMEM_IMX_OCOTP=y
+CONFIG_TEE=y
+CONFIG_OPTEE=y
 CONFIG_MUX_MMIO=y
 CONFIG_EXT2_FS=y
 CONFIG_EXT2_FS_XATTR=y
-- 
2.14.1

^ permalink raw reply related

* [PATCH 0/6] ARM64: dts: meson-axg: UART DT updates
From: Yixun Lan @ 2018-01-05  9:56 UTC (permalink / raw)
  To: linux-arm-kernel

HI Kevin
 These are the UART DT updates for the Meson-AXG platform.

The patch 1, 2 are two general fixes.
Other patches are about adding clock & pinctrl info, then using them.
Last patch enable UART_A which connect to BT module in the S400 board.

Note: 
This series depend on previous UART_AO clock switch patch[1]
also, these patch request clocks, so they need the
tag:meson-clk-for-v4.16-2 from clk-meson's tree in order to compile.

[1] 
http://lkml.kernel.org/r/20171215141741.175985-1-yixun.lan at amlogic.com

Yixun Lan (6):
  ARM64: dts: meson-axg: uart: drop legacy compatible name from EE UART
  ARM64: dts: meson-axg: uart: fix address space range
  ARM64: dts: meson-axg: uart: Add the clock info description
  ARM64: dts: meson-axg: uart: Add the pinctrl info description
  arm64: dts: meson-axg: complete the pinctrl info for UART_AO_A
  ARM64: dts: meson-axg: enable the UART_A controller

 arch/arm64/boot/dts/amlogic/meson-axg-s400.dts |   9 +++
 arch/arm64/boot/dts/amlogic/meson-axg.dtsi     | 108 ++++++++++++++++++++++++-
 2 files changed, 113 insertions(+), 4 deletions(-)

-- 
2.15.1

^ permalink raw reply

* [PATCH 1/6] ARM64: dts: meson-axg: uart: drop legacy compatible name from EE UART
From: Yixun Lan @ 2018-01-05  9:56 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <20180105095621.196472-1-yixun.lan@amlogic.com>

For the UART controller in EE domain, they require 'pclk' to work.
Current logic of the code will force to go for legacy clock probe
if it found current compatible string match to 'amlogic,meson-ao-uart'.

Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
---
 arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
index e2b8a9c8bf0b..1c6002b3fe34 100644
--- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
@@ -142,14 +142,14 @@
 			};
 
 			uart_A: serial at 24000 {
-				compatible = "amlogic,meson-gx-uart", "amlogic,meson-uart";
+				compatible = "amlogic,meson-gx-uart";
 				reg = <0x0 0x24000 0x0 0x14>;
 				interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>;
 				status = "disabled";
 			};
 
 			uart_B: serial at 23000 {
-				compatible = "amlogic,meson-gx-uart", "amlogic,meson-uart";
+				compatible = "amlogic,meson-gx-uart";
 				reg = <0x0 0x23000 0x0 0x14>;
 				interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>;
 				status = "disabled";
-- 
2.15.1

^ permalink raw reply related

* [PATCH 2/6] ARM64: dts: meson-axg: uart: fix address space range
From: Yixun Lan @ 2018-01-05  9:56 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <20180105095621.196472-1-yixun.lan@amlogic.com>

The address space range is actually 0x18, fixed here.

Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
---
 arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
index 1c6002b3fe34..9636a7c5f6ed 100644
--- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
@@ -143,14 +143,14 @@
 
 			uart_A: serial at 24000 {
 				compatible = "amlogic,meson-gx-uart";
-				reg = <0x0 0x24000 0x0 0x14>;
+				reg = <0x0 0x24000 0x0 0x18>;
 				interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>;
 				status = "disabled";
 			};
 
 			uart_B: serial at 23000 {
 				compatible = "amlogic,meson-gx-uart";
-				reg = <0x0 0x23000 0x0 0x14>;
+				reg = <0x0 0x23000 0x0 0x18>;
 				interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>;
 				status = "disabled";
 			};
-- 
2.15.1

^ permalink raw reply related

* [PATCH 3/6] ARM64: dts: meson-axg: uart: Add the clock info description
From: Yixun Lan @ 2018-01-05  9:56 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <20180105095621.196472-1-yixun.lan@amlogic.com>

Add the clock info description for the EE UART controller.

Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
---
 arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
index 9636a7c5f6ed..f6bf01cfff4b 100644
--- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
@@ -146,6 +146,8 @@
 				reg = <0x0 0x24000 0x0 0x18>;
 				interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>;
 				status = "disabled";
+				clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>;
+				clock-names = "xtal", "pclk", "baud";
 			};
 
 			uart_B: serial at 23000 {
@@ -153,6 +155,8 @@
 				reg = <0x0 0x23000 0x0 0x18>;
 				interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>;
 				status = "disabled";
+				clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>;
+				clock-names = "xtal", "pclk", "baud";
 			};
 		};
 
-- 
2.15.1

^ permalink raw reply related

* [PATCH 4/6] ARM64: dts: meson-axg: uart: Add the pinctrl info description
From: Yixun Lan @ 2018-01-05  9:56 UTC (permalink / raw)
  To: linux-arm-kernel
In-Reply-To: <20180105095621.196472-1-yixun.lan@amlogic.com>

Describe the pinctrl info for the UART controller which found
in the Meson-AXG SoCs.

Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
---
 arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 96 ++++++++++++++++++++++++++++++
 1 file changed, 96 insertions(+)

diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
index f6bf01cfff4b..78bb206e2897 100644
--- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
@@ -303,6 +303,70 @@
 						function = "pwm_d";
 					};
 				};
+
+				uart_a_pins: uart_a {
+					mux {
+						groups = "uart_tx_a",
+							"uart_rx_a";
+						function = "uart_a";
+					};
+				};
+
+				uart_a_cts_rts_pins: uart_a_cts_rts {
+					mux {
+						groups = "uart_ctx_a",
+							"uart_rts_a";
+						function = "uart_a";
+					};
+				};
+
+				uart_b_x_pins: uart_b_x {
+					mux {
+						groups = "uart_tx_b_x",
+							"uart_rx_b_x";
+						function = "uart_b";
+					};
+				};
+
+				uart_b_x_cts_rts_pins: uart_b_x_cts_rts {
+					mux {
+						groups = "uart_cts_b_x",
+							"uart_rts_b_x";
+						function = "uart_b";
+					};
+				};
+
+				uart_b_z_pins: uart_b_z {
+					mux {
+						groups = "uart_tx_b_z",
+							"uart_rx_b_z";
+						function = "uart_b";
+					};
+				};
+
+				uart_b_z_cts_rts_pins: uart_b_z_cts_rts {
+					mux {
+						groups = "uart_cts_b_z",
+							"uart_rts_b_z";
+						function = "uart_b";
+					};
+				};
+
+				uart_ao_b_z_pins: uart_ao_b_z {
+					mux {
+						groups = "uart_ao_tx_b_z",
+							"uart_ao_rx_b_z";
+						function = "uart_ao_b_groupz";
+					};
+				};
+
+				uart_ao_b_z_cts_rts_pins: uart_ao_b_z_cts_rts {
+					mux {
+						groups = "uart_ao_cts_b_z",
+							"uart_ao_rts_b_z";
+						function = "uart_ao_b_groupz";
+					};
+				};
 			};
 		};
 
@@ -346,6 +410,38 @@
 					#gpio-cells = <2>;
 					gpio-ranges = <&pinctrl_aobus 0 0 15>;
 				};
+
+				uart_ao_a_pins: uart_ao_a {
+					mux {
+						groups = "uart_ao_tx_a",
+							"uart_ao_rx_a";
+						function = "uart_ao_a";
+					};
+				};
+
+				uart_ao_a_cts_rts_pins: uart_ao_a_cts_rts {
+					mux {
+						groups = "uart_ao_cts_a",
+							"uart_ao_rts_a";
+						function = "uart_ao_a";
+					};
+				};
+
+				uart_ao_b_pins: uart_ao_b {
+					mux {
+						groups = "uart_ao_tx_b",
+							"uart_ao_rx_b";
+						function = "uart_ao_b";
+					};
+				};
+
+				uart_ao_b_cts_rts_pins: uart_ao_b_cts_rts {
+					mux {
+						groups = "uart_ao_cts_b",
+							"uart_ao_rts_b";
+						function = "uart_ao_b";
+					};
+				};
 			};
 
 			pwm_AO_ab: pwm at 7000 {
-- 
2.15.1

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