* [PATCH] irqchip/gic-v3-its: fix ITS queue timeout
From: Yang Yingliang @ 2018-06-06 1:43 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <834fde1b-5ae0-afc6-283f-2a470757e54a@arm.com>
Hi, Julien
On 2018/6/5 18:16, Julien Thierry wrote:
> Hi Yang,
>
> On 05/06/18 07:30, Yang Yingliang wrote:
>> When the kernel booted with maxcpus=x, 'x' is smaller
>> than actual cpu numbers, the TAs of offline cpus won't
>> be set to its->collection.
>>
>> If LPI is bind to offline cpu, sync cmd will use zero TA,
>> it leads to ITS queue timeout. Fix this by choosing a
>> online cpu, if there is no online cpu in cpu_mask.
>>
>> Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
>> ---
>> drivers/irqchip/irq-gic-v3-its.c | 9 +++++++--
>> 1 file changed, 7 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/irqchip/irq-gic-v3-its.c
>> b/drivers/irqchip/irq-gic-v3-its.c
>> index 5416f2b..edd92a9 100644
>> --- a/drivers/irqchip/irq-gic-v3-its.c
>> +++ b/drivers/irqchip/irq-gic-v3-its.c
>> @@ -2309,7 +2309,9 @@ static int its_irq_domain_activate(struct
>> irq_domain *domain,
>> cpu_mask = cpumask_of_node(its_dev->its->numa_node);
>> /* Bind the LPI to the first possible CPU */
>> - cpu = cpumask_first(cpu_mask);
>> + cpu = cpumask_first_and(cpu_mask, cpu_online_mask);
>> + if (!cpu_online(cpu))
>
> Testing for cpu being online here feels a bit redundant.
>
> Since cpu is online if the cpumask_first_and returns a valid cpu, I
> think you could replace this test with:
>
> if (cpu >= nr_cpu_ids)
Yes, I used wrong check here, according to comment of cpumask_first_and,
this func will returns >= nr_cpu_ids if no cpus set in both.
I'll send v2 later.
>
>> + cpu = cpumask_first(cpu_online_mask);
>> its_dev->event_map.col_map[event] = cpu;
>> irq_data_update_effective_affinity(d, cpumask_of(cpu));
>> @@ -2466,7 +2468,10 @@ static int its_vpe_set_affinity(struct
>> irq_data *d,
>> bool force)
>> {
>> struct its_vpe *vpe = irq_data_get_irq_chip_data(d);
>> - int cpu = cpumask_first(mask_val);
>> + int cpu = cpumask_first_and(mask_val, cpu_online_mask);
>> +
>> + if (!cpu_online(cpu))
>
> Same thing here.
>
>> + cpu = cpumask_first(cpu_online_mask);
>> /*
>> * Changing affinity is mega expensive, so let's be as lazy as
>>
>
> Cheers,
>
Thanks,
Yang
^ permalink raw reply
* [PATCH V5] scsi: hpsa: disable device during shutdown
From: Martin K. Petersen @ 2018-06-06 1:19 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1527913733-16492-1-git-send-email-okaya@codeaurora.org>
Sinan,
> 'Commit cc27b735ad3a ("PCI/portdrv: Turn off PCIe services during
> shutdown")' has been added to kernel to shutdown pending PCIe port
> service interrupts during reboot so that a newly started kexec kernel
> wouldn't observe pending interrupts.
>
> pcie_port_device_remove() is disabling the root port and switches by
> calling pci_disable_device() after all PCIe service drivers are shutdown.
>
> This has been found to cause crashes on HP DL360 Gen9 machines during
> reboot due to hpsa driver not clearing the bus master bit during the
> shutdown procedure by calling pci_disable_device().
>
> Disable device as part of the shutdown sequence.
Applied to 4.18/scsi-fixes. Thanks!
--
Martin K. Petersen Oracle Linux Engineering
^ permalink raw reply
* 答复: [PATCH v10 0/5] scsi: ufs: add ufs driver code for Hisilicon Hi3660 SoC
From: liwei (CM) @ 2018-06-06 0:48 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <f9cde7df-2d4d-3d7e-5269-ef879211b2ee@arm.com>
Hi, Valentin
Thank you for your attention and work.
Thanks!
-----????-----
???: Valentin Schneider [mailto:valentin.schneider at arm.com]
????: 2018?6?5? 22:59
???: liwei (CM); robh+dt at kernel.org; mark.rutland at arm.com; catalin.marinas at arm.com; will.deacon at arm.com; vinholikatti at gmail.com; jejb at linux.vnet.ibm.com; martin.petersen at oracle.com; khilman at baylibre.com; arnd at arndb.de; gregory.clement at free-electrons.com; thomas.petazzoni at free-electrons.com; yamada.masahiro at socionext.com; riku.voipio at linaro.org; treding at nvidia.com; krzk at kernel.org; devicetree at vger.kernel.org; linux-kernel at vger.kernel.org; linux-arm-kernel at lists.infradead.org; linux-scsi at vger.kernel.org
??: zangleigang; Gengjianfeng; guodong.xu at linaro.org; Chenfeng (puck); john.stultz at linaro.org; Fengbaopeng (kevin, Kirin Solution Dept)
??: Re: [PATCH v10 0/5] scsi: ufs: add ufs driver code for Hisilicon Hi3660 SoC
Hi,
On 25/05/18 10:17, Li Wei wrote:
> This patchset adds driver support for UFS for Hi3660 SoC. It is verified on HiKey960 board.
>
> Li Wei (5):
> scsi: ufs: add Hisilicon ufs driver code
> dt-bindings: scsi: ufs: add document for hisi-ufs
> arm64: dts: add ufs dts node
> arm64: defconfig: enable configs for Hisilicon ufs
> arm64: defconfig: enable f2fs and squashfs
>
> Documentation/devicetree/bindings/ufs/ufs-hisi.txt | 41 ++
> .../devicetree/bindings/ufs/ufshcd-pltfrm.txt | 10 +-
> arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 18 +
> arch/arm64/configs/defconfig | 11 +
> drivers/scsi/ufs/Kconfig | 9 +
> drivers/scsi/ufs/Makefile | 1 +
> drivers/scsi/ufs/ufs-hisi.c | 619 +++++++++++++++++++++
> drivers/scsi/ufs/ufs-hisi.h | 115 ++++
> 8 files changed, 821 insertions(+), 3 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/ufs/ufs-hisi.txt
> create mode 100644 drivers/scsi/ufs/ufs-hisi.c
> create mode 100644 drivers/scsi/ufs/ufs-hisi.h
>
> Major changes in v10:
> - solve review comments from Rob Herring.
> *Modify the "reset-names" describe in ufs-hisi.txt binding file.
> *List clocks in ufs-hisi.txt binding file.
> *remove the "arst" and keep only "rst" in the binging files.
> *remove the "arst" member from both dts and c code.
> Major changes in v9:
> - solve review comments from Rob Herring.
> *remove freq-table-hz in ufs-hisi.txt binding file.
> *Move the rst to the ufshcd_pltfm.txt common binding file.
> *Modify the member "assert" of UFS host structure to "arst".
> Major changes in v8:
> - solve review comments from zhangfei.
> *Add Version history.
> - solve review comments from Rob Herring.
> *remove freq-table-hz.
> - solve review comments from Riku Voipio.
> *Add MODULE_DEVICE_TABLE for ufs driver.
>
Tested on top of linux-next (4.17.0-next-20180605), I can reliably load
my debian userspace flashed on the 'system' fastboot partition.
Tested-by: Valentin Schneider <valentin.schneider@arm.com>
^ permalink raw reply
* [PATCH V4] ARM: dts: armada388-helios4
From: Dennis Gilmore @ 2018-06-05 22:15 UTC (permalink / raw)
To: linux-arm-kernel
The helios4 is a Armada388 based nas board designed by SolidRun and
based on their SOM. It is sold by kobol.io the dts file came from
https://raw.githubusercontent.com/armbian/build/master/patch/kernel/mvebu-default/95-helios4-device-tree.patch
I added a SPDX license line to match the clearfog it says it was based
on and a compatible line for "kobol,helios4"
Signed-off-by: Dennis Gilmore <dennis@ausil.us>
---
changes since first submission
change solidrun to kobol in compatible line based on feedback
changes since v2
remove commented out nodes based on feedback
changes since v3
update copyright info for the dts based on a request from kobol
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/armada-388-helios4.dts | 313 +++++++++++++++++++++++
2 files changed, 314 insertions(+)
create mode 100644 arch/arm/boot/dts/armada-388-helios4.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 7e2424957809..490bfd586198 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -1123,6 +1123,7 @@ dtb-$(CONFIG_MACH_ARMADA_38X) += \
armada-388-clearfog-pro.dtb \
armada-388-db.dtb \
armada-388-gp.dtb \
+ armada-388-helios4.dtb \
armada-388-rd.dtb
dtb-$(CONFIG_MACH_ARMADA_39X) += \
armada-398-db.dtb
diff --git a/arch/arm/boot/dts/armada-388-helios4.dts b/arch/arm/boot/dts/armada-388-helios4.dts
new file mode 100644
index 000000000000..705adfa8c680
--- /dev/null
+++ b/arch/arm/boot/dts/armada-388-helios4.dts
@@ -0,0 +1,313 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Device Tree file for Helios4
+ * based on SolidRun Clearfog revision A1 rev 2.0 (88F6828)
+ *
+ * Copyright (C) 2017 Aditya Prayoga <aditya@kobol.io>
+ *
+ */
+
+/dts-v1/;
+#include "armada-388.dtsi"
+#include "armada-38x-solidrun-microsom.dtsi"
+
+/ {
+ model = "Helios4";
+ compatible = "kobol,helios4", "marvell,armada388",
+ "marvell,armada385", "marvell,armada380";
+
+ memory {
+ device_type = "memory";
+ reg = <0x00000000 0x80000000>; /* 2 GB */
+ };
+
+ aliases {
+ /* So that mvebu u-boot can update the MAC addresses */
+ ethernet1 = ð0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ reg_12v: regulator-12v {
+ compatible = "regulator-fixed";
+ regulator-name = "power_brick_12V";
+ regulator-min-microvolt = <12000000>;
+ regulator-max-microvolt = <12000000>;
+ regulator-always-on;
+ };
+
+ reg_3p3v: regulator-3p3v {
+ compatible = "regulator-fixed";
+ regulator-name = "3P3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ vin-supply = <®_12v>;
+ };
+
+ reg_5p0v_hdd: regulator-5v-hdd {
+ compatible = "regulator-fixed";
+ regulator-name = "5V_HDD";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ vin-supply = <®_12v>;
+ };
+
+ reg_5p0v_usb: regulator-5v-usb {
+ compatible = "regulator-fixed";
+ regulator-name = "USB-PWR";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-boot-on;
+ regulator-always-on;
+ enable-active-high;
+ gpio = <&expander0 6 GPIO_ACTIVE_HIGH>;
+ vin-supply = <®_12v>;
+ };
+
+ system-leds {
+ compatible = "gpio-leds";
+ status-led {
+ label = "helios4:green:status";
+ gpios = <&gpio0 24 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "heartbeat";
+ default-state = "on";
+ };
+
+ fault-led {
+ label = "helios4:red:fault";
+ gpios = <&gpio0 25 GPIO_ACTIVE_LOW>;
+ default-state = "keep";
+ };
+ };
+
+ io-leds {
+ compatible = "gpio-leds";
+ sata1-led {
+ label = "helios4:green:ata1";
+ gpios = <&gpio1 17 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "ata1";
+ default-state = "off";
+ };
+ sata2-led {
+ label = "helios4:green:ata2";
+ gpios = <&gpio1 18 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "ata2";
+ default-state = "off";
+ };
+ sata3-led {
+ label = "helios4:green:ata3";
+ gpios = <&gpio1 20 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "ata3";
+ default-state = "off";
+ };
+ sata4-led {
+ label = "helios4:green:ata4";
+ gpios = <&gpio1 21 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "ata4";
+ default-state = "off";
+ };
+ usb-led {
+ label = "helios4:green:usb";
+ gpios = <&gpio1 22 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "usb-host";
+ default-state = "off";
+ };
+ };
+
+ fan1: j10-pwm {
+ compatible = "pwm-fan";
+ pwms = <&gpio1 9 40000>; /* Target freq:25 kHz */
+ };
+
+ fan2: j17-pwm {
+ compatible = "pwm-fan";
+ pwms = <&gpio1 23 40000>; /* Target freq:25 kHz */
+ };
+
+ usb2_phy: usb2-phy {
+ compatible = "usb-nop-xceiv";
+ vbus-regulator = <®_5p0v_usb>;
+ };
+
+ usb3_phy: usb3-phy {
+ compatible = "usb-nop-xceiv";
+ };
+
+ soc {
+ internal-regs {
+ i2c at 11000 {
+ clock-frequency = <400000>;
+ pinctrl-0 = <&i2c0_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+
+ /*
+ * PCA9655 GPIO expander, up to 1MHz clock.
+ * 0-Board Revision bit 0 #
+ * 1-Board Revision bit 1 #
+ * 5-USB3 overcurrent
+ * 6-USB3 power
+ */
+ expander0: gpio-expander at 20 {
+ /*
+ * This is how it should be:
+ * compatible = "onnn,pca9655",
+ * "nxp,pca9555";
+ * but you can't do this because of
+ * the way I2C works.
+ */
+ compatible = "nxp,pca9555";
+ gpio-controller;
+ #gpio-cells = <2>;
+ reg = <0x20>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pca0_pins>;
+ interrupt-parent = <&gpio0>;
+ interrupts = <23 IRQ_TYPE_EDGE_FALLING>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+
+ board_rev_bit_0 {
+ gpio-hog;
+ gpios = <0 GPIO_ACTIVE_LOW>;
+ input;
+ line-name = "board-rev-0";
+ };
+ board_rev_bit_1 {
+ gpio-hog;
+ gpios = <1 GPIO_ACTIVE_LOW>;
+ input;
+ line-name = "board-rev-1";
+ };
+ usb3_ilimit {
+ gpio-hog;
+ gpios = <5 GPIO_ACTIVE_HIGH>;
+ input;
+ line-name = "usb-overcurrent-status";
+ };
+ };
+
+ temp_sensor: temp at 4c {
+ compatible = "ti,lm75";
+ reg = <0x4c>;
+ vcc-supply = <®_3p3v>;
+ };
+ };
+
+ i2c at 11100 {
+ /*
+ * External I2C Bus for user peripheral
+ */
+ clock-frequency = <400000>;
+ pinctrl-0 = <&helios_i2c1_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+ };
+
+ sata at a8000 {
+ status = "okay";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ sata0: sata-port at 0 {
+ reg = <0>;
+ };
+
+ sata1: sata-port at 1 {
+ reg = <1>;
+ };
+ };
+
+ sata at e0000 {
+ status = "okay";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ sata2: sata-port at 0 {
+ reg = <0>;
+ };
+
+ sata3: sata-port at 1 {
+ reg = <1>;
+ };
+ };
+
+ spi at 10680 {
+ pinctrl-0 = <&spi1_pins
+ µsom_spi1_cs_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+ };
+
+ sdhci at d8000 {
+ bus-width = <4>;
+ cd-gpios = <&gpio0 20 GPIO_ACTIVE_LOW>;
+ no-1-8-v;
+ pinctrl-0 = <&helios_sdhci_pins
+ &helios_sdhci_cd_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+ vmmc = <®_3p3v>;
+ wp-inverted;
+ };
+
+ usb at 58000 {
+ usb-phy = <&usb2_phy>;
+ status = "okay";
+ };
+
+ usb3 at f0000 {
+ status = "okay";
+ };
+
+ usb3 at f8000 {
+ status = "okay";
+ };
+
+ pinctrl at 18000 {
+ pca0_pins: pca0-pins {
+ marvell,pins = "mpp23";
+ marvell,function = "gpio";
+ };
+ microsom_phy0_int_pins: microsom-phy0-int-pins {
+ marvell,pins = "mpp18";
+ marvell,function = "gpio";
+ };
+ helios_i2c1_pins: i2c1-pins {
+ marvell,pins = "mpp26", "mpp27";
+ marvell,function = "i2c1";
+ };
+ helios_sdhci_cd_pins: helios-sdhci-cd-pins {
+ marvell,pins = "mpp20";
+ marvell,function = "gpio";
+ };
+ helios_sdhci_pins: helios-sdhci-pins {
+ marvell,pins = "mpp21", "mpp28",
+ "mpp37", "mpp38",
+ "mpp39", "mpp40";
+ marvell,function = "sd0";
+ };
+ helios_led_pins: helios-led-pins {
+ marvell,pins = "mpp24", "mpp25",
+ "mpp49", "mpp50",
+ "mpp52", "mpp53",
+ "mpp54";
+ marvell,function = "gpio";
+ };
+ helios_fan_pins: helios-fan-pins {
+ marvell,pins = "mpp41", "mpp43",
+ "mpp48", "mpp55";
+ marvell,function = "gpio";
+ };
+ microsom_spi1_cs_pins: spi1-cs-pins {
+ marvell,pins = "mpp59";
+ marvell,function = "spi1";
+ };
+ };
+ };
+ };
+};
--
2.17.1
^ permalink raw reply related
* [PATCH v2] ARM64: dts: meson: fix register ranges for SD/eMMC
From: Kevin Hilman @ 2018-06-05 21:59 UTC (permalink / raw)
To: linux-arm-kernel
Based on updated information from Amlogic, correct the register range
for the SD/eMMC blocks to the right size.
Reported-by: Yixun Lan <yixun.lan@amlogic.com>
Tested-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
---
arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 4 ++--
arch/arm64/boot/dts/amlogic/meson-gx.dtsi | 6 +++---
2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
index fee87737a201..67d7115e4eff 100644
--- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
@@ -132,7 +132,7 @@
sd_emmc_b: sd at 5000 {
compatible = "amlogic,meson-axg-mmc";
- reg = <0x0 0x5000 0x0 0x2000>;
+ reg = <0x0 0x5000 0x0 0x800>;
interrupts = <GIC_SPI 217 IRQ_TYPE_EDGE_RISING>;
status = "disabled";
clocks = <&clkc CLKID_SD_EMMC_B>,
@@ -144,7 +144,7 @@
sd_emmc_c: mmc at 7000 {
compatible = "amlogic,meson-axg-mmc";
- reg = <0x0 0x7000 0x0 0x2000>;
+ reg = <0x0 0x7000 0x0 0x800>;
interrupts = <GIC_SPI 218 IRQ_TYPE_EDGE_RISING>;
status = "disabled";
clocks = <&clkc CLKID_SD_EMMC_C>,
diff --git a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
index 3c31e21cbed7..b003f324ca31 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
@@ -457,21 +457,21 @@
sd_emmc_a: mmc at 70000 {
compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc";
- reg = <0x0 0x70000 0x0 0x2000>;
+ reg = <0x0 0x70000 0x0 0x800>;
interrupts = <GIC_SPI 216 IRQ_TYPE_EDGE_RISING>;
status = "disabled";
};
sd_emmc_b: mmc at 72000 {
compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc";
- reg = <0x0 0x72000 0x0 0x2000>;
+ reg = <0x0 0x72000 0x0 0x800>;
interrupts = <GIC_SPI 217 IRQ_TYPE_EDGE_RISING>;
status = "disabled";
};
sd_emmc_c: mmc at 74000 {
compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc";
- reg = <0x0 0x74000 0x0 0x2000>;
+ reg = <0x0 0x74000 0x0 0x800>;
interrupts = <GIC_SPI 218 IRQ_TYPE_EDGE_RISING>;
status = "disabled";
};
--
2.11.0
^ permalink raw reply related
* [PATCH v2 1/3] arm64/mm: pass swapper_pg_dir as an argument to __enable_mmu()
From: Laura Abbott @ 2018-06-05 21:56 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180605093350.24504-2-yaojun8558363@gmail.com>
On 06/05/2018 02:33 AM, Jun Yao wrote:
> Introduce __pa_swapper_pg_dir to save physical address of
> swapper_pg_dir. And pass it as an argument to __enable_mmu().
>
> Signed-off-by: Jun Yao <yaojun8558363@gmail.com>
> ---
> arch/arm64/include/asm/mmu_context.h | 4 +---
> arch/arm64/include/asm/pgtable.h | 1 +
> arch/arm64/kernel/cpufeature.c | 2 +-
> arch/arm64/kernel/head.S | 6 ++++--
> arch/arm64/kernel/hibernate.c | 2 +-
> arch/arm64/kernel/sleep.S | 1 +
> arch/arm64/mm/kasan_init.c | 4 ++--
> arch/arm64/mm/mmu.c | 11 +++++++++--
> 8 files changed, 20 insertions(+), 11 deletions(-)
>
> diff --git a/arch/arm64/include/asm/mmu_context.h b/arch/arm64/include/asm/mmu_context.h
> index 39ec0b8a689e..3eddb871f251 100644
> --- a/arch/arm64/include/asm/mmu_context.h
> +++ b/arch/arm64/include/asm/mmu_context.h
> @@ -141,14 +141,12 @@ static inline void cpu_install_idmap(void)
> * Atomically replaces the active TTBR1_EL1 PGD with a new VA-compatible PGD,
> * avoiding the possibility of conflicting TLB entries being allocated.
> */
> -static inline void cpu_replace_ttbr1(pgd_t *pgdp)
> +static inline void cpu_replace_ttbr1(phys_addr_t pgd_phys)
> {
> typedef void (ttbr_replace_func)(phys_addr_t);
> extern ttbr_replace_func idmap_cpu_replace_ttbr1;
> ttbr_replace_func *replace_phys;
>
> - phys_addr_t pgd_phys = virt_to_phys(pgdp);
> -
> replace_phys = (void *)__pa_symbol(idmap_cpu_replace_ttbr1);
>
> cpu_install_idmap();
> diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h
> index 7c4c8f318ba9..519ab5581b08 100644
> --- a/arch/arm64/include/asm/pgtable.h
> +++ b/arch/arm64/include/asm/pgtable.h
> @@ -722,6 +722,7 @@ extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
> extern pgd_t swapper_pg_end[];
> extern pgd_t idmap_pg_dir[PTRS_PER_PGD];
> extern pgd_t tramp_pg_dir[PTRS_PER_PGD];
> +extern volatile phys_addr_t __pa_swapper_pg_dir;
>
> /*
> * Encode and decode a swap entry:
> diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
> index d2856b129097..e3d76a9dd67a 100644
> --- a/arch/arm64/kernel/cpufeature.c
> +++ b/arch/arm64/kernel/cpufeature.c
> @@ -917,7 +917,7 @@ kpti_install_ng_mappings(const struct arm64_cpu_capabilities *__unused)
> remap_fn = (void *)__pa_symbol(idmap_kpti_install_ng_mappings);
>
> cpu_install_idmap();
> - remap_fn(cpu, num_online_cpus(), __pa_symbol(swapper_pg_dir));
> + remap_fn(cpu, num_online_cpus(), __pa_swapper_pg_dir);
> cpu_uninstall_idmap();
>
> if (!cpu)
> diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S
> index b0853069702f..2e871b1cb75f 100644
> --- a/arch/arm64/kernel/head.S
> +++ b/arch/arm64/kernel/head.S
> @@ -706,6 +706,7 @@ secondary_startup:
> * Common entry point for secondary CPUs.
> */
> bl __cpu_setup // initialise processor
> + ldr_l x26, __pa_swapper_pg_dir
> bl __enable_mmu
> ldr x8, =__secondary_switched
> br x8
> @@ -748,6 +749,7 @@ ENDPROC(__secondary_switched)
> * Enable the MMU.
> *
> * x0 = SCTLR_EL1 value for turning on the MMU.
> + * x26 = TTBR1 value for turning on the MMU.
> *
> * Returns to the caller via x30/lr. This requires the caller to be covered
> * by the .idmap.text section.
> @@ -762,9 +764,8 @@ ENTRY(__enable_mmu)
> b.ne __no_granule_support
> update_early_cpu_boot_status 0, x1, x2
> adrp x1, idmap_pg_dir
> - adrp x2, swapper_pg_dir
> phys_to_ttbr x3, x1
> - phys_to_ttbr x4, x2
> + phys_to_ttbr x4, x26
> msr ttbr0_el1, x3 // load TTBR0
> msr ttbr1_el1, x4 // load TTBR1
> isb
> @@ -823,6 +824,7 @@ __primary_switch:
> mrs x20, sctlr_el1 // preserve old SCTLR_EL1 value
> #endif
>
> + adrp x26, swapper_pg_dir
> bl __enable_mmu
> #ifdef CONFIG_RELOCATABLE
> bl __relocate_kernel
> diff --git a/arch/arm64/kernel/hibernate.c b/arch/arm64/kernel/hibernate.c
> index 6b2686d54411..0a0a0ca19f9b 100644
> --- a/arch/arm64/kernel/hibernate.c
> +++ b/arch/arm64/kernel/hibernate.c
> @@ -125,7 +125,7 @@ int arch_hibernation_header_save(void *addr, unsigned int max_size)
> return -EOVERFLOW;
>
> arch_hdr_invariants(&hdr->invariants);
> - hdr->ttbr1_el1 = __pa_symbol(swapper_pg_dir);
> + hdr->ttbr1_el1 = __pa_swapper_pg_dir;
> hdr->reenter_kernel = _cpu_resume;
>
> /* We can't use __hyp_get_vectors() because kvm may still be loaded */
> diff --git a/arch/arm64/kernel/sleep.S b/arch/arm64/kernel/sleep.S
> index bebec8ef9372..03854c329449 100644
> --- a/arch/arm64/kernel/sleep.S
> +++ b/arch/arm64/kernel/sleep.S
> @@ -101,6 +101,7 @@ ENTRY(cpu_resume)
> bl el2_setup // if in EL2 drop to EL1 cleanly
> bl __cpu_setup
> /* enable the MMU early - so we can access sleep_save_stash by va */
> + ldr_l x26, __pa_swapper_pg_dir
> bl __enable_mmu
> ldr x8, =_cpu_resume
> br x8
> diff --git a/arch/arm64/mm/kasan_init.c b/arch/arm64/mm/kasan_init.c
> index 12145874c02b..dd4f28c19165 100644
> --- a/arch/arm64/mm/kasan_init.c
> +++ b/arch/arm64/mm/kasan_init.c
> @@ -199,7 +199,7 @@ void __init kasan_init(void)
> */
> memcpy(tmp_pg_dir, swapper_pg_dir, sizeof(tmp_pg_dir));
> dsb(ishst);
> - cpu_replace_ttbr1(lm_alias(tmp_pg_dir));
> + cpu_replace_ttbr1(__pa_symbol(tmp_pg_dir));
>
> clear_pgds(KASAN_SHADOW_START, KASAN_SHADOW_END);
>
> @@ -236,7 +236,7 @@ void __init kasan_init(void)
> pfn_pte(sym_to_pfn(kasan_zero_page), PAGE_KERNEL_RO));
>
> memset(kasan_zero_page, 0, PAGE_SIZE);
> - cpu_replace_ttbr1(lm_alias(swapper_pg_dir));
> + cpu_replace_ttbr1(__pa_swapper_pg_dir);
>
> /* At this point kasan is fully initialized. Enable error messages */
> init_task.kasan_depth = 0;
> diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c
> index 2dbb2c9f1ec1..c7df2f0d2e85 100644
> --- a/arch/arm64/mm/mmu.c
> +++ b/arch/arm64/mm/mmu.c
> @@ -55,6 +55,9 @@ u64 idmap_ptrs_per_pgd = PTRS_PER_PGD;
> u64 kimage_voffset __ro_after_init;
> EXPORT_SYMBOL(kimage_voffset);
>
> +volatile phys_addr_t __section(".mmuoff.data.read")
> +__pa_swapper_pg_dir;
> +
> /*
> * Empty_zero_page is a special page that is used for zero-initialized data
> * and COW.
> @@ -631,6 +634,10 @@ void __init paging_init(void)
> phys_addr_t pgd_phys = early_pgtable_alloc();
> pgd_t *pgdp = pgd_set_fixmap(pgd_phys);
>
> + __pa_swapper_pg_dir = __pa_symbol(swapper_pg_dir);
> + __flush_dcache_area((void *)&__pa_swapper_pg_dir,
> + sizeof(__pa_swapper_pg_dir));
> +
Can you add a comment here explaining why the flush is needed and
also why the variable gets placed in the particular section?
A brief summary of https://www.spinics.net/lists/kernel/msg2819594.html
would be fine.
Thanks,
Laura
> map_kernel(pgdp);
> map_mem(pgdp);
>
> @@ -642,9 +649,9 @@ void __init paging_init(void)
> *
> * To do this we need to go via a temporary pgd.
> */
> - cpu_replace_ttbr1(__va(pgd_phys));
> + cpu_replace_ttbr1(pgd_phys);
> memcpy(swapper_pg_dir, pgdp, PGD_SIZE);
> - cpu_replace_ttbr1(lm_alias(swapper_pg_dir));
> + cpu_replace_ttbr1(__pa_swapper_pg_dir);
>
> pgd_clear_fixmap();
> memblock_free(pgd_phys, PAGE_SIZE);
>
^ permalink raw reply
* [PATCH] ARM64: dts: meson-axg: fix register ranges for SD/eMMC
From: Kevin Hilman @ 2018-06-05 21:56 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1528185904.10642.52.camel@baylibre.com>
Jerome Brunet <jbrunet@baylibre.com> writes:
> On Mon, 2018-06-04 at 15:27 -0700, Kevin Hilman wrote:
>> Based on updated information from Amlogic, correct the register
>> range for the SD/eMMC blocks to the right size.
>>
>> Reported-by: Yixun Lan <yixun.lan@amlogic.com>
>> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
>
> Shouldn't we make the same the change on the gx family ?
>
Yes, I was waiting for confirmation from Yixun. Will spin a v2 with GX
included.
Kevin
>> ---
>> Yixun, please test and confirm this still works on AXG boards.
>>
>> arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 4 ++--
>> 1 file changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
>> index fee87737a201..67d7115e4eff 100644
>> --- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
>> +++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
>> @@ -132,7 +132,7 @@
>>
>> sd_emmc_b: sd at 5000 {
>> compatible = "amlogic,meson-axg-mmc";
>> - reg = <0x0 0x5000 0x0 0x2000>;
>> + reg = <0x0 0x5000 0x0 0x800>;
>> interrupts = <GIC_SPI 217 IRQ_TYPE_EDGE_RISING>;
>> status = "disabled";
>> clocks = <&clkc CLKID_SD_EMMC_B>,
>> @@ -144,7 +144,7 @@
>>
>> sd_emmc_c: mmc at 7000 {
>> compatible = "amlogic,meson-axg-mmc";
>> - reg = <0x0 0x7000 0x0 0x2000>;
>> + reg = <0x0 0x7000 0x0 0x800>;
>> interrupts = <GIC_SPI 218 IRQ_TYPE_EDGE_RISING>;
>> status = "disabled";
>> clocks = <&clkc CLKID_SD_EMMC_C>,
^ permalink raw reply
* [PATCH 20/20] dts: tc2: Update coresight bindings for hardware ports
From: Suzuki K Poulose @ 2018-06-05 21:43 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1528235011-30691-1-git-send-email-suzuki.poulose@arm.com>
Switch to the new coresight bindings
Cc: Liviu Dudau <liviu.dudau@arm.com>
Cc: Sudeep Holla <sudeep.holla@arm.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
---
arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts | 48 ++++++++++++++++++++++--------
1 file changed, 36 insertions(+), 12 deletions(-)
diff --git a/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts b/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
index a4c7713..407693e 100644
--- a/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
+++ b/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
@@ -394,8 +394,9 @@
clock-names = "apb_pclk";
port {
etb_in_port: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&replicator_out_port0>;
+ coresight,hwid = <0>;
};
};
};
@@ -408,8 +409,9 @@
clock-names = "apb_pclk";
port {
tpiu_in_port: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&replicator_out_port1>;
+ coresight,hwid = <0>;
};
};
};
@@ -428,23 +430,28 @@
port at 0 {
reg = <0>;
replicator_out_port0: endpoint {
+ direction = <1>;
remote-endpoint = <&etb_in_port>;
+ coresight,hwid = <0>;
};
};
port at 1 {
reg = <1>;
replicator_out_port1: endpoint {
+ direction = <1>;
remote-endpoint = <&tpiu_in_port>;
+ coresight,hwid = <1>;
};
};
/* replicator input port */
port at 2 {
- reg = <0>;
+ reg = <2>;
replicator_in_port0: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&funnel_out_port0>;
+ coresight,hwid = <0>;
};
};
};
@@ -464,33 +471,38 @@
port at 0 {
reg = <0>;
funnel_out_port0: endpoint {
+ direction = <1>;
remote-endpoint =
<&replicator_in_port0>;
+ coresight,hwid = <0>;
};
};
/* funnel input ports */
port at 1 {
- reg = <0>;
+ reg = <1>;
funnel_in_port0: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&ptm0_out_port>;
+ coresight,hwid = <0>;
};
};
port at 2 {
- reg = <1>;
+ reg = <2>;
funnel_in_port1: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&ptm1_out_port>;
+ coresight,hwid = <1>;
};
};
port at 3 {
- reg = <2>;
+ reg = <3>;
funnel_in_port2: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&etm0_out_port>;
+ coresight,hwid = <2>;
};
};
@@ -499,16 +511,18 @@
port at 4 {
reg = <4>;
funnel_in_port4: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&etm1_out_port>;
+ coresight,hwid = <4>;
};
};
port at 5 {
reg = <5>;
funnel_in_port5: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&etm2_out_port>;
+ coresight,hwid = <5>;
};
};
};
@@ -523,7 +537,9 @@
clock-names = "apb_pclk";
port {
ptm0_out_port: endpoint {
+ direction = <1>;
remote-endpoint = <&funnel_in_port0>;
+ coresight,hwid = <0>;
};
};
};
@@ -537,7 +553,9 @@
clock-names = "apb_pclk";
port {
ptm1_out_port: endpoint {
+ direction = <1>;
remote-endpoint = <&funnel_in_port1>;
+ coresight,hwid = <0>;
};
};
};
@@ -551,7 +569,9 @@
clock-names = "apb_pclk";
port {
etm0_out_port: endpoint {
+ direction = <1>;
remote-endpoint = <&funnel_in_port2>;
+ coresight,hwid = <0>;
};
};
};
@@ -565,7 +585,9 @@
clock-names = "apb_pclk";
port {
etm1_out_port: endpoint {
+ direction = <1>;
remote-endpoint = <&funnel_in_port4>;
+ coresight,hwid = <0>;
};
};
};
@@ -579,7 +601,9 @@
clock-names = "apb_pclk";
port {
etm2_out_port: endpoint {
+ direction = <1>;
remote-endpoint = <&funnel_in_port5>;
+ coresight,hwid = <0>;
};
};
};
--
2.7.4
^ permalink raw reply related
* [PATCH 19/20] dts: ste-dbx5x0: Update coresight bindings for hardware port
From: Suzuki K Poulose @ 2018-06-05 21:43 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1528235011-30691-1-git-send-email-suzuki.poulose@arm.com>
Switch to the new coresight bindings
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
---
arch/arm/boot/dts/ste-dbx5x0.dtsi | 31 +++++++++++++++++++++++--------
1 file changed, 23 insertions(+), 8 deletions(-)
diff --git a/arch/arm/boot/dts/ste-dbx5x0.dtsi b/arch/arm/boot/dts/ste-dbx5x0.dtsi
index 2310a4e..a02312a 100644
--- a/arch/arm/boot/dts/ste-dbx5x0.dtsi
+++ b/arch/arm/boot/dts/ste-dbx5x0.dtsi
@@ -69,7 +69,9 @@
cpu = <&CPU0>;
port {
ptm0_out_port: endpoint {
+ direction = <1>;
remote-endpoint = <&funnel_in_port0>;
+ coresight,hwid = <0>;
};
};
};
@@ -83,7 +85,9 @@
cpu = <&CPU1>;
port {
ptm1_out_port: endpoint {
+ direction = <1>;
remote-endpoint = <&funnel_in_port1>;
+ coresight,hwid = <0>;
};
};
};
@@ -102,25 +106,29 @@
port at 0 {
reg = <0>;
funnel_out_port: endpoint {
+ direction = <1>;
remote-endpoint =
<&replicator_in_port0>;
+ coresight,hwid = <0>;
};
};
/* funnel input ports */
port at 1 {
- reg = <0>;
+ reg = <1>;
funnel_in_port0: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&ptm0_out_port>;
+ coresight,hwid = <0>;
};
};
port at 2 {
- reg = <1>;
+ reg = <2>;
funnel_in_port1: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&ptm1_out_port>;
+ coresight,hwid = <1>;
};
};
};
@@ -139,22 +147,27 @@
port at 0 {
reg = <0>;
replicator_out_port0: endpoint {
+ direction = <1>;
remote-endpoint = <&tpiu_in_port>;
+ coresight,hwid = <0>;
};
};
port at 1 {
reg = <1>;
replicator_out_port1: endpoint {
+ direction = <1>;
remote-endpoint = <&etb_in_port>;
+ coresight,hwid = <1>;
};
};
/* replicator input port */
port at 2 {
- reg = <0>;
+ reg = <2>;
replicator_in_port0: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&funnel_out_port>;
+ coresight,hwid = <0>;
};
};
};
@@ -168,8 +181,9 @@
clock-names = "apb_pclk", "atclk";
port {
tpiu_in_port: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&replicator_out_port0>;
+ coresight,hwid = <0>;
};
};
};
@@ -182,8 +196,9 @@
clock-names = "apb_pclk", "atclk";
port {
etb_in_port: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&replicator_out_port1>;
+ coresight,hwid = <0>;
};
};
};
--
2.7.4
^ permalink raw reply related
* [PATCH 18/20] dts: sama5d2: Update coresight bindings for hardware ports
From: Suzuki K Poulose @ 2018-06-05 21:43 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1528235011-30691-1-git-send-email-suzuki.poulose@arm.com>
Switch to the new coresight bindings for hardware ports
Cc: Nicolas Ferre <nicolas.ferre@microchip.com>
Cc: Alexandre Belloni <alexandre.belloni@bootlin.com>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
---
arch/arm/boot/dts/sama5d2.dtsi | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi
index 61f68e5..92ce7b8 100644
--- a/arch/arm/boot/dts/sama5d2.dtsi
+++ b/arch/arm/boot/dts/sama5d2.dtsi
@@ -86,8 +86,9 @@
port {
etb_in: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&etm_out>;
+ coresight,hwid = <0>;
};
};
};
@@ -101,7 +102,9 @@
port {
etm_out: endpoint {
+ direction = <1>;
remote-endpoint = <&etb_in>;
+ coresight,hwid = <0>;
};
};
};
--
2.7.4
^ permalink raw reply related
* [PATCH 17/20] dts: arm: qcom: Update coresight bindings for hardware ports
From: Suzuki K Poulose @ 2018-06-05 21:43 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1528235011-30691-1-git-send-email-suzuki.poulose@arm.com>
Switch to the new hardware port bindings for coresight
Cc: Andy Gross <andy.gross@linaro.org>
Cc: David Brown <david.brown@linaro.org>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
---
arch/arm/boot/dts/qcom-apq8064.dtsi | 37 +++++++++++++++++------
arch/arm/boot/dts/qcom-msm8974.dtsi | 60 +++++++++++++++++++++++++++----------
2 files changed, 73 insertions(+), 24 deletions(-)
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index 5341a39..d854220 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -1609,8 +1609,9 @@
port {
etb_in: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&replicator_out0>;
+ coresight,hwid = <0>;
};
};
};
@@ -1624,8 +1625,9 @@
port {
tpiu_in: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&replicator_out1>;
+ coresight,hwid = <0>;
};
};
};
@@ -1644,19 +1646,22 @@
reg = <0>;
replicator_out0: endpoint {
remote-endpoint = <&etb_in>;
+ coresight,hwid = <0>;
};
};
port at 1 {
reg = <1>;
replicator_out1: endpoint {
remote-endpoint = <&tpiu_in>;
+ coresight,hwid = <1>;
};
};
port at 2 {
- reg = <0>;
+ reg = <2>;
replicator_in: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&funnel_out>;
+ coresight,hwid = <0>;
};
};
};
@@ -1683,35 +1688,41 @@
port at 0 {
reg = <0>;
funnel_in0: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&etm0_out>;
+ coresight,hwid = <0>;
};
};
port at 1 {
reg = <1>;
funnel_in1: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&etm1_out>;
+ coresight,hwid = <1>;
};
};
port at 4 {
reg = <4>;
funnel_in4: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&etm2_out>;
+ coresight,hwid = <4>;
};
};
port at 5 {
reg = <5>;
funnel_in5: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&etm3_out>;
+ coresight,hwid = <5>;
};
};
port at 8 {
- reg = <0>;
+ reg = <8>;
funnel_out: endpoint {
+ direction = <1>;
remote-endpoint = <&replicator_in>;
+ coresight,hwid = <0>;
};
};
};
@@ -1728,7 +1739,9 @@
port {
etm0_out: endpoint {
+ direction = <1>;
remote-endpoint = <&funnel_in0>;
+ coresight,hwid = <0>;
};
};
};
@@ -1744,7 +1757,9 @@
port {
etm1_out: endpoint {
+ direction = <1>;
remote-endpoint = <&funnel_in1>;
+ coresight,hwid = <0>;
};
};
};
@@ -1760,7 +1775,9 @@
port {
etm2_out: endpoint {
+ direction = <1>;
remote-endpoint = <&funnel_in4>;
+ coresight,hwid = <0>;
};
};
};
@@ -1776,7 +1793,9 @@
port {
etm3_out: endpoint {
+ direction = <1>;
remote-endpoint = <&funnel_in5>;
+ coresight,hwid = <0>;
};
};
};
diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi
index d9019a4..89c7eb3 100644
--- a/arch/arm/boot/dts/qcom-msm8974.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8974.dtsi
@@ -772,8 +772,9 @@
port {
etr_in: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&replicator_out0>;
+ coresight,hwid = <0>;
};
};
};
@@ -787,8 +788,9 @@
port {
tpiu_in: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&replicator_out1>;
+ coresight,hwid = <0>;
};
};
};
@@ -807,20 +809,25 @@
port at 0 {
reg = <0>;
replicator_out0: endpoint {
+ direction = <1>;
remote-endpoint = <&etr_in>;
+ coresight,hwid = <0>;
};
};
port at 1 {
reg = <1>;
replicator_out1: endpoint {
+ direction = <1>;
remote-endpoint = <&tpiu_in>;
+ coresight,hwid = <1>;
};
};
port at 2 {
- reg = <0>;
+ reg = <2>;
replicator_in: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&etf_out>;
+ coresight,hwid = <0>;
};
};
};
@@ -840,14 +847,17 @@
port at 0 {
reg = <0>;
etf_out: endpoint {
+ direction = <1>;
remote-endpoint = <&replicator_in>;
+ coresight,hwid = <0>;
};
};
port at 1 {
- reg = <0>;
+ reg = <1>;
etf_in: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&merger_out>;
+ coresight,hwid = <0>;
};
};
};
@@ -873,14 +883,17 @@
port at 1 {
reg = <1>;
merger_in1: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&funnel1_out>;
+ coresight,hwid = <1>;
};
};
port at 8 {
- reg = <0>;
+ reg = <8>;
merger_out: endpoint {
+ direction = <1>;
remote-endpoint = <&etf_in>;
+ coresight,hwid = <0>;
};
};
};
@@ -910,14 +923,17 @@
port at 5 {
reg = <5>;
funnel1_in5: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&kpss_out>;
+ coresight,hwid = <5>;
};
};
port at 8 {
- reg = <0>;
+ reg = <8>;
funnel1_out: endpoint {
+ direction = <1>;
remote-endpoint = <&merger_in1>;
+ coresight,hwid = <0>;
};
};
};
@@ -937,35 +953,41 @@
port at 0 {
reg = <0>;
kpss_in0: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&etm0_out>;
+ coresight,hwid = <0>;
};
};
port at 1 {
reg = <1>;
kpss_in1: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&etm1_out>;
+ coresight,hwid = <1>;
};
};
port at 2 {
reg = <2>;
kpss_in2: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&etm2_out>;
+ coresight,hwid = <2>;
};
};
port at 3 {
reg = <3>;
kpss_in3: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&etm3_out>;
+ coresight,hwid = <3>;
};
};
port at 8 {
- reg = <0>;
+ reg = <8>;
kpss_out: endpoint {
+ direction = <1>;
remote-endpoint = <&funnel1_in5>;
+ coresight,hwid = <0>;
};
};
};
@@ -982,7 +1004,9 @@
port {
etm0_out: endpoint {
+ direction = <1>;
remote-endpoint = <&kpss_in0>;
+ coresight,hwid = <0>;
};
};
};
@@ -998,7 +1022,9 @@
port {
etm1_out: endpoint {
+ direction = <1>;
remote-endpoint = <&kpss_in1>;
+ coresight,hwid = <0>;
};
};
};
@@ -1014,7 +1040,9 @@
port {
etm2_out: endpoint {
+ direction = <1>;
remote-endpoint = <&kpss_in2>;
+ coresight,hwid = <0>;
};
};
};
@@ -1030,7 +1058,9 @@
port {
etm3_out: endpoint {
+ direction = <1>;
remote-endpoint = <&kpss_in3>;
+ coresight,hwid = <0>;
};
};
};
--
2.7.4
^ permalink raw reply related
* [PATCH 16/20] dts: arm: omap: Update coresight bindings for hardware ports
From: Suzuki K Poulose @ 2018-06-05 21:43 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1528235011-30691-1-git-send-email-suzuki.poulose@arm.com>
Switch to the new coresight bindings for hardware ports
Cc: linux-omap at vger.kernel.org
Cc: "Beno?t Cousson" <bcousson@baylibre.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
---
arch/arm/boot/dts/omap3-beagle-xm.dts | 5 ++++-
arch/arm/boot/dts/omap3-beagle.dts | 5 ++++-
2 files changed, 8 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/omap3-beagle-xm.dts b/arch/arm/boot/dts/omap3-beagle-xm.dts
index 0349fcc..b5f40069 100644
--- a/arch/arm/boot/dts/omap3-beagle-xm.dts
+++ b/arch/arm/boot/dts/omap3-beagle-xm.dts
@@ -155,8 +155,9 @@
clock-names = "apb_pclk";
port {
etb_in: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&etm_out>;
+ coresight,hwid = <0>;
};
};
};
@@ -169,7 +170,9 @@
clock-names = "apb_pclk";
port {
etm_out: endpoint {
+ direction = <1>;
remote-endpoint = <&etb_in>;
+ coresight,hwid = <0>;
};
};
};
diff --git a/arch/arm/boot/dts/omap3-beagle.dts b/arch/arm/boot/dts/omap3-beagle.dts
index 3ca8991..b32e35b 100644
--- a/arch/arm/boot/dts/omap3-beagle.dts
+++ b/arch/arm/boot/dts/omap3-beagle.dts
@@ -149,8 +149,9 @@
clock-names = "apb_pclk";
port {
etb_in: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&etm_out>;
+ coresight,hwid = <0>;
};
};
};
@@ -163,7 +164,9 @@
clock-names = "apb_pclk";
port {
etm_out: endpoint {
+ direction = <1>;
remote-endpoint = <&etb_in>;
+ coresight,hwid = <0>;
};
};
};
--
2.7.4
^ permalink raw reply related
* [PATCH 15/20] dts: arm: imx7{d, s}: Update coresight binding for hardware ports
From: Suzuki K Poulose @ 2018-06-05 21:43 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1528235011-30691-1-git-send-email-suzuki.poulose@arm.com>
Switch to the updated coresight bindings.
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
---
arch/arm/boot/dts/imx7d.dtsi | 5 ++++-
arch/arm/boot/dts/imx7s.dtsi | 41 ++++++++++++++++++++++++++++++-----------
2 files changed, 34 insertions(+), 12 deletions(-)
diff --git a/arch/arm/boot/dts/imx7d.dtsi b/arch/arm/boot/dts/imx7d.dtsi
index 200714e..5faff17 100644
--- a/arch/arm/boot/dts/imx7d.dtsi
+++ b/arch/arm/boot/dts/imx7d.dtsi
@@ -87,7 +87,9 @@
port {
etm1_out_port: endpoint {
+ direction = <1>;
remote-endpoint = <&ca_funnel_in_port1>;
+ coresight,hwid = <0>;
};
};
};
@@ -174,8 +176,9 @@
port at 1 {
reg = <1>;
ca_funnel_in_port1: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&etm1_out_port>;
+ coresight,hwid = <1>;
};
};
};
diff --git a/arch/arm/boot/dts/imx7s.dtsi b/arch/arm/boot/dts/imx7s.dtsi
index 4d42335..8e90915 100644
--- a/arch/arm/boot/dts/imx7s.dtsi
+++ b/arch/arm/boot/dts/imx7s.dtsi
@@ -151,23 +151,28 @@
port at 0 {
reg = <0>;
replicator_out_port0: endpoint {
+ direction = <1>;
remote-endpoint = <&tpiu_in_port>;
+ coresight,hwid = <0>;
};
};
port at 1 {
reg = <1>;
replicator_out_port1: endpoint {
+ direction = <1>;
remote-endpoint = <&etr_in_port>;
+ coresight,hwid = <1>;
};
};
/* replicator input port */
port at 2 {
- reg = <0>;
+ reg = <2>;
replicator_in_port0: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&etf_out_port>;
+ coresight,hwid = <0>;
};
};
};
@@ -203,16 +208,19 @@
port at 0 {
reg = <0>;
ca_funnel_in_port0: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&etm0_out_port>;
+ coresight,hwid = <0>;
};
};
/* funnel output port */
port at 2 {
- reg = <0>;
+ reg = <2>;
ca_funnel_out_port0: endpoint {
+ direction = <1>;
remote-endpoint = <&hugo_funnel_in_port0>;
+ coresight,hwid = <0>;
};
};
@@ -229,7 +237,9 @@
port {
etm0_out_port: endpoint {
+ direction = <1>;
remote-endpoint = <&ca_funnel_in_port0>;
+ coresight,hwid = <0>;
};
};
};
@@ -248,22 +258,26 @@
port at 0 {
reg = <0>;
hugo_funnel_in_port0: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&ca_funnel_out_port0>;
+ coresight,hwid = <0>;
};
};
port at 1 {
reg = <1>;
hugo_funnel_in_port1: endpoint {
- slave-mode; /* M4 input */
+ direction = <0>; /* M4 input */
+ coresight,hwid = <1>;
};
};
port at 2 {
- reg = <0>;
+ reg = <2>;
hugo_funnel_out_port0: endpoint {
+ direction = <1>;
remote-endpoint = <&etf_in_port>;
+ coresight,hwid = <0>;
};
};
@@ -284,15 +298,18 @@
port at 0 {
reg = <0>;
etf_in_port: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&hugo_funnel_out_port0>;
+ coresight,hwid = <0>;
};
};
port at 1 {
- reg = <0>;
+ reg = <1>;
etf_out_port: endpoint {
+ direction = <1>;
remote-endpoint = <&replicator_in_port0>;
+ coresight,hwid = <0>;
};
};
};
@@ -306,8 +323,9 @@
port {
etr_in_port: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&replicator_out_port1>;
+ coresight,hwid = <0>;
};
};
};
@@ -320,8 +338,9 @@
port {
tpiu_in_port: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&replicator_out_port1>;
+ coresight,hwid = <0>;
};
};
};
--
2.7.4
^ permalink raw reply related
* [PATCH 14/20] dts: arm: hisilicon: Update coresight bindings for hardware port
From: Suzuki K Poulose @ 2018-06-05 21:43 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1528235011-30691-1-git-send-email-suzuki.poulose@arm.com>
Switch to the new the hardware port bindings.
Cc: Wei Xu <xuwei5@hisilicon.com>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
---
arch/arm/boot/dts/hip04.dtsi | 195 +++++++++++++++++++++++++++++++------------
1 file changed, 141 insertions(+), 54 deletions(-)
diff --git a/arch/arm/boot/dts/hip04.dtsi b/arch/arm/boot/dts/hip04.dtsi
index 44044f2..dfd82be 100644
--- a/arch/arm/boot/dts/hip04.dtsi
+++ b/arch/arm/boot/dts/hip04.dtsi
@@ -279,8 +279,9 @@
clock-names = "apb_pclk";
port {
etb0_in_port: endpoint at 0 {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&replicator0_out_port0>;
+ coresight,hwid = <0>;
};
};
};
@@ -293,8 +294,9 @@
clock-names = "apb_pclk";
port {
etb1_in_port: endpoint at 0 {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&replicator1_out_port0>;
+ coresight,hwid = <0>;
};
};
};
@@ -307,8 +309,9 @@
clock-names = "apb_pclk";
port {
etb2_in_port: endpoint at 0 {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&replicator2_out_port0>;
+ coresight,hwid = <0>;
};
};
};
@@ -321,8 +324,9 @@
clock-names = "apb_pclk";
port {
etb3_in_port: endpoint at 0 {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&replicator3_out_port0>;
+ coresight,hwid = <0>;
};
};
};
@@ -335,8 +339,9 @@
clock-names = "apb_pclk";
port {
tpiu_in_port: endpoint at 0 {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&funnel4_out_port0>;
+ coresight,hwid = <0>;
};
};
};
@@ -356,6 +361,8 @@
reg = <0>;
replicator0_out_port0: endpoint {
remote-endpoint = <&etb0_in_port>;
+ coresight,hwid = <0>;
+ direction = <1>;
};
};
@@ -363,15 +370,18 @@
reg = <1>;
replicator0_out_port1: endpoint {
remote-endpoint = <&funnel4_in_port0>;
+ coresight,hwid = <1>;
+ direction = <1>;
};
};
/* replicator input port */
port at 2 {
- reg = <0>;
+ reg = <2>;
replicator0_in_port0: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&funnel0_out_port0>;
+ coresight,hwid = <0>;
};
};
};
@@ -392,6 +402,8 @@
reg = <0>;
replicator1_out_port0: endpoint {
remote-endpoint = <&etb1_in_port>;
+ coresight,hwid = <0>;
+ direction = <1>;
};
};
@@ -399,15 +411,18 @@
reg = <1>;
replicator1_out_port1: endpoint {
remote-endpoint = <&funnel4_in_port1>;
+ coresight,hwid = <1>;
+ direction = <1>;
};
};
/* replicator input port */
port at 2 {
- reg = <0>;
+ reg = <2>;
replicator1_in_port0: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&funnel1_out_port0>;
+ coresight,hwid = <0>;
};
};
};
@@ -428,22 +443,27 @@
reg = <0>;
replicator2_out_port0: endpoint {
remote-endpoint = <&etb2_in_port>;
+ coresight,hwid = <0>;
+ direction = <1>;
};
};
port at 1 {
reg = <1>;
- replicator2_out_port1: endpoint {
+ replicator2_out_port1: endpoint {
remote-endpoint = <&funnel4_in_port2>;
+ coresight,hwid = <1>;
+ direction = <1>;
};
};
/* replicator input port */
port at 2 {
- reg = <0>;
+ reg = <2>;
replicator2_in_port0: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&funnel2_out_port0>;
+ coresight,hwid = <0>;
};
};
};
@@ -464,6 +484,8 @@
reg = <0>;
replicator3_out_port0: endpoint {
remote-endpoint = <&etb3_in_port>;
+ coresight,hwid = <0>;
+ direction = <1>;
};
};
@@ -471,15 +493,18 @@
reg = <1>;
replicator3_out_port1: endpoint {
remote-endpoint = <&funnel4_in_port3>;
+ coresight,hwid = <1>;
+ direction = <1>;
};
};
/* replicator input port */
port at 2 {
- reg = <0>;
+ reg = <2>;
replicator3_in_port0: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&funnel3_out_port0>;
+ coresight,hwid = <0>;
};
};
};
@@ -501,39 +526,45 @@
funnel0_out_port0: endpoint {
remote-endpoint =
<&replicator0_in_port0>;
+ coresight,hwid = <0>;
+ direction = <1>;
};
};
/* funnel input ports */
port at 1 {
- reg = <0>;
+ reg = <1>;
funnel0_in_port0: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&ptm0_out_port>;
+ coresight,hwid = <0>;
};
};
port at 2 {
- reg = <1>;
+ reg = <2>;
funnel0_in_port1: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&ptm1_out_port>;
+ coresight,hwid = <1>;
};
};
port at 3 {
- reg = <2>;
+ reg = <3>;
funnel0_in_port2: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&ptm2_out_port>;
+ coresight,hwid = <2>;
};
};
port at 4 {
- reg = <3>;
+ reg = <4>;
funnel0_in_port3: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&ptm3_out_port>;
+ coresight,hwid = <3>;
};
};
};
@@ -553,41 +584,47 @@
port at 0 {
reg = <0>;
funnel1_out_port0: endpoint {
+ direction = <1>;
remote-endpoint =
<&replicator1_in_port0>;
+ coresight,hwid = <0>;
};
};
/* funnel input ports */
port at 1 {
- reg = <0>;
+ reg = <1>;
funnel1_in_port0: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&ptm4_out_port>;
+ coresight,hwid = <0>;
};
};
port at 2 {
- reg = <1>;
+ reg = <2>;
funnel1_in_port1: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&ptm5_out_port>;
+ coresight,hwid = <1>;
};
};
port at 3 {
- reg = <2>;
+ reg = <3>;
funnel1_in_port2: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&ptm6_out_port>;
+ coresight,hwid = <2>;
};
};
port at 4 {
- reg = <3>;
+ reg = <4>;
funnel1_in_port3: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&ptm7_out_port>;
+ coresight,hwid = <3>;
};
};
};
@@ -607,41 +644,47 @@
port at 0 {
reg = <0>;
funnel2_out_port0: endpoint {
+ direction = <1>;
remote-endpoint =
<&replicator2_in_port0>;
+ coresight,hwid = <0>;
};
};
/* funnel input ports */
port at 1 {
- reg = <0>;
+ reg = <1>;
funnel2_in_port0: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&ptm8_out_port>;
+ coresight,hwid = <0>;
};
};
port at 2 {
- reg = <1>;
+ reg = <2>;
funnel2_in_port1: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&ptm9_out_port>;
+ coresight,hwid = <1>;
};
};
port at 3 {
- reg = <2>;
+ reg = <3>;
funnel2_in_port2: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&ptm10_out_port>;
+ coresight,hwid = <2>;
};
};
port at 4 {
- reg = <3>;
+ reg = <4>;
funnel2_in_port3: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&ptm11_out_port>;
+ coresight,hwid = <3>;
};
};
};
@@ -661,41 +704,47 @@
port at 0 {
reg = <0>;
funnel3_out_port0: endpoint {
+ direction = <1>;
remote-endpoint =
<&replicator3_in_port0>;
+ coresight,hwid = <0>;
};
};
/* funnel input ports */
port at 1 {
- reg = <0>;
+ reg = <1>;
funnel3_in_port0: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&ptm12_out_port>;
+ coresight,hwid = <0>;
};
};
port at 2 {
- reg = <1>;
+ reg = <2>;
funnel3_in_port1: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&ptm13_out_port>;
+ coresight,hwid = <1>;
};
};
port at 3 {
- reg = <2>;
+ reg = <3>;
funnel3_in_port2: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&ptm14_out_port>;
+ coresight,hwid = <2>;
};
};
port at 4 {
- reg = <3>;
+ reg = <4>;
funnel3_in_port3: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&ptm15_out_port>;
+ coresight,hwid = <3>;
};
};
};
@@ -715,44 +764,50 @@
port at 0 {
reg = <0>;
funnel4_out_port0: endpoint {
+ direction = <1>;
remote-endpoint = <&tpiu_in_port>;
+ coresight,hwid = <0>;
};
};
/* funnel input ports */
port at 1 {
- reg = <0>;
+ reg = <1>;
funnel4_in_port0: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint =
<&replicator0_out_port1>;
+ coresight,hwid = <0>;
};
};
port at 2 {
- reg = <1>;
+ reg = <2>;
funnel4_in_port1: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint =
<&replicator1_out_port1>;
+ coresight,hwid = <1>;
};
};
port at 3 {
- reg = <2>;
+ reg = <3>;
funnel4_in_port2: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint =
<&replicator2_out_port1>;
+ coresight,hwid = <2>;
};
};
port at 4 {
- reg = <3>;
+ reg = <4>;
funnel4_in_port3: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint =
<&replicator3_out_port1>;
+ coresight,hwid = <3>;
};
};
};
@@ -767,7 +822,9 @@
cpu = <&CPU0>;
port {
ptm0_out_port: endpoint {
+ direction = <1>;
remote-endpoint = <&funnel0_in_port0>;
+ coresight,hwid = <0>;
};
};
};
@@ -781,7 +838,9 @@
cpu = <&CPU1>;
port {
ptm1_out_port: endpoint {
+ direction = <1>;
remote-endpoint = <&funnel0_in_port1>;
+ coresight,hwid = <0>;
};
};
};
@@ -795,7 +854,9 @@
cpu = <&CPU2>;
port {
ptm2_out_port: endpoint {
+ direction = <1>;
remote-endpoint = <&funnel0_in_port2>;
+ coresight,hwid = <0>;
};
};
};
@@ -809,7 +870,9 @@
cpu = <&CPU3>;
port {
ptm3_out_port: endpoint {
+ direction = <1>;
remote-endpoint = <&funnel0_in_port3>;
+ coresight,hwid = <0>;
};
};
};
@@ -823,7 +886,9 @@
cpu = <&CPU4>;
port {
ptm4_out_port: endpoint {
+ direction = <1>;
remote-endpoint = <&funnel1_in_port0>;
+ coresight,hwid = <0>;
};
};
};
@@ -837,7 +902,9 @@
cpu = <&CPU5>;
port {
ptm5_out_port: endpoint {
+ direction = <1>;
remote-endpoint = <&funnel1_in_port1>;
+ coresight,hwid = <0>;
};
};
};
@@ -851,7 +918,9 @@
cpu = <&CPU6>;
port {
ptm6_out_port: endpoint {
+ direction = <1>;
remote-endpoint = <&funnel1_in_port2>;
+ coresight,hwid = <0>;
};
};
};
@@ -865,7 +934,9 @@
cpu = <&CPU7>;
port {
ptm7_out_port: endpoint {
+ direction = <1>;
remote-endpoint = <&funnel1_in_port3>;
+ coresight,hwid = <0>;
};
};
};
@@ -879,7 +950,9 @@
cpu = <&CPU8>;
port {
ptm8_out_port: endpoint {
+ direction = <1>;
remote-endpoint = <&funnel2_in_port0>;
+ coresight,hwid = <0>;
};
};
};
@@ -892,7 +965,9 @@
cpu = <&CPU9>;
port {
ptm9_out_port: endpoint {
+ direction = <1>;
remote-endpoint = <&funnel2_in_port1>;
+ coresight,hwid = <0>;
};
};
};
@@ -906,7 +981,9 @@
cpu = <&CPU10>;
port {
ptm10_out_port: endpoint {
+ direction = <1>;
remote-endpoint = <&funnel2_in_port2>;
+ coresight,hwid = <0>;
};
};
};
@@ -920,7 +997,9 @@
cpu = <&CPU11>;
port {
ptm11_out_port: endpoint {
+ direction = <1>;
remote-endpoint = <&funnel2_in_port3>;
+ coresight,hwid = <0>;
};
};
};
@@ -934,7 +1013,9 @@
cpu = <&CPU12>;
port {
ptm12_out_port: endpoint {
+ direction = <1>;
remote-endpoint = <&funnel3_in_port0>;
+ coresight,hwid = <0>;
};
};
};
@@ -948,7 +1029,9 @@
cpu = <&CPU13>;
port {
ptm13_out_port: endpoint {
+ direction = <1>;
remote-endpoint = <&funnel3_in_port1>;
+ coresight,hwid = <0>;
};
};
};
@@ -962,7 +1045,9 @@
cpu = <&CPU14>;
port {
ptm14_out_port: endpoint {
+ direction = <1>;
remote-endpoint = <&funnel3_in_port2>;
+ coresight,hwid = <0>;
};
};
};
@@ -976,7 +1061,9 @@
cpu = <&CPU15>;
port {
ptm15_out_port: endpoint {
+ direction = <1>;
remote-endpoint = <&funnel3_in_port3>;
+ coresight,hwid = <0>;
};
};
};
--
2.7.4
^ permalink raw reply related
* [PATCH 13/20] dts: qcom: Update coresight bindings for hw ports
From: Suzuki K Poulose @ 2018-06-05 21:43 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1528235011-30691-1-git-send-email-suzuki.poulose@arm.com>
Switch to updated coresight bindings for hw ports
Cc: Andy Gross <andy.gross@linaro.org>
Cc: David Brown <david.brown@linaro.org>
Cc: Ivan T. Ivanov <ivan.ivanov@linaro.org>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
---
arch/arm64/boot/dts/qcom/msm8916.dtsi | 55 ++++++++++++++++++++++++++---------
1 file changed, 41 insertions(+), 14 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
index 66b318e..40da823 100644
--- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
@@ -1101,8 +1101,9 @@
port {
tpiu_in: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&replicator_out1>;
+ coresight,hwid = <0>;
};
};
};
@@ -1132,14 +1133,17 @@
port at 4 {
reg = <4>;
funnel0_in4: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&funnel1_out>;
+ coresight,hwid = <4>;
};
};
port at 8 {
- reg = <0>;
+ reg = <8>;
funnel0_out: endpoint {
+ direction = <1>;
remote-endpoint = <&etf_in>;
+ coresight,hwid = <0>;
};
};
};
@@ -1159,20 +1163,25 @@
port at 0 {
reg = <0>;
replicator_out0: endpoint {
+ direction = <1>;
remote-endpoint = <&etr_in>;
+ coresight,hwid = <0>;
};
};
port at 1 {
reg = <1>;
replicator_out1: endpoint {
+ direction = <1>;
remote-endpoint = <&tpiu_in>;
+ coresight,hwid = <1>;
};
};
port at 2 {
- reg = <0>;
+ reg = <2>;
replicator_in: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&etf_out>;
+ coresight,hwid = <0>;
};
};
};
@@ -1192,14 +1201,17 @@
port at 0 {
reg = <0>;
etf_out: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&funnel0_out>;
+ coresight,hwid = <0>;
};
};
port at 1 {
- reg = <0>;
+ reg = <1>;
etf_in: endpoint {
+ direction = <1>;
remote-endpoint = <&replicator_in>;
+ coresight,hwid = <0>;
};
};
};
@@ -1214,8 +1226,9 @@
port {
etr_in: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&replicator_out0>;
+ coresight,hwid = <0>;
};
};
};
@@ -1234,35 +1247,41 @@
port at 0 {
reg = <0>;
funnel1_in0: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&etm0_out>;
+ coresight,hwid = <0>;
};
};
port at 1 {
reg = <1>;
funnel1_in1: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&etm1_out>;
+ coresight,hwid = <1>;
};
};
port at 2 {
reg = <2>;
funnel1_in2: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&etm2_out>;
+ coresight,hwid = <2>;
};
};
port at 3 {
reg = <3>;
funnel1_in3: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&etm3_out>;
+ coresight,hwid = <3>;
};
};
port at 4 {
- reg = <0>;
+ reg = <4>;
funnel1_out: endpoint {
+ direction = <1>;
remote-endpoint = <&funnel0_in4>;
+ coresight,hwid = <0>;
};
};
};
@@ -1311,7 +1330,9 @@
port {
etm0_out: endpoint {
- remote-endpoint = <&funnel1_in0>;
+ direction = <1>;
+ remote-endpoint = <&funnel1_in0>;
+ coresight,hwid = <0>;
};
};
};
@@ -1327,7 +1348,9 @@
port {
etm1_out: endpoint {
+ direction = <1>;
remote-endpoint = <&funnel1_in1>;
+ coresight,hwid = <0>;
};
};
};
@@ -1343,7 +1366,9 @@
port {
etm2_out: endpoint {
+ direction = <1>;
remote-endpoint = <&funnel1_in2>;
+ coresight,hwid = <0>;
};
};
};
@@ -1359,7 +1384,9 @@
port {
etm3_out: endpoint {
+ direction = <1>;
remote-endpoint = <&funnel1_in3>;
+ coresight,hwid = <0>;
};
};
};
--
2.7.4
^ permalink raw reply related
* [PATCH 12/20] dts: spreadtrum: Update coresight bindings for hw ports
From: Suzuki K Poulose @ 2018-06-05 21:43 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1528235011-30691-1-git-send-email-suzuki.poulose@arm.com>
Switch to the new coresight bindings for hw ports
Cc: orsonzhai at gmail.com
Cc: zhang.lyra at gmail.com
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
---
arch/arm64/boot/dts/sprd/sc9836.dtsi | 40 ++++++++++----
arch/arm64/boot/dts/sprd/sc9860.dtsi | 101 +++++++++++++++++++++++++----------
2 files changed, 102 insertions(+), 39 deletions(-)
diff --git a/arch/arm64/boot/dts/sprd/sc9836.dtsi b/arch/arm64/boot/dts/sprd/sc9836.dtsi
index 63894c4..27ccc29 100644
--- a/arch/arm64/boot/dts/sprd/sc9836.dtsi
+++ b/arch/arm64/boot/dts/sprd/sc9836.dtsi
@@ -52,8 +52,9 @@
clock-names = "apb_pclk";
port {
etf_in: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&funnel_out_port0>;
+ coresight,hwid = <0>;
};
};
};
@@ -71,48 +72,55 @@
port at 0 {
reg = <0>;
funnel_out_port0: endpoint {
+ direction = <1>;
remote-endpoint = <&etf_in>;
+ coresight,hwid = <0>;
};
};
/* funnel input port 0-4 */
port at 1 {
- reg = <0>;
+ reg = <1>;
funnel_in_port0: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&etm0_out>;
+ coresight,hwid = <0>;
};
};
port at 2 {
- reg = <1>;
+ reg = <2>;
funnel_in_port1: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&etm1_out>;
+ coresight,hwid = <1>;
};
};
port at 3 {
- reg = <2>;
+ reg = <3>;
funnel_in_port2: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&etm2_out>;
+ coresight,hwid = <2>;
};
};
port at 4 {
- reg = <3>;
+ reg = <4>;
funnel_in_port3: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&etm3_out>;
+ coresight,hwid = <3>;
};
};
port at 5 {
- reg = <4>;
+ reg = <5>;
funnel_in_port4: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&stm_out>;
+ coresight,hwid = <4>;
};
};
/* Other input ports aren't connected to anyone */
@@ -128,7 +136,9 @@
clock-names = "apb_pclk";
port {
etm0_out: endpoint {
+ direction = <1>;
remote-endpoint = <&funnel_in_port0>;
+ coresight,hwid = <0>;
};
};
};
@@ -142,7 +152,9 @@
clock-names = "apb_pclk";
port {
etm1_out: endpoint {
+ direction = <1>;
remote-endpoint = <&funnel_in_port1>;
+ coresight,hwid = <0>;
};
};
};
@@ -156,7 +168,9 @@
clock-names = "apb_pclk";
port {
etm2_out: endpoint {
+ direction = <1>;
remote-endpoint = <&funnel_in_port2>;
+ coresight,hwid = <0>;
};
};
};
@@ -170,7 +184,9 @@
clock-names = "apb_pclk";
port {
etm3_out: endpoint {
+ direction = <1>;
remote-endpoint = <&funnel_in_port3>;
+ coresight,hwid = <0>;
};
};
};
@@ -184,7 +200,9 @@
clock-names = "apb_pclk";
port {
stm_out: endpoint {
+ direction = <1>;
remote-endpoint = <&funnel_in_port4>;
+ coresight,hwid = <0>;
};
};
};
diff --git a/arch/arm64/boot/dts/sprd/sc9860.dtsi b/arch/arm64/boot/dts/sprd/sc9860.dtsi
index 5dbfb79..1615014 100644
--- a/arch/arm64/boot/dts/sprd/sc9860.dtsi
+++ b/arch/arm64/boot/dts/sprd/sc9860.dtsi
@@ -309,25 +309,29 @@
port at 0 {
reg = <0>;
soc_funnel_out_port: endpoint {
+ direction = <1>;
remote-endpoint = <&etb_in>;
+ coresight,hwid = <0>;
};
};
port at 1 {
- reg = <0>;
+ reg = <1>;
soc_funnel_in_port0: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint =
<&main_funnel_out_port>;
+ coresight,hwid = <0>;
};
};
port at 2 {
- reg = <4>;
+ reg = <2>;
soc_funnel_in_port1: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpioint =
<&stm_out_port>;
+ coresight,hwid = <4>;
};
};
};
@@ -340,9 +344,10 @@
clock-names = "apb_pclk";
port {
etb_in: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint =
<&soc_funnel_out_port>;
+ coresight,hwid = <0>;
};
};
};
@@ -356,8 +361,10 @@
clock-names = "apb_pclk";
port {
stm_out_port: endpoint {
+ direction = <1>;
remote-endpoint =
<&soc_funnel_in_port1>;
+ coresight,hwid = <0>;
};
};
};
@@ -374,40 +381,46 @@
port at 0 {
reg = <0>;
cluster0_funnel_out_port: endpoint {
+ direction = <1>;
remote-endpoint =
<&cluster0_etf_in>;
+ coresight,hwid = <0>;
};
};
port at 1 {
- reg = <0>;
+ reg = <1>;
cluster0_funnel_in_port0: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&etm0_out>;
+ coresight,hwid = <0>;
};
};
port at 2 {
- reg = <1>;
+ reg = <2>;
cluster0_funnel_in_port1: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&etm1_out>;
+ coresight,hwid = <1>;
};
};
port at 3 {
- reg = <2>;
+ reg = <3>;
cluster0_funnel_in_port2: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&etm2_out>;
+ coresight,hwid = <2>;
};
};
port at 4 {
reg = <4>;
cluster0_funnel_in_port3: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&etm3_out>;
+ coresight,hwid = <4>;
};
};
};
@@ -425,40 +438,46 @@
port at 0 {
reg = <0>;
cluster1_funnel_out_port: endpoint {
+ direction = <1>;
remote-endpoint =
<&cluster1_etf_in>;
+ coresight,hwid = <0>;
};
};
port at 1 {
- reg = <0>;
+ reg = <1>;
cluster1_funnel_in_port0: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&etm4_out>;
+ coresight,hwid = <0>;
};
};
port at 2 {
- reg = <1>;
+ reg = <2>;
cluster1_funnel_in_port1: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&etm5_out>;
+ coresight,hwid = <1>;
};
};
port at 3 {
- reg = <2>;
+ reg = <3>;
cluster1_funnel_in_port2: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&etm6_out>;
+ coresight,hwid = <2>;
};
};
port at 4 {
- reg = <3>;
+ reg = <4>;
cluster1_funnel_in_port3: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&etm7_out>;
+ coresight,hwid = <3>;
};
};
};
@@ -477,17 +496,20 @@
port at 0 {
reg = <0>;
cluster0_etf_out: endpoint {
+ direction = <1>;
remote-endpoint =
<&main_funnel_in_port0>;
+ coresight,hwid = <0>;
};
};
port at 1 {
- reg = <0>;
+ reg = <1>;
cluster0_etf_in: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint =
<&cluster0_funnel_out_port>;
+ coresight,hwid = <0>;
};
};
};
@@ -506,17 +528,20 @@
port at 0 {
reg = <0>;
cluster1_etf_out: endpoint {
+ direction = <1>;
remote-endpoint =
<&main_funnel_in_port1>;
+ coresight,hwid = <0>;
};
};
port at 1 {
- reg = <0>;
+ reg = <1>;
cluster1_etf_in: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint =
<&cluster1_funnel_out_port>;
+ coresight,hwid = <0>;
};
};
};
@@ -535,26 +560,30 @@
port at 0 {
reg = <0>;
main_funnel_out_port: endpoint {
+ direction = <1>;
remote-endpoint =
<&soc_funnel_in_port0>;
+ coresight,hwid = <0>;
};
};
port at 1 {
- reg = <0>;
+ reg = <1>;
main_funnel_in_port0: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint =
<&cluster0_etf_out>;
+ coresight,hwid = <0>;
};
};
port at 2 {
- reg = <1>;
+ reg = <2>;
main_funnel_in_port1: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint =
<&cluster1_etf_out>;
+ coresight,hwid = <1>;
};
};
};
@@ -569,8 +598,10 @@
port {
etm0_out: endpoint {
+ direction = <1>;
remote-endpoint =
<&cluster0_funnel_in_port0>;
+ coresight,hwid = <0>;
};
};
};
@@ -584,8 +615,10 @@
port {
etm1_out: endpoint {
+ direction = <1>;
remote-endpoint =
<&cluster0_funnel_in_port1>;
+ coresight,hwid = <0>;
};
};
};
@@ -599,8 +632,10 @@
port {
etm2_out: endpoint {
+ direction = <1>;
remote-endpoint =
<&cluster0_funnel_in_port2>;
+ coresight,hwid = <0>;
};
};
};
@@ -614,8 +649,10 @@
port {
etm3_out: endpoint {
+ direction = <1>;
remote-endpoint =
<&cluster0_funnel_in_port3>;
+ coresight,hwid = <0>;
};
};
};
@@ -629,8 +666,10 @@
port {
etm4_out: endpoint {
+ direction = <1>;
remote-endpoint =
<&cluster1_funnel_in_port0>;
+ coresight,hwid = <0>;
};
};
};
@@ -644,8 +683,10 @@
port {
etm5_out: endpoint {
+ direction = <1>;
remote-endpoint =
<&cluster1_funnel_in_port1>;
+ coresight,hwid = <0>;
};
};
};
@@ -659,8 +700,10 @@
port {
etm6_out: endpoint {
+ direction = <1>;
remote-endpoint =
<&cluster1_funnel_in_port2>;
+ coresight,hwid = <0>;
};
};
};
@@ -674,8 +717,10 @@
port {
etm7_out: endpoint {
+ direction = <1>;
remote-endpoint =
<&cluster1_funnel_in_port3>;
+ coresight,hwid = <0>;
};
};
};
--
2.7.4
^ permalink raw reply related
* [PATCH 11/20] dts: hisilicon: Update coresight bindings for hw ports
From: Suzuki K Poulose @ 2018-06-05 21:43 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1528235011-30691-1-git-send-email-suzuki.poulose@arm.com>
Switch to updated coresight bindings for hw ports.
Cc: xuwei5 at hisilicon.com
Cc: lipengcheng8 at huawei.com
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
---
.../arm64/boot/dts/hisilicon/hi6220-coresight.dtsi | 89 ++++++++++++++++------
1 file changed, 64 insertions(+), 25 deletions(-)
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220-coresight.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220-coresight.dtsi
index 7afee5d..a394a65 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220-coresight.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi6220-coresight.dtsi
@@ -27,17 +27,20 @@
port at 0 {
reg = <0>;
soc_funnel_out: endpoint {
+ direction = <1>;
remote-endpoint =
<&etf_in>;
+ coresight,hwid = <0>;
};
};
port at 1 {
- reg = <0>;
+ reg = <1>;
soc_funnel_in: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint =
<&acpu_funnel_out>;
+ coresight,hwid = <0>;
};
};
};
@@ -56,17 +59,20 @@
port at 0 {
reg = <0>;
etf_in: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint =
<&soc_funnel_out>;
+ coresight,hwid = <0>;
};
};
port at 1 {
- reg = <0>;
+ reg = <1>;
etf_out: endpoint {
+ direction = <1>;
remote-endpoint =
<&replicator_in>;
+ coresight,hwid = <0>;
};
};
};
@@ -84,25 +90,30 @@
port at 0 {
reg = <0>;
replicator_in: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint =
<&etf_out>;
+ coresight,hwid = <0>;
};
};
port at 1 {
- reg = <0>;
+ reg = <1>;
replicator_out0: endpoint {
+ direction = <1>;
remote-endpoint =
<&etr_in>;
+ coresight,hwid = <0>;
};
};
port at 2 {
- reg = <1>;
+ reg = <2>;
replicator_out1: endpoint {
+ direction = <1>;
remote-endpoint =
<&tpiu_in>;
+ coresight,hwid = <1>;
};
};
};
@@ -121,9 +132,10 @@
port at 0 {
reg = <0>;
etr_in: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint =
<&replicator_out0>;
+ coresight,hwid = <0>;
};
};
};
@@ -142,9 +154,10 @@
port at 0 {
reg = <0>;
tpiu_in: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint =
<&replicator_out1>;
+ coresight,hwid = <0>;
};
};
};
@@ -163,80 +176,90 @@
port at 0 {
reg = <0>;
acpu_funnel_out: endpoint {
+ direction = <1>;
remote-endpoint =
<&soc_funnel_in>;
+ coresight,hwid = <0>;
};
};
port at 1 {
- reg = <0>;
+ reg = <1>;
acpu_funnel_in0: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint =
<&etm0_out>;
+ coresight,hwid = <0>;
};
};
port at 2 {
- reg = <1>;
+ reg = <2>;
acpu_funnel_in1: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint =
<&etm1_out>;
+ coresight,hwid = <1>;
};
};
port at 3 {
- reg = <2>;
+ reg = <3>;
acpu_funnel_in2: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint =
<&etm2_out>;
+ coresight,hwid = <2>;
};
};
port at 4 {
- reg = <3>;
+ reg = <4>;
acpu_funnel_in3: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint =
<&etm3_out>;
+ coresight,hwid = <3>;
};
};
port at 5 {
- reg = <4>;
+ reg = <5>;
acpu_funnel_in4: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint =
<&etm4_out>;
+ coresight,hwid = <4>;
};
};
port at 6 {
- reg = <5>;
+ reg = <6>;
acpu_funnel_in5: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint =
<&etm5_out>;
+ coresight,hwid = <5>;
};
};
port at 7 {
- reg = <6>;
+ reg = <7>;
acpu_funnel_in6: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint =
<&etm6_out>;
+ coresight,hwid = <6>;
};
};
port at 8 {
- reg = <7>;
+ reg = <8>;
acpu_funnel_in7: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint =
<&etm7_out>;
+ coresight,hwid = <7>;
};
};
};
@@ -253,8 +276,10 @@
port {
etm0_out: endpoint {
+ direction = <1>;
remote-endpoint =
<&acpu_funnel_in0>;
+ coresight,hwid = <0>;
};
};
};
@@ -270,8 +295,10 @@
port {
etm1_out: endpoint {
+ direction = <1>;
remote-endpoint =
<&acpu_funnel_in1>;
+ coresight,hwid = <0>;
};
};
};
@@ -287,8 +314,10 @@
port {
etm2_out: endpoint {
+ direction = <1>;
remote-endpoint =
<&acpu_funnel_in2>;
+ coresight,hwid = <0>;
};
};
};
@@ -304,8 +333,10 @@
port {
etm3_out: endpoint {
+ direction = <1>;
remote-endpoint =
<&acpu_funnel_in3>;
+ coresight,hwid = <0>;
};
};
};
@@ -321,8 +352,10 @@
port {
etm4_out: endpoint {
+ direction = <1>;
remote-endpoint =
<&acpu_funnel_in4>;
+ coresight,hwid = <0>;
};
};
};
@@ -338,8 +371,10 @@
port {
etm5_out: endpoint {
+ direction = <1>;
remote-endpoint =
<&acpu_funnel_in5>;
+ coresight,hwid = <0>;
};
};
};
@@ -355,8 +390,10 @@
port {
etm6_out: endpoint {
+ direction = <1>;
remote-endpoint =
<&acpu_funnel_in6>;
+ coresight,hwid = <0>;
};
};
};
@@ -372,8 +409,10 @@
port {
etm7_out: endpoint {
+ direction = <1>;
remote-endpoint =
<&acpu_funnel_in7>;
+ coresight,hwid = <0>;
};
};
};
--
2.7.4
^ permalink raw reply related
* [PATCH 10/20] dts: juno: Update coresight bindings for hw port
From: Suzuki K Poulose @ 2018-06-05 21:43 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1528235011-30691-1-git-send-email-suzuki.poulose@arm.com>
Switch to updated coresight bindings for hw ports.
Cc: Sudeep Holla <sudeep.holla@arm.com>
Cc: Liviu Dudau <liviu.dudau@arm.com>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
---
Changes since V1:
- Add support Juno for r1 & r2.
---
arch/arm64/boot/dts/arm/juno-base.dtsi | 82 ++++++++++++++++++++++---------
arch/arm64/boot/dts/arm/juno-cs-r1r2.dtsi | 26 +++++++---
arch/arm64/boot/dts/arm/juno.dts | 5 +-
3 files changed, 81 insertions(+), 32 deletions(-)
diff --git a/arch/arm64/boot/dts/arm/juno-base.dtsi b/arch/arm64/boot/dts/arm/juno-base.dtsi
index eb749c5..33b41ba 100644
--- a/arch/arm64/boot/dts/arm/juno-base.dtsi
+++ b/arch/arm64/boot/dts/arm/juno-base.dtsi
@@ -122,15 +122,18 @@
port at 0 {
reg = <0>;
etf0_in_port: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&main_funnel_out_port>;
+ coresight,hwid = <0>;
};
};
/* output port */
port at 1 {
- reg = <0>;
+ reg = <1>;
etf0_out_port: endpoint {
+ coresight,hwid = <0>;
+ direction = <1>;
};
};
};
@@ -145,8 +148,9 @@
power-domains = <&scpi_devpd 0>;
port {
tpiu_in_port: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&replicator_out_port0>;
+ coresight,hwid = <0>;
};
};
};
@@ -168,23 +172,27 @@
reg = <0>;
main_funnel_out_port: endpoint {
remote-endpoint = <&etf0_in_port>;
+ coresight,hwid = <0>;
+ direction = <1>;
};
};
/* input ports */
port at 1 {
- reg = <0>;
+ reg = <1>;
main_funnel_in_port0: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&cluster0_funnel_out_port>;
+ coresight,hwid = <0>;
};
};
port at 2 {
- reg = <1>;
+ reg = <2>;
main_funnel_in_port1: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&cluster1_funnel_out_port>;
+ coresight,hwid = <1>;
};
};
};
@@ -200,8 +208,9 @@
power-domains = <&scpi_devpd 0>;
port {
etr_in_port: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&replicator_out_port1>;
+ coresight,hwid = <0>;
};
};
};
@@ -217,6 +226,8 @@
power-domains = <&scpi_devpd 0>;
port {
stm_out_port: endpoint {
+ coresight,hwid = <0>;
+ direction = <1>;
};
};
};
@@ -240,6 +251,8 @@
port {
cluster0_etm0_out_port: endpoint {
remote-endpoint = <&cluster0_funnel_in_port0>;
+ coresight,hwid = <0>;
+ direction = <1>;
};
};
};
@@ -259,22 +272,26 @@
reg = <0>;
cluster0_funnel_out_port: endpoint {
remote-endpoint = <&main_funnel_in_port0>;
+ coresight,hwid = <0>;
+ direction = <1>;
};
};
port at 1 {
- reg = <0>;
+ reg = <1>;
cluster0_funnel_in_port0: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&cluster0_etm0_out_port>;
+ coresight,hwid = <0>;
};
};
port at 2 {
- reg = <1>;
+ reg = <2>;
cluster0_funnel_in_port1: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&cluster0_etm1_out_port>;
+ coresight,hwid = <1>;
};
};
};
@@ -299,6 +316,8 @@
port {
cluster0_etm1_out_port: endpoint {
remote-endpoint = <&cluster0_funnel_in_port1>;
+ coresight,hwid = <0>;
+ direction = <1>;
};
};
};
@@ -322,6 +341,8 @@
port {
cluster1_etm0_out_port: endpoint {
remote-endpoint = <&cluster1_funnel_in_port0>;
+ coresight,hwid = <0>;
+ direction = <1>;
};
};
};
@@ -341,36 +362,42 @@
reg = <0>;
cluster1_funnel_out_port: endpoint {
remote-endpoint = <&main_funnel_in_port1>;
+ coresight,hwid = <0>;
+ direction = <1>;
};
};
port at 1 {
- reg = <0>;
+ reg = <1>;
cluster1_funnel_in_port0: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&cluster1_etm0_out_port>;
+ coresight,hwid = <0>;
};
};
port at 2 {
- reg = <1>;
+ reg = <2>;
cluster1_funnel_in_port1: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&cluster1_etm1_out_port>;
+ coresight,hwid = <1>;
};
};
port at 3 {
- reg = <2>;
+ reg = <3>;
cluster1_funnel_in_port2: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&cluster1_etm2_out_port>;
+ coresight,hwid = <2>;
};
};
port at 4 {
- reg = <3>;
+ reg = <4>;
cluster1_funnel_in_port3: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&cluster1_etm3_out_port>;
+ coresight,hwid = <3>;
};
};
};
@@ -395,6 +422,8 @@
port {
cluster1_etm1_out_port: endpoint {
remote-endpoint = <&cluster1_funnel_in_port1>;
+ coresight,hwid = <0>;
+ direction = <1>;
};
};
};
@@ -418,6 +447,8 @@
port {
cluster1_etm2_out_port: endpoint {
remote-endpoint = <&cluster1_funnel_in_port2>;
+ coresight,hwid = <0>;
+ direction = <1>;
};
};
};
@@ -441,6 +472,8 @@
port {
cluster1_etm3_out_port: endpoint {
remote-endpoint = <&cluster1_funnel_in_port3>;
+ coresight,hwid = <0>;
+ direction = <1>;
};
};
};
@@ -462,6 +495,8 @@
reg = <0>;
replicator_out_port0: endpoint {
remote-endpoint = <&tpiu_in_port>;
+ coresight,hwid = <0>;
+ direction = <1>;
};
};
@@ -469,14 +504,17 @@
reg = <1>;
replicator_out_port1: endpoint {
remote-endpoint = <&etr_in_port>;
+ coresight,hwid = <1>;
+ direction = <1>;
};
};
/* replicator input port */
port at 2 {
- reg = <0>;
+ reg = <2>;
replicator_in_port0: endpoint {
- slave-mode;
+ direction = <0>;
+ coresight,hwid = <0>;
};
};
};
diff --git a/arch/arm64/boot/dts/arm/juno-cs-r1r2.dtsi b/arch/arm64/boot/dts/arm/juno-cs-r1r2.dtsi
index 0c43fb3..146a5d9 100644
--- a/arch/arm64/boot/dts/arm/juno-cs-r1r2.dtsi
+++ b/arch/arm64/boot/dts/arm/juno-cs-r1r2.dtsi
@@ -15,15 +15,18 @@
port at 0 {
reg = <0>;
csys1_funnel_out_port: endpoint {
+ coresight,hwid = <0>;
+ direction = <1>;
remote-endpoint = <&etf1_in_port>;
};
};
/* input port */
port at 1 {
- reg = <0>;
+ reg = <1>;
csys1_funnel_in_port0: endpoint {
- slave-mode;
+ coresight,hwid = <0>;
+ direction = <0>;
};
};
@@ -45,15 +48,18 @@
port at 0 {
reg = <0>;
etf1_in_port: endpoint {
- slave-mode;
+ direction = <0>;
+ coresight,hwid = <0>;
remote-endpoint = <&csys1_funnel_out_port>;
};
};
/* output port */
port at 1 {
- reg = <0>;
+ reg = <1>;
etf1_out_port: endpoint {
+ coresight,hwid = <0>;
+ direction = <1>;
remote-endpoint = <&csys2_funnel_in_port1>;
};
};
@@ -75,23 +81,27 @@
port at 0 {
reg = <0>;
csys2_funnel_out_port: endpoint {
+ coresight,hwid = <0>;
+ direction = <1>;
remote-endpoint = <&replicator_in_port0>;
};
};
/* input ports */
port at 1 {
- reg = <0>;
+ reg = <1>;
csys2_funnel_in_port0: endpoint {
- slave-mode;
+ direction = <0>;
+ coresight,hwid = <0>;
remote-endpoint = <&etf0_out_port>;
};
};
port at 2 {
- reg = <1>;
+ reg = <2>;
csys2_funnel_in_port1: endpoint {
- slave-mode;
+ direction = <0>;
+ coresight,hwid = <1>;
remote-endpoint = <&etf1_out_port>;
};
};
diff --git a/arch/arm64/boot/dts/arm/juno.dts b/arch/arm64/boot/dts/arm/juno.dts
index c9236c4..27b8036 100644
--- a/arch/arm64/boot/dts/arm/juno.dts
+++ b/arch/arm64/boot/dts/arm/juno.dts
@@ -260,10 +260,11 @@
&main_funnel {
ports {
port at 3 {
- reg = <2>;
+ reg = <3>;
main_funnel_in_port2: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&stm_out_port>;
+ coresight,hwid = <2>;
};
};
};
--
2.7.4
^ permalink raw reply related
* [PATCH 09/20] coresight: dts: Define new bindings for direction of data flow
From: Suzuki K Poulose @ 2018-06-05 21:43 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1528235011-30691-1-git-send-email-suzuki.poulose@arm.com>
So far we have relied on an undocumented property "slave-mode",
to indicate if the given port is input or not. Since we are
redefining the coresight bindings, define new property for the
"direction" of data flow for a given connection endpoint in the
device.
Each endpoint must define the following property.
- "direction" : 0 => Port is input
1 => Port is output
Cc: Sudeep Holla <sudeep.holla@arm.com>
Cc: Rob Herring <robh@kernel.org>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
---
.../devicetree/bindings/arm/coresight.txt | 24 ++++++++++++++--------
drivers/hwtracing/coresight/of_coresight.c | 22 ++++++++++++++++----
2 files changed, 34 insertions(+), 12 deletions(-)
diff --git a/Documentation/devicetree/bindings/arm/coresight.txt b/Documentation/devicetree/bindings/arm/coresight.txt
index bf75ab3..ff382bc 100644
--- a/Documentation/devicetree/bindings/arm/coresight.txt
+++ b/Documentation/devicetree/bindings/arm/coresight.txt
@@ -103,9 +103,11 @@ with a specific direction of data flow, each connection must define the
following properties to uniquely identify the connection details.
* Direction of the data flow w.r.t the component :
- Each input port must have the following property defined at the "endpoint"
+ Each hardware port must have the following property defined at the "endpoint"
for the port.
- "slave-mode"
+ "direction" - 32bit integer, whose values are defined as follows :
+ 0 => the endpoint is an Input port
+ 1 => the endpoint is an Output port.
* Hardware Port number at the component:
- Each "endpoint" must define the hardware port of the local end of the
@@ -129,7 +131,7 @@ Example:
clock-names = "apb_pclk";
port {
etb_in_port: endpoint at 0 {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&replicator_out_port0>;
coresight,hwid = <0>;
};
@@ -144,7 +146,7 @@ Example:
clock-names = "apb_pclk";
port {
tpiu_in_port: endpoint at 0 {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&replicator_out_port1>;
coresight,hwid = <0>;
};
@@ -166,6 +168,7 @@ Example:
port at 0 {
reg = <0>;
replicator_out_port0: endpoint {
+ direction = <1>;
remote-endpoint = <&etb_in_port>;
coresight,hwid = <0>;
};
@@ -174,6 +177,7 @@ Example:
port at 1 {
reg = <1>;
replicator_out_port1: endpoint {
+ direction = <1>;
remote-endpoint = <&tpiu_in_port>;
coresight,hwid = <1>;
};
@@ -183,7 +187,7 @@ Example:
port at 2 {
reg = <1>;
replicator_in_port0: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&funnel_out_port0>;
coresight,hwid = <0>;
};
@@ -205,6 +209,7 @@ Example:
port at 0 {
reg = <0>;
funnel_out_port0: endpoint {
+ direction = <1>;
remote-endpoint =
<&replicator_in_port0>;
coresight,hwid = <0>;
@@ -215,7 +220,7 @@ Example:
port at 1 {
reg = <1>;
funnel_in_port0: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&ptm0_out_port>;
coresight,hwid = <0>;
};
@@ -224,7 +229,7 @@ Example:
port at 2 {
reg = <2>;
funnel_in_port1: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&ptm1_out_port>;
coresight,hwid = <1>;
};
@@ -233,7 +238,7 @@ Example:
port at 3 {
reg = <3>;
funnel_in_port2: endpoint {
- slave-mode;
+ direction = <0>;
remote-endpoint = <&etm0_out_port>;
coresight,hwid = <2>;
};
@@ -252,6 +257,7 @@ Example:
clock-names = "apb_pclk";
port {
ptm0_out_port: endpoint {
+ direction = <1>;
remote-endpoint = <&funnel_in_port0>;
coresight,hwid = <0>;
};
@@ -267,6 +273,7 @@ Example:
clock-names = "apb_pclk";
port {
ptm1_out_port: endpoint {
+ direction = <1>;
remote-endpoint = <&funnel_in_port1>;
coresight,hwid = <0>;
};
@@ -284,6 +291,7 @@ Example:
clock-names = "apb_pclk";
port {
stm_out_port: endpoint {
+ direction = <1>;
remote-endpoint = <&main_funnel_in_port2>;
coresight,hwid = <0>;
};
diff --git a/drivers/hwtracing/coresight/of_coresight.c b/drivers/hwtracing/coresight/of_coresight.c
index d23d7dd..0d6e6a9 100644
--- a/drivers/hwtracing/coresight/of_coresight.c
+++ b/drivers/hwtracing/coresight/of_coresight.c
@@ -45,7 +45,20 @@ of_coresight_get_endpoint_device(struct device_node *endpoint)
endpoint, of_dev_node_match);
}
-static void of_coresight_get_ports(const struct device_node *node,
+static bool of_coresight_endpoint_is_input(struct device *dev,
+ struct device_node *ep_node)
+{
+ u32 dir;
+
+ if (!of_property_read_u32(ep_node, "direction", &dir))
+ return dir == 0;
+
+ dev_warn_once(dev, "Missing mandatory \"direction\" property!\n");
+ return of_property_read_bool(ep_node, "slave-mode");
+}
+
+static void of_coresight_get_ports(struct device *dev,
+ const struct device_node *node,
int *nr_inport, int *nr_outport)
{
struct device_node *ep = NULL;
@@ -56,7 +69,7 @@ static void of_coresight_get_ports(const struct device_node *node,
if (!ep)
break;
- if (of_property_read_bool(ep, "slave-mode"))
+ if (of_coresight_endpoint_is_input(dev, ep))
in++;
else
out++;
@@ -149,7 +162,7 @@ static int of_coresight_parse_endpoint(struct device *dev,
* No need to deal with input ports, processing for as
* processing for output ports will deal with them.
*/
- if (of_find_property(ep, "slave-mode", NULL))
+ if (of_coresight_endpoint_is_input(dev, ep))
break;
/* Parse the local port details */
@@ -212,7 +225,8 @@ of_get_coresight_platform_data(struct device *dev,
pdata->cpu = of_coresight_get_cpu(node);
/* Get the number of input and output port for this component */
- of_coresight_get_ports(node, &pdata->nr_inport, &pdata->nr_outport);
+ of_coresight_get_ports(dev, node,
+ &pdata->nr_inport, &pdata->nr_outport);
/* If there are not output connections, we are done */
if (!pdata->nr_outport)
--
2.7.4
^ permalink raw reply related
* [PATCH 08/20] coresight: dts: Cleanup device tree graph bindings
From: Suzuki K Poulose @ 2018-06-05 21:43 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1528235011-30691-1-git-send-email-suzuki.poulose@arm.com>
The coresight drivers relied on default bindings for graph
in DT, while reusing the "reg" field of the "ports" to indicate
the actual hardware port number for the connections. However,
with the rules getting stricter w.r.t to the address mismatch
with the label, it is no longer possible to use the port address
field for the hardware port number. Hence, we add an explicit
property to denote the hardware port number, "coresight,hwid"
which must be specified for each "endpoint".
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Sudeep Holla <sudeep.holla@arm.com>
Cc: Rob Herring <robh@kernel.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
---
.../devicetree/bindings/arm/coresight.txt | 29 ++++++++++---
drivers/hwtracing/coresight/of_coresight.c | 49 +++++++++++++++++-----
2 files changed, 62 insertions(+), 16 deletions(-)
diff --git a/Documentation/devicetree/bindings/arm/coresight.txt b/Documentation/devicetree/bindings/arm/coresight.txt
index ed6b555..bf75ab3 100644
--- a/Documentation/devicetree/bindings/arm/coresight.txt
+++ b/Documentation/devicetree/bindings/arm/coresight.txt
@@ -108,8 +108,13 @@ following properties to uniquely identify the connection details.
"slave-mode"
* Hardware Port number at the component:
- - The hardware port number is assumed to be the address of the "port"
- component.
+ - Each "endpoint" must define the hardware port of the local end of the
+ connection using the following property :
+
+ "coresight,hwid" - 32bit integer, local hardware port.
+
+ - [ ** Obsolete ** ] The hardware port number is assumed to be the address
+ of the "port" component.
@@ -126,6 +131,7 @@ Example:
etb_in_port: endpoint at 0 {
slave-mode;
remote-endpoint = <&replicator_out_port0>;
+ coresight,hwid = <0>;
};
};
};
@@ -140,6 +146,7 @@ Example:
tpiu_in_port: endpoint at 0 {
slave-mode;
remote-endpoint = <&replicator_out_port1>;
+ coresight,hwid = <0>;
};
};
};
@@ -160,6 +167,7 @@ Example:
reg = <0>;
replicator_out_port0: endpoint {
remote-endpoint = <&etb_in_port>;
+ coresight,hwid = <0>;
};
};
@@ -167,15 +175,17 @@ Example:
reg = <1>;
replicator_out_port1: endpoint {
remote-endpoint = <&tpiu_in_port>;
+ coresight,hwid = <1>;
};
};
/* replicator input port */
port at 2 {
- reg = <0>;
+ reg = <1>;
replicator_in_port0: endpoint {
slave-mode;
remote-endpoint = <&funnel_out_port0>;
+ coresight,hwid = <0>;
};
};
};
@@ -197,31 +207,35 @@ Example:
funnel_out_port0: endpoint {
remote-endpoint =
<&replicator_in_port0>;
+ coresight,hwid = <0>;
};
};
/* funnel input ports */
port at 1 {
- reg = <0>;
+ reg = <1>;
funnel_in_port0: endpoint {
slave-mode;
remote-endpoint = <&ptm0_out_port>;
+ coresight,hwid = <0>;
};
};
port at 2 {
- reg = <1>;
+ reg = <2>;
funnel_in_port1: endpoint {
slave-mode;
remote-endpoint = <&ptm1_out_port>;
+ coresight,hwid = <1>;
};
};
port at 3 {
- reg = <2>;
+ reg = <3>;
funnel_in_port2: endpoint {
slave-mode;
remote-endpoint = <&etm0_out_port>;
+ coresight,hwid = <2>;
};
};
@@ -239,6 +253,7 @@ Example:
port {
ptm0_out_port: endpoint {
remote-endpoint = <&funnel_in_port0>;
+ coresight,hwid = <0>;
};
};
};
@@ -253,6 +268,7 @@ Example:
port {
ptm1_out_port: endpoint {
remote-endpoint = <&funnel_in_port1>;
+ coresight,hwid = <0>;
};
};
};
@@ -269,6 +285,7 @@ Example:
port {
stm_out_port: endpoint {
remote-endpoint = <&main_funnel_in_port2>;
+ coresight,hwid = <0>;
};
};
};
diff --git a/drivers/hwtracing/coresight/of_coresight.c b/drivers/hwtracing/coresight/of_coresight.c
index d01a9ce..d23d7dd 100644
--- a/drivers/hwtracing/coresight/of_coresight.c
+++ b/drivers/hwtracing/coresight/of_coresight.c
@@ -99,6 +99,31 @@ int of_coresight_get_cpu(const struct device_node *node)
EXPORT_SYMBOL_GPL(of_coresight_get_cpu);
/*
+ * of_coresight_endpoint_get_port_id : Get the hardware port number for the
+ * given endpoint device node. Prefer the explicit "coresight,hwid" property
+ * over the endpoint register id (obsolete bindings).
+ */
+static int of_coresight_endpoint_get_port_id(struct device *dev,
+ struct device_node *ep_node)
+{
+ struct of_endpoint ep;
+ int rc, port_id;
+
+
+ if (!of_property_read_u32(ep_node, "coresight,hwid", &port_id))
+ return port_id;
+
+ rc = of_graph_parse_endpoint(ep_node, &ep);
+ if (rc)
+ return rc;
+ dev_warn_once(dev,
+ "ep%d: Mandatory \"coresight,hwid\" property missing.\n",
+ ep.port);
+ dev_warn_once(dev, "DT uses obsolete coresight bindings\n");
+ return ep.port;
+}
+
+/*
* of_coresight_parse_endpoint : Parse the given output endpoint @ep
* and fill the connection information in *@pconn.
*
@@ -109,11 +134,11 @@ EXPORT_SYMBOL_GPL(of_coresight_get_cpu);
* 0 - If the parsing completed without any fatal errors.
* -Errno - Fatal error, abort the scanning.
*/
-static int of_coresight_parse_endpoint(struct device_node *ep,
+static int of_coresight_parse_endpoint(struct device *dev,
+ struct device_node *ep,
struct coresight_connection **pconn)
{
- int ret = 0;
- struct of_endpoint endpoint, rendpoint;
+ int ret = 0, local_port, child_port;
struct device_node *rparent = NULL;
struct device_node *rep = NULL;
struct device *rdev = NULL;
@@ -128,7 +153,8 @@ static int of_coresight_parse_endpoint(struct device_node *ep,
break;
/* Parse the local port details */
- if (of_graph_parse_endpoint(ep, &endpoint))
+ local_port = of_coresight_endpoint_get_port_id(dev, ep);
+ if (local_port < 0)
break;
/*
* Get a handle on the remote endpoint and the device it is
@@ -140,9 +166,6 @@ static int of_coresight_parse_endpoint(struct device_node *ep,
rparent = of_graph_get_port_parent(rep);
if (!rparent)
break;
- if (of_graph_parse_endpoint(rep, &rendpoint))
- break;
-
/* If the remote device is not available, defer probing */
rdev = of_coresight_get_endpoint_device(rparent);
if (!rdev) {
@@ -150,9 +173,15 @@ static int of_coresight_parse_endpoint(struct device_node *ep,
break;
}
- conn->outport = endpoint.port;
+ child_port = of_coresight_endpoint_get_port_id(rdev, rep);
+ if (child_port < 0) {
+ ret = 0;
+ break;
+ }
+
+ conn->outport = local_port;
conn->child_name = dev_name(rdev);
- conn->child_port = rendpoint.port;
+ conn->child_port = child_port;
/* Move the connection record */
(*pconn)++;
} while (0);
@@ -200,7 +229,7 @@ of_get_coresight_platform_data(struct device *dev,
ep = of_graph_get_next_endpoint(node, ep);
if (!ep)
break;
- ret = of_coresight_parse_endpoint(ep, &conn);
+ ret = of_coresight_parse_endpoint(dev, ep, &conn);
if (ret)
return ERR_PTR(ret);
} while (ep);
--
2.7.4
^ permalink raw reply related
* [PATCH 07/20] coresight: dts: Document usage of graph bindings
From: Suzuki K Poulose @ 2018-06-05 21:43 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1528235011-30691-1-git-send-email-suzuki.poulose@arm.com>
Before we update the bindings, document the current graph bindings
and usage of additional properties.
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
---
.../devicetree/bindings/arm/coresight.txt | 31 +++++++++++++++++++---
1 file changed, 27 insertions(+), 4 deletions(-)
diff --git a/Documentation/devicetree/bindings/arm/coresight.txt b/Documentation/devicetree/bindings/arm/coresight.txt
index 9aa30a1..ed6b555 100644
--- a/Documentation/devicetree/bindings/arm/coresight.txt
+++ b/Documentation/devicetree/bindings/arm/coresight.txt
@@ -52,9 +52,7 @@ its hardware characteristcs.
clocks the core of that coresight component. The latter clock
is optional.
- * port or ports: The representation of the component's port
- layout using the generic DT graph presentation found in
- "bindings/graph.txt".
+ * port or ports: see "Graph bindings for Coresight" below.
* Additional required properties for System Trace Macrocells (STM):
* reg: along with the physical base address and length of the register
@@ -71,7 +69,7 @@ its hardware characteristcs.
AMBA markee):
- "arm,coresight-replicator"
- * port or ports: same as above.
+ * port or ports: see "Graph bindings for Coresight" below.
* Optional properties for ETM/PTMs:
@@ -90,6 +88,31 @@ its hardware characteristcs.
* arm,scatter-gather: boolean. Indicates that the TMC-ETR can safely
use the SG mode on this system.
+Graph bindings for Coresight
+-------------------------------
+
+Coresight components are interconnected to create a data path for the flow of
+trace data generated from the "sources" to their collection points "sink".
+Each coresight component must describe the "input" and "output" connections.
+The connections must be described via generic DT graph bindings as described
+by the "bindings/graph.txt", where each "port" along with an "endpoint"
+component represents a hardware port and the connection.
+
+Since it is possible to have multiple connections for any coresight component
+with a specific direction of data flow, each connection must define the
+following properties to uniquely identify the connection details.
+
+ * Direction of the data flow w.r.t the component :
+ Each input port must have the following property defined at the "endpoint"
+ for the port.
+ "slave-mode"
+
+ * Hardware Port number at the component:
+ - The hardware port number is assumed to be the address of the "port"
+ component.
+
+
+
Example:
1. Sinks
--
2.7.4
^ permalink raw reply related
* [PATCH 06/20] coresight: Handle errors in finding input/output ports
From: Suzuki K Poulose @ 2018-06-05 21:43 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1528235011-30691-1-git-send-email-suzuki.poulose@arm.com>
If we fail to find the input / output port for a LINK component
while enabling a path, we should fail gracefully rather than
assuming port "0".
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
---
drivers/hwtracing/coresight/coresight.c | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/hwtracing/coresight/coresight.c b/drivers/hwtracing/coresight/coresight.c
index 69e9136..3c1c058 100644
--- a/drivers/hwtracing/coresight/coresight.c
+++ b/drivers/hwtracing/coresight/coresight.c
@@ -107,7 +107,7 @@ static int coresight_find_link_inport(struct coresight_device *csdev,
dev_err(&csdev->dev, "couldn't find inport, parent: %s, child: %s\n",
dev_name(&parent->dev), dev_name(&csdev->dev));
- return 0;
+ return -ENODEV;
}
static int coresight_find_link_outport(struct coresight_device *csdev,
@@ -125,7 +125,7 @@ static int coresight_find_link_outport(struct coresight_device *csdev,
dev_err(&csdev->dev, "couldn't find outport, parent: %s, child: %s\n",
dev_name(&csdev->dev), dev_name(&child->dev));
- return 0;
+ return -ENODEV;
}
static int coresight_enable_sink(struct coresight_device *csdev, u32 mode)
@@ -178,6 +178,9 @@ static int coresight_enable_link(struct coresight_device *csdev,
else
refport = 0;
+ if (refport < 0)
+ return refport;
+
if (atomic_inc_return(&csdev->refcnt[refport]) == 1) {
if (link_ops(csdev)->enable) {
ret = link_ops(csdev)->enable(csdev, inport, outport);
--
2.7.4
^ permalink raw reply related
* [PATCH 05/20] coresight: platform: Cleanup coresight connection handling
From: Suzuki K Poulose @ 2018-06-05 21:43 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1528235011-30691-1-git-send-email-suzuki.poulose@arm.com>
The platform code parses the component connections and populates
a platform-description of the output connections in arrays of fields
(which is never freed). This is later copied in the coresight_register
to a newly allocated area, represented by coresight_connection(s).
This patch cleans up the code dealing with connections by making
use of the "coresight_connection" structure right at the platform
code and lets the generic driver simply re-use information provided
by the platform.
Thus making it reader friendly as well as avoiding the wastage of
unused memory.
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
---
drivers/hwtracing/coresight/coresight.c | 21 +-----------
drivers/hwtracing/coresight/of_coresight.c | 51 ++++++++++++------------------
include/linux/coresight.h | 9 ++----
3 files changed, 23 insertions(+), 58 deletions(-)
diff --git a/drivers/hwtracing/coresight/coresight.c b/drivers/hwtracing/coresight/coresight.c
index 2893cfe..69e9136 100644
--- a/drivers/hwtracing/coresight/coresight.c
+++ b/drivers/hwtracing/coresight/coresight.c
@@ -953,13 +953,11 @@ postcore_initcall(coresight_init);
struct coresight_device *coresight_register(struct coresight_desc *desc)
{
- int i;
int ret;
int link_subtype;
int nr_refcnts = 1;
atomic_t *refcnts = NULL;
struct coresight_device *csdev;
- struct coresight_connection *conns = NULL;
csdev = kzalloc(sizeof(*csdev), GFP_KERNEL);
if (!csdev) {
@@ -988,22 +986,7 @@ struct coresight_device *coresight_register(struct coresight_desc *desc)
csdev->nr_inport = desc->pdata->nr_inport;
csdev->nr_outport = desc->pdata->nr_outport;
- /* Initialise connections if there is at least one outport */
- if (csdev->nr_outport) {
- conns = kcalloc(csdev->nr_outport, sizeof(*conns), GFP_KERNEL);
- if (!conns) {
- ret = -ENOMEM;
- goto err_kzalloc_conns;
- }
-
- for (i = 0; i < csdev->nr_outport; i++) {
- conns[i].outport = desc->pdata->outports[i];
- conns[i].child_name = desc->pdata->child_names[i];
- conns[i].child_port = desc->pdata->child_ports[i];
- }
- }
-
- csdev->conns = conns;
+ csdev->conns = desc->pdata->conns;
csdev->type = desc->type;
csdev->subtype = desc->subtype;
@@ -1032,8 +1015,6 @@ struct coresight_device *coresight_register(struct coresight_desc *desc)
return csdev;
-err_kzalloc_conns:
- kfree(refcnts);
err_kzalloc_refcnts:
kfree(csdev);
err_kzalloc_csdev:
diff --git a/drivers/hwtracing/coresight/of_coresight.c b/drivers/hwtracing/coresight/of_coresight.c
index ada4f07..d01a9ce 100644
--- a/drivers/hwtracing/coresight/of_coresight.c
+++ b/drivers/hwtracing/coresight/of_coresight.c
@@ -70,26 +70,13 @@ static void of_coresight_get_ports(const struct device_node *node,
static int of_coresight_alloc_memory(struct device *dev,
struct coresight_platform_data *pdata)
{
- /* List of output port on this component */
- pdata->outports = devm_kzalloc(dev, pdata->nr_outport *
- sizeof(*pdata->outports),
- GFP_KERNEL);
- if (!pdata->outports)
- return -ENOMEM;
-
- /* Children connected to this component via @outports */
- pdata->child_names = devm_kzalloc(dev, pdata->nr_outport *
- sizeof(*pdata->child_names),
- GFP_KERNEL);
- if (!pdata->child_names)
- return -ENOMEM;
-
- /* Port number on the child this component is connected to */
- pdata->child_ports = devm_kzalloc(dev, pdata->nr_outport *
- sizeof(*pdata->child_ports),
- GFP_KERNEL);
- if (!pdata->child_ports)
- return -ENOMEM;
+ if (pdata->nr_outport) {
+ pdata->conns = devm_kzalloc(dev, pdata->nr_outport *
+ sizeof(*pdata->conns),
+ GFP_KERNEL);
+ if (!pdata->conns)
+ return -ENOMEM;
+ }
return 0;
}
@@ -113,24 +100,24 @@ EXPORT_SYMBOL_GPL(of_coresight_get_cpu);
/*
* of_coresight_parse_endpoint : Parse the given output endpoint @ep
- * and fill the connection information in @pdata[*@i].
+ * and fill the connection information in *@pconn.
*
* Parses the local port, remote device name and the remote port. Also
- * updates *@i to point to the next index, when an entry is added.
+ * updates *@pconn to point to the next record, when an entry is added.
*
* Returns :
* 0 - If the parsing completed without any fatal errors.
* -Errno - Fatal error, abort the scanning.
*/
static int of_coresight_parse_endpoint(struct device_node *ep,
- struct coresight_platform_data *pdata,
- int *i)
+ struct coresight_connection **pconn)
{
int ret = 0;
struct of_endpoint endpoint, rendpoint;
struct device_node *rparent = NULL;
struct device_node *rep = NULL;
struct device *rdev = NULL;
+ struct coresight_connection *conn = *pconn;
do {
/*
@@ -163,11 +150,11 @@ static int of_coresight_parse_endpoint(struct device_node *ep,
break;
}
- pdata->outports[*i] = endpoint.port;
- pdata->child_names[*i] = dev_name(rdev);
- pdata->child_ports[*i] = rendpoint.port;
- /* Move the index */
- (*i)++;
+ conn->outport = endpoint.port;
+ conn->child_name = dev_name(rdev);
+ conn->child_port = rendpoint.port;
+ /* Move the connection record */
+ (*pconn)++;
} while (0);
if (rparent)
@@ -182,8 +169,9 @@ struct coresight_platform_data *
of_get_coresight_platform_data(struct device *dev,
const struct device_node *node)
{
- int i = 0, ret = 0;
+ int ret = 0;
struct coresight_platform_data *pdata;
+ struct coresight_connection *conn;
struct device_node *ep = NULL;
pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
@@ -205,13 +193,14 @@ of_get_coresight_platform_data(struct device *dev,
if (ret)
return ERR_PTR(ret);
+ conn = pdata->conns;
/* Iterate through each port to discover topology */
do {
/* Get a handle on a port */
ep = of_graph_get_next_endpoint(node, ep);
if (!ep)
break;
- ret = of_coresight_parse_endpoint(ep, pdata, &i);
+ ret = of_coresight_parse_endpoint(ep, &conn);
if (ret)
return ERR_PTR(ret);
} while (ep);
diff --git a/include/linux/coresight.h b/include/linux/coresight.h
index 69a5c9f..2a75a15 100644
--- a/include/linux/coresight.h
+++ b/include/linux/coresight.h
@@ -82,20 +82,15 @@ struct coresight_dev_subtype {
* @cpu: the CPU a source belongs to. Only applicable for ETM/PTMs.
* @name: name of the component as shown under sysfs.
* @nr_inport: number of input ports for this component.
- * @outports: list of remote endpoint port number.
- * @child_names:name of all child components connected to this device.
- * @child_ports:child component port number the current component is
- connected to.
* @nr_outport: number of output ports for this component.
+ * @conns: Array of nr_outport connections from this component
*/
struct coresight_platform_data {
int cpu;
const char *name;
int nr_inport;
- int *outports;
- const char **child_names;
- int *child_ports;
int nr_outport;
+ struct coresight_connection *conns;
};
/**
--
2.7.4
^ permalink raw reply related
* [PATCH 04/20] coresight: Cleanup platform description data
From: Suzuki K Poulose @ 2018-06-05 21:43 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1528235011-30691-1-git-send-email-suzuki.poulose@arm.com>
Nobody uses the "clk" field in struct coresight_platform_data.
Remove it.
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
---
include/linux/coresight.h | 2 --
1 file changed, 2 deletions(-)
diff --git a/include/linux/coresight.h b/include/linux/coresight.h
index e5421b8..69a5c9f 100644
--- a/include/linux/coresight.h
+++ b/include/linux/coresight.h
@@ -87,7 +87,6 @@ struct coresight_dev_subtype {
* @child_ports:child component port number the current component is
connected to.
* @nr_outport: number of output ports for this component.
- * @clk: The clock this component is associated to.
*/
struct coresight_platform_data {
int cpu;
@@ -97,7 +96,6 @@ struct coresight_platform_data {
const char **child_names;
int *child_ports;
int nr_outport;
- struct clk *clk;
};
/**
--
2.7.4
^ permalink raw reply related
* [PATCH 03/20] coresight: Fix remote endpoint parsing
From: Suzuki K Poulose @ 2018-06-05 21:43 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1528235011-30691-1-git-send-email-suzuki.poulose@arm.com>
When parsing the remote endpoint of an output port, we do :
rport = of_graph_get_remote_port(ep);
rparent = of_graph_get_remote_port_parent(ep);
and then parse the "remote_port" as if it was the remote endpoint,
which is wrong. The code worked fine because we used endpoint number
as the port number. Let us fix it and optimise a bit as:
remote_ep = of_graph_get_remote_endpoint(ep);
if (remote_ep)
remote_parent = of_graph_get_port_parent(remote_ep);
and then, parse the remote_ep for the port/endpoint details.
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
---
drivers/hwtracing/coresight/of_coresight.c | 22 +++++++++++-----------
1 file changed, 11 insertions(+), 11 deletions(-)
diff --git a/drivers/hwtracing/coresight/of_coresight.c b/drivers/hwtracing/coresight/of_coresight.c
index 8a23c63..ada4f07 100644
--- a/drivers/hwtracing/coresight/of_coresight.c
+++ b/drivers/hwtracing/coresight/of_coresight.c
@@ -129,7 +129,7 @@ static int of_coresight_parse_endpoint(struct device_node *ep,
int ret = 0;
struct of_endpoint endpoint, rendpoint;
struct device_node *rparent = NULL;
- struct device_node *rport = NULL;
+ struct device_node *rep = NULL;
struct device *rdev = NULL;
do {
@@ -144,16 +144,16 @@ static int of_coresight_parse_endpoint(struct device_node *ep,
if (of_graph_parse_endpoint(ep, &endpoint))
break;
/*
- * Get a handle on the remote port and parent
- * attached to it.
+ * Get a handle on the remote endpoint and the device it is
+ * attached to.
*/
- rparent = of_graph_get_remote_port_parent(ep);
+ rep = of_graph_get_remote_endpoint(ep);
+ if (!rep)
+ break;
+ rparent = of_graph_get_port_parent(rep);
if (!rparent)
break;
- rport = of_graph_get_remote_port(ep);
- if (!rport)
- break;
- if (of_graph_parse_endpoint(rport, &rendpoint))
+ if (of_graph_parse_endpoint(rep, &rendpoint))
break;
/* If the remote device is not available, defer probing */
@@ -165,15 +165,15 @@ static int of_coresight_parse_endpoint(struct device_node *ep,
pdata->outports[*i] = endpoint.port;
pdata->child_names[*i] = dev_name(rdev);
- pdata->child_ports[*i] = rendpoint.id;
+ pdata->child_ports[*i] = rendpoint.port;
/* Move the index */
(*i)++;
} while (0);
if (rparent)
of_node_put(rparent);
- if (rport)
- of_node_put(rport);
+ if (rep)
+ of_node_put(rep);
return ret;
}
--
2.7.4
^ permalink raw reply related
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