* [PATCH v2 05/10] media: drxk_hard: switch to i2c_lock_bus(..., I2C_LOCK_SEGMENT)
From: Peter Rosin @ 2018-06-20 5:17 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180620051803.12206-1-peda@axentia.se>
Locking the root adapter for __i2c_transfer will deadlock if the
device sits behind a mux-locked I2C mux. Switch to the finer-grained
i2c_lock_bus with the I2C_LOCK_SEGMENT flag. If the device does not
sit behind a mux-locked mux, the two locking variants are equivalent.
Signed-off-by: Peter Rosin <peda@axentia.se>
---
drivers/media/dvb-frontends/drxk_hard.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/media/dvb-frontends/drxk_hard.c b/drivers/media/dvb-frontends/drxk_hard.c
index 5a26ad93be10..29c36f95d624 100644
--- a/drivers/media/dvb-frontends/drxk_hard.c
+++ b/drivers/media/dvb-frontends/drxk_hard.c
@@ -213,7 +213,7 @@ static inline u32 log10times100(u32 value)
static int drxk_i2c_lock(struct drxk_state *state)
{
- i2c_lock_adapter(state->i2c);
+ i2c_lock_bus(state->i2c, I2C_LOCK_SEGMENT);
state->drxk_i2c_exclusive_lock = true;
return 0;
@@ -224,7 +224,7 @@ static void drxk_i2c_unlock(struct drxk_state *state)
if (!state->drxk_i2c_exclusive_lock)
return;
- i2c_unlock_adapter(state->i2c);
+ i2c_unlock_bus(state->i2c, I2C_LOCK_SEGMENT);
state->drxk_i2c_exclusive_lock = false;
}
--
2.11.0
^ permalink raw reply related
* [PATCH v2 04/10] media: af9013: switch to i2c_lock_bus(..., I2C_LOCK_SEGMENT)
From: Peter Rosin @ 2018-06-20 5:17 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180620051803.12206-1-peda@axentia.se>
Locking the root adapter for __i2c_transfer will deadlock if the
device sits behind a mux-locked I2C mux. Switch to the finer-grained
i2c_lock_bus with the I2C_LOCK_SEGMENT flag. If the device does not
sit behind a mux-locked mux, the two locking variants are equivalent.
Signed-off-by: Peter Rosin <peda@axentia.se>
---
drivers/media/dvb-frontends/af9013.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/media/dvb-frontends/af9013.c b/drivers/media/dvb-frontends/af9013.c
index 482bce49819a..99361c113bca 100644
--- a/drivers/media/dvb-frontends/af9013.c
+++ b/drivers/media/dvb-frontends/af9013.c
@@ -1312,10 +1312,10 @@ static int af9013_wregs(struct i2c_client *client, u8 cmd, u16 reg,
memcpy(&buf[3], val, len);
if (lock)
- i2c_lock_adapter(client->adapter);
+ i2c_lock_bus(client->adapter, I2C_LOCK_SEGMENT);
ret = __i2c_transfer(client->adapter, msg, 1);
if (lock)
- i2c_unlock_adapter(client->adapter);
+ i2c_unlock_bus(client->adapter, I2C_LOCK_SEGMENT);
if (ret < 0) {
goto err;
} else if (ret != 1) {
@@ -1353,10 +1353,10 @@ static int af9013_rregs(struct i2c_client *client, u8 cmd, u16 reg,
buf[2] = cmd;
if (lock)
- i2c_lock_adapter(client->adapter);
+ i2c_lock_bus(client->adapter, I2C_LOCK_SEGMENT);
ret = __i2c_transfer(client->adapter, msg, 2);
if (lock)
- i2c_unlock_adapter(client->adapter);
+ i2c_unlock_bus(client->adapter, I2C_LOCK_SEGMENT);
if (ret < 0) {
goto err;
} else if (ret != 2) {
--
2.11.0
^ permalink raw reply related
* [PATCH v2 03/10] input: rohm_bu21023: switch to i2c_lock_bus(..., I2C_LOCK_SEGMENT)
From: Peter Rosin @ 2018-06-20 5:17 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180620051803.12206-1-peda@axentia.se>
Locking the root adapter for __i2c_transfer will deadlock if the
device sits behind a mux-locked I2C mux. Switch to the finer-grained
i2c_lock_bus with the I2C_LOCK_SEGMENT flag. If the device does not
sit behind a mux-locked mux, the two locking variants are equivalent.
Signed-off-by: Peter Rosin <peda@axentia.se>
---
drivers/input/touchscreen/rohm_bu21023.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/input/touchscreen/rohm_bu21023.c b/drivers/input/touchscreen/rohm_bu21023.c
index bda0500c9b57..714affdd742f 100644
--- a/drivers/input/touchscreen/rohm_bu21023.c
+++ b/drivers/input/touchscreen/rohm_bu21023.c
@@ -304,7 +304,7 @@ static int rohm_i2c_burst_read(struct i2c_client *client, u8 start, void *buf,
msg[1].len = len;
msg[1].buf = buf;
- i2c_lock_adapter(adap);
+ i2c_lock_bus(adap, I2C_LOCK_SEGMENT);
for (i = 0; i < 2; i++) {
if (__i2c_transfer(adap, &msg[i], 1) < 0) {
@@ -313,7 +313,7 @@ static int rohm_i2c_burst_read(struct i2c_client *client, u8 start, void *buf,
}
}
- i2c_unlock_adapter(adap);
+ i2c_unlock_bus(adap, I2C_LOCK_SEGMENT);
return ret;
}
--
2.11.0
^ permalink raw reply related
* [PATCH v2 02/10] i2c: mux: pca9541: switch to i2c_lock_bus(..., I2C_LOCK_SEGMENT)
From: Peter Rosin @ 2018-06-20 5:17 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180620051803.12206-1-peda@axentia.se>
Locking the root adapter for __i2c_transfer will deadlock if the
device sits behind a mux-locked I2C mux. Switch to the finer-grained
i2c_lock_bus with the I2C_LOCK_SEGMENT flag. If the device does not
sit behind a mux-locked mux, the two locking variants are equivalent.
Signed-off-by: Peter Rosin <peda@axentia.se>
---
drivers/i2c/muxes/i2c-mux-pca9541.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/i2c/muxes/i2c-mux-pca9541.c b/drivers/i2c/muxes/i2c-mux-pca9541.c
index 6a39adaf433f..bc7c8cee5a8c 100644
--- a/drivers/i2c/muxes/i2c-mux-pca9541.c
+++ b/drivers/i2c/muxes/i2c-mux-pca9541.c
@@ -345,11 +345,11 @@ static int pca9541_probe(struct i2c_client *client,
/*
* I2C accesses are unprotected here.
- * We have to lock the adapter before releasing the bus.
+ * We have to lock the I2C segment before releasing the bus.
*/
- i2c_lock_adapter(adap);
+ i2c_lock_bus(adap, I2C_LOCK_SEGMENT);
pca9541_release_bus(client);
- i2c_unlock_adapter(adap);
+ i2c_unlock_bus(adap, I2C_LOCK_SEGMENT);
/* Create mux adapter */
--
2.11.0
^ permalink raw reply related
* [PATCH v2 01/10] tpm/tpm_i2c_infineon: switch to i2c_lock_bus(..., I2C_LOCK_SEGMENT)
From: Peter Rosin @ 2018-06-20 5:17 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180620051803.12206-1-peda@axentia.se>
Locking the root adapter for __i2c_transfer will deadlock if the
device sits behind a mux-locked I2C mux. Switch to the finer-grained
i2c_lock_bus with the I2C_LOCK_SEGMENT flag. If the device does not
sit behind a mux-locked mux, the two locking variants are equivalent.
Signed-off-by: Peter Rosin <peda@axentia.se>
---
drivers/char/tpm/tpm_i2c_infineon.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/char/tpm/tpm_i2c_infineon.c b/drivers/char/tpm/tpm_i2c_infineon.c
index 6116cd05e228..9086edc9066b 100644
--- a/drivers/char/tpm/tpm_i2c_infineon.c
+++ b/drivers/char/tpm/tpm_i2c_infineon.c
@@ -117,7 +117,7 @@ static int iic_tpm_read(u8 addr, u8 *buffer, size_t len)
/* Lock the adapter for the duration of the whole sequence. */
if (!tpm_dev.client->adapter->algo->master_xfer)
return -EOPNOTSUPP;
- i2c_lock_adapter(tpm_dev.client->adapter);
+ i2c_lock_bus(tpm_dev.client->adapter, I2C_LOCK_SEGMENT);
if (tpm_dev.chip_type == SLB9645) {
/* use a combined read for newer chips
@@ -192,7 +192,7 @@ static int iic_tpm_read(u8 addr, u8 *buffer, size_t len)
}
out:
- i2c_unlock_adapter(tpm_dev.client->adapter);
+ i2c_unlock_bus(tpm_dev.client->adapter, I2C_LOCK_SEGMENT);
/* take care of 'guard time' */
usleep_range(SLEEP_DURATION_LOW, SLEEP_DURATION_HI);
@@ -224,7 +224,7 @@ static int iic_tpm_write_generic(u8 addr, u8 *buffer, size_t len,
if (!tpm_dev.client->adapter->algo->master_xfer)
return -EOPNOTSUPP;
- i2c_lock_adapter(tpm_dev.client->adapter);
+ i2c_lock_bus(tpm_dev.client->adapter, I2C_LOCK_SEGMENT);
/* prepend the 'register address' to the buffer */
tpm_dev.buf[0] = addr;
@@ -243,7 +243,7 @@ static int iic_tpm_write_generic(u8 addr, u8 *buffer, size_t len,
usleep_range(sleep_low, sleep_hi);
}
- i2c_unlock_adapter(tpm_dev.client->adapter);
+ i2c_unlock_bus(tpm_dev.client->adapter, I2C_LOCK_SEGMENT);
/* take care of 'guard time' */
usleep_range(SLEEP_DURATION_LOW, SLEEP_DURATION_HI);
--
2.11.0
^ permalink raw reply related
* [PATCH v2 00/10] Split i2c_lock_adapter into i2c_lock_root and i2c_lock_segment
From: Peter Rosin @ 2018-06-20 5:17 UTC (permalink / raw)
To: linux-arm-kernel
Hi!
With the introduction of mux-locked I2C muxes, the concept of
locking only a segment of the I2C adapter tree was added. At the
time, I did not want to cause a lot of extra churn, so left most
users of i2c_lock_adapter alone and apparently didn't think enough
about it; they simply continued to lock the whole adapter tree.
However, i2c_lock_adapter is in fact wrong for almost every caller
(there is naturally an exception) that is itself not a driver for
a root adapter. What normal drivers generally want is to only
lock the segment of the adapter tree that their device sits on.
In fact, if a device sits behind a mux-locked I2C mux, and its
driver calls i2c_lock_adapter followed by an unlocked I2C transfer,
things will deadlock (since even a mux-locked I2C adapter will lock
its parent at some point). If the device is not sitting behind a
mux-locked I2C mux (i.e. either directly on the root adapter or
behind a (chain of) parent-locked I2C muxes) the root/segment
distinction is of no consequence; the root adapter is locked either
way.
Mux-locked I2C muxes are probably not that common, and putting any
of the affected devices behind one is probably even rarer, which
is why we have not seen any deadlocks. At least not that I know
of...
Since silently changing the semantics of i2c_lock_adapter might
be quite a surprise, especially for out-of-tree users, this series
instead removes the function and forces all users to explicitly
name I2C_LOCK_SEGMENT or I2C_LOCK_ROOT_ADAPTER in a call to
i2c_lock_bus, as suggested by Wolfram. Yes, users will be a teensy
bit more wordy, but open-coding I2C locking from random drivers
should be avoided, so it's perhaps a good thing if it doesn't look
too neat?
I suggest that Wolfram takes this series through the I2C tree and
creates an immutable branch for the other subsystems. The series
is based on v4.18-r1.
I do not have *any* of the affected devices, and have thus only
done build tests.
Cheers,
Peter
PS. for more background on mux-locked vs. parent-locked etc, see
Documentation/i2c/i2c-topology
Changes since v1:
- rebased to v4.18-rc1, thus removing the i2c-tegra hunk from
the last patch
- Not adding i2c_lock_segment (et al) and remove i2c_lock_adapter
instead of renaming it to i2c_lock_root, since having 8 closely
related inline locking functions in include/linux/i2c.h was
a few too many. I.e., instead going from 5 to 8, we are now
going from 5 to 3.
Peter Rosin (10):
tpm/tpm_i2c_infineon: switch to i2c_lock_bus(..., I2C_LOCK_SEGMENT)
i2c: mux: pca9541: switch to i2c_lock_bus(..., I2C_LOCK_SEGMENT)
input: rohm_bu21023: switch to i2c_lock_bus(..., I2C_LOCK_SEGMENT)
media: af9013: switch to i2c_lock_bus(..., I2C_LOCK_SEGMENT)
media: drxk_hard: switch to i2c_lock_bus(..., I2C_LOCK_SEGMENT)
media: rtl2830: switch to i2c_lock_bus(..., I2C_LOCK_SEGMENT)
media: tda1004x: switch to i2c_lock_bus(..., I2C_LOCK_SEGMENT)
media: tda18271: switch to i2c_lock_bus(..., I2C_LOCK_SEGMENT)
mfd: 88pm860x-i2c: switch to i2c_lock_bus(..., I2C_LOCK_SEGMENT)
i2c: remove i2c_lock_adapter and use i2c_lock_bus directly
drivers/char/tpm/tpm_i2c_infineon.c | 8 +++----
drivers/i2c/busses/i2c-brcmstb.c | 8 +++----
drivers/i2c/busses/i2c-davinci.c | 4 ++--
drivers/i2c/busses/i2c-gpio.c | 40 ++++++++++++++++----------------
drivers/i2c/busses/i2c-s3c2410.c | 4 ++--
drivers/i2c/busses/i2c-sprd.c | 8 +++----
drivers/i2c/i2c-core-slave.c | 8 +++----
drivers/i2c/muxes/i2c-mux-pca9541.c | 6 ++---
drivers/iio/temperature/mlx90614.c | 4 ++--
drivers/input/touchscreen/rohm_bu21023.c | 4 ++--
drivers/media/dvb-frontends/af9013.c | 8 +++----
drivers/media/dvb-frontends/drxk_hard.c | 4 ++--
drivers/media/dvb-frontends/rtl2830.c | 12 +++++-----
drivers/media/dvb-frontends/tda1004x.c | 6 ++---
drivers/media/tuners/tda18271-common.c | 8 +++----
drivers/mfd/88pm860x-i2c.c | 8 +++----
include/linux/i2c.h | 12 ----------
17 files changed, 70 insertions(+), 82 deletions(-)
--
2.11.0
^ permalink raw reply
* [PATCH V2 5/5] PCI: Unify slot and bus reset API
From: kbuild test robot @ 2018-06-20 5:17 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1529467995-28780-5-git-send-email-okaya@codeaurora.org>
Hi Sinan,
I love your patch! Yet something to improve:
[auto build test ERROR on pci/next]
[also build test ERROR on v4.18-rc1 next-20180619]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/Sinan-Kaya/PCI-handle-error-return-from-pci_reset_bridge_secondary_bus/20180620-121648
base: https://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci.git next
config: x86_64-allyesconfig (attached as .config)
compiler: gcc-7 (Debian 7.3.0-16) 7.3.0
reproduce:
# save the attached .config to linux build tree
make ARCH=x86_64
All errors (new ones prefixed by >>):
drivers/infiniband//hw/hfi1/pcie.c: In function 'trigger_sbr':
>> drivers/infiniband//hw/hfi1/pcie.c:908:23: error: passing argument 1 of 'pci_reset_bus' from incompatible pointer type [-Werror=incompatible-pointer-types]
return pci_reset_bus(dev->bus);
^~~
In file included from drivers/infiniband//hw/hfi1/pcie.c:48:0:
include/linux/pci.h:1099:5: note: expected 'struct pci_dev *' but argument is of type 'struct pci_bus *'
int pci_reset_bus(struct pci_dev *dev);
^~~~~~~~~~~~~
cc1: some warnings being treated as errors
vim +/pci_reset_bus +908 drivers/infiniband//hw/hfi1/pcie.c
77241056 drivers/staging/rdma/hfi1/pcie.c Mike Marciniszyn 2015-07-30 873
77241056 drivers/staging/rdma/hfi1/pcie.c Mike Marciniszyn 2015-07-30 874 /*
77241056 drivers/staging/rdma/hfi1/pcie.c Mike Marciniszyn 2015-07-30 875 * Trigger a secondary bus reset (SBR) on ourselves using our parent.
77241056 drivers/staging/rdma/hfi1/pcie.c Mike Marciniszyn 2015-07-30 876 *
77241056 drivers/staging/rdma/hfi1/pcie.c Mike Marciniszyn 2015-07-30 877 * Based on pci_parent_bus_reset() which is not exported by the
77241056 drivers/staging/rdma/hfi1/pcie.c Mike Marciniszyn 2015-07-30 878 * kernel core.
77241056 drivers/staging/rdma/hfi1/pcie.c Mike Marciniszyn 2015-07-30 879 */
77241056 drivers/staging/rdma/hfi1/pcie.c Mike Marciniszyn 2015-07-30 880 static int trigger_sbr(struct hfi1_devdata *dd)
77241056 drivers/staging/rdma/hfi1/pcie.c Mike Marciniszyn 2015-07-30 881 {
77241056 drivers/staging/rdma/hfi1/pcie.c Mike Marciniszyn 2015-07-30 882 struct pci_dev *dev = dd->pcidev;
77241056 drivers/staging/rdma/hfi1/pcie.c Mike Marciniszyn 2015-07-30 883 struct pci_dev *pdev;
77241056 drivers/staging/rdma/hfi1/pcie.c Mike Marciniszyn 2015-07-30 884
77241056 drivers/staging/rdma/hfi1/pcie.c Mike Marciniszyn 2015-07-30 885 /* need a parent */
77241056 drivers/staging/rdma/hfi1/pcie.c Mike Marciniszyn 2015-07-30 886 if (!dev->bus->self) {
77241056 drivers/staging/rdma/hfi1/pcie.c Mike Marciniszyn 2015-07-30 887 dd_dev_err(dd, "%s: no parent device\n", __func__);
77241056 drivers/staging/rdma/hfi1/pcie.c Mike Marciniszyn 2015-07-30 888 return -ENOTTY;
77241056 drivers/staging/rdma/hfi1/pcie.c Mike Marciniszyn 2015-07-30 889 }
77241056 drivers/staging/rdma/hfi1/pcie.c Mike Marciniszyn 2015-07-30 890
77241056 drivers/staging/rdma/hfi1/pcie.c Mike Marciniszyn 2015-07-30 891 /* should not be anyone else on the bus */
77241056 drivers/staging/rdma/hfi1/pcie.c Mike Marciniszyn 2015-07-30 892 list_for_each_entry(pdev, &dev->bus->devices, bus_list)
77241056 drivers/staging/rdma/hfi1/pcie.c Mike Marciniszyn 2015-07-30 893 if (pdev != dev) {
77241056 drivers/staging/rdma/hfi1/pcie.c Mike Marciniszyn 2015-07-30 894 dd_dev_err(dd,
77241056 drivers/staging/rdma/hfi1/pcie.c Mike Marciniszyn 2015-07-30 895 "%s: another device is on the same bus\n",
77241056 drivers/staging/rdma/hfi1/pcie.c Mike Marciniszyn 2015-07-30 896 __func__);
77241056 drivers/staging/rdma/hfi1/pcie.c Mike Marciniszyn 2015-07-30 897 return -ENOTTY;
77241056 drivers/staging/rdma/hfi1/pcie.c Mike Marciniszyn 2015-07-30 898 }
77241056 drivers/staging/rdma/hfi1/pcie.c Mike Marciniszyn 2015-07-30 899
77241056 drivers/staging/rdma/hfi1/pcie.c Mike Marciniszyn 2015-07-30 900 /*
77241056 drivers/staging/rdma/hfi1/pcie.c Mike Marciniszyn 2015-07-30 901 * A secondary bus reset (SBR) issues a hot reset to our device.
77241056 drivers/staging/rdma/hfi1/pcie.c Mike Marciniszyn 2015-07-30 902 * The following routine does a 1s wait after the reset is dropped
77241056 drivers/staging/rdma/hfi1/pcie.c Mike Marciniszyn 2015-07-30 903 * per PCI Trhfa (recovery time). PCIe 3.0 section 6.6.1 -
77241056 drivers/staging/rdma/hfi1/pcie.c Mike Marciniszyn 2015-07-30 904 * Conventional Reset, paragraph 3, line 35 also says that a 1s
77241056 drivers/staging/rdma/hfi1/pcie.c Mike Marciniszyn 2015-07-30 905 * delay after a reset is required. Per spec requirements,
77241056 drivers/staging/rdma/hfi1/pcie.c Mike Marciniszyn 2015-07-30 906 * the link is either working or not after that point.
77241056 drivers/staging/rdma/hfi1/pcie.c Mike Marciniszyn 2015-07-30 907 */
f001109e drivers/infiniband/hw/hfi1/pcie.c Sinan Kaya 2018-06-20 @908 return pci_reset_bus(dev->bus);
77241056 drivers/staging/rdma/hfi1/pcie.c Mike Marciniszyn 2015-07-30 909 }
77241056 drivers/staging/rdma/hfi1/pcie.c Mike Marciniszyn 2015-07-30 910
:::::: The code at line 908 was first introduced by commit
:::::: f001109e94b74baebb3621ce1c7ba114a858adb3 IB/hfi1: use pci_reset_bus() for initiating pci secondary bus reset
:::::: TO: Sinan Kaya <okaya@codeaurora.org>
:::::: CC: 0day robot <lkp@intel.com>
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
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^ permalink raw reply
* [PATCH 5/5] arm64: dts: allwinner: h6: enable AXP805 PMIC on Pine H64
From: Chen-Yu Tsai @ 2018-06-20 5:15 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180620051540.25617-1-wens@csie.org>
From: Icenowy Zheng <icenowy@aosc.io>
Pine H64 board has an AXP805 PMIC on it.
Enable it in the device tree.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
.../boot/dts/allwinner/sun50i-h6-pine-h64.dts | 109 ++++++++++++++++++
1 file changed, 109 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts
index 2e97173c9204..1673636358ef 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts
@@ -44,6 +44,115 @@
&r_i2c {
status = "okay";
+ axp805: pmic at 36 {
+ compatible = "x-powers,axp805", "x-powers,axp806";
+ reg = <0x36>;
+ interrupt-parent = <&r_intc>;
+ interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ x-powers,self-working-mode;
+
+ regulators {
+ reg_aldo1: aldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-pl";
+ };
+
+ reg_aldo2: aldo2 {
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-ac200";
+ };
+
+ reg_aldo3: aldo3 {
+ /* This regulator is connected with CLDO1 */
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-3v3-1";
+ };
+
+ reg_bldo1: bldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-bias-pll";
+ };
+
+ reg_bldo2: bldo2 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-efuse-pcie-hdmi-io";
+ };
+
+ reg_bldo3: bldo3 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-dcxoio";
+ };
+
+ bldo4 {
+ /* unused */
+ };
+
+ reg_cldo1: cldo1 {
+ /* This regulator is connected with ALDO3 */
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-3v3-2";
+ };
+
+ reg_cldo2: cldo2 {
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi-1";
+ };
+
+ reg_cldo3: cldo3 {
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi-2";
+ };
+
+ reg_dcdca: dcdca {
+ regulator-always-on;
+ regulator-min-microvolt = <810000>;
+ regulator-max-microvolt = <1080000>;
+ regulator-name = "vdd-cpu";
+ };
+
+ reg_dcdcc: dcdcc {
+ regulator-min-microvolt = <810000>;
+ regulator-max-microvolt = <1080000>;
+ regulator-name = "vdd-gpu";
+ };
+
+ reg_dcdcd: dcdcd {
+ regulator-always-on;
+ regulator-min-microvolt = <960000>;
+ regulator-max-microvolt = <960000>;
+ regulator-name = "vdd-sys";
+ };
+
+ reg_dcdce: dcdce {
+ regulator-always-on;
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-name = "vcc-dram";
+ };
+
+ sw {
+ /* unused */
+ };
+ };
+ };
+
pcf8563: rtc at 51 {
compatible = "nxp,pcf8563";
reg = <0x51>;
--
2.17.1
^ permalink raw reply related
* [PATCH 4/5] arm64: dts: allwinner: h6: Use macros for R_CCU clock and reset indices
From: Chen-Yu Tsai @ 2018-06-20 5:15 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180620051540.25617-1-wens@csie.org>
Now that the device tree binding headers for the R_CCU have been merged,
we can use the macros, instead of raw numbers.
Switch to R_CCU macros for clock and reset indices.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 9 ++++++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
index c72da8cd9ef5..d85070f8c4a2 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
@@ -5,7 +5,9 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/sun50i-h6-ccu.h>
+#include <dt-bindings/clock/sun50i-h6-r-ccu.h>
#include <dt-bindings/reset/sun50i-h6-ccu.h>
+#include <dt-bindings/reset/sun50i-h6-r-ccu.h>
/ {
interrupt-parent = <&gic>;
@@ -198,7 +200,7 @@
reg = <0x07022000 0x400>;
interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&r_ccu 2>, <&osc24M>, <&osc32k>;
+ clocks = <&r_ccu CLK_R_APB1>, <&osc24M>, <&osc32k>;
clock-names = "apb", "hosc", "losc";
gpio-controller;
#gpio-cells = <3>;
@@ -208,6 +210,7 @@
r_i2c_pins: r-i2c {
pins = "PL0", "PL1";
function = "s_i2c";
+ bias-pull-up;
};
};
@@ -215,8 +218,8 @@
compatible = "allwinner,sun6i-a31-i2c";
reg = <0x07081400 0x400>;
interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&r_ccu 8>;
- resets = <&r_ccu 4>;
+ clocks = <&r_ccu CLK_R_APB2_I2C>;
+ resets = <&r_ccu RST_R_APB2_I2C>;
pinctrl-names = "default";
pinctrl-0 = <&r_i2c_pins>;
status = "disabled";
--
2.17.1
^ permalink raw reply related
* [PATCH 3/5] mfd: axp20x: Support AXP806 in I2C mode
From: Chen-Yu Tsai @ 2018-06-20 5:15 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180620051540.25617-1-wens@csie.org>
The Pine64 H64 board uses an AXP806 PMIC in I2C and self-working mode.
The H64 SoC does not have the usual RSB controller.
This patch adds AXP806 to the list of devices supported in I2C mode.
In theory, all RSB-based PMICs can also be used in I2C mode.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
drivers/mfd/axp20x-i2c.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/mfd/axp20x-i2c.c b/drivers/mfd/axp20x-i2c.c
index d35a5fe6c950..a7b7c5423ea5 100644
--- a/drivers/mfd/axp20x-i2c.c
+++ b/drivers/mfd/axp20x-i2c.c
@@ -65,6 +65,7 @@ static const struct of_device_id axp20x_i2c_of_match[] = {
{ .compatible = "x-powers,axp202", .data = (void *)AXP202_ID },
{ .compatible = "x-powers,axp209", .data = (void *)AXP209_ID },
{ .compatible = "x-powers,axp221", .data = (void *)AXP221_ID },
+ { .compatible = "x-powers,axp806", .data = (void *)AXP806_ID },
{ },
};
MODULE_DEVICE_TABLE(of, axp20x_i2c_of_match);
@@ -74,6 +75,7 @@ static const struct i2c_device_id axp20x_i2c_id[] = {
{ "axp202", 0 },
{ "axp209", 0 },
{ "axp221", 0 },
+ { "axp806", 0 },
{ },
};
MODULE_DEVICE_TABLE(i2c, axp20x_i2c_id);
--
2.17.1
^ permalink raw reply related
* [PATCH 2/5] mfd: axp20x: Add self-working mode support for AXP806
From: Chen-Yu Tsai @ 2018-06-20 5:15 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180620051540.25617-1-wens@csie.org>
The AXP806 can operate in a standalone "self-working" mode, in which it
is also responsible for power control of the overall system. This mode
is similar to the master mode, but the EN/PWRON pin functions as a power
button, instead of a level-triggered enable switch.
This patch adds code checking for the new "x-powers,self-working-mode"
property, and a separate mfd_cell list that includes the power button
(PEK) sub-device.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
drivers/mfd/axp20x.c | 30 +++++++++++++++++++++++++++---
1 file changed, 27 insertions(+), 3 deletions(-)
diff --git a/drivers/mfd/axp20x.c b/drivers/mfd/axp20x.c
index 9a2ef3d9b8f8..1988881529a9 100644
--- a/drivers/mfd/axp20x.c
+++ b/drivers/mfd/axp20x.c
@@ -221,6 +221,11 @@ static const struct resource axp803_pek_resources[] = {
DEFINE_RES_IRQ_NAMED(AXP803_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
};
+static const struct resource axp806_pek_resources[] = {
+ DEFINE_RES_IRQ_NAMED(AXP806_IRQ_POK_RISE, "PEK_DBR"),
+ DEFINE_RES_IRQ_NAMED(AXP806_IRQ_POK_FALL, "PEK_DBF"),
+};
+
static const struct resource axp809_pek_resources[] = {
DEFINE_RES_IRQ_NAMED(AXP809_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
DEFINE_RES_IRQ_NAMED(AXP809_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
@@ -730,6 +735,17 @@ static const struct mfd_cell axp803_cells[] = {
{ .name = "axp20x-regulator" },
};
+static const struct mfd_cell axp806_self_working_cells[] = {
+ {
+ .name = "axp221-pek",
+ .num_resources = ARRAY_SIZE(axp806_pek_resources),
+ .resources = axp806_pek_resources,
+ },
+ {
+ .name = "axp20x-regulator",
+ },
+};
+
static const struct mfd_cell axp806_cells[] = {
{
.id = 2,
@@ -842,8 +858,14 @@ int axp20x_match_device(struct axp20x_dev *axp20x)
axp20x->regmap_irq_chip = &axp803_regmap_irq_chip;
break;
case AXP806_ID:
- axp20x->nr_cells = ARRAY_SIZE(axp806_cells);
- axp20x->cells = axp806_cells;
+ if (of_property_read_bool(axp20x->dev->of_node,
+ "x-powers,self-working-mode")) {
+ axp20x->nr_cells = ARRAY_SIZE(axp806_self_working_cells);
+ axp20x->cells = axp806_self_working_cells;
+ } else {
+ axp20x->nr_cells = ARRAY_SIZE(axp806_cells);
+ axp20x->cells = axp806_cells;
+ }
axp20x->regmap_cfg = &axp806_regmap_config;
axp20x->regmap_irq_chip = &axp806_regmap_irq_chip;
break;
@@ -901,7 +923,9 @@ int axp20x_device_probe(struct axp20x_dev *axp20x)
*/
if (axp20x->variant == AXP806_ID) {
if (of_property_read_bool(axp20x->dev->of_node,
- "x-powers,master-mode"))
+ "x-powers,master-mode") ||
+ of_property_read_bool(axp20x->dev->of_node,
+ "x-powers,self-working-mode"))
regmap_write(axp20x->regmap, AXP806_REG_ADDR_EXT,
AXP806_REG_ADDR_EXT_ADDR_MASTER_MODE);
else
--
2.17.1
^ permalink raw reply related
* [PATCH 1/5] dt-bindings: mfd: axp20x: Add "self-working" mode for AXP806
From: Chen-Yu Tsai @ 2018-06-20 5:15 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180620051540.25617-1-wens@csie.org>
The AXP806 has three operation modes:
- master mode: The PMIC is the first or only AXP PMIC in the system,
but is not in charge of power management, i.e. only
provides regulator functions.
- slave mode: The PMIC is the second AXP PMIC in the system, chained
to the first, or master, one.
- self-working mode: The PMIC is the only AXP PMIC in the system, and
is in charge of power sequencing.
The functional differences between these modes can be found in the
"Control and Operation" chapter of the AXP806 (in Chinese) and AXP805
(in English) datasheets. These include how the PMIC responds to external
signals, whether it takes an external voltage reference or uses its own,
and whether the EN/PWRON pin functions as an enable switch or power button.
We already support both slave and master mode. This patch adds a property
for describing the self-working mode, and reworks the description for
the mode properties.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
Documentation/devicetree/bindings/mfd/axp20x.txt | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/mfd/axp20x.txt b/Documentation/devicetree/bindings/mfd/axp20x.txt
index d1762f3b30af..eaaf79c01e1e 100644
--- a/Documentation/devicetree/bindings/mfd/axp20x.txt
+++ b/Documentation/devicetree/bindings/mfd/axp20x.txt
@@ -45,8 +45,11 @@ Optional properties:
board is driving OTG VBus or not.
(axp221 / axp223 / axp803/ axp813 only)
-- x-powers,master-mode: Boolean (axp806 only). Set this when the PMIC is
- wired for master mode. The default is slave mode.
+- x-powers,self-working-mode and
+ x-powers,master-mode: Boolean (axp806 only). Set either of these when the
+ PMIC is wired for self-working mode or master mode.
+ If neither is set then slave mode is assumed.
+ This corresponds to how the MODESET pin is wired.
- <input>-supply: a phandle to the regulator supply node. May be omitted if
inputs are unregulated, such as using the IPSOUT output
--
2.17.1
^ permalink raw reply related
* [PATCH 0/5] arm64: allwinner: h6: Enable AXP805 PMIC on Pine H64
From: Chen-Yu Tsai @ 2018-06-20 5:15 UTC (permalink / raw)
To: linux-arm-kernel
Hi everyone,
This series enables the AXP805 PMIC found on the Pine64 Pine H64 board.
The AXP805 seems to be identical to the AXP806 when comparing datasheets.
The Pine H64 uses the PMIC in stand-alone or "self-working" mode, using
the I2C interface. Neither features are currently supported. This series
adds support for them, and then adds the PMIC to the device tree.
Patch 1 adds a new device tree property to describe the self-working mode
for the AXP806.
Patch 2 adds support for the newly added property to the driver.
Patch 3 adds support for the using AXP806 with I2C.
Patch 4 converts raw clock/reset indices for the H6 R_CCU currently found
in the device tree to macros defined as part of the device tree bindings.
Patch 5 adds the PMIC and its regulators to the Pine H64 device tree.
Please have a look.
Regards
ChenYu
Chen-Yu Tsai (4):
dt-bindings: mfd: axp20x: Add "self-working" mode for AXP806
mfd: axp20x: Add self-working mode support for AXP806
mfd: axp20x: Support AXP806 in I2C mode
arm64: dts: allwinner: h6: Use macros for R_CCU clock and reset
indices
Icenowy Zheng (1):
arm64: dts: allwinner: h6: enable AXP805 PMIC on Pine H64
.../devicetree/bindings/mfd/axp20x.txt | 7 +-
.../boot/dts/allwinner/sun50i-h6-pine-h64.dts | 109 ++++++++++++++++++
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 9 +-
drivers/mfd/axp20x-i2c.c | 2 +
drivers/mfd/axp20x.c | 30 ++++-
5 files changed, 149 insertions(+), 8 deletions(-)
--
2.17.1
^ permalink raw reply
* [PATCH v10 0/2] Initial Allwinner V3s CSI Support
From: Chen-Yu Tsai @ 2018-06-20 4:45 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180530091934.tbd6xbyr5s3ipn3v@paasikivi.fi.intel.com>
On Wed, May 30, 2018 at 5:19 PM, Sakari Ailus
<sakari.ailus@linux.intel.com> wrote:
> On Tue, May 29, 2018 at 11:57:57AM +0200, Maxime Ripard wrote:
>> On Thu, May 17, 2018 at 11:02:24AM +0200, Maxime Ripard wrote:
>> > On Fri, May 04, 2018 at 02:44:08PM +0800, Yong Deng wrote:
>> > > This patchset add initial support for Allwinner V3s CSI.
>> > >
>> > > Allwinner V3s SoC features two CSI module. CSI0 is used for MIPI CSI-2
>> > > interface and CSI1 is used for parallel interface. This is not
>> > > documented in datasheet but by test and guess.
>> > >
>> > > This patchset implement a v4l2 framework driver and add a binding
>> > > documentation for it.
>> > >
>> > > Currently, the driver only support the parallel interface. And has been
>> > > tested with a BT1120 signal which generating from FPGA. The following
>> > > fetures are not support with this patchset:
>> > > - ISP
>> > > - MIPI-CSI2
>> > > - Master clock for camera sensor
>> > > - Power regulator for the front end IC
>> >
>> > I tested it on my H3 with a parallel camera, and it still works. Thanks!
>> >
>> > Hans, Sakari, any chance this might land in 4.18?
>>
>> Ping?
>
> I'll try to look into this soonish but it seems to be too late for 4.18.
> Sorry about that.
Can we get this into 4.19?
Thanks
ChenYu
^ permalink raw reply
* [PATCH] ARM: mvebu: declare asm symbols as character arrays in pmsu.c
From: Ethan Tuttle @ 2018-06-20 4:31 UTC (permalink / raw)
To: linux-arm-kernel
With CONFIG_FORTIFY_SOURCE, memcpy uses the declared size of operands to
detect buffer overflows. If src or dest is declared as a char, attempts to
copy more than byte will result in a fortify_panic().
Address this problem in mvebu_setup_boot_addr_wa() by declaring
mvebu_boot_wa_start and mvebu_boot_wa_end as character arrays. Also remove
a couple addressof operators to avoid "arithmetic on pointer to an
incomplete type" compiler error.
See commit 54a7d50b9205 ("x86: mark kprobe templates as character arrays,
not single characters") for a similar fix.
Fixes "detected buffer overflow in memcpy" error during init on some mvebu
systems (armada-370-xp, armada-375):
(fortify_panic) from (mvebu_setup_boot_addr_wa+0xb0/0xb4)
(mvebu_setup_boot_addr_wa) from (mvebu_v7_cpu_pm_init+0x154/0x204)
(mvebu_v7_cpu_pm_init) from (do_one_initcall+0x7c/0x1a8)
(do_one_initcall) from (kernel_init_freeable+0x1bc/0x254)
(kernel_init_freeable) from (kernel_init+0x8/0x114)
(kernel_init) from (ret_from_fork+0x14/0x2c)
Signed-off-by: Ethan Tuttle <ethan@ethantuttle.com>
Tested-by: Ethan Tuttle <ethan@ethantuttle.com>
---
arch/arm/mach-mvebu/pmsu.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-mvebu/pmsu.c b/arch/arm/mach-mvebu/pmsu.c
index 27a78c80e5b1..73d5d72dfc3e 100644
--- a/arch/arm/mach-mvebu/pmsu.c
+++ b/arch/arm/mach-mvebu/pmsu.c
@@ -116,8 +116,8 @@ void mvebu_pmsu_set_cpu_boot_addr(int hw_cpu, void *boot_addr)
PMSU_BOOT_ADDR_REDIRECT_OFFSET(hw_cpu));
}
-extern unsigned char mvebu_boot_wa_start;
-extern unsigned char mvebu_boot_wa_end;
+extern unsigned char mvebu_boot_wa_start[];
+extern unsigned char mvebu_boot_wa_end[];
/*
* This function sets up the boot address workaround needed for SMP
@@ -130,7 +130,7 @@ int mvebu_setup_boot_addr_wa(unsigned int crypto_eng_target,
phys_addr_t resume_addr_reg)
{
void __iomem *sram_virt_base;
- u32 code_len = &mvebu_boot_wa_end - &mvebu_boot_wa_start;
+ u32 code_len = mvebu_boot_wa_end - mvebu_boot_wa_start;
mvebu_mbus_del_window(BOOTROM_BASE, BOOTROM_SIZE);
mvebu_mbus_add_window_by_id(crypto_eng_target, crypto_eng_attribute,
--
2.17.1
^ permalink raw reply related
* [PATCH V2 5/5] PCI: Unify slot and bus reset API
From: Sinan Kaya @ 2018-06-20 4:12 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1529467995-28780-1-git-send-email-okaya@codeaurora.org>
Drivers are expected to call pci_reset_slot() or pci_reset_bus() by
querying if a system supports hotplug or not. A survey showed that most
drivers don't do this and we are leaking hotplug capability to the
user.
Hide pci_slot_reset() from drivers and embed into pci_bus_reset().
Change pci_reset_bus() parameter from struct pci_bus to struct pci_dev.
Signed-off-by: Sinan Kaya <okaya@codeaurora.org>
---
drivers/pci/pci.c | 27 +++++++++++++++++++++++----
include/linux/pci.h | 3 +--
2 files changed, 24 insertions(+), 6 deletions(-)
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 79a1566..a44b948 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -4798,7 +4798,7 @@ EXPORT_SYMBOL_GPL(pci_probe_reset_slot);
*
* Return 0 on success, non-zero on error.
*/
-int pci_reset_slot(struct pci_slot *slot)
+static int __pci_reset_slot(struct pci_slot *slot)
{
int rc;
@@ -4814,7 +4814,6 @@ int pci_reset_slot(struct pci_slot *slot)
return rc;
}
-EXPORT_SYMBOL_GPL(pci_reset_slot);
/**
* __pci_try_reset_slot - Try to reset a PCI slot
@@ -4878,7 +4877,7 @@ int pci_probe_reset_bus(struct pci_bus *bus)
EXPORT_SYMBOL_GPL(pci_probe_reset_bus);
/**
- * pci_reset_bus - reset a PCI bus
+ * __pci_reset_bus - reset a PCI bus
* @bus: top level PCI bus to reset
*
* Do a bus reset on the given bus and any subordinate buses, saving
@@ -4886,7 +4885,7 @@ EXPORT_SYMBOL_GPL(pci_probe_reset_bus);
*
* Return 0 on success, non-zero on error.
*/
-int pci_reset_bus(struct pci_bus *bus)
+static int __pci_reset_bus(struct pci_bus *bus)
{
int rc;
@@ -4902,6 +4901,26 @@ int pci_reset_bus(struct pci_bus *bus)
return rc;
}
+
+/**
+ * pci_reset_bus - reset a PCI bus
+ * @pdev: top level PCI device to reset via slot/bus
+ *
+ * Do a slot/bus reset on the given bus and any subordinate buses, saving
+ * and restoring state of all devices.
+ *
+ * Return 0 on success, non-zero on error.
+ */
+int pci_reset_bus(struct pci_dev *pdev)
+{
+ bool slot = false;
+
+ if (!pci_probe_reset_slot(pdev->slot))
+ slot = true;
+
+ return slot ? __pci_reset_slot(pdev->slot) :
+ __pci_reset_bus(pdev->bus);
+}
EXPORT_SYMBOL_GPL(pci_reset_bus);
/**
diff --git a/include/linux/pci.h b/include/linux/pci.h
index f5c85b6..e68ca2e 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -1095,9 +1095,8 @@ int pci_reset_function(struct pci_dev *dev);
int pci_reset_function_locked(struct pci_dev *dev);
int pci_try_reset_function(struct pci_dev *dev);
int pci_probe_reset_slot(struct pci_slot *slot);
-int pci_reset_slot(struct pci_slot *slot);
int pci_probe_reset_bus(struct pci_bus *bus);
-int pci_reset_bus(struct pci_bus *bus);
+int pci_reset_bus(struct pci_dev *dev);
int pci_try_reset_bus(struct pci_dev *dev);
void pci_reset_secondary_bus(struct pci_dev *dev);
void pcibios_reset_secondary_bus(struct pci_dev *dev);
--
2.7.4
^ permalink raw reply related
* [PATCH V2 4/5] PCI: Unify try slot and bus reset API
From: Sinan Kaya @ 2018-06-20 4:12 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1529467995-28780-1-git-send-email-okaya@codeaurora.org>
Drivers are expected to call pci_try_reset_slot() or pci_try_reset_bus() by
querying if a system supports hotplug or not. A survey showed that most
drivers don't do this and we are leaking hotplug capability to the user.
Hide pci_try_slot_reset() from drivers and embed into pci_try_bus_reset().
Change pci_try_reset_bus() parameter from struct pci_bus to struct pci_dev.
Signed-off-by: Sinan Kaya <okaya@codeaurora.org>
---
drivers/pci/pci.c | 26 +++++++++++++++++++++-----
drivers/vfio/pci/vfio_pci.c | 6 ++----
include/linux/pci.h | 3 +--
3 files changed, 24 insertions(+), 11 deletions(-)
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 236220c..79a1566 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -4817,12 +4817,12 @@ int pci_reset_slot(struct pci_slot *slot)
EXPORT_SYMBOL_GPL(pci_reset_slot);
/**
- * pci_try_reset_slot - Try to reset a PCI slot
+ * __pci_try_reset_slot - Try to reset a PCI slot
* @slot: PCI slot to reset
*
* Same as above except return -EAGAIN if the slot cannot be locked
*/
-int pci_try_reset_slot(struct pci_slot *slot)
+static int __pci_try_reset_slot(struct pci_slot *slot)
{
int rc;
@@ -4843,7 +4843,6 @@ int pci_try_reset_slot(struct pci_slot *slot)
return rc;
}
-EXPORT_SYMBOL_GPL(pci_try_reset_slot);
static int pci_bus_reset(struct pci_bus *bus, int probe)
{
@@ -4906,12 +4905,12 @@ int pci_reset_bus(struct pci_bus *bus)
EXPORT_SYMBOL_GPL(pci_reset_bus);
/**
- * pci_try_reset_bus - Try to reset a PCI bus
+ * __pci_try_reset_bus - Try to reset a PCI bus
* @bus: top level PCI bus to reset
*
* Same as above except return -EAGAIN if the bus cannot be locked
*/
-int pci_try_reset_bus(struct pci_bus *bus)
+static int __pci_try_reset_bus(struct pci_bus *bus)
{
int rc;
@@ -4932,6 +4931,23 @@ int pci_try_reset_bus(struct pci_bus *bus)
return rc;
}
+
+/**
+ * pci_try_reset_bus - Try to reset a PCI bus
+ * @pdev: top level PCI device to reset via slot/bus
+ *
+ * Same as above except return -EAGAIN if the bus cannot be locked
+ */
+int pci_try_reset_bus(struct pci_dev *pdev)
+{
+ bool slot = false;
+
+ if (!pci_probe_reset_slot(pdev->slot))
+ slot = true;
+
+ return slot ? __pci_try_reset_slot(pdev->slot) :
+ __pci_try_reset_bus(pdev->bus);
+}
EXPORT_SYMBOL_GPL(pci_try_reset_bus);
/**
diff --git a/drivers/vfio/pci/vfio_pci.c b/drivers/vfio/pci/vfio_pci.c
index b423a30..71018ec 100644
--- a/drivers/vfio/pci/vfio_pci.c
+++ b/drivers/vfio/pci/vfio_pci.c
@@ -1010,8 +1010,7 @@ static long vfio_pci_ioctl(void *device_data,
&info, slot);
if (!ret)
/* User has access, do the reset */
- ret = slot ? pci_try_reset_slot(vdev->pdev->slot) :
- pci_try_reset_bus(vdev->pdev->bus);
+ ret = pci_try_reset_bus(vdev->pdev);
hot_reset_release:
for (i--; i >= 0; i--)
@@ -1373,8 +1372,7 @@ static void vfio_pci_try_bus_reset(struct vfio_pci_device *vdev)
}
if (needs_reset)
- ret = slot ? pci_try_reset_slot(vdev->pdev->slot) :
- pci_try_reset_bus(vdev->pdev->bus);
+ ret = pci_try_reset_bus(vdev->pdev);
put_devs:
for (i = 0; i < devs.cur_index; i++) {
diff --git a/include/linux/pci.h b/include/linux/pci.h
index 6b12ce2..f5c85b6 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -1096,10 +1096,9 @@ int pci_reset_function_locked(struct pci_dev *dev);
int pci_try_reset_function(struct pci_dev *dev);
int pci_probe_reset_slot(struct pci_slot *slot);
int pci_reset_slot(struct pci_slot *slot);
-int pci_try_reset_slot(struct pci_slot *slot);
int pci_probe_reset_bus(struct pci_bus *bus);
int pci_reset_bus(struct pci_bus *bus);
-int pci_try_reset_bus(struct pci_bus *bus);
+int pci_try_reset_bus(struct pci_dev *dev);
void pci_reset_secondary_bus(struct pci_dev *dev);
void pcibios_reset_secondary_bus(struct pci_dev *dev);
void pci_update_resource(struct pci_dev *dev, int resno);
--
2.7.4
^ permalink raw reply related
* [PATCH V2 3/5] PCI: Hide pci_reset_bridge_secondary_bus() from drivers
From: Sinan Kaya @ 2018-06-20 4:12 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1529467995-28780-1-git-send-email-okaya@codeaurora.org>
Rename pci_reset_bridge_secondary_bus() to pci_bridge_secondary_bus_reset()
and move the declartation from linux/pci.h to drivers/pci.h to be used
internally in PCI directory only.
Signed-off-by: Sinan Kaya <okaya@codeaurora.org>
---
drivers/pci/hotplug/pciehp_hpc.c | 2 +-
drivers/pci/pci.c | 11 +++++------
drivers/pci/pci.h | 1 +
drivers/pci/pcie/aer.c | 2 +-
drivers/pci/pcie/err.c | 2 +-
include/linux/pci.h | 1 -
6 files changed, 9 insertions(+), 10 deletions(-)
diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c
index bbaa211..8dae232 100644
--- a/drivers/pci/hotplug/pciehp_hpc.c
+++ b/drivers/pci/hotplug/pciehp_hpc.c
@@ -746,7 +746,7 @@ int pciehp_reset_slot(struct slot *slot, int probe)
if (pciehp_poll_mode)
del_timer_sync(&ctrl->poll_timer);
- rc = pci_reset_bridge_secondary_bus(ctrl->pcie->port);
+ rc = pci_bridge_secondary_bus_reset(ctrl->pcie->port);
pcie_capability_write_word(pdev, PCI_EXP_SLTSTA, stat_mask);
pcie_write_cmd_nowait(ctrl, ctrl_mask, ctrl_mask);
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 98d1490..236220c 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -4224,19 +4224,18 @@ void __weak pcibios_reset_secondary_bus(struct pci_dev *dev)
}
/**
- * pci_reset_bridge_secondary_bus - Reset the secondary bus on a PCI bridge.
+ * pci_bridge_secondary_bus_reset - Reset the secondary bus on a PCI bridge.
* @dev: Bridge device
*
* Use the bridge control register to assert reset on the secondary bus.
* Devices on the secondary bus are left in power-on state.
*/
-int pci_reset_bridge_secondary_bus(struct pci_dev *dev)
+int pci_bridge_secondary_bus_reset(struct pci_dev *dev)
{
pcibios_reset_secondary_bus(dev);
return pci_dev_wait(dev, "bus reset", PCIE_RESET_READY_POLL_MS);
}
-EXPORT_SYMBOL_GPL(pci_reset_bridge_secondary_bus);
static int pci_parent_bus_reset(struct pci_dev *dev, int probe)
{
@@ -4253,7 +4252,7 @@ static int pci_parent_bus_reset(struct pci_dev *dev, int probe)
if (probe)
return 0;
- return pci_reset_bridge_secondary_bus(dev->bus->self);
+ return pci_bridge_secondary_bus_reset(dev->bus->self);
}
static int pci_reset_hotplug_slot(struct hotplug_slot *hotplug, int probe)
@@ -4860,7 +4859,7 @@ static int pci_bus_reset(struct pci_bus *bus, int probe)
might_sleep();
- ret = pci_reset_bridge_secondary_bus(bus->self);
+ ret = pci_bridge_secondary_bus_reset(bus->self);
pci_bus_unlock(bus);
@@ -4924,7 +4923,7 @@ int pci_try_reset_bus(struct pci_bus *bus)
if (pci_bus_trylock(bus)) {
might_sleep();
- rc = pci_reset_bridge_secondary_bus(bus->self);
+ rc = pci_bridge_secondary_bus_reset(bus->self);
pci_bus_unlock(bus);
} else
rc = -EAGAIN;
diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h
index c358e7a0..f784263 100644
--- a/drivers/pci/pci.h
+++ b/drivers/pci/pci.h
@@ -33,6 +33,7 @@ int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vmai,
enum pci_mmap_api mmap_api);
int pci_probe_reset_function(struct pci_dev *dev);
+int pci_bridge_secondary_bus_reset(struct pci_dev *dev);
/**
* struct pci_platform_pm_ops - Firmware PM callbacks
diff --git a/drivers/pci/pcie/aer.c b/drivers/pci/pcie/aer.c
index f1d0f3e..74ea6ec 100644
--- a/drivers/pci/pcie/aer.c
+++ b/drivers/pci/pcie/aer.c
@@ -1314,7 +1314,7 @@ static pci_ers_result_t aer_root_reset(struct pci_dev *dev)
reg32 &= ~ROOT_PORT_INTR_ON_MESG_MASK;
pci_write_config_dword(dev, pos + PCI_ERR_ROOT_COMMAND, reg32);
- rc = pci_reset_bridge_secondary_bus(dev);
+ rc = pci_bridge_secondary_bus_reset(dev);
pci_printk(KERN_DEBUG, dev, "Root Port link has been reset\n");
/* Clear Root Error Status */
diff --git a/drivers/pci/pcie/err.c b/drivers/pci/pcie/err.c
index 3a62a2e..a3a26f1 100644
--- a/drivers/pci/pcie/err.c
+++ b/drivers/pci/pcie/err.c
@@ -177,7 +177,7 @@ static pci_ers_result_t default_reset_link(struct pci_dev *dev)
{
int rc;
- rc = pci_reset_bridge_secondary_bus(dev);
+ rc = pci_bridge_secondary_bus_reset(dev);
pci_printk(KERN_DEBUG, dev, "downstream link has been reset\n");
return !rc ? PCI_ERS_RESULT_RECOVERED : PCI_ERS_RESULT_DISCONNECT;
}
diff --git a/include/linux/pci.h b/include/linux/pci.h
index 340029b..6b12ce2 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -1102,7 +1102,6 @@ int pci_reset_bus(struct pci_bus *bus);
int pci_try_reset_bus(struct pci_bus *bus);
void pci_reset_secondary_bus(struct pci_dev *dev);
void pcibios_reset_secondary_bus(struct pci_dev *dev);
-int pci_reset_bridge_secondary_bus(struct pci_dev *dev);
void pci_update_resource(struct pci_dev *dev, int resno);
int __must_check pci_assign_resource(struct pci_dev *dev, int i);
int __must_check pci_reassign_resource(struct pci_dev *dev, int i, resource_size_t add_size, resource_size_t align);
--
2.7.4
^ permalink raw reply related
* [PATCH V2 2/5] IB/hfi1: use pci_reset_bus() for initiating pci secondary bus reset
From: Sinan Kaya @ 2018-06-20 4:12 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1529467995-28780-1-git-send-email-okaya@codeaurora.org>
Getting ready to hide pci_reset_bridge_secondary_bus() from the drivers.
pci_reset_bridge_secondary_bus() should only be used internally by the
PCI code itself.
Other drivers should rely on higher level pci_reset_xxx() API.
Signed-off-by: Sinan Kaya <okaya@codeaurora.org>
---
drivers/infiniband/hw/hfi1/pcie.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/infiniband/hw/hfi1/pcie.c b/drivers/infiniband/hw/hfi1/pcie.c
index 4d4371b..a6d695a 100644
--- a/drivers/infiniband/hw/hfi1/pcie.c
+++ b/drivers/infiniband/hw/hfi1/pcie.c
@@ -905,9 +905,7 @@ static int trigger_sbr(struct hfi1_devdata *dd)
* delay after a reset is required. Per spec requirements,
* the link is either working or not after that point.
*/
- pci_reset_bridge_secondary_bus(dev->bus->self);
-
- return 0;
+ return pci_reset_bus(dev->bus);
}
/*
--
2.7.4
^ permalink raw reply related
* [PATCH V2 1/5] PCI: handle error return from pci_reset_bridge_secondary_bus()
From: Sinan Kaya @ 2018-06-20 4:12 UTC (permalink / raw)
To: linux-arm-kernel
commit 01fd61c0b9bd ("PCI: Add a return type for
pci_reset_bridge_secondary_bus()") added a return value to the function to
return if a device is accessible following a reset. Callers are not
checking the value.
Pass error code up high in the stack if device is not accessible.
Signed-off-by: Sinan Kaya <okaya@codeaurora.org>
---
drivers/pci/hotplug/pciehp_hpc.c | 5 +++--
drivers/pci/pci.c | 12 ++++++------
drivers/pci/pcie/aer.c | 5 +++--
drivers/pci/pcie/err.c | 6 ++++--
4 files changed, 16 insertions(+), 12 deletions(-)
diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c
index 718b607..bbaa211 100644
--- a/drivers/pci/hotplug/pciehp_hpc.c
+++ b/drivers/pci/hotplug/pciehp_hpc.c
@@ -728,6 +728,7 @@ int pciehp_reset_slot(struct slot *slot, int probe)
struct controller *ctrl = slot->ctrl;
struct pci_dev *pdev = ctrl_dev(ctrl);
u16 stat_mask = 0, ctrl_mask = 0;
+ int rc;
if (probe)
return 0;
@@ -745,7 +746,7 @@ int pciehp_reset_slot(struct slot *slot, int probe)
if (pciehp_poll_mode)
del_timer_sync(&ctrl->poll_timer);
- pci_reset_bridge_secondary_bus(ctrl->pcie->port);
+ rc = pci_reset_bridge_secondary_bus(ctrl->pcie->port);
pcie_capability_write_word(pdev, PCI_EXP_SLTSTA, stat_mask);
pcie_write_cmd_nowait(ctrl, ctrl_mask, ctrl_mask);
@@ -753,7 +754,7 @@ int pciehp_reset_slot(struct slot *slot, int probe)
pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, ctrl_mask);
if (pciehp_poll_mode)
int_poll_timeout(&ctrl->poll_timer);
- return 0;
+ return rc;
}
int pcie_init_notification(struct controller *ctrl)
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 97acba7..98d1490 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -4253,9 +4253,7 @@ static int pci_parent_bus_reset(struct pci_dev *dev, int probe)
if (probe)
return 0;
- pci_reset_bridge_secondary_bus(dev->bus->self);
-
- return 0;
+ return pci_reset_bridge_secondary_bus(dev->bus->self);
}
static int pci_reset_hotplug_slot(struct hotplug_slot *hotplug, int probe)
@@ -4850,6 +4848,8 @@ EXPORT_SYMBOL_GPL(pci_try_reset_slot);
static int pci_bus_reset(struct pci_bus *bus, int probe)
{
+ int ret;
+
if (!bus->self || !pci_bus_resetable(bus))
return -ENOTTY;
@@ -4860,11 +4860,11 @@ static int pci_bus_reset(struct pci_bus *bus, int probe)
might_sleep();
- pci_reset_bridge_secondary_bus(bus->self);
+ ret = pci_reset_bridge_secondary_bus(bus->self);
pci_bus_unlock(bus);
- return 0;
+ return ret;
}
/**
@@ -4924,7 +4924,7 @@ int pci_try_reset_bus(struct pci_bus *bus)
if (pci_bus_trylock(bus)) {
might_sleep();
- pci_reset_bridge_secondary_bus(bus->self);
+ rc = pci_reset_bridge_secondary_bus(bus->self);
pci_bus_unlock(bus);
} else
rc = -EAGAIN;
diff --git a/drivers/pci/pcie/aer.c b/drivers/pci/pcie/aer.c
index a2e8838..f1d0f3e 100644
--- a/drivers/pci/pcie/aer.c
+++ b/drivers/pci/pcie/aer.c
@@ -1305,6 +1305,7 @@ static pci_ers_result_t aer_root_reset(struct pci_dev *dev)
{
u32 reg32;
int pos;
+ int rc;
pos = dev->aer_cap;
@@ -1313,7 +1314,7 @@ static pci_ers_result_t aer_root_reset(struct pci_dev *dev)
reg32 &= ~ROOT_PORT_INTR_ON_MESG_MASK;
pci_write_config_dword(dev, pos + PCI_ERR_ROOT_COMMAND, reg32);
- pci_reset_bridge_secondary_bus(dev);
+ rc = pci_reset_bridge_secondary_bus(dev);
pci_printk(KERN_DEBUG, dev, "Root Port link has been reset\n");
/* Clear Root Error Status */
@@ -1325,7 +1326,7 @@ static pci_ers_result_t aer_root_reset(struct pci_dev *dev)
reg32 |= ROOT_PORT_INTR_ON_MESG_MASK;
pci_write_config_dword(dev, pos + PCI_ERR_ROOT_COMMAND, reg32);
- return PCI_ERS_RESULT_RECOVERED;
+ return !rc ? PCI_ERS_RESULT_RECOVERED : PCI_ERS_RESULT_DISCONNECT;
}
/**
diff --git a/drivers/pci/pcie/err.c b/drivers/pci/pcie/err.c
index f7ce0cb..3a62a2e 100644
--- a/drivers/pci/pcie/err.c
+++ b/drivers/pci/pcie/err.c
@@ -175,9 +175,11 @@ static int report_resume(struct pci_dev *dev, void *data)
*/
static pci_ers_result_t default_reset_link(struct pci_dev *dev)
{
- pci_reset_bridge_secondary_bus(dev);
+ int rc;
+
+ rc = pci_reset_bridge_secondary_bus(dev);
pci_printk(KERN_DEBUG, dev, "downstream link has been reset\n");
- return PCI_ERS_RESULT_RECOVERED;
+ return !rc ? PCI_ERS_RESULT_RECOVERED : PCI_ERS_RESULT_DISCONNECT;
}
static pci_ers_result_t reset_link(struct pci_dev *dev, u32 service)
--
2.7.4
^ permalink raw reply related
* [PATCH 1/2] arm64: avoid alloc memory on offline node
From: Xie XiuQi @ 2018-06-20 3:31 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180619163256.GA18952@e107981-ln.cambridge.arm.com>
Hi Lorenzo, Punit,
On 2018/6/20 0:32, Lorenzo Pieralisi wrote:
> On Tue, Jun 19, 2018 at 04:35:40PM +0100, Punit Agrawal wrote:
>> Michal Hocko <mhocko@kernel.org> writes:
>>
>>> On Tue 19-06-18 15:54:26, Punit Agrawal wrote:
>>> [...]
>>>> In terms of $SUBJECT, I wonder if it's worth taking the original patch
>>>> as a temporary fix (it'll also be easier to backport) while we work on
>>>> fixing these other issues and enabling memoryless nodes.
>>>
>>> Well, x86 already does that but copying this antipatern is not really
>>> nice. So it is good as a quick fix but it would be definitely much
>>> better to have a robust fix. Who knows how many other places might hit
>>> this. You certainly do not want to add a hack like this all over...
>>
>> Completely agree! I was only suggesting it as a temporary measure,
>> especially as it looked like a proper fix might be invasive.
>>
>> Another fix might be to change the node specific allocation to node
>> agnostic allocations. It isn't clear why the allocation is being
>> requested from a specific node. I think Lorenzo suggested this in one of
>> the threads.
>
> I think that code was just copypasted but it is better to fix the
> underlying issue.
>
>> I've started putting together a set fixing the issues identified in this
>> thread. It should give a better idea on the best course of action.
>
> On ACPI ARM64, this diff should do if I read the code correctly, it
> should be (famous last words) just a matter of mapping PXMs to nodes for
> every SRAT GICC entry, feel free to pick it up if it works.
>
> Yes, we can take the original patch just because it is safer for an -rc
> cycle even though if the patch below would do delaying the fix for a
> couple of -rc (to get it tested across ACPI ARM64 NUMA platforms) is
> not a disaster.
I tested this patch on my arm board, it works.
--
Thanks,
Xie XiuQi
>
> Lorenzo
>
> -- >8 --
> diff --git a/arch/arm64/kernel/acpi_numa.c b/arch/arm64/kernel/acpi_numa.c
> index d190a7b231bf..877b268ef9fa 100644
> --- a/arch/arm64/kernel/acpi_numa.c
> +++ b/arch/arm64/kernel/acpi_numa.c
> @@ -70,12 +70,6 @@ void __init acpi_numa_gicc_affinity_init(struct acpi_srat_gicc_affinity *pa)
> if (!(pa->flags & ACPI_SRAT_GICC_ENABLED))
> return;
>
> - if (cpus_in_srat >= NR_CPUS) {
> - pr_warn_once("SRAT: cpu_to_node_map[%d] is too small, may not be able to use all cpus\n",
> - NR_CPUS);
> - return;
> - }
> -
> pxm = pa->proximity_domain;
> node = acpi_map_pxm_to_node(pxm);
>
> @@ -85,6 +79,14 @@ void __init acpi_numa_gicc_affinity_init(struct acpi_srat_gicc_affinity *pa)
> return;
> }
>
> + node_set(node, numa_nodes_parsed);
> +
> + if (cpus_in_srat >= NR_CPUS) {
> + pr_warn_once("SRAT: cpu_to_node_map[%d] is too small, may not be able to use all cpus\n",
> + NR_CPUS);
> + return;
> + }
> +
> mpidr = acpi_map_madt_entry(pa->acpi_processor_uid);
> if (mpidr == PHYS_CPUID_INVALID) {
> pr_err("SRAT: PXM %d with ACPI ID %d has no valid MPIDR in MADT\n",
> @@ -95,7 +97,6 @@ void __init acpi_numa_gicc_affinity_init(struct acpi_srat_gicc_affinity *pa)
>
> early_node_cpu_hwid[cpus_in_srat].node_id = node;
> early_node_cpu_hwid[cpus_in_srat].cpu_hwid = mpidr;
> - node_set(node, numa_nodes_parsed);
> cpus_in_srat++;
> pr_info("SRAT: PXM %d -> MPIDR 0x%Lx -> Node %d\n",
> pxm, mpidr, node);
>
> .
>
^ permalink raw reply
* [PATCH V2] PCI: Enable PASID when End-to-End TLP is supported by all bridges
From: Sinan Kaya @ 2018-06-20 3:04 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <dafc272d-0748-90ee-5d34-be5b2a2e5725@codeaurora.org>
On 6/19/2018 11:02 PM, Timur Tabi wrote:
> On 6/19/18 9:14 PM, Sinan Kaya wrote:
>> +??? if (!(cap & PCI_EXP_DEVCAP2_E2ETLP))
>> +??????? return;
>> +
>> +??? dev->eetlp_prefix = 1;
>
> How about:
>
> ????if (cap & PCI_EXP_DEVCAP2_E2ETLP)
> ??????? dev->eetlp_prefix = 1;
>
Both works. I'll wait until I get more feedback.
--
Sinan Kaya
Qualcomm Datacenter Technologies, Inc. as an affiliate of Qualcomm Technologies, Inc.
Qualcomm Technologies, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project.
^ permalink raw reply
* [PATCH V2] PCI: Enable PASID when End-to-End TLP is supported by all bridges
From: Timur Tabi @ 2018-06-20 3:02 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1529460886-23722-1-git-send-email-okaya@codeaurora.org>
On 6/19/18 9:14 PM, Sinan Kaya wrote:
> + if (!(cap & PCI_EXP_DEVCAP2_E2ETLP))
> + return;
> +
> + dev->eetlp_prefix = 1;
How about:
if (cap & PCI_EXP_DEVCAP2_E2ETLP)
dev->eetlp_prefix = 1;
--
Qualcomm Datacenter Technologies, Inc. as an affiliate of Qualcomm
Technologies, Inc. Qualcomm Technologies, Inc. is a member of the
Code Aurora Forum, a Linux Foundation Collaborative Project.
^ permalink raw reply
* [PATCH V3 0/4] clk: new APIs to handle all available clocks
From: A.s. Dong @ 2018-06-20 2:53 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1527244643-10736-1-git-send-email-aisheng.dong@nxp.com>
Ping....
> -----Original Message-----
> From: A.s. Dong
> Sent: Friday, May 25, 2018 6:37 PM
> To: linux-clk at vger.kernel.org
> Cc: linux-kernel at vger.kernel.org; linux-arm-kernel at lists.infradead.org;
> sboyd at kernel.org; mturquette at baylibre.com; shawnguo at kernel.org; dl-
> linux-imx <linux-imx@nxp.com>; A.s. Dong <aisheng.dong@nxp.com>
> Subject: [PATCH V3 0/4] clk: new APIs to handle all available clocks
>
> This patch series is a continue of discussion from here,
> https://patchwork.kernel.org/patch/9986293/
> that some users may want to handle all available clocks from device tree
> without need to know the detailed clock information likes clock numbers and
> names. This is useful in writing some generic drivers to handle clock part.
>
> Note:
> This patch series is tested on MX6Q SDB cpufreq driver with a minor change
> to switch to use clk_bulk_get_all.
> But patch 4 only test compiling. Hopefully someone could help test the
> function.
>
> v2->v3:
> * address all comments from Stephen
> * fix build warnings on other architectures.
> v1->v2:
> * add clk_bulk_{get|put}_all() which only supports DT platform currently
> * remove _all variants and the wrapper struct clk_bulk
> * make of_clk_bulk_get and of_clk_bulk_get_all private until someone
> proves they need it because they don't have a struct device pointer.
>
> Dong Aisheng (4):
> clk: bulk: add of_clk_bulk_get()
> clk: add new APIs to operate on all available clocks
> clk: add managed version of clk_bulk_get_all
> video: simplefb: switch to use clk_bulk API to simplify clock
> operations
>
> drivers/clk/clk-bulk.c | 80
> ++++++++++++++++++++++++++++++++++++++++++
> drivers/clk/clk-devres.c | 24 +++++++++++++
> drivers/video/fbdev/simplefb.c | 66 +++++++---------------------------
> include/linux/clk.h | 65 +++++++++++++++++++++++++++++++++-
> 4 files changed, 180 insertions(+), 55 deletions(-)
>
> --
> 2.7.4
^ permalink raw reply
* [PATCH v2] net: ethernet: stmmac: dwmac-rk: Add GMAC support for PX30
From: David Wu @ 2018-06-20 2:40 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <2582999.2hZx6CH9S6@diego>
Hi Heiko,
? 2018?06?14? 16:30, Heiko St?bner ??:
> Am Donnerstag, 14. Juni 2018, 10:14:31 CEST schrieb David Wu:
>> Hi Heiko,
>>
>> ? 2018?06?14? 15:54, Heiko St?bner ??:
>>> I don't see that new clock documented in the dt-binding.
>>> Also, which clock from the clock-controller does this connect to?
>>
>> The clock is the "SCLK_GMAC_RMII" at the clock-controller, which could
>> be set rate by the link speed.
>
> Hmm, while these huge number of clocks are somewhat strange,
> shouldn't it be named something with _rmii instead of _speed then?
Okay, it is better to be named _speed.
>
> Also, I don't see any clk_enable action for that new clock, so you could
> end up with being off?
The new speed is the parent of the clk_tx_rx, to enable/disable
clk_tx_rx, the new clock would be also enabled/disabled.
>
> And someone could convert the driver to use the new clk-bulk APIs [0],
> so the large number of clk_prepare_enable calls would be a bit
> trimmed down.
>
>
> Heiko
>
> [0] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/clk/clk-bulk.c
>
>
>
>
>
^ permalink raw reply
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