* Re: [PATCH] arm64: dts: amlogic: g12 CPU timers stop in suspend
From: Neil Armstrong @ 2019-08-12 7:50 UTC (permalink / raw)
To: Kevin Hilman, linux-amlogic; +Cc: Kevin Hilman, linux-arm-kernel
In-Reply-To: <20190808170510.4141-1-khilman@kernel.org>
On 08/08/2019 19:05, Kevin Hilman wrote:
> From: Kevin Hilman <khilman@baylibre.com>
>
> The Arm per-CPU architected timers stop ticking in suspend, when the
> SCP powers down the CPUs. Flag that in the DT.
>
> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
> ---
> Applies on my v5.4/dt64 branch
>
> arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
> index 27bb242dc95d..cd3d23d2c6a2 100644
> --- a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
> +++ b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
> @@ -2407,6 +2407,7 @@
> (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
> <GIC_PPI 10
> (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>;
> + arm,no-tick-in-suspend;
> };
>
> xtal: xtal-clk {
>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
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^ permalink raw reply
* [PATCH v2] arm64: dts: meson-g12b-khadas-vim3: add initial device-tree
From: Neil Armstrong @ 2019-08-12 7:48 UTC (permalink / raw)
To: khilman
Cc: linux-amlogic, Christian Hewitt, linux-kernel, linux-arm-kernel,
Neil Armstrong
From: Christian Hewitt <christianshewitt@gmail.com>
The Khadas VIM3 uses the Amlogic S922X or A311S SoC, both based on the
Amlogic G12B SoC family, on a board with the same form factor as the
VIM/VIM2 models. It ships in two variants; basic and
pro which differ in RAM and eMMC size:
- 2GB (basic) or 4GB (pro) LPDDR4 RAM
- 16GB (basic) or 32GB (pro) eMMC 5.1 storage
- 16MB SPI flash
- 10/100/1000 Base-T Ethernet
- AP6398S Wireless (802.11 a/b/g/n/ac, BT5.0)
- HDMI 2.1 video
- 1x USB 2.0 + 1x USB 3.0 ports
- 1x USB-C (power) with USB 2.0 OTG
- 3x LED's (1x red, 1x blue, 1x white)
- 3x buttons (power, function, reset)
- IR receiver
- M2 socket with PCIe, USB, ADC & I2C
- 40pin GPIO Header
- 1x micro SD card slot
A common meson-g12b-khadas-vim3.dtsi is added to support both S922X and
A311D SoCs supported by two variants of the board.
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
Changes since v1 at [1]:
- Changed default memory size to 2GiB
- Added "sys" to white led name
- Added ethernet PHY interrupt line (the reset line is unclear for now)
[1] https://patchwork.kernel.org/patch/11067793/
arch/arm64/boot/dts/amlogic/Makefile | 2 +
.../amlogic/meson-g12b-a311d-khadas-vim3.dts | 15 +
.../dts/amlogic/meson-g12b-khadas-vim3.dtsi | 544 ++++++++++++++++++
.../amlogic/meson-g12b-s922x-khadas-vim3.dts | 15 +
4 files changed, 576 insertions(+)
create mode 100644 arch/arm64/boot/dts/amlogic/meson-g12b-a311d-khadas-vim3.dts
create mode 100644 arch/arm64/boot/dts/amlogic/meson-g12b-khadas-vim3.dtsi
create mode 100644 arch/arm64/boot/dts/amlogic/meson-g12b-s922x-khadas-vim3.dts
diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile
index 07b861fe5fa5..ae5e8d0c08da 100644
--- a/arch/arm64/boot/dts/amlogic/Makefile
+++ b/arch/arm64/boot/dts/amlogic/Makefile
@@ -3,6 +3,8 @@ dtb-$(CONFIG_ARCH_MESON) += meson-axg-s400.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-g12a-sei510.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-g12a-u200.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-g12a-x96-max.dtb
+dtb-$(CONFIG_ARCH_MESON) += meson-g12b-a311d-khadas-vim3.dtb
+dtb-$(CONFIG_ARCH_MESON) += meson-g12b-s922x-khadas-vim3.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-g12b-odroid-n2.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-nanopi-k2.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-nexbox-a95x.dtb
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-a311d-khadas-vim3.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-a311d-khadas-vim3.dts
new file mode 100644
index 000000000000..73128ed24361
--- /dev/null
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-a311d-khadas-vim3.dts
@@ -0,0 +1,15 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 BayLibre, SAS
+ * Author: Neil Armstrong <narmstrong@baylibre.com>
+ * Copyright (c) 2019 Christian Hewitt <christianshewitt@gmail.com>
+ */
+
+/dts-v1/;
+
+#include "meson-g12b-a311d.dtsi"
+#include "meson-g12b-khadas-vim3.dtsi"
+
+/ {
+ compatible = "khadas,vim3", "amlogic,a311d", "amlogic,g12b";
+};
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-khadas-vim3.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b-khadas-vim3.dtsi
new file mode 100644
index 000000000000..9c3ca2edc725
--- /dev/null
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-khadas-vim3.dtsi
@@ -0,0 +1,544 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 BayLibre, SAS
+ * Author: Neil Armstrong <narmstrong@baylibre.com>
+ * Copyright (c) 2019 Christian Hewitt <christianshewitt@gmail.com>
+ */
+
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/gpio/meson-g12a-gpio.h>
+#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
+
+/ {
+ model = "Khadas VIM3";
+
+ aliases {
+ serial0 = &uart_AO;
+ ethernet0 = ðmac;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x0 0x0 0x80000000>;
+ };
+
+ adc-keys {
+ compatible = "adc-keys";
+ io-channels = <&saradc 2>;
+ io-channel-names = "buttons";
+ keyup-threshold-microvolt = <1710000>;
+
+ button-function {
+ label = "Function";
+ linux,code = <KEY_FN>;
+ press-threshold-microvolt = <10000>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ white {
+ label = "vim3:white:sys";
+ gpios = <&gpio_ao GPIOAO_4 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "heartbeat";
+ };
+
+ red {
+ label = "vim3:red";
+ gpios = <&gpio_expander 5 GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ emmc_pwrseq: emmc-pwrseq {
+ compatible = "mmc-pwrseq-emmc";
+ reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
+ };
+
+ gpio-keys-polled {
+ compatible = "gpio-keys-polled";
+ poll-interval = <100>;
+
+ power-button {
+ label = "power";
+ linux,code = <KEY_POWER>;
+ gpios = <&gpio_ao GPIOAO_7 GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ sdio_pwrseq: sdio-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
+ clocks = <&wifi32k>;
+ clock-names = "ext_clock";
+ };
+
+ dc_in: regulator-dc_in {
+ compatible = "regulator-fixed";
+ regulator-name = "DC_IN";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ };
+
+ vcc_5v: regulator-vcc_5v {
+ compatible = "regulator-fixed";
+ regulator-name = "VCC_5V";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&dc_in>;
+
+ gpio = <&gpio GPIOH_8 GPIO_OPEN_DRAIN>;
+ enable-active-high;
+ };
+
+ vcc_1v8: regulator-vcc_1v8 {
+ compatible = "regulator-fixed";
+ regulator-name = "VCC_1V8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ vin-supply = <&vcc_3v3>;
+ regulator-always-on;
+ };
+
+ vcc_3v3: regulator-vcc_3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "VCC_3V3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&vsys_3v3>;
+ regulator-always-on;
+ /* FIXME: actually controlled by VDDCPU_B_EN */
+ };
+
+ vddcpu_a: regulator-vddcpu-a {
+ /*
+ * MP8756GD Regulator.
+ */
+ compatible = "pwm-regulator";
+
+ regulator-name = "VDDCPU_A";
+ regulator-min-microvolt = <690000>;
+ regulator-max-microvolt = <1050000>;
+
+ vin-supply = <&dc_in>;
+
+ pwms = <&pwm_ab 0 1250 0>;
+ pwm-dutycycle-range = <100 0>;
+
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ vddcpu_b: regulator-vddcpu-b {
+ /*
+ * Silergy SY8030DEC Regulator.
+ */
+ compatible = "pwm-regulator";
+
+ regulator-name = "VDDCPU_B";
+ regulator-min-microvolt = <690000>;
+ regulator-max-microvolt = <1050000>;
+
+ vin-supply = <&vsys_3v3>;
+
+ pwms = <&pwm_AO_cd 1 1250 0>;
+ pwm-dutycycle-range = <100 0>;
+
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ vddao_1v8: regulator-vddao_1v8 {
+ compatible = "regulator-fixed";
+ regulator-name = "VDDIO_AO1V8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ vin-supply = <&vsys_3v3>;
+ regulator-always-on;
+ };
+
+ emmc_1v8: regulator-emmc_1v8 {
+ compatible = "regulator-fixed";
+ regulator-name = "EMMC_AO1V8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ vin-supply = <&vcc_3v3>;
+ regulator-always-on;
+ };
+
+ vsys_3v3: regulator-vsys_3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "VSYS_3V3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&dc_in>;
+ regulator-always-on;
+ };
+
+ usb_pwr: regulator-usb_pwr {
+ compatible = "regulator-fixed";
+ regulator-name = "USB_PWR";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&vcc_5v>;
+
+ gpio = <&gpio GPIOA_6 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
+ hdmi-connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_connector_in: endpoint {
+ remote-endpoint = <&hdmi_tx_tmds_out>;
+ };
+ };
+ };
+
+ wifi32k: wifi32k {
+ compatible = "pwm-clock";
+ #clock-cells = <0>;
+ clock-frequency = <32768>;
+ pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
+ };
+
+ sound {
+ compatible = "amlogic,axg-sound-card";
+ model = "G12A-KHADAS-VIM3";
+ audio-aux-devs = <&tdmout_b>;
+ audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
+ "TDMOUT_B IN 1", "FRDDR_B OUT 1",
+ "TDMOUT_B IN 2", "FRDDR_C OUT 1",
+ "TDM_B Playback", "TDMOUT_B OUT";
+
+ assigned-clocks = <&clkc CLKID_MPLL2>,
+ <&clkc CLKID_MPLL0>,
+ <&clkc CLKID_MPLL1>;
+ assigned-clock-parents = <0>, <0>, <0>;
+ assigned-clock-rates = <294912000>,
+ <270950400>,
+ <393216000>;
+ status = "okay";
+
+ dai-link-0 {
+ sound-dai = <&frddr_a>;
+ };
+
+ dai-link-1 {
+ sound-dai = <&frddr_b>;
+ };
+
+ dai-link-2 {
+ sound-dai = <&frddr_c>;
+ };
+
+ /* 8ch hdmi interface */
+ dai-link-3 {
+ sound-dai = <&tdmif_b>;
+ dai-format = "i2s";
+ dai-tdm-slot-tx-mask-0 = <1 1>;
+ dai-tdm-slot-tx-mask-1 = <1 1>;
+ dai-tdm-slot-tx-mask-2 = <1 1>;
+ dai-tdm-slot-tx-mask-3 = <1 1>;
+ mclk-fs = <256>;
+
+ codec {
+ sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
+ };
+ };
+
+ /* hdmi glue */
+ dai-link-4 {
+ sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
+
+ codec {
+ sound-dai = <&hdmi_tx>;
+ };
+ };
+ };
+};
+
+&arb {
+ status = "okay";
+};
+
+&cec_AO {
+ pinctrl-0 = <&cec_ao_a_h_pins>;
+ pinctrl-names = "default";
+ status = "disabled";
+ hdmi-phandle = <&hdmi_tx>;
+};
+
+&cecb_AO {
+ pinctrl-0 = <&cec_ao_b_h_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+ hdmi-phandle = <&hdmi_tx>;
+};
+
+&clkc_audio {
+ status = "okay";
+};
+
+&cpu0 {
+ cpu-supply = <&vddcpu_b>;
+ operating-points-v2 = <&cpu_opp_table_0>;
+ clocks = <&clkc CLKID_CPU_CLK>;
+ clock-latency = <50000>;
+};
+
+&cpu1 {
+ cpu-supply = <&vddcpu_b>;
+ operating-points-v2 = <&cpu_opp_table_0>;
+ clocks = <&clkc CLKID_CPU_CLK>;
+ clock-latency = <50000>;
+};
+
+&cpu100 {
+ cpu-supply = <&vddcpu_a>;
+ operating-points-v2 = <&cpub_opp_table_1>;
+ clocks = <&clkc CLKID_CPUB_CLK>;
+ clock-latency = <50000>;
+};
+
+&cpu101 {
+ cpu-supply = <&vddcpu_a>;
+ operating-points-v2 = <&cpub_opp_table_1>;
+ clocks = <&clkc CLKID_CPUB_CLK>;
+ clock-latency = <50000>;
+};
+
+&cpu102 {
+ cpu-supply = <&vddcpu_a>;
+ operating-points-v2 = <&cpub_opp_table_1>;
+ clocks = <&clkc CLKID_CPUB_CLK>;
+ clock-latency = <50000>;
+};
+
+&cpu103 {
+ cpu-supply = <&vddcpu_a>;
+ operating-points-v2 = <&cpub_opp_table_1>;
+ clocks = <&clkc CLKID_CPUB_CLK>;
+ clock-latency = <50000>;
+};
+
+&ext_mdio {
+ external_phy: ethernet-phy@0 {
+ /* Realtek RTL8211F (0x001cc916) */
+ reg = <0>;
+ max-speed = <1000>;
+
+ interrupt-parent = <&gpio_intc>;
+ /* MAC_INTR on GPIOZ_14 */
+ interrupts = <26 IRQ_TYPE_LEVEL_LOW>;
+ };
+};
+
+ðmac {
+ pinctrl-0 = <ð_pins>, <ð_rgmii_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+ phy-mode = "rgmii";
+ phy-handle = <&external_phy>;
+ amlogic,tx-delay-ns = <2>;
+};
+
+&frddr_a {
+ status = "okay";
+};
+
+&frddr_b {
+ status = "okay";
+};
+
+&frddr_c {
+ status = "okay";
+};
+
+&hdmi_tx {
+ status = "okay";
+ pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>;
+ pinctrl-names = "default";
+ hdmi-supply = <&vcc_5v>;
+};
+
+&hdmi_tx_tmds_port {
+ hdmi_tx_tmds_out: endpoint {
+ remote-endpoint = <&hdmi_connector_in>;
+ };
+};
+
+&i2c_AO {
+ status = "okay";
+ pinctrl-0 = <&i2c_ao_sck_pins>, <&i2c_ao_sda_pins>;
+ pinctrl-names = "default";
+
+ gpio_expander: gpio-controller@20 {
+ compatible = "ti,tca6408";
+ reg = <0x20>;
+ vcc-supply = <&vcc_3v3>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ rtc@51 {
+ compatible = "haoyu,hym8563";
+ reg = <0x51>;
+ #clock-cells = <0>;
+ };
+};
+
+&ir {
+ status = "okay";
+ pinctrl-0 = <&remote_input_ao_pins>;
+ pinctrl-names = "default";
+ linux,rc-map-name = "rc-khadas";
+};
+
+&pwm_ab {
+ pinctrl-0 = <&pwm_a_e_pins>;
+ pinctrl-names = "default";
+ clocks = <&xtal>;
+ clock-names = "clkin0";
+ status = "okay";
+};
+
+&pwm_AO_cd {
+ pinctrl-0 = <&pwm_ao_d_e_pins>;
+ pinctrl-names = "default";
+ clocks = <&xtal>;
+ clock-names = "clkin1";
+ status = "okay";
+};
+
+&pwm_ef {
+ status = "okay";
+ pinctrl-0 = <&pwm_e_pins>;
+ pinctrl-names = "default";
+};
+
+&saradc {
+ status = "okay";
+ vref-supply = <&vddao_1v8>;
+};
+
+/* SDIO */
+&sd_emmc_a {
+ status = "okay";
+ pinctrl-0 = <&sdio_pins>;
+ pinctrl-1 = <&sdio_clk_gate_pins>;
+ pinctrl-names = "default", "clk-gate";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ bus-width = <4>;
+ cap-sd-highspeed;
+ sd-uhs-sdr50;
+ max-frequency = <100000000>;
+
+ non-removable;
+ disable-wp;
+
+ mmc-pwrseq = <&sdio_pwrseq>;
+
+ vmmc-supply = <&vsys_3v3>;
+ vqmmc-supply = <&vddao_1v8>;
+
+ brcmf: wifi@1 {
+ reg = <1>;
+ compatible = "brcm,bcm4329-fmac";
+ };
+};
+
+/* SD card */
+&sd_emmc_b {
+ status = "okay";
+ pinctrl-0 = <&sdcard_c_pins>;
+ pinctrl-1 = <&sdcard_clk_gate_c_pins>;
+ pinctrl-names = "default", "clk-gate";
+
+ bus-width = <4>;
+ cap-sd-highspeed;
+ max-frequency = <50000000>;
+ disable-wp;
+
+ cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
+ vmmc-supply = <&vsys_3v3>;
+ vqmmc-supply = <&vsys_3v3>;
+};
+
+/* eMMC */
+&sd_emmc_c {
+ status = "okay";
+ pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>;
+ pinctrl-1 = <&emmc_clk_gate_pins>;
+ pinctrl-names = "default", "clk-gate";
+
+ bus-width = <8>;
+ cap-mmc-highspeed;
+ mmc-ddr-1_8v;
+ mmc-hs200-1_8v;
+ max-frequency = <200000000>;
+ disable-wp;
+
+ mmc-pwrseq = <&emmc_pwrseq>;
+ vmmc-supply = <&vcc_3v3>;
+ vqmmc-supply = <&emmc_1v8>;
+};
+
+&tdmif_b {
+ status = "okay";
+};
+
+&tdmout_b {
+ status = "okay";
+};
+
+&tohdmitx {
+ status = "okay";
+};
+
+&uart_A {
+ status = "okay";
+ pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
+ pinctrl-names = "default";
+ uart-has-rtscts;
+
+ bluetooth {
+ compatible = "brcm,bcm43438-bt";
+ shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
+ max-speed = <2000000>;
+ clocks = <&wifi32k>;
+ clock-names = "lpo";
+ };
+};
+
+&uart_AO {
+ status = "okay";
+ pinctrl-0 = <&uart_ao_a_pins>;
+ pinctrl-names = "default";
+};
+
+&usb2_phy0 {
+ phy-supply = <&dc_in>;
+};
+
+&usb2_phy1 {
+ phy-supply = <&usb_pwr>;
+};
+
+&usb3_pcie_phy {
+ phy-supply = <&usb_pwr>;
+};
+
+&usb {
+ status = "okay";
+ dr_mode = "peripheral";
+};
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-s922x-khadas-vim3.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-s922x-khadas-vim3.dts
new file mode 100644
index 000000000000..6bcf972b8bfa
--- /dev/null
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-s922x-khadas-vim3.dts
@@ -0,0 +1,15 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 BayLibre, SAS
+ * Author: Neil Armstrong <narmstrong@baylibre.com>
+ * Copyright (c) 2019 Christian Hewitt <christianshewitt@gmail.com>
+ */
+
+/dts-v1/;
+
+#include "meson-g12b-s922x.dtsi"
+#include "meson-g12b-khadas-vim3.dtsi"
+
+/ {
+ compatible = "khadas,vim3", "amlogic,s922x", "amlogic,g12b";
+};
--
2.22.0
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* Re: [PATCH 03/14] mfd: ab3100-core: convert to i2c_new_dummy_device
From: Lee Jones @ 2019-08-12 7:46 UTC (permalink / raw)
To: Wolfram Sang; +Cc: Linus Walleij, linux-i2c, linux-arm-kernel, linux-kernel
In-Reply-To: <20190722172623.4166-4-wsa+renesas@sang-engineering.com>
On Mon, 22 Jul 2019, Wolfram Sang wrote:
> Move from i2c_new_dummy() to i2c_new_dummy_device(), so we now get an
> ERRPTR which we use in error handling.
>
> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
> ---
>
> Generated with coccinelle. Build tested by me and buildbot. Not tested on HW.
>
> drivers/mfd/ab3100-core.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
Applied, thanks.
--
Lee Jones [李琼斯]
Linaro Services Technical Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog
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* Re: [linux-sunxi] [PATCH v8 0/4] Add support for Orange Pi 3
From: Jernej Škrabec @ 2019-08-12 7:44 UTC (permalink / raw)
To: linux-sunxi, megous
Cc: Mark Rutland, devicetree, Maxime Ripard, linux-kernel, dri-devel,
David Airlie, Chen-Yu Tsai, Rob Herring, Daniel Vetter,
linux-arm-kernel
In-Reply-To: <20190806155744.10263-1-megous@megous.com>
Dne torek, 06. avgust 2019 ob 17:57:39 CEST je megous@megous.com napisal(a):
> From: Ondrej Jirman <megous@megous.com>
>
> This series implements support for Xunlong Orange Pi 3 board. There
> are only a few patches remaining.
>
> - ethernet support - just a DT change (patch 1)
> - HDMI support (patches 2-4)
>
> For some people, ethernet doesn't work after reboot because u-boot doesn't
> support AXP805 PMIC, and will not turn off the etherent PHY regulators.
> So the regulator controlled by gpio will be shut down, but the other one
> controlled by the AXP PMIC will not.
>
> This is a problem only when running with a builtin driver. This needs
> to be fixed in u-boot.
>
>
> Please take a look.
Is there anything missing? It would be nice to get this in 5.4. There is a lot
of H6 boards which needs DDC bus enable mechanism (part of H6 reference
design), including Beelink GS1 which already has HDMI node in mainline kernel
DT, but due to disabled DDC lines works only with 1024x768 (fallback
resolution in DRM core).
Best regards,
Jernej
>
> thank you and regards,
> Ondrej Jirman
>
> Changes in v8:
> - added reviewed-by tags
> - dropped already applied patches
> - added more info about the phy initialization issue after reset
>
> Changes in v7:
> - dropped stored reference to connector_pdev as suggested by Jernej
> - added forgotten dt-bindings reviewed-by tag
>
> Changes in v6:
> - added dt-bindings reviewed-by tag
> - fix wording in stmmac commit (as suggested by Sergei)
>
> Changes in v5:
> - dropped already applied patches (pinctrl patches, mmc1 pinconf patch)
> - rename GMAC-3V3 -> GMAC-3V to match the schematic (Jagan)
> - changed hdmi-connector's ddc-supply property to ddc-en-gpios
> (Rob Herring)
>
> Changes in v4:
> - fix checkpatch warnings/style issues
> - use enum in struct sunxi_desc_function for io_bias_cfg_variant
> - collected acked-by's
> - fix compile error in drivers/pinctrl/sunxi/pinctrl-sun9i-a80-r.c:156
> caused by missing conversion from has_io_bias_cfg struct member
> (I've kept the acked-by, because it's a trivial change, but feel free
> to object.) (reported by Martin A. on github)
> I did not have A80 pinctrl enabled for some reason, so I did not catch
> this sooner.
> - dropped brcm firmware patch (was already applied)
> - dropped the wifi dts patch (will re-send after H6 RTC gets merged,
> along with bluetooth support, in a separate series)
>
> Changes in v3:
> - dropped already applied patches
> - changed pinctrl I/O bias selection constants to enum and renamed
> - added /omit-if-no-ref/ to mmc1_pins
> - made mmc1_pins default pinconf for mmc1 in H6 dtsi
> - move ddc-supply to HDMI connector node, updated patch descriptions,
> changed dt-bindings docs
>
> Changes in v2:
> - added dt-bindings documentation for the board's compatible string
> (suggested by Clement)
> - addressed checkpatch warnings and code formatting issues (on Maxime's
> suggestions)
> - stmmac: dropped useless parenthesis, reworded description of the patch
> (suggested by Sergei)
> - drop useles dev_info() about the selected io bias voltage
> - docummented io voltage bias selection variant macros
> - wifi: marked WiFi DTS patch and realted mmc1_pins as "DO NOT MERGE",
> because wifi depends on H6 RTC support that's not merged yet (suggested
> by Clement)
> - added missing signed-of-bys
> - changed &usb2otg dr_mode to otg, and added a note about VBUS
> - improved wording of HDMI driver's DDC power supply patch
>
> Ondrej Jirman (4):
> arm64: dts: allwinner: orange-pi-3: Enable ethernet
> dt-bindings: display: hdmi-connector: Support DDC bus enable
> drm: sun4i: Add support for enabling DDC I2C bus to sun8i_dw_hdmi glue
> arm64: dts: allwinner: orange-pi-3: Enable HDMI output
>
> .../display/connector/hdmi-connector.txt | 1 +
> .../dts/allwinner/sun50i-h6-orangepi-3.dts | 70 +++++++++++++++++++
> drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c | 54 ++++++++++++--
> drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h | 2 +
> 4 files changed, 123 insertions(+), 4 deletions(-)
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* [PATCH 5/5] can: xilinx_can: Fix the data phase btr1 calculation
From: Appana Durga Kedareswara rao @ 2019-08-12 7:28 UTC (permalink / raw)
To: wg, mkl, davem, michal.simek
Cc: netdev, Srinivas Neeli, linux-kernel, linux-arm-kernel, linux-can
In-Reply-To: <1565594914-18999-1-git-send-email-appana.durga.rao@xilinx.com>
From: Srinivas Neeli <srinivas.neeli@xilinx.com>
While calculating bitrate for the data phase, the driver is using phase
segment 1 of the arbitration phase instead of the data phase.
Signed-off-by: Srinivas Neeli <srinivas.neeli@xilinx.com>
Acked-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---
drivers/net/can/xilinx_can.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/can/xilinx_can.c b/drivers/net/can/xilinx_can.c
index 4cb8c1c9..ab26691 100644
--- a/drivers/net/can/xilinx_can.c
+++ b/drivers/net/can/xilinx_can.c
@@ -425,7 +425,7 @@ static int xcan_set_bittiming(struct net_device *ndev)
btr0 = dbt->brp - 1;
/* Setting Time Segment 1 in BTR Register */
- btr1 = dbt->prop_seg + bt->phase_seg1 - 1;
+ btr1 = dbt->prop_seg + dbt->phase_seg1 - 1;
/* Setting Time Segment 2 in BTR Register */
btr1 |= (dbt->phase_seg2 - 1) << priv->devtype.btr_ts2_shift;
--
2.7.4
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* [PATCH 2/5] can: xilinx_can: Fix FSR register handling in the rx path
From: Appana Durga Kedareswara rao @ 2019-08-12 7:28 UTC (permalink / raw)
To: wg, mkl, davem, michal.simek
Cc: netdev, Appana Durga Kedareswara rao, linux-kernel,
linux-arm-kernel, linux-can
In-Reply-To: <1565594914-18999-1-git-send-email-appana.durga.rao@xilinx.com>
After commit c223da689324 ("can: xilinx_can: Add support for
CANFD FD frames") Driver is updating the FSR IRI index multiple
times(i.e in xcanfd_rx() and xcan_rx_fifo_get_next_frame()),
It should be updated once per rx packet this patch fixes this issue,
also this patch removes the unnecessary fsr register checks in
xcanfd_rx() API.
Reviewed-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
Reviewed-by: Shubhrajyoti Datta <Shubhrajyoti.datta@xilinx.com>
Signed-off-by: Appana Durga Kedareswara rao <appana.durga.rao@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---
drivers/net/can/xilinx_can.c | 139 ++++++++++++++++++++-----------------------
1 file changed, 63 insertions(+), 76 deletions(-)
diff --git a/drivers/net/can/xilinx_can.c b/drivers/net/can/xilinx_can.c
index ac175ab..2d3399e 100644
--- a/drivers/net/can/xilinx_can.c
+++ b/drivers/net/can/xilinx_can.c
@@ -819,91 +819,78 @@ static int xcanfd_rx(struct net_device *ndev, int frame_base)
u32 id_xcan, dlc, data[2] = {0, 0}, dwindex = 0, i, fsr, readindex;
fsr = priv->read_reg(priv, XCAN_FSR_OFFSET);
- if (fsr & XCAN_FSR_FL_MASK) {
- readindex = fsr & XCAN_FSR_RI_MASK;
- id_xcan = priv->read_reg(priv,
- XCAN_FRAME_ID_OFFSET(frame_base));
- dlc = priv->read_reg(priv, XCAN_FRAME_DLC_OFFSET(frame_base));
- if (dlc & XCAN_DLCR_EDL_MASK)
- skb = alloc_canfd_skb(ndev, &cf);
- else
- skb = alloc_can_skb(ndev, (struct can_frame **)&cf);
+ readindex = fsr & XCAN_FSR_RI_MASK;
+ id_xcan = priv->read_reg(priv, XCAN_FRAME_ID_OFFSET(frame_base));
+ dlc = priv->read_reg(priv, XCAN_FRAME_DLC_OFFSET(frame_base));
+ if (dlc & XCAN_DLCR_EDL_MASK)
+ skb = alloc_canfd_skb(ndev, &cf);
+ else
+ skb = alloc_can_skb(ndev, (struct can_frame **)&cf);
- if (unlikely(!skb)) {
- stats->rx_dropped++;
- return 0;
- }
+ if (unlikely(!skb)) {
+ stats->rx_dropped++;
+ return 0;
+ }
- /* Change Xilinx CANFD data length format to socketCAN data
- * format
- */
- if (dlc & XCAN_DLCR_EDL_MASK)
- cf->len = can_dlc2len((dlc & XCAN_DLCR_DLC_MASK) >>
+ /* Change Xilinx CANFD data length format to socketCAN data
+ * format
+ */
+ if (dlc & XCAN_DLCR_EDL_MASK)
+ cf->len = can_dlc2len((dlc & XCAN_DLCR_DLC_MASK) >>
+ XCAN_DLCR_DLC_SHIFT);
+ else
+ cf->len = get_can_dlc((dlc & XCAN_DLCR_DLC_MASK) >>
XCAN_DLCR_DLC_SHIFT);
- else
- cf->len = get_can_dlc((dlc & XCAN_DLCR_DLC_MASK) >>
- XCAN_DLCR_DLC_SHIFT);
-
- /* Change Xilinx CAN ID format to socketCAN ID format */
- if (id_xcan & XCAN_IDR_IDE_MASK) {
- /* The received frame is an Extended format frame */
- cf->can_id = (id_xcan & XCAN_IDR_ID1_MASK) >> 3;
- cf->can_id |= (id_xcan & XCAN_IDR_ID2_MASK) >>
- XCAN_IDR_ID2_SHIFT;
- cf->can_id |= CAN_EFF_FLAG;
- if (id_xcan & XCAN_IDR_RTR_MASK)
- cf->can_id |= CAN_RTR_FLAG;
- } else {
- /* The received frame is a standard format frame */
- cf->can_id = (id_xcan & XCAN_IDR_ID1_MASK) >>
- XCAN_IDR_ID1_SHIFT;
- if (!(dlc & XCAN_DLCR_EDL_MASK) && (id_xcan &
- XCAN_IDR_SRR_MASK))
- cf->can_id |= CAN_RTR_FLAG;
- }
- /* Check the frame received is FD or not*/
- if (dlc & XCAN_DLCR_EDL_MASK) {
- for (i = 0; i < cf->len; i += 4) {
- if (priv->devtype.flags & XCAN_FLAG_CANFD_2)
- data[0] = priv->read_reg(priv,
+ /* Change Xilinx CAN ID format to socketCAN ID format */
+ if (id_xcan & XCAN_IDR_IDE_MASK) {
+ /* The received frame is an Extended format frame */
+ cf->can_id = (id_xcan & XCAN_IDR_ID1_MASK) >> 3;
+ cf->can_id |= (id_xcan & XCAN_IDR_ID2_MASK) >>
+ XCAN_IDR_ID2_SHIFT;
+ cf->can_id |= CAN_EFF_FLAG;
+ if (id_xcan & XCAN_IDR_RTR_MASK)
+ cf->can_id |= CAN_RTR_FLAG;
+ } else {
+ /* The received frame is a standard format frame */
+ cf->can_id = (id_xcan & XCAN_IDR_ID1_MASK) >>
+ XCAN_IDR_ID1_SHIFT;
+ if (!(dlc & XCAN_DLCR_EDL_MASK) && (id_xcan &
+ XCAN_IDR_SRR_MASK))
+ cf->can_id |= CAN_RTR_FLAG;
+ }
+
+ /* Check the frame received is FD or not*/
+ if (dlc & XCAN_DLCR_EDL_MASK) {
+ for (i = 0; i < cf->len; i += 4) {
+ if (priv->devtype.flags & XCAN_FLAG_CANFD_2)
+ data[0] = priv->read_reg(priv,
(XCAN_RXMSG_2_FRAME_OFFSET(readindex) +
(dwindex * XCANFD_DW_BYTES)));
- else
- data[0] = priv->read_reg(priv,
+ else
+ data[0] = priv->read_reg(priv,
(XCAN_RXMSG_FRAME_OFFSET(readindex) +
- (dwindex * XCANFD_DW_BYTES)));
- *(__be32 *)(cf->data + i) =
- cpu_to_be32(data[0]);
- dwindex++;
- }
- } else {
- for (i = 0; i < cf->len; i += 4) {
- if (priv->devtype.flags & XCAN_FLAG_CANFD_2)
- data[0] = priv->read_reg(priv,
- XCAN_RXMSG_2_FRAME_OFFSET(readindex) + i);
- else
- data[0] = priv->read_reg(priv,
- XCAN_RXMSG_FRAME_OFFSET(readindex) + i);
- *(__be32 *)(cf->data + i) =
- cpu_to_be32(data[0]);
- }
+ (dwindex * XCANFD_DW_BYTES)));
+ *(__be32 *)(cf->data + i) = cpu_to_be32(data[0]);
+ dwindex++;
+ }
+ } else {
+ for (i = 0; i < cf->len; i += 4) {
+ if (priv->devtype.flags & XCAN_FLAG_CANFD_2)
+ data[0] = priv->read_reg(priv,
+ XCAN_RXMSG_2_FRAME_OFFSET(readindex) +
+ i);
+ else
+ data[0] = priv->read_reg(priv,
+ XCAN_RXMSG_FRAME_OFFSET(readindex) + i);
+ *(__be32 *)(cf->data + i) = cpu_to_be32(data[0]);
}
- /* Update FSR Register so that next packet will save to
- * buffer
- */
- fsr = priv->read_reg(priv, XCAN_FSR_OFFSET);
- fsr |= XCAN_FSR_IRI_MASK;
- priv->write_reg(priv, XCAN_FSR_OFFSET, fsr);
- fsr = priv->read_reg(priv, XCAN_FSR_OFFSET);
- stats->rx_bytes += cf->len;
- stats->rx_packets++;
- netif_receive_skb(skb);
-
- return 1;
}
- /* If FSR Register is not updated with fill level */
- return 0;
+ stats->rx_bytes += cf->len;
+ stats->rx_packets++;
+ netif_receive_skb(skb);
+
+ return 1;
}
/**
--
2.7.4
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* [PATCH 3/5] can: xilinx_can: Fix the data updation logic for CANFD FD frames
From: Appana Durga Kedareswara rao @ 2019-08-12 7:28 UTC (permalink / raw)
To: wg, mkl, davem, michal.simek
Cc: netdev, Appana Durga Kedareswara rao, linux-kernel,
linux-arm-kernel, linux-can
In-Reply-To: <1565594914-18999-1-git-send-email-appana.durga.rao@xilinx.com>
commit c223da689324 ("can: xilinx_can: Add support for CANFD FD frames")
is writing data to a wrong offset for FD frames.
This patch fixes this issue.
Reviewed-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
Reviewed-by: Shubhrajyoti Datta <Shubhrajyoti.datta@xilinx.com>
Signed-off-by: Appana Durga Kedareswara rao <appana.durga.rao@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---
drivers/net/can/xilinx_can.c | 29 ++++++++---------------------
1 file changed, 8 insertions(+), 21 deletions(-)
diff --git a/drivers/net/can/xilinx_can.c b/drivers/net/can/xilinx_can.c
index 2d3399e..c9b951b 100644
--- a/drivers/net/can/xilinx_can.c
+++ b/drivers/net/can/xilinx_can.c
@@ -66,8 +66,7 @@ enum xcan_reg {
#define XCAN_FRAME_DLC_OFFSET(frame_base) ((frame_base) + 0x04)
#define XCAN_FRAME_DW1_OFFSET(frame_base) ((frame_base) + 0x08)
#define XCAN_FRAME_DW2_OFFSET(frame_base) ((frame_base) + 0x0C)
-#define XCANFD_FRAME_DW_OFFSET(frame_base, n) (((frame_base) + 0x08) + \
- ((n) * XCAN_CANFD_FRAME_SIZE))
+#define XCANFD_FRAME_DW_OFFSET(frame_base) ((frame_base) + 0x08)
#define XCAN_CANFD_FRAME_SIZE 0x48
#define XCAN_TXMSG_FRAME_OFFSET(n) (XCAN_TXMSG_BASE_OFFSET + \
@@ -600,7 +599,7 @@ static void xcan_write_frame(struct xcan_priv *priv, struct sk_buff *skb,
if (priv->devtype.cantype == XAXI_CANFD ||
priv->devtype.cantype == XAXI_CANFD_2_0) {
for (i = 0; i < cf->len; i += 4) {
- ramoff = XCANFD_FRAME_DW_OFFSET(frame_offset, dwindex) +
+ ramoff = XCANFD_FRAME_DW_OFFSET(frame_offset) +
(dwindex * XCANFD_DW_BYTES);
priv->write_reg(priv, ramoff,
be32_to_cpup((__be32 *)(cf->data + i)));
@@ -816,10 +815,8 @@ static int xcanfd_rx(struct net_device *ndev, int frame_base)
struct net_device_stats *stats = &ndev->stats;
struct canfd_frame *cf;
struct sk_buff *skb;
- u32 id_xcan, dlc, data[2] = {0, 0}, dwindex = 0, i, fsr, readindex;
+ u32 id_xcan, dlc, data[2] = {0, 0}, dwindex = 0, i, dw_offset;
- fsr = priv->read_reg(priv, XCAN_FSR_OFFSET);
- readindex = fsr & XCAN_FSR_RI_MASK;
id_xcan = priv->read_reg(priv, XCAN_FRAME_ID_OFFSET(frame_base));
dlc = priv->read_reg(priv, XCAN_FRAME_DLC_OFFSET(frame_base));
if (dlc & XCAN_DLCR_EDL_MASK)
@@ -863,26 +860,16 @@ static int xcanfd_rx(struct net_device *ndev, int frame_base)
/* Check the frame received is FD or not*/
if (dlc & XCAN_DLCR_EDL_MASK) {
for (i = 0; i < cf->len; i += 4) {
- if (priv->devtype.flags & XCAN_FLAG_CANFD_2)
- data[0] = priv->read_reg(priv,
- (XCAN_RXMSG_2_FRAME_OFFSET(readindex) +
- (dwindex * XCANFD_DW_BYTES)));
- else
- data[0] = priv->read_reg(priv,
- (XCAN_RXMSG_FRAME_OFFSET(readindex) +
- (dwindex * XCANFD_DW_BYTES)));
+ dw_offset = XCANFD_FRAME_DW_OFFSET(frame_base) +
+ (dwindex * XCANFD_DW_BYTES);
+ data[0] = priv->read_reg(priv, dw_offset);
*(__be32 *)(cf->data + i) = cpu_to_be32(data[0]);
dwindex++;
}
} else {
for (i = 0; i < cf->len; i += 4) {
- if (priv->devtype.flags & XCAN_FLAG_CANFD_2)
- data[0] = priv->read_reg(priv,
- XCAN_RXMSG_2_FRAME_OFFSET(readindex) +
- i);
- else
- data[0] = priv->read_reg(priv,
- XCAN_RXMSG_FRAME_OFFSET(readindex) + i);
+ dw_offset = XCANFD_FRAME_DW_OFFSET(frame_base);
+ data[0] = priv->read_reg(priv, dw_offset + i);
*(__be32 *)(cf->data + i) = cpu_to_be32(data[0]);
}
}
--
2.7.4
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* [PATCH 4/5] can: xilinx_can: Fix FSR register FL and RI mask values for canfd 2.0
From: Appana Durga Kedareswara rao @ 2019-08-12 7:28 UTC (permalink / raw)
To: wg, mkl, davem, michal.simek
Cc: netdev, Appana Durga Kedareswara rao, linux-kernel,
linux-arm-kernel, linux-can
In-Reply-To: <1565594914-18999-1-git-send-email-appana.durga.rao@xilinx.com>
For CANFD 2.0 IP configuration existing driver is using incorrect mask
values for FSR register FL and RI fields.
Signed-off-by: Appana Durga Kedareswara rao <appana.durga.rao@xilinx.com>
Acked-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---
drivers/net/can/xilinx_can.c | 13 ++++++++++---
1 file changed, 10 insertions(+), 3 deletions(-)
diff --git a/drivers/net/can/xilinx_can.c b/drivers/net/can/xilinx_can.c
index c9b951b..4cb8c1c9 100644
--- a/drivers/net/can/xilinx_can.c
+++ b/drivers/net/can/xilinx_can.c
@@ -123,8 +123,10 @@ enum xcan_reg {
#define XCAN_IDR_RTR_MASK 0x00000001 /* Remote TX request */
#define XCAN_DLCR_DLC_MASK 0xF0000000 /* Data length code */
#define XCAN_FSR_FL_MASK 0x00003F00 /* RX Fill Level */
+#define XCAN_2_FSR_FL_MASK 0x00007F00 /* RX Fill Level */
#define XCAN_FSR_IRI_MASK 0x00000080 /* RX Increment Read Index */
#define XCAN_FSR_RI_MASK 0x0000001F /* RX Read Index */
+#define XCAN_2_FSR_RI_MASK 0x0000003F /* RX Read Index */
#define XCAN_DLCR_EDL_MASK 0x08000000 /* EDL Mask in DLC */
#define XCAN_DLCR_BRS_MASK 0x04000000 /* BRS Mask in DLC */
@@ -1138,7 +1140,7 @@ static int xcan_rx_fifo_get_next_frame(struct xcan_priv *priv)
int offset;
if (priv->devtype.flags & XCAN_FLAG_RX_FIFO_MULTI) {
- u32 fsr;
+ u32 fsr, mask;
/* clear RXOK before the is-empty check so that any newly
* received frame will reassert it without a race
@@ -1148,12 +1150,17 @@ static int xcan_rx_fifo_get_next_frame(struct xcan_priv *priv)
fsr = priv->read_reg(priv, XCAN_FSR_OFFSET);
/* check if RX FIFO is empty */
- if (!(fsr & XCAN_FSR_FL_MASK))
+ if (priv->devtype.flags & XCAN_FLAG_CANFD_2)
+ mask = XCAN_2_FSR_FL_MASK;
+ else
+ mask = XCAN_FSR_FL_MASK;
+
+ if (!(fsr & mask))
return -ENOENT;
if (priv->devtype.flags & XCAN_FLAG_CANFD_2)
offset =
- XCAN_RXMSG_2_FRAME_OFFSET(fsr & XCAN_FSR_RI_MASK);
+ XCAN_RXMSG_2_FRAME_OFFSET(fsr & XCAN_2_FSR_RI_MASK);
else
offset =
XCAN_RXMSG_FRAME_OFFSET(fsr & XCAN_FSR_RI_MASK);
--
2.7.4
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* [PATCH 0/5] can: xilinx_can: Bug fixes
From: Appana Durga Kedareswara rao @ 2019-08-12 7:28 UTC (permalink / raw)
To: wg, mkl, davem, michal.simek
Cc: netdev, Appana Durga Kedareswara rao, linux-kernel,
linux-arm-kernel, linux-can
This patch series fixes below issues
--> Bugs in the driver w.r.to CANFD 2.0 IP support
--> Defer the probe if clock is not found
Appana Durga Kedareswara rao (3):
can: xilinx_can: Fix FSR register handling in the rx path
can: xilinx_can: Fix the data updation logic for CANFD FD frames
can: xilinx_can: Fix FSR register FL and RI mask values for canfd 2.0
Srinivas Neeli (1):
can: xilinx_can: Fix the data phase btr1 calculation
Venkatesh Yadav Abbarapu (1):
can: xilinx_can: defer the probe if clock is not found
drivers/net/can/xilinx_can.c | 162 +++++++++++++++++++------------------------
1 file changed, 72 insertions(+), 90 deletions(-)
--
2.7.4
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* [PATCH 1/5] can: xilinx_can: defer the probe if clock is not found
From: Appana Durga Kedareswara rao @ 2019-08-12 7:28 UTC (permalink / raw)
To: wg, mkl, davem, michal.simek
Cc: netdev, Venkatesh Yadav Abbarapu, linux-kernel, linux-arm-kernel,
linux-can
In-Reply-To: <1565594914-18999-1-git-send-email-appana.durga.rao@xilinx.com>
From: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
It's not always the case that clock is already available when can
driver get probed at the first time, e.g. the clock is provided by
clock wizard which may be probed after can driver. So let's defer
the probe when devm_clk_get() call fails and give it chance to
try later.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---
drivers/net/can/xilinx_can.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/net/can/xilinx_can.c b/drivers/net/can/xilinx_can.c
index bd95cfa..ac175ab 100644
--- a/drivers/net/can/xilinx_can.c
+++ b/drivers/net/can/xilinx_can.c
@@ -1791,7 +1791,8 @@ static int xcan_probe(struct platform_device *pdev)
/* Getting the CAN can_clk info */
priv->can_clk = devm_clk_get(&pdev->dev, "can_clk");
if (IS_ERR(priv->can_clk)) {
- dev_err(&pdev->dev, "Device clock not found.\n");
+ if (PTR_ERR(priv->can_clk) != -EPROBE_DEFER)
+ dev_err(&pdev->dev, "Device clock not found.\n");
ret = PTR_ERR(priv->can_clk);
goto err_free;
}
--
2.7.4
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* Re: [linux-sunxi] [PATCH v5 1/3] arm64: dts: allwinner: Add SPDIF node for Allwinner H6
From: Clément Péron @ 2019-08-12 7:11 UTC (permalink / raw)
To: Chen-Yu Tsai
Cc: devicetree, Maxime Ripard, linux-kernel, linux-sunxi, Rob Herring,
linux-arm-kernel
In-Reply-To: <CAGb2v67N5Ykzo6myKqrNMgu6PCH2pJTzw9JJ5t0MGP_p=0ae9g@mail.gmail.com>
Hi Chen-Yu,
On Mon, 12 Aug 2019 at 08:35, Chen-Yu Tsai <wens@kernel.org> wrote:
>
> On Mon, Aug 12, 2019 at 12:52 PM Chen-Yu Tsai <wens@kernel.org> wrote:
> >
> > Hi,
> >
> > On Mon, Aug 12, 2019 at 4:31 AM Clément Péron <peron.clem@gmail.com> wrote:
> > >
> > > The Allwinner H6 has a SPDIF controller called OWA (One Wire Audio).
> > >
> > > Only one pinmuxing is available so set it as default.
> > >
> > > Signed-off-by: Clément Péron <peron.clem@gmail.com>
> > > ---
> > > arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 38 ++++++++++++++++++++
> > > 1 file changed, 38 insertions(+)
> > >
> > > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
> > > index 7628a7c83096..677eb374678d 100644
> > > --- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
> > > +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
> > > @@ -83,6 +83,24 @@
> > > method = "smc";
> > > };
> > >
> > > + sound-spdif {
> > > + compatible = "simple-audio-card";
> > > + simple-audio-card,name = "sun50i-h6-spdif";
> > > +
> > > + simple-audio-card,cpu {
> > > + sound-dai = <&spdif>;
> > > + };
> > > +
> > > + simple-audio-card,codec {
> > > + sound-dai = <&spdif_out>;
> > > + };
> > > + };
> > > +
> > > + spdif_out: spdif-out {
> > > + #sound-dai-cells = <0>;
> > > + compatible = "linux,spdif-dit";
> > > + };
> > > +
> >
> > We've always had this part in the board dts. It isn't relevant to boards
> > that don't have SPDIF output.
> >
> > Also, not so relevant here, but there are different simple sound card
> > constructs. Some support multiple audio streams with dynamic PCM routing.
> > How these are configured really depends on what interfaces are usable.
> >
> > So keeping this at the board level is IMO a better choice.
I Agree, I try to keep coherency with sun50i-a64.dtsi.
But sound routing is really at board level not SoC one.
Regards,
Clément
>
> Forgot to mention. Both patches and all parts in this patch are OK. It's
> just the parts the need to be moved.
>
>
> > ChenYu
> >
> >
> > > timer {
> > > compatible = "arm,armv8-timer";
> > > interrupts = <GIC_PPI 13
> > > @@ -282,6 +300,11 @@
> > > bias-pull-up;
> > > };
> > >
> > > + spdif_tx_pin: spdif-tx-pin {
> > > + pins = "PH7";
> > > + function = "spdif";
> > > + };
> > > +
> > > uart0_ph_pins: uart0-ph-pins {
> > > pins = "PH0", "PH1";
> > > function = "uart0";
> > > @@ -411,6 +434,21 @@
> > > };
> > > };
> > >
> > > + spdif: spdif@5093000 {
> > > + #sound-dai-cells = <0>;
> > > + compatible = "allwinner,sun50i-h6-spdif";
> > > + reg = <0x05093000 0x400>;
> > > + interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
> > > + clocks = <&ccu CLK_BUS_SPDIF>, <&ccu CLK_SPDIF>;
> > > + clock-names = "apb", "spdif";
> > > + resets = <&ccu RST_BUS_SPDIF>;
> > > + dmas = <&dma 2>;
> > > + dma-names = "tx";
> > > + pinctrl-names = "default";
> > > + pinctrl-0 = <&spdif_tx_pin>;
> > > + status = "disabled";
> > > + };
> > > +
> > > usb2otg: usb@5100000 {
> > > compatible = "allwinner,sun50i-h6-musb",
> > > "allwinner,sun8i-a33-musb";
> > > --
> > > 2.20.1
> > >
> > > --
> > > You received this message because you are subscribed to the Google Groups "linux-sunxi" group.
> > > To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscribe@googlegroups.com.
> > > To view this discussion on the web, visit https://groups.google.com/d/msgid/linux-sunxi/20190811203144.5999-2-peron.clem%40gmail.com.
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* RE: [EXT] Re: i2c: imx: support slave mode for imx I2C driver
From: Biwen Li @ 2019-08-12 7:11 UTC (permalink / raw)
To: Sascha Hauer
Cc: wsa@the-dreams.de, shawnguo@kernel.org,
linux-kernel@vger.kernel.org, linux-i2c@vger.kernel.org,
kernel@pengutronix.de, Laurentiu Tudor, festevam@gmail.com,
linux-arm-kernel@lists.infradead.org, dl-linux-imx
In-Reply-To: <20190812063822.7odhnj5ueqjam3g6@pengutronix.de>
> Subject: Re: [EXT] Re: i2c: imx: support slave mode for imx I2C driver
>
> Caution: EXT Email
>
> On Fri, Aug 09, 2019 at 04:04:45AM +0000, Biwen Li wrote:
> > >
> > > Hi,
> > >
> > > On Thu, Aug 08, 2019 at 11:53:43AM +0800, Biwen Li wrote:
> > > > The patch supports slave mode for imx I2C driver
> > > >
> > > > Signed-off-by: Biwen Li <biwen.li@nxp.com>
> > > > ---
> > > > drivers/i2c/busses/i2c-imx.c | 199
> > > > ++++++++++++++++++++++++++++++++---
> > > > 1 file changed, 185 insertions(+), 14 deletions(-)
> > > >
> > > > diff --git a/drivers/i2c/busses/i2c-imx.c
> > > > b/drivers/i2c/busses/i2c-imx.c index b1b8b938d7f4..f7583a9fa56f
> > > > 100644
> > > > --- a/drivers/i2c/busses/i2c-imx.c
> > > > +++ b/drivers/i2c/busses/i2c-imx.c
> > > > @@ -202,6 +202,9 @@ struct imx_i2c_struct {
> > > > struct pinctrl_state *pinctrl_pins_gpio;
> > > >
> > > > struct imx_i2c_dma *dma;
> > > > +#if IS_ENABLED(CONFIG_I2C_SLAVE)
> > > > + struct i2c_client *slave;
> > > > +#endif /* CONFIG_I2C_SLAVE */
> > >
> > > Other drivers just do a "select I2C_SLAVE" in Kconfig to get rid of
> > > these #ifs. We should do the same.
> > Hi sascha, I don't know your meaning, could you let it clearer?
>
> Other drivers have "select I2C_SLAVE" in Kconfig, so they do not need any #ifdef
> CONFIG_I2C_SLAVE as this is always true.
Okay, sascha, got it, I will remove the option in v2, thanks.
>
> Sascha
>
> --
> Pengutronix e.K. |
> |
> Industrial Linux Solutions |
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* Re: [PATCH v2 05/13] gpio: lpc32xx: allow building on non-lpc32xx targets
From: Bartosz Golaszewski @ 2019-08-12 7:09 UTC (permalink / raw)
To: Arnd Bergmann
Cc: Linus Walleij, LKML, Vladimir Zapolskiy, linux-gpio, soc,
Sylvain Lemieux, arm-soc
In-Reply-To: <20190809144043.476786-6-arnd@arndb.de>
pt., 9 sie 2019 o 16:43 Arnd Bergmann <arnd@arndb.de> napisał(a):
>
> The driver uses hardwire MMIO addresses instead of the data
> that is passed in device tree. Change it over to only
> hardcode the register offset values and allow compile-testing.
>
> Acked-by: Sylvain Lemieux <slemieux.tyco@gmail.com>
> Tested-by: Sylvain Lemieux <slemieux.tyco@gmail.com>
> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
> ---
> arch/arm/configs/lpc32xx_defconfig | 1 +
> drivers/gpio/Kconfig | 7 ++
> drivers/gpio/Makefile | 2 +-
> drivers/gpio/gpio-lpc32xx.c | 118 +++++++++++++++++------------
> 4 files changed, 77 insertions(+), 51 deletions(-)
>
> diff --git a/arch/arm/configs/lpc32xx_defconfig b/arch/arm/configs/lpc32xx_defconfig
> index 0cdc6c7974b3..3772d5a8975a 100644
> --- a/arch/arm/configs/lpc32xx_defconfig
> +++ b/arch/arm/configs/lpc32xx_defconfig
> @@ -93,6 +93,7 @@ CONFIG_SERIAL_HS_LPC32XX_CONSOLE=y
> # CONFIG_HW_RANDOM is not set
> CONFIG_I2C_CHARDEV=y
> CONFIG_I2C_PNX=y
> +CONFIG_GPIO_LPC32XX=y
> CONFIG_SPI=y
> CONFIG_SPI_PL022=y
> CONFIG_GPIO_SYSFS=y
> diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
> index bb13c266c329..8b40a578963c 100644
> --- a/drivers/gpio/Kconfig
> +++ b/drivers/gpio/Kconfig
> @@ -311,6 +311,13 @@ config GPIO_LPC18XX
> Select this option to enable GPIO driver for
> NXP LPC18XX/43XX devices.
>
> +config GPIO_LPC32XX
> + tristate "NXP LPC32XX GPIO support"
> + depends on OF_GPIO && (ARCH_LPC32XX || COMPILE_TEST)
> + help
> + Select this option to enable GPIO driver for
> + NXP LPC32XX devices.
> +
> config GPIO_LYNXPOINT
> tristate "Intel Lynxpoint GPIO support"
> depends on ACPI && X86
> diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
> index a4e91175c708..87d659ae95eb 100644
> --- a/drivers/gpio/Makefile
> +++ b/drivers/gpio/Makefile
> @@ -74,7 +74,7 @@ obj-$(CONFIG_GPIO_LP3943) += gpio-lp3943.o
> obj-$(CONFIG_GPIO_LP873X) += gpio-lp873x.o
> obj-$(CONFIG_GPIO_LP87565) += gpio-lp87565.o
> obj-$(CONFIG_GPIO_LPC18XX) += gpio-lpc18xx.o
> -obj-$(CONFIG_ARCH_LPC32XX) += gpio-lpc32xx.o
> +obj-$(CONFIG_GPIO_LPC32XX) += gpio-lpc32xx.o
> obj-$(CONFIG_GPIO_LYNXPOINT) += gpio-lynxpoint.o
> obj-$(CONFIG_GPIO_MADERA) += gpio-madera.o
> obj-$(CONFIG_GPIO_MAX3191X) += gpio-max3191x.o
> diff --git a/drivers/gpio/gpio-lpc32xx.c b/drivers/gpio/gpio-lpc32xx.c
> index 24885b3db3d5..4e626c4235c2 100644
> --- a/drivers/gpio/gpio-lpc32xx.c
> +++ b/drivers/gpio/gpio-lpc32xx.c
> @@ -16,36 +16,33 @@
> #include <linux/platform_device.h>
> #include <linux/module.h>
>
> -#include <mach/hardware.h>
> -#include <mach/platform.h>
> -
> -#define LPC32XX_GPIO_P3_INP_STATE _GPREG(0x000)
> -#define LPC32XX_GPIO_P3_OUTP_SET _GPREG(0x004)
> -#define LPC32XX_GPIO_P3_OUTP_CLR _GPREG(0x008)
> -#define LPC32XX_GPIO_P3_OUTP_STATE _GPREG(0x00C)
> -#define LPC32XX_GPIO_P2_DIR_SET _GPREG(0x010)
> -#define LPC32XX_GPIO_P2_DIR_CLR _GPREG(0x014)
> -#define LPC32XX_GPIO_P2_DIR_STATE _GPREG(0x018)
> -#define LPC32XX_GPIO_P2_INP_STATE _GPREG(0x01C)
> -#define LPC32XX_GPIO_P2_OUTP_SET _GPREG(0x020)
> -#define LPC32XX_GPIO_P2_OUTP_CLR _GPREG(0x024)
> -#define LPC32XX_GPIO_P2_MUX_SET _GPREG(0x028)
> -#define LPC32XX_GPIO_P2_MUX_CLR _GPREG(0x02C)
> -#define LPC32XX_GPIO_P2_MUX_STATE _GPREG(0x030)
> -#define LPC32XX_GPIO_P0_INP_STATE _GPREG(0x040)
> -#define LPC32XX_GPIO_P0_OUTP_SET _GPREG(0x044)
> -#define LPC32XX_GPIO_P0_OUTP_CLR _GPREG(0x048)
> -#define LPC32XX_GPIO_P0_OUTP_STATE _GPREG(0x04C)
> -#define LPC32XX_GPIO_P0_DIR_SET _GPREG(0x050)
> -#define LPC32XX_GPIO_P0_DIR_CLR _GPREG(0x054)
> -#define LPC32XX_GPIO_P0_DIR_STATE _GPREG(0x058)
> -#define LPC32XX_GPIO_P1_INP_STATE _GPREG(0x060)
> -#define LPC32XX_GPIO_P1_OUTP_SET _GPREG(0x064)
> -#define LPC32XX_GPIO_P1_OUTP_CLR _GPREG(0x068)
> -#define LPC32XX_GPIO_P1_OUTP_STATE _GPREG(0x06C)
> -#define LPC32XX_GPIO_P1_DIR_SET _GPREG(0x070)
> -#define LPC32XX_GPIO_P1_DIR_CLR _GPREG(0x074)
> -#define LPC32XX_GPIO_P1_DIR_STATE _GPREG(0x078)
> +#define LPC32XX_GPIO_P3_INP_STATE (0x000)
> +#define LPC32XX_GPIO_P3_OUTP_SET (0x004)
> +#define LPC32XX_GPIO_P3_OUTP_CLR (0x008)
> +#define LPC32XX_GPIO_P3_OUTP_STATE (0x00C)
> +#define LPC32XX_GPIO_P2_DIR_SET (0x010)
> +#define LPC32XX_GPIO_P2_DIR_CLR (0x014)
> +#define LPC32XX_GPIO_P2_DIR_STATE (0x018)
> +#define LPC32XX_GPIO_P2_INP_STATE (0x01C)
> +#define LPC32XX_GPIO_P2_OUTP_SET (0x020)
> +#define LPC32XX_GPIO_P2_OUTP_CLR (0x024)
> +#define LPC32XX_GPIO_P2_MUX_SET (0x028)
> +#define LPC32XX_GPIO_P2_MUX_CLR (0x02C)
> +#define LPC32XX_GPIO_P2_MUX_STATE (0x030)
> +#define LPC32XX_GPIO_P0_INP_STATE (0x040)
> +#define LPC32XX_GPIO_P0_OUTP_SET (0x044)
> +#define LPC32XX_GPIO_P0_OUTP_CLR (0x048)
> +#define LPC32XX_GPIO_P0_OUTP_STATE (0x04C)
> +#define LPC32XX_GPIO_P0_DIR_SET (0x050)
> +#define LPC32XX_GPIO_P0_DIR_CLR (0x054)
> +#define LPC32XX_GPIO_P0_DIR_STATE (0x058)
> +#define LPC32XX_GPIO_P1_INP_STATE (0x060)
> +#define LPC32XX_GPIO_P1_OUTP_SET (0x064)
> +#define LPC32XX_GPIO_P1_OUTP_CLR (0x068)
> +#define LPC32XX_GPIO_P1_OUTP_STATE (0x06C)
> +#define LPC32XX_GPIO_P1_DIR_SET (0x070)
> +#define LPC32XX_GPIO_P1_DIR_CLR (0x074)
> +#define LPC32XX_GPIO_P1_DIR_STATE (0x078)
>
> #define GPIO012_PIN_TO_BIT(x) (1 << (x))
> #define GPIO3_PIN_TO_BIT(x) (1 << ((x) + 25))
> @@ -72,12 +69,12 @@
> #define LPC32XX_GPO_P3_GRP (LPC32XX_GPI_P3_GRP + LPC32XX_GPI_P3_MAX)
>
> struct gpio_regs {
> - void __iomem *inp_state;
> - void __iomem *outp_state;
> - void __iomem *outp_set;
> - void __iomem *outp_clr;
> - void __iomem *dir_set;
> - void __iomem *dir_clr;
> + unsigned long inp_state;
> + unsigned long outp_state;
> + unsigned long outp_set;
> + unsigned long outp_clr;
> + unsigned long dir_set;
> + unsigned long dir_clr;
> };
>
> /*
> @@ -165,16 +162,27 @@ static struct gpio_regs gpio_grp_regs_p3 = {
> struct lpc32xx_gpio_chip {
> struct gpio_chip chip;
> struct gpio_regs *gpio_grp;
> + void __iomem *reg_base;
> };
>
> +static inline u32 gpreg_read(struct lpc32xx_gpio_chip *group, unsigned long offset)
> +{
> + return __raw_readl(group->reg_base + offset);
> +}
> +
> +static inline void gpreg_write(struct lpc32xx_gpio_chip *group, u32 val, unsigned long offset)
> +{
> + __raw_writel(val, group->reg_base + offset);
> +}
> +
> static void __set_gpio_dir_p012(struct lpc32xx_gpio_chip *group,
> unsigned pin, int input)
> {
> if (input)
> - __raw_writel(GPIO012_PIN_TO_BIT(pin),
> + gpreg_write(group, GPIO012_PIN_TO_BIT(pin),
> group->gpio_grp->dir_clr);
> else
> - __raw_writel(GPIO012_PIN_TO_BIT(pin),
> + gpreg_write(group, GPIO012_PIN_TO_BIT(pin),
> group->gpio_grp->dir_set);
> }
>
> @@ -184,19 +192,19 @@ static void __set_gpio_dir_p3(struct lpc32xx_gpio_chip *group,
> u32 u = GPIO3_PIN_TO_BIT(pin);
>
> if (input)
> - __raw_writel(u, group->gpio_grp->dir_clr);
> + gpreg_write(group, u, group->gpio_grp->dir_clr);
> else
> - __raw_writel(u, group->gpio_grp->dir_set);
> + gpreg_write(group, u, group->gpio_grp->dir_set);
> }
>
> static void __set_gpio_level_p012(struct lpc32xx_gpio_chip *group,
> unsigned pin, int high)
> {
> if (high)
> - __raw_writel(GPIO012_PIN_TO_BIT(pin),
> + gpreg_write(group, GPIO012_PIN_TO_BIT(pin),
> group->gpio_grp->outp_set);
> else
> - __raw_writel(GPIO012_PIN_TO_BIT(pin),
> + gpreg_write(group, GPIO012_PIN_TO_BIT(pin),
> group->gpio_grp->outp_clr);
> }
>
> @@ -206,31 +214,31 @@ static void __set_gpio_level_p3(struct lpc32xx_gpio_chip *group,
> u32 u = GPIO3_PIN_TO_BIT(pin);
>
> if (high)
> - __raw_writel(u, group->gpio_grp->outp_set);
> + gpreg_write(group, u, group->gpio_grp->outp_set);
> else
> - __raw_writel(u, group->gpio_grp->outp_clr);
> + gpreg_write(group, u, group->gpio_grp->outp_clr);
> }
>
> static void __set_gpo_level_p3(struct lpc32xx_gpio_chip *group,
> unsigned pin, int high)
> {
> if (high)
> - __raw_writel(GPO3_PIN_TO_BIT(pin), group->gpio_grp->outp_set);
> + gpreg_write(group, GPO3_PIN_TO_BIT(pin), group->gpio_grp->outp_set);
> else
> - __raw_writel(GPO3_PIN_TO_BIT(pin), group->gpio_grp->outp_clr);
> + gpreg_write(group, GPO3_PIN_TO_BIT(pin), group->gpio_grp->outp_clr);
> }
>
> static int __get_gpio_state_p012(struct lpc32xx_gpio_chip *group,
> unsigned pin)
> {
> - return GPIO012_PIN_IN_SEL(__raw_readl(group->gpio_grp->inp_state),
> + return GPIO012_PIN_IN_SEL(gpreg_read(group, group->gpio_grp->inp_state),
> pin);
> }
>
> static int __get_gpio_state_p3(struct lpc32xx_gpio_chip *group,
> unsigned pin)
> {
> - int state = __raw_readl(group->gpio_grp->inp_state);
> + int state = gpreg_read(group, group->gpio_grp->inp_state);
>
> /*
> * P3 GPIO pin input mapping is not contiguous, GPIOP3-0..4 is mapped
> @@ -242,13 +250,13 @@ static int __get_gpio_state_p3(struct lpc32xx_gpio_chip *group,
> static int __get_gpi_state_p3(struct lpc32xx_gpio_chip *group,
> unsigned pin)
> {
> - return GPI3_PIN_IN_SEL(__raw_readl(group->gpio_grp->inp_state), pin);
> + return GPI3_PIN_IN_SEL(gpreg_read(group, group->gpio_grp->inp_state), pin);
> }
>
> static int __get_gpo_state_p3(struct lpc32xx_gpio_chip *group,
> unsigned pin)
> {
> - return GPO3_PIN_IN_SEL(__raw_readl(group->gpio_grp->outp_state), pin);
> + return GPO3_PIN_IN_SEL(gpreg_read(group, group->gpio_grp->outp_state), pin);
> }
>
> /*
> @@ -497,12 +505,18 @@ static int lpc32xx_of_xlate(struct gpio_chip *gc,
> static int lpc32xx_gpio_probe(struct platform_device *pdev)
> {
> int i;
> + void __iomem *reg_base;
> +
> + reg_base = devm_platform_ioremap_resource(pdev, 0);
> + if (IS_ERR(reg_base))
> + return PTR_ERR(reg_base);
>
> for (i = 0; i < ARRAY_SIZE(lpc32xx_gpiochip); i++) {
> if (pdev->dev.of_node) {
> lpc32xx_gpiochip[i].chip.of_xlate = lpc32xx_of_xlate;
> lpc32xx_gpiochip[i].chip.of_gpio_n_cells = 3;
> lpc32xx_gpiochip[i].chip.of_node = pdev->dev.of_node;
> + lpc32xx_gpiochip[i].reg_base = reg_base;
> }
> devm_gpiochip_add_data(&pdev->dev, &lpc32xx_gpiochip[i].chip,
> &lpc32xx_gpiochip[i]);
> @@ -527,3 +541,7 @@ static struct platform_driver lpc32xx_gpio_driver = {
> };
>
> module_platform_driver(lpc32xx_gpio_driver);
> +
> +MODULE_AUTHOR("Kevin Wells <kevin.wells@nxp.com>");
> +MODULE_LICENSE("GPL");
> +MODULE_DESCRIPTION("GPIO driver for LPC32xx SoC");
> --
> 2.20.0
>
Applied, thanks!
Bart
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* Re: [PATCH v2] arm64: dts: allwinner: a64: Enable eMMC on A64-OLinuXino
From: Maxime Ripard @ 2019-08-12 7:00 UTC (permalink / raw)
To: Chen-Yu Tsai; +Cc: Sunil Mohan Adapa, Martin Ayotte, linux-arm-kernel
In-Reply-To: <CAGb2v66EjQ-_QNsJ+xR0LcR983whU-hF9SZ2dSX_i5v7qcEyww@mail.gmail.com>
On Thu, Aug 08, 2019 at 01:12:37PM +0800, Chen-Yu Tsai wrote:
> On Wed, Aug 7, 2019 at 10:45 PM Maxime Ripard <maxime.ripard@bootlin.com> wrote:
> > On Wed, Aug 07, 2019 at 08:09:19PM +0800, Chen-Yu Tsai wrote:
> > > On Wed, Aug 7, 2019 at 8:01 PM Maxime Ripard <maxime.ripard@bootlin.com> wrote:
> > > >
> > > > On Tue, Aug 06, 2019 at 02:25:17PM +0800, Chen-Yu Tsai wrote:
> > > > > On Mon, Aug 5, 2019 at 8:58 PM Martin Ayotte <martinayotte@gmail.com> wrote:
> > > > > >
> > > > > > Fine for me too.
> > > > > >
> > > > > > Thanks .
> > > > > >
> > > > > > -----Message d'origine-----
> > > > > > De : Sunil Mohan Adapa [mailto:sunil@medhas.org]
> > > > > > Envoyé : Monday, August 05, 2019 1:25 AM
> > > > > > Ą : Chen-Yu Tsai
> > > > > > Cc : Maxime Ripard; Martin Ayotte; linux-arm-kernel
> > > > > > Objet : Re: [PATCH v2] arm64: dts: allwinner: a64: Enable eMMC on
> > > > > > A64-OLinuXino
> > > > > >
> > > > > > On 04/08/19 8:33 pm, Chen-Yu Tsai wrote:
> > > > > > > On Fri, Aug 2, 2019 at 2:47 AM Sunil Mohan Adapa <sunil@medhas.org> wrote:
> > > > > > >>
> > > > > > >> On 01/08/19 6:49 am, Martin Ayotte wrote:
> > > > > > >>> If my SOB could help here, I don't mind since I've done the commit
> > > > > > >>> more than a year ago for Armbian ...
> > > > > > >>>
> > > > > > >>> Signed-off-by: Martin Ayotte <martinayotte@gmai.com>
> > > > > > >>> Tested-by: Martin Ayotte <martinayotte@gmai.com>
> > > > > > >> gmai.com is likely a typo.
> > > > > > >>
> > > > > > >>> On Wed, Jul 31, 2019 at 10:42 PM Chen-Yu Tsai <wens@csie.org
> > > > > > >>>
> > > > > > >>>> Thanks. The patch looks good overall. The authorship is a little
> > > > > > >>>> confusing though. If it was initially done by Martin (CC-ed), then
> > > > > > >>>> he should be the author, and we should get his Signed-off-by if
> > > > > > >>>> possible.
> > > > > > >>
> > > > > > >> Martin is indeed the original author of the patch. Thank you for
> > > > > > reviewing.
> > > > > > >
> > > > > > > I'd like to apply this patch with Martin as the author, if that's OK with
> > > > > > you
> > > > > > > both?
> > > > > >
> > > > > > That is completely okay with me.
> > > > >
> > > > > Applied for 5.4.
> > > > >
> > > > > I reordered the tags so they make more sense:
> > > > >
> > > > > https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux.git/commit/?h=sunxi/dt-for-5.4&id=0834887732df5af41b59b2e4d530fc1f5478965f
> > > >
> > > > Sorry for being late on this, but it looks like the eMMC, NAND and SPI
> > > > pins are conflicting on the A64-Olinuxino design.
> > > >
> > > > There's no configuration with a NAND, so we don't really need to worry
> > > > about that, but if we merge this in the main DT, we'll prevent anyone
> > > > from using that DT on an olinuxino with a SPI flash.
> > > >
> > > > I think we should just create emmc and SPI-flash variants of that DT.
> > >
> > > Actually they aren't. Olimex specifically uses eMMC modules that don't
> > > use the data strobe line, so SPI can be used together.
> >
> > Ah, right.
> >
> > Still, this creates a precedent that I'm not really comfortable
> > with. Three actually.
> >
> > Merging this in the main DT means three things:
> > - We're not consistent anymore, including within the olinuxino
> > boards only. A20 Olinuxino is pretty much in the same situation,
> > yet we dealt with it differently.
> > - This means that this will create a spurious device and report
> > errors in the kernel message and whenever someone will try to
> > access the device on boards that don't have it wired. This
> > shouldn't happen and we really shouldn't expose devices that just
> > aren't there, just like you don't have all the devices that are
> > not connected on your USB connector.
> > - Finally, this means that in order to keep it somewhat consistent,
> > we would have to merge the SPI flash in the main DT too. This will
> > prevent people without a SPI flash to use the SPI signals on the
> > UEXT connector for something else, which again goes against the
> > policy we've had for basically any other board.
>
> OK. Shall we back it out and figure out something else?
I guess we can send a new patch on top to move it to a separate file
Maxime
--
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Embedded Linux and Kernel engineering
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* Re: [PATCH v1] MAINTAINERS: i2c-imx: take over maintainership
From: Uwe Kleine-König @ 2019-08-12 6:48 UTC (permalink / raw)
To: Oleksij Rempel
Cc: Aisheng Dong, Wolfram Sang, Andrey Smirnov, Sascha Hauer,
Russell King - ARM Linux admin, linux-i2c,
Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team, Shawn Guo,
Chris Healy, linux-arm-kernel
In-Reply-To: <20190812050817.23279-1-o.rempel@pengutronix.de>
On Mon, Aug 12, 2019 at 07:08:17AM +0200, Oleksij Rempel wrote:
> I would like to maintain the i2c-imx driver. Since I work with
> different i.MX variants and have access to the hardware, I can spend
> some time on the reviewing of this driver.
>
> Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
> ---
> MAINTAINERS | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index e81e60bd7c26..ddc1cf5cb0b9 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -6441,6 +6441,14 @@ S: Maintained
> F: drivers/perf/fsl_imx8_ddr_perf.c
> F: Documentation/devicetree/bindings/perf/fsl-imx-ddr.txt
>
> +FREESCALE IMX I2C DRIVER
> +M: Oleksij Rempel <o.rempel@pengutronix.de>
> +R: Pengutronix Kernel Team <kernel@pengutronix.de>
> +L: linux-i2c@vger.kernel.org
> +S: Maintained
> +F: drivers/i2c/busses/i2c-imx.c
> +F: Documentation/devicetree/bindings/i2c/i2c-imx.txt
> +
Even without this patch the generic "ARM/FREESCALE IMX / MXC ARM
ARCHITECTURE" entry matches the i2c-imx driver. Maybe it is worth to
point that out in the commit log?
Other than that arch/arm/mach-imx/devices/platform-imx-i2c.c might be
related, but not sure this is still used at all.
Great you pick that up.
Best regards
Uwe
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* Re: [PATCH v4 2/3] dt-bindings: eeprom: at25: Add Anvo ANV32E61W
From: Krzysztof Kozlowski @ 2019-08-12 6:43 UTC (permalink / raw)
To: Schrempf Frieder
Cc: Mark Rutland, devicetree@vger.kernel.org, Shawn Guo, Sascha Hauer,
linux-kernel@vger.kernel.org, Rob Herring, NXP Linux Team,
Pengutronix Kernel Team, Fabio Estevam,
linux-arm-kernel@lists.infradead.org, notify@kernel.org
In-Reply-To: <de032954-2b6e-5aa9-0d91-c37417c8e162@kontron.de>
On Thu, 8 Aug 2019 at 20:09, Schrempf Frieder
<frieder.schrempf@kontron.de> wrote:
>
> On 08.08.19 19:26, Krzysztof Kozlowski wrote:
> > Document the compatible for ANV32E61W EEPROM chip.
>
> This chip is actually not an EEPROM, but a SPI nvSRAM. It can be
> interfaced by the at25 driver similar to an EEPROM. This is not the
> ideal solution, but it works until there's a proper driver for such
> chips. Maybe you can add some of these details to the commit message
> here. Also there is more information on this topic here:
> https://patchwork.ozlabs.org/patch/1043950/.
Indeed, I'll correct the description of commit.
Best regards,
Krzysztof
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* Re: [EXT] Re: i2c: imx: support slave mode for imx I2C driver
From: Sascha Hauer @ 2019-08-12 6:38 UTC (permalink / raw)
To: Biwen Li
Cc: wsa@the-dreams.de, shawnguo@kernel.org,
linux-kernel@vger.kernel.org, linux-i2c@vger.kernel.org,
kernel@pengutronix.de, Laurentiu Tudor, festevam@gmail.com,
linux-arm-kernel@lists.infradead.org, dl-linux-imx
In-Reply-To: <DB7PR04MB4490F2C2C4B69F0F011420C98FD60@DB7PR04MB4490.eurprd04.prod.outlook.com>
On Fri, Aug 09, 2019 at 04:04:45AM +0000, Biwen Li wrote:
> >
> > Hi,
> >
> > On Thu, Aug 08, 2019 at 11:53:43AM +0800, Biwen Li wrote:
> > > The patch supports slave mode for imx I2C driver
> > >
> > > Signed-off-by: Biwen Li <biwen.li@nxp.com>
> > > ---
> > > drivers/i2c/busses/i2c-imx.c | 199
> > > ++++++++++++++++++++++++++++++++---
> > > 1 file changed, 185 insertions(+), 14 deletions(-)
> > >
> > > diff --git a/drivers/i2c/busses/i2c-imx.c
> > > b/drivers/i2c/busses/i2c-imx.c index b1b8b938d7f4..f7583a9fa56f 100644
> > > --- a/drivers/i2c/busses/i2c-imx.c
> > > +++ b/drivers/i2c/busses/i2c-imx.c
> > > @@ -202,6 +202,9 @@ struct imx_i2c_struct {
> > > struct pinctrl_state *pinctrl_pins_gpio;
> > >
> > > struct imx_i2c_dma *dma;
> > > +#if IS_ENABLED(CONFIG_I2C_SLAVE)
> > > + struct i2c_client *slave;
> > > +#endif /* CONFIG_I2C_SLAVE */
> >
> > Other drivers just do a "select I2C_SLAVE" in Kconfig to get rid of these #ifs. We
> > should do the same.
> Hi sascha, I don't know your meaning, could you let it clearer?
Other drivers have "select I2C_SLAVE" in Kconfig, so they do not need
any #ifdef CONFIG_I2C_SLAVE as this is always true.
Sascha
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* Re: [linux-sunxi] [PATCH v5 3/3] arm64: defconfig: Enable Sun4i SPDIF module
From: Chen-Yu Tsai @ 2019-08-12 6:37 UTC (permalink / raw)
To: Clément Péron
Cc: devicetree, Maxime Ripard, linux-kernel, linux-sunxi, Rob Herring,
linux-arm-kernel
In-Reply-To: <20190811203144.5999-4-peron.clem@gmail.com>
On Mon, Aug 12, 2019 at 4:32 AM Clément Péron <peron.clem@gmail.com> wrote:
>
> Allwinner A64 and H6 use the Sun4i SPDIF driver.
>
> Enable this to allow a proper support.
>
> Signed-off-by: Clément Péron <peron.clem@gmail.com>
Applied. Thanks.
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* Re: [linux-sunxi] [PATCH v5 1/3] arm64: dts: allwinner: Add SPDIF node for Allwinner H6
From: Chen-Yu Tsai @ 2019-08-12 6:34 UTC (permalink / raw)
To: Clément Péron
Cc: devicetree, Maxime Ripard, linux-kernel, linux-sunxi, Rob Herring,
Chen-Yu Tsai, linux-arm-kernel
In-Reply-To: <CAGb2v67T3h_KTVZ20NVWNd78xqCa2ZhYiCJr4oOwYjUM3OaZXA@mail.gmail.com>
On Mon, Aug 12, 2019 at 12:52 PM Chen-Yu Tsai <wens@kernel.org> wrote:
>
> Hi,
>
> On Mon, Aug 12, 2019 at 4:31 AM Clément Péron <peron.clem@gmail.com> wrote:
> >
> > The Allwinner H6 has a SPDIF controller called OWA (One Wire Audio).
> >
> > Only one pinmuxing is available so set it as default.
> >
> > Signed-off-by: Clément Péron <peron.clem@gmail.com>
> > ---
> > arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 38 ++++++++++++++++++++
> > 1 file changed, 38 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
> > index 7628a7c83096..677eb374678d 100644
> > --- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
> > +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
> > @@ -83,6 +83,24 @@
> > method = "smc";
> > };
> >
> > + sound-spdif {
> > + compatible = "simple-audio-card";
> > + simple-audio-card,name = "sun50i-h6-spdif";
> > +
> > + simple-audio-card,cpu {
> > + sound-dai = <&spdif>;
> > + };
> > +
> > + simple-audio-card,codec {
> > + sound-dai = <&spdif_out>;
> > + };
> > + };
> > +
> > + spdif_out: spdif-out {
> > + #sound-dai-cells = <0>;
> > + compatible = "linux,spdif-dit";
> > + };
> > +
>
> We've always had this part in the board dts. It isn't relevant to boards
> that don't have SPDIF output.
>
> Also, not so relevant here, but there are different simple sound card
> constructs. Some support multiple audio streams with dynamic PCM routing.
> How these are configured really depends on what interfaces are usable.
>
> So keeping this at the board level is IMO a better choice.
Forgot to mention. Both patches and all parts in this patch are OK. It's
just the parts the need to be moved.
> ChenYu
>
>
> > timer {
> > compatible = "arm,armv8-timer";
> > interrupts = <GIC_PPI 13
> > @@ -282,6 +300,11 @@
> > bias-pull-up;
> > };
> >
> > + spdif_tx_pin: spdif-tx-pin {
> > + pins = "PH7";
> > + function = "spdif";
> > + };
> > +
> > uart0_ph_pins: uart0-ph-pins {
> > pins = "PH0", "PH1";
> > function = "uart0";
> > @@ -411,6 +434,21 @@
> > };
> > };
> >
> > + spdif: spdif@5093000 {
> > + #sound-dai-cells = <0>;
> > + compatible = "allwinner,sun50i-h6-spdif";
> > + reg = <0x05093000 0x400>;
> > + interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&ccu CLK_BUS_SPDIF>, <&ccu CLK_SPDIF>;
> > + clock-names = "apb", "spdif";
> > + resets = <&ccu RST_BUS_SPDIF>;
> > + dmas = <&dma 2>;
> > + dma-names = "tx";
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&spdif_tx_pin>;
> > + status = "disabled";
> > + };
> > +
> > usb2otg: usb@5100000 {
> > compatible = "allwinner,sun50i-h6-musb",
> > "allwinner,sun8i-a33-musb";
> > --
> > 2.20.1
> >
> > --
> > You received this message because you are subscribed to the Google Groups "linux-sunxi" group.
> > To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscribe@googlegroups.com.
> > To view this discussion on the web, visit https://groups.google.com/d/msgid/linux-sunxi/20190811203144.5999-2-peron.clem%40gmail.com.
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* [PATCH v1] MAINTAINERS: i2c-imx: take over maintainership
From: Oleksij Rempel @ 2019-08-12 5:08 UTC (permalink / raw)
To: Wolfram Sang, Shawn Guo, Sascha Hauer
Cc: Aisheng Dong, Andrey Smirnov, Russell King - ARM Linux admin,
Oleksij Rempel, linux-i2c, Pengutronix Kernel Team, Fabio Estevam,
Chris Healy, linux-arm-kernel, NXP Linux Team
I would like to maintain the i2c-imx driver. Since I work with
different i.MX variants and have access to the hardware, I can spend
some time on the reviewing of this driver.
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
---
MAINTAINERS | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index e81e60bd7c26..ddc1cf5cb0b9 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -6441,6 +6441,14 @@ S: Maintained
F: drivers/perf/fsl_imx8_ddr_perf.c
F: Documentation/devicetree/bindings/perf/fsl-imx-ddr.txt
+FREESCALE IMX I2C DRIVER
+M: Oleksij Rempel <o.rempel@pengutronix.de>
+R: Pengutronix Kernel Team <kernel@pengutronix.de>
+L: linux-i2c@vger.kernel.org
+S: Maintained
+F: drivers/i2c/busses/i2c-imx.c
+F: Documentation/devicetree/bindings/i2c/i2c-imx.txt
+
FREESCALE IMX LPI2C DRIVER
M: Dong Aisheng <aisheng.dong@nxp.com>
L: linux-i2c@vger.kernel.org
--
2.20.1
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* Re: [linux-sunxi] [PATCH v5 1/3] arm64: dts: allwinner: Add SPDIF node for Allwinner H6
From: Chen-Yu Tsai @ 2019-08-12 4:52 UTC (permalink / raw)
To: Clément Péron
Cc: devicetree, Maxime Ripard, linux-kernel, linux-sunxi, Rob Herring,
linux-arm-kernel
In-Reply-To: <20190811203144.5999-2-peron.clem@gmail.com>
Hi,
On Mon, Aug 12, 2019 at 4:31 AM Clément Péron <peron.clem@gmail.com> wrote:
>
> The Allwinner H6 has a SPDIF controller called OWA (One Wire Audio).
>
> Only one pinmuxing is available so set it as default.
>
> Signed-off-by: Clément Péron <peron.clem@gmail.com>
> ---
> arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 38 ++++++++++++++++++++
> 1 file changed, 38 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
> index 7628a7c83096..677eb374678d 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
> @@ -83,6 +83,24 @@
> method = "smc";
> };
>
> + sound-spdif {
> + compatible = "simple-audio-card";
> + simple-audio-card,name = "sun50i-h6-spdif";
> +
> + simple-audio-card,cpu {
> + sound-dai = <&spdif>;
> + };
> +
> + simple-audio-card,codec {
> + sound-dai = <&spdif_out>;
> + };
> + };
> +
> + spdif_out: spdif-out {
> + #sound-dai-cells = <0>;
> + compatible = "linux,spdif-dit";
> + };
> +
We've always had this part in the board dts. It isn't relevant to boards
that don't have SPDIF output.
Also, not so relevant here, but there are different simple sound card
constructs. Some support multiple audio streams with dynamic PCM routing.
How these are configured really depends on what interfaces are usable.
So keeping this at the board level is IMO a better choice.
ChenYu
> timer {
> compatible = "arm,armv8-timer";
> interrupts = <GIC_PPI 13
> @@ -282,6 +300,11 @@
> bias-pull-up;
> };
>
> + spdif_tx_pin: spdif-tx-pin {
> + pins = "PH7";
> + function = "spdif";
> + };
> +
> uart0_ph_pins: uart0-ph-pins {
> pins = "PH0", "PH1";
> function = "uart0";
> @@ -411,6 +434,21 @@
> };
> };
>
> + spdif: spdif@5093000 {
> + #sound-dai-cells = <0>;
> + compatible = "allwinner,sun50i-h6-spdif";
> + reg = <0x05093000 0x400>;
> + interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&ccu CLK_BUS_SPDIF>, <&ccu CLK_SPDIF>;
> + clock-names = "apb", "spdif";
> + resets = <&ccu RST_BUS_SPDIF>;
> + dmas = <&dma 2>;
> + dma-names = "tx";
> + pinctrl-names = "default";
> + pinctrl-0 = <&spdif_tx_pin>;
> + status = "disabled";
> + };
> +
> usb2otg: usb@5100000 {
> compatible = "allwinner,sun50i-h6-musb",
> "allwinner,sun8i-a33-musb";
> --
> 2.20.1
>
> --
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* RE: [EXT] Re: i2c: imx: support slave mode for imx I2C driver
From: Biwen Li @ 2019-08-12 4:22 UTC (permalink / raw)
To: Wolfram Sang, Leo Li
Cc: shawnguo@kernel.org, s.hauer@pengutronix.de,
linux-kernel@vger.kernel.org, linux-i2c@vger.kernel.org,
dl-linux-imx, kernel@pengutronix.de, Laurentiu Tudor,
festevam@gmail.com, linux-arm-kernel@lists.infradead.org,
Joshua Frkuska
In-Reply-To: <20190809151035.GB5099@ninjato>
> On Fri, Aug 09, 2019 at 03:18:01AM +0000, Biwen Li wrote:
> > > > The patch supports slave mode for imx I2C driver
> > > >
> > > > Signed-off-by: Biwen Li <biwen.li@nxp.com>
> > >
> > > Wow, this is much simpler than the other approach flying around:
> > >
> > > http://patchwork.ozlabs.org/patch/1124048/
> > >
> > > Can this one be master and slave on the same bus, too?
> > At the same time, the same bus is in master mode or slave mode.
>
> So, can someone kindly point out the key differences to me?
The I2C module cannot be a master and a slave simultaneously.
Such as: if the i2c module is used in slave mode with command
'echo slave-24c02 0x64 > /sys/bus/i2c/devices/i2c-0/new_device',
At the mean time, you cannot do master operations(i2cset/i2cget).
You can switch mode from slave to master with command 'echo 0x64
> /sys/bus/i2c/devices/i2c-0/delete_device', then you can do master
operations.
Adding Leo to this version too.
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* Re: [PATCH 2/2] arm64: allwinner: h6: enable i2c0 in PineH64
From: Chen-Yu Tsai @ 2019-08-12 4:19 UTC (permalink / raw)
To: Bhushan Shah
Cc: Mark Rutland, devicetree, Maxime Ripard, linux-kernel,
Rob Herring, linux-arm-kernel, Icenowy Zheng
In-Reply-To: <20190811090503.32396-3-bshah@kde.org>
On Sun, Aug 11, 2019 at 5:05 PM Bhushan Shah <bshah@kde.org> wrote:
>
> i2c0 bus is exposed by PI-2 BUS in the PineH64, model B.
>
> Signed-off-by: Bhushan Shah <bshah@kde.org>
> ---
> arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts
> index 684d1daa3081..a184361bc10d 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts
> @@ -160,6 +160,14 @@
> vcc-pg-supply = <®_aldo1>;
> };
>
> +&i2c0 {
> + status = "okay";
We don't enable interfaces that are exposed on the extension headers
by default. Instead we let the users enable it themselves, by modifying
the device tree either with overlays or through U-boot commands.
Please set this to "disabled", and add a comment mentioning that it is
on the PI-2 BUS. Having it explicitly listed in the source serves as a
pointer to people looking at how to enable stuff.
ChenYu
> +};
> +
> +&i2c0_pins {
> + bias-pull-up;
> +};
> +
> &r_i2c {
> status = "okay";
>
> --
> 2.17.1
>
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* Re: [PATCH 1/2] arm64: allwinner: h6: add I2C nodes
From: Chen-Yu Tsai @ 2019-08-12 4:12 UTC (permalink / raw)
To: Bhushan Shah
Cc: Mark Rutland, devicetree, Maxime Ripard, linux-kernel,
Rob Herring, linux-arm-kernel, Icenowy Zheng
In-Reply-To: <20190811090503.32396-2-bshah@kde.org>
On Sun, Aug 11, 2019 at 5:05 PM Bhushan Shah <bshah@kde.org> wrote:
>
> Add device-tree nodes for i2c0 to i2c2, and also add relevant pinctrl
> nodes.
>
> Suggested-by: Icenowy Zheng <icenowy@aosc.io>
> Signed-off-by: Bhushan Shah <bshah@kde.org>
> ---
> arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 54 ++++++++++++++++++++
> 1 file changed, 54 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
> index bcecca17d61d..1d9ad3ec0b65 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
> @@ -329,6 +329,21 @@
> function = "hdmi";
> };
>
> + i2c0_pins: i2c0-pins {
> + pins = "PD25", "PD26";
> + function = "i2c0";
> + };
> +
> + i2c1_pins: i2c1-pins {
> + pins = "PH5", "PH6";
> + function = "i2c1";
> + };
> +
> + i2c2_pins: i2c2-pins {
> + pins = "PD23", "PD24";
> + function = "i2c2";
> + };
> +
> mmc0_pins: mmc0-pins {
> pins = "PF0", "PF1", "PF2", "PF3",
> "PF4", "PF5";
> @@ -464,6 +479,45 @@
> status = "disabled";
> };
>
> + i2c0: i2c@5002000 {
> + compatible = "allwinner,sun6i-a31-i2c";
Please add an soc-specific compatible string, like "allwinner,sun50i-h6-i2c".
This is a last-resort way out in case the hardware isn't so compatible with
the A31.
You'll also need to update the bindings in
Documentation/devicetree/bindings/i2c/marvell,mv64xxx-i2c.yaml
The file also shows that we do this for other chips, such as the A23,
A64 and A83T.
ChenYu
> + reg = <0x05002000 0x400>;
> + interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&ccu CLK_BUS_I2C0>;
> + resets = <&ccu RST_BUS_I2C0>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&i2c0_pins>;
> + status = "disabled";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> +
> + i2c1: i2c@5002400 {
> + compatible = "allwinner,sun6i-a31-i2c";
> + reg = <0x05002400 0x400>;
> + interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&ccu CLK_BUS_I2C1>;
> + resets = <&ccu RST_BUS_I2C1>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&i2c1_pins>;
> + status = "disabled";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> +
> + i2c2: i2c@5002800 {
> + compatible = "allwinner,sun6i-a31-i2c";
> + reg = <0x05002800 0x400>;
> + interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&ccu CLK_BUS_I2C2>;
> + resets = <&ccu RST_BUS_I2C2>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&i2c2_pins>;
> + status = "disabled";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> +
> emac: ethernet@5020000 {
> compatible = "allwinner,sun50i-h6-emac",
> "allwinner,sun50i-a64-emac";
> --
> 2.17.1
>
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* RE: [PATCH 1/4] dt-bindings: watchdog: Add i.MX7ULP bindings
From: Anson Huang @ 2019-08-12 2:03 UTC (permalink / raw)
To: Guenter Roeck
Cc: mark.rutland@arm.com, devicetree@vger.kernel.org, Leonard Crestez,
schnitzeltony@gmail.com, linux-watchdog@vger.kernel.org,
otavio@ossystems.com.br, festevam@gmail.com,
s.hauer@pengutronix.de, jan.tuerk@emtrion.com,
linux@armlinux.org.uk, linux-kernel@vger.kernel.org,
robh+dt@kernel.org, dl-linux-imx, kernel@pengutronix.de,
u.kleine-koenig@pengutronix.de, wim@linux-watchdog.org,
shawnguo@kernel.org, linux-arm-kernel@lists.infradead.org
In-Reply-To: <20190809164245.GA17136@roeck-us.net>
Hi, Guenter
> On Fri, Aug 09, 2019 at 03:13:59PM +0800, Anson Huang wrote:
> > Add the watchdog bindings for Freescale i.MX7ULP.
> >
> > Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
> > ---
> > .../bindings/watchdog/fsl-imx7ulp-wdt.txt | 22
> ++++++++++++++++++++++
> > 1 file changed, 22 insertions(+)
> > create mode 100644
> > Documentation/devicetree/bindings/watchdog/fsl-imx7ulp-wdt.txt
> >
> > diff --git
> > a/Documentation/devicetree/bindings/watchdog/fsl-imx7ulp-wdt.txt
> > b/Documentation/devicetree/bindings/watchdog/fsl-imx7ulp-wdt.txt
> > new file mode 100644
> > index 0000000..d83fc5c
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/watchdog/fsl-imx7ulp-wdt.txt
> > @@ -0,0 +1,22 @@
> > +* Freescale i.MX7ULP Watchdog Timer (WDT) Controller
> > +
> > +Required properties:
> > +- compatible : Should be "fsl,imx7ulp-wdt"
> > +- reg : Should contain WDT registers location and length
> > +- interrupts : Should contain WDT interrupt
> > +- clocks: Should contain a phandle pointing to the gated peripheral clock.
>
> The driver as submitted does not include clock or interrupt handling.
> Why are those properties listed as mandatory if they are not really needed
> (nor used) ?
I missed the clk part in driver, it is working ONLY because the wdog clock is enabled
unexpected, I will add it in V2, thanks for pointing out such big mistake!
Anson
>
> > +
> > +Optional properties:
> > +- timeout-sec : Contains the watchdog timeout in seconds
> > +
> > +Examples:
> > +
> > +wdog1: wdog@403d0000 {
> > + compatible = "fsl,imx7ulp-wdt";
> > + reg = <0x403d0000 0x10000>;
> > + interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&pcc2 IMX7ULP_CLK_WDG1>;
> > + assigned-clocks = <&pcc2 IMX7ULP_CLK_WDG1>;
> > + assigned-clocks-parents = <&scg1 IMX7ULP_CLK_FIRC_BUS_CLK>;
> > + timeout-sec = <40>;
> > +};
> > --
> > 2.7.4
> >
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