* [PATCH 1/2] arm64: Add initial support for E0PD
From: Mark Brown @ 2019-08-12 12:57 UTC (permalink / raw)
To: Catalin Marinas, Will Deacon; +Cc: Mark Brown, linux-arm-kernel
In-Reply-To: <20190812125738.17388-1-broonie@kernel.org>
Kernel Page Table Isolation (KPTI) is used to mitigate some speculation
based security issues by ensuring that the kernel is not mapped when
userspace is running but this approach is expensive and is incompatible
with SPE. E0PD, introduced in the ARMv8.5 extensions, provides an
alternative to this which ensures that accesses from userspace to the
kernel's half of the memory map to always fault with constant time,
preventing timing attacks without requiring constant unmapping and
remapping or preventing legitimate accesses.
This initial patch does not yet integrate with KPTI, this will be dealt
with in followup patches. Ideally we could ensure that by default we
don't use KPTI on CPUs where E0PD is present.
Signed-off-by: Mark Brown <broonie@kernel.org>
---
arch/arm64/Kconfig | 14 +++++++++++++
arch/arm64/include/asm/cpucaps.h | 3 ++-
arch/arm64/include/asm/pgtable-hwdef.h | 2 ++
arch/arm64/include/asm/sysreg.h | 1 +
arch/arm64/kernel/cpufeature.c | 27 ++++++++++++++++++++++++++
5 files changed, 46 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index c6a978b0fb7c..3a6875a5bb99 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -1409,6 +1409,20 @@ config ARM64_PTR_AUTH
endmenu
+menu "ARMv8.5 architectural features"
+
+config ARM64_E0PD
+ bool "Enable support for E0PD"
+ default y
+ help
+ E0PD (part of the ARMv8.5 extensions) ensures that EL0
+ accesses made via TTBR1 always fault in constant time,
+ providing the same guarantees as KPTI with lower overhead.
+
+ This option enables E0PD where available.
+
+endmenu
+
config ARM64_SVE
bool "ARM Scalable Vector Extension support"
default y
diff --git a/arch/arm64/include/asm/cpucaps.h b/arch/arm64/include/asm/cpucaps.h
index f19fe4b9acc4..f25388981075 100644
--- a/arch/arm64/include/asm/cpucaps.h
+++ b/arch/arm64/include/asm/cpucaps.h
@@ -52,7 +52,8 @@
#define ARM64_HAS_IRQ_PRIO_MASKING 42
#define ARM64_HAS_DCPODP 43
#define ARM64_WORKAROUND_1463225 44
+#define ARM64_HAS_E0PD 45
-#define ARM64_NCAPS 45
+#define ARM64_NCAPS 46
#endif /* __ASM_CPUCAPS_H */
diff --git a/arch/arm64/include/asm/pgtable-hwdef.h b/arch/arm64/include/asm/pgtable-hwdef.h
index 3df60f97da1f..685842e52c3d 100644
--- a/arch/arm64/include/asm/pgtable-hwdef.h
+++ b/arch/arm64/include/asm/pgtable-hwdef.h
@@ -292,6 +292,8 @@
#define TCR_HD (UL(1) << 40)
#define TCR_NFD0 (UL(1) << 53)
#define TCR_NFD1 (UL(1) << 54)
+#define TCR_E0PD0 (UL(1) << 55)
+#define TCR_E0PD1 (UL(1) << 56)
/*
* TTBR.
diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index 1df45c7ffcf7..37a0926536d3 100644
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -652,6 +652,7 @@
#define ID_AA64MMFR1_VMIDBITS_16 2
/* id_aa64mmfr2 */
+#define ID_AA64MMFR2_E0PD_SHIFT 60
#define ID_AA64MMFR2_FWB_SHIFT 40
#define ID_AA64MMFR2_AT_SHIFT 32
#define ID_AA64MMFR2_LVA_SHIFT 16
diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
index 95201e5ff5e1..4aa1d2026bef 100644
--- a/arch/arm64/kernel/cpufeature.c
+++ b/arch/arm64/kernel/cpufeature.c
@@ -211,6 +211,7 @@ static const struct arm64_ftr_bits ftr_id_aa64mmfr1[] = {
};
static const struct arm64_ftr_bits ftr_id_aa64mmfr2[] = {
+ ARM64_FTR_BITS(FTR_HIDDEN, FTR_NONSTRICT, FTR_LOWER_SAFE, ID_AA64MMFR2_E0PD_SHIFT, 4, 0),
ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64MMFR2_FWB_SHIFT, 4, 0),
ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64MMFR2_AT_SHIFT, 4, 0),
ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64MMFR2_LVA_SHIFT, 4, 0),
@@ -1236,6 +1237,19 @@ static void cpu_enable_address_auth(struct arm64_cpu_capabilities const *cap)
}
#endif /* CONFIG_ARM64_PTR_AUTH */
+#ifdef CONFIG_ARM64_E0PD
+static void cpu_enable_e0pd(struct arm64_cpu_capabilities const *cap)
+{
+ /*
+ * The cpu_enable() callback gets called even on CPUs that
+ * don't detect the feature so we need to verify if we can
+ * enable.
+ */
+ if (this_cpu_has_cap(ARM64_HAS_E0PD))
+ sysreg_clear_set(tcr_el1, 0, TCR_E0PD1);
+}
+#endif /* CONFIG_ARM64_E0PD */
+
#ifdef CONFIG_ARM64_PSEUDO_NMI
static bool enable_pseudo_nmi;
@@ -1551,6 +1565,19 @@ static const struct arm64_cpu_capabilities arm64_features[] = {
.sign = FTR_UNSIGNED,
.min_field_value = 1,
},
+#endif
+#ifdef CONFIG_ARM64_E0PD
+ {
+ .desc = "E0PD",
+ .capability = ARM64_HAS_E0PD,
+ .type = ARM64_CPUCAP_WEAK_LOCAL_CPU_FEATURE,
+ .sys_reg = SYS_ID_AA64MMFR2_EL1,
+ .sign = FTR_UNSIGNED,
+ .field_pos = ID_AA64MMFR2_E0PD_SHIFT,
+ .matches = has_cpuid_feature,
+ .min_field_value = 1,
+ .cpu_enable = cpu_enable_e0pd,
+ },
#endif
{},
};
--
2.20.1
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* [PATCH 2/2] arm64: Don't use KPTI where we have E0PD
From: Mark Brown @ 2019-08-12 12:57 UTC (permalink / raw)
To: Catalin Marinas, Will Deacon; +Cc: Mark Brown, linux-arm-kernel
In-Reply-To: <20190812125738.17388-1-broonie@kernel.org>
Since E0PD is intended to fulfil the same role as KPTI we don't need to
use KPTI on CPUs where E0PD is available, we can rely on E0PD instead.
Change the check that forces KPTI on when KASLR is enabled to check for
E0PD before doing so, CPUs with E0PD are not expected to be affected by
meltdown so should not need to enable KPTI for other reasons.
Since we repeat the KPTI check for all CPUs we will still enable KPTI if
any of the CPUs in the system lacks E0PD. Since KPTI itself is not changed
by this patch once we enable KPTI we will do so for all CPUs. This is safe
but not optimally performant for such systems.
KPTI can still be forced on from the command line if required.
Signed-off-by: Mark Brown <broonie@kernel.org>
---
arch/arm64/kernel/cpufeature.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
index 4aa1d2026bef..322004409211 100644
--- a/arch/arm64/kernel/cpufeature.c
+++ b/arch/arm64/kernel/cpufeature.c
@@ -995,7 +995,7 @@ static bool unmap_kernel_at_el0(const struct arm64_cpu_capabilities *entry,
/* Useful for KASLR robustness */
if (IS_ENABLED(CONFIG_RANDOMIZE_BASE) && kaslr_offset() > 0) {
- if (!__kpti_forced) {
+ if (!__kpti_forced && !this_cpu_has_cap(ARM64_HAS_E0PD)) {
str = "KASLR";
__kpti_forced = 1;
}
--
2.20.1
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* Re: [PATCH v3 02/11] dt-bindings: clock: imx-lpcg: add support to parse clocks from device tree
From: Shawn Guo @ 2019-08-12 13:00 UTC (permalink / raw)
To: Dong Aisheng
Cc: Dong Aisheng, devicetree, sboyd, Michael Turquette, Rob Herring,
dl-linux-imx, Sascha Hauer, Fabio Estevam, linux-clk,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE
In-Reply-To: <CAA+hA=TVv8m2GZr0W-u+S6XzJUCYrFDF95iyUGyAsbYMwatyZg@mail.gmail.com>
On Mon, Aug 05, 2019 at 11:27:20AM +0800, Dong Aisheng wrote:
> > > +- compatible: Should be one of:
> > > + "fsl,imx8qxp-lpcg"
> > > + "fsl,imx8qm-lpcg" followed by "fsl,imx8qxp-lpcg".
> > > +- reg: Address and length of the register set.
> > > +- #clock-cells: Should be 1. One LPCG supports multiple clocks.
> > > +- clocks: Input parent clocks phandle array for each clock.
> > > +- bit-offset: An integer array indicating the bit offset for each clock.
> >
> > I guess that the driver should be able to figure bit offset from
> > 'clock-indices' property.
> >
>
> Yes, it can be done in theory.
> Then the binding may look like:
> sdhc0_lpcg: clock-controller@5b200000 {
> ...
> #clock-cells = <1>;
> clocks = <&sdhc0_clk IMX_SC_PM_CLK_PER>,
> <&conn_ipg_clk>, <&conn_axi_clk>;
> clock-indices = <0>, <16>, <20>;
> clock-output-names = "sdhc0_lpcg_per_clk",
> "sdhc0_lpcg_ipg_clk",
> "sdhc0_lpcg_ahb_clk";
> power-domains = <&pd IMX_SC_R_SDHC_0>;
> };
>
> usdhc1: mmc@5b010000 {
> ...
> clocks = <&sdhc0_lpcg 16>,
> <&sdhc0_lpcg 0>,
> <&sdhc0_lpcg 20>;
> clock-names = "ipg", "per", "ahb";
> };
>
> However, after trying, i found one limitation if using clock-indices
> that users have to do a secondary search for the indices value from clock names
> which is not very friendly.
>
> Formerly from the clock output names, user can easily get the clock
> index as they're
> in fixed orders as output names, so very easily to use.
> e.g.
> clocks = <&sdhc0_lpcg 1>,
> <&sdhc0_lpcg 0>,
> <&sdhc0_lpcg 2>;
>
> If using clock-indices, users have no way to know it's clock index
> from clock output names order
> unless they do a secondary search from the clock-indice array accordingly.
> For example, for "sdhc0_lpcg_ahb_clk", user can easily know its
> reference is <&sdhc0_lpcg 2>.
> But if using clock-indice, we need search clock-indices array to find
> its reference
> becomes <&sdhc0_lpcg 20>. So this seems like a drawback if using clock-indices.
Shouldn't we have constant macro defined for those numbers, so that both
'clock-indices' and 'clocks' of client device can use?
>
> Therefore, personally i'm still a bit intend to the original way which
> is more simple and
> straightforward from user point of view, unless there's a strong
> objections on define another
> vendor private property.
>
> Shawn,
> How do you think?
> Should we enforce the complexity to users?
>
> > > +- hw-autogate: Boolean array indicating whether supports HW autogate for
> > > + each clock.
> >
> > Not sure why it needs to be a property in DT. Or asking it different
> > way, when it should be true and when false?
> >
>
> It is one LPCG feature.
> For some specific device LPCGs, it may support clock auto gating. (depends on
> IP's capability. e.g. uSDHC).
> So we define this feature in DT as well in case if user may want to
> use it in the future.
>
> But AFAIK, there's still no one using it. Most drivers reply on runtime PM to do
> clock management. Did not use LPCG auto gate off feature.
> But the current LPCG driver API does support this parameter.
>
> If you think it's unnecessary to define it in DT as there're still no
> users, i can remove it
> and disabling autogate in driver by default.
I would suggest to drop it then.
Shawn
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* Re: [PATCH v3 20/21] ARM: dts: imx6ull-colibri: Add touchscreen used with Eval Board
From: Philippe Schenker @ 2019-08-12 13:14 UTC (permalink / raw)
To: stefan@agner.ch, Marcel Ziswiler, festevam@gmail.com,
devicetree@vger.kernel.org, mark.rutland@arm.com,
Max Krummenacher, shawnguo@kernel.org, michal.vokac@ysoft.com,
robh+dt@kernel.org
Cc: linux-imx@nxp.com, s.hauer@pengutronix.de, kernel@pengutronix.de,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
In-Reply-To: <c3eb930aa727067e3d5bbc62523feb6b032244c0.camel@toradex.com>
On Fri, 2019-08-09 at 15:54 +0000, Marcel Ziswiler wrote:
> Hi Philippe
>
> On Wed, 2019-08-07 at 08:26 +0000, Philippe Schenker wrote:
> > This adds the common touchscreen that is used with Toradex's
> > Eval Boards.
>
> Is that really Eval Board specific?
Since we provide the needed signals as standard on every Eval Board,
this is not specific to the Eval Board.
>
> > Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
> >
> > ---
> >
> > Changes in v3: None
> > Changes in v2:
> > - Removed f0710a, that is downstream only
> > - Changed to generic node name
> > - Better comment
> >
> > .../arm/boot/dts/imx6ull-colibri-eval-v3.dtsi | 24
> > +++++++++++++++++++
> > 1 file changed, 24 insertions(+)
> >
> > diff --git a/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi
> > b/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi
> > index d3c4809f140e..78e74bfeca1b 100644
> > --- a/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi
> > +++ b/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi
> > @@ -112,6 +112,21 @@
> > &i2c1 {
> > status = "okay";
> >
> > + /*
> > + * Touchscreen is using SODIMM 28/30, also used for PWM<B>,
> > PWM<C>,
> > + * aka pwm2, pwm3. so if you enable touchscreen, disable the
> > pwms
> > + */
> > + touchscreen@4a {
> > + compatible = "atmel,maxtouch";
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_gpiotouch>;
> > + reg = <0x4a>;
> > + interrupt-parent = <&gpio4>;
> > + interrupts = <16 IRQ_TYPE_EDGE_FALLING>; /* SODIMM 28
> > */
> > + reset-gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>; /*
> > SODIMM 30 */
> > + status = "disabled";
> > + };
> > +
> > /* M41T0M6 real time clock on carrier board */
> > m41t0m6: rtc@68 {
> > compatible = "st,m41t0";
> > @@ -188,3 +203,12 @@
> > sd-uhs-sdr104;
> > status = "okay";
> > };
> > +
> > +&iomuxc {
> > + pinctrl_gpiotouch: touchgpios {
> > + fsl,pins = <
> > + MX6UL_PAD_NAND_DQS__GPIO4_IO16 0x74
> > + MX6UL_PAD_ENET1_TX_EN__GPIO2_IO05 0x14
> > + >;
> > + };
> > +};
>
> I guess that could also be moved to the module's dtsi for any carrier
> board to potentially profit from.
I think this clearly is physically not present on our module so I would
not do that. I like to leave that in here as is, so it offers an example
of how to hook this touchscreen up in DT.
Philippe
>
> Cheers
>
> Marcel
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* Re: Fwd: [CRON] Broken: ClangBuiltLinux/continuous-integration#895 (master - 2a3984b)
From: Phil Auld @ 2019-08-12 13:16 UTC (permalink / raw)
To: Will Deacon
Cc: Mark Rutland, Stephen Rothwell, Arnd Bergmann, Peter Zijlstra,
Will Deacon, Nick Desaulniers, dietmar.eggemann, linux-next,
Catalin Marinas, Mark Brown, tglx, Linux ARM
In-Reply-To: <20190812125542.eiv5cfjpfj3oke2p@willie-the-truck>
On Mon, Aug 12, 2019 at 01:55:43PM +0100 Will Deacon wrote:
> On Mon, Aug 12, 2019 at 01:54:14PM +0100, Will Deacon wrote:
> > Phil -- is there a fix queued for this somewhere?
>
> Ha, tglx beat me by two minutes. This is now fixed in -tip.
>
> Will
Yeah, it's now fixed. Sorry about that...
Cheers,
Phil
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* Re: [PATCH 3/5] media: platform: Add jpeg enc feature
From: Hans Verkuil @ 2019-08-12 13:18 UTC (permalink / raw)
To: Xia Jiang, Rob Herring, Matthias Brugger, Rick Chang
Cc: devicetree, srv_heupstream, linux-kernel, Tomasz Figa,
linux-mediatek, linux-media, linux-arm-kernel, Marek Szyprowski
In-Reply-To: <20190717093034.22826-4-xia.jiang@mediatek.com>
Hi Xia,
Some review comments below:
On 7/17/19 11:30 AM, Xia Jiang wrote:
> Add mtk jpeg encode v4l2 driver based on jpeg decode, because that jpeg
> decode and encode have great similarities with function operation.
> add EXIF enable control for jpeg encode.
>
> Change-Id: I38bf86a372f69d42a4680c4d772b64a30e81d7be
Please don't include Change-Id tags, these do not belong in the kernel repo.
> Signed-off-by: Xia Jiang <xia.jiang@mediatek.com>
> ---
> drivers/media/platform/mtk-jpeg/Makefile | 5 +-
> .../media/platform/mtk-jpeg/mtk_jpeg_core.c | 740 ++++++++++++++----
> .../media/platform/mtk-jpeg/mtk_jpeg_core.h | 114 ++-
> .../media/platform/mtk-jpeg/mtk_jpeg_dec_hw.h | 7 +-
> .../media/platform/mtk-jpeg/mtk_jpeg_enc_hw.c | 175 +++++
> .../media/platform/mtk-jpeg/mtk_jpeg_enc_hw.h | 60 ++
> .../platform/mtk-jpeg/mtk_jpeg_enc_reg.h | 49 ++
> drivers/media/v4l2-core/v4l2-ctrls.c | 1 +
> include/uapi/linux/v4l2-controls.h | 2 +
> 9 files changed, 986 insertions(+), 167 deletions(-)
> create mode 100644 drivers/media/platform/mtk-jpeg/mtk_jpeg_enc_hw.c
> create mode 100644 drivers/media/platform/mtk-jpeg/mtk_jpeg_enc_hw.h
> create mode 100644 drivers/media/platform/mtk-jpeg/mtk_jpeg_enc_reg.h
>
> diff --git a/drivers/media/platform/mtk-jpeg/Makefile b/drivers/media/platform/mtk-jpeg/Makefile
> index 994fcd66069c..c2d7774e59fb 100644
> --- a/drivers/media/platform/mtk-jpeg/Makefile
> +++ b/drivers/media/platform/mtk-jpeg/Makefile
> @@ -1,2 +1,5 @@
> -mtk_jpeg-objs := mtk_jpeg_core.o mtk_jpeg_dec_hw.o mtk_jpeg_dec_parse.o
> +mtk_jpeg-objs := mtk_jpeg_core.o \
> + mtk_jpeg_dec_hw.o \
> + mtk_jpeg_dec_parse.o \
> + mtk_jpeg_enc_hw.o
> obj-$(CONFIG_VIDEO_MEDIATEK_JPEG) += mtk_jpeg.o
> diff --git a/drivers/media/platform/mtk-jpeg/mtk_jpeg_core.c b/drivers/media/platform/mtk-jpeg/mtk_jpeg_core.c
> index 49e3b5284006..b2d6537e8c34 100644
> --- a/drivers/media/platform/mtk-jpeg/mtk_jpeg_core.c
> +++ b/drivers/media/platform/mtk-jpeg/mtk_jpeg_core.c
> @@ -2,6 +2,7 @@
> * Copyright (c) 2016 MediaTek Inc.
> * Author: Ming Hsiu Tsai <minghsiu.tsai@mediatek.com>
> * Rick Chang <rick.chang@mediatek.com>
> + * Xia Jiang <xia.jiang@mediatek.com>
> *
> * This program is free software; you can redistribute it and/or modify
> * it under the terms of the GNU General Public License version 2 as
> @@ -31,6 +32,7 @@
> #include <media/videobuf2-dma-contig.h>
> #include <soc/mediatek/smi.h>
>
> +#include "mtk_jpeg_enc_hw.h"
> #include "mtk_jpeg_dec_hw.h"
> #include "mtk_jpeg_core.h"
> #include "mtk_jpeg_dec_parse.h"
> @@ -39,7 +41,8 @@ static struct mtk_jpeg_fmt mtk_jpeg_formats[] = {
> {
> .fourcc = V4L2_PIX_FMT_JPEG,
> .colplanes = 1,
> - .flags = MTK_JPEG_FMT_FLAG_DEC_OUTPUT,
> + .flags = MTK_JPEG_FMT_FLAG_DEC_OUTPUT |
> + MTK_JPEG_FMT_FLAG_ENC_CAPTURE,
> },
> {
> .fourcc = V4L2_PIX_FMT_YUV420M,
> @@ -59,6 +62,42 @@ static struct mtk_jpeg_fmt mtk_jpeg_formats[] = {
> .v_align = 3,
> .flags = MTK_JPEG_FMT_FLAG_DEC_CAPTURE,
> },
> + {
> + .fourcc = V4L2_PIX_FMT_NV12M,
> + .h_sample = {4, 2, 2},
> + .v_sample = {4, 2, 2},
> + .colplanes = 2,
> + .h_align = 4,
> + .v_align = 4,
> + .flags = MTK_JPEG_FMT_FLAG_ENC_OUTPUT,
> + },
> + {
> + .fourcc = V4L2_PIX_FMT_NV21M,
> + .h_sample = {4, 2, 2},
> + .v_sample = {4, 2, 2},
> + .colplanes = 2,
> + .h_align = 4,
> + .v_align = 4,
> + .flags = MTK_JPEG_FMT_FLAG_ENC_OUTPUT,
> + },
> + {
> + .fourcc = V4L2_PIX_FMT_YUYV,
> + .h_sample = {4, 2, 2},
> + .v_sample = {4, 4, 4},
> + .colplanes = 1,
> + .h_align = 4,
> + .v_align = 3,
> + .flags = MTK_JPEG_FMT_FLAG_ENC_OUTPUT,
> + },
> + {
> + .fourcc = V4L2_PIX_FMT_YVYU,
> + .h_sample = {4, 2, 2},
> + .v_sample = {4, 4, 4},
> + .colplanes = 1,
> + .h_align = 4,
> + .v_align = 3,
> + .flags = MTK_JPEG_FMT_FLAG_ENC_OUTPUT,
> + },
> };
>
> #define MTK_JPEG_NUM_FORMATS ARRAY_SIZE(mtk_jpeg_formats)
> @@ -73,11 +112,19 @@ struct mtk_jpeg_src_buf {
> struct list_head list;
> int flags;
> struct mtk_jpeg_dec_param dec_param;
> + struct mtk_jpeg_enc_param enc_param;
> };
>
> +#define MTK_MAX_CTRLS_HINT 20
> +
> static int debug;
> module_param(debug, int, 0644);
>
> +static inline struct mtk_jpeg_ctx *ctrl_to_ctx(struct v4l2_ctrl *ctrl)
> +{
> + return container_of(ctrl->handler, struct mtk_jpeg_ctx, ctrl_hdl);
> +}
> +
> static inline struct mtk_jpeg_ctx *mtk_jpeg_fh_to_ctx(struct v4l2_fh *fh)
> {
> return container_of(fh, struct mtk_jpeg_ctx, fh);
> @@ -94,10 +141,81 @@ static int mtk_jpeg_querycap(struct file *file, void *priv,
> {
> struct mtk_jpeg_dev *jpeg = video_drvdata(file);
>
> - strscpy(cap->driver, MTK_JPEG_NAME " decoder", sizeof(cap->driver));
> - strscpy(cap->card, MTK_JPEG_NAME " decoder", sizeof(cap->card));
> - snprintf(cap->bus_info, sizeof(cap->bus_info), "platform:%s",
> - dev_name(jpeg->dev));
> + strscpy(cap->driver, MTK_JPEG_NAME, sizeof(cap->driver));
> + if (jpeg->mode == MTK_JPEG_ENC)
> + strscpy(cap->card, MTK_JPEG_NAME " encoder", sizeof(cap->card));
> + else
> + strscpy(cap->card, MTK_JPEG_NAME " decoder", sizeof(cap->card));
> + snprintf(cap->bus_info, sizeof(cap->bus_info), "platform:%s",
> + dev_name(jpeg->dev));
> +
> + return 0;
> +}
> +
> +static int vidioc_jpeg_s_ctrl(struct v4l2_ctrl *ctrl)
> +{
> + struct mtk_jpeg_ctx *ctx = ctrl_to_ctx(ctrl);
> + struct jpeg_enc_param *p = &ctx->jpeg_param;
> + struct mtk_jpeg_dev *jpeg = ctx->jpeg;
> + int ret = 0;
> +
> + switch (ctrl->id) {
> + case V4L2_CID_JPEG_RESTART_INTERVAL:
> + p->restart_interval = ctrl->val;
> + break;
> + case V4L2_CID_JPEG_COMPRESSION_QUALITY:
> + p->enc_quality = ctrl->val;
> + break;
> + case V4L2_CID_JPEG_ENABLE_EXIF:
> + p->enable_exif = ctrl->val;
> + break;
> + }
> +
> + v4l2_dbg(2, debug, &jpeg->v4l2_dev, "%s val = %d",
> + v4l2_ctrl_get_name(ctrl->id), ctrl->val);
> +
> + return ret;
> +}
> +
> +static const struct v4l2_ctrl_ops mtk_jpeg_ctrl_ops = {
> + .s_ctrl = vidioc_jpeg_s_ctrl,
> +};
> +
> +int mtk_jpeg_ctrls_setup(struct mtk_jpeg_ctx *ctx)
> +{
> + const struct v4l2_ctrl_ops *ops = &mtk_jpeg_ctrl_ops;
> + struct v4l2_ctrl_handler *handler = &ctx->ctrl_hdl;
> + struct mtk_jpeg_dev *jpeg = ctx->jpeg;
> +
> + v4l2_ctrl_handler_init(handler, MTK_MAX_CTRLS_HINT);
> +
> + if (jpeg->mode == MTK_JPEG_ENC) {
> + v4l2_ctrl_new_std(handler, ops, V4L2_CID_JPEG_RESTART_INTERVAL,
> + 0, 100, 1, 0);
> + if (handler->error) {
> + v4l2_err(&jpeg->v4l2_dev, "V4L2_CID_JPEG_RESTART_INTERVAL Init",
> + "control handler fail %d\n", handler->error);
> + return handler->error;
> + }
> + v4l2_ctrl_new_std(handler, ops,
> + V4L2_CID_JPEG_COMPRESSION_QUALITY, 48, 100, 1,
> + 90);
> + if (handler->error) {
> + v4l2_err(&jpeg->v4l2_dev, "V4L2_CID_JPEG_COMPRESSION_QUALITY",
> + "Init control handler fail %d\n",
> + handler->error);
> + return handler->error;
> + }
> + v4l2_ctrl_new_std(handler, ops, V4L2_CID_JPEG_ENABLE_EXIF, 0,
> + 1, 1, 0);
> + if (handler->error) {
> + v4l2_err(&jpeg->v4l2_dev, "V4L2_CID_JPEG_ENABLE_EXIF Init",
> + "control handler fail %d\n", handler->error);
> + return handler->error;
> + }
No need to test handler->error after each v4l2_ctrl_new_std(). You have to
do it only once after the last control was added. v4l2_ctrl_new_std() doesn't
do anything if handler->error was non-zero.
> + }
> +
> + v4l2_ctrl_handler_setup(&ctx->ctrl_hdl);
>
> return 0;
> }
> @@ -126,23 +244,29 @@ static int mtk_jpeg_enum_fmt(struct mtk_jpeg_fmt *mtk_jpeg_formats, int n,
> static int mtk_jpeg_enum_fmt_vid_cap(struct file *file, void *priv,
> struct v4l2_fmtdesc *f)
> {
> + struct mtk_jpeg_ctx *ctx = mtk_jpeg_fh_to_ctx(priv);
> +
> return mtk_jpeg_enum_fmt(mtk_jpeg_formats, MTK_JPEG_NUM_FORMATS, f,
> + ctx->jpeg->mode == MTK_JPEG_ENC ?
> + MTK_JPEG_FMT_FLAG_ENC_CAPTURE :
> MTK_JPEG_FMT_FLAG_DEC_CAPTURE);
> }
>
> static int mtk_jpeg_enum_fmt_vid_out(struct file *file, void *priv,
> struct v4l2_fmtdesc *f)
> {
> + struct mtk_jpeg_ctx *ctx = mtk_jpeg_fh_to_ctx(priv);
> +
> return mtk_jpeg_enum_fmt(mtk_jpeg_formats, MTK_JPEG_NUM_FORMATS, f,
> + ctx->jpeg->mode == MTK_JPEG_ENC ?
> + MTK_JPEG_FMT_FLAG_ENC_OUTPUT :
> MTK_JPEG_FMT_FLAG_DEC_OUTPUT);
> }
>
> -static struct mtk_jpeg_q_data *mtk_jpeg_get_q_data(struct mtk_jpeg_ctx *ctx,
> - enum v4l2_buf_type type)
> +static struct mtk_jpeg_q_data *
> +mtk_jpeg_get_q_data(struct mtk_jpeg_ctx *ctx, enum v4l2_buf_type type)
> {
> - if (V4L2_TYPE_IS_OUTPUT(type))
> - return &ctx->out_q;
> - return &ctx->cap_q;
> + return V4L2_TYPE_IS_OUTPUT(type) ? &ctx->out_q : &ctx->cap_q;
> }
>
> static struct mtk_jpeg_fmt *mtk_jpeg_find_format(struct mtk_jpeg_ctx *ctx,
> @@ -151,9 +275,14 @@ static struct mtk_jpeg_fmt *mtk_jpeg_find_format(struct mtk_jpeg_ctx *ctx,
> {
> unsigned int k, fmt_flag;
>
> - fmt_flag = (fmt_type == MTK_JPEG_FMT_TYPE_OUTPUT) ?
> - MTK_JPEG_FMT_FLAG_DEC_OUTPUT :
> - MTK_JPEG_FMT_FLAG_DEC_CAPTURE;
> + if (ctx->jpeg->mode == MTK_JPEG_ENC)
> + fmt_flag = (fmt_type == MTK_JPEG_FMT_TYPE_OUTPUT) ?
> + MTK_JPEG_FMT_FLAG_ENC_OUTPUT :
> + MTK_JPEG_FMT_FLAG_ENC_CAPTURE;
> + else
> + fmt_flag = (fmt_type == MTK_JPEG_FMT_TYPE_OUTPUT) ?
> + MTK_JPEG_FMT_FLAG_DEC_OUTPUT :
> + MTK_JPEG_FMT_FLAG_DEC_CAPTURE;
>
> for (k = 0; k < MTK_JPEG_NUM_FORMATS; k++) {
> struct mtk_jpeg_fmt *fmt = &mtk_jpeg_formats[k];
> @@ -210,7 +339,7 @@ static int mtk_jpeg_try_fmt_mplane(struct v4l2_format *f,
> {
> struct v4l2_pix_format_mplane *pix_mp = &f->fmt.pix_mp;
> struct mtk_jpeg_dev *jpeg = ctx->jpeg;
> - int i;
> + int i, align_w, align_h;
>
> memset(pix_mp->reserved, 0, sizeof(pix_mp->reserved));
> pix_mp->field = V4L2_FIELD_NONE;
> @@ -224,36 +353,111 @@ static int mtk_jpeg_try_fmt_mplane(struct v4l2_format *f,
> pix_mp->pixelformat = fmt->fourcc;
>
> if (q_type == MTK_JPEG_FMT_TYPE_OUTPUT) {
> - struct v4l2_plane_pix_format *pfmt = &pix_mp->plane_fmt[0];
> -
> - mtk_jpeg_bound_align_image(&pix_mp->width, MTK_JPEG_MIN_WIDTH,
> - MTK_JPEG_MAX_WIDTH, 0,
> - &pix_mp->height, MTK_JPEG_MIN_HEIGHT,
> - MTK_JPEG_MAX_HEIGHT, 0);
> + if (jpeg->mode == MTK_JPEG_ENC) {
> + pix_mp->height = clamp(pix_mp->height,
> + MTK_JPEG_MIN_HEIGHT,
> + MTK_JPEG_MAX_HEIGHT);
> + pix_mp->width = clamp(pix_mp->width,
> + MTK_JPEG_MIN_WIDTH,
> + MTK_JPEG_MAX_WIDTH);
> + align_w = pix_mp->width;
> + align_h = pix_mp->height;
> + align_w = round_up(align_w, 2);
> + if (pix_mp->num_planes == 1U) {
> + align_w = align_w << 1;
> + mtk_jpeg_bound_align_image(&align_w,
> + MTK_JPEG_MIN_WIDTH,
> + MTK_JPEG_MAX_WIDTH,
> + 5, &align_h,
> + MTK_JPEG_MIN_HEIGHT,
> + MTK_JPEG_MAX_HEIGHT,
> + 3);
> + pix_mp->plane_fmt[0].bytesperline = align_w;
> + pix_mp->plane_fmt[0].sizeimage =
> + align_w * align_h;
> + } else if (pix_mp->num_planes == 2U) {
> + mtk_jpeg_bound_align_image(&align_w,
> + MTK_JPEG_MIN_WIDTH,
> + MTK_JPEG_MAX_WIDTH,
> + 4, &align_h,
> + MTK_JPEG_MIN_HEIGHT,
> + MTK_JPEG_MAX_HEIGHT,
> + 4);
> + pix_mp->plane_fmt[0].bytesperline = align_w;
> + pix_mp->plane_fmt[0].sizeimage =
> + align_w * align_h;
> + pix_mp->plane_fmt[1].bytesperline = align_w;
> + pix_mp->plane_fmt[1].sizeimage =
> + (align_w * align_h) / 2;
> + } else {
> + v4l2_err(&ctx->jpeg->v4l2_dev,
> + "Unsupport num planes = %d\n",
> + pix_mp->num_planes);
> + }
> + goto end;
> + } else {
> + struct v4l2_plane_pix_format *pfmt =
> + &pix_mp->plane_fmt[0];
> +
> + mtk_jpeg_bound_align_image(&pix_mp->width,
> + MTK_JPEG_MIN_WIDTH,
> + MTK_JPEG_MAX_WIDTH, 0,
> + &pix_mp->height,
> + MTK_JPEG_MIN_HEIGHT,
> + MTK_JPEG_MAX_HEIGHT, 0);
>
> - memset(pfmt->reserved, 0, sizeof(pfmt->reserved));
> pfmt->bytesperline = 0;
> /* Source size must be aligned to 128 */
> pfmt->sizeimage = mtk_jpeg_align(pfmt->sizeimage, 128);
> if (pfmt->sizeimage == 0)
> pfmt->sizeimage = MTK_JPEG_DEFAULT_SIZEIMAGE;
> +
> goto end;
> }
> + }
>
> /* type is MTK_JPEG_FMT_TYPE_CAPTURE */
> - mtk_jpeg_bound_align_image(&pix_mp->width, MTK_JPEG_MIN_WIDTH,
> - MTK_JPEG_MAX_WIDTH, fmt->h_align,
> - &pix_mp->height, MTK_JPEG_MIN_HEIGHT,
> - MTK_JPEG_MAX_HEIGHT, fmt->v_align);
> + if (jpeg->mode == MTK_JPEG_ENC) {
> + mtk_jpeg_bound_align_image(&pix_mp->width, MTK_JPEG_MIN_WIDTH,
> + MTK_JPEG_MAX_WIDTH, 0,
> + &pix_mp->height, MTK_JPEG_MIN_HEIGHT,
> + MTK_JPEG_MAX_HEIGHT, 0);
>
> - for (i = 0; i < fmt->colplanes; i++) {
> - struct v4l2_plane_pix_format *pfmt = &pix_mp->plane_fmt[i];
> - u32 stride = pix_mp->width * fmt->h_sample[i] / 4;
> - u32 h = pix_mp->height * fmt->v_sample[i] / 4;
> + if (fmt->fourcc == V4L2_PIX_FMT_JPEG) {
> + pix_mp->plane_fmt[0].bytesperline = 0;
> + pix_mp->plane_fmt[0].sizeimage =
> + mtk_jpeg_align(pix_mp->plane_fmt[0].sizeimage,
> + 128);
> + if (pix_mp->plane_fmt[0].sizeimage == 0)
> + pix_mp->plane_fmt[0].sizeimage =
> + MTK_JPEG_DEFAULT_SIZEIMAGE;
> + }
> + } else {
> + pix_mp->height = clamp(pix_mp->height, MTK_JPEG_MIN_HEIGHT,
> + MTK_JPEG_MAX_HEIGHT);
> + pix_mp->width = clamp(pix_mp->width, MTK_JPEG_MIN_WIDTH,
> + MTK_JPEG_MAX_WIDTH);
> + mtk_jpeg_bound_align_image(&pix_mp->width, MTK_JPEG_MIN_WIDTH,
> + MTK_JPEG_MAX_WIDTH, fmt->h_align,
> + &pix_mp->height,
> + MTK_JPEG_MIN_HEIGHT,
> + MTK_JPEG_MAX_HEIGHT, fmt->v_align);
> +
> + for (i = 0; i < fmt->colplanes; i++) {
> + struct v4l2_plane_pix_format *pfmt =
> + &pix_mp->plane_fmt[i];
> + u32 stride = pix_mp->width * fmt->h_sample[i] / 4;
> + u32 h = pix_mp->height * fmt->v_sample[i] / 4;
> +
> + pfmt->bytesperline = stride;
> + pfmt->sizeimage = stride * h;
> + }
> + }
>
> + for (i = 0; i < fmt->colplanes; i++) {
> + struct v4l2_plane_pix_format *pfmt =
> + &pix_mp->plane_fmt[i];
> memset(pfmt->reserved, 0, sizeof(pfmt->reserved));
> - pfmt->bytesperline = stride;
> - pfmt->sizeimage = stride * h;
> }
> end:
> v4l2_dbg(2, debug, &jpeg->v4l2_dev, "wxh:%ux%u\n",
> @@ -454,9 +658,9 @@ static int mtk_jpeg_subscribe_event(struct v4l2_fh *fh,
> switch (sub->type) {
> case V4L2_EVENT_SOURCE_CHANGE:
> return v4l2_src_change_event_subscribe(fh, sub);
> - default:
> - return -EINVAL;
> }
> +
> + return v4l2_ctrl_subscribe_event(fh, sub);
> }
>
> static int mtk_jpeg_g_selection(struct file *file, void *priv,
> @@ -579,6 +783,13 @@ static int mtk_jpeg_queue_setup(struct vb2_queue *q,
> if (!q_data)
> return -EINVAL;
>
> + if (*num_planes) {
> + for (i = 0; i < *num_planes; i++)
> + if (sizes[i] < q_data->sizeimage[i])
> + return -EINVAL;
> + return 0;
> + }
> +
> *num_planes = q_data->fmt->colplanes;
> for (i = 0; i < q_data->fmt->colplanes; i++) {
> sizes[i] = q_data->sizeimage[i];
> @@ -659,10 +870,92 @@ static void mtk_jpeg_set_queue_data(struct mtk_jpeg_ctx *ctx,
> param->dec_w, param->dec_h);
> }
>
> +static void mtk_jpeg_set_param(struct mtk_jpeg_ctx *ctx,
> + struct mtk_jpeg_enc_param *param)
> +{
> + struct mtk_jpeg_q_data *q_data_src = &ctx->out_q;
> + struct jpeg_enc_param *jpeg_params = &ctx->jpeg_param;
> + struct mtk_jpeg_dev *jpeg = ctx->jpeg;
> + u32 width_even;
> + u32 is_420;
> + u32 padding_width;
> + u32 padding_height;
> +
> + switch (q_data_src->fmt->fourcc) {
> + case V4L2_PIX_FMT_YUYV:
> + param->enc_format = JPEG_YUV_FORMAT_YUYV;
> + break;
> + case V4L2_PIX_FMT_YVYU:
> + param->enc_format = JPEG_YUV_FORMAT_YVYU;
> + break;
> + case V4L2_PIX_FMT_NV12M:
> + param->enc_format = JPEG_YUV_FORMAT_NV12;
> + break;
> + case V4L2_PIX_FMT_NV21M:
> + param->enc_format = JPEG_YUV_FORMAT_NV12;
> + break;
> + default:
> + v4l2_err(&jpeg->v4l2_dev, "Unsupport fourcc =%d\n",
> + q_data_src->fmt->fourcc);
> + break;
> + }
> + param->enc_w = q_data_src->w;
> + param->enc_h = q_data_src->h;
> +
> + if (jpeg_params->enc_quality >= 97)
> + param->enc_quality = JPEG_ENCODE_QUALITY_Q97;
> + else if (jpeg_params->enc_quality >= 95)
> + param->enc_quality = JPEG_ENCODE_QUALITY_Q95;
> + else if (jpeg_params->enc_quality >= 92)
> + param->enc_quality = JPEG_ENCODE_QUALITY_Q92;
> + else if (jpeg_params->enc_quality >= 90)
> + param->enc_quality = JPEG_ENCODE_QUALITY_Q90;
> + else if (jpeg_params->enc_quality >= 87)
> + param->enc_quality = JPEG_ENCODE_QUALITY_Q87;
> + else if (jpeg_params->enc_quality >= 84)
> + param->enc_quality = JPEG_ENCODE_QUALITY_Q84;
> + else if (jpeg_params->enc_quality >= 80)
> + param->enc_quality = JPEG_ENCODE_QUALITY_Q80;
> + else if (jpeg_params->enc_quality >= 74)
> + param->enc_quality = JPEG_ENCODE_QUALITY_Q74;
> + else if (jpeg_params->enc_quality >= 64)
> + param->enc_quality = JPEG_ENCODE_QUALITY_Q64;
> + else if (jpeg_params->enc_quality >= 60)
> + param->enc_quality = JPEG_ENCODE_QUALITY_Q60;
> + else
> + param->enc_quality = JPEG_ENCODE_QUALITY_Q48;
> +
> + param->enable_exif = jpeg_params->enable_exif;
> + param->restart_interval = jpeg_params->restart_interval;
> +
> + width_even = ((param->enc_w + 1) >> 1) << 1;
> + is_420 = (param->enc_format == JPEG_YUV_FORMAT_NV12 ||
> + param->enc_format == JPEG_YUV_FORMAT_NV12) ? 1 : 0;
> + padding_width = mtk_jpeg_align(param->enc_w, 16);
> + padding_height = mtk_jpeg_align(param->enc_h, is_420 ? 16 : 8);
> + if (!is_420)
> + width_even = width_even << 1;
> +
> + param->img_stride = mtk_jpeg_align(width_even, (is_420 ? 16 : 32));
> + param->mem_stride = mtk_jpeg_align(width_even, (is_420 ? 16 : 32));
> + param->total_encdu =
> + ((padding_width >> 4) * (padding_height >> (is_420 ? 4 : 3)) *
> + (is_420 ? 6 : 4)) - 1;
> +
> + v4l2_dbg(0, 2, &jpeg->v4l2_dev, "fmt %d, w,h %d,%d, enable_exif %d,",
> + "enc_quality %d, restart_interval %d,img_stride %d,",
> + "mem_stride %d,totalEncDu %d\n",
> + param->enc_format, param->enc_w, param->enc_h,
> + param->enable_exif, param->enc_quality,
> + param->restart_interval, param->img_stride,
> + param->mem_stride, param->total_encdu);
> +}
> +
> static void mtk_jpeg_buf_queue(struct vb2_buffer *vb)
> {
> struct mtk_jpeg_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
> struct mtk_jpeg_dec_param *param;
> + struct mtk_jpeg_enc_param *enc_param;
> struct mtk_jpeg_dev *jpeg = ctx->jpeg;
> struct mtk_jpeg_src_buf *jpeg_src_buf;
> bool header_valid;
> @@ -674,29 +967,45 @@ static void mtk_jpeg_buf_queue(struct vb2_buffer *vb)
> goto end;
>
> jpeg_src_buf = mtk_jpeg_vb2_to_srcbuf(vb);
> - param = &jpeg_src_buf->dec_param;
> - memset(param, 0, sizeof(*param));
> -
> - if (jpeg_src_buf->flags & MTK_JPEG_BUF_FLAGS_LAST_FRAME) {
> - v4l2_dbg(1, debug, &jpeg->v4l2_dev, "Got eos\n");
> - goto end;
> - }
> - header_valid = mtk_jpeg_parse(param, (u8 *)vb2_plane_vaddr(vb, 0),
> - vb2_get_plane_payload(vb, 0));
> - if (!header_valid) {
> - v4l2_err(&jpeg->v4l2_dev, "Header invalid.\n");
> - vb2_buffer_done(vb, VB2_BUF_STATE_ERROR);
> - return;
> - }
> -
> - if (ctx->state == MTK_JPEG_INIT) {
> - struct vb2_queue *dst_vq = v4l2_m2m_get_vq(
> - ctx->fh.m2m_ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE);
> + if (jpeg->mode == MTK_JPEG_ENC) {
> + enc_param = &jpeg_src_buf->enc_param;
> + memset(enc_param, 0, sizeof(*enc_param));
> + mtk_jpeg_set_param(ctx, enc_param);
> + if (jpeg_src_buf->flags & MTK_JPEG_BUF_FLAGS_LAST_FRAME) {
> + v4l2_dbg(1, debug, &jpeg->v4l2_dev, "Got eos");
> + goto end;
> + }
> + if (ctx->state == MTK_JPEG_INIT)
> + ctx->state = MTK_JPEG_RUNNING;
> + } else {
> + param = &jpeg_src_buf->dec_param;
> + memset(param, 0, sizeof(*param));
> +
> + if (jpeg_src_buf->flags & MTK_JPEG_BUF_FLAGS_LAST_FRAME) {
> + v4l2_dbg(1, debug, &jpeg->v4l2_dev, "Got eos\n");
> + goto end;
> + }
> + header_valid = mtk_jpeg_parse(param,
> + (u8 *)vb2_plane_vaddr(vb, 0),
> + vb2_get_plane_payload(vb, 0));
> + if (!header_valid) {
> + v4l2_err(&jpeg->v4l2_dev, "Header invalid.\n");
> + vb2_buffer_done(vb, VB2_BUF_STATE_ERROR);
> + return;
> + }
>
> - mtk_jpeg_queue_src_chg_event(ctx);
> - mtk_jpeg_set_queue_data(ctx, param);
> - ctx->state = vb2_is_streaming(dst_vq) ?
> - MTK_JPEG_SOURCE_CHANGE : MTK_JPEG_RUNNING;
> + if (ctx->state == MTK_JPEG_INIT) {
> + struct vb2_queue *dst_vq;
> +
> + dst_vq = v4l2_m2m_get_vq
> + (ctx->fh.m2m_ctx,
> + V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE);
> + mtk_jpeg_queue_src_chg_event(ctx);
> + mtk_jpeg_set_queue_data(ctx, param);
> + ctx->state = vb2_is_streaming(dst_vq) ?
> + MTK_JPEG_SOURCE_CHANGE :
> + MTK_JPEG_RUNNING;
> + }
> }
> end:
> v4l2_m2m_buf_queue(ctx->fh.m2m_ctx, to_vb2_v4l2_buffer(vb));
> @@ -739,16 +1048,16 @@ static void mtk_jpeg_stop_streaming(struct vb2_queue *q)
> * subsampling. Update capture queue when the stream is off.
> */
> if (ctx->state == MTK_JPEG_SOURCE_CHANGE &&
> - !V4L2_TYPE_IS_OUTPUT(q->type)) {
> + !V4L2_TYPE_IS_OUTPUT(q->type) &&
> + ctx->jpeg->mode == MTK_JPEG_DEC) {
> struct mtk_jpeg_src_buf *src_buf;
>
> vb = v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx);
> src_buf = mtk_jpeg_vb2_to_srcbuf(&vb->vb2_buf);
> mtk_jpeg_set_queue_data(ctx, &src_buf->dec_param);
> ctx->state = MTK_JPEG_RUNNING;
> - } else if (V4L2_TYPE_IS_OUTPUT(q->type)) {
> + } else if (V4L2_TYPE_IS_OUTPUT(q->type))
> ctx->state = MTK_JPEG_INIT;
> - }
>
> while ((vb = mtk_jpeg_buf_remove(ctx, q->type)))
> v4l2_m2m_buf_done(vb, VB2_BUF_STATE_ERROR);
> @@ -803,6 +1112,28 @@ static int mtk_jpeg_set_dec_dst(struct mtk_jpeg_ctx *ctx,
> return 0;
> }
>
> +static void mtk_jpeg_set_enc_dst(struct mtk_jpeg_ctx *ctx,
> + struct vb2_buffer *dst_buf,
> + struct mtk_jpeg_enc_bs *bs)
> +{
> + bs->dma_addr = vb2_dma_contig_plane_dma_addr(dst_buf, 0) &
> + (~JPEG_ENC_DST_ADDR_OFFSET_MASK);
> + bs->dma_addr_offset = 0;
> + bs->dma_addr_offsetmask = bs->dma_addr & JPEG_ENC_DST_ADDR_OFFSET_MASK;
> + bs->size = mtk_jpeg_align(vb2_plane_size(dst_buf, 0), 128);
> +}
> +
> +static void mtk_jpeg_set_enc_src(struct mtk_jpeg_ctx *ctx,
> + struct vb2_buffer *src_buf,
> + struct mtk_jpeg_enc_fb *fb)
> +{
> + int i;
> +
> + for (i = 0; i < src_buf->num_planes; i++)
> + fb->fb_addr[i].dma_addr =
> + vb2_dma_contig_plane_dma_addr(src_buf, i);
> +}
> +
> static void mtk_jpeg_device_run(void *priv)
> {
> struct mtk_jpeg_ctx *ctx = priv;
> @@ -813,6 +1144,8 @@ static void mtk_jpeg_device_run(void *priv)
> struct mtk_jpeg_src_buf *jpeg_src_buf;
> struct mtk_jpeg_bs bs;
> struct mtk_jpeg_fb fb;
> + struct mtk_jpeg_enc_bs enc_bs;
> + struct mtk_jpeg_enc_fb enc_fb;
> int i;
>
> src_buf = v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx);
> @@ -823,30 +1156,45 @@ static void mtk_jpeg_device_run(void *priv)
> for (i = 0; i < dst_buf->vb2_buf.num_planes; i++)
> vb2_set_plane_payload(&dst_buf->vb2_buf, i, 0);
> buf_state = VB2_BUF_STATE_DONE;
> - goto dec_end;
> + goto device_run_end;
> }
>
> - if (mtk_jpeg_check_resolution_change(ctx, &jpeg_src_buf->dec_param)) {
> - mtk_jpeg_queue_src_chg_event(ctx);
> - ctx->state = MTK_JPEG_SOURCE_CHANGE;
> - v4l2_m2m_job_finish(jpeg->m2m_dev, ctx->fh.m2m_ctx);
> - return;
> - }
> + if (jpeg->mode == MTK_JPEG_ENC) {
> + mtk_jpeg_set_enc_dst(ctx, &dst_buf->vb2_buf, &enc_bs);
> + mtk_jpeg_set_enc_src(ctx, &src_buf->vb2_buf, &enc_fb);
> +
> + spin_lock_irqsave(&jpeg->hw_lock, flags);
> + mtk_jpeg_enc_reset(jpeg->reg_base);
> + mtk_jpeg_enc_set_config(jpeg->reg_base,
> + &jpeg_src_buf->enc_param, &enc_bs,
> + &enc_fb);
> +
> + mtk_jpeg_enc_start(jpeg->reg_base);
> + } else {
> + if (mtk_jpeg_check_resolution_change
> + (ctx, &jpeg_src_buf->dec_param)) {
> + mtk_jpeg_queue_src_chg_event(ctx);
> + ctx->state = MTK_JPEG_SOURCE_CHANGE;
> + v4l2_m2m_job_finish(jpeg->m2m_dev, ctx->fh.m2m_ctx);
> + return;
> + }
>
> - mtk_jpeg_set_dec_src(ctx, &src_buf->vb2_buf, &bs);
> - if (mtk_jpeg_set_dec_dst(ctx, &jpeg_src_buf->dec_param, &dst_buf->vb2_buf, &fb))
> - goto dec_end;
> + mtk_jpeg_set_dec_src(ctx, &src_buf->vb2_buf, &bs);
> + if (mtk_jpeg_set_dec_dst(ctx, &jpeg_src_buf->dec_param,
> + &dst_buf->vb2_buf, &fb))
> + goto device_run_end;
>
> - spin_lock_irqsave(&jpeg->hw_lock, flags);
> - mtk_jpeg_dec_reset(jpeg->dec_reg_base);
> - mtk_jpeg_dec_set_config(jpeg->dec_reg_base,
> - &jpeg_src_buf->dec_param, &bs, &fb);
> + spin_lock_irqsave(&jpeg->hw_lock, flags);
> + mtk_jpeg_dec_reset(jpeg->reg_base);
> + mtk_jpeg_dec_set_config(jpeg->reg_base,
> + &jpeg_src_buf->dec_param, &bs, &fb);
>
> - mtk_jpeg_dec_start(jpeg->dec_reg_base);
> + mtk_jpeg_dec_start(jpeg->reg_base);
> + }
> spin_unlock_irqrestore(&jpeg->hw_lock, flags);
> return;
>
> -dec_end:
> +device_run_end:
> v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx);
> v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx);
> v4l2_m2m_buf_done(src_buf, buf_state);
> @@ -906,30 +1254,30 @@ static void mtk_jpeg_clk_on(struct mtk_jpeg_dev *jpeg)
> ret = mtk_smi_larb_get(jpeg->larb);
> if (ret)
> dev_err(jpeg->dev, "mtk_smi_larb_get larbvdec fail %d\n", ret);
> - clk_prepare_enable(jpeg->clk_jdec_smi);
> - clk_prepare_enable(jpeg->clk_jdec);
> + if (jpeg->mode == MTK_JPEG_DEC)
> + clk_prepare_enable(jpeg->clk_jpeg_smi);
> + clk_prepare_enable(jpeg->clk_jpeg);
> }
>
> static void mtk_jpeg_clk_off(struct mtk_jpeg_dev *jpeg)
> {
> - clk_disable_unprepare(jpeg->clk_jdec);
> - clk_disable_unprepare(jpeg->clk_jdec_smi);
> + clk_disable_unprepare(jpeg->clk_jpeg);
> + if (jpeg->mode == MTK_JPEG_DEC)
> + clk_disable_unprepare(jpeg->clk_jpeg_smi);
> mtk_smi_larb_put(jpeg->larb);
> }
>
> -static irqreturn_t mtk_jpeg_dec_irq(int irq, void *priv)
> +static irqreturn_t mtk_jpeg_irq(int irq, void *priv)
> {
> struct mtk_jpeg_dev *jpeg = priv;
> struct mtk_jpeg_ctx *ctx;
> struct vb2_v4l2_buffer *src_buf, *dst_buf;
> struct mtk_jpeg_src_buf *jpeg_src_buf;
> enum vb2_buffer_state buf_state = VB2_BUF_STATE_ERROR;
> - u32 dec_irq_ret;
> - u32 dec_ret;
> + u32 irq_ret;
> + u32 ret, result_size;
> int i;
>
> - dec_ret = mtk_jpeg_dec_get_int_status(jpeg->dec_reg_base);
> - dec_irq_ret = mtk_jpeg_dec_enum_result(dec_ret);
> ctx = v4l2_m2m_get_curr_priv(jpeg->m2m_dev);
> if (!ctx) {
> v4l2_err(&jpeg->v4l2_dev, "Context is NULL\n");
> @@ -940,21 +1288,42 @@ static irqreturn_t mtk_jpeg_dec_irq(int irq, void *priv)
> dst_buf = v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx);
> jpeg_src_buf = mtk_jpeg_vb2_to_srcbuf(&src_buf->vb2_buf);
>
> - if (dec_irq_ret >= MTK_JPEG_DEC_RESULT_UNDERFLOW)
> - mtk_jpeg_dec_reset(jpeg->dec_reg_base);
> + if (jpeg->mode == MTK_JPEG_ENC) {
> + ret = mtk_jpeg_enc_get_int_status(jpeg->reg_base);
> + irq_ret = mtk_jpeg_enc_enum_result(jpeg->reg_base, ret,
> + &result_size);
>
> - if (dec_irq_ret != MTK_JPEG_DEC_RESULT_EOF_DONE) {
> - dev_err(jpeg->dev, "decode failed\n");
> - goto dec_end;
> - }
> + if (irq_ret >= MTK_JPEG_ENC_RESULT_STALL)
> + mtk_jpeg_enc_reset(jpeg->reg_base);
> +
> + if (irq_ret != MTK_JPEG_ENC_RESULT_DONE) {
> + dev_err(jpeg->dev, "encode failed\n");
> + goto irq_end;
> + }
> +
> + vb2_set_plane_payload(&dst_buf->vb2_buf, 0,
> + result_size);
> + } else {
> + ret = mtk_jpeg_dec_get_int_status(jpeg->reg_base);
> + irq_ret = mtk_jpeg_dec_enum_result(ret);
>
> - for (i = 0; i < dst_buf->vb2_buf.num_planes; i++)
> - vb2_set_plane_payload(&dst_buf->vb2_buf, i,
> - jpeg_src_buf->dec_param.comp_size[i]);
> + if (irq_ret >= MTK_JPEG_DEC_RESULT_UNDERFLOW)
> + mtk_jpeg_dec_reset(jpeg->reg_base);
> +
> + if (irq_ret != MTK_JPEG_DEC_RESULT_EOF_DONE) {
> + dev_err(jpeg->dev, "decode failed\n");
> + goto irq_end;
> + }
> +
> + for (i = 0; i < dst_buf->vb2_buf.num_planes; i++)
> + vb2_set_plane_payload
> + (&dst_buf->vb2_buf, i,
> + jpeg_src_buf->dec_param.comp_size[i]);
> + }
>
> buf_state = VB2_BUF_STATE_DONE;
>
> -dec_end:
> +irq_end:
> v4l2_m2m_buf_done(src_buf, buf_state);
> v4l2_m2m_buf_done(dst_buf, buf_state);
> v4l2_m2m_job_finish(jpeg->m2m_dev, ctx->fh.m2m_ctx);
> @@ -964,32 +1333,72 @@ static irqreturn_t mtk_jpeg_dec_irq(int irq, void *priv)
> static void mtk_jpeg_set_default_params(struct mtk_jpeg_ctx *ctx)
> {
> struct mtk_jpeg_q_data *q = &ctx->out_q;
> - int i;
> + int i, align_w, align_h;
> +
> + ctx->fh.ctrl_handler = &ctx->ctrl_hdl;
>
> ctx->colorspace = V4L2_COLORSPACE_JPEG,
> ctx->ycbcr_enc = V4L2_YCBCR_ENC_DEFAULT;
> ctx->quantization = V4L2_QUANTIZATION_DEFAULT;
> ctx->xfer_func = V4L2_XFER_FUNC_DEFAULT;
>
> - q->fmt = mtk_jpeg_find_format(ctx, V4L2_PIX_FMT_JPEG,
> + if (ctx->jpeg->mode == MTK_JPEG_ENC) {
> + q->w = MTK_JPEG_MIN_WIDTH;
> + q->h = MTK_JPEG_MIN_HEIGHT;
> +
> + q->fmt = mtk_jpeg_find_format(ctx, V4L2_PIX_FMT_YUYV,
> + MTK_JPEG_FMT_TYPE_OUTPUT);
> +
> + align_w = q->w;
> + align_h = q->h;
> + align_w = round_up(align_w, 2);
> + align_w = align_w << 1;
> + v4l_bound_align_image(&align_w,
> + MTK_JPEG_MIN_WIDTH,
> + MTK_JPEG_MAX_WIDTH, 5,
> + &align_h,
> + MTK_JPEG_MIN_HEIGHT,
> + MTK_JPEG_MAX_HEIGHT, 3, 0);
> +
> + if (align_w < MTK_JPEG_MIN_WIDTH &&
> + (align_w + 32) <= MTK_JPEG_MAX_WIDTH)
> + align_w += 32;
> + if (align_h < MTK_JPEG_MIN_HEIGHT &&
> + (align_h + 8) <= MTK_JPEG_MAX_HEIGHT)
> + align_h += 8;
> +
> + q->sizeimage[0] = align_w * align_h;
> + q->bytesperline[0] = align_w;
> + } else {
> + q->fmt = mtk_jpeg_find_format(ctx, V4L2_PIX_FMT_JPEG,
> MTK_JPEG_FMT_TYPE_OUTPUT);
> - q->w = MTK_JPEG_MIN_WIDTH;
> - q->h = MTK_JPEG_MIN_HEIGHT;
> - q->bytesperline[0] = 0;
> - q->sizeimage[0] = MTK_JPEG_DEFAULT_SIZEIMAGE;
> + q->w = MTK_JPEG_MIN_WIDTH;
> + q->h = MTK_JPEG_MIN_HEIGHT;
> + q->bytesperline[0] = 0;
> + q->sizeimage[0] = MTK_JPEG_DEFAULT_SIZEIMAGE;
> + }
>
> q = &ctx->cap_q;
> - q->fmt = mtk_jpeg_find_format(ctx, V4L2_PIX_FMT_YUV420M,
> + if (ctx->jpeg->mode == MTK_JPEG_ENC) {
> + q->w = MTK_JPEG_MIN_WIDTH;
> + q->h = MTK_JPEG_MIN_HEIGHT;
> + q->fmt = mtk_jpeg_find_format(ctx, V4L2_PIX_FMT_JPEG,
> + MTK_JPEG_FMT_TYPE_CAPTURE);
> + q->bytesperline[0] = 0;
> + q->sizeimage[0] = MTK_JPEG_DEFAULT_SIZEIMAGE;
> + } else {
> + q->fmt = mtk_jpeg_find_format(ctx, V4L2_PIX_FMT_YUV420M,
> MTK_JPEG_FMT_TYPE_CAPTURE);
> - q->w = MTK_JPEG_MIN_WIDTH;
> - q->h = MTK_JPEG_MIN_HEIGHT;
> + q->w = MTK_JPEG_MIN_WIDTH;
> + q->h = MTK_JPEG_MIN_HEIGHT;
>
> - for (i = 0; i < q->fmt->colplanes; i++) {
> - u32 stride = q->w * q->fmt->h_sample[i] / 4;
> - u32 h = q->h * q->fmt->v_sample[i] / 4;
> + for (i = 0; i < q->fmt->colplanes; i++) {
> + u32 stride = q->w * q->fmt->h_sample[i] / 4;
> + u32 h = q->h * q->fmt->v_sample[i] / 4;
>
> - q->bytesperline[i] = stride;
> - q->sizeimage[i] = stride * h;
> + q->bytesperline[i] = stride;
> + q->sizeimage[i] = stride * h;
> + }
> }
> }
>
> @@ -1021,6 +1430,13 @@ static int mtk_jpeg_open(struct file *file)
> goto error;
> }
>
> + ret = mtk_jpeg_ctrls_setup(ctx);
> + if (ret) {
> + v4l2_err(&jpeg->v4l2_dev, "Failed to setup controls() (%d)\n",
> + ret);
> + goto error;
> + }
> +
> mtk_jpeg_set_default_params(ctx);
> mutex_unlock(&jpeg->lock);
> return 0;
> @@ -1041,6 +1457,7 @@ static int mtk_jpeg_release(struct file *file)
>
> mutex_lock(&jpeg->lock);
> v4l2_m2m_ctx_release(ctx->fh.m2m_ctx);
> + v4l2_ctrl_handler_free(&ctx->ctrl_hdl);
> v4l2_fh_del(&ctx->fh);
> v4l2_fh_exit(&ctx->fh);
> kfree(ctx);
> @@ -1065,6 +1482,7 @@ static int mtk_jpeg_clk_init(struct mtk_jpeg_dev *jpeg)
> node = of_parse_phandle(jpeg->dev->of_node, "mediatek,larb", 0);
> if (!node)
> return -EINVAL;
> +
> pdev = of_find_device_by_node(node);
> if (WARN_ON(!pdev)) {
> of_node_put(node);
> @@ -1074,19 +1492,24 @@ static int mtk_jpeg_clk_init(struct mtk_jpeg_dev *jpeg)
>
> jpeg->larb = &pdev->dev;
>
> - jpeg->clk_jdec = devm_clk_get(jpeg->dev, "jpgdec");
> - if (IS_ERR(jpeg->clk_jdec))
> - return PTR_ERR(jpeg->clk_jdec);
> + if (jpeg->mode == MTK_JPEG_ENC) {
> + jpeg->clk_jpeg = devm_clk_get(jpeg->dev, "jpgenc");
> + return PTR_ERR_OR_ZERO(jpeg->clk_jpeg);
> + }
>
> - jpeg->clk_jdec_smi = devm_clk_get(jpeg->dev, "jpgdec-smi");
> - return PTR_ERR_OR_ZERO(jpeg->clk_jdec_smi);
> + jpeg->clk_jpeg = devm_clk_get(jpeg->dev, "jpgdec");
> + if (IS_ERR(jpeg->clk_jpeg))
> + return PTR_ERR(jpeg->clk_jpeg);
> +
> + jpeg->clk_jpeg_smi = devm_clk_get(jpeg->dev, "jpgdec-smi");
> + return PTR_ERR_OR_ZERO(jpeg->clk_jpeg_smi);
> }
>
> static int mtk_jpeg_probe(struct platform_device *pdev)
> {
> struct mtk_jpeg_dev *jpeg;
> struct resource *res;
> - int dec_irq;
> + int jpeg_irq;
> int ret;
>
> jpeg = devm_kzalloc(&pdev->dev, sizeof(*jpeg), GFP_KERNEL);
> @@ -1096,28 +1519,26 @@ static int mtk_jpeg_probe(struct platform_device *pdev)
> mutex_init(&jpeg->lock);
> spin_lock_init(&jpeg->hw_lock);
> jpeg->dev = &pdev->dev;
> + jpeg->mode = (enum mtk_jpeg_mode)of_device_get_match_data(jpeg->dev);
>
> res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> - jpeg->dec_reg_base = devm_ioremap_resource(&pdev->dev, res);
> - if (IS_ERR(jpeg->dec_reg_base)) {
> - ret = PTR_ERR(jpeg->dec_reg_base);
> + jpeg->reg_base = devm_ioremap_resource(&pdev->dev, res);
> + if (IS_ERR(jpeg->reg_base)) {
> + ret = PTR_ERR(jpeg->reg_base);
> return ret;
> }
>
> - res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
> - dec_irq = platform_get_irq(pdev, 0);
> - if (!res || dec_irq < 0) {
> - dev_err(&pdev->dev, "Failed to get dec_irq %d.\n", dec_irq);
> - ret = -EINVAL;
> - return ret;
> + jpeg_irq = platform_get_irq(pdev, 0);
> + if (jpeg_irq < 0) {
> + dev_err(&pdev->dev, "Failed to get jpeg_irq %d.\n", jpeg_irq);
> + return jpeg_irq;
> }
>
> - ret = devm_request_irq(&pdev->dev, dec_irq, mtk_jpeg_dec_irq, 0,
> + ret = devm_request_irq(&pdev->dev, jpeg_irq, mtk_jpeg_irq, 0,
> pdev->name, jpeg);
> if (ret) {
> - dev_err(&pdev->dev, "Failed to request dec_irq %d (%d)\n",
> - dec_irq, ret);
> - ret = -EINVAL;
> + dev_err(&pdev->dev, "Failed to request jpeg_irq %d (%d)\n",
> + jpeg_irq, ret);
> goto err_req_irq;
> }
>
> @@ -1141,33 +1562,35 @@ static int mtk_jpeg_probe(struct platform_device *pdev)
> goto err_m2m_init;
> }
>
> - jpeg->dec_vdev = video_device_alloc();
> - if (!jpeg->dec_vdev) {
> + jpeg->vfd_jpeg = video_device_alloc();
> + if (!jpeg->vfd_jpeg) {
> ret = -ENOMEM;
> - goto err_dec_vdev_alloc;
> + goto err_vfd_jpeg_alloc;
> }
> - snprintf(jpeg->dec_vdev->name, sizeof(jpeg->dec_vdev->name),
> - "%s-dec", MTK_JPEG_NAME);
> - jpeg->dec_vdev->fops = &mtk_jpeg_fops;
> - jpeg->dec_vdev->ioctl_ops = &mtk_jpeg_ioctl_ops;
> - jpeg->dec_vdev->minor = -1;
> - jpeg->dec_vdev->release = video_device_release;
> - jpeg->dec_vdev->lock = &jpeg->lock;
> - jpeg->dec_vdev->v4l2_dev = &jpeg->v4l2_dev;
> - jpeg->dec_vdev->vfl_dir = VFL_DIR_M2M;
> - jpeg->dec_vdev->device_caps = V4L2_CAP_STREAMING |
> + snprintf(jpeg->vfd_jpeg->name, sizeof(jpeg->vfd_jpeg->name),
> + "%s-%s", MTK_JPEG_NAME,
> + jpeg->mode == MTK_JPEG_ENC ? "enc" : "dec");
> + jpeg->vfd_jpeg->fops = &mtk_jpeg_fops;
> + jpeg->vfd_jpeg->ioctl_ops = &mtk_jpeg_ioctl_ops;
> + jpeg->vfd_jpeg->minor = -1;
> + jpeg->vfd_jpeg->release = video_device_release;
> + jpeg->vfd_jpeg->lock = &jpeg->lock;
> + jpeg->vfd_jpeg->v4l2_dev = &jpeg->v4l2_dev;
> + jpeg->vfd_jpeg->vfl_dir = VFL_DIR_M2M;
> + jpeg->vfd_jpeg->device_caps = V4L2_CAP_STREAMING |
> V4L2_CAP_VIDEO_M2M_MPLANE;
>
> - ret = video_register_device(jpeg->dec_vdev, VFL_TYPE_GRABBER, 3);
> + ret = video_register_device(jpeg->vfd_jpeg, VFL_TYPE_GRABBER, -1);
> if (ret) {
> v4l2_err(&jpeg->v4l2_dev, "Failed to register video device\n");
> - goto err_dec_vdev_register;
> + goto err_vfd_jpeg_register;
> }
>
> - video_set_drvdata(jpeg->dec_vdev, jpeg);
> + video_set_drvdata(jpeg->vfd_jpeg, jpeg);
> v4l2_info(&jpeg->v4l2_dev,
> - "decoder device registered as /dev/video%d (%d,%d)\n",
> - jpeg->dec_vdev->num, VIDEO_MAJOR, jpeg->dec_vdev->minor);
> + "jpeg device %d registered as /dev/video%d (%d,%d)\n",
> + jpeg->mode, jpeg->vfd_jpeg->num, VIDEO_MAJOR,
> + jpeg->vfd_jpeg->minor);
>
> platform_set_drvdata(pdev, jpeg);
>
> @@ -1175,10 +1598,10 @@ static int mtk_jpeg_probe(struct platform_device *pdev)
>
> return 0;
>
> -err_dec_vdev_register:
> - video_device_release(jpeg->dec_vdev);
> +err_vfd_jpeg_register:
> + video_device_release(jpeg->vfd_jpeg);
>
> -err_dec_vdev_alloc:
> +err_vfd_jpeg_alloc:
> v4l2_m2m_release(jpeg->m2m_dev);
>
> err_m2m_init:
> @@ -1198,8 +1621,8 @@ static int mtk_jpeg_remove(struct platform_device *pdev)
> struct mtk_jpeg_dev *jpeg = platform_get_drvdata(pdev);
>
> pm_runtime_disable(&pdev->dev);
> - video_unregister_device(jpeg->dec_vdev);
> - video_device_release(jpeg->dec_vdev);
> + video_unregister_device(jpeg->vfd_jpeg);
> + video_device_release(jpeg->vfd_jpeg);
> v4l2_m2m_release(jpeg->m2m_dev);
> v4l2_device_unregister(&jpeg->v4l2_dev);
>
> @@ -1210,7 +1633,11 @@ static __maybe_unused int mtk_jpeg_pm_suspend(struct device *dev)
> {
> struct mtk_jpeg_dev *jpeg = dev_get_drvdata(dev);
>
> - mtk_jpeg_dec_reset(jpeg->dec_reg_base);
> + if (jpeg->mode == MTK_JPEG_ENC)
> + mtk_jpeg_enc_reset(jpeg->reg_base);
> + else
> + mtk_jpeg_dec_reset(jpeg->reg_base);
> +
> mtk_jpeg_clk_off(jpeg);
>
> return 0;
> @@ -1221,7 +1648,10 @@ static __maybe_unused int mtk_jpeg_pm_resume(struct device *dev)
> struct mtk_jpeg_dev *jpeg = dev_get_drvdata(dev);
>
> mtk_jpeg_clk_on(jpeg);
> - mtk_jpeg_dec_reset(jpeg->dec_reg_base);
> + if (jpeg->mode == MTK_JPEG_ENC)
> + mtk_jpeg_enc_reset(jpeg->reg_base);
> + else
> + mtk_jpeg_dec_reset(jpeg->reg_base);
>
> return 0;
> }
> @@ -1257,11 +1687,15 @@ static const struct dev_pm_ops mtk_jpeg_pm_ops = {
> static const struct of_device_id mtk_jpeg_match[] = {
> {
> .compatible = "mediatek,mt8173-jpgdec",
> - .data = NULL,
> + .data = (void *)MTK_JPEG_DEC,
> },
> {
> .compatible = "mediatek,mt2701-jpgdec",
> - .data = NULL,
> + .data = (void *)MTK_JPEG_DEC,
> + },
> + {
> + .compatible = "mediatek,mtk-jpgenc",
> + .data = (void *)MTK_JPEG_ENC,
> },
> {},
> };
> diff --git a/drivers/media/platform/mtk-jpeg/mtk_jpeg_core.h b/drivers/media/platform/mtk-jpeg/mtk_jpeg_core.h
> index 1a6cdfd4ea70..65ef920651a5 100644
> --- a/drivers/media/platform/mtk-jpeg/mtk_jpeg_core.h
> +++ b/drivers/media/platform/mtk-jpeg/mtk_jpeg_core.h
> @@ -2,6 +2,7 @@
> * Copyright (c) 2016 MediaTek Inc.
> * Author: Ming Hsiu Tsai <minghsiu.tsai@mediatek.com>
> * Rick Chang <rick.chang@mediatek.com>
> + * Xia Jiang <xia.jiang@mediatek.com>
> *
> * This program is free software; you can redistribute it and/or modify
> * it under the terms of the GNU General Public License version 2 as
> @@ -25,6 +26,8 @@
>
> #define MTK_JPEG_FMT_FLAG_DEC_OUTPUT BIT(0)
> #define MTK_JPEG_FMT_FLAG_DEC_CAPTURE BIT(1)
> +#define MTK_JPEG_FMT_FLAG_ENC_OUTPUT BIT(2)
> +#define MTK_JPEG_FMT_FLAG_ENC_CAPTURE BIT(3)
>
> #define MTK_JPEG_FMT_TYPE_OUTPUT 1
> #define MTK_JPEG_FMT_TYPE_CAPTURE 2
> @@ -36,12 +39,63 @@
>
> #define MTK_JPEG_DEFAULT_SIZEIMAGE (1 * 1024 * 1024)
>
> +#define MTK_JPEG_ENCODE 0
> +#define MTK_JPEG_DECODE 1
> +
> +/**
> + * enum mtk_jpeg_ctx_state - contex state of jpeg
> + */
> enum mtk_jpeg_ctx_state {
> MTK_JPEG_INIT = 0,
> MTK_JPEG_RUNNING,
> MTK_JPEG_SOURCE_CHANGE,
> };
>
> +/**
> + * enum mtk_jpeg_mode - mode of jpeg
> + */
> +enum mtk_jpeg_mode {
> + MTK_JPEG_ENC,
> + MTK_JPEG_DEC,
> +};
> +
> +/**
> + * enum jpeg_enc_yuv_fmt - yuv format of jpeg enc
> + */
> +enum jpeg_enc_yuv_fmt {
> + JPEG_YUV_FORMAT_YUYV = 0,
> + JPEG_YUV_FORMAT_YVYU = 1,
> + JPEG_YUV_FORMAT_NV12 = 2,
> + JEPG_YUV_FORMAT_NV21 = 3,
> +};
> +
> +/**
> + * enum JPEG_ENCODE_QUALITY_ENUM - number of jpeg encoder quality
> + */
> +enum JPEG_ENCODE_QUALITY_ENUM {
> + JPEG_ENCODE_QUALITY_Q60 = 0x0,
> + JPEG_ENCODE_QUALITY_Q80 = 0x1,
> + JPEG_ENCODE_QUALITY_Q90 = 0x2,
> + JPEG_ENCODE_QUALITY_Q95 = 0x3,
> +
> + JPEG_ENCODE_QUALITY_Q39 = 0x4,
> + JPEG_ENCODE_QUALITY_Q68 = 0x5,
> + JPEG_ENCODE_QUALITY_Q84 = 0x6,
> + JPEG_ENCODE_QUALITY_Q92 = 0x7,
> +
> + JPEG_ENCODE_QUALITY_Q48 = 0x8,
> + JPEG_ENCODE_QUALITY_Q74 = 0xA,
> + JPEG_ENCODE_QUALITY_Q87 = 0xB,
> +
> + JPEG_ENCODE_QUALITY_Q34 = 0xC,
> + JPEG_ENCODE_QUALITY_Q64 = 0xE,
> + JPEG_ENCODE_QUALITY_Q82 = 0xF,
> +
> + JPEG_ENCODE_QUALITY_Q97 = 0x10,
> +
> + JPEG_ENCODE_QUALITY_ALL = 0xFFFFFFFF
> +};
> +
> /**
> * struct mt_jpeg - JPEG IP abstraction
> * @lock: the mutex protecting this structure
> @@ -51,11 +105,12 @@ enum mtk_jpeg_ctx_state {
> * @v4l2_dev: v4l2 device for mem2mem mode
> * @m2m_dev: v4l2 mem2mem device data
> * @alloc_ctx: videobuf2 memory allocator's context
> - * @dec_vdev: video device node for decoder mem2mem mode
> - * @dec_reg_base: JPEG registers mapping
> - * @clk_jdec: JPEG hw working clock
> - * @clk_jdec_smi: JPEG SMI bus clock
> + * @vfd_jpeg: video device node for jpeg mem2mem mode
> + * @reg_base: JPEG registers mapping
> + * @clk_jpeg: JPEG hw working clock
> + * @clk_jpeg_smi: JPEG SMI bus clock
> * @larb: SMI device
> + * @mode: compression (encode) operation or decompression (decode)
> */
> struct mtk_jpeg_dev {
> struct mutex lock;
> @@ -65,11 +120,12 @@ struct mtk_jpeg_dev {
> struct v4l2_device v4l2_dev;
> struct v4l2_m2m_dev *m2m_dev;
> void *alloc_ctx;
> - struct video_device *dec_vdev;
> - void __iomem *dec_reg_base;
> - struct clk *clk_jdec;
> - struct clk *clk_jdec_smi;
> + struct video_device *vfd_jpeg;
> + void __iomem *reg_base;
> + struct clk *clk_jpeg;
> + struct clk *clk_jpeg_smi;
> struct device *larb;
> + enum mtk_jpeg_mode mode;
> };
>
> /**
> @@ -109,15 +165,51 @@ struct mtk_jpeg_q_data {
> u32 sizeimage[VIDEO_MAX_PLANES];
> };
>
> +/**
> + * jpeg_enc_param - parameters of jpeg encode control
> + * @enable_exif: EXIF enable for jpeg encode mode
> + * @enc_quality: destination image quality in encode mode
> + * @restart_interval: JPEG restart interval for JPEG encoding
> + */
> +struct jpeg_enc_param {
> + u32 enable_exif;
> + u32 enc_quality;
> + u32 restart_interval;
> +};
> +
> +/**
> + * mtk_jpeg_enc_param: General jpeg encoding parameters
> + * @enc_w: image width
> + * @enc_h: image height
> + * @enable_exif: EXIF enable for jpeg encode mode
> + * @enc_quality: destination image quality in encode mode
> + * @enc_format: input image format
> + * @restart_interval: JPEG restart interval for JPEG encoding
> + * @img_stride: jpeg encoder image stride
> + * @mem_stride: jpeg encoder memory stride
> + * @total_encdu: total 8x8 block number
> + */
> +struct mtk_jpeg_enc_param {
> + u32 enc_w;
> + u32 enc_h;
> + u32 enable_exif;
> + u32 enc_quality;
> + u32 enc_format;
> + u32 restart_interval;
> + u32 img_stride;
> + u32 mem_stride;
> + u32 total_encdu;
> +};
> +
> /**
> * mtk_jpeg_ctx - the device context data
> * @jpeg: JPEG IP device for this context
> * @out_q: source (output) queue information
> * @cap_q: destination (capture) queue queue information
> * @fh: V4L2 file handle
> - * @dec_param parameters for HW decoding
> * @state: state of the context
> - * @header_valid: set if header has been parsed and valid
> + * @jpeg_param: jpeg encode parameters
> + * @ctrl_hdl: controls handler
> * @colorspace: enum v4l2_colorspace; supplemental to pixelformat
> * @ycbcr_enc: enum v4l2_ycbcr_encoding, Y'CbCr encoding
> * @quantization: enum v4l2_quantization, colorspace quantization
> @@ -129,6 +221,8 @@ struct mtk_jpeg_ctx {
> struct mtk_jpeg_q_data cap_q;
> struct v4l2_fh fh;
> enum mtk_jpeg_ctx_state state;
> + struct jpeg_enc_param jpeg_param;
> + struct v4l2_ctrl_handler ctrl_hdl;
>
> enum v4l2_colorspace colorspace;
> enum v4l2_ycbcr_encoding ycbcr_enc;
> diff --git a/drivers/media/platform/mtk-jpeg/mtk_jpeg_dec_hw.h b/drivers/media/platform/mtk-jpeg/mtk_jpeg_dec_hw.h
> index bff6a4aab57a..725ce94fd58f 100644
> --- a/drivers/media/platform/mtk-jpeg/mtk_jpeg_dec_hw.h
> +++ b/drivers/media/platform/mtk-jpeg/mtk_jpeg_dec_hw.h
> @@ -2,6 +2,7 @@
> * Copyright (c) 2016 MediaTek Inc.
> * Author: Ming Hsiu Tsai <minghsiu.tsai@mediatek.com>
> * Rick Chang <rick.chang@mediatek.com>
> + * Xia Jiang <xia.jiang@mediatek.com>
> *
> * This program is free software; you can redistribute it and/or modify
> * it under the terms of the GNU General Public License version 2 as
> @@ -13,8 +14,8 @@
> * GNU General Public License for more details.
> */
>
> -#ifndef _MTK_JPEG_HW_H
> -#define _MTK_JPEG_HW_H
> +#ifndef _MTK_JPEG_DEC_HW_H
> +#define _MTK_JPEG_DEC_HW_H
>
> #include <media/videobuf2-core.h>
>
> @@ -88,4 +89,4 @@ void mtk_jpeg_dec_set_config(void __iomem *base,
> void mtk_jpeg_dec_reset(void __iomem *dec_reg_base);
> void mtk_jpeg_dec_start(void __iomem *dec_reg_base);
>
> -#endif /* _MTK_JPEG_HW_H */
> +#endif /* _MTK_JPEG_DEC_HW_H */
> diff --git a/drivers/media/platform/mtk-jpeg/mtk_jpeg_enc_hw.c b/drivers/media/platform/mtk-jpeg/mtk_jpeg_enc_hw.c
> new file mode 100644
> index 000000000000..b82d39f1022b
> --- /dev/null
> +++ b/drivers/media/platform/mtk-jpeg/mtk_jpeg_enc_hw.c
> @@ -0,0 +1,175 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright (c) 2019 MediaTek Inc.
> + * Author: Xia Jiang <xia.jiang@mediatek.com>
> + *
> + */
> +
> +#include <linux/io.h>
> +#include <linux/kernel.h>
> +#include <media/videobuf2-core.h>
> +
> +#include "mtk_jpeg_enc_hw.h"
> +
> +void mtk_jpeg_enc_reset(void __iomem *base)
> +{
> + writel(0x00, base + JPGENC_RSTB);
> + writel(JPEG_ENC_RESET_BIT, base + JPGENC_RSTB);
> + writel(0x00, base + JPGENC_CODEC_SEL);
> +}
> +
> +u32 mtk_jpeg_enc_get_int_status(void __iomem *base)
> +{
> + u32 ret;
> +
> + ret = readl(base + JPGENC_INT_STS) &
> + JPEG_DRV_ENC_INT_STATUS_MASK_ALLIRQ;
> + if (ret)
> + writel(0, base + JPGENC_INT_STS);
> +
> + return ret;
> +}
> +
> +u32 mtk_jpeg_enc_get_file_size(void __iomem *base)
> +{
> + return readl(base + JPGENC_DMA_ADDR0) - readl(base + JPGENC_DST_ADDR0);
> +}
> +
> +u32 mtk_jpeg_enc_enum_result(void __iomem *base, u32 irq_status, u32 *file_size)
> +{
> + *file_size = mtk_jpeg_enc_get_file_size(base);
> + if (irq_status & JPEG_DRV_ENC_INT_STATUS_DONE)
> + return MTK_JPEG_ENC_RESULT_DONE;
> + else if (irq_status & JPEG_DRV_ENC_INT_STATUS_STALL)
> + return MTK_JPEG_ENC_RESULT_STALL;
> + else if (irq_status & JPEG_DRV_ENC_INT_STATUS_VCODEC_IRQ)
> + return MTK_JPEG_ENC_RESULT_VCODEC_IRQ;
> + return MTK_JPEG_ENC_RESULT_ERROR_UNKNOWN;
> +}
> +
> +static void mtk_jpeg_enc_set_blk_num(void __iomem *base, u32 blk_num)
> +{
> + writel(blk_num, base + JPGENC_BLK_NUM);
> +}
> +
> +static void mtk_jpeg_enc_set_encFormat(void __iomem *base, u32 enc_format)
> +{
> + u32 value;
> +
> + value = readl(base + JPGENC_CTRL);
> + value &= ~JPEG_ENC_CTRL_YUV_BIT;
> + value |= JPGENC_FORMAT(enc_format);
> + writel(value, base + JPGENC_CTRL);
> +}
> +
> +static void mtk_jpeg_enc_set_img_size(void __iomem *base, u32 width, u32 height)
> +{
> + u32 value;
> +
> + value = JPGENC_WIDTH_HEIGHT(width, height);
> + writel(value, base + JPGENC_IMG_SIZE);
> +}
> +
> +static void mtk_jpeg_enc_set_src_img(void __iomem *base, u32 width,
> + u32 height, u32 yuv_format,
> + u32 total_encdu)
> +{
> + mtk_jpeg_enc_set_img_size(base, width, height);
> + mtk_jpeg_enc_set_encFormat(base, yuv_format);
> + mtk_jpeg_enc_set_blk_num(base, total_encdu);
> +}
> +
> +static void mtk_jpeg_enc_set_src_buf(void __iomem *base, u32 img_stride,
> + u32 mem_stride, u32 src_addr,
> + u32 src_addr_c)
> +{
> + writel(img_stride, base + JPGENC_IMG_STRIDE);
> + writel(mem_stride, base + JPGENC_STRIDE);
> + writel(src_addr, base + JPGENC_SRC_LUMA_ADDR);
> + writel(src_addr_c, base + JPGENC_SRC_CHROMA_ADDR);
> +}
> +
> +static void mtk_jpeg_enc_set_dst_buf(void __iomem *base, u32 dst_addr,
> + u32 stall_size, u32 init_offset,
> + u32 offset_mask)
> +{
> + writel(JPGENC_INIT_OFFSET(init_offset), base + JPGENC_OFFSET_ADDR);
> + writel(JPGENC_OFFSET_MASK(offset_mask), base + JPGENC_BYTE_OFFSET_MASK);
> + writel(JPGENC_DST_ADDR(dst_addr), base + JPGENC_DST_ADDR0);
> + writel(JPGENC_STALL_ADDR(dst_addr, stall_size),
> + base + JPGENC_STALL_ADDR0);
> +}
> +
> +static void mtk_jpeg_enc_set_quality(void __iomem *base, u32 quality)
> +{
> + u32 value;
> +
> + value = readl(base + JPGENC_QUALITY);
> + value = JPGENC_SET_QUALITY(value, quality);
> + writel(value, base + JPGENC_QUALITY);
> +}
> +
> +static void mtk_jpeg_enc_set_restart_interval(void __iomem *base,
> + u32 restart_interval)
> +{
> + u32 value;
> +
> + value = readl(base + JPGENC_CTRL);
> + if (restart_interval)
> + value |= JPEG_ENC_CTRL_RESTART_EN_BIT;
> + else
> + value &= ~JPEG_ENC_CTRL_RESTART_EN_BIT;
> + writel(value, base + JPGENC_CTRL);
> + writel(restart_interval, base + JPGENC_RST_MCU_NUM);
> +}
> +
> +static void mtk_jpeg_enc_set_encode_mode(void __iomem *base, u32 exif_en)
> +{
> + u32 value;
> +
> + value = readl(base + JPGENC_CTRL);
> + value &= ~JPEG_ENC_CTRL_FILE_FORMAT_BIT;
> + writel(value, base + JPGENC_CTRL);
> +
> + if (exif_en) {
> + value = readl(base + JPGENC_CTRL);
> + value |= JPEG_ENC_EN_JFIF_EXIF;
> + writel(value, base + JPGENC_CTRL);
> + }
> +}
> +
> +static void mtk_jpeg_enc_set_ctrl_cfg(void __iomem *base, u32 exif_en,
> + u32 quality, u32 restart_interval)
> +{
> + mtk_jpeg_enc_set_quality(base, quality);
> +
> + mtk_jpeg_enc_set_restart_interval(base, restart_interval);
> +
> + mtk_jpeg_enc_set_encode_mode(base, exif_en);
> +}
> +
> +void mtk_jpeg_enc_start(void __iomem *base)
> +{
> + u32 value;
> +
> + value = readl(base + JPGENC_CTRL);
> + value |= JPEG_ENC_CTRL_INT_EN_BIT | JPEG_ENC_CTRL_ENABLE_BIT;
> + writel(value, base + JPGENC_CTRL);
> +}
> +
> +void mtk_jpeg_enc_set_config(void __iomem *base,
> + struct mtk_jpeg_enc_param *config,
> + struct mtk_jpeg_enc_bs *bs,
> + struct mtk_jpeg_enc_fb *fb)
> +{
> + mtk_jpeg_enc_set_src_img(base, config->enc_w, config->enc_h,
> + config->enc_format, config->total_encdu);
> + mtk_jpeg_enc_set_src_buf(base, config->img_stride, config->mem_stride,
> + fb->fb_addr[0].dma_addr,
> + fb->fb_addr[1].dma_addr);
> + mtk_jpeg_enc_set_dst_buf(base, bs->dma_addr, bs->size,
> + bs->dma_addr_offset, bs->dma_addr_offsetmask);
> + mtk_jpeg_enc_set_ctrl_cfg(base, config->enable_exif,
> + config->enc_quality,
> + config->restart_interval);
> +}
> diff --git a/drivers/media/platform/mtk-jpeg/mtk_jpeg_enc_hw.h b/drivers/media/platform/mtk-jpeg/mtk_jpeg_enc_hw.h
> new file mode 100644
> index 000000000000..ef3e6d97cdcd
> --- /dev/null
> +++ b/drivers/media/platform/mtk-jpeg/mtk_jpeg_enc_hw.h
> @@ -0,0 +1,60 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +/*
> + * Copyright (c) 2019 MediaTek Inc.
> + * Author: Xia Jiang <xia.jiang@mediatek.com>
> + *
> + */
> +
> +#ifndef _MTK_JPEG_ENC_HW_H
> +#define _MTK_JPEG_ENC_HW_H
> +
> +#include <media/videobuf2-core.h>
> +
> +#include "mtk_jpeg_core.h"
> +#include "mtk_jpeg_enc_reg.h"
> +
> +#define JPEG_ENC_DST_ADDR_OFFSET_MASK GENMASK(3, 0)
> +
> +#define JPEG_ENC_CTRL_YUV_BIT 0x18
> +#define JPEG_ENC_CTRL_RESTART_EN_BIT BIT(10)
> +#define JPEG_ENC_CTRL_FILE_FORMAT_BIT BIT(5)
> +#define JPEG_ENC_EN_JFIF_EXIF BIT(5)
> +#define JPEG_ENC_CTRL_INT_EN_BIT BIT(2)
> +#define JPEG_ENC_CTRL_ENABLE_BIT BIT(0)
> +#define JPEG_ENC_RESET_BIT BIT(0)
> +
> +enum {
> + MTK_JPEG_ENC_RESULT_DONE = 0,
> + MTK_JPEG_ENC_RESULT_STALL,
> + MTK_JPEG_ENC_RESULT_VCODEC_IRQ,
> + MTK_JPEG_ENC_RESULT_ERROR_UNKNOWN
> +};
> +
> +struct mtk_jpeg_enc_bs {
> + dma_addr_t dma_addr;
> + size_t size;
> + u32 dma_addr_offset;
> + u32 dma_addr_offsetmask;
> +};
> +
> +struct mtk_jpeg_mem {
> + dma_addr_t dma_addr;
> + size_t size;
> +};
> +
> +struct mtk_jpeg_enc_fb {
> + struct mtk_jpeg_mem fb_addr[MTK_JPEG_COMP_MAX];
> + u32 num_planes;
> +};
> +
> +void mtk_jpeg_enc_reset(void __iomem *base);
> +u32 mtk_jpeg_enc_get_int_status(void __iomem *base);
> +u32 mtk_jpeg_enc_get_file_size(void __iomem *base);
> +u32 mtk_jpeg_enc_enum_result(void __iomem *base, u32 irq_status,
> + u32 *file_size);
> +void mtk_jpeg_enc_start(void __iomem *enc_reg_base);
> +void mtk_jpeg_enc_set_config(void __iomem *base,
> + struct mtk_jpeg_enc_param *config,
> + struct mtk_jpeg_enc_bs *bs,
> + struct mtk_jpeg_enc_fb *fb);
> +#endif /* _MTK_JPEG_ENC_HW_H */
> diff --git a/drivers/media/platform/mtk-jpeg/mtk_jpeg_enc_reg.h b/drivers/media/platform/mtk-jpeg/mtk_jpeg_enc_reg.h
> new file mode 100644
> index 000000000000..2e64fcd58bf6
> --- /dev/null
> +++ b/drivers/media/platform/mtk-jpeg/mtk_jpeg_enc_reg.h
> @@ -0,0 +1,49 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +/*
> + * Copyright (c) 2019 MediaTek Inc.
> + * Author: Xia Jiang <xia.jiang@mediatek.com>
> + *
> + */
> +#ifndef _MTK_JPEG_ENC_REG_H
> +#define _MTK_JPEG_ENC_REG_H
> +#define MTK_JPEG_COMP_MAX 3
> +
> +#define JPEG_DRV_ENC_INT_STATUS_DONE BIT(0)
> +#define JPEG_DRV_ENC_INT_STATUS_STALL BIT(1)
> +#define JPEG_DRV_ENC_INT_STATUS_VCODEC_IRQ BIT(4)
> +#define JPEG_DRV_ENC_INT_STATUS_MASK_ALLIRQ 0x13
> +
> +#define JPGENC_RSTB 0x100
> +#define JPGENC_CTRL 0x104
> +#define JPGENC_QUALITY 0x108
> +#define JPGENC_BLK_NUM 0x10C
> +#define JPGENC_BLK_CNT 0x110
> +#define JPGENC_INT_STS 0x11C
> +#define JPGENC_DST_ADDR0 0x120
> +#define JPGENC_DMA_ADDR0 0x124
> +#define JPGENC_STALL_ADDR0 0x128
> +#define JPGENC_OFFSET_ADDR 0x138
> +#define JPGENC_RST_MCU_NUM 0x150
> +#define JPGENC_IMG_SIZE 0x154
> +#define JPGENC_DEBUG_INFO0 0x160
> +#define JPGENC_DEBUG_INFO1 0x164
> +#define JPGENC_TOTAL_CYCLE 0x168
> +#define JPGENC_BYTE_OFFSET_MASK 0x16C
> +#define JPGENC_SRC_LUMA_ADDR 0x170
> +#define JPGENC_SRC_CHROMA_ADDR 0x174
> +#define JPGENC_STRIDE 0x178
> +#define JPGENC_IMG_STRIDE 0x17C
> +#define JPGENC_DCM_CTRL 0x300
> +#define JPGENC_CODEC_SEL 0x314
> +#define JPGENC_ULTRA_THRES 0x318
> +
> +#define JPGENC_FORMAT(x) (((x) & 3) << 3)
> +#define JPGENC_WIDTH_HEIGHT(w, h) (((w) << 16) | (h))
> +#define JPGENC_INIT_OFFSET(x) ((x) & (~0xF))
> +#define JPGENC_OFFSET_MASK(x) ((x) & 0xF)
> +#define JPGENC_DST_ADDR(x) ((x) & (~0xF))
> +#define JPGENC_STALL_ADDR(x, y) (((x) + (y)) & (~0xF))
> +#define JPGENC_QUALITY_MASK 0xFFFF0000
> +#define JPGENC_SET_QUALITY(x, y) (((x) & JPGENC_QUALITY_MASK) | (y))
> +
> +#endif /* _MTK_JPEG_ENC_REG_H */
> diff --git a/drivers/media/v4l2-core/v4l2-ctrls.c b/drivers/media/v4l2-core/v4l2-ctrls.c
> index 89a1fe564675..02826c0dceb9 100644
> --- a/drivers/media/v4l2-core/v4l2-ctrls.c
> +++ b/drivers/media/v4l2-core/v4l2-ctrls.c
> @@ -1010,6 +1010,7 @@ const char *v4l2_ctrl_get_name(u32 id)
> case V4L2_CID_JPEG_CHROMA_SUBSAMPLING: return "Chroma Subsampling";
> case V4L2_CID_JPEG_RESTART_INTERVAL: return "Restart Interval";
> case V4L2_CID_JPEG_COMPRESSION_QUALITY: return "Compression Quality";
> + case V4L2_CID_JPEG_ENABLE_EXIF: return "Enable Exif";
> case V4L2_CID_JPEG_ACTIVE_MARKER: return "Active Markers";
>
> /* Image source controls */
> diff --git a/include/uapi/linux/v4l2-controls.h b/include/uapi/linux/v4l2-controls.h
> index 37807f23231e..863ea6f93562 100644
> --- a/include/uapi/linux/v4l2-controls.h
> +++ b/include/uapi/linux/v4l2-controls.h
> @@ -998,6 +998,8 @@ enum v4l2_jpeg_chroma_subsampling {
> #define V4L2_JPEG_ACTIVE_MARKER_COM (1 << 16)
> #define V4L2_JPEG_ACTIVE_MARKER_DQT (1 << 17)
> #define V4L2_JPEG_ACTIVE_MARKER_DHT (1 << 18)
> +#define V4L2_CID_JPEG_ENABLE_EXIF (V4L2_CID_JPEG_CLASS_BASE + 5)
> +
Adding V4L2_CID_JPEG_ENABLE_EXIF should be done in a separate patch, and you
need to add documentation for this control as well!
Regards,
Hans
>
>
> /* Image source controls */
>
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^ permalink raw reply
* Re: [PATCH v4] firmware: imx: Add DSP IPC protocol interface
From: Shawn Guo @ 2019-08-12 13:19 UTC (permalink / raw)
To: Daniel Baluta
Cc: aisheng.dong, anson.huang, gregkh, s.hauer, linux-kernel,
o.rempel, linux-imx, kernel, tglx, festevam, linux-arm-kernel
In-Reply-To: <20190801095636.22944-1-daniel.baluta@nxp.com>
On Thu, Aug 01, 2019 at 12:56:36PM +0300, Daniel Baluta wrote:
> Some of i.MX8 processors (e.g i.MX8QM, i.MX8QXP) contain
> the Tensilica HiFi4 DSP for advanced pre- and post-audio
> processing.
>
> The communication between Host CPU and DSP firmware is
> taking place using a shared memory area for message passing
> and a dedicated Messaging Unit for notifications.
>
> DSP IPC protocol offers a doorbell interface using
> imx-mailbox API.
>
> We use 4 MU channels (2 x TXDB, 2 x RXDB) to implement a
> request-reply protocol.
>
> Connection 0 (txdb0, rxdb0):
> - Host writes messasge to shared memory [SHMEM]
> - Host sends a request [MU]
> - DSP handles request [SHMEM]
> - DSP sends reply [MU]
>
> Connection 1 (txdb1, rxdb1):
> - DSP writes a message to shared memory [SHMEM]
> - DSP sends a request [MU]
> - Host handles request [SHMEM]
> - Host sends reply [MU]
>
> The protocol interface will be used by a Host client to
> communicate with the DSP. First client will be the i.MX8
> part from Sound Open Firmware infrastructure.
>
> The protocol offers the following interface:
>
> On Tx:
> - imx_dsp_ring_doorbell, will be called to notify the DSP
> that it needs to handle a request.
>
> On Rx:
> - clients need to provide two callbacks:
> .handle_reply
> .handle_request
> - the callbacks will be used by the protocol on
> notification arrival from DSP.
>
> Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Applied, thanks.
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* Re: [PATCH v5 08/10] power: reset: add driver for mt6323 poweroff
From: Lee Jones @ 2019-08-12 13:23 UTC (permalink / raw)
To: Frank Wunderlich
Cc: Kate Stewart, Mark Rutland, Alexandre Belloni, linux-kernel,
Richard Fontana, Mauro Carvalho Chehab, linux-rtc, Allison Randal,
devicetree, linux-pm, Sean Wang, Tianping . Fang, Rob Herring,
linux-mediatek, Jonathan Cameron, Matthias Brugger,
Thomas Gleixner, Eddie Huang, linux-arm-kernel, Alessandro Zummo,
Josef Friedl, Greg Kroah-Hartman, Sebastian Reichel,
David S. Miller
In-Reply-To: <20190812121511.4169-9-frank-w@public-files.de>
On Mon, 12 Aug 2019, Frank Wunderlich wrote:
> From: Josef Friedl <josef.friedl@speed.at>
>
> add poweroff driver for mt6323 and make Makefile and Kconfig-Entries
>
> Suggested-by: Frank Wunderlich <frank-w@public-files.de>
> Signed-off-by: Josef Friedl <josef.friedl@speed.at>
> Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
> ---
> changes since v4: none
> changes since v3: none
> changes since v2: none (=v2 part 5)
> ---
> drivers/power/reset/Kconfig | 10 +++
> drivers/power/reset/Makefile | 1 +
> drivers/power/reset/mt6323-poweroff.c | 97 +++++++++++++++++++++++++++
> include/linux/mfd/mt6397/core.h | 2 +
This looks like an unrelated change.
Please separate it out.
--
Lee Jones [李琼斯]
Linaro Services Technical Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog
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* Re: [PATCH 1/7] media: cedrus: Disable engine after each slice decoding
From: Ezequiel Garcia @ 2019-08-12 13:28 UTC (permalink / raw)
To: Maxime Ripard, Jernej Skrabec
Cc: devel, gregkh, linux-kernel, paul.kocialkowski, wens, mchehab,
linux-arm-kernel, linux-media
In-Reply-To: <20190603113827.2nmm5wkycf44aqox@flea>
Hi Jernej,
On Mon, 2019-06-03 at 13:38 +0200, Maxime Ripard wrote:
> Hi,
>
> On Thu, May 30, 2019 at 11:15:10PM +0200, Jernej Skrabec wrote:
> > libvdpau-sunxi always disables engine after each decoded slice.
> > Do same in Cedrus driver.
> >
> > Presumably this also lowers power consumption which is always nice.
> >
> > Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
>
> Is it fixing anything though?
>
> I indeed saw that cedar did disable it everytime, but I couldn't find
> a reason why.
>
> Also, the power management improvement would need to be measured, it
> can even create the opposite situation where the device will draw more
> current from being woken up than if it had just remained disabled.
>
While reviewing this, I'm noticing that cedrus_engine_disable can
be marked for static storage (with or without this patch).
Regards,
Eze
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^ permalink raw reply
* Re: [PATCH] watchdog: imx_sc: Remove unnecessary error log
From: Guenter Roeck @ 2019-08-12 13:30 UTC (permalink / raw)
To: Anson.Huang, wim, shawnguo, s.hauer, kernel, festevam,
linux-watchdog, linux-arm-kernel, linux-kernel
Cc: Linux-imx
In-Reply-To: <20190812084434.13316-1-Anson.Huang@nxp.com>
On 8/12/19 1:44 AM, Anson.Huang@nxp.com wrote:
> From: Anson Huang <Anson.Huang@nxp.com>
>
> An error message is already displayed by watchdog_register_device()
> when failed, so no need to have error log again for failure of
> calling devm_watchdog_register_device().
>
> Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
> ---
> drivers/watchdog/imx_sc_wdt.c | 5 +----
> 1 file changed, 1 insertion(+), 4 deletions(-)
>
> diff --git a/drivers/watchdog/imx_sc_wdt.c b/drivers/watchdog/imx_sc_wdt.c
> index 78eaaf7..9260475 100644
> --- a/drivers/watchdog/imx_sc_wdt.c
> +++ b/drivers/watchdog/imx_sc_wdt.c
> @@ -175,11 +175,8 @@ static int imx_sc_wdt_probe(struct platform_device *pdev)
> watchdog_stop_on_unregister(wdog);
>
> ret = devm_watchdog_register_device(dev, wdog);
> -
> - if (ret) {
> - dev_err(dev, "Failed to register watchdog device\n");
> + if (ret)
> return ret;
> - }
>
> ret = imx_scu_irq_group_enable(SC_IRQ_GROUP_WDOG,
> SC_IRQ_WDOG,
>
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^ permalink raw reply
* Re: [PATCH 4/7] media: cedrus: Remove dst_bufs from context
From: Ezequiel Garcia @ 2019-08-12 13:42 UTC (permalink / raw)
To: Jernej Skrabec, paul.kocialkowski, maxime.ripard
Cc: devel, gregkh, linux-kernel, wens, mchehab, linux-arm-kernel,
linux-media
In-Reply-To: <20190530211516.1891-5-jernej.skrabec@siol.net>
On Thu, 2019-05-30 at 23:15 +0200, Jernej Skrabec wrote:
> This array is just duplicated capture buffer queue. Remove it and adjust
> code to look into capture buffer queue instead.
>
> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
> ---
> drivers/staging/media/sunxi/cedrus/cedrus.h | 4 +---
> .../staging/media/sunxi/cedrus/cedrus_h264.c | 4 ++--
> .../staging/media/sunxi/cedrus/cedrus_video.c | 22 -------------------
> 3 files changed, 3 insertions(+), 27 deletions(-)
>
> diff --git a/drivers/staging/media/sunxi/cedrus/cedrus.h b/drivers/staging/media/sunxi/cedrus/cedrus.h
> index 3f476d0fd981..d8e6777e5e27 100644
> --- a/drivers/staging/media/sunxi/cedrus/cedrus.h
> +++ b/drivers/staging/media/sunxi/cedrus/cedrus.h
> @@ -100,8 +100,6 @@ struct cedrus_ctx {
> struct v4l2_ctrl_handler hdl;
> struct v4l2_ctrl **ctrls;
>
> - struct vb2_buffer *dst_bufs[VIDEO_MAX_FRAME];
> -
> union {
> struct {
> void *mv_col_buf;
> @@ -187,7 +185,7 @@ static inline dma_addr_t cedrus_dst_buf_addr(struct cedrus_ctx *ctx,
> if (index < 0)
> return 0;
>
> - buf = ctx->dst_bufs[index];
> + buf = ctx->fh.m2m_ctx->cap_q_ctx.q.bufs[index];
I think you can use v4l2_m2m_get_dst_vq() to access the queue,
and vb2_get_buffer() to access buffers in a vb2 queue.
> return buf ? cedrus_buf_addr(buf, &ctx->dst_fmt, plane) : 0;
> }
>
> diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_h264.c b/drivers/staging/media/sunxi/cedrus/cedrus_h264.c
> index d0ee3f90ff46..b2290f98d81a 100644
> --- a/drivers/staging/media/sunxi/cedrus/cedrus_h264.c
> +++ b/drivers/staging/media/sunxi/cedrus/cedrus_h264.c
> @@ -119,7 +119,7 @@ static void cedrus_write_frame_list(struct cedrus_ctx *ctx,
> if (buf_idx < 0)
> continue;
>
> - cedrus_buf = vb2_to_cedrus_buffer(ctx->dst_bufs[buf_idx]);
> + cedrus_buf = vb2_to_cedrus_buffer(cap_q->bufs[buf_idx]);
Ditto about vb2_get_buffer.
> position = cedrus_buf->codec.h264.position;
> used_dpbs |= BIT(position);
>
> @@ -194,7 +194,7 @@ static void _cedrus_write_ref_list(struct cedrus_ctx *ctx,
> if (buf_idx < 0)
> continue;
>
> - ref_buf = to_vb2_v4l2_buffer(ctx->dst_bufs[buf_idx]);
> + ref_buf = to_vb2_v4l2_buffer(cap_q->bufs[buf_idx]);
Ditto about vb2_get_buffer.
With those changes:
Reviewed-by: Ezequiel Garcia <ezequiel@collabora.com>
Thanks,
Ezequiel
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^ permalink raw reply
* Re: [PATCH] arm64: dts: ls1028a: fix gpio nodes
From: Shawn Guo @ 2019-08-12 13:47 UTC (permalink / raw)
To: Hui Song, Li Yang
Cc: Mark Rutland, devicetree, linux-gpio, Linus Walleij, linux-kernel,
Bartosz Golaszewski, Rob Herring, linux-arm-kernel
In-Reply-To: <20190805065700.7601-1-hui.song_1@nxp.com>
On Mon, Aug 05, 2019 at 02:57:00PM +0800, Hui Song wrote:
> From: Song Hui <hui.song_1@nxp.com>
>
> Update the nodes to include little-endian
> property to be consistent with the hardware.
>
> Signed-off-by: Song Hui <hui.song_1@nxp.com>
@Leo, looks good?
Shawn
> ---
> arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 9 ++++++---
> 1 file changed, 6 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
> index aef5b06..7ccbbfc 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
> +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
> @@ -277,33 +277,36 @@
> };
>
> gpio1: gpio@2300000 {
> - compatible = "fsl,qoriq-gpio";
> + compatible = "fsl,ls1028a-gpio","fsl,qoriq-gpio";
> reg = <0x0 0x2300000 0x0 0x10000>;
> interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
> gpio-controller;
> #gpio-cells = <2>;
> interrupt-controller;
> #interrupt-cells = <2>;
> + little-endian;
> };
>
> gpio2: gpio@2310000 {
> - compatible = "fsl,qoriq-gpio";
> + compatible = "fsl,ls1028a-gpio","fsl,qoriq-gpio";
> reg = <0x0 0x2310000 0x0 0x10000>;
> interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
> gpio-controller;
> #gpio-cells = <2>;
> interrupt-controller;
> #interrupt-cells = <2>;
> + little-endian;
> };
>
> gpio3: gpio@2320000 {
> - compatible = "fsl,qoriq-gpio";
> + compatible = "fsl,ls1028a-gpio","fsl,qoriq-gpio";
> reg = <0x0 0x2320000 0x0 0x10000>;
> interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
> gpio-controller;
> #gpio-cells = <2>;
> interrupt-controller;
> #interrupt-cells = <2>;
> + little-endian;
> };
>
> usb0: usb@3100000 {
> --
> 2.9.5
>
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^ permalink raw reply
* [PATCH] coresight: Fix DEBUG_LOCKS_WARN_ON for uninitialized attribute
From: Suzuki K Poulose @ 2019-08-12 13:53 UTC (permalink / raw)
To: stable; +Cc: gregkh, linux-arm-kernel, mathieu.poirier, suzuki.poulose
commit 5511c0c309db4c526a6e9f8b2b8a1483771574bc upstream
While running the linux-next with CONFIG_DEBUG_LOCKS_ALLOC enabled,
I get the following splat.
BUG: key ffffcb5636929298 has not been registered!
------------[ cut here ]------------
DEBUG_LOCKS_WARN_ON(1)
WARNING: CPU: 1 PID: 53 at kernel/locking/lockdep.c:3669 lockdep_init_map+0x164/0x1f0
CPU: 1 PID: 53 Comm: kworker/1:1 Tainted: G W 5.2.0-next-20190712-00015-g00ad4634222e-dirty #603
Workqueue: events amba_deferred_retry_func
pstate: 60c00005 (nZCv daif +PAN +UAO)
pc : lockdep_init_map+0x164/0x1f0
lr : lockdep_init_map+0x164/0x1f0
[ trimmed ]
Call trace:
lockdep_init_map+0x164/0x1f0
__kernfs_create_file+0x9c/0x158
sysfs_add_file_mode_ns+0xa8/0x1d0
sysfs_add_file_to_group+0x88/0xd8
etm_perf_add_symlink_sink+0xcc/0x138
coresight_register+0x110/0x280
tmc_probe+0x160/0x420
[ trimmed ]
---[ end trace ab4cc669615ba1b0 ]---
Fix this by initialising the dynamically allocated attribute properly.
Fixes: bb8e370bdc14 ("coresight: perf: Add "sinks" group to PMU directory")
Cc: stable@vger.kernel.org # 5.2.x-
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
---
drivers/hwtracing/coresight/coresight-etm-perf.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.c b/drivers/hwtracing/coresight/coresight-etm-perf.c
index 3c6294432748..1ef098ff27c3 100644
--- a/drivers/hwtracing/coresight/coresight-etm-perf.c
+++ b/drivers/hwtracing/coresight/coresight-etm-perf.c
@@ -544,6 +544,7 @@ int etm_perf_add_symlink_sink(struct coresight_device *csdev)
/* See function coresight_get_sink_by_id() to know where this is used */
hash = hashlen_hash(hashlen_string(NULL, name));
+ sysfs_attr_init(&ea->attr.attr);
ea->attr.attr.name = devm_kstrdup(pdev, name, GFP_KERNEL);
if (!ea->attr.attr.name)
return -ENOMEM;
--
2.21.0
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* Re: [PATCH 0/7] media: cedrus: Improvements/cleanup
From: Maxime Ripard @ 2019-08-12 13:55 UTC (permalink / raw)
To: Hans Verkuil
Cc: devel, Jernej Skrabec, gregkh, linux-kernel, paul.kocialkowski,
wens, mchehab, linux-arm-kernel, linux-media
In-Reply-To: <274221f1-b2d2-83aa-d84b-e1c572a1b832@xs4all.nl>
[-- Attachment #1.1: Type: text/plain, Size: 869 bytes --]
Hi!
On Mon, Aug 12, 2019 at 02:12:21PM +0200, Hans Verkuil wrote:
> On 5/30/19 11:15 PM, Jernej Skrabec wrote:
> > Here is first batch of random Cedrus improvements/cleanups. Only patch 2
> > has a change which raises a question about H264 controls.
> >
> > Changes were tested on H3 SoC using modified ffmpeg and Kodi.
> >
> > Please take a look.
>
> This has been sitting in patchwork for quite some time. I've updated the
> status of the various patches and most needed extra work.
>
> It seems that patches 4/7 and 5/7 are OK. Maxime, can you please confirm
> that these two are still valid? They apply cleanly on the latest master
> at least, but since they are a bit old I prefer to have confirmation that
> it's OK to merge them.
Yes, you can definitely merge those.
Maxime
--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
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* Re: [PATCH v4] arm64: dts: ls1028a: Add esdhc node in dts
From: Shawn Guo @ 2019-08-12 13:55 UTC (permalink / raw)
To: Yinbo Zhu
Cc: Mark Rutland, devicetree, Ashish Kumar, linux-kernel, linux-mmc,
xiaobo.xie, Li Yang, Rob Herring, yangbo.lu, jiafei.pan,
linux-arm-kernel
In-Reply-To: <20190805102641.3732-1-yinbo.zhu@nxp.com>
On Mon, Aug 05, 2019 at 06:26:41PM +0800, Yinbo Zhu wrote:
> From: Ashish Kumar <Ashish.Kumar@nxp.com>
>
> This patch is to add esdhc node and enable SD UHS-I,
> eMMC HS200 for ls1028ardb/ls1028aqds board.
>
> Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
> Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
> Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
> ---
> Change in v4:
> put esdhc 'status' at end of property list.
> sort the nodes in unit-address
> Use IRQ_TYPE_LEVEL_HIGH represent 0x4 in "interrupts = <0 28 0x4>"
>
> arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts | 8 +++++++
> arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts | 13 +++++++++++
> arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 27 +++++++++++++++++++++++
> 3 files changed, 48 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts b/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts
> index de6ef39..5e14e5a 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts
> +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts
> @@ -95,6 +95,14 @@
> status = "okay";
> };
>
> +&esdhc {
> + status = "okay";
> +};
> +
> +&esdhc1 {
> + status = "okay";
> +};
> +
> &i2c0 {
> status = "okay";
>
> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts
> index 9fb9113..12c9cd3 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts
> +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts
> @@ -83,6 +83,19 @@
> };
> };
>
> +&esdhc {
> + sd-uhs-sdr104;
> + sd-uhs-sdr50;
> + sd-uhs-sdr25;
> + sd-uhs-sdr12;
> + status = "okay";
> + };
Fix indent.
> +
> +&esdhc1 {
> + mmc-hs200-1_8v;
> + status = "okay";
> + };
Ditto
Shawn
> +
> &i2c0 {
> status = "okay";
>
> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
> index 7975519..f299075 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
> +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
> @@ -245,6 +245,33 @@
> status = "disabled";
> };
>
> + esdhc: mmc@2140000 {
> + compatible = "fsl,ls1028a-esdhc", "fsl,esdhc";
> + reg = <0x0 0x2140000 0x0 0x10000>;
> + interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
> + clock-frequency = <0>; /* fixed up by bootloader */
> + clocks = <&clockgen 2 1>;
> + voltage-ranges = <1800 1800 3300 3300>;
> + sdhci,auto-cmd12;
> + little-endian;
> + bus-width = <4>;
> + status = "disabled";
> + };
> +
> + esdhc1: mmc@2150000 {
> + compatible = "fsl,ls1028a-esdhc", "fsl,esdhc";
> + reg = <0x0 0x2150000 0x0 0x10000>;
> + interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
> + clock-frequency = <0>; /* fixed up by bootloader */
> + clocks = <&clockgen 2 1>;
> + voltage-ranges = <1800 1800 3300 3300>;
> + sdhci,auto-cmd12;
> + broken-cd;
> + little-endian;
> + bus-width = <4>;
> + status = "disabled";
> + };
> +
> duart0: serial@21c0500 {
> compatible = "fsl,ns16550", "ns16550a";
> reg = <0x00 0x21c0500 0x0 0x100>;
> --
> 2.9.5
>
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^ permalink raw reply
* Re: next/master boot: 265 boots: 17 failed, 184 passed with 64 offline (next-20190730)
From: Jeffrey Hugo @ 2019-08-12 14:07 UTC (permalink / raw)
To: Linus Walleij, Timur Tabi
Cc: Kernel Build Reports Mailman List, Lina Iyer, Stephen Boyd,
Mark Brown, Bjorn Andersson, Lee Jones, Linux ARM
In-Reply-To: <CACRpkdZ7TCvF-EE0Bvjz5Upi_e+CMHqhrkyxn2An8jJKj_g6cw@mail.gmail.com>
On 8/3/2019 2:42 AM, Linus Walleij wrote:
> On Fri, Aug 2, 2019 at 4:51 AM Timur Tabi <timur@kernel.org> wrote:
>> On 7/31/19 12:58 PM, Jeffrey Hugo wrote:
>>>
>>> static int gpiochip_alloc_valid_mask(struct gpio_chip *gc)
>>> {
>>> if (IS_ENABLED(CONFIG_OF_GPIO))
>>> gc->need_valid_mask = of_gpio_need_valid_mask(gc);
>>> if (!gc->need_valid_mask)
>>> return 0;
>>
>> So this seems wrong on a system with OF and ACPI. It assumes that OF
>> takes priority over ACPI if both are enabled, and that's not true in
>> general. If anything, it's the other way around.
>>
>> IS_ENABLED(CONFIG_OF_GPIO) is not the correct test to see if OF should
>> be used. I think this should be replaced with the OF equivalent of
>> has_acpi_companion(), but even that might not be enough. Basically,
>> of_gpio_need_valid_mask() should return three values, 0 = don't need it,
>> 1 = does need it, -1 = gpio info is not in OF.
>
> You're absolutely right.
>
> Sboyd hacked up a patch to that effect and I applied it.
>
> I haven't heard if QDF2400 is working again but I'd love to know!
>
Sorry, was on vacation. Per kernelci[1], looks like things are working.
[1] https://kernelci.org/boot/qcom-qdf2400/
--
Jeffrey Hugo
Qualcomm Technologies, Inc. is a member of the
Code Aurora Forum, a Linux Foundation Collaborative Project.
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* Re: [PATCH v2] arm64: dts: ls1028a: Add Thermal Monitor Unit node
From: Shawn Guo @ 2019-08-12 14:11 UTC (permalink / raw)
To: Yuantian Tang
Cc: mark.rutland, devicetree, linux-kernel, leoyang.li, robh+dt,
linux-arm-kernel
In-Reply-To: <20190806053507.37069-1-andy.tang@nxp.com>
On Tue, Aug 06, 2019 at 01:35:07PM +0800, Yuantian Tang wrote:
> The Thermal Monitoring Unit (TMU) monitors and reports the
> temperature from 2 remote temperature measurement sites
> located on ls1028a chip.
> Add TMU dts node to enable this feature.
>
> Signed-off-by: Yuantian Tang <andy.tang@nxp.com>
> Acked-by: Eduardo Valentin <edubezval@gmail.com>
Applied, thanks.
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* Re: [PATCH 1/2] clk: imx8mm: Unregister clks when of_clk_add_provider failed
From: Shawn Guo @ 2019-08-12 14:16 UTC (permalink / raw)
To: Anson.Huang
Cc: peng.fan, abel.vesa, sboyd, mturquette, linux-clk, linux-kernel,
jun.li, agx, Linux-imx, kernel, chen.fang, leonard.crestez,
festevam, s.hauer, linux-arm-kernel, ping.bai
In-Reply-To: <20190806064614.20294-1-Anson.Huang@nxp.com>
On Tue, Aug 06, 2019 at 02:46:13PM +0800, Anson.Huang@nxp.com wrote:
> From: Anson Huang <Anson.Huang@nxp.com>
>
> When of_clk_add_provider failed, all clks should be unregistered.
>
> Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Applied both, thanks.
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* Re: [PATCH 1/4] arm64: dts: ls1088a: Fix incorrect I2C clock divider
From: Shawn Guo @ 2019-08-12 14:17 UTC (permalink / raw)
To: Chuanhua Han
Cc: mark.rutland, devicetree, linux-kernel, leoyang.li, robh+dt,
linux-arm-kernel
In-Reply-To: <20190806084223.23543-1-chuanhua.han@nxp.com>
On Tue, Aug 06, 2019 at 04:42:20PM +0800, Chuanhua Han wrote:
> Ls1088a platform, the i2c input clock is actually platform pll CLK / 8
> (this is the hardware connection), other clock divider can not get the
> correct i2c clock, resulting in the output of SCL pin clock is not
> accurate.
>
> Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
@Leo, looks good?
Shawn
> ---
> arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
> index 20f5ebd..30b760e 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
> +++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
> @@ -324,7 +324,7 @@
> #size-cells = <0>;
> reg = <0x0 0x2000000 0x0 0x10000>;
> interrupts = <0 34 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clockgen 4 3>;
> + clocks = <&clockgen 4 7>;
> status = "disabled";
> };
>
> @@ -334,7 +334,7 @@
> #size-cells = <0>;
> reg = <0x0 0x2010000 0x0 0x10000>;
> interrupts = <0 34 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clockgen 4 3>;
> + clocks = <&clockgen 4 7>;
> status = "disabled";
> };
>
> @@ -344,7 +344,7 @@
> #size-cells = <0>;
> reg = <0x0 0x2020000 0x0 0x10000>;
> interrupts = <0 35 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clockgen 4 3>;
> + clocks = <&clockgen 4 7>;
> status = "disabled";
> };
>
> @@ -354,7 +354,7 @@
> #size-cells = <0>;
> reg = <0x0 0x2030000 0x0 0x10000>;
> interrupts = <0 35 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clockgen 4 3>;
> + clocks = <&clockgen 4 7>;
> status = "disabled";
> };
>
> --
> 2.9.5
>
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* [PATCH v4 00/21] Common patches from downstream development
From: Philippe Schenker @ 2019-08-12 14:21 UTC (permalink / raw)
To: Marcel Ziswiler, Max Krummenacher, stefan@agner.ch,
devicetree@vger.kernel.org, Rob Herring, Shawn Guo, Mark Rutland,
Michal Vokáč, Fabio Estevam
Cc: Sascha Hauer, linux-kernel@vger.kernel.org, Philippe Schenker,
NXP Linux Team, Pengutronix Kernel Team,
linux-arm-kernel@lists.infradead.org
This patchset holds some common changes that were never upstreamed.
With latest downstream kernel upgrade, I took the aproach to select
mainline devicetrees and atomically add missing stuff for downstream.
These patches I send here are separated out with changes that also
have a benfit for mainline.
Philippe
Changes in v4:
- Added Marcel Ziswiler's Ack
- Added Marcel Ziswiler's Ack
- Make scl-gpios and sda-gpios (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)
- Change commit title to Michal's suggestion
- Add Marcel Ziswiler's Ack
- Add Marcel Ziswiler's Ack
- Add Marcel Ziswiler's Ack
- Add Marcel Ziswiler's Ack
- Add Marcel Ziswiler's Ack
- Add Marcel Ziswiler's Ack
- Add Marcel Ziswiler's Ack
- Add Marcel Ziswiler's Ack
- Add Marcel Ziswiler's Ack
- Add Marcel Ziswiler's Ack
- Add Marcel Ziswiler's Ack
- Move can nodes to module deviceteree include imx6ull-colibri.dtsi
- Add Marcel Ziswiler's Ack
- New patch as of the recommendation from Marcel on ML
Changes in v3:
- Add new commit message from Stefan's proposal on ML
- Fix commit message
- Fix commit title to "...imx6-apalis:..."
- New patch to make use of ARM: dts: imx7-colibri: fix 1.8V/UHS support
Changes in v2:
- Deleted touchrevolution downstream stuff
- Use generic node name
- Better comment
- Changed commit title to '...imx6qdl-apalis:...'
- Deleted touchrevolution downstream stuff
- Use generic node name
- Put a better comment in there
- Commit title
- Removed f0710a, that is downstream only
- Changed to generic node name
- Better comment
Igor Opaniuk (1):
ARM: dts: imx6qdl-colibri.dtsi: UHS-I support for v1.1a hw
Marcel Ziswiler (1):
ARM: dts: imx7-colibri: make sure module supplies are always on
Max Krummenacher (2):
ARM: dts: imx6ull-colibri: reduce v_batt current in power off
ARM: dts: imx6ull: improve can templates
Oleksandr Suvorov (1):
ARM: dts: imx7-colibri: add recovery for I2C for iMX7
Philippe Schenker (13):
ARM: dts: imx7-colibri: prepare module device tree for FlexCAN
ARM: dts: imx7-colibri: Add sleep mode to ethernet
ARM: dts: imx7-colibri: Add touch controllers
ARM: dts: imx6qdl-colibri: add phy to fec
ARM: dts: imx6qdl-colibri: Add missing pin declaration in iomuxc
ARM: dts: imx6qdl-apalis: Add sleep state to can interfaces
ARM: dts: imx6-apalis: Add touchscreens used on Toradex eval boards
ARM: dts: imx6-colibri: Add missing pinmuxing to Toradex eval board
ARM: dts: imx6ull-colibri: Add sleep mode to fec
ARM: dts: imx6ull-colibri: Add watchdog
ARM: dts: imx6ull-colibri: Add general wakeup key used on Colibri
ARM: dts: imx6ull-colibri: Add touchscreen used with Eval Board
ARM: dts: imx7-colibri: Add UHS support to eval board
Stefan Agner (3):
ARM: dts: imx7-colibri: disable HS400
ARM: dts: imx7-colibri: add GPIO wakeup key
ARM: dts: imx7-colibri: fix 1.8V/UHS support
arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts | 39 ++++++
arch/arm/boot/dts/imx6q-apalis-eval.dts | 13 ++
arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts | 13 ++
arch/arm/boot/dts/imx6q-apalis-ixora.dts | 13 ++
arch/arm/boot/dts/imx6qdl-apalis.dtsi | 27 ++++-
arch/arm/boot/dts/imx6qdl-colibri.dtsi | 68 ++++++++++-
.../arm/boot/dts/imx6ull-colibri-eval-v3.dtsi | 38 ++++++
.../arm/boot/dts/imx6ull-colibri-nonwifi.dtsi | 2 +-
arch/arm/boot/dts/imx6ull-colibri-wifi.dtsi | 2 +-
arch/arm/boot/dts/imx6ull-colibri.dtsi | 64 +++++++++-
arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi | 49 +++++++-
arch/arm/boot/dts/imx7-colibri.dtsi | 112 ++++++++++++++++--
12 files changed, 410 insertions(+), 30 deletions(-)
--
2.22.0
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* [PATCH v4 03/21] ARM: dts: imx7-colibri: prepare module device tree for FlexCAN
From: Philippe Schenker @ 2019-08-12 14:21 UTC (permalink / raw)
To: Marcel Ziswiler, Max Krummenacher, stefan@agner.ch,
devicetree@vger.kernel.org, Rob Herring, Shawn Guo, Mark Rutland,
Michal Vokáč, Fabio Estevam
Cc: Sascha Hauer, linux-kernel@vger.kernel.org, Philippe Schenker,
NXP Linux Team, Pengutronix Kernel Team,
linux-arm-kernel@lists.infradead.org
In-Reply-To: <20190812142105.1995-1-philippe.schenker@toradex.com>
Prepare FlexCAN use on SODIMM 55/63 178/188. Those SODIMM pins are
compatible for CAN bus use with several modules from the Colibri
family.
Add Better drivestrength and also add flexcan2.
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
---
Changes in v4:
- Added Marcel Ziswiler's Ack
Changes in v3: None
Changes in v2: None
arch/arm/boot/dts/imx7-colibri.dtsi | 35 ++++++++++++++++++++++++-----
1 file changed, 30 insertions(+), 5 deletions(-)
diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi b/arch/arm/boot/dts/imx7-colibri.dtsi
index f7c9ce5bed47..52046085ce6f 100644
--- a/arch/arm/boot/dts/imx7-colibri.dtsi
+++ b/arch/arm/boot/dts/imx7-colibri.dtsi
@@ -117,6 +117,18 @@
fsl,magic-packet;
};
+&flexcan1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_flexcan1>;
+ status = "disabled";
+};
+
+&flexcan2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_flexcan2>;
+ status = "disabled";
+};
+
&gpmi {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpmi_nand>;
@@ -330,12 +342,11 @@
&iomuxc {
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_gpio1 &pinctrl_gpio2 &pinctrl_gpio3 &pinctrl_gpio4>;
+ pinctrl-0 = <&pinctrl_gpio1 &pinctrl_gpio2 &pinctrl_gpio3 &pinctrl_gpio4
+ &pinctrl_gpio7>;
pinctrl_gpio1: gpio1-grp {
fsl,pins = <
- MX7D_PAD_ENET1_RGMII_RD3__GPIO7_IO3 0x74 /* SODIMM 55 */
- MX7D_PAD_ENET1_RGMII_RD2__GPIO7_IO2 0x74 /* SODIMM 63 */
MX7D_PAD_SAI1_RX_SYNC__GPIO6_IO16 0x14 /* SODIMM 77 */
MX7D_PAD_EPDC_DATA09__GPIO2_IO9 0x14 /* SODIMM 89 */
MX7D_PAD_EPDC_DATA08__GPIO2_IO8 0x74 /* SODIMM 91 */
@@ -416,6 +427,13 @@
>;
};
+ pinctrl_gpio7: gpio7-grp { /* Alternatively CAN1 */
+ fsl,pins = <
+ MX7D_PAD_ENET1_RGMII_RD3__GPIO7_IO3 0x14 /* SODIMM 55 */
+ MX7D_PAD_ENET1_RGMII_RD2__GPIO7_IO2 0x14 /* SODIMM 63 */
+ >;
+ };
+
pinctrl_i2c1_int: i2c1-int-grp { /* PMIC / TOUCH */
fsl,pins = <
MX7D_PAD_GPIO1_IO13__GPIO1_IO13 0x79
@@ -459,10 +477,17 @@
>;
};
+ pinctrl_flexcan1: flexcan1-grp {
+ fsl,pins = <
+ MX7D_PAD_ENET1_RGMII_RD3__FLEXCAN1_TX 0x79 /* SODIMM 55 */
+ MX7D_PAD_ENET1_RGMII_RD2__FLEXCAN1_RX 0x79 /* SODIMM 63 */
+ >;
+ };
+
pinctrl_flexcan2: flexcan2-grp {
fsl,pins = <
- MX7D_PAD_GPIO1_IO14__FLEXCAN2_RX 0x59
- MX7D_PAD_GPIO1_IO15__FLEXCAN2_TX 0x59
+ MX7D_PAD_GPIO1_IO14__FLEXCAN2_RX 0x79 /* SODIMM 188 */
+ MX7D_PAD_GPIO1_IO15__FLEXCAN2_TX 0x79 /* SODIMM 178 */
>;
};
--
2.22.0
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^ permalink raw reply related
* [PATCH v4 01/21] ARM: dts: imx7-colibri: make sure module supplies are always on
From: Philippe Schenker @ 2019-08-12 14:21 UTC (permalink / raw)
To: Marcel Ziswiler, Max Krummenacher, stefan@agner.ch,
devicetree@vger.kernel.org, Rob Herring, Shawn Guo, Mark Rutland,
Michal Vokáč, Fabio Estevam
Cc: Sascha Hauer, linux-kernel@vger.kernel.org, Philippe Schenker,
NXP Linux Team, Pengutronix Kernel Team,
linux-arm-kernel@lists.infradead.org
In-Reply-To: <20190812142105.1995-1-philippe.schenker@toradex.com>
From: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Prevent regulators from being switched off.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
---
Changes in v4: None
Changes in v3: None
Changes in v2: None
arch/arm/boot/dts/imx7-colibri.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi b/arch/arm/boot/dts/imx7-colibri.dtsi
index 895fbde4d433..f1c1971f2160 100644
--- a/arch/arm/boot/dts/imx7-colibri.dtsi
+++ b/arch/arm/boot/dts/imx7-colibri.dtsi
@@ -54,6 +54,7 @@
regulator-name = "+V3.3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
+ regulator-always-on;
};
reg_module_3v3_avdd: regulator-module-3v3-avdd {
@@ -61,6 +62,7 @@
regulator-name = "+V3.3_AVDD_AUDIO";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
+ regulator-always-on;
};
sound {
--
2.22.0
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* [PATCH v4 02/21] ARM: dts: imx7-colibri: disable HS400
From: Philippe Schenker @ 2019-08-12 14:21 UTC (permalink / raw)
To: Marcel Ziswiler, Max Krummenacher, stefan@agner.ch,
devicetree@vger.kernel.org, Rob Herring, Shawn Guo, Mark Rutland,
Michal Vokáč, Fabio Estevam
Cc: Stefan Agner, Sascha Hauer, linux-kernel@vger.kernel.org,
Philippe Schenker, NXP Linux Team, Pengutronix Kernel Team,
linux-arm-kernel@lists.infradead.org
In-Reply-To: <20190812142105.1995-1-philippe.schenker@toradex.com>
From: Stefan Agner <stefan.agner@toradex.com>
Force HS200 by masking bit 63 of the SDHCI capability register.
The i.MX ESDHC driver uses SDHCI_QUIRK2_CAPS_BIT63_FOR_HS400. With
that the stack checks bit 63 to descide whether HS400 is available.
Using sdhci-caps-mask allows to mask bit 63. The stack then selects
HS200 as operating mode.
This prevents rare communication errors with minimal effect on
performance:
sdhci-esdhc-imx 30b60000.usdhc: warning! HS400 strobe DLL
status REF not lock!
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
---
Changes in v4: None
Changes in v3: None
Changes in v2: None
arch/arm/boot/dts/imx7-colibri.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi b/arch/arm/boot/dts/imx7-colibri.dtsi
index f1c1971f2160..f7c9ce5bed47 100644
--- a/arch/arm/boot/dts/imx7-colibri.dtsi
+++ b/arch/arm/boot/dts/imx7-colibri.dtsi
@@ -325,6 +325,7 @@
vmmc-supply = <®_module_3v3>;
vqmmc-supply = <®_DCDC3>;
non-removable;
+ sdhci-caps-mask = <0x80000000 0x0>;
};
&iomuxc {
--
2.22.0
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* [PATCH v4 04/21] ARM: dts: imx7-colibri: Add sleep mode to ethernet
From: Philippe Schenker @ 2019-08-12 14:21 UTC (permalink / raw)
To: Marcel Ziswiler, Max Krummenacher, stefan@agner.ch,
devicetree@vger.kernel.org, Rob Herring, Shawn Guo, Mark Rutland,
Michal Vokáč, Fabio Estevam
Cc: Sascha Hauer, linux-kernel@vger.kernel.org, Philippe Schenker,
NXP Linux Team, Pengutronix Kernel Team,
linux-arm-kernel@lists.infradead.org
In-Reply-To: <20190812142105.1995-1-philippe.schenker@toradex.com>
Add sleep pinmux to the fec so it can properly sleep.
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
---
Changes in v4:
- Added Marcel Ziswiler's Ack
Changes in v3: None
Changes in v2: None
arch/arm/boot/dts/imx7-colibri.dtsi | 19 ++++++++++++++++++-
1 file changed, 18 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi b/arch/arm/boot/dts/imx7-colibri.dtsi
index 52046085ce6f..a8d992f3e897 100644
--- a/arch/arm/boot/dts/imx7-colibri.dtsi
+++ b/arch/arm/boot/dts/imx7-colibri.dtsi
@@ -101,8 +101,9 @@
};
&fec1 {
- pinctrl-names = "default";
+ pinctrl-names = "default", "sleep";
pinctrl-0 = <&pinctrl_enet1>;
+ pinctrl-1 = <&pinctrl_enet1_sleep>;
clocks = <&clks IMX7D_ENET_AXI_ROOT_CLK>,
<&clks IMX7D_ENET_AXI_ROOT_CLK>,
<&clks IMX7D_ENET1_TIME_ROOT_CLK>,
@@ -463,6 +464,22 @@
>;
};
+ pinctrl_enet1_sleep: enet1sleepgrp {
+ fsl,pins = <
+ MX7D_PAD_ENET1_RGMII_RX_CTL__GPIO7_IO4 0x0
+ MX7D_PAD_ENET1_RGMII_RD0__GPIO7_IO0 0x0
+ MX7D_PAD_ENET1_RGMII_RD1__GPIO7_IO1 0x0
+ MX7D_PAD_ENET1_RGMII_RXC__GPIO7_IO5 0x0
+
+ MX7D_PAD_ENET1_RGMII_TX_CTL__GPIO7_IO10 0x0
+ MX7D_PAD_ENET1_RGMII_TD0__GPIO7_IO6 0x0
+ MX7D_PAD_ENET1_RGMII_TD1__GPIO7_IO7 0x0
+ MX7D_PAD_GPIO1_IO12__GPIO1_IO12 0x0
+ MX7D_PAD_SD2_CD_B__GPIO5_IO9 0x0
+ MX7D_PAD_SD2_WP__GPIO5_IO10 0x0
+ >;
+ };
+
pinctrl_ecspi3_cs: ecspi3-cs-grp {
fsl,pins = <
MX7D_PAD_I2C2_SDA__GPIO4_IO11 0x14
--
2.22.0
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* [PATCH v4 05/21] ARM: dts: imx7-colibri: add recovery for I2C for iMX7
From: Philippe Schenker @ 2019-08-12 14:21 UTC (permalink / raw)
To: Marcel Ziswiler, Max Krummenacher, stefan@agner.ch,
devicetree@vger.kernel.org, Rob Herring, Shawn Guo, Mark Rutland,
Michal Vokáč, Fabio Estevam
Cc: Sascha Hauer, linux-kernel@vger.kernel.org, Oleksandr Suvorov,
Philippe Schenker, NXP Linux Team, Pengutronix Kernel Team,
linux-arm-kernel@lists.infradead.org
In-Reply-To: <20190812142105.1995-1-philippe.schenker@toradex.com>
From: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
- add recovery mode for applicable i2c buses for
Colibri iMX7 module.
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
---
Changes in v4:
- Make scl-gpios and sda-gpios (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)
- Change commit title to Michal's suggestion
Changes in v3: None
Changes in v2: None
arch/arm/boot/dts/imx7-colibri.dtsi | 25 +++++++++++++++++++++++--
1 file changed, 23 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi b/arch/arm/boot/dts/imx7-colibri.dtsi
index a8d992f3e897..cab40d22d24e 100644
--- a/arch/arm/boot/dts/imx7-colibri.dtsi
+++ b/arch/arm/boot/dts/imx7-colibri.dtsi
@@ -140,8 +140,12 @@
&i2c1 {
clock-frequency = <100000>;
- pinctrl-names = "default";
+ pinctrl-names = "default", "gpio";
pinctrl-0 = <&pinctrl_i2c1 &pinctrl_i2c1_int>;
+ pinctrl-1 = <&pinctrl_i2c1_recovery &pinctrl_i2c1_int>;
+ scl-gpios = <&gpio1 4 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ sda-gpios = <&gpio1 5 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+
status = "okay";
codec: sgtl5000@a {
@@ -242,8 +246,11 @@
&i2c4 {
clock-frequency = <100000>;
- pinctrl-names = "default";
+ pinctrl-names = "default", "gpio";
pinctrl-0 = <&pinctrl_i2c4>;
+ pinctrl-1 = <&pinctrl_i2c4_recovery>;
+ scl-gpios = <&gpio7 8 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ sda-gpios = <&gpio7 9 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
};
&lcdif {
@@ -540,6 +547,13 @@
>;
};
+ pinctrl_i2c4_recovery: i2c4-recoverygrp {
+ fsl,pins = <
+ MX7D_PAD_ENET1_RGMII_TD2__GPIO7_IO8 0x4000007f
+ MX7D_PAD_ENET1_RGMII_TD3__GPIO7_IO9 0x4000007f
+ >;
+ };
+
pinctrl_lcdif_dat: lcdif-dat-grp {
fsl,pins = <
MX7D_PAD_LCD_DATA00__LCD_DATA0 0x79
@@ -740,6 +754,13 @@
>;
};
+ pinctrl_i2c1_recovery: i2c1-recoverygrp {
+ fsl,pins = <
+ MX7D_PAD_LPSR_GPIO1_IO04__GPIO1_IO4 0x4000007f
+ MX7D_PAD_LPSR_GPIO1_IO05__GPIO1_IO5 0x4000007f
+ >;
+ };
+
pinctrl_cd_usdhc1: usdhc1-cd-grp {
fsl,pins = <
MX7D_PAD_LPSR_GPIO1_IO00__GPIO1_IO0 0x59 /* CD */
--
2.22.0
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