* Re: [PATCH 3/3] arm64: dts: khadas-vim3: add support for the SM1 based VIM3
From: Neil Armstrong @ 2019-08-26 7:43 UTC (permalink / raw)
To: Martin Blumenstingl
Cc: khilman, linux-kernel, linux-arm-kernel, linux-amlogic
In-Reply-To: <CAFBinCAH2LP2OyFEek290Prm9N=rxxAc-9gZ_jS0tY_4+utByA@mail.gmail.com>
On 25/08/2019 21:55, Martin Blumenstingl wrote:
> On Fri, Aug 23, 2019 at 10:15 AM Neil Armstrong <narmstrong@baylibre.com> wrote:
>>
>> Add the Amlogic SM1 based Khadas VIM3, sharing all the same features
>> as the G12B based one, but:
>> - a different DVFS support since only a single cluster is available
>> - audio is still not available on SM1
>>
>> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
> schematics are not available yet but this looks sane so:
> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
>
I assume it's the same schematics as the A311D VIM3.
BTW, as I asked on patch 2, Khadas asked me to rename the board to "vim3l",
which is the commercial name, should I only change the DT name or also the
compatible "khadas,vim3l" ?
Neil
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* Re: [PATCH 05/11] ftrace: create memcache for hash entries
From: Peter Zijlstra @ 2019-08-26 7:44 UTC (permalink / raw)
To: Changbin Du
Cc: linux-arch, linux-s390, linux-parisc, Jonathan Corbet, linux-sh,
x86, linux-doc, linux-kernel, Steven Rostedt, linux-mips,
Ingo Molnar, Jessica Yu, sparclinux, linux-kbuild,
Thomas Gleixner, linuxppc-dev, linux-riscv, linux-arm-kernel
In-Reply-To: <20190825132330.5015-6-changbin.du@gmail.com>
On Sun, Aug 25, 2019 at 09:23:24PM +0800, Changbin Du wrote:
> When CONFIG_FTRACE_FUNC_PROTOTYPE is enabled, thousands of
> ftrace_func_entry instances are created. So create a dedicated
> memcache to enhance performance.
>
> Signed-off-by: Changbin Du <changbin.du@gmail.com>
> ---
> kernel/trace/ftrace.c | 17 ++++++++++++++++-
> 1 file changed, 16 insertions(+), 1 deletion(-)
>
> diff --git a/kernel/trace/ftrace.c b/kernel/trace/ftrace.c
> index a314f0768b2c..cfcb8dad93ea 100644
> --- a/kernel/trace/ftrace.c
> +++ b/kernel/trace/ftrace.c
> @@ -94,6 +94,8 @@ struct ftrace_ops *function_trace_op __read_mostly = &ftrace_list_end;
> /* What to set function_trace_op to */
> static struct ftrace_ops *set_function_trace_op;
>
> +struct kmem_cache *hash_entry_cache;
> +
> static bool ftrace_pids_enabled(struct ftrace_ops *ops)
> {
> struct trace_array *tr;
> @@ -1169,7 +1171,7 @@ static int add_hash_entry(struct ftrace_hash *hash, unsigned long ip,
> {
> struct ftrace_func_entry *entry;
>
> - entry = kmalloc(sizeof(*entry), GFP_KERNEL);
> + entry = kmem_cache_alloc(hash_entry_cache, GFP_KERNEL);
> if (!entry)
> return -ENOMEM;
>
> @@ -6153,6 +6155,15 @@ void __init ftrace_init(void)
> if (ret)
> goto failed;
>
> + hash_entry_cache = kmem_cache_create("ftrace-hash",
> + sizeof(struct ftrace_func_entry),
> + sizeof(struct ftrace_func_entry),
> + 0, NULL);
> + if (!hash_entry_cache) {
> + pr_err("failed to create ftrace hash entry cache\n");
> + goto failed;
> + }
Wait what; you already have then in the binary image, now you're
allocating extra memory for each of them?
Did you look at what ORC does? Is the binary search really not fast
enough?
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* Re: [PATCH 1/2] usb: dwc3: st: Add of_node_put() before return in probe function
From: Patrice CHOTARD @ 2019-08-26 7:46 UTC (permalink / raw)
To: Nishka Dasgupta, balbi@kernel.org, gregkh@linuxfoundation.org,
linux-arm-kernel@lists.infradead.org, linux-usb@vger.kernel.org
In-Reply-To: <20190819072436.31402-1-nishkadg.linux@gmail.com>
Hi Nishka
On 8/19/19 9:24 AM, Nishka Dasgupta wrote:
> The local variable child in the function st_dwc3_probe takes the return
> value of of_get_child_by_name, which gets a node and does not put it. If
> the function returns without releasing child, this could cause a memory
> error. Hence put child as soon as there is no more use for it. Also
> create a new label, err_node_put, just before label undo_softreset; so
> that err_node_put puts child. In between initialisation of child and its
> first put, modify all statements that go to undo_softreset to now go to
> err_node_put instead, from where they can fall through to
> undo_softreset.
> Issue found with Coccinelle.
>
> Signed-off-by: Nishka Dasgupta <nishkadg.linux@gmail.com>
> ---
> drivers/usb/dwc3/dwc3-st.c | 9 ++++++---
> 1 file changed, 6 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/usb/dwc3/dwc3-st.c b/drivers/usb/dwc3/dwc3-st.c
> index 16081383c401..6f52c749cd58 100644
> --- a/drivers/usb/dwc3/dwc3-st.c
> +++ b/drivers/usb/dwc3/dwc3-st.c
> @@ -255,24 +255,25 @@ static int st_dwc3_probe(struct platform_device *pdev)
> if (!child) {
> dev_err(&pdev->dev, "failed to find dwc3 core node\n");
> ret = -ENODEV;
> - goto undo_softreset;
> + goto err_node_put;
> }
>
> /* Allocate and initialize the core */
> ret = of_platform_populate(node, NULL, NULL, dev);
> if (ret) {
> dev_err(dev, "failed to add dwc3 core\n");
> - goto undo_softreset;
> + goto err_node_put;
> }
>
> child_pdev = of_find_device_by_node(child);
> if (!child_pdev) {
> dev_err(dev, "failed to find dwc3 core device\n");
> ret = -ENODEV;
> - goto undo_softreset;
> + goto err_node_put;
> }
>
> dwc3_data->dr_mode = usb_get_dr_mode(&child_pdev->dev);
> + of_node_put(child);
>
> /*
> * Configure the USB port as device or host according to the static
> @@ -292,6 +293,8 @@ static int st_dwc3_probe(struct platform_device *pdev)
> platform_set_drvdata(pdev, dwc3_data);
> return 0;
>
> +err_node_put:
> + of_node_put(child);
> undo_softreset:
> reset_control_assert(dwc3_data->rstc_rst);
> undo_powerdown:
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Thanks
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* Re: [PATCH 2/2] usb: dwc3: st: Add of_dev_put() in probe function
From: Patrice CHOTARD @ 2019-08-26 7:47 UTC (permalink / raw)
To: Nishka Dasgupta, balbi@kernel.org, gregkh@linuxfoundation.org,
linux-arm-kernel@lists.infradead.org, linux-usb@vger.kernel.org
In-Reply-To: <20190819072436.31402-2-nishkadg.linux@gmail.com>
On 8/19/19 9:24 AM, Nishka Dasgupta wrote:
> In function st_dwc3_probe, variable child_pdev takes the value returned
> by of_find_device_by_node, which gets a device pointer but does not put
> it. If child_pdev is not put before the probe function returns, it may
> cause a reference leak. Hence put child_pdev after its last usage.
> Issue found with Coccinelle.
>
> Signed-off-by: Nishka Dasgupta <nishkadg.linux@gmail.com>
> ---
> drivers/usb/dwc3/dwc3-st.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/usb/dwc3/dwc3-st.c b/drivers/usb/dwc3/dwc3-st.c
> index 6f52c749cd58..c682420f25ca 100644
> --- a/drivers/usb/dwc3/dwc3-st.c
> +++ b/drivers/usb/dwc3/dwc3-st.c
> @@ -274,6 +274,7 @@ static int st_dwc3_probe(struct platform_device *pdev)
>
> dwc3_data->dr_mode = usb_get_dr_mode(&child_pdev->dev);
> of_node_put(child);
> + of_dev_put(child_pdev);
>
> /*
> * Configure the USB port as device or host according to the static
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Thanks
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* remove various unused set_memory_* related functions and exports v2
From: Christoph Hellwig @ 2019-08-26 7:55 UTC (permalink / raw)
To: x86
Cc: Peter Zijlstra, Dave Hansen, linux-arm-kernel, Andy Lutomirski,
linux-kernel
Hi all,
while looking into implementing a DMA memory allocator for PCIe unsnooped
transactions I've started looking at the set_memory_* and related APIs,
and it turns out that many of them are unused. Fix for that below.
Changes since v2:
- dropped the already merged arm64 patch
- fix a subject line to not mention the wrong functions
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* [PATCH 1/5] x86: unexport set_memory_x and set_memory_nx
From: Christoph Hellwig @ 2019-08-26 7:55 UTC (permalink / raw)
To: x86
Cc: Peter Zijlstra, Dave Hansen, linux-arm-kernel, Andy Lutomirski,
linux-kernel
In-Reply-To: <20190826075558.8125-1-hch@lst.de>
No module currently messed with clearing or setting the execute
permission of kernel memory, and none really should.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
---
arch/x86/mm/pageattr.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c
index 6a9a77a403c9..a02ca8986299 100644
--- a/arch/x86/mm/pageattr.c
+++ b/arch/x86/mm/pageattr.c
@@ -1967,7 +1967,6 @@ int set_memory_x(unsigned long addr, int numpages)
return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_NX), 0);
}
-EXPORT_SYMBOL(set_memory_x);
int set_memory_nx(unsigned long addr, int numpages)
{
@@ -1976,7 +1975,6 @@ int set_memory_nx(unsigned long addr, int numpages)
return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_NX), 0);
}
-EXPORT_SYMBOL(set_memory_nx);
int set_memory_ro(unsigned long addr, int numpages)
{
--
2.20.1
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* [PATCH 2/5] x86: remove the unused set_memory_array_* functions
From: Christoph Hellwig @ 2019-08-26 7:55 UTC (permalink / raw)
To: x86
Cc: Peter Zijlstra, Dave Hansen, linux-arm-kernel, Andy Lutomirski,
linux-kernel
In-Reply-To: <20190826075558.8125-1-hch@lst.de>
Signed-off-by: Christoph Hellwig <hch@lst.de>
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
---
arch/x86/include/asm/set_memory.h | 5 ---
arch/x86/mm/pageattr.c | 75 -------------------------------
2 files changed, 80 deletions(-)
diff --git a/arch/x86/include/asm/set_memory.h b/arch/x86/include/asm/set_memory.h
index ae7b909dc242..899ec9ae7cff 100644
--- a/arch/x86/include/asm/set_memory.h
+++ b/arch/x86/include/asm/set_memory.h
@@ -48,11 +48,6 @@ int set_memory_encrypted(unsigned long addr, int numpages);
int set_memory_decrypted(unsigned long addr, int numpages);
int set_memory_np_noalias(unsigned long addr, int numpages);
-int set_memory_array_uc(unsigned long *addr, int addrinarray);
-int set_memory_array_wc(unsigned long *addr, int addrinarray);
-int set_memory_array_wt(unsigned long *addr, int addrinarray);
-int set_memory_array_wb(unsigned long *addr, int addrinarray);
-
int set_pages_array_uc(struct page **pages, int addrinarray);
int set_pages_array_wc(struct page **pages, int addrinarray);
int set_pages_array_wt(struct page **pages, int addrinarray);
diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c
index a02ca8986299..3be5d22c005a 100644
--- a/arch/x86/mm/pageattr.c
+++ b/arch/x86/mm/pageattr.c
@@ -1809,63 +1809,6 @@ int set_memory_uc(unsigned long addr, int numpages)
}
EXPORT_SYMBOL(set_memory_uc);
-static int _set_memory_array(unsigned long *addr, int numpages,
- enum page_cache_mode new_type)
-{
- enum page_cache_mode set_type;
- int i, j;
- int ret;
-
- for (i = 0; i < numpages; i++) {
- ret = reserve_memtype(__pa(addr[i]), __pa(addr[i]) + PAGE_SIZE,
- new_type, NULL);
- if (ret)
- goto out_free;
- }
-
- /* If WC, set to UC- first and then WC */
- set_type = (new_type == _PAGE_CACHE_MODE_WC) ?
- _PAGE_CACHE_MODE_UC_MINUS : new_type;
-
- ret = change_page_attr_set(addr, numpages,
- cachemode2pgprot(set_type), 1);
-
- if (!ret && new_type == _PAGE_CACHE_MODE_WC)
- ret = change_page_attr_set_clr(addr, numpages,
- cachemode2pgprot(
- _PAGE_CACHE_MODE_WC),
- __pgprot(_PAGE_CACHE_MASK),
- 0, CPA_ARRAY, NULL);
- if (ret)
- goto out_free;
-
- return 0;
-
-out_free:
- for (j = 0; j < i; j++)
- free_memtype(__pa(addr[j]), __pa(addr[j]) + PAGE_SIZE);
-
- return ret;
-}
-
-int set_memory_array_uc(unsigned long *addr, int numpages)
-{
- return _set_memory_array(addr, numpages, _PAGE_CACHE_MODE_UC_MINUS);
-}
-EXPORT_SYMBOL(set_memory_array_uc);
-
-int set_memory_array_wc(unsigned long *addr, int numpages)
-{
- return _set_memory_array(addr, numpages, _PAGE_CACHE_MODE_WC);
-}
-EXPORT_SYMBOL(set_memory_array_wc);
-
-int set_memory_array_wt(unsigned long *addr, int numpages)
-{
- return _set_memory_array(addr, numpages, _PAGE_CACHE_MODE_WT);
-}
-EXPORT_SYMBOL_GPL(set_memory_array_wt);
-
int _set_memory_wc(unsigned long addr, int numpages)
{
int ret;
@@ -1942,24 +1885,6 @@ int set_memory_wb(unsigned long addr, int numpages)
}
EXPORT_SYMBOL(set_memory_wb);
-int set_memory_array_wb(unsigned long *addr, int numpages)
-{
- int i;
- int ret;
-
- /* WB cache mode is hard wired to all cache attribute bits being 0 */
- ret = change_page_attr_clear(addr, numpages,
- __pgprot(_PAGE_CACHE_MASK), 1);
- if (ret)
- return ret;
-
- for (i = 0; i < numpages; i++)
- free_memtype(__pa(addr[i]), __pa(addr[i]) + PAGE_SIZE);
-
- return 0;
-}
-EXPORT_SYMBOL(set_memory_array_wb);
-
int set_memory_x(unsigned long addr, int numpages)
{
if (!(__supported_pte_mask & _PAGE_NX))
--
2.20.1
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* [PATCH 3/5] x86: remove set_pages_x and set_pages_nx
From: Christoph Hellwig @ 2019-08-26 7:55 UTC (permalink / raw)
To: x86
Cc: Peter Zijlstra, Dave Hansen, linux-arm-kernel, Andy Lutomirski,
linux-kernel
In-Reply-To: <20190826075558.8125-1-hch@lst.de>
These wrappers don't provide a real benefit over just using
set_memory_x and set_memory_nx.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
---
arch/x86/include/asm/set_memory.h | 2 --
arch/x86/kernel/machine_kexec_32.c | 4 ++--
arch/x86/mm/init_32.c | 2 +-
arch/x86/mm/pageattr.c | 16 ----------------
4 files changed, 3 insertions(+), 21 deletions(-)
diff --git a/arch/x86/include/asm/set_memory.h b/arch/x86/include/asm/set_memory.h
index 899ec9ae7cff..fd549c3ebb17 100644
--- a/arch/x86/include/asm/set_memory.h
+++ b/arch/x86/include/asm/set_memory.h
@@ -75,8 +75,6 @@ int set_pages_array_wb(struct page **pages, int addrinarray);
int set_pages_uc(struct page *page, int numpages);
int set_pages_wb(struct page *page, int numpages);
-int set_pages_x(struct page *page, int numpages);
-int set_pages_nx(struct page *page, int numpages);
int set_pages_ro(struct page *page, int numpages);
int set_pages_rw(struct page *page, int numpages);
diff --git a/arch/x86/kernel/machine_kexec_32.c b/arch/x86/kernel/machine_kexec_32.c
index 77854b192fef..7b45e8daad22 100644
--- a/arch/x86/kernel/machine_kexec_32.c
+++ b/arch/x86/kernel/machine_kexec_32.c
@@ -148,7 +148,7 @@ int machine_kexec_prepare(struct kimage *image)
{
int error;
- set_pages_x(image->control_code_page, 1);
+ set_memory_x((unsigned long)page_address(image->control_code_page), 1);
error = machine_kexec_alloc_page_tables(image);
if (error)
return error;
@@ -162,7 +162,7 @@ int machine_kexec_prepare(struct kimage *image)
*/
void machine_kexec_cleanup(struct kimage *image)
{
- set_pages_nx(image->control_code_page, 1);
+ set_memory_nx((unsigned long)page_address(image->control_code_page), 1);
machine_kexec_free_page_tables(image);
}
diff --git a/arch/x86/mm/init_32.c b/arch/x86/mm/init_32.c
index 4068abb9427f..930edeb41ec3 100644
--- a/arch/x86/mm/init_32.c
+++ b/arch/x86/mm/init_32.c
@@ -916,7 +916,7 @@ static void mark_nxdata_nx(void)
if (__supported_pte_mask & _PAGE_NX)
printk(KERN_INFO "NX-protecting the kernel data: %luk\n", size >> 10);
- set_pages_nx(virt_to_page(start), size >> PAGE_SHIFT);
+ set_memory_nx(start, size >> PAGE_SHIFT);
}
void mark_rodata_ro(void)
diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c
index 3be5d22c005a..0e39b344556d 100644
--- a/arch/x86/mm/pageattr.c
+++ b/arch/x86/mm/pageattr.c
@@ -2103,22 +2103,6 @@ int set_pages_array_wb(struct page **pages, int numpages)
}
EXPORT_SYMBOL(set_pages_array_wb);
-int set_pages_x(struct page *page, int numpages)
-{
- unsigned long addr = (unsigned long)page_address(page);
-
- return set_memory_x(addr, numpages);
-}
-EXPORT_SYMBOL(set_pages_x);
-
-int set_pages_nx(struct page *page, int numpages)
-{
- unsigned long addr = (unsigned long)page_address(page);
-
- return set_memory_nx(addr, numpages);
-}
-EXPORT_SYMBOL(set_pages_nx);
-
int set_pages_ro(struct page *page, int numpages)
{
unsigned long addr = (unsigned long)page_address(page);
--
2.20.1
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* [PATCH 4/5] x86: remove the unused set_memory_wt function
From: Christoph Hellwig @ 2019-08-26 7:55 UTC (permalink / raw)
To: x86
Cc: Peter Zijlstra, Dave Hansen, linux-arm-kernel, Andy Lutomirski,
linux-kernel
In-Reply-To: <20190826075558.8125-1-hch@lst.de>
Signed-off-by: Christoph Hellwig <hch@lst.de>
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
---
arch/x86/include/asm/set_memory.h | 1 -
arch/x86/mm/pageattr.c | 17 -----------------
2 files changed, 18 deletions(-)
diff --git a/arch/x86/include/asm/set_memory.h b/arch/x86/include/asm/set_memory.h
index fd549c3ebb17..2ee8e469dcf5 100644
--- a/arch/x86/include/asm/set_memory.h
+++ b/arch/x86/include/asm/set_memory.h
@@ -40,7 +40,6 @@ int _set_memory_wt(unsigned long addr, int numpages);
int _set_memory_wb(unsigned long addr, int numpages);
int set_memory_uc(unsigned long addr, int numpages);
int set_memory_wc(unsigned long addr, int numpages);
-int set_memory_wt(unsigned long addr, int numpages);
int set_memory_wb(unsigned long addr, int numpages);
int set_memory_np(unsigned long addr, int numpages);
int set_memory_4k(unsigned long addr, int numpages);
diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c
index 0e39b344556d..9acd568c4faa 100644
--- a/arch/x86/mm/pageattr.c
+++ b/arch/x86/mm/pageattr.c
@@ -1848,23 +1848,6 @@ int _set_memory_wt(unsigned long addr, int numpages)
cachemode2pgprot(_PAGE_CACHE_MODE_WT), 0);
}
-int set_memory_wt(unsigned long addr, int numpages)
-{
- int ret;
-
- ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
- _PAGE_CACHE_MODE_WT, NULL);
- if (ret)
- return ret;
-
- ret = _set_memory_wt(addr, numpages);
- if (ret)
- free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
-
- return ret;
-}
-EXPORT_SYMBOL_GPL(set_memory_wt);
-
int _set_memory_wb(unsigned long addr, int numpages)
{
/* WB cache mode is hard wired to all cache attribute bits being 0 */
--
2.20.1
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* [PATCH 5/5] x86: remove the unused set_pages_array_wt function
From: Christoph Hellwig @ 2019-08-26 7:55 UTC (permalink / raw)
To: x86
Cc: Peter Zijlstra, Dave Hansen, linux-arm-kernel, Andy Lutomirski,
linux-kernel
In-Reply-To: <20190826075558.8125-1-hch@lst.de>
Signed-off-by: Christoph Hellwig <hch@lst.de>
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
---
arch/x86/include/asm/set_memory.h | 1 -
arch/x86/mm/pageattr.c | 6 ------
2 files changed, 7 deletions(-)
diff --git a/arch/x86/include/asm/set_memory.h b/arch/x86/include/asm/set_memory.h
index 2ee8e469dcf5..cff5e07c1e19 100644
--- a/arch/x86/include/asm/set_memory.h
+++ b/arch/x86/include/asm/set_memory.h
@@ -49,7 +49,6 @@ int set_memory_np_noalias(unsigned long addr, int numpages);
int set_pages_array_uc(struct page **pages, int addrinarray);
int set_pages_array_wc(struct page **pages, int addrinarray);
-int set_pages_array_wt(struct page **pages, int addrinarray);
int set_pages_array_wb(struct page **pages, int addrinarray);
/*
diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c
index 9acd568c4faa..255c90d6aaa7 100644
--- a/arch/x86/mm/pageattr.c
+++ b/arch/x86/mm/pageattr.c
@@ -2047,12 +2047,6 @@ int set_pages_array_wc(struct page **pages, int numpages)
}
EXPORT_SYMBOL(set_pages_array_wc);
-int set_pages_array_wt(struct page **pages, int numpages)
-{
- return _set_pages_array(pages, numpages, _PAGE_CACHE_MODE_WT);
-}
-EXPORT_SYMBOL_GPL(set_pages_array_wt);
-
int set_pages_wb(struct page *page, int numpages)
{
unsigned long addr = (unsigned long)page_address(page);
--
2.20.1
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^ permalink raw reply related
* Re: [PATCH v2 2/5] soc: amlogic: Add support for Everything-Else power domains controller
From: Neil Armstrong @ 2019-08-26 8:10 UTC (permalink / raw)
To: Martin Blumenstingl
Cc: ulf.hansson, linux-pm, khilman, linux-kernel, linux-amlogic,
linux-arm-kernel
In-Reply-To: <CAFBinCBy-VxfSMPMR0cEDuNg8=UOUVvWfkDi2Tp=QhBZka93aQ@mail.gmail.com>
On 25/08/2019 23:10, Martin Blumenstingl wrote:
> Hi Neil,
>
> thank you for this update
> I haven't tried this on the 32-bit SoCs yet, but I am confident that I
> can make it work by "just" adding the SoC specific bits!
>
> On Fri, Aug 23, 2019 at 11:06 AM Neil Armstrong <narmstrong@baylibre.com> wrote:
> [...]
>> +/* AO Offsets */
>> +
>> +#define AO_RTI_GEN_PWR_SLEEP0 (0x3a << 2)
>> +#define AO_RTI_GEN_PWR_ISO0 (0x3b << 2)
>> +
>> +/* HHI Offsets */
>> +
>> +#define HHI_MEM_PD_REG0 (0x40 << 2)
>> +#define HHI_VPU_MEM_PD_REG0 (0x41 << 2)
>> +#define HHI_VPU_MEM_PD_REG1 (0x42 << 2)
>> +#define HHI_VPU_MEM_PD_REG3 (0x43 << 2)
>> +#define HHI_VPU_MEM_PD_REG4 (0x44 << 2)
>> +#define HHI_AUDIO_MEM_PD_REG0 (0x45 << 2)
>> +#define HHI_NANOQ_MEM_PD_REG0 (0x46 << 2)
>> +#define HHI_NANOQ_MEM_PD_REG1 (0x47 << 2)
>> +#define HHI_VPU_MEM_PD_REG2 (0x4d << 2)
> should we switch to the actual register offsets like we did in the
> clock drivers?
I find it simpler to refer to the numbers in the documentation...
>
> [...]
>> +static struct meson_ee_pwrc_top_domain sm1_pwrc_vpu = SM1_EE_PD(8);
> nit-pick: maybe name it sm1_pwrc_vpu_hdmi as the datasheet states that
> it's for "VPU/HDMI"
Maybe
>
> [...]
>> +#define VPU_HHI_MEMPD(__reg) \
>> + { __reg, BIT(8) }, \
>> + { __reg, BIT(9) }, \
>> + { __reg, BIT(10) }, \
>> + { __reg, BIT(11) }, \
>> + { __reg, BIT(12) }, \
>> + { __reg, BIT(13) }, \
>> + { __reg, BIT(14) }, \
>> + { __reg, BIT(15) }
> the Amlogic implementation from buildroot-openlinux-A113-201901 (the
> latest one I have)
> kernel/aml-4.9/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/hdmi_tx_hw.c
> uses:
> hd_set_reg_bits(P_HHI_MEM_PD_REG0, 0, 8, 8)
> that basically translates to: GENMASK(15, 8) (which means we could
> drop this macro)
>
> the datasheet also states: 15~8 [...] HDMI memory PD (as a single
> 8-bit wide register)
Yep, but the actual code setting the VPU power domain is in u-boot :
drivers/vpu/aml_vpu_power_init.c:
108 for (i = 8; i < 16; i++) {
109 vpu_hiu_setb(HHI_MEM_PD_REG0, 0, i, 1);
110 udelay(5);
111 }
the linux code is like never used here, my preference goes to the u-boot code
implementation.
>
> [...]
>> +static struct meson_ee_pwrc_domain_desc g12a_pwrc_domains[] = {
>> + [PWRC_G12A_VPU_ID] = VPU_PD("VPU", &g12a_pwrc_vpu, g12a_pwrc_mem_vpu,
>> + pwrc_ee_get_power, 11, 2),
>> + [PWRC_G12A_ETH_ID] = MEM_PD("ETH", g12a_pwrc_mem_eth),
>> +};
>> +
>> +static struct meson_ee_pwrc_domain_desc sm1_pwrc_domains[] = {
>> + [PWRC_SM1_VPU_ID] = VPU_PD("VPU", &sm1_pwrc_vpu, sm1_pwrc_mem_vpu,
>> + pwrc_ee_get_power, 11, 2),
>> + [PWRC_SM1_NNA_ID] = TOP_PD("NNA", &sm1_pwrc_nna, sm1_pwrc_mem_nna,
>> + pwrc_ee_get_power),
>> + [PWRC_SM1_USB_ID] = TOP_PD("USB", &sm1_pwrc_usb, sm1_pwrc_mem_usb,
>> + pwrc_ee_get_power),
>> + [PWRC_SM1_PCIE_ID] = TOP_PD("PCI", &sm1_pwrc_pci, sm1_pwrc_mem_pcie,
>> + pwrc_ee_get_power),
>> + [PWRC_SM1_GE2D_ID] = TOP_PD("GE2D", &sm1_pwrc_ge2d, sm1_pwrc_mem_ge2d,
>> + pwrc_ee_get_power),
>> + [PWRC_SM1_AUDIO_ID] = MEM_PD("AUDIO", sm1_pwrc_mem_audio),
>> + [PWRC_SM1_ETH_ID] = MEM_PD("ETH", g12a_pwrc_mem_eth),
>> +};
> my impression: I find this hard to read as it merges the TOP and
> Memory PD domains from above, adding some seemingly random "11, 2" for
> the VPU PD as well as pwrc_ee_get_power for some of the power domains
> personally I like the way we describe clk_regmap because it's easy to
> read (even though it adds a bit of boilerplate). I'm not sure if we
> can make it work here, but this (not compile tested) is what I have in
> mind (I chose two random power domains):
> [PWRC_SM1_VPU_ID] = {
> .name = "VPU",
> .top_pd = SM1_EE_PD(8),
> .mem_pds = {
> VPU_MEMPD(HHI_VPU_MEM_PD_REG0),
> VPU_MEMPD(HHI_VPU_MEM_PD_REG1),
> VPU_MEMPD(HHI_VPU_MEM_PD_REG2),
> VPU_MEMPD(HHI_VPU_MEM_PD_REG3),
> { HHI_VPU_MEM_PD_REG4, GENMASK(1, 0) },
> { HHI_VPU_MEM_PD_REG4, GENMASK(3, 2) },
> { HHI_VPU_MEM_PD_REG4, GENMASK(5, 4) },
> { HHI_VPU_MEM_PD_REG4, GENMASK(7, 6) },
> { HHI_MEM_PD_REG0, GENMASK(15, 8) },
> },
> .num_mem_pds = 9,
> .reset_names_count = 11,
> .clk_names_count = 2,
> },
> [PWRC_SM1_ETH_ID] = {
> .name = "ETH",
> .mem_pds = { HHI_MEM_PD_REG0, GENMASK(3, 2) },
> .num_mem_pds = 1,
> },
> ...
>
> I'd like to get Kevin's feedback on this
> what you have right now is probably good enough for the initial
> version of this driver. I'm bringing this discussion up because we
> will add support for more SoCs to this driver (we migrate GX over to
> it and I want to add 32-bit SoC support, which probably means at least
> Meson8 - assuming they kept the power domains identical between
> Meson8/8b/8m2).
I find it more compact, but nothing is set in stone, you can refactor this as
will when adding meson8 support, no problems here.
>
> [...]
>> +struct meson_ee_pwrc_domain {
>> + struct generic_pm_domain base;
>> + bool enabled;
>> + struct meson_ee_pwrc *pwrc;
>> + struct meson_ee_pwrc_domain_desc desc;
>> + struct clk_bulk_data *clks;
>> + int num_clks;
>> + struct reset_control *rstc;
>> + int num_rstc;
>> +};
>> +
>> +struct meson_ee_pwrc {
>> + struct regmap *regmap_ao;
>> + struct regmap *regmap_hhi;
>> + struct meson_ee_pwrc_domain *domains;
>> + struct genpd_onecell_data xlate;
>> +};
> (my impressions on this: I was surprised to find more structs down
> here, I expected them to be together with the other structs further
> up)
These are the "live" structures, opposed to the static structures defining the
data and these are allocated and filled a probe time.
I dislike changing static global data at runtime, this is why I clearly separated both.
>
>> +static bool pwrc_ee_get_power(struct meson_ee_pwrc_domain *pwrc_domain)
>> +{
>> + u32 reg;
>> +
>> + regmap_read(pwrc_domain->pwrc->regmap_ao,
>> + pwrc_domain->desc.top_pd->sleep_reg, ®);
>> +
>> + return (reg & pwrc_domain->desc.top_pd->sleep_mask);
> should this also check for top_pd->iso_* as well as mem_pd->*?
> if the top_pd part was optional we could even use the get_power
> callback for *all* power domains in this driver (right now audio and
> Ethernet don't have any get_power callback)
We could, but how should we handle if one unexpected bit is set ? No idea...
>
>> +}
>> +
>> +static int meson_ee_pwrc_off(struct generic_pm_domain *domain)
>> +{
>> + struct meson_ee_pwrc_domain *pwrc_domain =
>> + container_of(domain, struct meson_ee_pwrc_domain, base);
>> + int i;
>> +
>> + if (pwrc_domain->desc.top_pd)
>> + regmap_update_bits(pwrc_domain->pwrc->regmap_ao,
>> + pwrc_domain->desc.top_pd->sleep_reg,
>> + pwrc_domain->desc.top_pd->sleep_mask,
>> + pwrc_domain->desc.top_pd->sleep_mask);
>> + udelay(20);
> all four udelay(20) occurrences should probably be usleep_range(20,
> 100); (or some other max value), see [0]
Ok
>
> [...]
>> + /*
>> + * TOFIX: This is a special case for the VPU power domain, which can
>> + * be enabled previously by the bootloader. In this case the VPU
> nit-pick: the indentation seems to be off here
Exact
>
> [...]
>> +static int meson_ee_pwrc_probe(struct platform_device *pdev)
>> +{
>> + const struct meson_ee_pwrc_domain_data *match;
>> + struct regmap *regmap_ao, *regmap_hhi;
>> + struct meson_ee_pwrc *pwrc;
>> + int i, ret;
>> +
>> + match = of_device_get_match_data(&pdev->dev);
>> + if (!match) {
>> + dev_err(&pdev->dev, "failed to get match data\n");
>> + return -ENODEV;
>> + }
>> +
>> + pwrc = devm_kzalloc(&pdev->dev, sizeof(*pwrc), GFP_KERNEL);
>> + if (!pwrc)
>> + return -ENOMEM;
>> +
>> + pwrc->xlate.domains = devm_kcalloc(&pdev->dev, match->count,
>> + sizeof(*pwrc->xlate.domains),
>> + GFP_KERNEL);
>> + if (!pwrc->xlate.domains)
>> + return -ENOMEM;
>> +
>> + pwrc->domains = devm_kcalloc(&pdev->dev, match->count,
>> + sizeof(*pwrc->domains), GFP_KERNEL);
>> + if (!pwrc->domains)
>> + return -ENOMEM;
>> +
>> + pwrc->xlate.num_domains = match->count;
>> +
>> + regmap_hhi = syscon_node_to_regmap(of_get_parent(pdev->dev.of_node));
>> + if (IS_ERR(regmap_hhi)) {
>> + dev_err(&pdev->dev, "failed to get HHI regmap\n");
>> + return PTR_ERR(regmap_hhi);
>> + }
>> +
>> + regmap_ao = syscon_regmap_lookup_by_phandle(pdev->dev.of_node,
>> + "amlogic,ao-sysctrl");
>> + if (IS_ERR(regmap_ao)) {
>> + dev_err(&pdev->dev, "failed to get AO regmap\n");
>> + return PTR_ERR(regmap_ao);
>> + }
>> +
>> + pwrc->regmap_ao = regmap_ao;
>> + pwrc->regmap_hhi = regmap_hhi;
>> +
>> + platform_set_drvdata(pdev, pwrc);
>> +
>> + for (i = 0 ; i < match->count ; ++i) {
>> + struct meson_ee_pwrc_domain *dom = &pwrc->domains[i];
>> +
>> + memcpy(&dom->desc, &match->domains[i], sizeof(dom->desc));
>> +
>> + ret = meson_ee_pwrc_init_domain(pdev, pwrc, dom);
>> + if (ret)
>> + return ret;
>> +
>> + pwrc->xlate.domains[i] = &dom->base;
>> + }
>> +
>> + of_genpd_add_provider_onecell(pdev->dev.of_node, &pwrc->xlate);
> return of_genpd_add_provider_onecell(...) to propagate errors (if any)
Indeed, thanks.
>
> bonus question: what about the video decoder power domains?
> here is an example from vdec_1_start
> (drivers/staging/media/meson/vdec/vdec_1.c):
> /* Enable power for VDEC_1 */
> regmap_update_bits(core->regmap_ao, AO_RTI_GEN_PWR_SLEEP0,
> GEN_PWR_VDEC_1, 0);
> usleep_range(10, 20);
> [...]
> /* enable VDEC Memories */
> amvdec_write_dos(core, DOS_MEM_PD_VDEC, 0);
> /* Remove VDEC1 Isolation */
> regmap_write(core->regmap_ao, AO_RTI_GEN_PWR_ISO0, 0);
>
> (my point here is that it mixes video decoder "DOS" registers with
> AO_RTI_GEN_PWR registers)
> do we also want to add support for these "DOS" power domains to the
> meson-ee-pwrc driver?
> what about the AO_RTI_GEN_PWR part then - should we keep management
> for the video decoder power domain bits in AO_RTI_GEN_PWR as part of
> the video decoder driver?
I left the decoders power domains aside so we can discuss it later on,
we should expose multiple power domains, but the driver would need to
be changed to support multiple power domains. But will loose the ability
to enable/disable each domain at will unless it created a sub-device for
each decoder and attaches the domain to to each device and use runtime pm.
It's simpler to discuss it later on !
Thanks for the review,
Neil
>
>
> Martin
>
>
> [0] https://www.kernel.org/doc/Documentation/timers/timers-howto.rst
>
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^ permalink raw reply
* Re: [PATCH v2 1/6] pwm: atmel: Add a hint where to find hardware documentation
From: Nicolas.Ferre @ 2019-08-26 8:19 UTC (permalink / raw)
To: uwe, Claudiu.Beznea, thierry.reding
Cc: linux-pwm, alexandre.belloni, Ludovic.Desroches, linux-arm-kernel
In-Reply-To: <20190824001041.11007-2-uwe@kleine-koenig.org>
On 24/08/2019 at 02:10, Uwe Kleine-König wrote:
> External E-Mail
>
>
> Most Microchip (formerly Atmel) chips have publicly available manuals.
> A comprehensive list is already contained in the documentation folder.
> Reference this list in the header of the driver to allow reviewers to
> find the relevant manuals.
>
> Signed-off-by: Uwe Kleine-König <uwe@kleine-koenig.org>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Thanks Uwe!
Best regards,
Nicolas
> ---
> Changes since (implicit) v1 sent with Message-Id:
> 20190815214133.11134-1-uwe@kleine-koenig.org:
>
> - Only reference Documentation/arm/microchip.rst instead of starting
> another list of links
>
> drivers/pwm/pwm-atmel.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/drivers/pwm/pwm-atmel.c b/drivers/pwm/pwm-atmel.c
> index e5e1eaf372fa..a61a30fa8b7e 100644
> --- a/drivers/pwm/pwm-atmel.c
> +++ b/drivers/pwm/pwm-atmel.c
> @@ -4,6 +4,9 @@
> *
> * Copyright (C) 2013 Atmel Corporation
> * Bo Shen <voice.shen@atmel.com>
> + *
> + * Links to reference manuals for the supported PWM chips can be found in
> + * Documentation/arm/microchip.rst.
> */
>
> #include <linux/clk.h>
>
--
Nicolas Ferre
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^ permalink raw reply
* Re: [RESEND PATCHv4 1/1] drivers/amba: add reset control to amba bus probe
From: Philipp Zabel @ 2019-08-26 8:57 UTC (permalink / raw)
To: Dinh Nguyen, Linus Walleij
Cc: open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
Daniel Thompson, Tony Luck, Manivannan Sadhasivam, Kees Cook,
Rob Herring, Anton Vorontsov, Russell King,
linux-kernel@vger.kernel.org, Colin Cross, Frank Rowand,
Linux ARM
In-Reply-To: <e7e986a2-762e-674b-608b-5ee5b013935b@kernel.org>
Hi Dinh, Linus,
On Fri, 2019-08-23 at 10:42 -0500, Dinh Nguyen wrote:
>
> On 8/23/19 4:19 AM, Linus Walleij wrote:
> > On Tue, Aug 20, 2019 at 4:58 PM Dinh Nguyen <dinguyen@kernel.org> wrote:
> >
> > > @@ -401,6 +402,26 @@ static int amba_device_try_add(struct amba_device *dev, struct resource *parent)
> > > ret = amba_get_enable_pclk(dev);
> > > if (ret == 0) {
> > > u32 pid, cid;
> > > + int count;
> > > + struct reset_control *rstc;
> > > +
> > > + /*
> > > + * Find reset control(s) of the amba bus and de-assert them.
> > > + */
> > > + count = reset_control_get_count(&dev->dev);
The reset_control_get_count() inline stub returns -ENOENT, so the
compiler can throw away the complete loop.
> > > + while (count > 0) {
> > > + rstc = of_reset_control_get_shared_by_index(dev->dev.of_node, count - 1);
Since resets are looked up with of_reset_control_get, I'd use
of_reset_control_get_count() above for consistency. But see below:
> > > + if (IS_ERR(rstc)) {
> > > + if (PTR_ERR(rstc) == -EPROBE_DEFER)
> > > + ret = -EPROBE_DEFER;
> > > + else
> > > + dev_err(&dev->dev, "Can't get amba reset!\n");
> > > + break;
> > > + }
> > > + reset_control_deassert(rstc);
> > > + reset_control_put(rstc);
> > > + count--;
> > > + }
It looks like the order of deassertions is irrelevant. If so,
You can use of_reset_control_array_get() to simplify this:
+ rstc = of_reset_control_array_get_optional_shared(dev->dev.of_node);
+ if (IS_ERR(rstc)) {
+ if (PTR_ERR(rstc) != -EPROBE_DEFER)
+ dev_err(&dev->dev, "Can't get amba reset!\n");
+ return PTR_ERR(rstc);
+ }
+ reset_control_deassert(rstc);
+ reset_control_put(rstc);
> > I'm not normally a footprint person, but the looks of the stubs in
> > <linux/reset.h> makes me suspicious whether this will have zero impact
> > in size on platforms without reset controllers.
> >
> > Can you just ls -al on the kernel without CONFIG_RESET_CONTROLLER
> > before and after this patch and ascertain that it has zero footprint effect?
>
> Thanks for the review. I checked it, and indeed, it does have a zero
> footprint effect.
>
> >
> > If it doesn't I'd sure like to break this into its own function and
> > stick a if (!IS_ENABLED(CONFIG_RESET_CONTROLLER)) return 0;
> > in there to make sure the compiler drops it.
> >
> > Also it'd be nice to get Philipp's ACK on the semantics, though they
> > look correct to me.
regards
Philipp
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^ permalink raw reply
* Re: [PATCH v18 15/15] selftests, arm64: add a selftest for passing tagged pointers to kernel
From: Amit Kachhap @ 2019-08-26 9:09 UTC (permalink / raw)
To: Cristian Marussi, Andrey Konovalov
Cc: Mark Rutland, kvm@vger.kernel.org, Christian Koenig,
Szabolcs Nagy, Catalin Marinas, Will Deacon,
dri-devel@lists.freedesktop.org, Linux Memory Management List,
Khalid Aziz, Lee Smith, open list:KERNEL SELFTEST FRAMEWORK,
Vincenzo Frascino, Jacob Bramley, Leon Romanovsky,
linux-rdma@vger.kernel.org, amd-gfx@lists.freedesktop.org,
Christoph Hellwig, Jason Gunthorpe, Linux ARM, Dave P Martin,
Evgeniy Stepanov, linux-media@vger.kernel.org, Kees Cook,
Ruben Ayrapetyan, Kevin Brodsky, Alex Williamson,
Mauro Carvalho Chehab, Dmitry Vyukov, Kostya Serebryany,
Greg Kroah-Hartman, Felix Kuehling, LKML, Jens Wiklander,
Ramana Radhakrishnan, Alexander Deucher, Andrew Morton, enh,
Robin Murphy, Yishai Hadas, Luc Van Oostenryck
In-Reply-To: <d6bc5c4b-68b5-0a58-0f52-8bce20986dcf@arm.com>
Hi,
On 8/23/19 11:19 PM, Cristian Marussi wrote:
>
> Hi
>
> On 23/08/2019 18:16, Andrey Konovalov wrote:
>> On Fri, Aug 23, 2019 at 3:56 PM Cristian Marussi
>> <cristian.marussi@arm.com> wrote:
>>>
>>> Hi Andrey
>>>
>>> On 24/06/2019 15:33, Andrey Konovalov wrote:
>>>> This patch is a part of a series that extends kernel ABI to allow to pass
>>>> tagged user pointers (with the top byte set to something else other than
>>>> 0x00) as syscall arguments.
>>>>
>>>> This patch adds a simple test, that calls the uname syscall with a
>>>> tagged user pointer as an argument. Without the kernel accepting tagged
>>>> user pointers the test fails with EFAULT.
>>>>
>>>> Signed-off-by: Andrey Konovalov <andreyknvl@google.com>
>>>> ---
>>>> tools/testing/selftests/arm64/.gitignore | 1 +
>>>> tools/testing/selftests/arm64/Makefile | 11 +++++++
>>>> .../testing/selftests/arm64/run_tags_test.sh | 12 ++++++++
>>>> tools/testing/selftests/arm64/tags_test.c | 29 +++++++++++++++++++
>>>> 4 files changed, 53 insertions(+)
>>>> create mode 100644 tools/testing/selftests/arm64/.gitignore
>>>> create mode 100644 tools/testing/selftests/arm64/Makefile
>>>> create mode 100755 tools/testing/selftests/arm64/run_tags_test.sh
>>>> create mode 100644 tools/testing/selftests/arm64/tags_test.c
>>>
>>> After building a fresh Kernel from arm64/for-next-core from scratch at:
>>>
>>> commit 239ab658bea3b387424501e7c416640d6752dc0c
>>> Merge: 6bfa3134bd3a 42d038c4fb00 1243cb6a676f d55c5f28afaf d06fa5a118f1 34b5560db40d
>>> Author: Will Deacon <will@kernel.org>
>>> Date: Thu Aug 22 18:23:53 2019 +0100
>>>
>>> Merge branches 'for-next/error-injection', 'for-next/tbi', 'for-next/psci-cpuidle', 'for-next/cpu-topology' and 'for-next/52-bit-kva' into for-next/core
>>>
>>>
>>> KSFT arm64 tests build is broken for me, both setting or not KBUILD_OUTPUT=
>>>
>>> 13:30 $ make TARGETS=arm64 kselftest-clean
>>> make[1]: Entering directory '/home/crimar01/ARM/dev/src/pdsw/out_linux'
>>> rm -f -r /home/crimar01/ARM/dev/src/pdsw/out_linux//kselftest/arm64/tags_test
>>> make[1]: Leaving directory '/home/crimar01/ARM/dev/src/pdsw/out_linux'
>>>
>>> ✔ ~/ARM/dev/src/pdsw/linux [arm64_for_next_core|…8⚑ 23]
>>>
>>> 13:30 $ make TARGETS=arm64 kselftest
>>> make[1]: Entering directory '/home/crimar01/ARM/dev/src/pdsw/out_linux'
>>> arch/arm64/Makefile:56: CROSS_COMPILE_COMPAT not defined or empty, the compat vDSO will not be built
>>> make --no-builtin-rules INSTALL_HDR_PATH=$BUILD/usr \
>>> ARCH=arm64 -C ../../.. headers_install
>>> HOSTCC scripts/basic/fixdep
>>> HOSTCC scripts/unifdef
>>> ...
>>> ...
>>> HDRINST usr/include/asm/msgbuf.h
>>> HDRINST usr/include/asm/shmbuf.h
>>> INSTALL /home/crimar01/ARM/dev/src/pdsw/out_linux//kselftest/usr/include
>>> /opt/toolchains/gcc-arm-8.3-2019.03-x86_64-aarch64-linux-gnu/bin/aarch64-linux-gnu-gcc tags_test.c -o /home/crimar01/ARM/dev/src/pdsw/out_linux//kselftest/arm64/tags_test
>>> tags_test.c: In function ‘main’:
>>> tags_test.c:21:12: error: ‘PR_SET_TAGGED_ADDR_CTRL’ undeclared (first use in this function); did you mean ‘PR_GET_TID_ADDRESS’?
>>> if (prctl(PR_SET_TAGGED_ADDR_CTRL, PR_TAGGED_ADDR_ENABLE, 0, 0, 0) == 0)
>>> ^~~~~~~~~~~~~~~~~~~~~~~
>>> PR_GET_TID_ADDRESS
>>> tags_test.c:21:12: note: each undeclared identifier is reported only once for each function it appears in
>>> tags_test.c:21:37: error: ‘PR_TAGGED_ADDR_ENABLE’ undeclared (first use in this function); did you mean ‘PR_GET_DUMPABLE’?
>>> if (prctl(PR_SET_TAGGED_ADDR_CTRL, PR_TAGGED_ADDR_ENABLE, 0, 0, 0) == 0)
>>> ^~~~~~~~~~~~~~~~~~~~~
>>> PR_GET_DUMPABLE
>>> ../lib.mk:138: recipe for target '/home/crimar01/ARM/dev/src/pdsw/out_linux//kselftest/arm64/tags_test' failed
>>> make[3]: *** [/home/crimar01/ARM/dev/src/pdsw/out_linux//kselftest/arm64/tags_test] Error 1
>>> Makefile:136: recipe for target 'all' failed
>>> make[2]: *** [all] Error 2
>>> /home/crimar01/ARM/dev/src/pdsw/linux/Makefile:1237: recipe for target 'kselftest' failed
>>> make[1]: *** [kselftest] Error 2
>>> make[1]: Leaving directory '/home/crimar01/ARM/dev/src/pdsw/out_linux'
>>> Makefile:179: recipe for target 'sub-make' failed
>>> make: *** [sub-make] Error 2
>>>
>>> Despite seeing KSFT installing Kernel Headers, they cannot be found.
>>>
>>> Fixing this patch like this make it work for me:
>>>
>>> diff --git a/tools/testing/selftests/arm64/Makefile b/tools/testing/selftests/arm64/Makefile
>>> index a61b2e743e99..f9f79fb272f0 100644
>>> --- a/tools/testing/selftests/arm64/Makefile
>>> +++ b/tools/testing/selftests/arm64/Makefile
>>> @@ -4,6 +4,7 @@
>>> ARCH ?= $(shell uname -m 2>/dev/null || echo not)
>>>
>>> ifneq (,$(filter $(ARCH),aarch64 arm64))
>>> +CFLAGS += -I../../../../usr/include/
>>> TEST_GEN_PROGS := tags_test
>>> TEST_PROGS := run_tags_test.sh
>>> endif
>>>
>>> but is not really a proper fix since it does NOT account for case in which you have
>>> installed the Kernel Headers in a non standard location like when you use KBUILD_OUTPUT.
>>>
>>> Am I missing something ?
>>
>> Hm, PR_SET_TAGGED_ADDR_CTRL is defined in include/uapi/linux/prctl.h,
>> and the test has #include <sys/prctl.h> so as long as you've updated
>> your kernel headers this should work.
>>
>> (I'm OOO next week, I'll see if I can reproduce this once I'm back).
>
> Ok. Thanks for the reply.
>
> I think I've got it in my local tree having cloned arm64/for-next-core:
>
> 18:32 $ egrep -A 10 PR_SET_TAG ./include/uapi/linux/prctl.h
> #define PR_SET_TAGGED_ADDR_CTRL 55
> #define PR_GET_TAGGED_ADDR_CTRL 56
> # define PR_TAGGED_ADDR_ENABLE (1UL << 0)
>
> #endif /* _LINUX_PRCTL_H */
>
> and Kernel header are locally installed in my kernel src dir (by KSFT indeed)
>
> 18:34 $ egrep -RA 10 PR_SET_TAG usr/include/
> usr/include/linux/prctl.h:#define PR_SET_TAGGED_ADDR_CTRL 55
> usr/include/linux/prctl.h-#define PR_GET_TAGGED_ADDR_CTRL 56
> usr/include/linux/prctl.h-# define PR_TAGGED_ADDR_ENABLE (1UL << 0)
> usr/include/linux/prctl.h-
> usr/include/linux/prctl.h-#endif /* _LINUX_PRCTL_H */
>
> but how are they supposed to be found if nor the test Makefile
> neither the KSFT Makefile who installs them pass any -I options to the
> compiler ?
> I suppose <sys/prctl.h> tries to include arch specific headers from the regular system path,
> but when you are cross-compiling ?
I guess for cross-compiling it picks from cross_compiler path include
headers path without explicitly displaying it in compilation logs.
>
> 18:34 $ make TARGETS=arm64 kselftest
> make[1]: Entering directory '/home/crimar01/ARM/dev/src/pdsw/out_linux'
> arch/arm64/Makefile:56: CROSS_COMPILE_COMPAT not defined or empty, the compat vDSO will not be built
> make --no-builtin-rules INSTALL_HDR_PATH=$BUILD/usr \
> ARCH=arm64 -C ../../.. headers_install
> INSTALL /home/crimar01/ARM/dev/src/pdsw/out_linux/kselftest/usr/include
> /opt/toolchains/gcc-arm-8.3-2019.03-x86_64-aarch64-linux-gnu/bin/aarch64-linux-gnu-gcc -Wall -O2 -g tags_test.c -o /home/crimar01/ARM/dev/src/pdsw/out_linux/kselftest/arm64/tags/tags_test
> tags_test.c: In function ‘main’:
> tags_test.c:20:12: error: ‘PR_SET_TAGGED_ADDR_CTRL’ undeclared (first use in this function); did you mean ‘PR_GET_TID_ADDRESS’?
> if (prctl(PR_SET_TAGGED_ADDR_CTRL, PR_TAGGED_ADDR_ENABLE, 0, 0, 0) == 0)
> ^~~~~~~~~~~~~~~~~~~~~~~
> PR_GET_TID_ADDRESS
> tags_test.c:20:12: note: each undeclared identifier is reported only once for each function it appears in
> tags_test.c:20:37: error: ‘PR_TAGGED_ADDR_ENABLE’ undeclared (first use in this function); did you mean ‘PR_GET_DUMPABLE’?
> if (prctl(PR_SET_TAGGED_ADDR_CTRL, PR_TAGGED_ADDR_ENABLE, 0, 0, 0) == 0)
> ^~~~~~~~~~~~~~~~~~~~~
> PR_GET_DUMPABLE
> ../../lib.mk:138: recipe for target '/home/crimar01/ARM/dev/src/pdsw/out_linux/kselftest/arm64/tags/tags_test' failed
> make[4]: *** [/home/crimar01/ARM/dev/src/pdsw/out_linux/kselftest/arm64/tags/tags_test] Error 1
> Makefile:19: recipe for target 'all' failed
> make[3]: *** [all] Error 2
> Makefile:137: recipe for target 'all' failed
> make[2]: *** [all] Error 2
> /home/crimar01/ARM/dev/src/pdsw/linux/Makefile:1236: recipe for target 'kselftest' failed
> make[1]: *** [kselftest] Error 2
> make[1]: Leaving directory '/home/crimar01/ARM/dev/src/pdsw/out_linux'
> Makefile:179: recipe for target 'sub-make' failed
> make: *** [sub-make] Error 2
>
>
> In fact many KSFT testcases seems to brutally add default headers path:
>
> tools/testing/selftests/memfd/Makefile:CFLAGS += -I../../../../include/uapi/
> tools/testing/selftests/memfd/Makefile:CFLAGS += -I../../../../include/
> tools/testing/selftests/memfd/Makefile:CFLAGS += -I../../../../usr/include/
> tools/testing/selftests/net/Makefile:CFLAGS += -I../../../../usr/include/
> tools/testing/selftests/membarrier/Makefile:CFLAGS += -g -I../../../../usr/include/
Agree with Cristian that including like this is better as it allows
freedom from toolchain with latest kernel headers. Anyway there are many
places where "/sys/prctl.h" is used.
//Amit
> ...
>
> Cheers
>
> Cristian
>>
>>
>>
>>>
>>> Thanks
>>>
>>> Cristian
>>>
>>>>
>>>> diff --git a/tools/testing/selftests/arm64/.gitignore b/tools/testing/selftests/arm64/.gitignore
>>>> new file mode 100644
>>>> index 000000000000..e8fae8d61ed6
>>>> --- /dev/null
>>>> +++ b/tools/testing/selftests/arm64/.gitignore
>>>> @@ -0,0 +1 @@
>>>> +tags_test
>>>> diff --git a/tools/testing/selftests/arm64/Makefile b/tools/testing/selftests/arm64/Makefile
>>>> new file mode 100644
>>>> index 000000000000..a61b2e743e99
>>>> --- /dev/null
>>>> +++ b/tools/testing/selftests/arm64/Makefile
>>>> @@ -0,0 +1,11 @@
>>>> +# SPDX-License-Identifier: GPL-2.0
>>>> +
>>>> +# ARCH can be overridden by the user for cross compiling
>>>> +ARCH ?= $(shell uname -m 2>/dev/null || echo not)
>>>> +
>>>> +ifneq (,$(filter $(ARCH),aarch64 arm64))
>>>> +TEST_GEN_PROGS := tags_test
>>>> +TEST_PROGS := run_tags_test.sh
>>>> +endif
>>>> +
>>>> +include ../lib.mk
>>>> diff --git a/tools/testing/selftests/arm64/run_tags_test.sh b/tools/testing/selftests/arm64/run_tags_test.sh
>>>> new file mode 100755
>>>> index 000000000000..745f11379930
>>>> --- /dev/null
>>>> +++ b/tools/testing/selftests/arm64/run_tags_test.sh
>>>> @@ -0,0 +1,12 @@
>>>> +#!/bin/sh
>>>> +# SPDX-License-Identifier: GPL-2.0
>>>> +
>>>> +echo "--------------------"
>>>> +echo "running tags test"
>>>> +echo "--------------------"
>>>> +./tags_test
>>>> +if [ $? -ne 0 ]; then
>>>> + echo "[FAIL]"
>>>> +else
>>>> + echo "[PASS]"
>>>> +fi
>>>> diff --git a/tools/testing/selftests/arm64/tags_test.c b/tools/testing/selftests/arm64/tags_test.c
>>>> new file mode 100644
>>>> index 000000000000..22a1b266e373
>>>> --- /dev/null
>>>> +++ b/tools/testing/selftests/arm64/tags_test.c
>>>> @@ -0,0 +1,29 @@
>>>> +// SPDX-License-Identifier: GPL-2.0
>>>> +
>>>> +#include <stdio.h>
>>>> +#include <stdlib.h>
>>>> +#include <unistd.h>
>>>> +#include <stdint.h>
>>>> +#include <sys/prctl.h>
>>>> +#include <sys/utsname.h>
>>>> +
>>>> +#define SHIFT_TAG(tag) ((uint64_t)(tag) << 56)
>>>> +#define SET_TAG(ptr, tag) (((uint64_t)(ptr) & ~SHIFT_TAG(0xff)) | \
>>>> + SHIFT_TAG(tag))
>>>> +
>>>> +int main(void)
>>>> +{
>>>> + static int tbi_enabled = 0;
>>>> + struct utsname *ptr, *tagged_ptr;
>>>> + int err;
>>>> +
>>>> + if (prctl(PR_SET_TAGGED_ADDR_CTRL, PR_TAGGED_ADDR_ENABLE, 0, 0, 0) == 0)
>>>> + tbi_enabled = 1;
>>>> + ptr = (struct utsname *)malloc(sizeof(*ptr));
>>>> + if (tbi_enabled)
>>>> + tagged_ptr = (struct utsname *)SET_TAG(ptr, 0x42);
>>>> + err = uname(tagged_ptr);
>>>> + free(ptr);
>>>> +
>>>> + return err;
>>>> +}
>>>>
>>>
>
>
> _______________________________________________
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> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>
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* Re: [PATCH 1/2] kbuild: change *FLAGS_<basetarget>.o to take the path relative to $(obj)
From: Marc Zyngier @ 2019-08-26 9:17 UTC (permalink / raw)
To: Masahiro Yamada
Cc: x86, Michal Marek, linux-kbuild, Suzuki K Poulose, Russell King,
linux-kernel, Ingo Molnar, James Morse, linux-arm-kernel,
Andy Lutomirski, H. Peter Anvin, Borislav Petkov, Thomas Gleixner,
kvmarm, Julien Thierry
In-Reply-To: <20190825172833.5708-1-yamada.masahiro@socionext.com>
On Sun, 25 Aug 2019 18:28:32 +0100,
Masahiro Yamada <yamada.masahiro@socionext.com> wrote:
>
> Kbuild provides per-file compiler flag addition/removal:
>
> CFLAGS_<basetarget>.o
> CFLAGS_REMOVE_<basetarget>.o
> AFLAGS_<basetarget>.o
> AFLAGS_REMOVE_<basetarget>.o
> CPPFLAGS_<basetarget>
> HOSTCFLAGS_<basetarget>.o
> HOSTCXXFLAGS_<basetarget>.o
>
> The <basetarget> is the filename of the target without its suffix.
>
> This syntax comes into a trouble when two files with the same name
> appear in one Makefile, for example:
>
> obj-y += foo.o
> obj-y += dir/foo.o
> CFLAGS_foo.o := <some-flags>
>
> Here, the <some-flags> applies to both foo.o and dir/foo.o
>
> The real world problem is:
>
> scripts/kconfig/util.c
> scripts/kconfig/lxdialog/util.c
>
> Both files are compiled into scripts/kconfig/mconf, but only the
> latter should be given with additional flags for ncurses.
>
> It is more sensible to use the relative path to the Makefile, like this:
>
> obj-y += foo.o
> CFLAGS_foo.o := <some-flags>
> obj-y += dir/foo.o
> CFLAGS_dir/foo.o := <other-flags>
>
> The $* variable is replaced with the stem ('%') part in a pattern rule.
> In other words, this only works for pattern rules.
>
> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
> ---
>
> arch/arm/kvm/Makefile | 5 +++--
> arch/x86/entry/vdso/Makefile | 3 ++-
> scripts/Makefile.host | 30 +++++++++++++++---------------
> scripts/Makefile.lib | 10 +++++-----
> scripts/kconfig/Makefile | 8 ++++----
> 5 files changed, 29 insertions(+), 27 deletions(-)
For the KVM/arm part:
Acked-by: Marc Zyngier <maz@kernel.org>
Thanks,
M.
--
Jazz is not dead, it just smells funny.
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* Re: [Xen-devel] [PATCH 01/11] xen/arm: use dma-noncoherent.h calls for xen-swiotlb cache maintainance
From: Christoph Hellwig @ 2019-08-26 9:20 UTC (permalink / raw)
To: Julien Grall
Cc: Stefano Stabellini, Konrad Rzeszutek Wilk, x86, linux-kernel,
iommu, xen-devel, Christoph Hellwig, linux-arm-kernel
In-Reply-To: <65248838-f273-6097-22f4-e5809078ddba@arm.com>
On Mon, Aug 19, 2019 at 12:45:17PM +0100, Julien Grall wrote:
> On 8/16/19 2:00 PM, Christoph Hellwig wrote:
>> +static inline void xen_dma_map_page(struct device *hwdev, struct page *page,
>> + dma_addr_t dev_addr, unsigned long offset, size_t size,
>> + enum dma_data_direction dir, unsigned long attrs)
>> +{
>> + unsigned long page_pfn = page_to_xen_pfn(page);
>> + unsigned long dev_pfn = XEN_PFN_DOWN(dev_addr);
>> + unsigned long compound_pages =
>> + (1<<compound_order(page)) * XEN_PFN_PER_PAGE;
>> + bool local = (page_pfn <= dev_pfn) &&
>> + (dev_pfn - page_pfn < compound_pages);
>> +
>
> The Arm version as a comment here. Could we retain it?
I've added it in this patch, altough the rewrites later on mean it will
go away in favour of a new comment elsewhere anyway.
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* Aw: [PATCH net-next v4 0/3] net: ethernet: mediatek: convert to PHYLINK
From: Frank Wunderlich @ 2019-08-26 9:24 UTC (permalink / raw)
To: "René van Dorst"
Cc: Nelson Chang, netdev, Sean Wang, linux-mips, Russell King,
"René van Dorst", linux-mediatek, John Crispin,
Matthias Brugger, Stefan Roese, David S . Miller,
linux-arm-kernel
In-Reply-To: <20190825174341.20750-1-opensource@vdorst.com>
Tested on Bananapi-R2 (mt7623+mt7530) and Bananapi-R64 v0.1 (mt7622+rtl8367)
Tested-by: Frank Wunderlich <frank-w@public-files.de>
regards Frank
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* [PATCH V2 1/4] clk: imx: pll14xx: avoid glitch when set rate
From: Peng Fan @ 2019-08-26 9:42 UTC (permalink / raw)
To: mturquette@baylibre.com, sboyd@kernel.org, shawnguo@kernel.org,
s.hauer@pengutronix.de, festevam@gmail.com
Cc: Peng Fan, Abel Vesa, Anson Huang, linux-kernel@vger.kernel.org,
dl-linux-imx, kernel@pengutronix.de, Leonard Crestez,
linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
Jacky Bai
From: Peng Fan <peng.fan@nxp.com>
According to PLL1443XA and PLL1416X spec,
"When BYPASS is 0 and RESETB is changed from 0 to 1, FOUT starts to
output unstable clock until lock time passes. PLL1416X/PLL1443XA may
generate a glitch at FOUT."
So set BYPASS when RESETB is changed from 0 to 1 to avoid glitch.
In the end of set rate, BYPASS will be cleared.
When prepare clock, also need to take care to avoid glitch. So
we also follow Spec to set BYPASS before RESETB changed from 0 to 1.
And add a check if the RESETB is already 0, directly return 0;
Fixes: 8646d4dcc7fb ("clk: imx: Add PLLs driver for imx8mm soc")
Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
V2:
Avoid glitch when prepare
update commit log
drivers/clk/imx/clk-pll14xx.c | 22 +++++++++++++++++++++-
1 file changed, 21 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/imx/clk-pll14xx.c b/drivers/clk/imx/clk-pll14xx.c
index b7213023b238..656f48b002dd 100644
--- a/drivers/clk/imx/clk-pll14xx.c
+++ b/drivers/clk/imx/clk-pll14xx.c
@@ -191,6 +191,10 @@ static int clk_pll1416x_set_rate(struct clk_hw *hw, unsigned long drate,
tmp &= ~RST_MASK;
writel_relaxed(tmp, pll->base);
+ /* Enable BYPASS */
+ tmp |= BYPASS_MASK;
+ writel(tmp, pll->base);
+
div_val = (rate->mdiv << MDIV_SHIFT) | (rate->pdiv << PDIV_SHIFT) |
(rate->sdiv << SDIV_SHIFT);
writel_relaxed(div_val, pll->base + 0x4);
@@ -250,6 +254,10 @@ static int clk_pll1443x_set_rate(struct clk_hw *hw, unsigned long drate,
tmp &= ~RST_MASK;
writel_relaxed(tmp, pll->base);
+ /* Enable BYPASS */
+ tmp |= BYPASS_MASK;
+ writel_relaxed(tmp, pll->base);
+
div_val = (rate->mdiv << MDIV_SHIFT) | (rate->pdiv << PDIV_SHIFT) |
(rate->sdiv << SDIV_SHIFT);
writel_relaxed(div_val, pll->base + 0x4);
@@ -283,16 +291,28 @@ static int clk_pll14xx_prepare(struct clk_hw *hw)
{
struct clk_pll14xx *pll = to_clk_pll14xx(hw);
u32 val;
+ int ret;
/*
* RESETB = 1 from 0, PLL starts its normal
* operation after lock time
*/
val = readl_relaxed(pll->base + GNRL_CTL);
+ if (val & RST_MASK)
+ return 0;
+ val |= BYPASS_MASK;
+ writel_relaxed(val, pll->base + GNRL_CTL);
val |= RST_MASK;
writel_relaxed(val, pll->base + GNRL_CTL);
- return clk_pll14xx_wait_lock(pll);
+ ret = clk_pll14xx_wait_lock(pll);
+ if (ret)
+ return ret;
+
+ val &= ~BYPASS_MASK;
+ writel_relaxed(val, pll->base + GNRL_CTL);
+
+ return 0;
}
static int clk_pll14xx_is_prepared(struct clk_hw *hw)
--
2.16.4
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* [PATCH V2 2/4] clk: imx: clk-pll14xx: unbypass PLL by default
From: Peng Fan @ 2019-08-26 9:42 UTC (permalink / raw)
To: mturquette@baylibre.com, sboyd@kernel.org, shawnguo@kernel.org,
s.hauer@pengutronix.de, festevam@gmail.com
Cc: Peng Fan, Abel Vesa, Anson Huang, linux-kernel@vger.kernel.org,
dl-linux-imx, kernel@pengutronix.de, Leonard Crestez,
linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
Jacky Bai
In-Reply-To: <1566855676-11510-1-git-send-email-peng.fan@nxp.com>
From: Peng Fan <peng.fan@nxp.com>
When registering the PLL, unbypass the PLL.
The PLL has two bypass control bit, BYPASS and EXT_BYPASS.
we will expose EXT_BYPASS to clk driver for mux usage, and keep
BYPASS inside pll14xx usage. The PLL has a restriction that
when M/P change, need to RESET/BYPASS pll to avoid glitch, so
we could not expose BYPASS.
To make it easy for clk driver usage, unbypass PLL which does
not hurt current function.
Fixes: 8646d4dcc7fb ("clk: imx: Add PLLs driver for imx8mm soc")
Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
V2:
New patch
drivers/clk/imx/clk-pll14xx.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/drivers/clk/imx/clk-pll14xx.c b/drivers/clk/imx/clk-pll14xx.c
index 656f48b002dd..7a815ec76aa5 100644
--- a/drivers/clk/imx/clk-pll14xx.c
+++ b/drivers/clk/imx/clk-pll14xx.c
@@ -368,6 +368,7 @@ struct clk *imx_clk_pll14xx(const char *name, const char *parent_name,
struct clk_pll14xx *pll;
struct clk *clk;
struct clk_init_data init;
+ u32 val;
pll = kzalloc(sizeof(*pll), GFP_KERNEL);
if (!pll)
@@ -399,6 +400,10 @@ struct clk *imx_clk_pll14xx(const char *name, const char *parent_name,
pll->rate_table = pll_clk->rate_table;
pll->rate_count = pll_clk->rate_count;
+ val = readl_relaxed(pll->base + GNRL_CTL);
+ val &= ~BYPASS_MASK;
+ writel_relaxed(val, pll->base + GNRL_CTL);
+
clk = clk_register(NULL, &pll->hw);
if (IS_ERR(clk)) {
pr_err("%s: failed to register pll %s %lu\n",
--
2.16.4
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* [PATCH V2 3/4] clk: imx: imx8mm: fix pll mux bit
From: Peng Fan @ 2019-08-26 9:42 UTC (permalink / raw)
To: mturquette@baylibre.com, sboyd@kernel.org, shawnguo@kernel.org,
s.hauer@pengutronix.de, festevam@gmail.com
Cc: Peng Fan, Abel Vesa, Anson Huang, linux-kernel@vger.kernel.org,
dl-linux-imx, kernel@pengutronix.de, Leonard Crestez,
linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
Jacky Bai
In-Reply-To: <1566855676-11510-1-git-send-email-peng.fan@nxp.com>
From: Peng Fan <peng.fan@nxp.com>
pll BYPASS bit should be kept inside pll driver for glitchless freq
setting following spec. If exposing the bit, that means pll driver and
clk driver has two paths to touch this bit, which is wrong.
So use EXT_BYPASS bit here.
And drop uneeded set parent, because EXT_BYPASS default is 0.
Fixes: ba5625c3e272 ("clk: imx: Add clock driver support for imx8mm")
Suggested-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
V2:
New patch
drivers/clk/imx/clk-imx8mm.c | 32 ++++++++++----------------------
1 file changed, 10 insertions(+), 22 deletions(-)
diff --git a/drivers/clk/imx/clk-imx8mm.c b/drivers/clk/imx/clk-imx8mm.c
index 2758e3f0d15d..067ab876911d 100644
--- a/drivers/clk/imx/clk-imx8mm.c
+++ b/drivers/clk/imx/clk-imx8mm.c
@@ -408,28 +408,16 @@ static int imx8mm_clocks_probe(struct platform_device *pdev)
clks[IMX8MM_SYS_PLL3] = imx_clk_pll14xx("sys_pll3", "sys_pll3_ref_sel", base + 0x114, &imx8mm_sys_pll);
/* PLL bypass out */
- clks[IMX8MM_AUDIO_PLL1_BYPASS] = imx_clk_mux_flags("audio_pll1_bypass", base, 4, 1, audio_pll1_bypass_sels, ARRAY_SIZE(audio_pll1_bypass_sels), CLK_SET_RATE_PARENT);
- clks[IMX8MM_AUDIO_PLL2_BYPASS] = imx_clk_mux_flags("audio_pll2_bypass", base + 0x14, 4, 1, audio_pll2_bypass_sels, ARRAY_SIZE(audio_pll2_bypass_sels), CLK_SET_RATE_PARENT);
- clks[IMX8MM_VIDEO_PLL1_BYPASS] = imx_clk_mux_flags("video_pll1_bypass", base + 0x28, 4, 1, video_pll1_bypass_sels, ARRAY_SIZE(video_pll1_bypass_sels), CLK_SET_RATE_PARENT);
- clks[IMX8MM_DRAM_PLL_BYPASS] = imx_clk_mux_flags("dram_pll_bypass", base + 0x50, 4, 1, dram_pll_bypass_sels, ARRAY_SIZE(dram_pll_bypass_sels), CLK_SET_RATE_PARENT);
- clks[IMX8MM_GPU_PLL_BYPASS] = imx_clk_mux_flags("gpu_pll_bypass", base + 0x64, 4, 1, gpu_pll_bypass_sels, ARRAY_SIZE(gpu_pll_bypass_sels), CLK_SET_RATE_PARENT);
- clks[IMX8MM_VPU_PLL_BYPASS] = imx_clk_mux_flags("vpu_pll_bypass", base + 0x74, 4, 1, vpu_pll_bypass_sels, ARRAY_SIZE(vpu_pll_bypass_sels), CLK_SET_RATE_PARENT);
- clks[IMX8MM_ARM_PLL_BYPASS] = imx_clk_mux_flags("arm_pll_bypass", base + 0x84, 4, 1, arm_pll_bypass_sels, ARRAY_SIZE(arm_pll_bypass_sels), CLK_SET_RATE_PARENT);
- clks[IMX8MM_SYS_PLL1_BYPASS] = imx_clk_mux_flags("sys_pll1_bypass", base + 0x94, 4, 1, sys_pll1_bypass_sels, ARRAY_SIZE(sys_pll1_bypass_sels), CLK_SET_RATE_PARENT);
- clks[IMX8MM_SYS_PLL2_BYPASS] = imx_clk_mux_flags("sys_pll2_bypass", base + 0x104, 4, 1, sys_pll2_bypass_sels, ARRAY_SIZE(sys_pll2_bypass_sels), CLK_SET_RATE_PARENT);
- clks[IMX8MM_SYS_PLL3_BYPASS] = imx_clk_mux_flags("sys_pll3_bypass", base + 0x114, 4, 1, sys_pll3_bypass_sels, ARRAY_SIZE(sys_pll3_bypass_sels), CLK_SET_RATE_PARENT);
-
- /* unbypass all the plls */
- clk_set_parent(clks[IMX8MM_AUDIO_PLL1_BYPASS], clks[IMX8MM_AUDIO_PLL1]);
- clk_set_parent(clks[IMX8MM_AUDIO_PLL2_BYPASS], clks[IMX8MM_AUDIO_PLL2]);
- clk_set_parent(clks[IMX8MM_VIDEO_PLL1_BYPASS], clks[IMX8MM_VIDEO_PLL1]);
- clk_set_parent(clks[IMX8MM_DRAM_PLL_BYPASS], clks[IMX8MM_DRAM_PLL]);
- clk_set_parent(clks[IMX8MM_GPU_PLL_BYPASS], clks[IMX8MM_GPU_PLL]);
- clk_set_parent(clks[IMX8MM_VPU_PLL_BYPASS], clks[IMX8MM_VPU_PLL]);
- clk_set_parent(clks[IMX8MM_ARM_PLL_BYPASS], clks[IMX8MM_ARM_PLL]);
- clk_set_parent(clks[IMX8MM_SYS_PLL1_BYPASS], clks[IMX8MM_SYS_PLL1]);
- clk_set_parent(clks[IMX8MM_SYS_PLL2_BYPASS], clks[IMX8MM_SYS_PLL2]);
- clk_set_parent(clks[IMX8MM_SYS_PLL3_BYPASS], clks[IMX8MM_SYS_PLL3]);
+ clks[IMX8MM_AUDIO_PLL1_BYPASS] = imx_clk_mux_flags("audio_pll1_bypass", base, 16, 1, audio_pll1_bypass_sels, ARRAY_SIZE(audio_pll1_bypass_sels), CLK_SET_RATE_PARENT);
+ clks[IMX8MM_AUDIO_PLL2_BYPASS] = imx_clk_mux_flags("audio_pll2_bypass", base + 0x14, 16, 1, audio_pll2_bypass_sels, ARRAY_SIZE(audio_pll2_bypass_sels), CLK_SET_RATE_PARENT);
+ clks[IMX8MM_VIDEO_PLL1_BYPASS] = imx_clk_mux_flags("video_pll1_bypass", base + 0x28, 16, 1, video_pll1_bypass_sels, ARRAY_SIZE(video_pll1_bypass_sels), CLK_SET_RATE_PARENT);
+ clks[IMX8MM_DRAM_PLL_BYPASS] = imx_clk_mux_flags("dram_pll_bypass", base + 0x50, 16, 1, dram_pll_bypass_sels, ARRAY_SIZE(dram_pll_bypass_sels), CLK_SET_RATE_PARENT);
+ clks[IMX8MM_GPU_PLL_BYPASS] = imx_clk_mux_flags("gpu_pll_bypass", base + 0x64, 28, 1, gpu_pll_bypass_sels, ARRAY_SIZE(gpu_pll_bypass_sels), CLK_SET_RATE_PARENT);
+ clks[IMX8MM_VPU_PLL_BYPASS] = imx_clk_mux_flags("vpu_pll_bypass", base + 0x74, 28, 1, vpu_pll_bypass_sels, ARRAY_SIZE(vpu_pll_bypass_sels), CLK_SET_RATE_PARENT);
+ clks[IMX8MM_ARM_PLL_BYPASS] = imx_clk_mux_flags("arm_pll_bypass", base + 0x84, 28, 1, arm_pll_bypass_sels, ARRAY_SIZE(arm_pll_bypass_sels), CLK_SET_RATE_PARENT);
+ clks[IMX8MM_SYS_PLL1_BYPASS] = imx_clk_mux_flags("sys_pll1_bypass", base + 0x94, 28, 1, sys_pll1_bypass_sels, ARRAY_SIZE(sys_pll1_bypass_sels), CLK_SET_RATE_PARENT);
+ clks[IMX8MM_SYS_PLL2_BYPASS] = imx_clk_mux_flags("sys_pll2_bypass", base + 0x104, 28, 1, sys_pll2_bypass_sels, ARRAY_SIZE(sys_pll2_bypass_sels), CLK_SET_RATE_PARENT);
+ clks[IMX8MM_SYS_PLL3_BYPASS] = imx_clk_mux_flags("sys_pll3_bypass", base + 0x114, 28, 1, sys_pll3_bypass_sels, ARRAY_SIZE(sys_pll3_bypass_sels), CLK_SET_RATE_PARENT);
/* PLL out gate */
clks[IMX8MM_AUDIO_PLL1_OUT] = imx_clk_gate("audio_pll1_out", "audio_pll1_bypass", base, 13);
--
2.16.4
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* [PATCH V2 4/4] clk: imx: imx8mn: fix pll mux bit
From: Peng Fan @ 2019-08-26 9:42 UTC (permalink / raw)
To: mturquette@baylibre.com, sboyd@kernel.org, shawnguo@kernel.org,
s.hauer@pengutronix.de, festevam@gmail.com
Cc: Peng Fan, Abel Vesa, Anson Huang, linux-kernel@vger.kernel.org,
dl-linux-imx, kernel@pengutronix.de, Leonard Crestez,
linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
Jacky Bai
In-Reply-To: <1566855676-11510-1-git-send-email-peng.fan@nxp.com>
From: Peng Fan <peng.fan@nxp.com>
pll BYPASS bit should be kept inside pll driver for glitchless freq
setting following spec. If exposing the bit, that means pll driver and
clk driver has two paths to touch this bit, which is wrong.
So use EXT_BYPASS bit here.
And drop uneeded set parent, because EXT_BYPASS default is 0.
Suggested-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
V2:
New patch
drivers/clk/imx/clk-imx8mn.c | 32 ++++++++++----------------------
1 file changed, 10 insertions(+), 22 deletions(-)
diff --git a/drivers/clk/imx/clk-imx8mn.c b/drivers/clk/imx/clk-imx8mn.c
index f41116d59749..f767d18679ea 100644
--- a/drivers/clk/imx/clk-imx8mn.c
+++ b/drivers/clk/imx/clk-imx8mn.c
@@ -421,28 +421,16 @@ static int imx8mn_clocks_probe(struct platform_device *pdev)
clks[IMX8MN_SYS_PLL3] = imx_clk_pll14xx("sys_pll3", "sys_pll3_ref_sel", base + 0x114, &imx8mn_sys_pll);
/* PLL bypass out */
- clks[IMX8MN_AUDIO_PLL1_BYPASS] = imx_clk_mux_flags("audio_pll1_bypass", base, 4, 1, audio_pll1_bypass_sels, ARRAY_SIZE(audio_pll1_bypass_sels), CLK_SET_RATE_PARENT);
- clks[IMX8MN_AUDIO_PLL2_BYPASS] = imx_clk_mux_flags("audio_pll2_bypass", base + 0x14, 4, 1, audio_pll2_bypass_sels, ARRAY_SIZE(audio_pll2_bypass_sels), CLK_SET_RATE_PARENT);
- clks[IMX8MN_VIDEO_PLL1_BYPASS] = imx_clk_mux_flags("video_pll1_bypass", base + 0x28, 4, 1, video_pll1_bypass_sels, ARRAY_SIZE(video_pll1_bypass_sels), CLK_SET_RATE_PARENT);
- clks[IMX8MN_DRAM_PLL_BYPASS] = imx_clk_mux_flags("dram_pll_bypass", base + 0x50, 4, 1, dram_pll_bypass_sels, ARRAY_SIZE(dram_pll_bypass_sels), CLK_SET_RATE_PARENT);
- clks[IMX8MN_GPU_PLL_BYPASS] = imx_clk_mux_flags("gpu_pll_bypass", base + 0x64, 4, 1, gpu_pll_bypass_sels, ARRAY_SIZE(gpu_pll_bypass_sels), CLK_SET_RATE_PARENT);
- clks[IMX8MN_VPU_PLL_BYPASS] = imx_clk_mux_flags("vpu_pll_bypass", base + 0x74, 4, 1, vpu_pll_bypass_sels, ARRAY_SIZE(vpu_pll_bypass_sels), CLK_SET_RATE_PARENT);
- clks[IMX8MN_ARM_PLL_BYPASS] = imx_clk_mux_flags("arm_pll_bypass", base + 0x84, 4, 1, arm_pll_bypass_sels, ARRAY_SIZE(arm_pll_bypass_sels), CLK_SET_RATE_PARENT);
- clks[IMX8MN_SYS_PLL1_BYPASS] = imx_clk_mux_flags("sys_pll1_bypass", base + 0x94, 4, 1, sys_pll1_bypass_sels, ARRAY_SIZE(sys_pll1_bypass_sels), CLK_SET_RATE_PARENT);
- clks[IMX8MN_SYS_PLL2_BYPASS] = imx_clk_mux_flags("sys_pll2_bypass", base + 0x104, 4, 1, sys_pll2_bypass_sels, ARRAY_SIZE(sys_pll2_bypass_sels), CLK_SET_RATE_PARENT);
- clks[IMX8MN_SYS_PLL3_BYPASS] = imx_clk_mux_flags("sys_pll3_bypass", base + 0x114, 4, 1, sys_pll3_bypass_sels, ARRAY_SIZE(sys_pll3_bypass_sels), CLK_SET_RATE_PARENT);
-
- /* unbypass all the plls */
- clk_set_parent(clks[IMX8MN_AUDIO_PLL1_BYPASS], clks[IMX8MN_AUDIO_PLL1]);
- clk_set_parent(clks[IMX8MN_AUDIO_PLL2_BYPASS], clks[IMX8MN_AUDIO_PLL2]);
- clk_set_parent(clks[IMX8MN_VIDEO_PLL1_BYPASS], clks[IMX8MN_VIDEO_PLL1]);
- clk_set_parent(clks[IMX8MN_DRAM_PLL_BYPASS], clks[IMX8MN_DRAM_PLL]);
- clk_set_parent(clks[IMX8MN_GPU_PLL_BYPASS], clks[IMX8MN_GPU_PLL]);
- clk_set_parent(clks[IMX8MN_VPU_PLL_BYPASS], clks[IMX8MN_VPU_PLL]);
- clk_set_parent(clks[IMX8MN_ARM_PLL_BYPASS], clks[IMX8MN_ARM_PLL]);
- clk_set_parent(clks[IMX8MN_SYS_PLL1_BYPASS], clks[IMX8MN_SYS_PLL1]);
- clk_set_parent(clks[IMX8MN_SYS_PLL2_BYPASS], clks[IMX8MN_SYS_PLL2]);
- clk_set_parent(clks[IMX8MN_SYS_PLL3_BYPASS], clks[IMX8MN_SYS_PLL3]);
+ clks[IMX8MN_AUDIO_PLL1_BYPASS] = imx_clk_mux_flags("audio_pll1_bypass", base, 16, 1, audio_pll1_bypass_sels, ARRAY_SIZE(audio_pll1_bypass_sels), CLK_SET_RATE_PARENT);
+ clks[IMX8MN_AUDIO_PLL2_BYPASS] = imx_clk_mux_flags("audio_pll2_bypass", base + 0x14, 16, 1, audio_pll2_bypass_sels, ARRAY_SIZE(audio_pll2_bypass_sels), CLK_SET_RATE_PARENT);
+ clks[IMX8MN_VIDEO_PLL1_BYPASS] = imx_clk_mux_flags("video_pll1_bypass", base + 0x28, 16, 1, video_pll1_bypass_sels, ARRAY_SIZE(video_pll1_bypass_sels), CLK_SET_RATE_PARENT);
+ clks[IMX8MN_DRAM_PLL_BYPASS] = imx_clk_mux_flags("dram_pll_bypass", base + 0x50, 16, 1, dram_pll_bypass_sels, ARRAY_SIZE(dram_pll_bypass_sels), CLK_SET_RATE_PARENT);
+ clks[IMX8MN_GPU_PLL_BYPASS] = imx_clk_mux_flags("gpu_pll_bypass", base + 0x64, 28, 1, gpu_pll_bypass_sels, ARRAY_SIZE(gpu_pll_bypass_sels), CLK_SET_RATE_PARENT);
+ clks[IMX8MN_VPU_PLL_BYPASS] = imx_clk_mux_flags("vpu_pll_bypass", base + 0x74, 28, 1, vpu_pll_bypass_sels, ARRAY_SIZE(vpu_pll_bypass_sels), CLK_SET_RATE_PARENT);
+ clks[IMX8MN_ARM_PLL_BYPASS] = imx_clk_mux_flags("arm_pll_bypass", base + 0x84, 28, 1, arm_pll_bypass_sels, ARRAY_SIZE(arm_pll_bypass_sels), CLK_SET_RATE_PARENT);
+ clks[IMX8MN_SYS_PLL1_BYPASS] = imx_clk_mux_flags("sys_pll1_bypass", base + 0x94, 28, 1, sys_pll1_bypass_sels, ARRAY_SIZE(sys_pll1_bypass_sels), CLK_SET_RATE_PARENT);
+ clks[IMX8MN_SYS_PLL2_BYPASS] = imx_clk_mux_flags("sys_pll2_bypass", base + 0x104, 28, 1, sys_pll2_bypass_sels, ARRAY_SIZE(sys_pll2_bypass_sels), CLK_SET_RATE_PARENT);
+ clks[IMX8MN_SYS_PLL3_BYPASS] = imx_clk_mux_flags("sys_pll3_bypass", base + 0x114, 28, 1, sys_pll3_bypass_sels, ARRAY_SIZE(sys_pll3_bypass_sels), CLK_SET_RATE_PARENT);
/* PLL out gate */
clks[IMX8MN_AUDIO_PLL1_OUT] = imx_clk_gate("audio_pll1_out", "audio_pll1_bypass", base, 13);
--
2.16.4
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* Re: linux-next: Fixes tags need some work in the arm-soc tree
From: Alexandre Torgue @ 2019-08-26 9:44 UTC (permalink / raw)
To: Stephen Rothwell, Arnd Bergmann
Cc: Olof Johansson, Fabrice Gasnier, Linux Next Mailing List,
Linux Kernel Mailing List, ARM
In-Reply-To: <20190814074730.402ec3ec@canb.auug.org.au>
Hi guys
On 8/13/19 11:47 PM, Stephen Rothwell wrote:
> Hi Arnd,
>
> On Tue, 13 Aug 2019 21:35:58 +0200 Arnd Bergmann <arnd@arndb.de> wrote:
>>
>> On Tue, Aug 13, 2019 at 4:28 PM Stephen Rothwell <sfr@canb.auug.org.au> wrote:
>>
>>>
>>> Please do not split Fixes tags over more than one line. Also, please
>>> keep them with the rest of the other tags.
>>
>> Thanks for the report. How bad is this? Should I undo the merge and
>> wait for an updated pull request?
>
> Its probably ok to leave as long as lessons are learnt :-)
>
Sorry for my late answer.
Thanks Stephen for information. I'll take care next time before merging
patches with "fixes" tag.
Arnd, no need to update the PR ?
regards
Alex
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* RE: [PATCH v2 08/10] PCI: layerscape: Add EP mode support for ls1088a and ls2088a
From: Xiaowei Bao @ 2019-08-26 9:49 UTC (permalink / raw)
To: Andrew Murray
Cc: mark.rutland@arm.com, Roy Zang, lorenzo.pieralisi@arm.co,
arnd@arndb.de, devicetree@vger.kernel.org,
gregkh@linuxfoundation.org, linuxppc-dev@lists.ozlabs.org,
linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
kishon@ti.com, M.h. Lian, robh+dt@kernel.org,
gustavo.pimentel@synopsys.com, jingoohan1@gmail.com,
bhelgaas@google.com, Leo Li, shawnguo@kernel.org, Mingkai Hu,
linux-arm-kernel@lists.infradead.org
In-Reply-To: <20190823142756.GI14582@e119886-lin.cambridge.arm.com>
> -----Original Message-----
> From: Andrew Murray <andrew.murray@arm.com>
> Sent: 2019年8月23日 22:28
> To: Xiaowei Bao <xiaowei.bao@nxp.com>
> Cc: bhelgaas@google.com; robh+dt@kernel.org; mark.rutland@arm.com;
> shawnguo@kernel.org; Leo Li <leoyang.li@nxp.com>; kishon@ti.com;
> lorenzo.pieralisi@arm.co; arnd@arndb.de; gregkh@linuxfoundation.org; M.h.
> Lian <minghuan.lian@nxp.com>; Mingkai Hu <mingkai.hu@nxp.com>; Roy
> Zang <roy.zang@nxp.com>; jingoohan1@gmail.com;
> gustavo.pimentel@synopsys.com; linux-pci@vger.kernel.org;
> devicetree@vger.kernel.org; linux-kernel@vger.kernel.org;
> linux-arm-kernel@lists.infradead.org; linuxppc-dev@lists.ozlabs.org
> Subject: Re: [PATCH v2 08/10] PCI: layerscape: Add EP mode support for
> ls1088a and ls2088a
>
> On Thu, Aug 22, 2019 at 07:22:40PM +0800, Xiaowei Bao wrote:
> > Add PCIe EP mode support for ls1088a and ls2088a, there are some
> > difference between LS1 and LS2 platform, so refactor the code of the
> > EP driver.
> >
> > Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
> > ---
> > v2:
> > - New mechanism for layerscape EP driver.
>
> Was there a v1 of this patch?
>
> >
> > drivers/pci/controller/dwc/pci-layerscape-ep.c | 76
> > ++++++++++++++++++++------
> > 1 file changed, 58 insertions(+), 18 deletions(-)
> >
> > diff --git a/drivers/pci/controller/dwc/pci-layerscape-ep.c
> > b/drivers/pci/controller/dwc/pci-layerscape-ep.c
> > index 7ca5fe8..2a66f07 100644
> > --- a/drivers/pci/controller/dwc/pci-layerscape-ep.c
> > +++ b/drivers/pci/controller/dwc/pci-layerscape-ep.c
> > @@ -20,27 +20,29 @@
> >
> > #define PCIE_DBI2_OFFSET 0x1000 /* DBI2 base address*/
> >
> > -struct ls_pcie_ep {
> > - struct dw_pcie *pci;
> > - struct pci_epc_features *ls_epc;
> > +#define to_ls_pcie_ep(x) dev_get_drvdata((x)->dev)
> > +
> > +struct ls_pcie_ep_drvdata {
> > + u32 func_offset;
> > + const struct dw_pcie_ep_ops *ops;
> > + const struct dw_pcie_ops *dw_pcie_ops;
> > };
> >
> > -#define to_ls_pcie_ep(x) dev_get_drvdata((x)->dev)
> > +struct ls_pcie_ep {
> > + struct dw_pcie *pci;
> > + struct pci_epc_features *ls_epc;
> > + const struct ls_pcie_ep_drvdata *drvdata; };
> >
> > static int ls_pcie_establish_link(struct dw_pcie *pci) {
> > return 0;
> > }
> >
> > -static const struct dw_pcie_ops ls_pcie_ep_ops = {
> > +static const struct dw_pcie_ops dw_ls_pcie_ep_ops = {
> > .start_link = ls_pcie_establish_link, };
> >
> > -static const struct of_device_id ls_pcie_ep_of_match[] = {
> > - { .compatible = "fsl,ls-pcie-ep",},
> > - { },
> > -};
> > -
> > static const struct pci_epc_features* ls_pcie_ep_get_features(struct
> > dw_pcie_ep *ep) { @@ -82,10 +84,44 @@ static int
> > ls_pcie_ep_raise_irq(struct dw_pcie_ep *ep, u8 func_no,
> > }
> > }
> >
> > -static const struct dw_pcie_ep_ops pcie_ep_ops = {
> > +static unsigned int ls_pcie_ep_func_conf_select(struct dw_pcie_ep *ep,
> > + u8 func_no)
> > +{
> > + struct dw_pcie *pci = to_dw_pcie_from_ep(ep);
> > + struct ls_pcie_ep *pcie = to_ls_pcie_ep(pci);
> > + u8 header_type;
> > +
> > + header_type = ioread8(pci->dbi_base + PCI_HEADER_TYPE);
> > +
> > + if (header_type & (1 << 7))
> > + return pcie->drvdata->func_offset * func_no;
> > + else
> > + return 0;
>
> It looks like there isn't a PCI define for multi function, the nearest I could find
> was PCI_HEADER_TYPE_MULTIDEVICE in hotplug/ibmphp.h. A comment
> above the test might be helpful to explain the test.
OK, I will add a comment above this code.
>
> As the ls_pcie_ep_drvdata structures are static, the unset .func_offset will be
> initialised to 0, so you could just drop the test above.
Due to the different PCIe controller have different property, e.g. PCIe controller1 support
multiple function feature, but PCIe controller2 don't support this feature, so I need to check
which controller support it and return the correct offset value, but each board only have one
ls_pcie_ep_drvdata, ^_^.
>
> However something to the effect of the following may help spot
> misconfiguration:
>
> WARN_ON(func_no && !pcie->drvdata->func_offset); return
> pcie->drvdata->func_offset * func_no;
>
> The WARN is probably quite useful as if you are attempting to use non-zero
> functions and func_offset isn't set - then things may appear to work normally
> but actually will break horribly.
As discussion before, I think the func_offset should not depends on the function
number, even if other platforms of NXP may be use write registers way to access
the different function config space.
I have added the comments above the code, as follow, do you have any advice?
+static unsigned int ls_pcie_ep_func_conf_select(struct dw_pcie_ep *ep,
+ u8 func_no)
+{
+ struct dw_pcie *pci = to_dw_pcie_from_ep(ep);
+ struct ls_pcie_ep *pcie = to_ls_pcie_ep(pci);
+ u8 header_type;
+
+ header_type = ioread8(pci->dbi_base + PCI_HEADER_TYPE);
+
+ /*
+ * Read the Header Type register of config space to check
+ * whether this PCI device support the multiple function.
+ */
+ if (header_type & (1 << 7))
+ return pcie->drvdata->func_offset * func_no;
+
+ return 0;
+}
Thanks a lot for your detail comments.
>
> Thanks,
>
> Andrew Murray
>
> > +}
> > +
> > +static const struct dw_pcie_ep_ops ls_pcie_ep_ops = {
> > .ep_init = ls_pcie_ep_init,
> > .raise_irq = ls_pcie_ep_raise_irq,
> > .get_features = ls_pcie_ep_get_features,
> > + .func_conf_select = ls_pcie_ep_func_conf_select, };
> > +
> > +static const struct ls_pcie_ep_drvdata ls1_ep_drvdata = {
> > + .ops = &ls_pcie_ep_ops,
> > + .dw_pcie_ops = &dw_ls_pcie_ep_ops,
> > +};
> > +
> > +static const struct ls_pcie_ep_drvdata ls2_ep_drvdata = {
> > + .func_offset = 0x20000,
> > + .ops = &ls_pcie_ep_ops,
> > + .dw_pcie_ops = &dw_ls_pcie_ep_ops,
> > +};
> > +
> > +static const struct of_device_id ls_pcie_ep_of_match[] = {
> > + { .compatible = "fsl,ls1046a-pcie-ep", .data = &ls1_ep_drvdata },
> > + { .compatible = "fsl,ls1088a-pcie-ep", .data = &ls2_ep_drvdata },
> > + { .compatible = "fsl,ls2088a-pcie-ep", .data = &ls2_ep_drvdata },
> > + { },
> > };
> >
> > static int __init ls_add_pcie_ep(struct ls_pcie_ep *pcie, @@ -98,7
> > +134,7 @@ static int __init ls_add_pcie_ep(struct ls_pcie_ep *pcie,
> > int ret;
> >
> > ep = &pci->ep;
> > - ep->ops = &pcie_ep_ops;
> > + ep->ops = pcie->drvdata->ops;
> >
> > res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
> "addr_space");
> > if (!res)
> > @@ -137,14 +173,11 @@ static int __init ls_pcie_ep_probe(struct
> platform_device *pdev)
> > if (!ls_epc)
> > return -ENOMEM;
> >
> > - dbi_base = platform_get_resource_byname(pdev, IORESOURCE_MEM,
> "regs");
> > - pci->dbi_base = devm_pci_remap_cfg_resource(dev, dbi_base);
> > - if (IS_ERR(pci->dbi_base))
> > - return PTR_ERR(pci->dbi_base);
> > + pcie->drvdata = of_device_get_match_data(dev);
> >
> > - pci->dbi_base2 = pci->dbi_base + PCIE_DBI2_OFFSET;
> > pci->dev = dev;
> > - pci->ops = &ls_pcie_ep_ops;
> > + pci->ops = pcie->drvdata->dw_pcie_ops;
> > +
> > pcie->pci = pci;
> >
> > ls_epc->linkup_notifier = false,
> > @@ -152,6 +185,13 @@ static int __init ls_pcie_ep_probe(struct
> > platform_device *pdev)
> >
> > pcie->ls_epc = ls_epc;
> >
> > + dbi_base = platform_get_resource_byname(pdev, IORESOURCE_MEM,
> "regs");
> > + pci->dbi_base = devm_pci_remap_cfg_resource(dev, dbi_base);
> > + if (IS_ERR(pci->dbi_base))
> > + return PTR_ERR(pci->dbi_base);
> > +
> > + pci->dbi_base2 = pci->dbi_base + PCIE_DBI2_OFFSET;
> > +
> > platform_set_drvdata(pdev, pcie);
> >
> > ret = ls_add_pcie_ep(pcie, pdev);
> > --
> > 2.9.5
> >
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^ permalink raw reply
* Re: CPUfreq fail on rk3399-firefly
From: Kever Yang @ 2019-08-26 9:56 UTC (permalink / raw)
To: Kevin Hilman, Heiko Stuebner
Cc: kernel-build-reports, linux-rockchip, linux-next,
闫孝军, 张晴, linux-arm-kernel
In-Reply-To: <7h8srjzuen.fsf@baylibre.com>
Hi Kevin,
I want to have a test with my board, I can get the Image and dtb
from the link for the job,
but how can I get the randisk which is named initrd-SDbyy2.cpio.gz?
Thanks,
- Kever
On 2019/8/24 上午1:03, Kevin Hilman wrote:
> Kevin Hilman <khilman@baylibre.com> writes:
>
>> Kever Yang <kever.yang@rock-chips.com> writes:
>>
>>> Hi Kevin, Heiko,
>>>
>>> On 2019/8/22 上午2:59, Kevin Hilman wrote:
>>>> Hi Heiko,
>>>>
>>>> Heiko Stuebner <heiko@sntech.de> writes:
>>>>
>>>>> Am Dienstag, 13. August 2019, 19:35:31 CEST schrieb Kevin Hilman:
>>>>>> [ resent with correct addr for linux-rockchip list ]
>>>>>>
>>>>>> Mark Brown <broonie@kernel.org> writes:
>>>>>>
>>>>>>> On Thu, Jul 18, 2019 at 04:28:08AM -0700, kernelci.org bot wrote:
>>>>>>>
>>>>>>> Today's -next started failing to boot defconfig on rk3399-firefly:
>>>>>>>
>>>>>>>> arm64:
>>>>>>>> defconfig:
>>>>>>>> gcc-8:
>>>>>>>> rk3399-firefly: 1 failed lab
>>>>>>> It hits a BUG() trying to set up cpufreq:
>>>>>>>
>>>>>>> [ 87.381606] cpufreq: cpufreq_online: CPU0: Running at unlisted freq: 200000 KHz
>>>>>>> [ 87.393244] cpufreq: cpufreq_online: CPU0: Unlisted initial frequency changed to: 408000 KHz
>>>>>>> [ 87.469777] cpufreq: cpufreq_online: CPU4: Running at unlisted freq: 12000 KHz
>>>>>>> [ 87.488595] cpu cpu4: _generic_set_opp_clk_only: failed to set clock rate: -22
>>>>>>> [ 87.491881] cpufreq: __target_index: Failed to change cpu frequency: -22
>>>>>>> [ 87.495335] ------------[ cut here ]------------
>>>>>>> [ 87.496821] kernel BUG at drivers/cpufreq/cpufreq.c:1438!
>>>>>>> [ 87.498462] Internal error: Oops - BUG: 0 [#1] PREEMPT SMP
>>>>>>>
>>>>>>> I'm struggling to see anything relevant in the diff from yesterday, the
>>>>>>> unlisted frequency warnings were there in the logs yesterday but no oops
>>>>>>> and I'm not seeing any changes in cpufreq, clk or anything relevant
>>>>>>> looking.
>>>>>>>
>>>>>>> Full bootlog and other info can be found here:
>>>>>>>
>>>>>>> https://kernelci.org/boot/id/5d302d8359b51498d049e983/
>>>>>> I confirm that disabling CPUfreq in the defconfig (CONFIG_CPU_FREQ=n)
>>>>>> makes the firefly board start working again.
>>>>>>
>>>>>> Note that the default defconfig enables the "performance" CPUfreq
>>>>>> governor as the default governor, so during kernel boot, it will always
>>>>>> switch to the max frequency.
>>>>>>
>>>>>> For fun, I set the default governor to "userspace" so the kernel
>>>>>> wouldn't make any OPP changes, and that leads to a slightly more
>>>>>> informative splat[1]
>>>>>>
>>>>>> There is still an OPP change happening because the detected OPP is not
>>>>>> one that's listed in the table, so it tries to change to a listed OPP
>>>>>> and fails in the bowels of clk_set_rate()
>>>>> Though I think that might only be a symptom as well.
>>>>> Both the PLL setting code as well as the actual cpu-clock implementation
>>>>> is unchanged since 2017 (and runs just fine on all boards in my farm).
>>>>>
>>>>> One source for these issues is often the regulator supplying the cpu
>>>>> going haywire - aka the voltage not matching the opp.
>>>>>
>>>>> As in this error-case it's CPU4 being set, this would mean it might
>>>>> be the big cluster supplied by the external syr825 (fan5355 clone)
>>>>> that might act up. In the Firefly-rk3399 case this is even stranger.
>>>>>
>>>>> There is a discrepancy between the "fcs,suspend-voltage-selector"
>>>>> between different bootloader versions (how the selection-pin is set up),
>>>>> so the kernel might actually write his requested voltage to the wrong
>>>>> register (not the one for actual voltage, but the second set used for
>>>>> the suspend voltage).
>>>>>
>>>>> Did you by chance swap bootloaders at some point in recent past?
>>>> No, haven't touched bootloader since I initially setup the board.
>>> The CPU voltage does not affect by bootloader for kernel should have its
>>> own opp-table,
>>>
>>> the bootloader may only affect the center/logic power supply.
>>>
>>>>> I'd assume [2] might actually be the same issue last year, though
>>>>> the CI-logs are not available anymore it seems.
>>>>>
>>>>> Could you try to set the vdd_cpu_b regulator to disabled, so that
>>>>> cpufreq for this cluster defers and see what happens?
>>>> Yes, this change[1] definitely makes things boot reliably again, so
>>>> there's defintiely something a bit unstable with this regulator, at
>>>> least on this firefly.
>>> Is it possible to target which patch introduce this bug? This board
>>> should have work correctly for a long time with upstream source code.
>> Unfortunately, it seems to be a regular, but intermittent failure, so
>> bisection is not producing anything reliable.
>>
>> You can see that both in mainline[1] and in linux-next[2] there are
>> periodic failures, but it's hard to see any patterns.
> Even worse, I (re)tested mainline for versions that were previously
> passing (v5.2, v5.3-rc5) and they are also failing now.
>
> They work again if I disable that regulator as suggested by Heiko.
>
> So this is increasingly pointing to failing hardware.
>
> Kevin
>
>
>
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^ permalink raw reply
* [PATCH] bus: imx-weim: remove __init from 2 functions
From: Ilie Halip @ 2019-08-26 9:58 UTC (permalink / raw)
To: clang-built-linux
Cc: Ilie Halip, Sascha Hauer, Shawn Guo, linux-kernel,
linux-arm-kernel
A previous commit removed __init from weim_probe(), but this attribute is
still present for other functions called from it. Thus, these warnings
are triggered:
WARNING: Section mismatch in reference from the function weim_probe() to the function .init.text:imx_weim_gpr_setup()
WARNING: Section mismatch in reference from the function weim_probe() to the function .init.text:weim_timing_setup()
Remove the __init attribute from these functions as well, since they
don't seem to be used anywhere else.
Signed-off-by: Ilie Halip <ilie.halip@gmail.com>
Reported-by: "kernelci.org bot" <bot@kernelci.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: clang-built-linux@googlegroups.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
---
drivers/bus/imx-weim.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/bus/imx-weim.c b/drivers/bus/imx-weim.c
index 79af0c27f5a3..d82e8c00523d 100644
--- a/drivers/bus/imx-weim.c
+++ b/drivers/bus/imx-weim.c
@@ -76,7 +76,7 @@ static const struct of_device_id weim_id_table[] = {
};
MODULE_DEVICE_TABLE(of, weim_id_table);
-static int __init imx_weim_gpr_setup(struct platform_device *pdev)
+static int imx_weim_gpr_setup(struct platform_device *pdev)
{
struct device_node *np = pdev->dev.of_node;
struct property *prop;
@@ -126,7 +126,7 @@ static int __init imx_weim_gpr_setup(struct platform_device *pdev)
}
/* Parse and set the timing for this device. */
-static int __init weim_timing_setup(struct device *dev,
+static int weim_timing_setup(struct device *dev,
struct device_node *np, void __iomem *base,
const struct imx_weim_devtype *devtype,
struct cs_timing_state *ts)
--
2.17.1
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