* [PATCH 09/20] arm64: dts: imx8mq: Add system counter node
From: Daniel Lezcano @ 2019-08-26 20:43 UTC (permalink / raw)
To: tglx
Cc: Mark Rutland,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
Abel Vesa, Anson Huang, Carlo Caione, Andrey Smirnov,
Fabio Estevam, Sascha Hauer, Angus Ainslie (Purism), linux-kernel,
Rob Herring, NXP Linux Team, Pengutronix Kernel Team, Shawn Guo,
Guido Günther,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
Lucas Stach
In-Reply-To: <20190826204407.17759-1-daniel.lezcano@linaro.org>
From: Anson Huang <Anson.Huang@nxp.com>
Add i.MX8MQ system counter node to enable timer-imx-sysctr
broadcast timer driver.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
---
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index d09b808eff87..b4529773af51 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -635,6 +635,14 @@
#pwm-cells = <2>;
status = "disabled";
};
+
+ system_counter: timer@306a0000 {
+ compatible = "nxp,sysctr-timer";
+ reg = <0x306a0000 0x20000>;
+ interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&osc_25m>;
+ clock-names = "per";
+ };
};
bus@30800000 { /* AIPS3 */
--
2.17.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related
* [PATCH 10/20] clocksource/drivers/renesas-ostm: Use DIV_ROUND_CLOSEST() helper
From: Daniel Lezcano @ 2019-08-26 20:43 UTC (permalink / raw)
To: tglx
Cc: Alexandre Torgue, Geert Uytterhoeven, linux-kernel,
Maxime Coquelin, moderated list:ARM/STM32 ARCHITECTURE,
moderated list:ARM/STM32 ARCHITECTURE
In-Reply-To: <20190826204407.17759-1-daniel.lezcano@linaro.org>
From: Geert Uytterhoeven <geert+renesas@glider.be>
Use the DIV_ROUND_CLOSEST() helper instead of open-coding the same
operation.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
---
drivers/clocksource/renesas-ostm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clocksource/renesas-ostm.c b/drivers/clocksource/renesas-ostm.c
index 61d5f3b539ce..37c39b901bb1 100644
--- a/drivers/clocksource/renesas-ostm.c
+++ b/drivers/clocksource/renesas-ostm.c
@@ -221,7 +221,7 @@ static int __init ostm_init(struct device_node *np)
}
rate = clk_get_rate(ostm_clk);
- ostm->ticks_per_jiffy = (rate + HZ / 2) / HZ;
+ ostm->ticks_per_jiffy = DIV_ROUND_CLOSEST(rate, HZ);
/*
* First probed device will be used as system clocksource. Any
--
2.17.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related
* [PATCH v2] ARM: dts: imx7d: sbc-iot-imx7: add basic board support
From: André Draszik @ 2019-08-26 20:51 UTC (permalink / raw)
To: linux-kernel
Cc: linux-arm-kernel, devicetree, shawnguo, s.hauer, robh+dt,
grinberg, kernel, André Draszik, mark.rutland, festevam,
ilya, linux-imx
In-Reply-To: <20190826153800.35400-12-git@andred.net>
This is a forward-port of Compulab's downstream commit
against linux 4.9.11.
Original commit message:
The SB-IOT-iMX7 base board together with CL-SOM-iMX7
SoM forms SBC-IOT-iMX7 single board computer.
SBC-IOT-iMX7 is a single board computer optimized for
industrial control and monitoring, extensive wireless
and wired connectivity, ideal solution for
cost-sensitive systems. It is based on the Freescale
i.MX7 system-on-chip. SBC-IOT-iMX7 is implemented with
the CL-SOM-iMX7 System-on-Module providing most of the
functions,and SB-IOT-iMX7 carrier board providing
additional peripheral functions and connectors.
https://www.compulab.com/products/computer-on-modules/cl-som-imx7-freescale-i-mx-7-system-on-module/
https://www.compulab.com/products/sbcs/sbc-iot-imx7-nxp-i-mx-7-internet-of-things-single-board-computer/
This commit adds basic board support, including:
* SD-card (note that write-protect is not connected
on this carrier board)
* SPI (available on expansion header)
* i2c3 & i2c4 (including bus recovery information)
* additional UARTs
* all USB ports
Compared to the downtream commit, this commit doesn't
add / enable the PCIe and LCD interface, as PCIe
support needs an additional patch to the PCI controller
first, and I can't test the LCD.
Signed-off-by: André Draszik <git@andred.net>
Cc: Ilya Ledvich <ilya@compulab.co.il>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: devicetree@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
---
v2:
* use standard uart-has-rtscts instead of fsl,uart-has-rtscts
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/imx7d-sbc-iot-imx7.dts | 198 +++++++++++++++++++++++
2 files changed, 199 insertions(+)
create mode 100644 arch/arm/boot/dts/imx7d-sbc-iot-imx7.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 9159fa2cea90..78d51f2f9930 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -591,6 +591,7 @@ dtb-$(CONFIG_SOC_IMX7D) += \
imx7d-pico-hobbit.dtb \
imx7d-pico-pi.dtb \
imx7d-sbc-imx7.dtb \
+ imx7d-sbc-iot-imx7.dtb \
imx7d-sdb.dtb \
imx7d-sdb-reva.dtb \
imx7d-sdb-sht11.dtb \
diff --git a/arch/arm/boot/dts/imx7d-sbc-iot-imx7.dts b/arch/arm/boot/dts/imx7d-sbc-iot-imx7.dts
new file mode 100644
index 000000000000..5e72927b05be
--- /dev/null
+++ b/arch/arm/boot/dts/imx7d-sbc-iot-imx7.dts
@@ -0,0 +1,198 @@
+// SPDX-License-Identifier: GPL-2.0+ OR MIT
+//
+// Copyright 2017 CompuLab Ltd. - http://www.compulab.co.il/
+/*
+ * Support for CompuLab SBC-IOT-iMX7 Single Board Computer
+ */
+
+#include "imx7d-cl-som-imx7.dts"
+
+/ {
+ model = "CompuLab,SBC-IOT-iMX7";
+ compatible = "compulab,sbc-iot-imx7", "compulab,cl-som-imx7", "fsl,imx7d";
+
+ reg_usb_vbus: regulator-usb-vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "usb_vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ };
+};
+
+&ecspi3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ecspi3 &pinctrl_ecspi3_cs>;
+ cs-gpios = <&gpio4 11 GPIO_ACTIVE_HIGH>;
+ status = "okay";
+};
+
+&i2c3 {
+ clock-frequency = <100000>;
+ pinctrl-names = "default", "gpio";
+ pinctrl-0 = <&pinctrl_i2c3>;
+ pinctrl-1 = <&pinctrl_i2c3_recovery>;
+ sda-gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;
+ scl-gpios = <&gpio1 8 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ status = "okay";
+};
+
+&i2c4 {
+ clock-frequency = <100000>;
+ pinctrl-names = "default", "gpio";
+ pinctrl-0 = <&pinctrl_i2c4>;
+ pinctrl-1 = <&pinctrl_i2c4_recovery>;
+ sda-gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>;
+ scl-gpios = <&gpio1 10 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ status = "okay";
+
+ eeprom_iot@54 {
+ compatible = "atmel,24c08";
+ reg = <0x54>;
+ pagesize = <16>;
+ };
+};
+
+&iomuxc {
+ pinctrl-1 = <&pinctrl_xpen>;
+
+ /* SB-IOT-iMX7 Xpension Header P7 */
+ pinctrl_xpen: xpengrp {
+ fsl,pins = <
+ MX7D_PAD_LCD_DATA13__GPIO3_IO18 0x34 /* P7-4 - gpio82 */
+ MX7D_PAD_LCD_DATA12__GPIO3_IO17 0x34 /* P7-5 - gpio81 */
+ >;
+ };
+
+ pinctrl_ecspi3: ecspi3grp {
+ fsl,pins = <
+ MX7D_PAD_I2C1_SDA__ECSPI3_MOSI 0xf /* P7-7 */
+ MX7D_PAD_I2C1_SCL__ECSPI3_MISO 0xf /* P7-8 */
+ MX7D_PAD_I2C2_SCL__ECSPI3_SCLK 0xf /* P7-6 */
+ >;
+ };
+
+ pinctrl_ecspi3_cs: ecspi3_cs_grp {
+ fsl,pins = <
+ MX7D_PAD_I2C2_SDA__GPIO4_IO11 0x34 /* P7-9 */
+ >;
+ };
+
+ pinctrl_i2c3: i2c3grp {
+ fsl,pins = <
+ MX7D_PAD_GPIO1_IO09__I2C3_SDA 0x4000000f /* P7-3 */
+ MX7D_PAD_GPIO1_IO08__I2C3_SCL 0x4000000f /* P7-2 */
+ >;
+ };
+
+ pinctrl_i2c3_recovery: i2c3recoverygrp {
+ fsl,pins = <
+ MX7D_PAD_GPIO1_IO09__GPIO1_IO9 0x4000000f /* P7-3 */
+ MX7D_PAD_GPIO1_IO08__GPIO1_IO8 0x4000000f /* P7-2 */
+ >;
+ };
+
+ pinctrl_i2c4: i2c4grp {
+ fsl,pins = <
+ MX7D_PAD_GPIO1_IO11__I2C4_SDA 0x4000000f
+ MX7D_PAD_GPIO1_IO10__I2C4_SCL 0x4000000f
+ >;
+ };
+
+ pinctrl_i2c4_recovery: i2c4recoverygrp {
+ fsl,pins = <
+ MX7D_PAD_GPIO1_IO11__GPIO1_IO11 0x4000000f
+ MX7D_PAD_GPIO1_IO10__GPIO1_IO10 0x4000000f
+ >;
+ };
+
+ pinctrl_uart2: uart2grp {
+ fsl,pins = <
+ MX7D_PAD_LCD_ENABLE__UART2_DCE_TX 0x79 /* P7-12 */
+ MX7D_PAD_LCD_CLK__UART2_DCE_RX 0x79 /* P7-13 */
+ MX7D_PAD_LCD_VSYNC__UART2_DCE_CTS 0x79 /* P7-11 */
+ MX7D_PAD_LCD_HSYNC__UART2_DCE_RTS 0x79 /* P7-10 */
+ >;
+ };
+
+ pinctrl_uart5: uart5grp {
+ fsl,pins = <
+ MX7D_PAD_I2C4_SDA__UART5_DCE_TX 0x79 /* RS232-TX */
+ MX7D_PAD_I2C4_SCL__UART5_DCE_RX 0x79 /* RS232-RX */
+ MX7D_PAD_I2C3_SDA__UART5_DCE_RTS 0x79 /* RS232-RTS */
+ MX7D_PAD_I2C3_SCL__UART5_DCE_CTS 0x79 /* RS232-CTS */
+ >;
+ };
+
+ pinctrl_uart7: uart7grp {
+ fsl,pins = <
+ MX7D_PAD_ECSPI2_MOSI__UART7_DCE_TX 0x79 /* R485-TX */
+ MX7D_PAD_ECSPI2_SCLK__UART7_DCE_RX 0x79 /* R485-RX */
+ MX7D_PAD_ECSPI2_SS0__UART7_DCE_CTS 0x79 /* R485-CTS */
+ MX7D_PAD_ECSPI2_MISO__UART7_DCE_RTS 0x79 /* R485-TTS */
+ >;
+ };
+
+ pinctrl_usdhc1: usdhc1grp {
+ fsl,pins = <
+ MX7D_PAD_SD1_CMD__SD1_CMD 0x59
+ MX7D_PAD_SD1_CLK__SD1_CLK 0x19
+ MX7D_PAD_SD1_DATA0__SD1_DATA0 0x59
+ MX7D_PAD_SD1_DATA1__SD1_DATA1 0x59
+ MX7D_PAD_SD1_DATA2__SD1_DATA2 0x59
+ MX7D_PAD_SD1_DATA3__SD1_DATA3 0x59
+ MX7D_PAD_SD1_CD_B__GPIO5_IO0 0x59 /* CD */
+ >;
+ };
+};
+
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart2>;
+ assigned-clocks = <&clks IMX7D_UART2_ROOT_SRC>;
+ assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
+ uart-has-rtscts;
+ status = "okay";
+};
+
+&uart5 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart5>;
+ assigned-clocks = <&clks IMX7D_UART5_ROOT_SRC>;
+ assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
+ uart-has-rtscts;
+ status = "okay";
+};
+
+&uart7 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart7>;
+ assigned-clocks = <&clks IMX7D_UART7_ROOT_SRC>;
+ assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
+ uart-has-rtscts;
+ status = "okay";
+};
+
+&usbotg1 {
+ vbus-supply = <®_usb_vbus>;
+ status = "okay";
+};
+
+&usbotg2 {
+ dr_mode = "host";
+ vbus-supply = <®_usb_vbus>;
+ status = "okay";
+};
+
+&usbh {
+ vbus-supply = <®_usb_vbus>;
+ status = "okay";
+};
+
+&usdhc1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usdhc1>;
+ cd-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
+ wakeup-source;
+ status = "okay";
+};
--
2.23.0.rc1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related
* Re: [PATCH v1 0/6] Allow kexec reboot for GICv3 and device tree
From: Pavel Tatashin @ 2019-08-26 21:25 UTC (permalink / raw)
To: Marc Zyngier
Cc: Sasha Levin, Mark Rutland, Vladimir Murzin, kexec mailing list,
James Morris, LKML, James Morse, Linux ARM
In-Reply-To: <20190826201313.246208e9@why>
On Mon, Aug 26, 2019 at 3:13 PM Marc Zyngier <maz@kernel.org> wrote:
>
> On Mon, 26 Aug 2019 15:00:50 -0400
> Pavel Tatashin <pasha.tatashin@soleen.com> wrote:
>
> > Marc Zyngier added the support for kexec and GICv3 for EFI based systems.
> > However, it is still not possible todo on systems with device trees.
> >
> > Here is EFI fixes from Marc:
> > https://lore.kernel.org/lkml/20180921195954.21574-1-marc.zyngier@arm.com
> >
> > For Device Tree variant: lets allow reserve a memory region in interrupt
> > controller node, and use this property to allocate interrupt tables.
>
> There is no such thing as a "device tree variant". As long as your
> bootloader implements EFI, everything will work correctly, whether
> you're using DT, ACPI, or the anything else.
>
> This already works today, without any need to add anything to the
> kernel (I have systems using EDK II and u-boot, both implementing EFI,
> and I'm able to kexec without any issue). If your bootloader doesn't
> support EFI, here's a good opportunity to implement it!
Hi Marc,
Thank you very much for looking at this work.
Running Linux without EFI is common, and there are scenarios which
make it appropriate. As I understand most of embedded linux do not
have EFI enabled, and thus I do not see a reason why we would not
support a first class feature of Linux (kexec) on non-EFI bootloaders.
We (Microsoft) have a small highly secure device with a high uptime
requirement. The device also has PCIe and thus GICv3. The update for
this device relies on kexec. For a number of reasons, it was decided
to use U-Boot and Linux without EFI enabled. One of those reasons is
to improve boot performance, enabling EFI in U-Boot alone reduces the
boot performance by half a second. Our total reboot budget is under a
second which makes that half a second unacceptable. Also, adding EFI
support to kernel increases its size and there are security
implications from enabling more code both in U-Boot and Linux.
> --
> Without deviation from the norm, progress is not possible.
Totally agreed.
Thank you,
Pasha
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* Re: [PATCH v1 5/6] rqchip/gic-v3-its: move reset pending table outside of allocator
From: Pavel Tatashin @ 2019-08-26 21:29 UTC (permalink / raw)
To: Pavel Tatashin, James Morris, Sasha Levin, kexec mailing list,
LKML, Linux ARM, Marc Zyngier, James Morse, Vladimir Murzin,
Mark Rutland
In-Reply-To: <20190826190056.27854-6-pasha.tatashin@soleen.com>
This patch requires a small fix (which I will do in later revisions):
diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c
index 2ffdb3927549..c9faeac4b3a8 100644
--- a/drivers/irqchip/irq-gic-v3-its.c
+++ b/drivers/irqchip/irq-gic-v3-its.c
@@ -2182,7 +2182,8 @@ static void its_cpu_init_lpis(void)
paddr &= GENMASK_ULL(51, 16);
WARN_ON(!gic_check_reserved_range(paddr, LPI_PENDBASE_SZ));
- its_free_pending_table(gic_data_rdist()->pend_page);
+ if (efi_enabled(EFI_CONFIG_TABLES))
+ its_free_pending_table(gic_data_rdist()->pend_page);
gic_data_rdist()->pend_page = NULL;
goto out;
reserved-memory does not need to be freed. However, I am confused why
it is needed to be freed in EFI case. Marc, can you please explain
this to me?
Thank you,
Pasha
On Mon, Aug 26, 2019 at 3:01 PM Pavel Tatashin
<pasha.tatashin@soleen.com> wrote:
>
> Allow to use reserved memory for interrupt controller tables.
>
> Currently, it is not possible to do kexec reboots without possible memory
> corruption using device tree and GICv3 interrupt controller.
>
> GICv3 can be configured once during boot, and location of tables cannot
> be changed thereafter.
>
> The fix is to allow to reserve memory region in interrupt controller device
> property, and use it to do allocations.
>
> Signed-off-by: Pavel Tatashin <pasha.tatashin@soleen.com>
> ---
> drivers/irqchip/irq-gic-v3-its.c | 82 ++++++++++++++++++++++++++++----
> 1 file changed, 72 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c
> index d5f3508ca11f..aeda8760cc4e 100644
> --- a/drivers/irqchip/irq-gic-v3-its.c
> +++ b/drivers/irqchip/irq-gic-v3-its.c
> @@ -47,6 +47,54 @@
>
> static u32 lpi_id_bits;
>
> +/*
> + * Describes reserved memory region in interrupt controller.
> + * The memory reserved: [pa_start, pa_end)
> + */
> +struct of_resv {
> + unsigned long pa_start;
> + unsigned long pa_end;
> +};
> +
> +static struct page __init *get_of_page(struct of_resv *resv, unsigned long size)
> +{
> + unsigned long pa = ALIGN(resv->pa_start, size);
> + unsigned long pa_next = pa + size;
> +
> + /* Check if there is enough memory reserved to do another allocation */
> + if (pa_next > resv->pa_end)
> + return NULL;
> +
> + resv->pa_start = pa_next;
> + memset(phys_to_virt(pa), 0, size);
> +
> + return phys_to_page(pa);
> +}
> +
> +/*
> + * Memory controller might have a reserved memory region to be used for table
> + * allocations. This is a requirement for kexec reboots.
> + */
> +static void __init its_of_mem_region(struct device_node *node,
> + struct of_resv **resv,
> + struct of_resv *resv_buf)
> +{
> + struct device_node *np = of_parse_phandle(node, "memory-region", 0);
> + struct resource mem_res;
> +
> + if (!np)
> + return;
> +
> + if (of_address_to_resource(np, 0, &mem_res)) {
> + pr_warn("%pOF: address to resource failed\n", np);
> + return;
> + }
> +
> + resv_buf->pa_start = mem_res.start;
> + resv_buf->pa_end = mem_res.start + resource_size(&mem_res);
> + *resv = resv_buf;
> +}
> +
> /*
> * We allocate memory for PROPBASE to cover 2 ^ lpi_id_bits LPIs to
> * deal with (one configuration byte per interrupt). PENDBASE has to
> @@ -1665,7 +1713,7 @@ static int gic_reserve_range(phys_addr_t addr, unsigned long size)
> return 0;
> }
>
> -static int __init its_setup_lpi_prop_table(void)
> +static int __init its_setup_lpi_prop_table(struct of_resv *resv)
> {
> if (gic_rdists->flags & RDIST_FLAGS_RD_TABLES_PREALLOCATED) {
> unsigned long pa;
> @@ -1676,7 +1724,10 @@ static int __init its_setup_lpi_prop_table(void)
> lpi_id_bits = (val & GICR_PROPBASER_IDBITS_MASK) + 1;
>
> pa = val & GENMASK_ULL(51, 12);
> - va = memremap(pa, LPI_PROPBASE_SZ, MEMREMAP_WB);
> + if (resv)
> + va = phys_to_virt(pa);
> + else
> + va = memremap(pa, LPI_PROPBASE_SZ, MEMREMAP_WB);
> gic_rdists->prop_table_pa = pa;
> gic_rdists->prop_table_va = va;
> } else {
> @@ -1685,7 +1736,10 @@ static int __init its_setup_lpi_prop_table(void)
> lpi_id_bits = min_t(u32,
> GICD_TYPER_ID_BITS(gic_rdists->gicd_typer),
> ITS_MAX_LPI_NRBITS);
> - page = its_allocate_prop_table(GFP_NOWAIT);
> + if (resv)
> + page = get_of_page(resv, LPI_PROPBASE_SZ);
> + else
> + page = its_allocate_prop_table(GFP_NOWAIT);
> if (!page) {
> pr_err("Failed to allocate PROPBASE\n");
> return -ENOMEM;
> @@ -2009,7 +2063,8 @@ static void its_free_pending_table(struct page *pt)
>
> /*
> * Booting with kdump and LPIs enabled is generally fine. Any other
> - * case is wrong in the absence of firmware/EFI support.
> + * case is wrong in the absence of firmware/EFI support or reserve-memory
> + * in device tree for interrupt controller.
> */
> static bool enabled_lpis_allowed(void)
> {
> @@ -2023,7 +2078,7 @@ static bool enabled_lpis_allowed(void)
> return gic_check_reserved_range(addr, LPI_PROPBASE_SZ);
> }
>
> -static int __init allocate_lpi_tables(void)
> +static int __init allocate_lpi_tables(struct of_resv *resv)
> {
> u64 val;
> int err, cpu;
> @@ -2039,7 +2094,7 @@ static int __init allocate_lpi_tables(void)
> pr_info("GICv3: Using preallocated redistributor tables\n");
> }
>
> - err = its_setup_lpi_prop_table();
> + err = its_setup_lpi_prop_table(resv);
> if (err)
> return err;
>
> @@ -2051,7 +2106,10 @@ static int __init allocate_lpi_tables(void)
> for_each_possible_cpu(cpu) {
> struct page *pend_page;
>
> - pend_page = its_allocate_pending_table(GFP_NOWAIT);
> + if (resv)
> + pend_page = get_of_page(resv, LPI_PENDBASE_SZ);
> + else
> + pend_page = its_allocate_pending_table(GFP_NOWAIT);
> if (!pend_page) {
> pr_err("Failed to allocate PENDBASE for CPU%d\n", cpu);
> return -ENOMEM;
> @@ -3957,16 +4015,20 @@ int __init its_init(struct fwnode_handle *handle, struct rdists *rdists,
> struct irq_domain *parent_domain)
> {
> struct device_node *of_node;
> + struct of_resv resv_buf;
> + struct of_resv *resv = NULL;
> struct its_node *its;
> bool has_v4 = false;
> int err;
>
> its_parent = parent_domain;
> of_node = to_of_node(handle);
> - if (of_node)
> + if (of_node) {
> its_of_probe(of_node);
> - else
> + its_of_mem_region(of_node, &resv, &resv_buf);
> + } else {
> its_acpi_probe();
> + }
>
> if (list_empty(&its_nodes)) {
> pr_warn("ITS: No ITS available, not enabling LPIs\n");
> @@ -3975,7 +4037,7 @@ int __init its_init(struct fwnode_handle *handle, struct rdists *rdists,
>
> gic_rdists = rdists;
>
> - err = allocate_lpi_tables();
> + err = allocate_lpi_tables(resv);
> if (err)
> return err;
>
> --
> 2.23.0
>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related
* Re: [PATCH 1/8] coresight: etm4x: Fixes for ETM v4.4 architecture updates.
From: Mathieu Poirier @ 2019-08-26 21:47 UTC (permalink / raw)
To: Mike Leach; +Cc: coresight, linux-arm-kernel, suzuki.poulose
In-Reply-To: <20190819205720.24457-2-mike.leach@linaro.org>
Hi Mike,
On Mon, Aug 19, 2019 at 09:57:13PM +0100, Mike Leach wrote:
> ETMv4.4 adds in support for tracing secure EL2 (per arch 8.x updates).
What is the name of the ETMv4.4 document? I can only find up to 4.2 on line.
> Patch accounts for this new capability.
>
> Signed-off-by: Mike Leach <mike.leach@linaro.org>
> ---
> .../hwtracing/coresight/coresight-etm4x-sysfs.c | 12 ++++++------
> drivers/hwtracing/coresight/coresight-etm4x.c | 5 ++++-
> drivers/hwtracing/coresight/coresight-etm4x.h | 15 +++++++++++----
> 3 files changed, 21 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c b/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c
> index 219c10eb752c..b6984be0c515 100644
> --- a/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c
> +++ b/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c
> @@ -738,7 +738,7 @@ static ssize_t s_exlevel_vinst_show(struct device *dev,
> struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
> struct etmv4_config *config = &drvdata->config;
>
> - val = BMVAL(config->vinst_ctrl, 16, 19);
> + val = (config->vinst_ctrl & ETM_EXLEVEL_S_VICTLR_MASK) >> 16;
> return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
> }
>
> @@ -754,8 +754,8 @@ static ssize_t s_exlevel_vinst_store(struct device *dev,
> return -EINVAL;
>
> spin_lock(&drvdata->spinlock);
> - /* clear all EXLEVEL_S bits (bit[18] is never implemented) */
> - config->vinst_ctrl &= ~(BIT(16) | BIT(17) | BIT(19));
> + /* clear all EXLEVEL_S bits */
> + config->vinst_ctrl &= ~(ETM_EXLEVEL_S_VICTLR_MASK);
> /* enable instruction tracing for corresponding exception level */
> val &= drvdata->s_ex_level;
> config->vinst_ctrl |= (val << 16);
> @@ -773,7 +773,7 @@ static ssize_t ns_exlevel_vinst_show(struct device *dev,
> struct etmv4_config *config = &drvdata->config;
>
> /* EXLEVEL_NS, bits[23:20] */
> - val = BMVAL(config->vinst_ctrl, 20, 23);
> + val = (config->vinst_ctrl & ETM_EXLEVEL_NS_VICTLR_MASK) >> 20;
> return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
> }
>
> @@ -789,8 +789,8 @@ static ssize_t ns_exlevel_vinst_store(struct device *dev,
> return -EINVAL;
>
> spin_lock(&drvdata->spinlock);
> - /* clear EXLEVEL_NS bits (bit[23] is never implemented */
> - config->vinst_ctrl &= ~(BIT(20) | BIT(21) | BIT(22));
> + /* clear EXLEVEL_NS bits */
> + config->vinst_ctrl &= ~(ETM_EXLEVEL_NS_VICTLR_MASK);
> /* enable instruction tracing for corresponding exception level */
> val &= drvdata->ns_ex_level;
> config->vinst_ctrl |= (val << 20);
> diff --git a/drivers/hwtracing/coresight/coresight-etm4x.c b/drivers/hwtracing/coresight/coresight-etm4x.c
> index a128b5063f46..52b8876de157 100644
> --- a/drivers/hwtracing/coresight/coresight-etm4x.c
> +++ b/drivers/hwtracing/coresight/coresight-etm4x.c
> @@ -629,6 +629,7 @@ static void etm4_init_arch_data(void *info)
> * TRCARCHMAJ, bits[11:8] architecture major versin number
> */
> drvdata->arch = BMVAL(etmidr1, 4, 11);
> + drvdata->config.arch = drvdata->arch;
>
> /* maximum size of resources */
> etmidr2 = readl_relaxed(drvdata->base + TRCIDR2);
> @@ -780,6 +781,7 @@ static u64 etm4_get_ns_access_type(struct etmv4_config *config)
> static u64 etm4_get_access_type(struct etmv4_config *config)
> {
> u64 access_type = etm4_get_ns_access_type(config);
> + u64 s_hyp = (config->arch & 0x0f) >= 0x4 ? ETM_EXLEVEL_S_HYP : 0;
>
> /*
> * EXLEVEL_S, bits[11:8], don't trace anything happening
> @@ -787,7 +789,8 @@ static u64 etm4_get_access_type(struct etmv4_config *config)
> */
> access_type |= (ETM_EXLEVEL_S_APP |
> ETM_EXLEVEL_S_OS |
> - ETM_EXLEVEL_S_HYP);
> + s_hyp |
> + ETM_EXLEVEL_S_MON);
>
> return access_type;
> }
> diff --git a/drivers/hwtracing/coresight/coresight-etm4x.h b/drivers/hwtracing/coresight/coresight-etm4x.h
> index 4523f10ddd0f..60bc2fb5159b 100644
> --- a/drivers/hwtracing/coresight/coresight-etm4x.h
> +++ b/drivers/hwtracing/coresight/coresight-etm4x.h
> @@ -180,17 +180,22 @@
> /* PowerDown Control Register bits */
> #define TRCPDCR_PU BIT(3)
>
> -/* secure state access levels */
> +/* secure state access levels - TRCACATRn */
> #define ETM_EXLEVEL_S_APP BIT(8)
> #define ETM_EXLEVEL_S_OS BIT(9)
> -#define ETM_EXLEVEL_S_NA BIT(10)
> -#define ETM_EXLEVEL_S_HYP BIT(11)
> -/* non-secure state access levels */
> +#define ETM_EXLEVEL_S_HYP BIT(10)
> +#define ETM_EXLEVEL_S_MON BIT(11)
> +/* non-secure state access levels - TRCACATRn */
> #define ETM_EXLEVEL_NS_APP BIT(12)
> #define ETM_EXLEVEL_NS_OS BIT(13)
> #define ETM_EXLEVEL_NS_HYP BIT(14)
> #define ETM_EXLEVEL_NS_NA BIT(15)
>
> +/* secure / non secure masks - TRCVICTLR, IDR3 */
> +#define ETM_EXLEVEL_S_VICTLR_MASK GENMASK(19, 16)
> +/* NS MON (EL3) mode never implemented */
> +#define ETM_EXLEVEL_NS_VICTLR_MASK GENMASK(22, 20)
It is hard to say without documentation but shouldn't this be GENMASK(23, 20)?
> +
> /**
> * struct etmv4_config - configuration information related to an ETMv4
> * @mode: Controls various modes supported by this ETM.
> @@ -237,6 +242,7 @@
> * @vmid_mask0: VM ID comparator mask for comparator 0-3.
> * @vmid_mask1: VM ID comparator mask for comparator 4-7.
> * @ext_inp: External input selection.
> + * @arch: ETM architecture version (for arch dependent config).
> */
> struct etmv4_config {
> u32 mode;
> @@ -279,6 +285,7 @@ struct etmv4_config {
> u32 vmid_mask0;
> u32 vmid_mask1;
> u32 ext_inp;
> + u8 arch;
> };
>
> /**
> --
> 2.17.1
>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* Re: [PATCH RESEND 06/14] drm: rockchip: Provide ddc symlink in inno_hdmi sysfs directory
From: Heiko Stuebner @ 2019-08-26 22:14 UTC (permalink / raw)
To: Andrzej Pietrasiewicz, linux-kernel, Sam Ravnborg, Daniel Vetter,
Sean Paul
Cc: freedreno, linux-samsung-soc, linux-tegra, linux-rockchip, Leo Li,
linux-arm-msm, intel-gfx, Sandy Huang, dri-devel, Jonathan Hunter,
Eric Anholt, Thierry Reding, linux-mediatek, Alex Deucher, kernel,
Harry Wentland, linux-arm-kernel
In-Reply-To: <a1f778d328328f15300338600bb2400850717300.1566845537.git.andrzej.p@collabora.com>
Am Montag, 26. August 2019, 21:25:48 CEST schrieb Andrzej Pietrasiewicz:
> Use the ddc pointer provided by the generic connector.
>
> Signed-off-by: Andrzej Pietrasiewicz <andrzej.p@collabora.com>
> Acked-by: Sam Ravnborg <sam@ravnborg.org>
> Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* Re: [PATCH RESEND 05/14] drm: rockchip: Provide ddc symlink in rk3066_hdmi sysfs directory
From: Heiko Stuebner @ 2019-08-26 22:15 UTC (permalink / raw)
To: Andrzej Pietrasiewicz, amd-gfx
Cc: Neil Armstrong, David Airlie, dri-devel, linux-kernel,
Andrzej Hajda, kernel, David (ChunMing) Zhou, linux-samsung-soc,
linux-rockchip, Harry Wentland, Leo Li, linux-arm-msm, intel-gfx,
linux-mediatek, linux-tegra, Sean Paul, linux-arm-kernel,
Sandy Huang, Daniel Vetter, Alex Deucher, freedreno,
Christian König
In-Reply-To: <4cad24dde4508cec17483f983da08226ba7e48b0.1566845537.git.andrzej.p@collabora.com>
Am Montag, 26. August 2019, 21:25:47 CEST schrieb Andrzej Pietrasiewicz:
> Use the ddc pointer provided by the generic connector.
>
> Signed-off-by: Andrzej Pietrasiewicz <andrzej.p@collabora.com>
> Acked-by: Sam Ravnborg <sam@ravnborg.org>
> Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* Re: [PATCH 03/11] asm-generic: add generic dwarf definition
From: Changbin Du @ 2019-08-26 22:25 UTC (permalink / raw)
To: Peter Zijlstra
Cc: linux-arch, linux-s390, linux-parisc, Jonathan Corbet, linux-sh,
x86, linux-doc, linux-kernel, Steven Rostedt, linux-mips,
Ingo Molnar, Jessica Yu, sparclinux, linux-kbuild,
Thomas Gleixner, linuxppc-dev, linux-riscv, linux-arm-kernel,
Changbin Du
In-Reply-To: <20190826074215.GL2369@hirez.programming.kicks-ass.net>
Hi, Peter,
On Mon, Aug 26, 2019 at 09:42:15AM +0200, Peter Zijlstra wrote:
> On Sun, Aug 25, 2019 at 09:23:22PM +0800, Changbin Du wrote:
> > Add generic DWARF constant definitions. We will use it later.
> >
> > Signed-off-by: Changbin Du <changbin.du@gmail.com>
> > ---
> > include/asm-generic/dwarf.h | 199 ++++++++++++++++++++++++++++++++++++
> > 1 file changed, 199 insertions(+)
> > create mode 100644 include/asm-generic/dwarf.h
> >
> > diff --git a/include/asm-generic/dwarf.h b/include/asm-generic/dwarf.h
> > new file mode 100644
> > index 000000000000..c705633c2a8f
> > --- /dev/null
> > +++ b/include/asm-generic/dwarf.h
> > @@ -0,0 +1,199 @@
> > +/* SPDX-License-Identifier: GPL-2.0
> > + *
> > + * Architecture independent definitions of DWARF.
> > + *
> > + * Copyright (C) 2019 Changbin Du <changbin.du@gmail.com>
>
> You're claiming copyright on dwarf definitions? ;-)
>
> I'm thinking only Oracle was daft enough to think stuff like that was
> copyrightable.
>
ok, let me remove copyright line. I think SPDX claim is okay, right?
> Also; I think it would be very good to not use/depend on DWARF for this.
>
It only includes the DWARF expersion opcodes, not all of dwarf stuffs.
> You really don't need all of DWARF; I'm thikning you only need a few
> types; for location we already have regs_get_kernel_argument() which
> has all the logic to find the n-th argument.
>
regs_get_kernel_argument() can handle most cases, but if the size of one paramater
exceeds 64bit (it is rare in kernel), we must recalculate the locations. So I think
dwarf location descriptor is the most accurate one.
--
Cheers,
Changbin Du
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* Re: [RFC PATCH 5/7] arm64: smp: use generic SMP stop common code
From: Thomas Gleixner @ 2019-08-26 22:26 UTC (permalink / raw)
To: Cristian Marussi
Cc: linux-arch, mark.rutland, peterz, catalin.marinas, linux-kernel,
Christoph Hellwig, takahiro.akashi, james.morse,
hidehiro.kawai.ez, will, dave.martin, linux-arm-kernel
In-Reply-To: <c6a86709-6faf-bf84-08aa-c41dab61c58f@arm.com>
On Mon, 26 Aug 2019, Cristian Marussi wrote:
> On 8/26/19 4:32 PM, Christoph Hellwig wrote:
> > > +config ARCH_USE_COMMON_SMP_STOP
> > > + def_bool y if SMP
> >
> > The option belongs into common code and the arch code shoud only
> > select it.
> >
>
> In fact that was my first approach, but then I noticed that in kernel/ topdir
> there was no generic Kconfig but only subsystem specific ones:
>
> Kconfig.freezer Kconfig.hz Kconfig.locks Kconfig.preempt
arch/Kconfig
Thanks,
tglx
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* Re: [PATCH 2/8] coresight: etm4x: Fix input validation for sysfs.
From: Mathieu Poirier @ 2019-08-26 22:29 UTC (permalink / raw)
To: Mike Leach; +Cc: coresight, linux-arm-kernel, suzuki.poulose
In-Reply-To: <20190819205720.24457-3-mike.leach@linaro.org>
On Mon, Aug 19, 2019 at 09:57:14PM +0100, Mike Leach wrote:
> A number of issues are fixed relating to sysfs input validation:-
>
> 1) bb_ctrl_store() - incorrect compare of bit select field to absolute
> value. Reworked per ETMv4 specification.
> 2) seq_event_store() - incorrect mask value - register has two
> event values.
> 3) cyc_threshold_store() - must mask with max before checking min
> otherwise wrapped values can set illegal value below min.
> 4) res_ctrl_store() - update to mask off all res0 bits.
>
> Signed-off-by: Mike Leach <mike.leach@linaro.org>
> ---
> .../coresight/coresight-etm4x-sysfs.c | 21 ++++++++++++-------
> 1 file changed, 13 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c b/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c
> index b6984be0c515..fa1d6a938f6c 100644
> --- a/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c
> +++ b/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c
> @@ -652,10 +652,13 @@ static ssize_t cyc_threshold_store(struct device *dev,
>
> if (kstrtoul(buf, 16, &val))
> return -EINVAL;
> +
> + /* mask off max threshold before checking min value */
> + val &= ETM_CYC_THRESHOLD_MASK;
> if (val < drvdata->ccitmin)
> return -EINVAL;
>
> - config->ccctlr = val & ETM_CYC_THRESHOLD_MASK;
> + config->ccctlr = val;
> return size;
> }
> static DEVICE_ATTR_RW(cyc_threshold);
> @@ -686,14 +689,16 @@ static ssize_t bb_ctrl_store(struct device *dev,
> return -EINVAL;
> if (!drvdata->nr_addr_cmp)
> return -EINVAL;
> +
> /*
> - * Bit[7:0] selects which address range comparator is used for
> - * branch broadcast control.
> + * Bit[8] controls include(1) / exclude(0), bits[0-7] select
> + * individual range comparators. If include then at least 1
> + * range must be selected.
s/"must be selected"/"must be selected"
> */
> - if (BMVAL(val, 0, 7) > drvdata->nr_addr_cmp)
> + if ((val & BIT(8)) && (BMVAL(val, 0, 7) == 0))
> return -EINVAL;
>
> - config->bb_ctrl = val;
> + config->bb_ctrl = val & GENMASK(8, 0);
> return size;
> }
> static DEVICE_ATTR_RW(bb_ctrl);
> @@ -1324,8 +1329,8 @@ static ssize_t seq_event_store(struct device *dev,
>
> spin_lock(&drvdata->spinlock);
> idx = config->seq_idx;
> - /* RST, bits[7:0] */
> - config->seq_ctrl[idx] = val & 0xFF;
> + /* Seq control has two masks B[15:5] F[7:0] */
> + config->seq_ctrl[idx] = val & 0xFFFF;
> spin_unlock(&drvdata->spinlock);
> return size;
> }
> @@ -1580,7 +1585,7 @@ static ssize_t res_ctrl_store(struct device *dev,
> if (idx % 2 != 0)
> /* PAIRINV, bit[21] */
> val &= ~BIT(21);
> - config->res_ctrl[idx] = val;
> + config->res_ctrl[idx] = val & GENMASK(21, 0);
> spin_unlock(&drvdata->spinlock);
> return size;
> }
With the above:
Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org>
> --
> 2.17.1
>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* Re: [PATCH 05/11] ftrace: create memcache for hash entries
From: Changbin Du @ 2019-08-26 22:35 UTC (permalink / raw)
To: Peter Zijlstra
Cc: linux-arch, linux-s390, linux-parisc, Jonathan Corbet, linux-sh,
x86, linux-doc, linux-kernel, Steven Rostedt, linux-mips,
Ingo Molnar, Jessica Yu, sparclinux, linux-kbuild,
Thomas Gleixner, linuxppc-dev, linux-riscv, linux-arm-kernel,
Changbin Du
In-Reply-To: <20190826074437.GM2369@hirez.programming.kicks-ass.net>
On Mon, Aug 26, 2019 at 09:44:37AM +0200, Peter Zijlstra wrote:
> On Sun, Aug 25, 2019 at 09:23:24PM +0800, Changbin Du wrote:
> > When CONFIG_FTRACE_FUNC_PROTOTYPE is enabled, thousands of
> > ftrace_func_entry instances are created. So create a dedicated
> > memcache to enhance performance.
> >
> > Signed-off-by: Changbin Du <changbin.du@gmail.com>
> > ---
> > kernel/trace/ftrace.c | 17 ++++++++++++++++-
> > 1 file changed, 16 insertions(+), 1 deletion(-)
> >
> > diff --git a/kernel/trace/ftrace.c b/kernel/trace/ftrace.c
> > index a314f0768b2c..cfcb8dad93ea 100644
> > --- a/kernel/trace/ftrace.c
> > +++ b/kernel/trace/ftrace.c
> > @@ -94,6 +94,8 @@ struct ftrace_ops *function_trace_op __read_mostly = &ftrace_list_end;
> > /* What to set function_trace_op to */
> > static struct ftrace_ops *set_function_trace_op;
> >
> > +struct kmem_cache *hash_entry_cache;
> > +
> > static bool ftrace_pids_enabled(struct ftrace_ops *ops)
> > {
> > struct trace_array *tr;
> > @@ -1169,7 +1171,7 @@ static int add_hash_entry(struct ftrace_hash *hash, unsigned long ip,
> > {
> > struct ftrace_func_entry *entry;
> >
> > - entry = kmalloc(sizeof(*entry), GFP_KERNEL);
> > + entry = kmem_cache_alloc(hash_entry_cache, GFP_KERNEL);
> > if (!entry)
> > return -ENOMEM;
> >
> > @@ -6153,6 +6155,15 @@ void __init ftrace_init(void)
> > if (ret)
> > goto failed;
> >
> > + hash_entry_cache = kmem_cache_create("ftrace-hash",
> > + sizeof(struct ftrace_func_entry),
> > + sizeof(struct ftrace_func_entry),
> > + 0, NULL);
> > + if (!hash_entry_cache) {
> > + pr_err("failed to create ftrace hash entry cache\n");
> > + goto failed;
> > + }
>
> Wait what; you already have then in the binary image, now you're
> allocating extra memory for each of them?
>
No, here we only allocate ftrace hash entries. The prototype data is not copied.
The entry->priv points to prototype data in binary.
> Did you look at what ORC does? Is the binary search really not fast
> enough?
For ftrace, binary search is not enough. Just like the hash tables
(ftrace_graph_notrace_hash, ftrace_graph_hash) we already have which is used to
filter traced functions.
--
Cheers,
Changbin Du
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* Re: [PATCH v2 2/5] soc: amlogic: Add support for Everything-Else power domains controller
From: Martin Blumenstingl @ 2019-08-26 22:40 UTC (permalink / raw)
To: Neil Armstrong
Cc: ulf.hansson, linux-pm, khilman, linux-kernel, linux-amlogic,
linux-arm-kernel
In-Reply-To: <f6e7e4de-e1b7-f642-07cb-fa029ff2a883@baylibre.com>
Hi Neil,
On Mon, Aug 26, 2019 at 10:10 AM Neil Armstrong <narmstrong@baylibre.com> wrote:
>
> On 25/08/2019 23:10, Martin Blumenstingl wrote:
> > Hi Neil,
> >
> > thank you for this update
> > I haven't tried this on the 32-bit SoCs yet, but I am confident that I
> > can make it work by "just" adding the SoC specific bits!
> >
> > On Fri, Aug 23, 2019 at 11:06 AM Neil Armstrong <narmstrong@baylibre.com> wrote:
> > [...]
> >> +/* AO Offsets */
> >> +
> >> +#define AO_RTI_GEN_PWR_SLEEP0 (0x3a << 2)
> >> +#define AO_RTI_GEN_PWR_ISO0 (0x3b << 2)
> >> +
> >> +/* HHI Offsets */
> >> +
> >> +#define HHI_MEM_PD_REG0 (0x40 << 2)
> >> +#define HHI_VPU_MEM_PD_REG0 (0x41 << 2)
> >> +#define HHI_VPU_MEM_PD_REG1 (0x42 << 2)
> >> +#define HHI_VPU_MEM_PD_REG3 (0x43 << 2)
> >> +#define HHI_VPU_MEM_PD_REG4 (0x44 << 2)
> >> +#define HHI_AUDIO_MEM_PD_REG0 (0x45 << 2)
> >> +#define HHI_NANOQ_MEM_PD_REG0 (0x46 << 2)
> >> +#define HHI_NANOQ_MEM_PD_REG1 (0x47 << 2)
> >> +#define HHI_VPU_MEM_PD_REG2 (0x4d << 2)
> > should we switch to the actual register offsets like we did in the
> > clock drivers?
>
> I find it simpler to refer to the numbers in the documentation...
OK, I have no strong preference here
for the 32-bit SoCs I will need to use the offsets based on the
"amlogic,meson8b-pmu", "syscon" [0], so these will be magic anyways
[...]
> >> +#define VPU_HHI_MEMPD(__reg) \
> >> + { __reg, BIT(8) }, \
> >> + { __reg, BIT(9) }, \
> >> + { __reg, BIT(10) }, \
> >> + { __reg, BIT(11) }, \
> >> + { __reg, BIT(12) }, \
> >> + { __reg, BIT(13) }, \
> >> + { __reg, BIT(14) }, \
> >> + { __reg, BIT(15) }
> > the Amlogic implementation from buildroot-openlinux-A113-201901 (the
> > latest one I have)
> > kernel/aml-4.9/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/hdmi_tx_hw.c
> > uses:
> > hd_set_reg_bits(P_HHI_MEM_PD_REG0, 0, 8, 8)
> > that basically translates to: GENMASK(15, 8) (which means we could
> > drop this macro)
> >
> > the datasheet also states: 15~8 [...] HDMI memory PD (as a single
> > 8-bit wide register)
>
> Yep, but the actual code setting the VPU power domain is in u-boot :
>
> drivers/vpu/aml_vpu_power_init.c:
> 108 for (i = 8; i < 16; i++) {
> 109 vpu_hiu_setb(HHI_MEM_PD_REG0, 0, i, 1);
> 110 udelay(5);
> 111 }
>
> the linux code is like never used here, my preference goes to the u-boot code
> implementation.
I see, let's keep your implementation then
> >
> > [...]
> >> +static struct meson_ee_pwrc_domain_desc g12a_pwrc_domains[] = {
> >> + [PWRC_G12A_VPU_ID] = VPU_PD("VPU", &g12a_pwrc_vpu, g12a_pwrc_mem_vpu,
> >> + pwrc_ee_get_power, 11, 2),
> >> + [PWRC_G12A_ETH_ID] = MEM_PD("ETH", g12a_pwrc_mem_eth),
> >> +};
> >> +
> >> +static struct meson_ee_pwrc_domain_desc sm1_pwrc_domains[] = {
> >> + [PWRC_SM1_VPU_ID] = VPU_PD("VPU", &sm1_pwrc_vpu, sm1_pwrc_mem_vpu,
> >> + pwrc_ee_get_power, 11, 2),
> >> + [PWRC_SM1_NNA_ID] = TOP_PD("NNA", &sm1_pwrc_nna, sm1_pwrc_mem_nna,
> >> + pwrc_ee_get_power),
> >> + [PWRC_SM1_USB_ID] = TOP_PD("USB", &sm1_pwrc_usb, sm1_pwrc_mem_usb,
> >> + pwrc_ee_get_power),
> >> + [PWRC_SM1_PCIE_ID] = TOP_PD("PCI", &sm1_pwrc_pci, sm1_pwrc_mem_pcie,
> >> + pwrc_ee_get_power),
> >> + [PWRC_SM1_GE2D_ID] = TOP_PD("GE2D", &sm1_pwrc_ge2d, sm1_pwrc_mem_ge2d,
> >> + pwrc_ee_get_power),
> >> + [PWRC_SM1_AUDIO_ID] = MEM_PD("AUDIO", sm1_pwrc_mem_audio),
> >> + [PWRC_SM1_ETH_ID] = MEM_PD("ETH", g12a_pwrc_mem_eth),
> >> +};
> > my impression: I find this hard to read as it merges the TOP and
> > Memory PD domains from above, adding some seemingly random "11, 2" for
> > the VPU PD as well as pwrc_ee_get_power for some of the power domains
> > personally I like the way we describe clk_regmap because it's easy to
> > read (even though it adds a bit of boilerplate). I'm not sure if we
> > can make it work here, but this (not compile tested) is what I have in
> > mind (I chose two random power domains):
> > [PWRC_SM1_VPU_ID] = {
> > .name = "VPU",
> > .top_pd = SM1_EE_PD(8),
> > .mem_pds = {
> > VPU_MEMPD(HHI_VPU_MEM_PD_REG0),
> > VPU_MEMPD(HHI_VPU_MEM_PD_REG1),
> > VPU_MEMPD(HHI_VPU_MEM_PD_REG2),
> > VPU_MEMPD(HHI_VPU_MEM_PD_REG3),
> > { HHI_VPU_MEM_PD_REG4, GENMASK(1, 0) },
> > { HHI_VPU_MEM_PD_REG4, GENMASK(3, 2) },
> > { HHI_VPU_MEM_PD_REG4, GENMASK(5, 4) },
> > { HHI_VPU_MEM_PD_REG4, GENMASK(7, 6) },
> > { HHI_MEM_PD_REG0, GENMASK(15, 8) },
> > },
> > .num_mem_pds = 9,
> > .reset_names_count = 11,
> > .clk_names_count = 2,
> > },
> > [PWRC_SM1_ETH_ID] = {
> > .name = "ETH",
> > .mem_pds = { HHI_MEM_PD_REG0, GENMASK(3, 2) },
> > .num_mem_pds = 1,
> > },
> > ...
> >
> > I'd like to get Kevin's feedback on this
> > what you have right now is probably good enough for the initial
> > version of this driver. I'm bringing this discussion up because we
> > will add support for more SoCs to this driver (we migrate GX over to
> > it and I want to add 32-bit SoC support, which probably means at least
> > Meson8 - assuming they kept the power domains identical between
> > Meson8/8b/8m2).
>
> I find it more compact, but nothing is set in stone, you can refactor this as
> will when adding meson8 support, no problems here.
OK. if Kevin (or someone else) has feedback on this then I don't have
to waste time if it turns out that it's not a great idea ;)
> >
> > [...]
> >> +struct meson_ee_pwrc_domain {
> >> + struct generic_pm_domain base;
> >> + bool enabled;
> >> + struct meson_ee_pwrc *pwrc;
> >> + struct meson_ee_pwrc_domain_desc desc;
> >> + struct clk_bulk_data *clks;
> >> + int num_clks;
> >> + struct reset_control *rstc;
> >> + int num_rstc;
> >> +};
> >> +
> >> +struct meson_ee_pwrc {
> >> + struct regmap *regmap_ao;
> >> + struct regmap *regmap_hhi;
> >> + struct meson_ee_pwrc_domain *domains;
> >> + struct genpd_onecell_data xlate;
> >> +};
> > (my impressions on this: I was surprised to find more structs down
> > here, I expected them to be together with the other structs further
> > up)
>
> These are the "live" structures, opposed to the static structures defining the
> data and these are allocated and filled a probe time.
I see, thanks for the explanation
> I dislike changing static global data at runtime, this is why I clearly separated both.
I didn't mean to make them static - the thing that caught my eye was
that some of the structs are defined at the top of the driver while
these two are define much further down
I am used to having all struct definitions in one place
> >
> >> +static bool pwrc_ee_get_power(struct meson_ee_pwrc_domain *pwrc_domain)
> >> +{
> >> + u32 reg;
> >> +
> >> + regmap_read(pwrc_domain->pwrc->regmap_ao,
> >> + pwrc_domain->desc.top_pd->sleep_reg, ®);
> >> +
> >> + return (reg & pwrc_domain->desc.top_pd->sleep_mask);
> > should this also check for top_pd->iso_* as well as mem_pd->*?
> > if the top_pd part was optional we could even use the get_power
> > callback for *all* power domains in this driver (right now audio and
> > Ethernet don't have any get_power callback)
>
> We could, but how should we handle if one unexpected bit is set ? No idea...
hmm, I see
if we need it for other power domains then we can still implement it,
so it's good for now
[...]
> > bonus question: what about the video decoder power domains?
> > here is an example from vdec_1_start
> > (drivers/staging/media/meson/vdec/vdec_1.c):
> > /* Enable power for VDEC_1 */
> > regmap_update_bits(core->regmap_ao, AO_RTI_GEN_PWR_SLEEP0,
> > GEN_PWR_VDEC_1, 0);
> > usleep_range(10, 20);
> > [...]
> > /* enable VDEC Memories */
> > amvdec_write_dos(core, DOS_MEM_PD_VDEC, 0);
> > /* Remove VDEC1 Isolation */
> > regmap_write(core->regmap_ao, AO_RTI_GEN_PWR_ISO0, 0);
> >
> > (my point here is that it mixes video decoder "DOS" registers with
> > AO_RTI_GEN_PWR registers)
> > do we also want to add support for these "DOS" power domains to the
> > meson-ee-pwrc driver?
> > what about the AO_RTI_GEN_PWR part then - should we keep management
> > for the video decoder power domain bits in AO_RTI_GEN_PWR as part of
> > the video decoder driver?
>
> I left the decoders power domains aside so we can discuss it later on,
> we should expose multiple power domains, but the driver would need to
> be changed to support multiple power domains. But will loose the ability
> to enable/disable each domain at will unless it created a sub-device for
> each decoder and attaches the domain to to each device and use runtime pm.
>
> It's simpler to discuss it later on !
OK - does this mean you and/or Maxime have "discuss decoder power
domains" on your (long) TODO-list or do you want me to open this
discussion after this driver is merged?
Martin
[0] https://www.kernel.org/doc/Documentation/devicetree/bindings/arm/amlogic/pmu.txt
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* Re: [PATCH 01/11] ftrace: move recordmcount tools to scripts/ftrace
From: Steven Rostedt @ 2019-08-26 22:44 UTC (permalink / raw)
To: Changbin Du
Cc: linux-arch, Jonathan Corbet, linux-parisc, linux-doc, linux-sh,
linux-s390, John F . Reiser, x86, linux-kernel, linux-mips,
Ingo Molnar, Jessica Yu, sparclinux, linux-kbuild,
Thomas Gleixner, linuxppc-dev, linux-riscv, linux-arm-kernel,
Matt Helsley
In-Reply-To: <20190825132330.5015-2-changbin.du@gmail.com>
On Sun, 25 Aug 2019 21:23:20 +0800
Changbin Du <changbin.du@gmail.com> wrote:
> Move ftrace tools to its own directory. We will add another tool later.
>
> Cc: John F. Reiser <jreiser@BitWagon.com>
> Signed-off-by: Changbin Du <changbin.du@gmail.com>
> ---
> scripts/.gitignore | 1 -
> scripts/Makefile | 2 +-
> scripts/Makefile.build | 10 +++++-----
> scripts/ftrace/.gitignore | 4 ++++
> scripts/ftrace/Makefile | 4 ++++
> scripts/{ => ftrace}/recordmcount.c | 0
> scripts/{ => ftrace}/recordmcount.h | 0
> scripts/{ => ftrace}/recordmcount.pl | 0
> 8 files changed, 14 insertions(+), 7 deletions(-)
> create mode 100644 scripts/ftrace/.gitignore
> create mode 100644 scripts/ftrace/Makefile
> rename scripts/{ => ftrace}/recordmcount.c (100%)
> rename scripts/{ => ftrace}/recordmcount.h (100%)
> rename scripts/{ => ftrace}/recordmcount.pl (100%)
> mode change 100755 => 100644
Note, we are in the process of merging recordmcount with objtool. It
would be better to continue from that work.
http://lkml.kernel.org/r/2767f55f4a5fbf30ba0635aed7a9c5ee92ac07dd.1563992889.git.mhelsley@vmware.com
-- Steve
>
> diff --git a/scripts/.gitignore b/scripts/.gitignore
> index 17f8cef88fa8..1b5b5d595d80 100644
> --- a/scripts/.gitignore
> +++ b/scripts/.gitignore
> @@ -6,7 +6,6 @@ conmakehash
> kallsyms
> pnmtologo
> unifdef
> -recordmcount
> sortextable
> asn1_compiler
> extract-cert
> diff --git a/scripts/Makefile b/scripts/Makefile
> index 16bcb8087899..d5992def49a8 100644
> --- a/scripts/Makefile
> +++ b/scripts/Makefile
> @@ -14,7 +14,6 @@ hostprogs-$(CONFIG_BUILD_BIN2C) += bin2c
> hostprogs-$(CONFIG_KALLSYMS) += kallsyms
> hostprogs-$(CONFIG_LOGO) += pnmtologo
> hostprogs-$(CONFIG_VT) += conmakehash
> -hostprogs-$(BUILD_C_RECORDMCOUNT) += recordmcount
> hostprogs-$(CONFIG_BUILDTIME_EXTABLE_SORT) += sortextable
> hostprogs-$(CONFIG_ASN1) += asn1_compiler
> hostprogs-$(CONFIG_MODULE_SIG) += sign-file
> @@ -34,6 +33,7 @@ hostprogs-y += unifdef
> subdir-$(CONFIG_GCC_PLUGINS) += gcc-plugins
> subdir-$(CONFIG_MODVERSIONS) += genksyms
> subdir-$(CONFIG_SECURITY_SELINUX) += selinux
> +subdir-$(CONFIG_FTRACE) += ftrace
>
> # Let clean descend into subdirs
> subdir- += basic dtc gdb kconfig mod package
> diff --git a/scripts/Makefile.build b/scripts/Makefile.build
> index 2f66ed388d1c..67558983c518 100644
> --- a/scripts/Makefile.build
> +++ b/scripts/Makefile.build
> @@ -188,18 +188,18 @@ endif
> # files, including recordmcount.
> sub_cmd_record_mcount = \
> if [ $(@) != "scripts/mod/empty.o" ]; then \
> - $(objtree)/scripts/recordmcount $(RECORDMCOUNT_FLAGS) "$(@)"; \
> + $(objtree)/scripts/ftrace/recordmcount $(RECORDMCOUNT_FLAGS) "$(@)"; \
> fi;
> -recordmcount_source := $(srctree)/scripts/recordmcount.c \
> - $(srctree)/scripts/recordmcount.h
> +recordmcount_source := $(srctree)/scripts/ftrace/recordmcount.c \
> + $(srctree)/scripts/ftrace/recordmcount.h
> else
> -sub_cmd_record_mcount = perl $(srctree)/scripts/recordmcount.pl "$(ARCH)" \
> +sub_cmd_record_mcount = perl $(srctree)/scripts/ftrace/recordmcount.pl "$(ARCH)" \
> "$(if $(CONFIG_CPU_BIG_ENDIAN),big,little)" \
> "$(if $(CONFIG_64BIT),64,32)" \
> "$(OBJDUMP)" "$(OBJCOPY)" "$(CC) $(KBUILD_CPPFLAGS) $(KBUILD_CFLAGS)" \
> "$(LD) $(KBUILD_LDFLAGS)" "$(NM)" "$(RM)" "$(MV)" \
> "$(if $(part-of-module),1,0)" "$(@)";
> -recordmcount_source := $(srctree)/scripts/recordmcount.pl
> +recordmcount_source := $(srctree)/scripts/ftrace/recordmcount.pl
> endif # BUILD_C_RECORDMCOUNT
> cmd_record_mcount = $(if $(findstring $(strip $(CC_FLAGS_FTRACE)),$(_c_flags)), \
> $(sub_cmd_record_mcount))
> diff --git a/scripts/ftrace/.gitignore b/scripts/ftrace/.gitignore
> new file mode 100644
> index 000000000000..54d582c8faad
> --- /dev/null
> +++ b/scripts/ftrace/.gitignore
> @@ -0,0 +1,4 @@
> +#
> +# Generated files
> +#
> +recordmcount
> diff --git a/scripts/ftrace/Makefile b/scripts/ftrace/Makefile
> new file mode 100644
> index 000000000000..6797e51473e5
> --- /dev/null
> +++ b/scripts/ftrace/Makefile
> @@ -0,0 +1,4 @@
> +# SPDX-License-Identifier: GPL-2.0
> +
> +hostprogs-$(BUILD_C_RECORDMCOUNT) += recordmcount
> +always := $(hostprogs-y)
> diff --git a/scripts/recordmcount.c b/scripts/ftrace/recordmcount.c
> similarity index 100%
> rename from scripts/recordmcount.c
> rename to scripts/ftrace/recordmcount.c
> diff --git a/scripts/recordmcount.h b/scripts/ftrace/recordmcount.h
> similarity index 100%
> rename from scripts/recordmcount.h
> rename to scripts/ftrace/recordmcount.h
> diff --git a/scripts/recordmcount.pl b/scripts/ftrace/recordmcount.pl
> old mode 100755
> new mode 100644
> similarity index 100%
> rename from scripts/recordmcount.pl
> rename to scripts/ftrace/recordmcount.pl
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* Re: [PATCH 3/8] coresight: etm4x: Add missing API to set EL match on address filters
From: Mathieu Poirier @ 2019-08-26 22:59 UTC (permalink / raw)
To: Mike Leach; +Cc: coresight, linux-arm-kernel, suzuki.poulose
In-Reply-To: <20190819205720.24457-4-mike.leach@linaro.org>
On Mon, Aug 19, 2019 at 09:57:15PM +0100, Mike Leach wrote:
> TRCACATRn registers have match bits for secure and non-secure exception
> levels which are not accessible by the sysfs API.
> This adds a new sysfs parameter to enable this - addr_exlevel_s_ns.
>
> Signed-off-by: Mike Leach <mike.leach@linaro.org>
> ---
> .../coresight/coresight-etm4x-sysfs.c | 39 +++++++++++++++++++
> 1 file changed, 39 insertions(+)
>
> diff --git a/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c b/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c
> index fa1d6a938f6c..7eab5d7d0b62 100644
> --- a/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c
> +++ b/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c
> @@ -1233,6 +1233,44 @@ static ssize_t addr_context_store(struct device *dev,
> }
> static DEVICE_ATTR_RW(addr_context);
>
> +static ssize_t addr_exlevel_s_ns_show(struct device *dev,
> + struct device_attribute *attr,
> + char *buf)
> +{
> + u8 idx;
> + unsigned long val;
> + struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
> + struct etmv4_config *config = &drvdata->config;
> +
> + spin_lock(&drvdata->spinlock);
> + idx = config->addr_idx;
> + val = BMVAL(config->addr_acc[idx], 14, 8);
> + spin_unlock(&drvdata->spinlock);
> + return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
> +}
> +
> +static ssize_t addr_exlevel_s_ns_store(struct device *dev,
> + struct device_attribute *attr,
> + const char *buf, size_t size)
> +{
> + u8 idx;
> + unsigned long val;
> + struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
> + struct etmv4_config *config = &drvdata->config;
> +
> + if (kstrtoul(buf, 16, &val))
> + return -EINVAL;
> +
> + spin_lock(&drvdata->spinlock);
> + idx = config->addr_idx;
> + /* clear Exlevel_ns & Exlevel_s bits[14:12, 11:8] */
> + config->addr_acc[idx] &= ~(GENMASK(14, 8));
> + config->addr_acc[idx] |= (val << 8);
> + spin_unlock(&drvdata->spinlock);
> + return size;
> +}
> +static DEVICE_ATTR_RW(addr_exlevel_s_ns);
> +
> static ssize_t seq_idx_show(struct device *dev,
> struct device_attribute *attr,
> char *buf)
> @@ -2038,6 +2076,7 @@ static struct attribute *coresight_etmv4_attrs[] = {
> &dev_attr_addr_stop.attr,
> &dev_attr_addr_ctxtype.attr,
> &dev_attr_addr_context.attr,
> + &dev_attr_addr_exlevel_s_ns.attr,
> &dev_attr_seq_idx.attr,
> &dev_attr_seq_state.attr,
> &dev_attr_seq_event.attr,
I'm ok with this patch but the new entry needs to be documented in [1]. But
before moving forward with that I'm wondering if this is the way to go. Would
it be better to consolidate type, ctxtype, context and exlevel_s_ns in a single
entry, say addr_acc_type? We'd shed a fair amount of code and make it more
simple for users to configure.
[1]. Documentation/ABI/testing/sysfs-bus-coresight-devices-etm4x
> --
> 2.17.1
>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* Re: [PATCH -next] mmc: aspeed: Fix return value check in aspeed_sdc_probe()
From: Andrew Jeffery @ 2019-08-26 23:37 UTC (permalink / raw)
To: Dan Carpenter, Wei Yongjun
Cc: Ulf Hansson, linux-aspeed, kernel-janitors, linux-mmc,
Adrian Hunter, Joel Stanley, linux-arm-kernel
In-Reply-To: <20190826130343.GA23584@kadam>
On Mon, 26 Aug 2019, at 22:34, Dan Carpenter wrote:
> > Fixes: 09eed7fffd33 ("mmc: Add support for the ASPEED SD controller")
> ^^^^
> When we're adding new files, could we use the prefix for the new driver
> instead of just the subsystem? "mmc: aspeed: Add new driver"?
> Otherwise it's tricky to know what people want for the driver.
I don't have any issue with the request, but I don't understand this last
bit. What do you mean by "it's tricky to know what people want for the
driver"?
Andrew
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* Re: [PATCH -next] mmc: aspeed: Fix return value check in aspeed_sdc_probe()
From: Andrew Jeffery @ 2019-08-26 23:40 UTC (permalink / raw)
To: Wei Yongjun, Adrian Hunter, Ulf Hansson, Joel Stanley
Cc: kernel-janitors, linux-mmc, linux-arm-kernel, linux-aspeed
In-Reply-To: <20190826120013.183435-1-weiyongjun1@huawei.com>
On Mon, 26 Aug 2019, at 21:27, Wei Yongjun wrote:
> In case of error, the function of_platform_device_create() returns
> NULL pointer not ERR_PTR(). The IS_ERR() test in the return value
> check should be replaced with NULL test.
>
> Fixes: 09eed7fffd33 ("mmc: Add support for the ASPEED SD controller")
> Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com>
> ---
> drivers/mmc/host/sdhci-of-aspeed.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/mmc/host/sdhci-of-aspeed.c
> b/drivers/mmc/host/sdhci-of-aspeed.c
> index 8bb095ca2fa9..d5acb5afc50f 100644
> --- a/drivers/mmc/host/sdhci-of-aspeed.c
> +++ b/drivers/mmc/host/sdhci-of-aspeed.c
> @@ -261,9 +261,9 @@ static int aspeed_sdc_probe(struct platform_device
> *pdev)
> struct platform_device *cpdev;
>
> cpdev = of_platform_device_create(child, NULL, &pdev->dev);
> - if (IS_ERR(cpdev)) {
> + if (!cpdev) {
> of_node_put(child);
> - ret = PTR_ERR(cpdev);
> + ret = -ENODEV;
> goto err_clk;
> }
> }
I ... have no idea why I wrote it that way. I must have just assumed it returned
an ERR_PTR(). Thanks for finding/fixing that.
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* Re: [PATCH v2 4/4] dt-bindings/watchdog: Add access_cs0 option for alt-boot
From: Andrew Jeffery @ 2019-08-26 23:57 UTC (permalink / raw)
To: Ivan Mikhaylov, Guenter Roeck, Wim Van Sebroeck
Cc: Mark Rutland, devicetree, linux-watchdog, linux-aspeed, openbmc,
Alexander Amelkin, linux-kernel, Rob Herring, Joel Stanley,
linux-arm-kernel
In-Reply-To: <20190826104636.19324-5-i.mikhaylov@yadro.com>
On Mon, 26 Aug 2019, at 20:17, Ivan Mikhaylov wrote:
> The option for the ast2400/2500 to get access to CS0 at runtime.
>
> Signed-off-by: Ivan Mikhaylov <i.mikhaylov@yadro.com>
> ---
> Documentation/devicetree/bindings/watchdog/aspeed-wdt.txt | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/watchdog/aspeed-wdt.txt
> b/Documentation/devicetree/bindings/watchdog/aspeed-wdt.txt
> index c5077a1f5cb3..023a9b578df6 100644
> --- a/Documentation/devicetree/bindings/watchdog/aspeed-wdt.txt
> +++ b/Documentation/devicetree/bindings/watchdog/aspeed-wdt.txt
> @@ -34,6 +34,13 @@ Optional properties:
> engine is responsible for this.
>
> - aspeed,alt-boot: If property is present then boot from alternate
> block.
> + At alternate side 'access_cs0' sysfs file
> provides:
Why are we talking about sysfs in the devicetree binding? This patch
doesn't seem right to me.
Also if we're not supporting the aspeed,alt-boot property we should
probably document it as deprecated rather than making it disappear,
unless you're going to fix the systems that are using it.
Andrew
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* Re: [PATCH v2 4/4] dt-bindings/watchdog: Add access_cs0 option for alt-boot
From: Guenter Roeck @ 2019-08-27 0:08 UTC (permalink / raw)
To: Andrew Jeffery, Ivan Mikhaylov, Wim Van Sebroeck
Cc: Mark Rutland, devicetree, linux-watchdog, linux-aspeed, openbmc,
Alexander Amelkin, linux-kernel, Rob Herring, Joel Stanley,
linux-arm-kernel
In-Reply-To: <f33aa4b8-6d06-4226-8859-ce21a4b8728b@www.fastmail.com>
On 8/26/19 4:57 PM, Andrew Jeffery wrote:
>
>
> On Mon, 26 Aug 2019, at 20:17, Ivan Mikhaylov wrote:
>> The option for the ast2400/2500 to get access to CS0 at runtime.
>>
>> Signed-off-by: Ivan Mikhaylov <i.mikhaylov@yadro.com>
>> ---
>> Documentation/devicetree/bindings/watchdog/aspeed-wdt.txt | 7 +++++++
>> 1 file changed, 7 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/watchdog/aspeed-wdt.txt
>> b/Documentation/devicetree/bindings/watchdog/aspeed-wdt.txt
>> index c5077a1f5cb3..023a9b578df6 100644
>> --- a/Documentation/devicetree/bindings/watchdog/aspeed-wdt.txt
>> +++ b/Documentation/devicetree/bindings/watchdog/aspeed-wdt.txt
>> @@ -34,6 +34,13 @@ Optional properties:
>> engine is responsible for this.
>>
>> - aspeed,alt-boot: If property is present then boot from alternate
>> block.
>> + At alternate side 'access_cs0' sysfs file
>> provides:
>
> Why are we talking about sysfs in the devicetree binding? This patch
> doesn't seem right to me.
>
Correct; this is the wrong document. The attribute also will need
to be better explained. "At alternate side" does not explain (at
least not at all clearly enough) that the attribute only exists
if the system has booted from the alternate flash / block.
> Also if we're not supporting the aspeed,alt-boot property we should
> probably document it as deprecated rather than making it disappear,
> unless you're going to fix the systems that are using it.
>
Sorry, you lost me here. Where is it made to disappear ?
Guenter
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* Re: [PATCH v2 4/4] dt-bindings/watchdog: Add access_cs0 option for alt-boot
From: Andrew Jeffery @ 2019-08-27 0:11 UTC (permalink / raw)
To: Guenter Roeck, Ivan Mikhaylov, Wim Van Sebroeck
Cc: Mark Rutland, devicetree, linux-watchdog, linux-aspeed, openbmc,
Alexander Amelkin, linux-kernel, Rob Herring, Joel Stanley,
linux-arm-kernel
In-Reply-To: <d040fee1-d12d-9ac9-a72a-e76137a4579f@roeck-us.net>
On Tue, 27 Aug 2019, at 09:38, Guenter Roeck wrote:
> On 8/26/19 4:57 PM, Andrew Jeffery wrote:
> >
> >
> > On Mon, 26 Aug 2019, at 20:17, Ivan Mikhaylov wrote:
> >> The option for the ast2400/2500 to get access to CS0 at runtime.
> >>
> >> Signed-off-by: Ivan Mikhaylov <i.mikhaylov@yadro.com>
> >> ---
> >> Documentation/devicetree/bindings/watchdog/aspeed-wdt.txt | 7 +++++++
> >> 1 file changed, 7 insertions(+)
> >>
> >> diff --git a/Documentation/devicetree/bindings/watchdog/aspeed-wdt.txt
> >> b/Documentation/devicetree/bindings/watchdog/aspeed-wdt.txt
> >> index c5077a1f5cb3..023a9b578df6 100644
> >> --- a/Documentation/devicetree/bindings/watchdog/aspeed-wdt.txt
> >> +++ b/Documentation/devicetree/bindings/watchdog/aspeed-wdt.txt
> >> @@ -34,6 +34,13 @@ Optional properties:
> >> engine is responsible for this.
> >>
> >> - aspeed,alt-boot: If property is present then boot from alternate
> >> block.
> >> + At alternate side 'access_cs0' sysfs file
> >> provides:
> >
> > Why are we talking about sysfs in the devicetree binding? This patch
> > doesn't seem right to me.
> >
>
> Correct; this is the wrong document. The attribute also will need
> to be better explained. "At alternate side" does not explain (at
> least not at all clearly enough) that the attribute only exists
> if the system has booted from the alternate flash / block.
>
> > Also if we're not supporting the aspeed,alt-boot property we should
> > probably document it as deprecated rather than making it disappear,
> > unless you're going to fix the systems that are using it.
> >
> Sorry, you lost me here. Where is it made to disappear ?
Oh, hah, I read the bullet '-' as a diff marker. Maybe I should go back to
bed!
Andrew
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* Re: [PATCH v2 3/4] watchdog/aspeed: add support for dual boot
From: Guenter Roeck @ 2019-08-27 0:14 UTC (permalink / raw)
To: Ivan Mikhaylov, Wim Van Sebroeck
Cc: Mark Rutland, devicetree, linux-watchdog, linux-aspeed,
Andrew Jeffery, openbmc, Alexander Amelkin, linux-kernel,
Rob Herring, Joel Stanley, linux-arm-kernel
In-Reply-To: <20190826104636.19324-4-i.mikhaylov@yadro.com>
On 8/26/19 3:46 AM, Ivan Mikhaylov wrote:
> Set WDT_CLEAR_TIMEOUT_AND_BOOT_CODE_SELECTION into WDT_CLEAR_TIMEOUT_STATUS
> to clear out boot code source and re-enable access to the primary SPI flash
> chip while booted via wdt2 from the alternate chip.
>
> AST2400 datasheet says:
> "In the 2nd flash booting mode, all the address mapping to CS0# would be
> re-directed to CS1#. And CS0# is not accessable under this mode. To access
> CS0#, firmware should clear the 2nd boot mode register in the WDT2 status
> register WDT30.bit[1]."
>
> Signed-off-by: Ivan Mikhaylov <i.mikhaylov@yadro.com>
> ---
> drivers/watchdog/aspeed_wdt.c | 62 ++++++++++++++++++++++++++++++++++-
> 1 file changed, 61 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/watchdog/aspeed_wdt.c b/drivers/watchdog/aspeed_wdt.c
> index cc71861e033a..bbc42847c0e3 100644
> --- a/drivers/watchdog/aspeed_wdt.c
> +++ b/drivers/watchdog/aspeed_wdt.c
> @@ -53,6 +53,8 @@ MODULE_DEVICE_TABLE(of, aspeed_wdt_of_table);
> #define WDT_CTRL_ENABLE BIT(0)
> #define WDT_TIMEOUT_STATUS 0x10
> #define WDT_TIMEOUT_STATUS_BOOT_SECONDARY BIT(1)
> +#define WDT_CLEAR_TIMEOUT_STATUS 0x14
> +#define WDT_CLEAR_TIMEOUT_AND_BOOT_CODE_SELECTION BIT(0)
>
> /*
> * WDT_RESET_WIDTH controls the characteristics of the external pulse (if
> @@ -165,6 +167,57 @@ static int aspeed_wdt_restart(struct watchdog_device *wdd,
> return 0;
> }
>
> +/* access_cs0 shows if cs0 is accessible, hence the reverted bit */
> +static ssize_t access_cs0_show(struct device *dev,
> + struct device_attribute *attr, char *buf)
This and other multi-line declarations do not appear to be aligned
with '('.
> +{
> + struct aspeed_wdt *wdt = dev_get_drvdata(dev);
> + uint32_t status = readl(wdt->base + WDT_TIMEOUT_STATUS);
> +
> + return sprintf(buf, "%u\n",
> + !(status & WDT_TIMEOUT_STATUS_BOOT_SECONDARY));
> +}
> +
> +static ssize_t access_cs0_store(struct device *dev,
> + struct device_attribute *attr,
> + const char *buf, size_t size)
> +{
> + struct aspeed_wdt *wdt = dev_get_drvdata(dev);
> + unsigned long val;
> +
> + if (kstrtoul(buf, 10, &val))
> + return -EINVAL;
> +
> + if (val)
> + writel(WDT_CLEAR_TIMEOUT_AND_BOOT_CODE_SELECTION,
> + wdt->base + WDT_CLEAR_TIMEOUT_STATUS);
> +
> + return size;
> +}
> +
> +/*
> + * At alternate side the 'access_cs0' sysfs node provides:
> + * ast2400: a way to get access to the primary SPI flash chip at CS0
> + * after booting from the alternate chip at CS1.
> + * ast2500: a way to restore the normal address mapping from
> + * (CS0->CS1, CS1->CS0) to (CS0->CS0, CS1->CS1).
> + *
> + * Clearing the boot code selection and timeout counter also resets to the
> + * initial state the chip select line mapping. When the SoC is in normal
> + * mapping state (i.e. booted from CS0), clearing those bits does nothing for
> + * both versions of the SoC. For alternate boot mode (booted from CS1 due to
> + * wdt2 expiration) the behavior differs as described above.
> + *
The above needs to be in the sysfs attribute documentation as well.
> + * This option can be used with wdt2 (watchdog1) only.
This implies a specific watchdog numbering which is not guaranteed.
Someone might implement a system with some external watchdog.
> + */
> +static DEVICE_ATTR_RW(access_cs0);
> +
> +static struct attribute *bswitch_attrs[] = {
> + &dev_attr_access_cs0.attr,
> + NULL
> +};
> +ATTRIBUTE_GROUPS(bswitch);
> +
> static const struct watchdog_ops aspeed_wdt_ops = {
> .start = aspeed_wdt_start,
> .stop = aspeed_wdt_stop,
> @@ -306,9 +359,16 @@ static int aspeed_wdt_probe(struct platform_device *pdev)
> }
>
> status = readl(wdt->base + WDT_TIMEOUT_STATUS);
> - if (status & WDT_TIMEOUT_STATUS_BOOT_SECONDARY)
> + if (status & WDT_TIMEOUT_STATUS_BOOT_SECONDARY) {
> wdt->wdd.bootstatus = WDIOF_CARDRESET;
>
> + if (of_device_is_compatible(np, "aspeed,ast2400-wdt") ||
> + of_device_is_compatible(np, "aspeed,ast2500-wdt"))
> + wdt->wdd.groups = bswitch_groups;
Kind of odd that the attribute only exists if the system booted from the
second flash, but if that is what you want I won't object. Just make sure
that this is explained properly.
> + }
> +
> + dev_set_drvdata(dev, wdt);
> +
> return devm_watchdog_register_device(dev, &wdt->wdd);
> }
>
>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* Re: [PATCH 1/2] kbuild: change *FLAGS_<basetarget>.o to take the path relative to $(obj)
From: kbuild test robot @ 2019-08-27 0:29 UTC (permalink / raw)
To: Masahiro Yamada
Cc: linux-arm-kernel, x86, Michal Marek, linux-kbuild, Marc Zyngier,
Suzuki K Poulose, Russell King, linux-kernel, Masahiro Yamada,
Ingo Molnar, Borislav Petkov, kbuild-all, Andy Lutomirski,
H. Peter Anvin, James Morse, Thomas Gleixner, kvmarm,
Julien Thierry
In-Reply-To: <20190825172833.5708-1-yamada.masahiro@socionext.com>
[-- Attachment #1: Type: text/plain, Size: 3404 bytes --]
Hi Masahiro,
I love your patch! Perhaps something to improve:
[auto build test WARNING on linus/master]
[cannot apply to v5.3-rc6 next-20190826]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/Masahiro-Yamada/kbuild-change-FLAGS_-basetarget-o-to-take-the-path-relative-to-obj/20190827-071627
config: i386-defconfig (attached as .config)
compiler: gcc-7 (Debian 7.4.0-10) 7.4.0
reproduce:
# save the attached .config to linux build tree
make ARCH=i386
If you fix the issue, kindly add following tag
Reported-by: kbuild test robot <lkp@intel.com>
All warnings (new ones prefixed by >>):
>> drivers/gpu/drm/i915/display/intel_fbdev.c:105:16: warning: initialized field overwritten [-Woverride-init]
.fb_set_par = intel_fbdev_set_par,
^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/i915/display/intel_fbdev.c:105:16: note: (near initialization for 'intelfb_ops.fb_set_par')
drivers/gpu/drm/i915/display/intel_fbdev.c:109:20: warning: initialized field overwritten [-Woverride-init]
.fb_pan_display = intel_fbdev_pan_display,
^~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/i915/display/intel_fbdev.c:109:20: note: (near initialization for 'intelfb_ops.fb_pan_display')
drivers/gpu/drm/i915/display/intel_fbdev.c:110:14: warning: initialized field overwritten [-Woverride-init]
.fb_blank = intel_fbdev_blank,
^~~~~~~~~~~~~~~~~
drivers/gpu/drm/i915/display/intel_fbdev.c:110:14: note: (near initialization for 'intelfb_ops.fb_blank')
vim +105 drivers/gpu/drm/i915/display/intel_fbdev.c
d9a946b52350bb drivers/gpu/drm/i915/intel_fbdev.c Rodrigo Vivi 2015-05-28 101
79e539453b34e3 drivers/gpu/drm/i915/intel_fb.c Jesse Barnes 2008-11-07 102 static struct fb_ops intelfb_ops = {
79e539453b34e3 drivers/gpu/drm/i915/intel_fb.c Jesse Barnes 2008-11-07 103 .owner = THIS_MODULE,
a36384dd941b48 drivers/gpu/drm/i915/intel_fbdev.c Stefan Christ 2016-11-14 104 DRM_FB_HELPER_DEFAULT_OPS,
e991077ec67e08 drivers/gpu/drm/i915/intel_fbdev.c Daniel Vetter 2014-06-18 @105 .fb_set_par = intel_fbdev_set_par,
21cff14847421f drivers/gpu/drm/i915/intel_fbdev.c Archit Taneja 2015-07-31 106 .fb_fillrect = drm_fb_helper_cfb_fillrect,
21cff14847421f drivers/gpu/drm/i915/intel_fbdev.c Archit Taneja 2015-07-31 107 .fb_copyarea = drm_fb_helper_cfb_copyarea,
21cff14847421f drivers/gpu/drm/i915/intel_fbdev.c Archit Taneja 2015-07-31 108 .fb_imageblit = drm_fb_helper_cfb_imageblit,
d9a946b52350bb drivers/gpu/drm/i915/intel_fbdev.c Rodrigo Vivi 2015-05-28 109 .fb_pan_display = intel_fbdev_pan_display,
03e515f7f8949c drivers/gpu/drm/i915/intel_fbdev.c Rodrigo Vivi 2015-03-09 110 .fb_blank = intel_fbdev_blank,
785b93ef8c3097 drivers/gpu/drm/i915/intel_fb.c Dave Airlie 2009-08-28 111 };
785b93ef8c3097 drivers/gpu/drm/i915/intel_fb.c Dave Airlie 2009-08-28 112
:::::: The code at line 105 was first introduced by commit
:::::: e991077ec67e08bd345fcee4f810e59740359da5 drm/i915: Properly track domain of the fbcon fb
:::::: TO: Daniel Vetter <daniel.vetter@ffwll.ch>
:::::: CC: Daniel Vetter <daniel.vetter@ffwll.ch>
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 28074 bytes --]
[-- Attachment #3: Type: text/plain, Size: 176 bytes --]
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* Re: [PATCH -next] mmc: aspeed: Fix return value check in aspeed_sdc_probe()
From: Julia Lawall @ 2019-08-27 0:47 UTC (permalink / raw)
To: Andrew Jeffery
Cc: linux-arm-kernel, Ulf Hansson, linux-aspeed, kernel-janitors,
linux-mmc, Adrian Hunter, Wei Yongjun, Joel Stanley,
Dan Carpenter
In-Reply-To: <629128e7-cc91-412f-8946-668fac2eb3b9@www.fastmail.com>
On Tue, 27 Aug 2019, Andrew Jeffery wrote:
>
>
> On Mon, 26 Aug 2019, at 22:34, Dan Carpenter wrote:
> > > Fixes: 09eed7fffd33 ("mmc: Add support for the ASPEED SD controller")
> > ^^^^
> > When we're adding new files, could we use the prefix for the new driver
> > instead of just the subsystem? "mmc: aspeed: Add new driver"?
> > Otherwise it's tricky to know what people want for the driver.
>
> I don't have any issue with the request, but I don't understand this last
> bit. What do you mean by "it's tricky to know what people want for the
> driver"?
There is no obvious algorithm that tells how to go from a file name to an
appropriate subject line prefix.
julia
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* Re: [PATCH v2 2/3] coresight: tmc-etr: Decouple buffer sync and barrier packet insertion
From: Leo Yan @ 2019-08-27 1:30 UTC (permalink / raw)
To: Mathieu Poirier
Cc: suzuki.poulose, alexander.shishkin, yabinc, linux-kernel,
mike.leach, linux-arm-kernel
In-Reply-To: <20190826194605.3791-3-mathieu.poirier@linaro.org>
On Mon, Aug 26, 2019 at 01:46:04PM -0600, Mathieu Poirier wrote:
> If less space is available in the perf ring buffer than the ETR buffer,
> barrier packets inserted in the trace stream by tmc_sync_etr_buf() are
> skipped over when the head of the buffer is moved forward, resulting in
> traces that can't be decoded.
>
> This patch decouples the process of syncing ETR buffers and the addition
> of barrier packets in order to perform the latter once the offset in the
> trace buffer has been properly computed.
>
> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
> ---
> .../hwtracing/coresight/coresight-tmc-etr.c | 18 ++++++++++++------
> 1 file changed, 12 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/hwtracing/coresight/coresight-tmc-etr.c b/drivers/hwtracing/coresight/coresight-tmc-etr.c
> index 4f000a03152e..bae47272de98 100644
> --- a/drivers/hwtracing/coresight/coresight-tmc-etr.c
> +++ b/drivers/hwtracing/coresight/coresight-tmc-etr.c
> @@ -946,10 +946,6 @@ static void tmc_sync_etr_buf(struct tmc_drvdata *drvdata)
> WARN_ON(!etr_buf->ops || !etr_buf->ops->sync);
>
> etr_buf->ops->sync(etr_buf, rrp, rwp);
> -
> - /* Insert barrier packets at the beginning, if there was an overflow */
> - if (etr_buf->full)
> - tmc_etr_buf_insert_barrier_packet(etr_buf, etr_buf->offset);
> }
>
> static void __tmc_etr_enable_hw(struct tmc_drvdata *drvdata)
> @@ -1086,6 +1082,13 @@ static void tmc_etr_sync_sysfs_buf(struct tmc_drvdata *drvdata)
> drvdata->sysfs_buf = NULL;
> } else {
> tmc_sync_etr_buf(drvdata);
> + /*
> + * Insert barrier packets at the beginning, if there was
> + * an overflow.
> + */
> + if (etr_buf->full)
> + tmc_etr_buf_insert_barrier_packet(etr_buf,
> + etr_buf->offset);
> }
> }
>
> @@ -1502,11 +1505,16 @@ tmc_update_etr_buffer(struct coresight_device *csdev,
> CS_LOCK(drvdata->base);
> spin_unlock_irqrestore(&drvdata->spinlock, flags);
>
> + lost = etr_buf->full;
Comparing to the previous version, it drops '|' bitwise operator;
seems to me this is more neat :)
I think Yabin's testing is more convinced, so I skip to test.
FWIW, these three patches look good to me:
Reviewed-by: Leo Yan <leo.yan@linaro.org>
> size = etr_buf->len;
> if (!etr_perf->snapshot && size > handle->size) {
> size = handle->size;
> lost = true;
> }
> +
> + /* Insert barrier packets at the beginning, if there was an overflow */
> + if (lost)
> + tmc_etr_buf_insert_barrier_packet(etr_buf, etr_buf->offset);
> tmc_etr_sync_perf_buffer(etr_perf, size);
>
> /*
> @@ -1517,8 +1525,6 @@ tmc_update_etr_buffer(struct coresight_device *csdev,
> */
> if (etr_perf->snapshot)
> handle->head += size;
> -
> - lost |= etr_buf->full;
> out:
> /*
> * Don't set the TRUNCATED flag in snapshot mode because 1) the
> --
> 2.17.1
>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* Re: [PATCH 1/2] kbuild: change *FLAGS_<basetarget>.o to take the path relative to $(obj)
From: kbuild test robot @ 2019-08-27 1:36 UTC (permalink / raw)
To: Masahiro Yamada
Cc: linux-arm-kernel, x86, Michal Marek, linux-kbuild, Marc Zyngier,
Suzuki K Poulose, Russell King, linux-kernel, Masahiro Yamada,
Ingo Molnar, Borislav Petkov, kbuild-all, Andy Lutomirski,
H. Peter Anvin, James Morse, Thomas Gleixner, kvmarm,
Julien Thierry
In-Reply-To: <20190825172833.5708-1-yamada.masahiro@socionext.com>
[-- Attachment #1: Type: text/plain, Size: 12184 bytes --]
Hi Masahiro,
I love your patch! Yet something to improve:
[auto build test ERROR on linus/master]
[cannot apply to v5.3-rc6 next-20190826]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/Masahiro-Yamada/kbuild-change-FLAGS_-basetarget-o-to-take-the-path-relative-to-obj/20190827-071627
config: ia64-allnoconfig (attached as .config)
compiler: ia64-linux-gcc (GCC) 7.4.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
GCC_VERSION=7.4.0 make.cross ARCH=ia64
If you fix the issue, kindly add following tag
Reported-by: kbuild test robot <lkp@intel.com>
All errors (new ones prefixed by >>):
arch/ia64/kernel/efi.o: In function `find_memmap_space':
efi.c:(.text+0x2402): undefined reference to `__udivdi3'
arch/ia64/kernel/time.o: In function `ia64_init_itm':
time.c:(.text+0xa32): undefined reference to `__udivdi3'
time.c:(.text+0xae2): undefined reference to `__udivdi3'
time.c:(.text+0xb62): undefined reference to `__udivdi3'
time.c:(.text+0xd62): undefined reference to `__udivdi3'
arch/ia64/kernel/time.o:time.c:(.text+0xe12): more undefined references to `__udivdi3' follow
kernel/ptrace.o: In function `ptrace_request':
ptrace.c:(.text+0x3262): undefined reference to `__umoddi3'
kernel/sched/core.o: In function `to_ratio':
core.c:(.text+0x2c32): undefined reference to `__udivdi3'
kernel/sched/cputime.o: In function `cputime_adjust':
cputime.c:(.text+0xd72): undefined reference to `__udivdi3'
kernel/sched/fair.o: In function `__calc_delta':
fair.c:(.text+0x362): undefined reference to `__udivdi3'
kernel/time/timekeeping.o: In function `scale64_check_overflow':
timekeeping.c:(.text+0x42): undefined reference to `__umoddi3'
timekeeping.c:(.text+0x62): undefined reference to `__udivdi3'
timekeeping.c:(.text+0x1b2): undefined reference to `__udivdi3'
kernel/time/timekeeping.o: In function `timekeeping_advance':
timekeeping.c:(.text+0x1552): undefined reference to `__udivdi3'
kernel/time/timekeeping.o: In function `tk_setup_internals.constprop.6':
timekeeping.c:(.text+0x19b2): undefined reference to `__udivdi3'
kernel/time/timekeeping.o: In function `get_device_system_crosststamp':
timekeeping.c:(.text+0x3f52): undefined reference to `__umoddi3'
timekeeping.c:(.text+0x3f72): undefined reference to `__udivdi3'
timekeeping.c:(.text+0x3f92): undefined reference to `__udivdi3'
kernel/time/clocksource.o: In function `clocks_calc_mult_shift':
clocksource.c:(.text+0x4b2): undefined reference to `__udivdi3'
kernel/time/clocksource.o: In function `clocks_calc_max_nsecs':
clocksource.c:(.text+0xaa2): undefined reference to `__udivdi3'
kernel/time/clocksource.o: In function `__clocksource_update_freq_scale':
clocksource.c:(.text+0xb72): undefined reference to `__udivdi3'
kernel/time/clocksource.o:clocksource.c:(.text+0xb82): more undefined references to `__udivdi3' follow
mm/percpu.o: In function `pcpu_setup_first_chunk':
>> percpu.c:(.init.text+0xa02): undefined reference to `__moddi3'
>> percpu.c:(.init.text+0xae2): undefined reference to `__udivdi3'
percpu.c:(.init.text+0xb22): undefined reference to `__moddi3'
percpu.c:(.init.text+0xc32): undefined reference to `__udivdi3'
percpu.c:(.init.text+0xc72): undefined reference to `__moddi3'
percpu.c:(.init.text+0xd52): undefined reference to `__udivdi3'
percpu.c:(.init.text+0xd92): undefined reference to `__moddi3'
percpu.c:(.init.text+0xe72): undefined reference to `__udivdi3'
percpu.c:(.init.text+0xeb2): undefined reference to `__moddi3'
percpu.c:(.init.text+0xf92): undefined reference to `__udivdi3'
percpu.c:(.init.text+0xfd2): undefined reference to `__moddi3'
percpu.c:(.init.text+0x10b2): undefined reference to `__udivdi3'
percpu.c:(.init.text+0x1132): undefined reference to `__moddi3'
percpu.c:(.init.text+0x1242): undefined reference to `__udivdi3'
percpu.c:(.init.text+0x12c2): undefined reference to `__moddi3'
percpu.c:(.init.text+0x1672): undefined reference to `__udivdi3'
percpu.c:(.init.text+0x16e2): undefined reference to `__moddi3'
percpu.c:(.init.text+0x1812): undefined reference to `__udivdi3'
percpu.c:(.init.text+0x1882): undefined reference to `__moddi3'
percpu.c:(.init.text+0x1a72): undefined reference to `__udivdi3'
percpu.c:(.init.text+0x1ae2): undefined reference to `__moddi3'
percpu.c:(.init.text+0x1bc2): undefined reference to `__udivdi3'
percpu.c:(.init.text+0x1c32): undefined reference to `__moddi3'
mm/page_alloc.o: In function `setup_per_zone_lowmem_reserve':
page_alloc.c:(.text+0x572): undefined reference to `__udivdi3'
mm/page_alloc.o: In function `__setup_per_zone_wmarks':
page_alloc.c:(.text+0xb42): undefined reference to `__udivdi3'
mm/page_alloc.o: In function `pageset_set_high_and_batch':
page_alloc.c:(.text+0x15e2): undefined reference to `__udivdi3'
mm/page_alloc.o: In function `find_zone_movable_pfns_for_nodes':
page_alloc.c:(.init.text+0x9f2): undefined reference to `__udivdi3'
page_alloc.c:(.init.text+0xa72): undefined reference to `__udivdi3'
mm/page_alloc.o:page_alloc.c:(.init.text+0x2d82): more undefined references to `__udivdi3' follow
mm/dmapool.o: In function `dma_pool_create':
dmapool.c:(.text+0x3e2): undefined reference to `__umoddi3'
mm/mempolicy.o: In function `offset_il_node':
mempolicy.c:(.text+0x412): undefined reference to `__umoddi3'
mm/slub.o: In function `__kmem_cache_create':
slub.c:(.text+0x6ff2): undefined reference to `__udivdi3'
slub.c:(.text+0x7042): undefined reference to `__udivdi3'
slub.c:(.text+0x7302): undefined reference to `__udivdi3'
slub.c:(.text+0x7392): undefined reference to `__udivdi3'
slub.c:(.text+0x7732): undefined reference to `__udivdi3'
slub.c:(.text+0x7752): undefined reference to `__umoddi3'
slub.c:(.text+0x77b2): undefined reference to `__umoddi3'
slub.c:(.text+0x77d2): undefined reference to `__udivdi3'
slub.c:(.text+0x7932): undefined reference to `__umoddi3'
slub.c:(.text+0x7992): undefined reference to `__umoddi3'
slub.c:(.text+0x7a52): undefined reference to `__umoddi3'
slub.c:(.text+0x7ab2): undefined reference to `__umoddi3'
mm/quicklist.o: In function `quicklist_trim':
quicklist.c:(.text+0x142): undefined reference to `__udivdi3'
fs/super.o: In function `super_cache_scan':
super.c:(.text+0x1ca2): undefined reference to `__udivdi3'
super.c:(.text+0x1cc2): undefined reference to `__umoddi3'
super.c:(.text+0x1cf2): undefined reference to `__udivdi3'
super.c:(.text+0x1d42): undefined reference to `__udivdi3'
super.c:(.text+0x1dc2): undefined reference to `__udivdi3'
fs/inode.o: In function `timespec64_trunc':
inode.c:(.text+0x5172): undefined reference to `__moddi3'
fs/inode.o: In function `current_time':
inode.c:(.text+0x52b2): undefined reference to `__moddi3'
lib/bitmap.o: In function `bitmap_remap':
bitmap.c:(.text+0x24c2): undefined reference to `__umoddi3'
lib/bitmap.o: In function `bitmap_bitremap':
bitmap.c:(.text+0x2682): undefined reference to `__moddi3'
lib/bitmap.o: In function `bitmap_fold':
bitmap.c:(.text+0x2982): undefined reference to `__umoddi3'
lib/kfifo.o: In function `kfifo_copy_from_user.isra.1':
kfifo.c:(.text+0x232): undefined reference to `__udivdi3'
kfifo.c:(.text+0x312): undefined reference to `__udivdi3'
lib/kfifo.o: In function `kfifo_copy_to_user.isra.2':
kfifo.c:(.text+0x582): undefined reference to `__udivdi3'
lib/kfifo.o: In function `__kfifo_init':
kfifo.c:(.text+0x1302): undefined reference to `__udivdi3'
lib/kfifo.o: In function `__kfifo_from_user':
kfifo.c:(.text+0x1672): undefined reference to `__udivdi3'
lib/kfifo.o:kfifo.c:(.text+0x17a2): more undefined references to `__udivdi3' follow
lib/string_helpers.o: In function `string_get_size':
string_helpers.c:(.text+0x282): undefined reference to `__umoddi3'
lib/hexdump.o: In function `hex_dump_to_buffer':
hexdump.c:(.text+0x682): undefined reference to `__umoddi3'
hexdump.c:(.text+0x6a2): undefined reference to `__udivdi3'
lib/kstrtox.o: In function `_parse_integer':
kstrtox.c:(.text+0x2e2): undefined reference to `__udivdi3'
lib/math/lcm.o: In function `lcm':
lcm.c:(.text+0x62): undefined reference to `__udivdi3'
lib/math/lcm.o: In function `lcm_not_zero':
lcm.c:(.text+0x122): undefined reference to `__udivdi3'
lib/math/reciprocal_div.o: In function `reciprocal_value':
reciprocal_div.c:(.text+0xd2): undefined reference to `__udivdi3'
lib/math/reciprocal_div.o:reciprocal_div.c:(.text+0x1e2): more undefined references to `__udivdi3' follow
drivers/pci/pci.o: In function `pci_set_cacheline_size':
pci.c:(.text+0xb7e2): undefined reference to `__umoddi3'
drivers/pci/setup-bus.o: In function `pci_bus_distribute_available_resources':
setup-bus.c:(.text+0x1ec2): undefined reference to `__udivdi3'
setup-bus.c:(.text+0x1f42): undefined reference to `__udivdi3'
setup-bus.c:(.text+0x1fc2): undefined reference to `__udivdi3'
setup-bus.c:(.text+0x21a2): undefined reference to `__udivdi3'
setup-bus.c:(.text+0x2212): undefined reference to `__udivdi3'
drivers/pci/setup-bus.o:setup-bus.c:(.text+0x2282): more undefined references to `__udivdi3' follow
drivers/acpi/acpica/exfldio.o: In function `acpi_ex_insert_into_field':
exfldio.c:(.text+0x812): undefined reference to `__umoddi3'
drivers/acpi/acpica/exfldio.o: In function `acpi_ex_extract_from_field':
exfldio.c:(.text+0x1222): undefined reference to `__udivdi3'
exfldio.c:(.text+0x1332): undefined reference to `__udivdi3'
exfldio.c:(.text+0x1362): undefined reference to `__umoddi3'
drivers/acpi/acpica/tbutils.o: In function `acpi_tb_parse_root_table':
tbutils.c:(.init.text+0x462): undefined reference to `__udivdi3'
drivers/acpi/acpica/utmath.o: In function `acpi_ut_short_divide':
utmath.c:(.text+0x152): undefined reference to `__udivdi3'
utmath.c:(.text+0x192): undefined reference to `__umoddi3'
drivers/acpi/acpica/utmath.o: In function `acpi_ut_divide':
utmath.c:(.text+0x262): undefined reference to `__udivdi3'
utmath.c:(.text+0x2a2): undefined reference to `__umoddi3'
drivers/tty/tty_port.o: In function `tty_port_close_start.part.1':
tty_port.c:(.text+0x5a2): undefined reference to `__udivdi3'
drivers/char/random.o: In function `add_device_randomness':
random.c:(.text+0x39d2): undefined reference to `__umoddi3'
drivers/char/random.o: In function `randomize_page':
random.c:(.text+0x4f82): undefined reference to `__umoddi3'
drivers/base/swnode.o: In function `software_node_read_int_array':
swnode.c:(.text+0x12f2): undefined reference to `__udivdi3'
drivers/firmware/efi/memmap.o: In function `__efi_memmap_init':
>> memmap.c:(.init.text+0x112): undefined reference to `__udivdi3'
arch/ia64/hp/common/sba_iommu.o: In function `sba_init':
sba_iommu.c:(.init.text+0x982): undefined reference to `__udivdi3'
arch/ia64/sn/kernel/bte.o: In function `bte_copy':
bte.c:(.text+0x3b2): undefined reference to `__moddi3'
arch/ia64/sn/pci/tioca_provider.o: In function `tioca_bus_fixup':
tioca_provider.c:(.text+0x662): undefined reference to `__udivdi3'
tioca_provider.c:(.text+0x772): undefined reference to `__udivdi3'
tioca_provider.c:(.text+0xab2): undefined reference to `__udivdi3'
arch/ia64/sn/pci/tioca_provider.o: In function `tioca_dma_map':
tioca_provider.c:(.text+0x1392): undefined reference to `__umoddi3'
lib/nodemask.o: In function `node_random':
nodemask.c:(.text+0x102): undefined reference to `__umoddi3'
lib/vsprintf.o: In function `vsscanf':
vsprintf.c:(.text+0xac62): undefined reference to `__udivdi3'
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 6360 bytes --]
[-- Attachment #3: Type: text/plain, Size: 176 bytes --]
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
page: next (older) | prev (newer) | latest
- recent:[subjects (threaded)|topics (new)|topics (active)]
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox