* [PATCH V4 1/5] dt-bindings: fsl: scu: add scu key binding
From: Anson Huang @ 2019-09-16 2:52 UTC (permalink / raw)
To: robh+dt, mark.rutland, shawnguo, s.hauer, kernel, festevam,
catalin.marinas, will, dmitry.torokhov, aisheng.dong, ulf.hansson,
fugang.duan, peng.fan, leonard.crestez, daniel.baluta, olof,
mripard, arnd, jagan, dinguyen, bjorn.andersson,
marcin.juszkiewicz, andriy.shevchenko, yuehaibing, cw00.choi,
enric.balletbo, m.felsch, ping.bai, ronald, stefan, devicetree,
linux-kernel, linux-arm-kernel, linux-input
Cc: Linux-imx
NXP i.MX8QXP is an ARMv8 SoC with a Cortex-M4 core inside as
system controller, the system controller is in charge of system
power, clock and scu key event etc. management, Linux kernel has
to communicate with system controller via MU (message unit) IPC
to get scu key event, add binding doc for i.MX system controller
key driver.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
---
No changes.
---
.../devicetree/bindings/arm/freescale/fsl,scu.txt | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt b/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt
index c149fad..5eab7d0 100644
--- a/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt
+++ b/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt
@@ -157,6 +157,15 @@ Required properties:
Optional properties:
- timeout-sec: contains the watchdog timeout in seconds.
+SCU key bindings based on SCU Message Protocol
+------------------------------------------------------------
+
+Required properties:
+- compatible: should be:
+ "fsl,imx8qxp-sc-key"
+ followed by "fsl,imx-sc-key";
+- linux,keycodes: See Documentation/devicetree/bindings/input/keys.txt
+
Example (imx8qxp):
-------------
aliases {
@@ -220,6 +229,11 @@ firmware {
compatible = "fsl,imx8qxp-sc-rtc";
};
+ scu_key: scu-key {
+ compatible = "fsl,imx8qxp-sc-key", "fsl,imx-sc-key";
+ linux,keycode = <KEY_POWER>;
+ };
+
watchdog {
compatible = "fsl,imx8qxp-sc-wdt", "fsl,imx-sc-wdt";
timeout-sec = <60>;
--
2.7.4
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^ permalink raw reply related
* [PATCH V4 2/5] input: keyboard: imx_sc: Add i.MX system controller key support
From: Anson Huang @ 2019-09-16 2:52 UTC (permalink / raw)
To: robh+dt, mark.rutland, shawnguo, s.hauer, kernel, festevam,
catalin.marinas, will, dmitry.torokhov, aisheng.dong, ulf.hansson,
fugang.duan, peng.fan, leonard.crestez, daniel.baluta, olof,
mripard, arnd, jagan, dinguyen, bjorn.andersson,
marcin.juszkiewicz, andriy.shevchenko, yuehaibing, cw00.choi,
enric.balletbo, m.felsch, ping.bai, ronald, stefan, devicetree,
linux-kernel, linux-arm-kernel, linux-input
Cc: Linux-imx
In-Reply-To: <1568602373-14164-1-git-send-email-Anson.Huang@nxp.com>
i.MX8QXP is an ARMv8 SoC which has a Cortex-M4 system controller
inside, the system controller is in charge of controlling power,
clock and scu key etc..
Adds i.MX system controller key driver support, Linux kernel has
to communicate with system controller via MU (message unit) IPC
to get scu key's status.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
---
Changes since V3:
- switch the debounce and repeat interval time for delay work schdule;
- add .remove to handle group irq and notify etc..
---
drivers/input/keyboard/Kconfig | 7 ++
drivers/input/keyboard/Makefile | 1 +
drivers/input/keyboard/imx_sc_key.c | 190 ++++++++++++++++++++++++++++++++++++
3 files changed, 198 insertions(+)
create mode 100644 drivers/input/keyboard/imx_sc_key.c
diff --git a/drivers/input/keyboard/Kconfig b/drivers/input/keyboard/Kconfig
index 8911bc2..00f8428 100644
--- a/drivers/input/keyboard/Kconfig
+++ b/drivers/input/keyboard/Kconfig
@@ -469,6 +469,13 @@ config KEYBOARD_IMX
To compile this driver as a module, choose M here: the
module will be called imx_keypad.
+config KEYBOARD_IMX_SC_KEY
+ tristate "IMX SCU Key Driver"
+ depends on IMX_SCU
+ help
+ This is the system controller key driver for NXP i.MX SoCs with
+ system controller inside.
+
config KEYBOARD_NEWTON
tristate "Newton keyboard"
select SERIO
diff --git a/drivers/input/keyboard/Makefile b/drivers/input/keyboard/Makefile
index 9510325..f5b1752 100644
--- a/drivers/input/keyboard/Makefile
+++ b/drivers/input/keyboard/Makefile
@@ -29,6 +29,7 @@ obj-$(CONFIG_KEYBOARD_HIL) += hil_kbd.o
obj-$(CONFIG_KEYBOARD_HIL_OLD) += hilkbd.o
obj-$(CONFIG_KEYBOARD_IPAQ_MICRO) += ipaq-micro-keys.o
obj-$(CONFIG_KEYBOARD_IMX) += imx_keypad.o
+obj-$(CONFIG_KEYBOARD_IMX_SC_KEY) += imx_sc_key.o
obj-$(CONFIG_KEYBOARD_HP6XX) += jornada680_kbd.o
obj-$(CONFIG_KEYBOARD_HP7XX) += jornada720_kbd.o
obj-$(CONFIG_KEYBOARD_LKKBD) += lkkbd.o
diff --git a/drivers/input/keyboard/imx_sc_key.c b/drivers/input/keyboard/imx_sc_key.c
new file mode 100644
index 0000000..59c68fa
--- /dev/null
+++ b/drivers/input/keyboard/imx_sc_key.c
@@ -0,0 +1,190 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright 2019 NXP.
+ */
+
+#include <linux/device.h>
+#include <linux/err.h>
+#include <linux/firmware/imx/sci.h>
+#include <linux/init.h>
+#include <linux/input.h>
+#include <linux/interrupt.h>
+#include <linux/jiffies.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/platform_device.h>
+
+#define DEBOUNCE_TIME 100
+#define REPEAT_INTERVAL 60
+
+#define SC_IRQ_BUTTON 1
+#define SC_IRQ_GROUP_WAKE 3
+#define IMX_SC_MISC_FUNC_GET_BUTTON_STATUS 18
+
+struct imx_key_drv_data {
+ int keycode;
+ bool keystate; /* 1: pressed, 0: release */
+ bool delay_check;
+ struct delayed_work check_work;
+ struct input_dev *input;
+ struct imx_sc_ipc *key_ipc_handle;
+ struct notifier_block key_notifier;
+};
+
+struct imx_sc_msg_key {
+ struct imx_sc_rpc_msg hdr;
+ u8 state;
+};
+
+static int imx_sc_key_notify(struct notifier_block *nb,
+ unsigned long event, void *group)
+{
+ struct imx_key_drv_data *priv =
+ container_of(nb,
+ struct imx_key_drv_data,
+ key_notifier);
+
+ if ((event & SC_IRQ_BUTTON) && (*(u8 *)group == SC_IRQ_GROUP_WAKE)
+ && !priv->delay_check) {
+ priv->delay_check = 1;
+ schedule_delayed_work(&priv->check_work,
+ msecs_to_jiffies(DEBOUNCE_TIME));
+ }
+
+ return 0;
+}
+
+static void imx_sc_check_for_events(struct work_struct *work)
+{
+ struct imx_key_drv_data *priv =
+ container_of(work,
+ struct imx_key_drv_data,
+ check_work.work);
+ struct input_dev *input = priv->input;
+ struct imx_sc_msg_key msg;
+ struct imx_sc_rpc_msg *hdr = &msg.hdr;
+ bool state;
+ int ret;
+
+ hdr->ver = IMX_SC_RPC_VERSION;
+ hdr->svc = IMX_SC_RPC_SVC_MISC;
+ hdr->func = IMX_SC_MISC_FUNC_GET_BUTTON_STATUS;
+ hdr->size = 1;
+
+ ret = imx_scu_call_rpc(priv->key_ipc_handle, &msg, true);
+ if (ret) {
+ dev_err(&input->dev, "read imx sc key failed, ret %d\n", ret);
+ return;
+ }
+
+ state = (bool)msg.state;
+
+ if (!state && !priv->keystate)
+ state = true;
+
+ if (state ^ priv->keystate) {
+ pm_wakeup_event(input->dev.parent, 0);
+ priv->keystate = state;
+ input_event(input, EV_KEY, priv->keycode, state);
+ input_sync(input);
+ if (!state)
+ priv->delay_check = 0;
+ pm_relax(priv->input->dev.parent);
+ }
+
+ if (state)
+ schedule_delayed_work(&priv->check_work,
+ msecs_to_jiffies(REPEAT_INTERVAL));
+}
+
+static int imx_sc_key_probe(struct platform_device *pdev)
+{
+ struct device_node *np = pdev->dev.of_node;
+ static struct imx_key_drv_data *priv;
+ struct input_dev *input;
+ int ret;
+
+ priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
+ if (!priv)
+ return -ENOMEM;
+
+ ret = imx_scu_get_handle(&priv->key_ipc_handle);
+ if (ret)
+ return ret;
+
+ if (of_property_read_u32(np, "linux,keycode", &priv->keycode)) {
+ dev_err(&pdev->dev, "missing KEY_POWER in DT\n");
+ return -EINVAL;
+ }
+
+ INIT_DELAYED_WORK(&priv->check_work, imx_sc_check_for_events);
+
+ input = devm_input_allocate_device(&pdev->dev);
+ if (!input) {
+ dev_err(&pdev->dev, "failed to allocate the input device\n");
+ return -ENOMEM;
+ }
+
+ input->name = pdev->name;
+ input->phys = "imx-sc-key/input0";
+ input->id.bustype = BUS_HOST;
+
+ input_set_capability(input, EV_KEY, priv->keycode);
+
+ ret = input_register_device(input);
+ if (ret) {
+ dev_err(&pdev->dev, "failed to register input device\n");
+ return ret;
+ }
+
+ priv->input = input;
+ platform_set_drvdata(pdev, priv);
+
+ ret = imx_scu_irq_group_enable(SC_IRQ_GROUP_WAKE, SC_IRQ_BUTTON, true);
+ if (ret) {
+ dev_warn(&pdev->dev, "enable scu group irq failed\n");
+ return ret;
+ }
+
+ priv->key_notifier.notifier_call = imx_sc_key_notify;
+ ret = imx_scu_irq_register_notifier(&priv->key_notifier);
+ if (ret) {
+ imx_scu_irq_group_enable(SC_IRQ_GROUP_WAKE, SC_IRQ_BUTTON, false);
+ dev_warn(&pdev->dev, "register scu notifier failed\n");
+ }
+
+ return ret;
+}
+
+static int imx_sc_key_remove(struct platform_device *pdev)
+{
+ struct imx_key_drv_data *priv = platform_get_drvdata(pdev);
+
+ imx_scu_irq_group_enable(SC_IRQ_GROUP_WAKE, SC_IRQ_BUTTON, false);
+ imx_scu_irq_unregister_notifier(&priv->key_notifier);
+ cancel_delayed_work_sync(&priv->check_work);
+
+ return 0;
+}
+
+static const struct of_device_id imx_sc_key_ids[] = {
+ { .compatible = "fsl,imx-sc-key" },
+ { /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, imx_sc_key_ids);
+
+static struct platform_driver imx_sc_key_driver = {
+ .driver = {
+ .name = "imx-sc-key",
+ .of_match_table = imx_sc_key_ids,
+ },
+ .probe = imx_sc_key_probe,
+ .remove = imx_sc_key_remove,
+};
+module_platform_driver(imx_sc_key_driver);
+
+MODULE_AUTHOR("Anson Huang <Anson.Huang@nxp.com>");
+MODULE_DESCRIPTION("i.MX System Controller Key Driver");
+MODULE_LICENSE("GPL v2");
--
2.7.4
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^ permalink raw reply related
* [PATCH V4 4/5] arm64: dts: imx8qxp-mek: Enable scu key
From: Anson Huang @ 2019-09-16 2:52 UTC (permalink / raw)
To: robh+dt, mark.rutland, shawnguo, s.hauer, kernel, festevam,
catalin.marinas, will, dmitry.torokhov, aisheng.dong, ulf.hansson,
fugang.duan, peng.fan, leonard.crestez, daniel.baluta, olof,
mripard, arnd, jagan, dinguyen, bjorn.andersson,
marcin.juszkiewicz, andriy.shevchenko, yuehaibing, cw00.choi,
enric.balletbo, m.felsch, ping.bai, ronald, stefan, devicetree,
linux-kernel, linux-arm-kernel, linux-input
Cc: Linux-imx
In-Reply-To: <1568602373-14164-1-git-send-email-Anson.Huang@nxp.com>
Enable scu key for i.MX8QXP MEK board.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
---
No changes.
---
arch/arm64/boot/dts/freescale/imx8qxp-mek.dts | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts b/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts
index 1946805..88dd9132 100644
--- a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts
+++ b/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts
@@ -234,3 +234,7 @@
&adma_dsp {
status = "okay";
};
+
+&scu_key {
+ status = "okay";
+};
--
2.7.4
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^ permalink raw reply related
* [PATCH V4 3/5] arm64: dts: imx8qxp: Add scu key node
From: Anson Huang @ 2019-09-16 2:52 UTC (permalink / raw)
To: robh+dt, mark.rutland, shawnguo, s.hauer, kernel, festevam,
catalin.marinas, will, dmitry.torokhov, aisheng.dong, ulf.hansson,
fugang.duan, peng.fan, leonard.crestez, daniel.baluta, olof,
mripard, arnd, jagan, dinguyen, bjorn.andersson,
marcin.juszkiewicz, andriy.shevchenko, yuehaibing, cw00.choi,
enric.balletbo, m.felsch, ping.bai, ronald, stefan, devicetree,
linux-kernel, linux-arm-kernel, linux-input
Cc: Linux-imx
In-Reply-To: <1568602373-14164-1-git-send-email-Anson.Huang@nxp.com>
Add scu key node for i.MX8QXP, disabled by default as it
depends on board design.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
---
No changes.
---
arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
index 1133b41..71e38c1 100644
--- a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
@@ -8,6 +8,7 @@
#include <dt-bindings/clock/imx8-clock.h>
#include <dt-bindings/firmware/imx/rsrc.h>
#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/pinctrl/pads-imx8qxp.h>
@@ -174,6 +175,12 @@
#power-domain-cells = <1>;
};
+ scu_key: scu-key {
+ compatible = "fsl,imx8qxp-sc-key", "fsl,imx-sc-key";
+ linux,keycode = <KEY_POWER>;
+ status = "disabled";
+ };
+
rtc: rtc {
compatible = "fsl,imx8qxp-sc-rtc";
};
--
2.7.4
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* [PATCH V4 5/5] arm64: defconfig: Enable CONFIG_KEYBOARD_IMX_SC_KEY as module
From: Anson Huang @ 2019-09-16 2:52 UTC (permalink / raw)
To: robh+dt, mark.rutland, shawnguo, s.hauer, kernel, festevam,
catalin.marinas, will, dmitry.torokhov, aisheng.dong, ulf.hansson,
fugang.duan, peng.fan, leonard.crestez, daniel.baluta, olof,
mripard, arnd, jagan, dinguyen, bjorn.andersson,
marcin.juszkiewicz, andriy.shevchenko, yuehaibing, cw00.choi,
enric.balletbo, m.felsch, ping.bai, ronald, stefan, devicetree,
linux-kernel, linux-arm-kernel, linux-input
Cc: Linux-imx
In-Reply-To: <1568602373-14164-1-git-send-email-Anson.Huang@nxp.com>
Select CONFIG_KEYBOARD_IMX_SC_KEY as module by default to
support i.MX8QXP scu key driver.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
---
No changes.
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 0a70e10..9c83014 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -314,6 +314,7 @@ CONFIG_INPUT_EVDEV=y
CONFIG_KEYBOARD_ADC=m
CONFIG_KEYBOARD_GPIO=y
CONFIG_KEYBOARD_SNVS_PWRKEY=m
+CONFIG_KEYBOARD_IMX_SC_KEY=m
CONFIG_KEYBOARD_CROS_EC=y
CONFIG_INPUT_TOUCHSCREEN=y
CONFIG_TOUCHSCREEN_ATMEL_MXT=m
--
2.7.4
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^ permalink raw reply related
* RE: [PATCH 1/2] ARM: dts: imx7d: Correct speed grading fuse settings
From: Anson Huang @ 2019-09-16 2:55 UTC (permalink / raw)
To: Leonard Crestez, shawnguo@kernel.org
Cc: mark.rutland@arm.com, devicetree@vger.kernel.org,
s.hauer@pengutronix.de, linux-kernel@vger.kernel.org,
robh+dt@kernel.org, dl-linux-imx, kernel@pengutronix.de,
festevam@gmail.com, linux-arm-kernel@lists.infradead.org
In-Reply-To: <VI1PR04MB7023E48B04999733859F7158EEB00@VI1PR04MB7023.eurprd04.prod.outlook.com>
Hi, Leonard
> On 2019-09-12 5:57 AM, Anson Huang wrote:
> > The 800MHz opp speed grading fuse mask should be 0xd instead of 0xf
> > according to fuse map definition:
> >
> > SPEED_GRADING[1:0] MHz
> > 00 800
> > 01 500
> > 10 1000
> > 11 1200
> >
> > Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
>
> Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com>
>
> Are you going to add the 500mhz OPP as well?
So far no, as datasheet does NOT list 500MHz as OPP, this patch is just to make sure
the speed grading mask settings matches the fusemap file, NOT sure if 500MHz will be supported
officially.
Anson
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^ permalink raw reply
* Re: [PATCH] i2c: at91: Send bus clear command if SCL or SDA is down
From: Claudiu.Beznea @ 2019-09-16 5:20 UTC (permalink / raw)
To: Codrin.Ciubotariu, linux-i2c, linux-arm-kernel, linux-kernel
Cc: Ludovic.Desroches, alexandre.belloni, wsa
In-Reply-To: <20190911095854.5141-1-codrin.ciubotariu@microchip.com>
On 11.09.2019 12:58, Codrin Ciubotariu wrote:
> External E-Mail
>
>
> After a transfer timeout, some faulty I2C slave devices might hold down
> the SCL or the SDA pins. We can generate a bus clear command, hoping that
> the slave might release the pins.
>
> Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
> ---
> drivers/i2c/busses/i2c-at91-master.c | 20 ++++++++++++++++++++
> drivers/i2c/busses/i2c-at91.h | 6 +++++-
> 2 files changed, 25 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/i2c/busses/i2c-at91-master.c b/drivers/i2c/busses/i2c-at91-master.c
> index a3fcc35ffd3b..5f544a16db96 100644
> --- a/drivers/i2c/busses/i2c-at91-master.c
> +++ b/drivers/i2c/busses/i2c-at91-master.c
> @@ -599,6 +599,26 @@ static int at91_do_twi_transfer(struct at91_twi_dev *dev)
> at91_twi_write(dev, AT91_TWI_CR,
> AT91_TWI_THRCLR | AT91_TWI_LOCKCLR);
> }
> +
> + /*
> + * After timeout, some faulty I2C slave devices might hold SCL/SDA down;
> + * we can send a bus clear command, hoping that the pins will be
> + * released
> + */
> + if (!(dev->transfer_status & AT91_TWI_SDA) ||
> + !(dev->transfer_status & AT91_TWI_SCL)) {
> + dev_dbg(dev->dev,
> + "SDA/SCL are down; sending bus clear command\n");
> + if (dev->use_alt_cmd) {
> + unsigned int acr;
> +
> + acr = at91_twi_read(dev, AT91_TWI_ACR);
> + acr &= ~AT91_TWI_ACR_DATAL_MASK;
> + at91_twi_write(dev, AT91_TWI_ACR, acr);
> + }
> + at91_twi_write(dev, AT91_TWI_CR, AT91_TWI_CLEAR);
> + }
> +
> return ret;
> }
>
> diff --git a/drivers/i2c/busses/i2c-at91.h b/drivers/i2c/busses/i2c-at91.h
> index 499b506f6128..ffb870f3ffc6 100644
> --- a/drivers/i2c/busses/i2c-at91.h
> +++ b/drivers/i2c/busses/i2c-at91.h
> @@ -36,6 +36,7 @@
> #define AT91_TWI_SVDIS BIT(5) /* Slave Transfer Disable */
> #define AT91_TWI_QUICK BIT(6) /* SMBus quick command */
> #define AT91_TWI_SWRST BIT(7) /* Software Reset */
> +#define AT91_TWI_CLEAR BIT(15) /* Bus clear command */
> #define AT91_TWI_ACMEN BIT(16) /* Alternative Command Mode Enable */
> #define AT91_TWI_ACMDIS BIT(17) /* Alternative Command Mode Disable */
> #define AT91_TWI_THRCLR BIT(24) /* Transmit Holding Register Clear */
> @@ -69,6 +70,8 @@
> #define AT91_TWI_NACK BIT(8) /* Not Acknowledged */
> #define AT91_TWI_EOSACC BIT(11) /* End Of Slave Access */
> #define AT91_TWI_LOCK BIT(23) /* TWI Lock due to Frame Errors */
> +#define AT91_TWI_SCL BIT(24) /* TWI SCL status */
> +#define AT91_TWI_SDA BIT(25) /* TWI SDA status */
>
> #define AT91_TWI_INT_MASK \
> (AT91_TWI_TXCOMP | AT91_TWI_RXRDY | AT91_TWI_TXRDY | AT91_TWI_NACK \
> @@ -81,7 +84,8 @@
> #define AT91_TWI_THR 0x0034 /* Transmit Holding Register */
>
> #define AT91_TWI_ACR 0x0040 /* Alternative Command Register */
> -#define AT91_TWI_ACR_DATAL(len) ((len) & 0xff)
> +#define AT91_TWI_ACR_DATAL_MASK GENMASK(15, 0)
> +#define AT91_TWI_ACR_DATAL(len) ((len) & AT91_TWI_ACR_DATAL_MASK)
> #define AT91_TWI_ACR_DIR BIT(8)
>
> #define AT91_TWI_FMR 0x0050 /* FIFO Mode Register */
>
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* RE: [EXT] Re: SCMI & Devfreq
From: Sujeet Kumar Baranwal @ 2019-09-16 5:22 UTC (permalink / raw)
To: Sudeep Holla; +Cc: linux-arm-kernel@lists.infradead.org
In-Reply-To: <20190913102304.GC2559@bogus>
Thanks Sudeep.
>> Good, but just a quick question to check if this is ACPI or DT based platform ?
DT based.
>> Yes it needs some work and I do have some prototype, but with no users in the upstream, I haven't added it yet.
>>What kind of devices are these ? There was some work around generic devfreq driver that I had seen >>on the list and my plan was to do something similar, I need to dig up details as it was while ago.
These are devices needing dedicated clocks like dsp engines. There is a need for a userspace dev governor controlling the frequency in different situation.
Could you please share your patches and any instructions if needed.
Regards
Sujeet
-----Original Message-----
From: Sudeep Holla <sudeep.holla@arm.com>
Sent: Friday, September 13, 2019 3:23 AM
To: Sujeet Kumar Baranwal <sbaranwal@marvell.com>
Cc: linux-arm-kernel@lists.infradead.org; Sudeep Holla <sudeep.holla@arm.com>
Subject: [EXT] Re: SCMI & Devfreq
External Email
----------------------------------------------------------------------
On Thu, Sep 12, 2019 at 06:55:36PM +0000, Sujeet Kumar Baranwal wrote:
> Hi,
>
> I am a recent adopter of SCMI protocol on marvell processors and has
> been able to use cpufreq governor using scmi-cpufreq frame work to
> change CPU frequency.
>
Good, but just a quick question to check if this is ACPI or DT based platform ? That matter a lot to answer you query.
> While SCMI_PERFORMANCE_PROTOCL allows multiple "domains" to be
> created, each domain representing one clock with several OPPs, it works well.
OK
> For sysfs command like "cat > /sys/devices/system/cpu/cpu0/cpufreq/scaling_governor".
I don't understand the context of above statement.
> I am trying to find how SCMI could help in similar facilities when it
> comes to devfreq for device specific OPP variation.
Yes it needs some work and I do have some prototype, but with no users in the upstream, I haven't added it yet.
> If someone did similar work done or doing, please enlighten me too.
>
What kind of devices are these ? There was some work around generic devfreq driver that I had seen on the list and my plan was to do something similar, I need to dig up details as it was while ago.
--
Regards,
Sudeep
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* Re: [PATCH 1/2] clk: at91: fix update bit maps on CFG_MOR write
From: Claudiu.Beznea @ 2019-09-16 5:24 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1568042692-11784-1-git-send-email-eugen.hristev@microchip.com>
On 09.09.2019 18:30, Eugen.Hristev@microchip.com wrote:
> External E-Mail
>
>
> From: Eugen Hristev <eugen.hristev@microchip.com>
>
> The regmap update bits call was not selecting the proper mask, considering
> the bits which was updating.
> Update the mask from call to also include OSCBYPASS.
> Removed MOSCEN which was not updated.
>
> Fixes: 1bdf02326b71 ("clk: at91: make use of syscon/regmap internally")
> Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
> ---
> drivers/clk/at91/clk-main.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/clk/at91/clk-main.c b/drivers/clk/at91/clk-main.c
> index f607ee7..ebe9b99 100644
> --- a/drivers/clk/at91/clk-main.c
> +++ b/drivers/clk/at91/clk-main.c
> @@ -152,7 +152,7 @@ at91_clk_register_main_osc(struct regmap *regmap,
> if (bypass)
> regmap_update_bits(regmap,
> AT91_CKGR_MOR, MOR_KEY_MASK |
> - AT91_PMC_MOSCEN,
> + AT91_PMC_OSCBYPASS,
> AT91_PMC_OSCBYPASS | AT91_PMC_KEY);
>
> hw = &osc->hw;
>
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* Re: [PATCH 2/2] clk: at91: select parent if main oscillator or bypass is enabled
From: Claudiu.Beznea @ 2019-09-16 5:25 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1568042692-11784-2-git-send-email-eugen.hristev@microchip.com>
On 09.09.2019 18:30, Eugen.Hristev@microchip.com wrote:
> From: Eugen Hristev <eugen.hristev@microchip.com>
>
> Selecting the right parent for the main clock is done using only
> main oscillator enabled bit.
> In case we have this oscillator bypassed by an external signal (no driving
> on the XOUT line), we still use external clock, but with BYPASS bit set.
> So, in this case we must select the same parent as before.
> Create a macro that will select the right parent considering both bits from
> the MOR register.
> Use this macro when looking for the right parent.
>
> Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
> ---
> drivers/clk/at91/clk-main.c | 10 +++++++---
> 1 file changed, 7 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/clk/at91/clk-main.c b/drivers/clk/at91/clk-main.c
> index ebe9b99..87083b3 100644
> --- a/drivers/clk/at91/clk-main.c
> +++ b/drivers/clk/at91/clk-main.c
> @@ -21,6 +21,10 @@
>
> #define MOR_KEY_MASK (0xff << 16)
>
> +#define clk_main_parent_select(s) (((s) & \
> + (AT91_PMC_MOSCEN | \
> + AT91_PMC_OSCBYPASS)) ? 1 : 0)
> +
> struct clk_main_osc {
> struct clk_hw hw;
> struct regmap *regmap;
> @@ -113,7 +117,7 @@ static int clk_main_osc_is_prepared(struct clk_hw *hw)
>
> regmap_read(regmap, AT91_PMC_SR, &status);
>
> - return (status & AT91_PMC_MOSCS) && (tmp & AT91_PMC_MOSCEN);
> + return (status & AT91_PMC_MOSCS) && clk_main_parent_select(tmp);
> }
>
> static const struct clk_ops main_osc_ops = {
> @@ -450,7 +454,7 @@ static u8 clk_sam9x5_main_get_parent(struct clk_hw *hw)
>
> regmap_read(clkmain->regmap, AT91_CKGR_MOR, &status);
>
> - return status & AT91_PMC_MOSCEN ? 1 : 0;
> + return clk_main_parent_select(status);
> }
>
> static const struct clk_ops sam9x5_main_ops = {
> @@ -492,7 +496,7 @@ at91_clk_register_sam9x5_main(struct regmap *regmap,
> clkmain->hw.init = &init;
> clkmain->regmap = regmap;
> regmap_read(clkmain->regmap, AT91_CKGR_MOR, &status);
> - clkmain->parent = status & AT91_PMC_MOSCEN ? 1 : 0;
> + clkmain->parent = clk_main_parent_select(status);
>
> hw = &clkmain->hw;
> ret = clk_hw_register(NULL, &clkmain->hw);
>
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* Re: [RFC PATCH V4 3/4] dt-bindings: mt8183: Add sensor interface dt-bindings
From: Yingjoe Chen @ 2019-09-16 5:33 UTC (permalink / raw)
To: Louis Kuo
Cc: devicetree, Sean.Cheng, laurent.pinchart+renesas, Rynn.Wu,
christie.yu, srv_heupstream, Jerry-ch.Chen, tfiga, keiichiw,
jungo.lin, sj.huang, yuzhao, hans.verkuil, zwisler, frederic.chen,
matthias.bgg, linux-mediatek, mchehab, linux-arm-kernel,
linux-media
In-Reply-To: <20190915065004.20257-4-louis.kuo@mediatek.com>
On Sun, 2019-09-15 at 14:50 +0800, Louis Kuo wrote:
> This patch adds the DT binding documentation for the sensor interface
> module in Mediatek SoCs.
>
> Signed-off-by: Louis Kuo <louis.kuo@mediatek.com>
> ---
> .../bindings/media/mediatek-seninf.txt | 30 +++++++++++++++++++
> 1 file changed, 30 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/media/mediatek-seninf.txt
>
> diff --git a/Documentation/devicetree/bindings/media/mediatek-seninf.txt b/Documentation/devicetree/bindings/media/mediatek-seninf.txt
> new file mode 100644
> index 000000000000..bf2eb801cb47
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/media/mediatek-seninf.txt
> @@ -0,0 +1,30 @@
> +* Mediatek seninf MIPI-CSI2 host driver
> +
> +Seninf MIPI-CSI2 host driver is a HW camera interface controller. It support a widely adopted,
> +simple, high-speed protocol primarily intended for point-to-point image and video
> +transmission between cameras and host devices.
> +
> +Required properties:
> + - compatible: "mediatek,mt8183-seninf"
> + - reg: Must contain an entry for each entry in reg-names.
> + - reg-names: Must include the following entries:
> + "base_reg": seninf registers base
> + "rx_reg": Rx analog registers base
Everyone here is a reg. Adding _reg prefix for everyone looks redundant.
Same for clock-names.
> + - interrupts: interrupt number to the cpu.
> + - clocks : clock name from clock manager
> + - clock-names: must be CLK_CAM_SENINF and CLK_TOP_MUX_SENINF.
> + It is the clocks of seninf
> +
Joe.C
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* Re: [RFC PATCH V4 4/4] dts: arm64: mt8183: Add sensor interface nodes
From: Yingjoe Chen @ 2019-09-16 5:36 UTC (permalink / raw)
To: Louis Kuo
Cc: devicetree, Sean.Cheng, laurent.pinchart+renesas, Rynn.Wu,
christie.yu, srv_heupstream, Jerry-ch.Chen, tfiga, keiichiw,
jungo.lin, sj.huang, yuzhao, hans.verkuil, zwisler, frederic.chen,
matthias.bgg, linux-mediatek, mchehab, linux-arm-kernel,
linux-media
In-Reply-To: <20190915065004.20257-5-louis.kuo@mediatek.com>
On Sun, 2019-09-15 at 14:50 +0800, Louis Kuo wrote:
> Add nodes for Mediatek's sensor interface device. Sensor interface module
> embedded in Mediatek SOCs, works as a HW camera interface controller
> intended for image and data transmission between cameras and host devices.
>
> Signed-off-by: Louis Kuo <louis.kuo@mediatek.com>
> ---
> arch/arm64/boot/dts/mediatek/mt8183.dtsi | 14 ++++++++++++++
> 1 file changed, 14 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> index 66aaa07f6cec..f1d081b99867 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> @@ -506,4 +506,18 @@
> #clock-cells = <1>;
> };
> };
> +
> + seninf: seninf@1a040000 {
> + compatible = "mediatek,mt8183-seninf";
> + reg = <0 0x1a040000 0 0x8000>,
> + <0 0x11C80000 0 0x6000>;
Please use lower case for hex value.
> + reg-names = "base_reg", "rx_reg";
> + interrupts = <GIC_SPI 251 IRQ_TYPE_LEVEL_LOW>;
> + power-domains = <&scpsys MT8183_POWER_DOMAIN_CAM>;
> + clocks = <&camsys CLK_CAM_SENINF>,
> + <&topckgen CLK_TOP_MUX_SENINF>;
> + clock-names = "CLK_CAM_SENINF", "CLK_TOP_MUX_SENINF";
> + status = "disabled";
> + };
> + };
extra } ?
Joe.C
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* Re: [PATCH v3 3/7] usb: mtu3: support ip-sleep wakeup for MT8183
From: Chunfeng Yun @ 2019-09-16 5:45 UTC (permalink / raw)
To: Guenter Roeck
Cc: Mark Rutland, devicetree, Mathias Nyman, Greg Kroah-Hartman,
linux-usb, linux-kernel, Rob Herring, linux-mediatek,
Matthias Brugger, linux-arm-kernel
In-Reply-To: <20190911184453.GA2628@roeck-us.net>
On Wed, 2019-09-11 at 11:44 -0700, Guenter Roeck wrote:
> On Fri, Aug 30, 2019 at 03:40:50PM +0800, Chunfeng Yun wrote:
> > Support USB wakeup by ip-sleep mode for MT8183, it's similar to
> > MT8173
> >
> > Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
> > ---
> > v3: changes micros define
> >
> > v2: no changes
> > ---
> > drivers/usb/mtu3/mtu3_host.c | 14 +++++++++++++-
> > 1 file changed, 13 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/usb/mtu3/mtu3_host.c b/drivers/usb/mtu3/mtu3_host.c
> > index c871b94f3e6f..4f8208885ebd 100644
> > --- a/drivers/usb/mtu3/mtu3_host.c
> > +++ b/drivers/usb/mtu3/mtu3_host.c
> > @@ -18,6 +18,12 @@
> > #include "mtu3.h"
> > #include "mtu3_dr.h"
> >
> > +/* mt8183 etc */
> > +#define PERI_WK_CTRL0 0x20
> > +#define WC0_IS_C(x) (((x) & 0xf) << 28) /* cycle debounce */
> > +#define WC0_IS_P BIT(12) /* polarity */
> > +#define WC0_IS_EN BIT(6)
> > +
>
> For 64-bit builds, this results in:
>
> drivers/usb/mtu3/mtu3_host.c: In function ‘ssusb_wakeup_ip_sleep_set’:
> ./include/linux/bits.h:6:19: warning:
> conversion from ‘long unsigned int’ to ‘u32’ {aka ‘unsigned int’}
> changes value from ‘18446744073441120320’ to ‘4026536000’ [-Woverflow]
>
> since WC0_IS_C() is sign extended to 64 bit and then truncated.
Got it, thanks a lot
>
> Observed with gcc 7.4.0 and 8.3.0.
>
> Guenter
>
> > /* mt8173 etc */
> > #define PERI_WK_CTRL1 0x4
> > #define WC1_IS_C(x) (((x) & 0xf) << 26) /* cycle debounce */
> > @@ -30,7 +36,8 @@
> > #define SSC_SPM_INT_EN BIT(1)
> >
> > enum ssusb_uwk_vers {
> > - SSUSB_UWK_V1 = 1,
> > + SSUSB_UWK_V0 = 0,
> > + SSUSB_UWK_V1,
> > SSUSB_UWK_V2,
> > };
> >
> > @@ -43,6 +50,11 @@ static void ssusb_wakeup_ip_sleep_set(struct ssusb_mtk *ssusb, bool enable)
> > u32 reg, msk, val;
> >
> > switch (ssusb->uwk_vers) {
> > + case SSUSB_UWK_V0:
> > + reg = ssusb->uwk_reg_base + PERI_WK_CTRL0;
> > + msk = WC0_IS_EN | WC0_IS_C(0xf) | WC0_IS_P;
> > + val = enable ? (WC0_IS_EN | WC0_IS_C(0x8)) : 0;
> > + break;
> > case SSUSB_UWK_V1:
> > reg = ssusb->uwk_reg_base + PERI_WK_CTRL1;
> > msk = WC1_IS_EN | WC1_IS_C(0xf) | WC1_IS_P;
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* [PATCH v5] gpio/mpc8xxx: change irq handler from chained to normal
From: Hui Song @ 2019-09-16 5:58 UTC (permalink / raw)
To: Shawn Guo, Li Yang, Rob Herring, Mark Rutland, Linus Walleij,
Bartosz Golaszewski
Cc: devicetree, Song Hui, linux-kernel, linux-arm-kernel, linux-gpio
From: Song Hui <hui.song_1@nxp.com>
More than one gpio controllers can share one interrupt, change the
driver to request shared irq.
Signed-off-by: Laurentiu Tudor <Laurentiu.Tudor@nxp.com>
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Signed-off-by: Song Hui <hui.song_1@nxp.com>
---
Changes in v5:
- add traverse every bit function.
Changes in v4:
- convert 'pr_err' to 'dev_err'.
Changes in v3:
- update the patch description.
Changes in v2:
- delete the compatible of ls1088a.
drivers/gpio/gpio-mpc8xxx.c | 30 +++++++++++++++++++-----------
1 file changed, 19 insertions(+), 11 deletions(-)
diff --git a/drivers/gpio/gpio-mpc8xxx.c b/drivers/gpio/gpio-mpc8xxx.c
index 16a47de..3a06ca9 100644
--- a/drivers/gpio/gpio-mpc8xxx.c
+++ b/drivers/gpio/gpio-mpc8xxx.c
@@ -22,6 +22,7 @@
#include <linux/irq.h>
#include <linux/gpio/driver.h>
#include <linux/bitops.h>
+#include <linux/interrupt.h>
#define MPC8XXX_GPIO_PINS 32
@@ -127,20 +128,20 @@ static int mpc8xxx_gpio_to_irq(struct gpio_chip *gc, unsigned offset)
return -ENXIO;
}
-static void mpc8xxx_gpio_irq_cascade(struct irq_desc *desc)
+static irqreturn_t mpc8xxx_gpio_irq_cascade(int irq, void *data)
{
- struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_desc_get_handler_data(desc);
- struct irq_chip *chip = irq_desc_get_chip(desc);
+ struct mpc8xxx_gpio_chip *mpc8xxx_gc = (struct mpc8xxx_gpio_chip *)data;
struct gpio_chip *gc = &mpc8xxx_gc->gc;
unsigned int mask;
+ int i;
mask = gc->read_reg(mpc8xxx_gc->regs + GPIO_IER)
& gc->read_reg(mpc8xxx_gc->regs + GPIO_IMR);
- if (mask)
+ for_each_set_bit(i, &mask, 32)
generic_handle_irq(irq_linear_revmap(mpc8xxx_gc->irq,
- 32 - ffs(mask)));
- if (chip->irq_eoi)
- chip->irq_eoi(&desc->irq_data);
+ 31 - i));
+
+ return IRQ_HANDLED;
}
static void mpc8xxx_irq_unmask(struct irq_data *d)
@@ -388,8 +389,8 @@ static int mpc8xxx_probe(struct platform_device *pdev)
ret = gpiochip_add_data(gc, mpc8xxx_gc);
if (ret) {
- pr_err("%pOF: GPIO chip registration failed with status %d\n",
- np, ret);
+ dev_err(&pdev->dev, "%pOF: GPIO chip registration failed with status %d\n",
+ np, ret);
goto err;
}
@@ -409,8 +410,15 @@ static int mpc8xxx_probe(struct platform_device *pdev)
if (devtype->gpio_dir_in_init)
devtype->gpio_dir_in_init(gc);
- irq_set_chained_handler_and_data(mpc8xxx_gc->irqn,
- mpc8xxx_gpio_irq_cascade, mpc8xxx_gc);
+ ret = request_irq(mpc8xxx_gc->irqn, mpc8xxx_gpio_irq_cascade,
+ IRQF_NO_THREAD | IRQF_SHARED, "gpio-cascade",
+ mpc8xxx_gc);
+ if (ret) {
+ dev_err(&pdev->dev, "%s: failed to request_irq(%d), ret = %d\n",
+ np->full_name, mpc8xxx_gc->irqn, ret);
+ goto err;
+ }
+
return 0;
err:
iounmap(mpc8xxx_gc->regs);
--
2.9.5
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* Re: [PATCH v2 3/3] scsi: ufs-mediatek: enable auto suspend capability
From: Stanley Chu @ 2019-09-16 6:29 UTC (permalink / raw)
To: Bart Van Assche
Cc: sthumma, linux-scsi, martin.petersen, marc.w.gonzalez,
vivek.gautam, subhashj, jejb, chun-hung.wu, kuohong.wang, evgreen,
avri.altman, linux-mediatek, peter.wang, alim.akhtar, andy.teng,
matthias.bgg, pedrom.sousa, linux-arm-kernel, beanhuo
In-Reply-To: <160452c7-c53c-155c-49a9-4365166032a8@acm.org>
Hi Bart,
> > @@ -147,6 +152,8 @@ static int ufs_mtk_init(struct ufs_hba *hba)
> > if (err)
> > goto out_variant_clear;
> >
> > + ufs_mtk_set_caps(hba);
> > +
> > /*
> > * ufshcd_vops_init() is invoked after
> > * ufshcd_setup_clock(true) in ufshcd_hba_init() thus
>
> Please inline the ufs_mtk_set_caps() function. Introducing single line
> functions like is done in this patch doesn't improve readability.
>
OK! Will be fixed in next version.
Thanks,
Stanley
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* Re: [PATCH v2 1/3] scsi: core: allow auto suspend override by low-level driver
From: Stanley Chu @ 2019-09-16 6:38 UTC (permalink / raw)
To: Bart Van Assche
Cc: sthumma@codeaurora.org, linux-scsi@vger.kernel.org,
martin.petersen@oracle.com, marc.w.gonzalez@free.fr,
vivek.gautam@codeaurora.org, subhashj@codeaurora.org,
jejb@linux.ibm.com, Chun-Hung Wu (巫駿宏),
Kuohong Wang (王國鴻), evgreen@chromium.org,
avri.altman@wdc.com, linux-mediatek@lists.infradead.org,
Peter Wang (王信友), alim.akhtar@samsung.com,
Andy Teng (鄧如宏), matthias.bgg@gmail.com,
pedrom.sousa@synopsys.com, linux-arm-kernel@lists.infradead.org,
beanhuo@micron.com
In-Reply-To: <485731ed-d455-dbb2-0cd5-3110ff14f6b7@acm.org>
Hi Bart,
> > - pm_runtime_forbid(&sdev->sdev_gendev);
> > + if (sdev->rpm_autosuspend_delay < 0)
> > + pm_runtime_forbid(&sdev->sdev_gendev);
> > pm_runtime_enable(&sdev->sdev_gendev);
> > scsi_autopm_put_target(starget);
>
> So we have a single new struct member, rpm_autosuspend_delay, that
> controls two different behaviors: (a) whether or not runtime suspend is
> enabled at device creation time and (b) the power management autosuspend
> delay. I don't like this. Should two separate variables be introduced
> instead of using a single variable to control both behaviors?
>
OK! Will try to separate different variables to control different things
in next version.
> > diff --git a/include/scsi/scsi_device.h b/include/scsi/scsi_device.h
> > index 202f4d6a4342..133b282fae5a 100644
> > --- a/include/scsi/scsi_device.h
> > +++ b/include/scsi/scsi_device.h
> > @@ -199,7 +199,7 @@ struct scsi_device {
> > unsigned broken_fua:1; /* Don't set FUA bit */
> > unsigned lun_in_cdb:1; /* Store LUN bits in CDB[1] */
> > unsigned unmap_limit_for_ws:1; /* Use the UNMAP limit for WRITE SAME */
> > -
> > + int rpm_autosuspend_delay;
> > atomic_t disk_events_disable_depth; /* disable depth for disk events */
> >
> > DECLARE_BITMAP(supported_events, SDEV_EVT_MAXBITS); /* supported events */
> >
>
> Since the default value for the autosuspend delay is the same for all
> SCSI devices attached to a SCSI host is the same, please add a variable
> with the same name in the SCSI host template and use that value as the
> default value for SCSI devices. If the rpm_autosuspend_delay variable
> only occurs in struct scsi_device then LLD authors are forced to
> introduce a slave_configure function. Introducing such a function can be
> avoided if the default autosuspend delay can be specified in the host
> template.
>
Sounds reasonable. Will create a member indicating autosuspend delay for
the same SCSI host in SCSI host template in next version.
> Bart.
>
Thanks,
Stanley
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^ permalink raw reply
* [PATCH v3 2/3] scsi: ufs: override auto suspend tunables for ufs
From: Stanley Chu @ 2019-09-16 6:47 UTC (permalink / raw)
To: linux-scsi, martin.petersen, avri.altman, alim.akhtar,
pedrom.sousa, sthumma, jejb, bvanassche
Cc: marc.w.gonzalez, andy.teng, chun-hung.wu, kuohong.wang, evgreen,
subhashj, linux-mediatek, peter.wang, vivek.gautam, matthias.bgg,
Stanley Chu, kernel-team, linux-arm-kernel, beanhuo
In-Reply-To: <1568616437-16271-1-git-send-email-stanley.chu@mediatek.com>
Rework from previous work by:
Sujit Reddy Thumma <sthumma@codeaurora.org>
Override auto suspend tunables for UFS device LUNs during
initialization so as to efficiently manage background operations
and the power consumption.
Signed-off-by: Stanley Chu <stanley.chu@mediatek.com>
Reviewed-by: Avri Altman <avri.altman@wdc.com>
---
drivers/scsi/ufs/ufshcd.c | 9 +++++++++
drivers/scsi/ufs/ufshcd.h | 10 ++++++++++
2 files changed, 19 insertions(+)
diff --git a/drivers/scsi/ufs/ufshcd.c b/drivers/scsi/ufs/ufshcd.c
index 30b752c61b97..d35de21dc394 100644
--- a/drivers/scsi/ufs/ufshcd.c
+++ b/drivers/scsi/ufs/ufshcd.c
@@ -88,6 +88,9 @@
/* Interrupt aggregation default timeout, unit: 40us */
#define INT_AGGR_DEF_TO 0x02
+/* default delay of autosuspend: 2000 ms */
+#define RPM_AUTOSUSPEND_DELAY_MS 2000
+
#define ufshcd_toggle_vreg(_dev, _vreg, _on) \
({ \
int _ret; \
@@ -4612,9 +4615,14 @@ static int ufshcd_change_queue_depth(struct scsi_device *sdev, int depth)
*/
static int ufshcd_slave_configure(struct scsi_device *sdev)
{
+ struct ufs_hba *hba = shost_priv(sdev->host);
struct request_queue *q = sdev->request_queue;
blk_queue_update_dma_pad(q, PRDT_DATA_BYTE_COUNT_PAD - 1);
+
+ if (ufshcd_is_rpm_autosuspend_allowed(hba))
+ sdev->rpm_autosuspend_on = 1;
+
return 0;
}
@@ -7041,6 +7049,7 @@ static struct scsi_host_template ufshcd_driver_template = {
.track_queue_depth = 1,
.sdev_groups = ufshcd_driver_groups,
.dma_boundary = PAGE_SIZE - 1,
+ .rpm_autosuspend_delay = RPM_AUTOSUSPEND_DELAY_MS,
};
static int ufshcd_config_vreg_load(struct device *dev, struct ufs_vreg *vreg,
diff --git a/drivers/scsi/ufs/ufshcd.h b/drivers/scsi/ufs/ufshcd.h
index a43c7135f33d..99ea416519af 100644
--- a/drivers/scsi/ufs/ufshcd.h
+++ b/drivers/scsi/ufs/ufshcd.h
@@ -714,6 +714,12 @@ struct ufs_hba {
* the performance of ongoing read/write operations.
*/
#define UFSHCD_CAP_KEEP_AUTO_BKOPS_ENABLED_EXCEPT_SUSPEND (1 << 5)
+ /*
+ * This capability allows host controller driver to automatically
+ * enable runtime power management by itself instead of waiting
+ * for userspace to control the power management.
+ */
+#define UFSHCD_CAP_RPM_AUTOSUSPEND (1 << 6)
struct devfreq *devfreq;
struct ufs_clk_scaling clk_scaling;
@@ -747,6 +753,10 @@ static inline bool ufshcd_can_autobkops_during_suspend(struct ufs_hba *hba)
{
return hba->caps & UFSHCD_CAP_AUTO_BKOPS_SUSPEND;
}
+static inline bool ufshcd_is_rpm_autosuspend_allowed(struct ufs_hba *hba)
+{
+ return hba->caps & UFSHCD_CAP_RPM_AUTOSUSPEND;
+}
static inline bool ufshcd_is_intr_aggr_allowed(struct ufs_hba *hba)
{
--
2.18.0
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^ permalink raw reply related
* [PATCH v3 1/3] scsi: core: allow auto suspend override by low-level driver
From: Stanley Chu @ 2019-09-16 6:47 UTC (permalink / raw)
To: linux-scsi, martin.petersen, avri.altman, alim.akhtar,
pedrom.sousa, sthumma, jejb, bvanassche
Cc: marc.w.gonzalez, andy.teng, chun-hung.wu, kuohong.wang, evgreen,
subhashj, linux-mediatek, peter.wang, vivek.gautam, matthias.bgg,
Stanley Chu, kernel-team, linux-arm-kernel, beanhuo
In-Reply-To: <1568616437-16271-1-git-send-email-stanley.chu@mediatek.com>
Rework from previous work by:
Sujit Reddy Thumma <sthumma@codeaurora.org>
Until now the scsi mid-layer forbids runtime suspend till userspace
enables it. This is mainly to quarantine some disks with broken
runtime power management or have high latencies executing suspend
resume callbacks. If the userspace doesn't enable the runtime suspend
the underlying hardware will be always on even when it is not doing
any useful work and thus wasting power.
Some low-level drivers for the controllers can efficiently use runtime
power management to reduce power consumption and improve battery life.
Allow runtime suspend parameters override within the LLD itself
instead of waiting for userspace to control the power management.
Signed-off-by: Stanley Chu <stanley.chu@mediatek.com>
Reviewed-by: Avri Altman <avri.altman@wdc.com>
---
drivers/scsi/scsi_sysfs.c | 3 ++-
drivers/scsi/sd.c | 4 ++++
include/scsi/scsi_device.h | 2 +-
include/scsi/scsi_host.h | 3 +++
4 files changed, 10 insertions(+), 2 deletions(-)
diff --git a/drivers/scsi/scsi_sysfs.c b/drivers/scsi/scsi_sysfs.c
index 64c96c7828ee..d879073b0bbb 100644
--- a/drivers/scsi/scsi_sysfs.c
+++ b/drivers/scsi/scsi_sysfs.c
@@ -1300,7 +1300,8 @@ int scsi_sysfs_add_sdev(struct scsi_device *sdev)
device_enable_async_suspend(&sdev->sdev_gendev);
scsi_autopm_get_target(starget);
pm_runtime_set_active(&sdev->sdev_gendev);
- pm_runtime_forbid(&sdev->sdev_gendev);
+ if (!sdev->rpm_autosuspend_on)
+ pm_runtime_forbid(&sdev->sdev_gendev);
pm_runtime_enable(&sdev->sdev_gendev);
scsi_autopm_put_target(starget);
diff --git a/drivers/scsi/sd.c b/drivers/scsi/sd.c
index 149d406aacc9..c810cc5071d8 100644
--- a/drivers/scsi/sd.c
+++ b/drivers/scsi/sd.c
@@ -3371,6 +3371,10 @@ static int sd_probe(struct device *dev)
}
blk_pm_runtime_init(sdp->request_queue, dev);
+ if (sdp->rpm_autosuspend_on) {
+ pm_runtime_set_autosuspend_delay(dev,
+ sdp->host->hostt->rpm_autosuspend_delay);
+ }
device_add_disk(dev, gd, NULL);
if (sdkp->capacity)
sd_dif_config_host(sdkp);
diff --git a/include/scsi/scsi_device.h b/include/scsi/scsi_device.h
index 202f4d6a4342..495e30adb53f 100644
--- a/include/scsi/scsi_device.h
+++ b/include/scsi/scsi_device.h
@@ -199,7 +199,7 @@ struct scsi_device {
unsigned broken_fua:1; /* Don't set FUA bit */
unsigned lun_in_cdb:1; /* Store LUN bits in CDB[1] */
unsigned unmap_limit_for_ws:1; /* Use the UNMAP limit for WRITE SAME */
-
+ unsigned rpm_autosuspend_on:1; /* Runtime autosuspend */
atomic_t disk_events_disable_depth; /* disable depth for disk events */
DECLARE_BITMAP(supported_events, SDEV_EVT_MAXBITS); /* supported events */
diff --git a/include/scsi/scsi_host.h b/include/scsi/scsi_host.h
index cc139dbd71e5..3cb64f0a7e3a 100644
--- a/include/scsi/scsi_host.h
+++ b/include/scsi/scsi_host.h
@@ -474,6 +474,9 @@ struct scsi_host_template {
*/
unsigned int cmd_size;
struct scsi_host_cmd_pool *cmd_pool;
+
+ /* Delay for runtime autosuspend */
+ int rpm_autosuspend_delay;
};
/*
--
2.18.0
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^ permalink raw reply related
* [PATCH v3 0/3] scsi: core: allow auto suspend override by low-level driver
From: Stanley Chu @ 2019-09-16 6:47 UTC (permalink / raw)
To: linux-scsi, martin.petersen, avri.altman, alim.akhtar,
pedrom.sousa, sthumma, jejb, bvanassche
Cc: marc.w.gonzalez, andy.teng, chun-hung.wu, kuohong.wang, evgreen,
subhashj, linux-mediatek, peter.wang, vivek.gautam, matthias.bgg,
Stanley Chu, kernel-team, linux-arm-kernel, beanhuo
Until now the scsi mid-layer forbids runtime suspend till userspace enables it. This is mainly to quarantine some disks with broken runtime power management or have high latencies executing suspend resume callbacks. If the userspace doesn't enable the runtime suspend the underlying hardware will be always on even when it is not doing any useful work and thus wasting power.
Some low-level drivers for the controllers can efficiently use runtime power management to reduce power consumption and improve battery life.
This patchset allows runtime suspend parameters override within the LLD itself instead of waiting for userspace to control the power management, and make UFS as the first user of this capability.
v2 => v3:
- Create a member indicating autosuspend delay for the same SCSI host in SCSI host template (Bart)
- Use separate variables to control different things, (Bart)
(a) Whether or not runtime suspend is enabled at device creation time
(b) The power management autosuspend delay
v1 => v2:
- Allow "zero" sdev->rpm_autosuspend_delay (Avri)
- Fix format of some lines (Avri)
Stanley Chu (3):
scsi: core: allow auto suspend override by low-level driver
scsi: ufs: override auto suspend tunables for ufs
scsi: ufs-mediatek: enable auto suspend capability
drivers/scsi/scsi_sysfs.c | 3 ++-
drivers/scsi/sd.c | 4 ++++
drivers/scsi/ufs/ufs-mediatek.c | 3 +++
drivers/scsi/ufs/ufshcd.c | 9 +++++++++
drivers/scsi/ufs/ufshcd.h | 10 ++++++++++
include/scsi/scsi_device.h | 2 +-
include/scsi/scsi_host.h | 3 +++
7 files changed, 32 insertions(+), 2 deletions(-)
--
2.18.0
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^ permalink raw reply
* [PATCH v3 3/3] scsi: ufs-mediatek: enable auto suspend capability
From: Stanley Chu @ 2019-09-16 6:47 UTC (permalink / raw)
To: linux-scsi, martin.petersen, avri.altman, alim.akhtar,
pedrom.sousa, sthumma, jejb, bvanassche
Cc: marc.w.gonzalez, andy.teng, chun-hung.wu, kuohong.wang, evgreen,
subhashj, linux-mediatek, peter.wang, vivek.gautam, matthias.bgg,
Stanley Chu, kernel-team, linux-arm-kernel, beanhuo
In-Reply-To: <1568616437-16271-1-git-send-email-stanley.chu@mediatek.com>
Enable auto suspend capability in MediaTek UFS driver.
Signed-off-by: Stanley Chu <stanley.chu@mediatek.com>
Reviewed-by: Avri Altman <avri.altman@wdc.com>
---
drivers/scsi/ufs/ufs-mediatek.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/scsi/ufs/ufs-mediatek.c b/drivers/scsi/ufs/ufs-mediatek.c
index 0f6ff33ce52e..83e28edc3ac5 100644
--- a/drivers/scsi/ufs/ufs-mediatek.c
+++ b/drivers/scsi/ufs/ufs-mediatek.c
@@ -147,6 +147,9 @@ static int ufs_mtk_init(struct ufs_hba *hba)
if (err)
goto out_variant_clear;
+ /* Enable runtime autosuspend */
+ hba->caps |= UFSHCD_CAP_RPM_AUTOSUSPEND;
+
/*
* ufshcd_vops_init() is invoked after
* ufshcd_setup_clock(true) in ufshcd_hba_init() thus
--
2.18.0
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^ permalink raw reply related
* Re: [PATCH v2] net: stmmac: socfpga: re-use the `interface` parameter from platform data
From: Ardelean, Alexandru @ 2019-09-16 6:58 UTC (permalink / raw)
To: davem@davemloft.net
Cc: alexandre.torgue@st.com, netdev@vger.kernel.org,
linux-kernel@vger.kernel.org, joabreu@synopsys.com,
mcoquelin.stm32@gmail.com, peppe.cavallaro@st.com,
linux-stm32@st-md-mailman.stormreply.com,
linux-arm-kernel@lists.infradead.org
In-Reply-To: <20190915.195149.86866545205816280.davem@davemloft.net>
On Sun, 2019-09-15 at 19:51 +0100, David Miller wrote:
> [External]
>
> From: Alexandru Ardelean <alexandru.ardelean@analog.com>
> Date: Thu, 12 Sep 2019 16:28:50 +0300
>
> > diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-
> > socfpga.c
> > index c141fe783e87..5b6213207c43 100644
> > --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c
> > +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c
> ...
> > +static inline int socfpga_get_plat_phymode(struct socfpga_dwmac *dwmac)
>
> Please do not use the inline keyword in foo.c files, let the compiler device.
Ack.
Will remove.
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^ permalink raw reply
* [PATCH] Documentation: document earlycon without options for more platforms
From: Christoph Hellwig @ 2019-09-16 7:03 UTC (permalink / raw)
To: corbet; +Cc: schwab, linux-arm-kernel, linux-doc
The earlycon options without arguments is supposed on all device
tree platforms, not just arm64.
Signed-off-by: Christoph Hellwig <hch@lst.de>
---
Documentation/admin-guide/kernel-parameters.txt | 10 ++++------
1 file changed, 4 insertions(+), 6 deletions(-)
diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt
index 4c1971960afa..fe81d8922edd 100644
--- a/Documentation/admin-guide/kernel-parameters.txt
+++ b/Documentation/admin-guide/kernel-parameters.txt
@@ -977,12 +977,10 @@
earlycon= [KNL] Output early console device and options.
- [ARM64] The early console is determined by the
- stdout-path property in device tree's chosen node,
- or determined by the ACPI SPCR table.
-
- [X86] When used with no options the early console is
- determined by the ACPI SPCR table.
+ When used with no options the early console is
+ determined by stdout-path property in device tree's
+ chosen node or the ACPI SPCR table if supported by
+ the platform.
cdns,<addr>[,options]
Start an early, polled-mode console on a Cadence
--
2.20.1
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^ permalink raw reply related
* [PATCH v3] net: stmmac: socfpga: re-use the `interface` parameter from platform data
From: Alexandru Ardelean @ 2019-09-16 7:04 UTC (permalink / raw)
To: netdev, linux-stm32, linux-arm-kernel, linux-kernel
Cc: alexandre.torgue, joabreu, mcoquelin.stm32, peppe.cavallaro,
Alexandru Ardelean, davem
The socfpga sub-driver defines an `interface` field in the `socfpga_dwmac`
struct and parses it on init.
The shared `stmmac_probe_config_dt()` function also parses this from the
device-tree and makes it available on the returned `plat_data` (which is
the same data available via `netdev_priv()`).
All that's needed now is to dig that information out, via some
`dev_get_drvdata()` && `netdev_priv()` calls and re-use it.
Signed-off-by: Alexandru Ardelean <alexandru.ardelean@analog.com>
---
Changelog v2 -> v3:
* drop `inline` keyword
Changelog v1 -> v2:
* initially, this patch was developed on a 4.14 kernel, and adapted (badly)
to `net-next`, so it did not build ; the v2 has been fixed and adapted
correctly
.../net/ethernet/stmicro/stmmac/dwmac-socfpga.c | 15 ++++++++++-----
1 file changed, 10 insertions(+), 5 deletions(-)
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c
index c141fe783e87..e0212d2fc2a1 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c
@@ -46,7 +46,6 @@ struct socfpga_dwmac_ops {
};
struct socfpga_dwmac {
- int interface;
u32 reg_offset;
u32 reg_shift;
struct device *dev;
@@ -110,8 +109,6 @@ static int socfpga_dwmac_parse_data(struct socfpga_dwmac *dwmac, struct device *
struct resource res_tse_pcs;
struct resource res_sgmii_adapter;
- dwmac->interface = of_get_phy_mode(np);
-
sys_mgr_base_addr =
altr_sysmgr_regmap_lookup_by_phandle(np, "altr,sysmgr-syscon");
if (IS_ERR(sys_mgr_base_addr)) {
@@ -231,6 +228,14 @@ static int socfpga_dwmac_parse_data(struct socfpga_dwmac *dwmac, struct device *
return ret;
}
+static int socfpga_get_plat_phymode(struct socfpga_dwmac *dwmac)
+{
+ struct net_device *ndev = dev_get_drvdata(dwmac->dev);
+ struct stmmac_priv *priv = netdev_priv(ndev);
+
+ return priv->plat->interface;
+}
+
static int socfpga_set_phy_mode_common(int phymode, u32 *val)
{
switch (phymode) {
@@ -255,7 +260,7 @@ static int socfpga_set_phy_mode_common(int phymode, u32 *val)
static int socfpga_gen5_set_phy_mode(struct socfpga_dwmac *dwmac)
{
struct regmap *sys_mgr_base_addr = dwmac->sys_mgr_base_addr;
- int phymode = dwmac->interface;
+ int phymode = socfpga_get_plat_phymode(dwmac);
u32 reg_offset = dwmac->reg_offset;
u32 reg_shift = dwmac->reg_shift;
u32 ctrl, val, module;
@@ -314,7 +319,7 @@ static int socfpga_gen5_set_phy_mode(struct socfpga_dwmac *dwmac)
static int socfpga_gen10_set_phy_mode(struct socfpga_dwmac *dwmac)
{
struct regmap *sys_mgr_base_addr = dwmac->sys_mgr_base_addr;
- int phymode = dwmac->interface;
+ int phymode = socfpga_get_plat_phymode(dwmac);
u32 reg_offset = dwmac->reg_offset;
u32 reg_shift = dwmac->reg_shift;
u32 ctrl, val, module;
--
2.20.1
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^ permalink raw reply related
* Re: [PATCH net] net: stmmac: Hold rtnl lock in suspend/resume callbacks
From: David Miller @ 2019-09-16 7:12 UTC (permalink / raw)
To: Jose.Abreu
Cc: Joao.Pinto, alexandre.torgue, netdev, linux-kernel,
christophe.roullier, mcoquelin.stm32, peppe.cavallaro,
linux-stm32, linux-arm-kernel
In-Reply-To: <66b6c1395e4bbc836e80083b89b2189ce7382d7b.1568360548.git.joabreu@synopsys.com>
From: Jose Abreu <Jose.Abreu@synopsys.com>
Date: Fri, 13 Sep 2019 11:50:32 +0200
> We need to hold rnl lock in suspend and resume callbacks because phylink
> requires it. Otherwise we will get a WARN() in suspend and resume.
>
> Also, move phylink start and stop callbacks to inside device's internal
> lock so that we prevent concurrent HW accesses.
>
> Fixes: 74371272f97f ("net: stmmac: Convert to phylink and remove phylib logic")
> Reported-by: Christophe ROULLIER <christophe.roullier@st.com>
> Tested-by: Christophe ROULLIER <christophe.roullier@st.com>
> Signed-off-by: Jose Abreu <joabreu@synopsys.com>
Applied and queued up for v5.3 -stable.
Thanks.
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^ permalink raw reply
* [PATCH] arm64: use generic free_initrd_mem()
From: Mike Rapoport @ 2019-09-16 7:21 UTC (permalink / raw)
To: Catalin Marinas, Will Deacon, Mark Rutland
Cc: linux-kernel, linux-arm-kernel, Mike Rapoport
From: Mike Rapoport <rppt@linux.ibm.com>
arm64 calls memblock_free() for the initrd area in its implementation of
free_initrd_mem(), but this call has no actual effect that late in the boot
process. By the time initrd is freed, all the reserved memory is managed by
the page allocator and the memblock.reserved is unused, so there is no
point to update it.
Without the memblock_free() call the only difference between arm64 and the
generic versions of free_initrd_mem() is the memory poisoning. Switching
arm64 to the generic version will enable the poisoning.
Signed-off-by: Mike Rapoport <rppt@linux.ibm.com>
---
I've boot tested it on qemu and I've checked that kexec works.
arch/arm64/mm/init.c | 8 --------
1 file changed, 8 deletions(-)
diff --git a/arch/arm64/mm/init.c b/arch/arm64/mm/init.c
index f3c7952..8ad2934 100644
--- a/arch/arm64/mm/init.c
+++ b/arch/arm64/mm/init.c
@@ -567,14 +567,6 @@ void free_initmem(void)
unmap_kernel_range((u64)__init_begin, (u64)(__init_end - __init_begin));
}
-#ifdef CONFIG_BLK_DEV_INITRD
-void __init free_initrd_mem(unsigned long start, unsigned long end)
-{
- free_reserved_area((void *)start, (void *)end, 0, "initrd");
- memblock_free(__virt_to_phys(start), end - start);
-}
-#endif
-
/*
* Dump out memory limit information on panic.
*/
--
2.7.4
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