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* Re: [WIP 0/3] Memory model and atomic API in Rust
From: Linus Torvalds @ 2024-03-25 17:44 UTC (permalink / raw)
  To: Philipp Stanner
  Cc: Kent Overstreet, Boqun Feng, rust-for-linux, linux-kernel,
	linux-arch, llvm, Miguel Ojeda, Alex Gaynor, Wedson Almeida Filho,
	Gary Guo, Björn Roy Baron, Benno Lossin, Andreas Hindborg,
	Alice Ryhl, Alan Stern, Andrea Parri, Will Deacon, Peter Zijlstra,
	Nicholas Piggin, David Howells, Jade Alglave, Luc Maranget,
	Paul E. McKenney, Akira Yokosawa, Daniel Lustig, Joel Fernandes,
	Nathan Chancellor, Nick Desaulniers, kent.overstreet,
	Greg Kroah-Hartman, elver, Mark Rutland, Thomas Gleixner,
	Ingo Molnar, Borislav Petkov, Dave Hansen, x86, H. Peter Anvin,
	Catalin Marinas, linux-arm-kernel, linux-fsdevel
In-Reply-To: <c51227c9a4103ad1de43fc3cda5396b1196c31d7.camel@redhat.com>

On Mon, 25 Mar 2024 at 06:57, Philipp Stanner <pstanner@redhat.com> wrote:
>
> On Fri, 2024-03-22 at 17:36 -0700, Linus Torvalds wrote:
> >
> > It's kind of like our "volatile" usage. If you read the C (and C++)
> > standards, you'll find that you should use "volatile" on data types.
> > That's almost *never* what the kernel does. The kernel uses
> > "volatile"
> > in _code_ (ie READ_ONCE() etc), and uses it by casting etc.
> >
> > Compiler people don't tend to really like those kinds of things.
>
> Just for my understanding: Why don't they like it?

So I actually think most compiler people are perfectly fine with the
kernel model of mostly doing 'volatile' not on the data structures
themselves, but as accesses through casts.

It's very traditional C, and there's actually nothing particularly odd
about it. Not even from a compiler standpoint.

In fact, I personally will argue that it is fundamentally wrong to
think that the underlying data has to be volatile. A variable may be
entirely stable in some cases (ie locks held), but not in others.

So it's not the *variable* (aka "object") that is 'volatile', it's the
*context* that makes a particular access volatile.

That explains why the kernel has basically zero actual volatile
objects, and 99% of all volatile accesses are done through accessor
functions that use a cast to mark a particular access volatile.

But I've had negative comments from compiler people who read the
standards as language lawyers (which honestly, I despise - it's always
possible to try to argue what the meaning of some wording is), and
particularly C++ people used to be very very antsy about "volatile".

They had some truly _serious_ problems with volatile.

The C++ people spent absolutely insane amounts of time arguing about
"volatile objects" vs "accesses", and how an access through a cast
didn't make the underlying object volatile etc.

There were endless discussions because a lvalue isn't supposed to be
an access (an lvalue is something that is being acted on, and it
shouldn't imply an access because an access will then cause other
things in C++). So a statement expression that was just an lvalue
shouldn't imply an access in C++ originally, but obviously when the
thing was volatile it *had* to do so, and there was gnashing of teeth
over this all.

And all of it was purely semantic nitpicking about random wording. The
C++ people finally tried to save face by claiming that it was always
the C (not C++) rules that were unclear, and introduced the notion of
"glvalue", and it's all good now, but there's literally decades of
language lawyering and pointless nitpicking about the difference
between "objects" and "accesses".

Sane people didn't care, but if you reported a compiler bug about
volatile use, you had better be ready to sit back and be flamed for
how your volatile pointer cast wasn't an "object" and that the
compiler that clearly generated wrong code was technically correct,
and that your mother was a hamster.

It's a bit like the NULL debacle. Another thing that took the C++
people a couple of decades to admit they were wrong all along, and
that NULL isn't actually 'integer zero' in any sane language that
claims to care deeply about types.

[ And again, to save face, at no point did they say "ok, '(void *)0'
is fine" - they introduced a new __nullptr thing just so that they
wouldn't have to admit that their decades of arguing was just them
being wrong. You'll find another decade of arguments explaining the
finer details about _that_ difference ]

It turns out that the people who are language-lawyering nitpickers are
then happy to be "proven right" by adding some more pointless
syntacting language-lawyering language.

Which I guess makes sense, but to the rest of us it all looks a bit pointless.

                  Linus

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^ permalink raw reply

* Re: [PATCH v2] spi: mt7621: allow GPIO chip select lines
From: Mark Brown @ 2024-03-25 17:44 UTC (permalink / raw)
  To: Matthias Brugger, AngeloGioacchino Del Regno, Justin Swartz
  Cc: linux-spi, linux-kernel, linux-arm-kernel, linux-mediatek
In-Reply-To: <20240316010302.20776-1-justin.swartz@risingedge.co.za>

On Sat, 16 Mar 2024 03:03:01 +0200, Justin Swartz wrote:
> Extract a magic number, from mt7621_spi_probe(), used to
> declare the number of chip select lines (which co-incides
> with the native chip select count of 2) to a macro.
> 
> Use the newly defined MT7621_NATIVE_CS_COUNT macro to
> instead populate both the spi_controller's max_native_cs
> and num_chipselect members.
> 
> [...]

Applied to

   https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-next

Thanks!

[1/1] spi: mt7621: allow GPIO chip select lines
      commit: 2a741cd6ec5899cec054ae27120f490ad57bc6bb

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

Thanks,
Mark


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^ permalink raw reply

* Re: (subset) [PATCH v5 0/3] add pmic pca9451a support
From: Mark Brown @ 2024-03-25 17:44 UTC (permalink / raw)
  To: frank.li, ping.bai, lgirdwood, robh+dt, krzysztof.kozlowski+dt,
	conor+dt, shawnguo, s.hauer, Joy Zou
  Cc: kernel, festevam, linux-imx, devicetree, linux-arm-kernel,
	linux-kernel, imx
In-Reply-To: <20240318095633.4079027-1-joy.zou@nxp.com>

On Mon, 18 Mar 2024 17:56:30 +0800, Joy Zou wrote:
> The patchset supports pmic pca9451a.
> For the details, please check the patch commit log.
> 

Applied to

   https://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator.git for-next

Thanks!

[1/3] regulator: dt-bindings: pca9450: add pca9451a support
      commit: 0f3b73eb1440d18d2236ac660d4aa76fd726bec7
[2/3] regulator: pca9450: add pca9451a support
      commit: 5edeb7d312628961046eec9b26a7e72f44baf846

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

Thanks,
Mark


_______________________________________________
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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply

* Re: (subset) [PATCH v3 0/3] add pmic pca9451a support
From: Mark Brown @ 2024-03-25 17:44 UTC (permalink / raw)
  To: ping.bai, lgirdwood, robh+dt, krzysztof.kozlowski+dt, conor+dt,
	shawnguo, s.hauer, Joy Zou
  Cc: kernel, festevam, linux-imx, devicetree, linux-arm-kernel,
	linux-kernel, imx
In-Reply-To: <20240311113201.664252-1-joy.zou@nxp.com>

On Mon, 11 Mar 2024 19:31:58 +0800, Joy Zou wrote:
> The patchset supports pmic pca9451a.
> For the details, please check the patch commit log.
> 

Applied to

   https://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator.git for-next

Thanks!

[1/3] regulator: dt-bindings: pca9450: add pca9451a support
      commit: 0f3b73eb1440d18d2236ac660d4aa76fd726bec7
[2/3] regulator: pca9450: add pca9451a support
      commit: 5edeb7d312628961046eec9b26a7e72f44baf846

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

Thanks,
Mark


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply

* Re: (subset) [PATCH v4 0/3] add pmic pca9451a support
From: Mark Brown @ 2024-03-25 17:44 UTC (permalink / raw)
  To: ping.bai, lgirdwood, robh+dt, krzysztof.kozlowski+dt, conor+dt,
	shawnguo, s.hauer, Joy Zou
  Cc: kernel, festevam, linux-imx, devicetree, linux-arm-kernel,
	linux-kernel, imx
In-Reply-To: <20240314032923.2360248-1-joy.zou@nxp.com>

On Thu, 14 Mar 2024 11:29:20 +0800, Joy Zou wrote:
> The patchset supports pmic pca9451a.
> For the details, please check the patch commit log.
> 

Applied to

   https://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator.git for-next

Thanks!

[1/3] regulator: dt-bindings: pca9450: add pca9451a support
      commit: 0f3b73eb1440d18d2236ac660d4aa76fd726bec7
[2/3] regulator: pca9450: add pca9451a support
      commit: 5edeb7d312628961046eec9b26a7e72f44baf846

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

Thanks,
Mark


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply

* Re: (subset) [PATCH v1 0/3] add pmic pca9451a support
From: Mark Brown @ 2024-03-25 17:44 UTC (permalink / raw)
  To: ping.bai, lgirdwood, robh+dt, krzysztof.kozlowski+dt, conor+dt,
	shawnguo, s.hauer, Joy Zou
  Cc: kernel, festevam, linux-imx, devicetree, linux-arm-kernel,
	linux-kernel
In-Reply-To: <20230531065724.3671795-1-joy.zou@nxp.com>

On Wed, 31 May 2023 14:57:21 +0800, Joy Zou wrote:
> The patchset supports pmic pca9451a.
> For the details, please check the patch commit log.
> 
> Joy Zou (3):
>   dt-bindings: regulator: pca9450: add pca9451a support
>   regulator: pca9450: add pca9451a support
>   arm64: dts: imx93-11x11-evk: add pca9451a support
> 
> [...]

Applied to

   https://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator.git for-next

Thanks!

[1/3] dt-bindings: regulator: pca9450: add pca9451a support
      (no commit info)
[2/3] regulator: pca9450: add pca9451a support
      commit: 5edeb7d312628961046eec9b26a7e72f44baf846

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

Thanks,
Mark


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply

* Re: [PATCH v2 1/1] ASoC: fsl: imx-es8328: Switch to using gpiod API
From: Mark Brown @ 2024-03-25 17:44 UTC (permalink / raw)
  To: alsa-devel, linuxppc-dev, linux-sound, imx, linux-arm-kernel,
	linux-kernel, Andy Shevchenko
  Cc: Shengjiu Wang, Xiubo Li, Fabio Estevam, Nicolin Chen,
	Liam Girdwood, Jaroslav Kysela, Takashi Iwai, Shawn Guo,
	Sascha Hauer, Pengutronix Kernel Team
In-Reply-To: <20240318200804.181516-1-andriy.shevchenko@linux.intel.com>

On Mon, 18 Mar 2024 22:07:56 +0200, Andy Shevchenko wrote:
> This updates the driver to gpiod API, and removes yet another use of
> of_get_named_gpio().
> 
> 

Applied to

   https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-next

Thanks!

[1/1] ASoC: fsl: imx-es8328: Switch to using gpiod API
      commit: 9855f05e553637f05494cf47a3154cbf9a5cfc67

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

Thanks,
Mark


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply

* Re: [PATCH 2/3] genirq/msi: cache the last msi msg
From: Thomas Gleixner @ 2024-03-25 17:40 UTC (permalink / raw)
  To: Peng Fan (OSS), Will Deacon, Robin Murphy, Joerg Roedel,
	Marc Zyngier
  Cc: Bixuan Cui, linux-arm-kernel, iommu, linux-kernel, Peng Fan
In-Reply-To: <20240324-smmu-v3-v1-2-11bc96e156a5@nxp.com>

On Sun, Mar 24 2024 at 20:28, Peng Fan (OSS) wrote:
> From: Peng Fan <peng.fan@nxp.com>
>
> Cache the last msi msg which will be used for ARM SMMU V3 resume
>
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> ---
>  kernel/irq/msi.c | 3 +++
>  1 file changed, 3 insertions(+)
>
> diff --git a/kernel/irq/msi.c b/kernel/irq/msi.c
> index f90952ebc494..9d7e0a675089 100644
> --- a/kernel/irq/msi.c
> +++ b/kernel/irq/msi.c
> @@ -617,6 +617,9 @@ static unsigned int msi_domain_get_hwsize(struct device *dev, unsigned int domid
>  static inline void irq_chip_write_msi_msg(struct irq_data *data,
>  					  struct msi_msg *msg)
>  {
> +	struct msi_desc *desc = irq_data_get_msi_desc(data);
> +
> +	desc->msg = *msg;
>  	data->chip->irq_write_msi_msg(data, msg);
>  }

This should remove the very same line in the PCI/MSI code, no?

Thanks,

        tglx


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^ permalink raw reply

* Re: [PATCH 3/3] iommu/arm-smmu-v3: support suspend/resume
From: Thomas Gleixner @ 2024-03-25 17:29 UTC (permalink / raw)
  To: Jason Gunthorpe, Peng Fan (OSS)
  Cc: Will Deacon, Robin Murphy, Joerg Roedel, Marc Zyngier, Bixuan Cui,
	linux-arm-kernel, iommu, linux-kernel, Peng Fan
In-Reply-To: <20240325134848.GA8419@ziepe.ca>

On Mon, Mar 25 2024 at 10:48, Jason Gunthorpe wrote:
> On Sun, Mar 24, 2024 at 08:29:00PM +0800, Peng Fan (OSS) wrote:
>> +static void arm_smmu_resume_unique_irqs(struct arm_smmu_device *smmu)
>> +{
>> +	struct device *dev = smmu->dev;
>> +	struct msi_desc *desc;
>> +	struct msi_msg msg;
>> +
>> +	if (!dev->msi.domain)
>> +		return;
>> +
>> +	desc = irq_get_msi_desc(smmu->evtq.q.irq);
>> +	if (desc) {
>> +		get_cached_msi_msg(smmu->evtq.q.irq, &msg);
>> +		arm_smmu_write_msi_msg(desc, &msg);
>> +	}
>> +
>> +	desc = irq_get_msi_desc(smmu->gerr_irq);
>> +	if (desc) {
>> +		get_cached_msi_msg(smmu->gerr_irq, &msg);
>> +		arm_smmu_write_msi_msg(desc, &msg);
>> +	}
>> +
>> +	if (smmu->features & ARM_SMMU_FEAT_PRI) {
>> +		desc = irq_get_msi_desc(smmu->priq.q.irq);
>> +		if (desc) {
>> +			get_cached_msi_msg(smmu->priq.q.irq, &msg);
>> +			arm_smmu_write_msi_msg(desc, &msg);
>> +		}
>> +	}
>> +}
>
> I wonder if this should be done instead by converting the driver away
> from platform MSI to the new MSI mechanism?

There is work in progress for that. Should come around in the next
weeks.

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* [PATCH v2 3/3] ARM: mach-ixp4xx: Rework support and directory structure
From: Andrew Davis @ 2024-03-25 17:26 UTC (permalink / raw)
  To: Russell King, Baruch Siach, Vladimir Zapolskiy, Masami Hiramatsu,
	Arnd Bergmann, Geert Uytterhoeven
  Cc: linux-arm-kernel, linux-kernel, Andrew Davis
In-Reply-To: <20240325172619.113661-1-afd@ti.com>

Having a platform need a mach-* directory should be seen as a negative,
it means the platform needs special non-standard handling. ARM64 support
does not allow mach-* directories at all. While we may not get to that
given all the non-standard architectures we support, we should still try
to get as close as we can and reduce the number of mach directories.

The mach-ixp4xx/ directory and files, provides just one "feature":
having the kernel print the machine name if the DTB does not also contain
a "model" string (which they always do). To reduce the number of mach-*
directories let's do without that feature and remove this directory.

Note the fallback machine has a default l2c_aux_mask value set to ~0,
which is different than the value of 0 used when none is provided. This
is safe here as this platform does not use an l2x0 cache controller.

Signed-off-by: Andrew Davis <afd@ti.com>
---

Changes from v1:
 - Updated commit desc with l2c_aux_mask info
 - Rebased on v6.9-rc1

 MAINTAINERS                      |  1 -
 arch/arm/Kconfig.platforms       | 19 +++++++++++++++++++
 arch/arm/mach-ixp4xx/Kconfig     | 19 -------------------
 arch/arm/mach-ixp4xx/Makefile    |  2 --
 arch/arm/mach-ixp4xx/ixp4xx-of.c | 22 ----------------------
 5 files changed, 19 insertions(+), 44 deletions(-)
 delete mode 100644 arch/arm/mach-ixp4xx/Kconfig
 delete mode 100644 arch/arm/mach-ixp4xx/Makefile
 delete mode 100644 arch/arm/mach-ixp4xx/ixp4xx-of.c

diff --git a/MAINTAINERS b/MAINTAINERS
index 947186f0b0c64..a0fcb6d27c0e3 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -2270,7 +2270,6 @@ F:	Documentation/devicetree/bindings/memory-controllers/intel,ixp4xx-expansion*
 F:	Documentation/devicetree/bindings/rng/intel,ixp46x-rng.yaml
 F:	Documentation/devicetree/bindings/timer/intel,ixp4xx-timer.yaml
 F:	arch/arm/boot/dts/intel/ixp/
-F:	arch/arm/mach-ixp4xx/
 F:	drivers/bus/intel-ixp4xx-eb.c
 F:	drivers/char/hw_random/ixp4xx-rng.c
 F:	drivers/clocksource/timer-ixp4xx.c
diff --git a/arch/arm/Kconfig.platforms b/arch/arm/Kconfig.platforms
index 29fbed968d361..bf2185f87180c 100644
--- a/arch/arm/Kconfig.platforms
+++ b/arch/arm/Kconfig.platforms
@@ -112,6 +112,25 @@ config ARCH_HPE_GXP
 
 endif
 
+config ARCH_IXP4XX
+	bool "IXP4xx-based platforms"
+	depends on ARCH_MULTI_V5
+	depends on CPU_BIG_ENDIAN
+	select ARM_APPENDED_DTB # Old Redboot bootloaders deployed
+	select CPU_XSCALE
+	select GPIO_IXP4XX
+	select GPIOLIB
+	select FORCE_PCI
+	select I2C
+	select I2C_IOP3XX
+	select IXP4XX_IRQ
+	select IXP4XX_TIMER
+	select USB_EHCI_BIG_ENDIAN_DESC
+	select USB_EHCI_BIG_ENDIAN_MMIO
+	select USE_OF
+	help
+	  Support for Intel's IXP4XX (XScale) family of processors.
+
 config ARCH_LPC18XX
 	bool "NXP LPC18xx/LPC43xx"
 	depends on ARM_SINGLE_ARMV7M
diff --git a/arch/arm/mach-ixp4xx/Kconfig b/arch/arm/mach-ixp4xx/Kconfig
deleted file mode 100644
index cb46802f5ce52..0000000000000
--- a/arch/arm/mach-ixp4xx/Kconfig
+++ /dev/null
@@ -1,19 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0-only
-menuconfig ARCH_IXP4XX
-	bool "IXP4xx-based platforms"
-	depends on ARCH_MULTI_V5
-	depends on CPU_BIG_ENDIAN
-	select ARM_APPENDED_DTB # Old Redboot bootloaders deployed
-	select CPU_XSCALE
-	select GPIO_IXP4XX
-	select GPIOLIB
-	select FORCE_PCI
-	select I2C
-	select I2C_IOP3XX
-	select IXP4XX_IRQ
-	select IXP4XX_TIMER
-	select USB_EHCI_BIG_ENDIAN_DESC
-	select USB_EHCI_BIG_ENDIAN_MMIO
-	select USE_OF
-	help
-	  Support for Intel's IXP4XX (XScale) family of processors.
diff --git a/arch/arm/mach-ixp4xx/Makefile b/arch/arm/mach-ixp4xx/Makefile
deleted file mode 100644
index 3d1c9d854c7f3..0000000000000
--- a/arch/arm/mach-ixp4xx/Makefile
+++ /dev/null
@@ -1,2 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0
-obj-y	+= ixp4xx-of.o
diff --git a/arch/arm/mach-ixp4xx/ixp4xx-of.c b/arch/arm/mach-ixp4xx/ixp4xx-of.c
deleted file mode 100644
index 1b4d84a5b02f6..0000000000000
--- a/arch/arm/mach-ixp4xx/ixp4xx-of.c
+++ /dev/null
@@ -1,22 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * IXP4xx Device Tree boot support
- */
-#include <asm/mach/arch.h>
-
-/*
- * We handle 4 different SoC families. These compatible strings are enough
- * to provide the core so that different boards can add their more detailed
- * specifics.
- */
-static const char *ixp4xx_of_board_compat[] = {
-	"intel,ixp42x",
-	"intel,ixp43x",
-	"intel,ixp45x",
-	"intel,ixp46x",
-	NULL,
-};
-
-DT_MACHINE_START(IXP4XX_DT, "IXP4xx (Device Tree)")
-	.dt_compat	= ixp4xx_of_board_compat,
-MACHINE_END
-- 
2.39.2


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* [PATCH v2 1/3] ARM: mach-hpe: Rework support and directory structure
From: Andrew Davis @ 2024-03-25 17:26 UTC (permalink / raw)
  To: Russell King, Baruch Siach, Vladimir Zapolskiy, Masami Hiramatsu,
	Arnd Bergmann, Geert Uytterhoeven
  Cc: linux-arm-kernel, linux-kernel, Andrew Davis

Having a platform need a mach-* directory should be seen as a negative,
it means the platform needs special non-standard handling. ARM64 support
does not allow mach-* directories at all. While we may not get to that
given all the non-standard architectures we support, we should still try
to get as close as we can and reduce the number of mach directories.

The mach-hpe/ directory and files, provides just one "feature":
having the kernel print the machine name if the DTB does not also contain
a "model" string (which they always do). To reduce the number of mach-*
directories let's do without that feature and remove this directory.

Note, we drop the l2c_aux_mask = ~0 line, but this is safe as
the fallback GENERIC_DT machine has that as the default.

Signed-off-by: Andrew Davis <afd@ti.com>
---

Changes from v1:
 - Updated commit desc with l2c_aux_mask info
 - Rebased on v6.9-rc1

 MAINTAINERS                |  1 -
 arch/arm/Kconfig           |  2 --
 arch/arm/Kconfig.platforms | 25 +++++++++++++++++++++++++
 arch/arm/Makefile          |  1 -
 arch/arm/mach-hpe/Kconfig  | 23 -----------------------
 arch/arm/mach-hpe/Makefile |  1 -
 arch/arm/mach-hpe/gxp.c    | 15 ---------------
 7 files changed, 25 insertions(+), 43 deletions(-)
 delete mode 100644 arch/arm/mach-hpe/Kconfig
 delete mode 100644 arch/arm/mach-hpe/Makefile
 delete mode 100644 arch/arm/mach-hpe/gxp.c

diff --git a/MAINTAINERS b/MAINTAINERS
index aa3b947fb0801..947186f0b0c64 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -2244,7 +2244,6 @@ F:	Documentation/devicetree/bindings/spi/hpe,gxp-spifi.yaml
 F:	Documentation/devicetree/bindings/timer/hpe,gxp-timer.yaml
 F:	Documentation/hwmon/gxp-fan-ctrl.rst
 F:	arch/arm/boot/dts/hpe/
-F:	arch/arm/mach-hpe/
 F:	drivers/clocksource/timer-gxp.c
 F:	drivers/hwmon/gxp-fan-ctrl.c
 F:	drivers/i2c/busses/i2c-gxp.c
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index b14aed3a17abb..9f55fd24c163a 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -386,8 +386,6 @@ source "arch/arm/mach-highbank/Kconfig"
 
 source "arch/arm/mach-hisi/Kconfig"
 
-source "arch/arm/mach-hpe/Kconfig"
-
 source "arch/arm/mach-imx/Kconfig"
 
 source "arch/arm/mach-ixp4xx/Kconfig"
diff --git a/arch/arm/Kconfig.platforms b/arch/arm/Kconfig.platforms
index 845ab08e20a4b..5c19c1f2cff61 100644
--- a/arch/arm/Kconfig.platforms
+++ b/arch/arm/Kconfig.platforms
@@ -87,6 +87,31 @@ config MACH_ASM9260
 	help
 	  Support for Alphascale ASM9260 based platform.
 
+menuconfig ARCH_HPE
+	bool "HPE SoC support"
+	depends on ARCH_MULTI_V7
+	help
+	  This enables support for HPE ARM based BMC chips.
+
+if ARCH_HPE
+
+config ARCH_HPE_GXP
+	bool "HPE GXP SoC"
+	depends on ARCH_MULTI_V7
+	select ARM_VIC
+	select GENERIC_IRQ_CHIP
+	select CLKSRC_MMIO
+	help
+	  HPE GXP is the name of the HPE Soc. This SoC is used to implement many
+	  BMC features at HPE. It supports ARMv7 architecture based on the Cortex
+	  A9 core. It is capable of using an AXI bus to which a memory controller
+	  is attached. It has multiple SPI interfaces to connect boot flash and
+	  BIOS flash. It uses a 10/100/1000 MAC for network connectivity. It
+	  has multiple i2c engines to drive connectivity with a host
+	  infrastructure.
+
+endif
+
 menuconfig ARCH_MOXART
 	bool "MOXA ART SoC"
 	depends on ARCH_MULTI_V4
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index d82908b1b1bb4..131778fbc6827 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -182,7 +182,6 @@ machine-$(CONFIG_ARCH_FOOTBRIDGE)	+= footbridge
 machine-$(CONFIG_ARCH_GEMINI)		+= gemini
 machine-$(CONFIG_ARCH_HIGHBANK)		+= highbank
 machine-$(CONFIG_ARCH_HISI)		+= hisi
-machine-$(CONFIG_ARCH_HPE)		+= hpe
 machine-$(CONFIG_ARCH_IXP4XX)		+= ixp4xx
 machine-$(CONFIG_ARCH_KEYSTONE)		+= keystone
 machine-$(CONFIG_ARCH_LPC18XX)		+= lpc18xx
diff --git a/arch/arm/mach-hpe/Kconfig b/arch/arm/mach-hpe/Kconfig
deleted file mode 100644
index 3372bbf38d383..0000000000000
--- a/arch/arm/mach-hpe/Kconfig
+++ /dev/null
@@ -1,23 +0,0 @@
-menuconfig ARCH_HPE
-	bool "HPE SoC support"
-	depends on ARCH_MULTI_V7
-	help
-	  This enables support for HPE ARM based BMC chips.
-if ARCH_HPE
-
-config ARCH_HPE_GXP
-	bool "HPE GXP SoC"
-	depends on ARCH_MULTI_V7
-	select ARM_VIC
-	select GENERIC_IRQ_CHIP
-	select CLKSRC_MMIO
-	help
-	  HPE GXP is the name of the HPE Soc. This SoC is used to implement many
-	  BMC features at HPE. It supports ARMv7 architecture based on the Cortex
-	  A9 core. It is capable of using an AXI bus to which a memory controller
-	  is attached. It has multiple SPI interfaces to connect boot flash and
-	  BIOS flash. It uses a 10/100/1000 MAC for network connectivity. It
-	  has multiple i2c engines to drive connectivity with a host
-	  infrastructure.
-
-endif
diff --git a/arch/arm/mach-hpe/Makefile b/arch/arm/mach-hpe/Makefile
deleted file mode 100644
index 8b0a91234df4e..0000000000000
--- a/arch/arm/mach-hpe/Makefile
+++ /dev/null
@@ -1 +0,0 @@
-obj-$(CONFIG_ARCH_HPE_GXP) += gxp.o
diff --git a/arch/arm/mach-hpe/gxp.c b/arch/arm/mach-hpe/gxp.c
deleted file mode 100644
index 581c8da517b86..0000000000000
--- a/arch/arm/mach-hpe/gxp.c
+++ /dev/null
@@ -1,15 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/* Copyright (C) 2022 Hewlett-Packard Enterprise Development Company, L.P. */
-
-#include <asm/mach/arch.h>
-
-static const char * const gxp_board_dt_compat[] = {
-	"hpe,gxp",
-	NULL,
-};
-
-DT_MACHINE_START(GXP_DT, "HPE GXP")
-	.dt_compat	= gxp_board_dt_compat,
-	.l2c_aux_val = 0,
-	.l2c_aux_mask = ~0,
-MACHINE_END
-- 
2.39.2


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* [PATCH v2 2/3] ARM: mach-lpc18xx: Rework support and directory structure
From: Andrew Davis @ 2024-03-25 17:26 UTC (permalink / raw)
  To: Russell King, Baruch Siach, Vladimir Zapolskiy, Masami Hiramatsu,
	Arnd Bergmann, Geert Uytterhoeven
  Cc: linux-arm-kernel, linux-kernel, Andrew Davis
In-Reply-To: <20240325172619.113661-1-afd@ti.com>

Having a platform need a mach-* directory should be seen as a negative,
it means the platform needs special non-standard handling. ARM64 support
does not allow mach-* directories at all. While we may not get to that
given all the non-standard architectures we support, we should still try
to get as close as we can and reduce the number of mach directories.

The mach-lpc18xx/ directory and files, provides just one "feature":
having the kernel print the machine name if the DTB does not also contain
a "model" string (which they always do). To reduce the number of mach-*
directories let's do without that feature and remove this directory.

Note the fallback machine has a default l2c_aux_mask value set to ~0,
which is different than the value of 0 used when none is provided. This
is safe here as this platform does not use an l2x0 cache controller.

Signed-off-by: Andrew Davis <afd@ti.com>
---

Changes from v1:
 - Updated commit desc with l2c_aux_mask info
 - Rebased on v6.9-rc1

 arch/arm/Kconfig                 | 11 -----------
 arch/arm/Kconfig.platforms       | 11 +++++++++++
 arch/arm/Makefile                |  1 -
 arch/arm/mach-lpc18xx/Makefile   |  2 --
 arch/arm/mach-lpc18xx/board-dt.c | 19 -------------------
 5 files changed, 11 insertions(+), 33 deletions(-)
 delete mode 100644 arch/arm/mach-lpc18xx/Makefile
 delete mode 100644 arch/arm/mach-lpc18xx/board-dt.c

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 9f55fd24c163a..66a16ee1ed8f1 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -459,17 +459,6 @@ source "arch/arm/mach-vt8500/Kconfig"
 source "arch/arm/mach-zynq/Kconfig"
 
 # ARMv7-M architecture
-config ARCH_LPC18XX
-	bool "NXP LPC18xx/LPC43xx"
-	depends on ARM_SINGLE_ARMV7M
-	select ARCH_HAS_RESET_CONTROLLER
-	select ARM_AMBA
-	select CLKSRC_LPC32XX
-	select PINCTRL
-	help
-	  Support for NXP's LPC18xx Cortex-M3 and LPC43xx Cortex-M4
-	  high performance microcontrollers.
-
 config ARCH_MPS2
 	bool "ARM MPS2 platform"
 	depends on ARM_SINGLE_ARMV7M
diff --git a/arch/arm/Kconfig.platforms b/arch/arm/Kconfig.platforms
index 5c19c1f2cff61..29fbed968d361 100644
--- a/arch/arm/Kconfig.platforms
+++ b/arch/arm/Kconfig.platforms
@@ -112,6 +112,17 @@ config ARCH_HPE_GXP
 
 endif
 
+config ARCH_LPC18XX
+	bool "NXP LPC18xx/LPC43xx"
+	depends on ARM_SINGLE_ARMV7M
+	select ARCH_HAS_RESET_CONTROLLER
+	select ARM_AMBA
+	select CLKSRC_LPC32XX
+	select PINCTRL
+	help
+	  Support for NXP's LPC18xx Cortex-M3 and LPC43xx Cortex-M4
+	  high performance microcontrollers.
+
 menuconfig ARCH_MOXART
 	bool "MOXA ART SoC"
 	depends on ARCH_MULTI_V4
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 131778fbc6827..8da36594c2f3f 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -184,7 +184,6 @@ machine-$(CONFIG_ARCH_HIGHBANK)		+= highbank
 machine-$(CONFIG_ARCH_HISI)		+= hisi
 machine-$(CONFIG_ARCH_IXP4XX)		+= ixp4xx
 machine-$(CONFIG_ARCH_KEYSTONE)		+= keystone
-machine-$(CONFIG_ARCH_LPC18XX)		+= lpc18xx
 machine-$(CONFIG_ARCH_LPC32XX)		+= lpc32xx
 machine-$(CONFIG_ARCH_MESON)		+= meson
 machine-$(CONFIG_ARCH_MMP)		+= mmp
diff --git a/arch/arm/mach-lpc18xx/Makefile b/arch/arm/mach-lpc18xx/Makefile
deleted file mode 100644
index c80d80c199d37..0000000000000
--- a/arch/arm/mach-lpc18xx/Makefile
+++ /dev/null
@@ -1,2 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0-only
-obj-y += board-dt.o
diff --git a/arch/arm/mach-lpc18xx/board-dt.c b/arch/arm/mach-lpc18xx/board-dt.c
deleted file mode 100644
index 4729eb83401ae..0000000000000
--- a/arch/arm/mach-lpc18xx/board-dt.c
+++ /dev/null
@@ -1,19 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Device Tree board file for NXP LPC18xx/43xx
- *
- * Copyright (C) 2015 Joachim Eastwood <manabian@gmail.com>
- */
-
-#include <asm/mach/arch.h>
-
-static const char *const lpc18xx_43xx_compat[] __initconst = {
-	"nxp,lpc1850",
-	"nxp,lpc4350",
-	"nxp,lpc4370",
-	NULL
-};
-
-DT_MACHINE_START(LPC18XXDT, "NXP LPC18xx/43xx (Device Tree)")
-	.dt_compat = lpc18xx_43xx_compat,
-MACHINE_END
-- 
2.39.2


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* Re: [PATCH 1/3] remoteproc: Add Arm remoteproc driver
From: Abdellatif El Khlifi @ 2024-03-25 17:13 UTC (permalink / raw)
  To: Mathieu Poirier
  Cc: Sudeep Holla, Abdellatif El Khlifi, Bjorn Andersson, Rob Herring,
	Liviu Dudau, Lorenzo Pieralisi, Krzysztof Kozlowski, Conor Dooley,
	Drew.Reed, Adam.Johnston, linux-arm-kernel, devicetree,
	linux-kernel, linux-remoteproc
In-Reply-To: <CANLsYkzdfP8Np-XwPDt=GBNLYiSypd8tNdb29KUwr+tyi7gJEA@mail.gmail.com>

Hi Mathieu,

> > > > > > > > This is an initial patchset for allowing to turn on and off the remote processor.
> > > > > > > > The FW is already loaded before the Corstone-1000 SoC is powered on and this
> > > > > > > > is done through the FPGA board bootloader in case of the FPGA target. Or by the Corstone-1000 FVP model
> > > > > > > > (emulator).
> > > > > > > >
> > > > > > > >From the above I take it that booting with a preloaded firmware is a
> > > > > > > scenario that needs to be supported and not just a temporary stage.
> > > > > >
> > > > > > The current status of the Corstone-1000 SoC requires that there is
> > > > > > a preloaded firmware for the external core. Preloading is done externally
> > > > > > either through the FPGA bootloader or the emulator (FVP) before powering
> > > > > > on the SoC.
> > > > > >
> > > > >
> > > > > Ok
> > > > >
> > > > > > Corstone-1000 will be upgraded in a way that the A core running Linux is able
> > > > > > to share memory with the remote core and also being able to access the remote
> > > > > > core memory so Linux can copy the firmware to. This HW changes are still
> > > > > > This is why this patchset is relying on a preloaded firmware. And it's the step 1
> > > > > > of adding remoteproc support for Corstone.
> > > > > >
> > > > >
> > > > > Ok, so there is a HW problem where A core and M core can't see each other's
> > > > > memory, preventing the A core from copying the firmware image to the proper
> > > > > location.
> > > > >
> > > > > When the HW is fixed, will there be a need to support scenarios where the
> > > > > firmware image has been preloaded into memory?
> > > >
> > > > No, this scenario won't apply when we get the HW upgrade. No need for an
> > > > external entity anymore. The firmware(s) will all be files in the linux filesystem.
> > > >
> > >
> > > Very well.  I am willing to continue with this driver but it does so little that
> > > I wonder if it wouldn't simply be better to move forward with upstreaming when
> > > the HW is fixed.  The choice is yours.
> > >
> >
> > I think Robin has raised few points that need clarification. I think it was
> > done as part of DT binding patch. I share those concerns and I wanted to
> > reaching to the same concerns by starting the questions I asked on corstone
> > device tree changes.
> >
> 
> I also agree with Robin's point of view.  Proceeding with an initial
> driver with minimal functionality doesn't preclude having complete
> bindings.  But that said and as I pointed out, it might be better to
> wait for the HW to be fixed before moving forward.

We checked with the HW teams. The missing features will be implemented but
this will take time.

The foundation driver as it is right now is still valuable for people wanting to
know how to power control Corstone external systems in a future proof manner
(even in the incomplete state). We prefer to address all the review comments
made so it can be merged. This includes making the DT binding as complete as
possible as you advised. Then, once the HW is ready, I'll implement the comms
and the FW reload part. Is that OK please ?

Cheers,
Abdellatif

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* [PATCH] ARM: dts: stm32: add heartbeat led for stm32mp157c-ed1
From: patrice.chotard @ 2024-03-25 17:06 UTC (permalink / raw)
  To: robh+dt, Krzysztof Kozlowski, alexandre.torgue
  Cc: linux-stm32, linux-arm-kernel, linux-kernel, devicetree,
	Patrice Chotard

From: Patrice Chotard <patrice.chotard@foss.st.com>

Add heartbeat led for stm32mp157c-ed1.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
---
 arch/arm/boot/dts/st/stm32mp157c-ed1.dts | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/arch/arm/boot/dts/st/stm32mp157c-ed1.dts b/arch/arm/boot/dts/st/stm32mp157c-ed1.dts
index 66ed5f9921ba..bd727455a7e4 100644
--- a/arch/arm/boot/dts/st/stm32mp157c-ed1.dts
+++ b/arch/arm/boot/dts/st/stm32mp157c-ed1.dts
@@ -24,6 +24,15 @@ chosen {
 		stdout-path = "serial0:115200n8";
 	};
 
+	led {
+		compatible = "gpio-leds";
+		led-blue {
+			gpios = <&gpiod 9 GPIO_ACTIVE_HIGH>;
+			linux,default-trigger = "heartbeat";
+			default-state = "off";
+		};
+	};
+
 	memory@c0000000 {
 		device_type = "memory";
 		reg = <0xC0000000 0x40000000>;
-- 
2.25.1


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* Re: [PATCH v2 1/1] ASoC: fsl: imx-es8328: Switch to using gpiod API
From: Andy Shevchenko @ 2024-03-25 17:06 UTC (permalink / raw)
  To: alsa-devel, linuxppc-dev, linux-sound, imx, linux-arm-kernel,
	linux-kernel
  Cc: Shengjiu Wang, Xiubo Li, Fabio Estevam, Nicolin Chen,
	Liam Girdwood, Mark Brown, Jaroslav Kysela, Takashi Iwai,
	Shawn Guo, Sascha Hauer, Pengutronix Kernel Team
In-Reply-To: <20240318200804.181516-1-andriy.shevchenko@linux.intel.com>

On Mon, Mar 18, 2024 at 10:07:56PM +0200, Andy Shevchenko wrote:
> This updates the driver to gpiod API, and removes yet another use of
> of_get_named_gpio().

This also needs a leftover removal. :-(

-- 
With Best Regards,
Andy Shevchenko



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* Re: [PATCH v2] drivers: watchdog: ast2600 support bootstatus
From: Guenter Roeck @ 2024-03-25 17:06 UTC (permalink / raw)
  To: PeterYin, patrick, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
	Joel Stanley, Andrew Jeffery, Wim Van Sebroeck, devicetree,
	linux-arm-kernel, linux-aspeed, linux-kernel, linux-watchdog
In-Reply-To: <924c4402-af14-4b7a-9a4e-4317c50482cd@gmail.com>

On 3/20/24 02:05, PeterYin wrote:
> 
> 
> Guenter Roeck 於 3/19/24 08:46 寫道:
>> On 3/17/24 22:52, Peter Yin wrote:
>>> Add WDIOF_EXTERN1 and WDIOF_CARDRESET bootstatus in ast2600
>>>
>>> Regarding the AST2600 specification, the WDTn Timeout Status Register
>>> (WDT10) has bit 1 reserved. To verify the second boot source,
>>> we need to check SEC14 bit 12 and bit 13.
>>> The bits 8-23 in the WDTn Timeout Status Register are the Watchdog
>>> Event Count, which we can use to verify WDIOF_EXTERN1.
>>>
>>> Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com>
>>
>> You'll have to separate dts and yaml file changes from driver changes.
>>
>>> ---
>>> Change log:
>>>
>>> v1 -> v2
>>>    - Add comment and support WDIOF_CARDRESET in ast2600
>>>
>>> v1
>>>    - Patch 0001 - Add WDIOF_EXTERN1 bootstatus
>>> ---
>>>   arch/arm/boot/dts/aspeed/aspeed-g6.dtsi |  8 ++---
>>>   drivers/watchdog/aspeed_wdt.c           | 45 ++++++++++++++++++++++---
>>>   2 files changed, 44 insertions(+), 9 deletions(-)
>>>
>>> diff --git a/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi
>>> index e0b44498269f..23ae7f0430e9 100644
>>> --- a/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi
>>> +++ b/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi
>>> @@ -556,24 +556,24 @@ uart5: serial@1e784000 {
>>>               wdt1: watchdog@1e785000 {
>>>                   compatible = "aspeed,ast2600-wdt";
>>> -                reg = <0x1e785000 0x40>;
>>> +                reg = <0x1e785000 0x40>, <0x1e6f2000 0x20>;
>>>               };
>>>               wdt2: watchdog@1e785040 {
>>>                   compatible = "aspeed,ast2600-wdt";
>>> -                reg = <0x1e785040 0x40>;
>>> +                reg = <0x1e785040 0x40>, <0x1e6f2000 0x020>;
>>>                   status = "disabled";
>>>               };
>>>               wdt3: watchdog@1e785080 {
>>>                   compatible = "aspeed,ast2600-wdt";
>>> -                reg = <0x1e785080 0x40>;
>>> +                reg = <0x1e785080 0x40>, <0x1e6f2000 0x020>;
>>>                   status = "disabled";
>>>               };
>>>               wdt4: watchdog@1e7850c0 {
>>>                   compatible = "aspeed,ast2600-wdt";
>>> -                reg = <0x1e7850C0 0x40>;
>>> +                reg = <0x1e7850C0 0x40>, <0x1e6f2000 0x020>;
>>>                   status = "disabled";
>>>               };
>>> diff --git a/drivers/watchdog/aspeed_wdt.c b/drivers/watchdog/aspeed_wdt.c
>>> index b4773a6aaf8c..65118e461130 100644
>>> --- a/drivers/watchdog/aspeed_wdt.c
>>> +++ b/drivers/watchdog/aspeed_wdt.c
>>> @@ -33,6 +33,7 @@ struct aspeed_wdt {
>>>       void __iomem        *base;
>>>       u32            ctrl;
>>>       const struct aspeed_wdt_config *cfg;
>>> +    void __iomem        *sec_base;
>>>   };
>>>   static const struct aspeed_wdt_config ast2400_config = {
>>> @@ -82,6 +83,15 @@ MODULE_DEVICE_TABLE(of, aspeed_wdt_of_table);
>>>   #define WDT_RESET_MASK1        0x1c
>>>   #define WDT_RESET_MASK2        0x20
>>> +/*
>>> + * Only Ast2600 support
>>> + */
>>> +#define   WDT_EVENT_COUNTER_MASK    (0xFFF << 8)
>>> +#define   WDT_SECURE_ENGINE_STATUS    (0x14)
>>> +#define   ABR_IMAGE_SOURCE        BIT(12)
>>> +#define   ABR_IMAGE_SOURCE_SPI        BIT(13)
>>> +#define   SECOND_BOOT_ENABLE        BIT(14)
>>> +
>>>   /*
>>>    * WDT_RESET_WIDTH controls the characteristics of the external pulse (if
>>>    * enabled), specifically:
>>> @@ -313,6 +323,7 @@ static int aspeed_wdt_probe(struct platform_device *pdev)
>>>       const char *reset_type;
>>>       u32 duration;
>>>       u32 status;
>>> +    u32 sec_st;
>>>       int ret;
>>>       wdt = devm_kzalloc(dev, sizeof(*wdt), GFP_KERNEL);
>>> @@ -330,6 +341,12 @@ static int aspeed_wdt_probe(struct platform_device *pdev)
>>>       if (IS_ERR(wdt->base))
>>>           return PTR_ERR(wdt->base);
>>> +    if (of_device_is_compatible(np, "aspeed,ast2600-wdt")) {
>>> +        wdt->sec_base = devm_platform_ioremap_resource(pdev, 1);
>>> +        if (IS_ERR(wdt->sec_base))
>>> +            return PTR_ERR(wdt->sec_base);
>>> +    }
>>> +
>>>       wdt->wdd.info = &aspeed_wdt_info;
>>>       if (wdt->cfg->irq_mask) {
>>> @@ -459,12 +476,30 @@ static int aspeed_wdt_probe(struct platform_device *pdev)
>>>       }
>>>       status = readl(wdt->base + WDT_TIMEOUT_STATUS);
>>> -    if (status & WDT_TIMEOUT_STATUS_BOOT_SECONDARY) {
>>> -        wdt->wdd.bootstatus = WDIOF_CARDRESET;
>>> -        if (of_device_is_compatible(np, "aspeed,ast2400-wdt") ||
>>> -            of_device_is_compatible(np, "aspeed,ast2500-wdt"))
>>> -            wdt->wdd.groups = bswitch_groups;
>>> +    if (of_device_is_compatible(np, "aspeed,ast2600-wdt")) {
>>> +        /*
>>> +         * The WDTn Timeout Status Register bit 1 is reserved.
>>> +         * To verify the second boot source,
>>> +         * we need to check SEC14 bit 12 and bit 13.
>>> +         */
>>> +        sec_st = readl(wdt->sec_base + WDT_SECURE_ENGINE_STATUS);
>>> +        if( sec_st & SECOND_BOOT_ENABLE)
>>> +            if (sec_st & ABR_IMAGE_SOURCE ||
>>> +                sec_st & ABR_IMAGE_SOURCE_SPI)
>>
>> I am sure that checkpatch as something to say here. Either case, I would very
>> much prefer a single if() statement such as
>>
>>          if (sec_st & SECOND_BOOT_ENABLE &&
>>              sec_st & (ABR_IMAGE_SOURCE | ABR_IMAGE_SOURCE_SPI))
>>
>>> +                wdt->wdd.bootstatus |= WDIOF_CARDRESET;
>>> +
>>> +        /*
>>> +         * To check Watchdog Event Count for WDIOF_EXTERN1
>>> +         */
>>> +        if (status & WDT_EVENT_COUNTER_MASK) {
>>> +            wdt->wdd.bootstatus |= WDIOF_EXTERN1;
>>> +        }
>>
>> Unnecessary { }
>>
>> ... but does this really indicate that there was a reset due to some event ?
>> This reads three 8-bit counters. Wouldn't it make more sense to check bit 0
>> instead ?
>>
>> I am also not sure if reading the watchdog status from WDT_SECURE_ENGINE_STATUS
>> adds any value over the status reported in the watchdog status register.
>> You'll have to explain why the added complexity is necessary or even adds
>> value.
>>
>> Never mind, though ...
>>
>> Looking into the datasheets, the current code is quite completely wrong anyway.
>> Bit 1 of the status register indicates on ast2500 if the boot was from the second
>> boot source. It does not indicate that the most recent reset was triggered by
>> the watchdog. The code should just be changed to set WDIOF_CARDRESET if bit 0
>> of the status register is set. The boot source is out of scope for the watchdog
>> status bits.
>>
>> Thanks,
>> Guenter
>>
> Ast2600 has external reset flag on scu74 bit 1
> Can I modify the code like this?
> 
> To set WDIOF_EXTERN1 if EXTERN_RESET_FLAG is set,
> To set WDIOF_CARDRESET if WDT_TIMEOUT_STATUS_EVENT(bit0) is set
> 
> 
> #define   WDT_TIMEOUT_STATUS_EVENT    BIT(0)
> #define   EXTERN_RESET_FLAG        BIT(1)
> #define   ASPEED_SYSTEM_RESET_EVENT    (0x74)
> 
>      status = readl(wdt->base + WDT_TIMEOUT_STATUS);
>      if (status & WDT_TIMEOUT_STATUS_EVENT)
>          wdt->wdd.bootstatus = WDIOF_CARDRESET;
> 
>      if (of_device_is_compatible(np, "aspeed,ast2600-wdt")) {
>          status = readl(wdt->scu_base + ASPEED_SYSTEM_RESET_EVENT);

ASPEED_SYSTEM_RESET_EVENT is at offset 0x74, but the devicetree nodes
for "aspeed,ast2600-wdt" only request 0x20 bytes for scu. I don't really
understand, though, how this is supposed to work in the first place, since
the entire SCU address range is also requested by "aspeed,ast2600-sbc".
Granted, I don't see actual code in the upstream kernel listing itself
as compatible with "aspeed,ast2600-sbc" (it looks like attempts to upstream
that code were unsuccessful), but it seems wrong to use that memory space
for the watchdog driver.

Also, ast2500 has the "external reset" flag in SCU register 1e6e2000:0x3c.
That should be addressed at the same time, if at all.

Thanks,
Guenter


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^ permalink raw reply

* Re: Potential bug of arm64 SMCCC call
From: Mark Rutland @ 2024-03-25 17:00 UTC (permalink / raw)
  To: 崇文 李; +Cc: linux-arm-kernel@lists.infradead.org
In-Reply-To: <DS7PR19MB4407C29AC8FF38BA192DCDFFE6362@DS7PR19MB4407.namprd19.prod.outlook.com>

On Mon, Mar 25, 2024 at 01:36:37PM +0000, 崇文 李 wrote:
> Hello. I saw a potential bug when I was checking arm64 SMCCC call.
 
Hi,

> In arm-smccc.h [see link 0], from line 481 to line 497 resides the
> definition of "__arm_smccc_1_1", which is in turn used to implement
> the RMI interface in rmi_cmds.h [see link 1].
> 
> In the definition of "__arm_smccc_1_1", there is no clobbering of
> registers x4 -- x17.  However, according to Arm SMC Calling Convention
> [see link 2, page 10 of 19], registers x4 -- x17 are scratch registers. 
> Upon returning from an arm64 smc instruction, x4 -- x17 registers may 
> be overwritten with mysterious values from the firmware.

I think you're looking at a very old version of the SMCCC specification. The
__arm_smccc_1_1 helper is only intended to be used for SMCCCv1.1+, which is
newer than the specification that you link to below.

Please see a more recent version, e.g. ARM DEN 0028F: 

  https://developer.arm.com/documentation/den0028/f/?lang=en

If you look in "13 Appendix F: Changelog", you'll see the key change in
SMCCCv1.1:

| Result register set:
| Mandates preservation of registers X4—X17 across a SMC or HVC call.

... and this is described earlier in the document.

> So it is safer to mark x4--x17 registers as clobbered registers in the
> "asm" statement inside the definition of "__arm_smccc_1_1", so the
> compiler avoids using x4--x17 registers around arm64 smc instructions.

As above, this should not be necessary. These SMCCC invocation functions should
only be used with SMCCCv1.1+ compliant firmware, and in those cases x4-x17 are
preserved.

Note that specific SMCCC calls imply that the SMCCC version is 1.1 or later.

Thanks,
Mark

> 
> Best regards.
> 
> 
> 
> Links
> ============
> 
> [0] arm-smccc.h in arm's linux kernel repository
>    https://gitlab.arm.com/linux-arm/linux-cca/-/blob/cca-host/rmm-v1.0-eac5/include/linux/arm-smccc.h?ref_type=heads
> 
> [1] rmi_cmds.h in arm's linux kernel repository
>    https://gitlab.arm.com/linux-arm/linux-cca/-/blob/cca-host/rmm-v1.0-eac5/arch/arm64/include/asm/rmi_cmds.h?ref_type=heads
> 
> [2] Arm SMC Calling Convention
>    https://documentation-service.arm.com/static/5f8ea482f86e16515cdbe3c6?token=
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

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^ permalink raw reply

* [PATCH] soc: ti: wkup_m3_ipc: Send NULL dummy message instead of pointer message
From: Andrew Davis @ 2024-03-25 16:55 UTC (permalink / raw)
  To: Nishanth Menon, Vignesh Raghavendra, Santosh Shilimkar
  Cc: linux-arm-kernel, linux-kernel, Andrew Davis

mbox_send_message() sends a u32 bit message, not a pointer to a message.
We only convert to a pointer type as a generic type. If we want to send
a dummy message of 0, then simply send 0 (NULL).

Signed-off-by: Andrew Davis <afd@ti.com>
---
 drivers/soc/ti/wkup_m3_ipc.c | 7 ++-----
 1 file changed, 2 insertions(+), 5 deletions(-)

diff --git a/drivers/soc/ti/wkup_m3_ipc.c b/drivers/soc/ti/wkup_m3_ipc.c
index 6a1c6b34c414a..88f774db92084 100644
--- a/drivers/soc/ti/wkup_m3_ipc.c
+++ b/drivers/soc/ti/wkup_m3_ipc.c
@@ -16,7 +16,6 @@
 #include <linux/irq.h>
 #include <linux/module.h>
 #include <linux/of.h>
-#include <linux/omap-mailbox.h>
 #include <linux/platform_device.h>
 #include <linux/remoteproc.h>
 #include <linux/suspend.h>
@@ -314,7 +313,6 @@ static irqreturn_t wkup_m3_txev_handler(int irq, void *ipc_data)
 static int wkup_m3_ping(struct wkup_m3_ipc *m3_ipc)
 {
 	struct device *dev = m3_ipc->dev;
-	mbox_msg_t dummy_msg = 0;
 	int ret;
 
 	if (!m3_ipc->mbox) {
@@ -330,7 +328,7 @@ static int wkup_m3_ping(struct wkup_m3_ipc *m3_ipc)
 	 * the RX callback to avoid multiple interrupts being received
 	 * by the CM3.
 	 */
-	ret = mbox_send_message(m3_ipc->mbox, &dummy_msg);
+	ret = mbox_send_message(m3_ipc->mbox, NULL);
 	if (ret < 0) {
 		dev_err(dev, "%s: mbox_send_message() failed: %d\n",
 			__func__, ret);
@@ -352,7 +350,6 @@ static int wkup_m3_ping(struct wkup_m3_ipc *m3_ipc)
 static int wkup_m3_ping_noirq(struct wkup_m3_ipc *m3_ipc)
 {
 	struct device *dev = m3_ipc->dev;
-	mbox_msg_t dummy_msg = 0;
 	int ret;
 
 	if (!m3_ipc->mbox) {
@@ -361,7 +358,7 @@ static int wkup_m3_ping_noirq(struct wkup_m3_ipc *m3_ipc)
 		return -EIO;
 	}
 
-	ret = mbox_send_message(m3_ipc->mbox, &dummy_msg);
+	ret = mbox_send_message(m3_ipc->mbox, NULL);
 	if (ret < 0) {
 		dev_err(dev, "%s: mbox_send_message() failed: %d\n",
 			__func__, ret);
-- 
2.39.2


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* Re: [PATCH v4 4/4] remoteproc: stm32: Add support of an OP-TEE TA to load the firmware
From: Mathieu Poirier @ 2024-03-25 16:51 UTC (permalink / raw)
  To: Arnaud Pouliquen
  Cc: Bjorn Andersson, Jens Wiklander, Rob Herring, Krzysztof Kozlowski,
	Conor Dooley, linux-stm32, linux-arm-kernel, linux-remoteproc,
	linux-kernel, op-tee, devicetree
In-Reply-To: <20240308144708.62362-5-arnaud.pouliquen@foss.st.com>

On Fri, Mar 08, 2024 at 03:47:08PM +0100, Arnaud Pouliquen wrote:
> The new TEE remoteproc device is used to manage remote firmware in a
> secure, trusted context. The 'st,stm32mp1-m4-tee' compatibility is
> introduced to delegate the loading of the firmware to the trusted
> execution context. In such cases, the firmware should be signed and
> adhere to the image format defined by the TEE.
> 
> Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>
> ---
> Updates from V3:
> - remove support of the attach use case. Will be addressed in a separate
>   thread,
> - add st_rproc_tee_ops::parse_fw ops,
> - inverse call of devm_rproc_alloc()and tee_rproc_register() to manage cross
>   reference between the rproc struct and the tee_rproc struct in tee_rproc.c.
> ---
>  drivers/remoteproc/stm32_rproc.c | 60 +++++++++++++++++++++++++++++---
>  1 file changed, 56 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/remoteproc/stm32_rproc.c b/drivers/remoteproc/stm32_rproc.c
> index 8cd838df4e92..13df33c78aa2 100644
> --- a/drivers/remoteproc/stm32_rproc.c
> +++ b/drivers/remoteproc/stm32_rproc.c
> @@ -20,6 +20,7 @@
>  #include <linux/remoteproc.h>
>  #include <linux/reset.h>
>  #include <linux/slab.h>
> +#include <linux/tee_remoteproc.h>
>  #include <linux/workqueue.h>
>  
>  #include "remoteproc_internal.h"
> @@ -49,6 +50,9 @@
>  #define M4_STATE_STANDBY	4
>  #define M4_STATE_CRASH		5
>  
> +/* Remote processor unique identifier aligned with the Trusted Execution Environment definitions */

Why is this the case?  At least from the kernel side it is possible to call
tee_rproc_register() with any kind of value, why is there a need to be any
kind of alignment with the TEE?

> +#define STM32_MP1_M4_PROC_ID    0
> +
>  struct stm32_syscon {
>  	struct regmap *map;
>  	u32 reg;
> @@ -257,6 +261,19 @@ static int stm32_rproc_release(struct rproc *rproc)
>  	return 0;
>  }
>  
> +static int stm32_rproc_tee_stop(struct rproc *rproc)
> +{
> +	int err;
> +
> +	stm32_rproc_request_shutdown(rproc);
> +
> +	err = tee_rproc_stop(rproc);
> +	if (err)
> +		return err;
> +
> +	return stm32_rproc_release(rproc);
> +}
> +
>  static int stm32_rproc_prepare(struct rproc *rproc)
>  {
>  	struct device *dev = rproc->dev.parent;
> @@ -693,8 +710,19 @@ static const struct rproc_ops st_rproc_ops = {
>  	.get_boot_addr	= rproc_elf_get_boot_addr,
>  };
>  
> +static const struct rproc_ops st_rproc_tee_ops = {
> +	.prepare	= stm32_rproc_prepare,
> +	.start		= tee_rproc_start,
> +	.stop		= stm32_rproc_tee_stop,
> +	.kick		= stm32_rproc_kick,
> +	.load		= tee_rproc_load_fw,
> +	.parse_fw	= tee_rproc_parse_fw,
> +	.find_loaded_rsc_table = tee_rproc_find_loaded_rsc_table,
> +};
> +
>  static const struct of_device_id stm32_rproc_match[] = {
> -	{ .compatible = "st,stm32mp1-m4" },
> +	{.compatible = "st,stm32mp1-m4",},
> +	{.compatible = "st,stm32mp1-m4-tee",},
>  	{},
>  };
>  MODULE_DEVICE_TABLE(of, stm32_rproc_match);
> @@ -853,6 +881,7 @@ static int stm32_rproc_probe(struct platform_device *pdev)
>  	struct device *dev = &pdev->dev;
>  	struct stm32_rproc *ddata;
>  	struct device_node *np = dev->of_node;
> +	struct tee_rproc *trproc = NULL;
>  	struct rproc *rproc;
>  	unsigned int state;
>  	int ret;
> @@ -861,9 +890,26 @@ static int stm32_rproc_probe(struct platform_device *pdev)
>  	if (ret)
>  		return ret;
>  
> -	rproc = devm_rproc_alloc(dev, np->name, &st_rproc_ops, NULL, sizeof(*ddata));
> -	if (!rproc)
> -		return -ENOMEM;
> +	if (of_device_is_compatible(np, "st,stm32mp1-m4-tee")) {
> +		/*
> +		 * Delegate the firmware management to the secure context.
> +		 * The firmware loaded has to be signed.
> +		 */
> +		rproc = devm_rproc_alloc(dev, np->name, &st_rproc_tee_ops, NULL, sizeof(*ddata));
> +		if (!rproc)
> +			return -ENOMEM;
> +
> +		trproc = tee_rproc_register(dev, rproc, STM32_MP1_M4_PROC_ID);
> +		if (IS_ERR(trproc)) {
> +			dev_err_probe(dev, PTR_ERR(trproc),
> +				      "signed firmware not supported by TEE\n");
> +			return PTR_ERR(trproc);
> +		}
> +	} else {
> +		rproc = devm_rproc_alloc(dev, np->name, &st_rproc_ops, NULL, sizeof(*ddata));
> +		if (!rproc)
> +			return -ENOMEM;
> +	}
>  
>  	ddata = rproc->priv;
>  
> @@ -915,6 +961,9 @@ static int stm32_rproc_probe(struct platform_device *pdev)
>  		dev_pm_clear_wake_irq(dev);
>  		device_init_wakeup(dev, false);
>  	}
> +	if (trproc)

        if (rproc->tee_interface)


I am done reviewing this set.

Thanks,
Mathieu

> +		tee_rproc_unregister(trproc);
> +
>  	return ret;
>  }
>  
> @@ -935,6 +984,9 @@ static void stm32_rproc_remove(struct platform_device *pdev)
>  		dev_pm_clear_wake_irq(dev);
>  		device_init_wakeup(dev, false);
>  	}
> +	if (rproc->tee_interface)
> +		tee_rproc_unregister(rproc->tee_interface);
> +
>  }
>  
>  static int stm32_rproc_suspend(struct device *dev)
> -- 
> 2.25.1
> 

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^ permalink raw reply

* Re: [PATCH v4 3/4] remoteproc: stm32: Create sub-functions to request shutdown and release
From: Mathieu Poirier @ 2024-03-25 16:48 UTC (permalink / raw)
  To: Arnaud Pouliquen
  Cc: Bjorn Andersson, Jens Wiklander, Rob Herring, Krzysztof Kozlowski,
	Conor Dooley, linux-stm32, linux-arm-kernel, linux-remoteproc,
	linux-kernel, op-tee, devicetree
In-Reply-To: <20240308144708.62362-4-arnaud.pouliquen@foss.st.com>

On Fri, Mar 08, 2024 at 03:47:07PM +0100, Arnaud Pouliquen wrote:
> To prepare for the support of TEE remoteproc, create sub-functions
> that can be used in both cases, with and without TEE support.
> 
> Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>
> ---
>  drivers/remoteproc/stm32_rproc.c | 84 +++++++++++++++++++-------------
>  1 file changed, 51 insertions(+), 33 deletions(-)
> 
> diff --git a/drivers/remoteproc/stm32_rproc.c b/drivers/remoteproc/stm32_rproc.c
> index 88623df7d0c3..8cd838df4e92 100644
> --- a/drivers/remoteproc/stm32_rproc.c
> +++ b/drivers/remoteproc/stm32_rproc.c
> @@ -209,6 +209,54 @@ static int stm32_rproc_mbox_idx(struct rproc *rproc, const unsigned char *name)
>  	return -EINVAL;
>  }
>  
> +static void stm32_rproc_request_shutdown(struct rproc *rproc)
> +{
> +	struct stm32_rproc *ddata = rproc->priv;
> +	int err, dummy_data, idx;
> +
> +	/* Request shutdown of the remote processor */
> +	if (rproc->state != RPROC_OFFLINE && rproc->state != RPROC_CRASHED) {
> +		idx = stm32_rproc_mbox_idx(rproc, STM32_MBX_SHUTDOWN);
> +		if (idx >= 0 && ddata->mb[idx].chan) {
> +			/* A dummy data is sent to allow to block on transmit. */
> +			err = mbox_send_message(ddata->mb[idx].chan,
> +						&dummy_data);

Why is this changed from the original implementation?

> +			if (err < 0)
> +				dev_warn(&rproc->dev, "warning: remote FW shutdown without ack\n");
> +		}
> +	}
> +}
> +
> +static int stm32_rproc_release(struct rproc *rproc)
> +{
> +	struct stm32_rproc *ddata = rproc->priv;
> +	unsigned int err = 0;
> +
> +	/* To allow platform Standby power mode, set remote proc Deep Sleep. */
> +	if (ddata->pdds.map) {
> +		err = regmap_update_bits(ddata->pdds.map, ddata->pdds.reg,
> +					 ddata->pdds.mask, 1);
> +		if (err) {
> +			dev_err(&rproc->dev, "failed to set pdds\n");
> +			return err;
> +		}
> +	}
> +
> +	/* Update coprocessor state to OFF if available. */
> +	if (ddata->m4_state.map) {
> +		err = regmap_update_bits(ddata->m4_state.map,
> +					 ddata->m4_state.reg,
> +					 ddata->m4_state.mask,
> +					 M4_STATE_OFF);
> +		if (err) {
> +			dev_err(&rproc->dev, "failed to set copro state\n");
> +			return err;
> +		}
> +	}
> +
> +	return 0;
> +}
> +
>  static int stm32_rproc_prepare(struct rproc *rproc)
>  {
>  	struct device *dev = rproc->dev.parent;
> @@ -519,17 +567,9 @@ static int stm32_rproc_detach(struct rproc *rproc)
>  static int stm32_rproc_stop(struct rproc *rproc)
>  {
>  	struct stm32_rproc *ddata = rproc->priv;
> -	int err, idx;
> +	int err;
>  
> -	/* request shutdown of the remote processor */
> -	if (rproc->state != RPROC_OFFLINE && rproc->state != RPROC_CRASHED) {
> -		idx = stm32_rproc_mbox_idx(rproc, STM32_MBX_SHUTDOWN);
> -		if (idx >= 0 && ddata->mb[idx].chan) {
> -			err = mbox_send_message(ddata->mb[idx].chan, "detach");
> -			if (err < 0)
> -				dev_warn(&rproc->dev, "warning: remote FW shutdown without ack\n");
> -		}
> -	}
> +	stm32_rproc_request_shutdown(rproc);
>  
>  	err = stm32_rproc_set_hold_boot(rproc, true);
>  	if (err)
> @@ -541,29 +581,7 @@ static int stm32_rproc_stop(struct rproc *rproc)
>  		return err;
>  	}
>  
> -	/* to allow platform Standby power mode, set remote proc Deep Sleep */
> -	if (ddata->pdds.map) {
> -		err = regmap_update_bits(ddata->pdds.map, ddata->pdds.reg,
> -					 ddata->pdds.mask, 1);
> -		if (err) {
> -			dev_err(&rproc->dev, "failed to set pdds\n");
> -			return err;
> -		}
> -	}
> -
> -	/* update coprocessor state to OFF if available */
> -	if (ddata->m4_state.map) {
> -		err = regmap_update_bits(ddata->m4_state.map,
> -					 ddata->m4_state.reg,
> -					 ddata->m4_state.mask,
> -					 M4_STATE_OFF);
> -		if (err) {
> -			dev_err(&rproc->dev, "failed to set copro state\n");
> -			return err;
> -		}
> -	}
> -
> -	return 0;
> +	return stm32_rproc_release(rproc);
>  }
>  
>  static void stm32_rproc_kick(struct rproc *rproc, int vqid)
> -- 
> 2.25.1
> 

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^ permalink raw reply

* Re: [PATCH v5 00/27] Update SMMUv3 to the modern iommu API (part 2/3)
From: Jason Gunthorpe @ 2024-03-25 16:47 UTC (permalink / raw)
  To: Mostafa Saleh
  Cc: Shameerali Kolothum Thodi, iommu@lists.linux.dev, Joerg Roedel,
	linux-arm-kernel@lists.infradead.org, Robin Murphy, Will Deacon,
	Eric Auger, Jean-Philippe Brucker, Moritz Fischer, Michael Shavit,
	Nicolin Chen, patches@lists.linux.dev
In-Reply-To: <CAFgf54qSbNMQ1XTnV-YSZV=gqwN+JJy0S5ziv=fUfinOXGZ9jw@mail.gmail.com>

On Mon, Mar 25, 2024 at 11:22:19AM +0000, Mostafa Saleh wrote:
> > I think that is probably because you are testing with "nested-smmuv3". This
> > series not yet fully enable that. For that, I think you are missing few patches
> > from Nicolin's iommufd branch,
> > https://github.com/nicolinc/iommufd/commits/wip/iommufd_nesting-03112024/
> 
> I see, thanks for clarifying. I think we shouldn't still crash the
> kernel, but that's a problem for part 3.

Yeah, definately. Part 3 needs to include the invalidation bits too, I
haven't integrated them from Nicolin.

I'll send a patch like this for iommufd to stop the oops:

@@ -236,7 +236,8 @@ iommufd_hwpt_nested_alloc(struct iommufd_ctx *ictx,
        }
        hwpt->domain->owner = ops;
 
-       if (WARN_ON_ONCE(hwpt->domain->type != IOMMU_DOMAIN_NESTED)) {
+       if (WARN_ON_ONCE(hwpt->domain->type != IOMMU_DOMAIN_NESTED ||
+                        !hwpt->domain->ops->cache_invalidate_user)) {
                rc = -EINVAL;
                goto out_abort;
        }

Jason

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^ permalink raw reply

* Re: [PATCH v4 1/4] remoteproc: Add TEE support
From: Mathieu Poirier @ 2024-03-25 16:46 UTC (permalink / raw)
  To: Arnaud Pouliquen
  Cc: Bjorn Andersson, Jens Wiklander, Rob Herring, Krzysztof Kozlowski,
	Conor Dooley, linux-stm32, linux-arm-kernel, linux-remoteproc,
	linux-kernel, op-tee, devicetree
In-Reply-To: <20240308144708.62362-2-arnaud.pouliquen@foss.st.com>

On Fri, Mar 08, 2024 at 03:47:05PM +0100, Arnaud Pouliquen wrote:
> Add a remoteproc TEE (Trusted Execution Environment) driver
> that will be probed by the TEE bus. If the associated Trusted
> application is supported on secure part this device offers a client

Device or driver?  I thought I touched on that before.

> interface to load a firmware in the secure part.
> This firmware could be authenticated by the secure trusted application.
> 
> Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>
> ---
> Updates from V3:
> - rework TEE_REMOTEPROC description in Kconfig
> - fix some namings
> - add tee_rproc_parse_fw  to support rproc_ops::parse_fw
> - add proc::tee_interface;
> - add rproc struct as parameter of the tee_rproc_register() function
> ---
>  drivers/remoteproc/Kconfig          |  10 +
>  drivers/remoteproc/Makefile         |   1 +
>  drivers/remoteproc/tee_remoteproc.c | 434 ++++++++++++++++++++++++++++
>  include/linux/remoteproc.h          |   4 +
>  include/linux/tee_remoteproc.h      | 112 +++++++
>  5 files changed, 561 insertions(+)
>  create mode 100644 drivers/remoteproc/tee_remoteproc.c
>  create mode 100644 include/linux/tee_remoteproc.h
> 
> diff --git a/drivers/remoteproc/Kconfig b/drivers/remoteproc/Kconfig
> index 48845dc8fa85..2cf1431b2b59 100644
> --- a/drivers/remoteproc/Kconfig
> +++ b/drivers/remoteproc/Kconfig
> @@ -365,6 +365,16 @@ config XLNX_R5_REMOTEPROC
>  
>  	  It's safe to say N if not interested in using RPU r5f cores.
>  
> +
> +config TEE_REMOTEPROC
> +	tristate "remoteproc support by a TEE application"

s/remoteproc/Remoteproc

> +	depends on OPTEE
> +	help
> +	  Support a remote processor with a TEE application. The Trusted
> +	  Execution Context is responsible for loading the trusted firmware
> +	  image and managing the remote processor's lifecycle.
> +	  This can be either built-in or a loadable module.
> +
>  endif # REMOTEPROC
>  
>  endmenu
> diff --git a/drivers/remoteproc/Makefile b/drivers/remoteproc/Makefile
> index 91314a9b43ce..fa8daebce277 100644
> --- a/drivers/remoteproc/Makefile
> +++ b/drivers/remoteproc/Makefile
> @@ -36,6 +36,7 @@ obj-$(CONFIG_RCAR_REMOTEPROC)		+= rcar_rproc.o
>  obj-$(CONFIG_ST_REMOTEPROC)		+= st_remoteproc.o
>  obj-$(CONFIG_ST_SLIM_REMOTEPROC)	+= st_slim_rproc.o
>  obj-$(CONFIG_STM32_RPROC)		+= stm32_rproc.o
> +obj-$(CONFIG_TEE_REMOTEPROC)		+= tee_remoteproc.o
>  obj-$(CONFIG_TI_K3_DSP_REMOTEPROC)	+= ti_k3_dsp_remoteproc.o
>  obj-$(CONFIG_TI_K3_R5_REMOTEPROC)	+= ti_k3_r5_remoteproc.o
>  obj-$(CONFIG_XLNX_R5_REMOTEPROC)	+= xlnx_r5_remoteproc.o
> diff --git a/drivers/remoteproc/tee_remoteproc.c b/drivers/remoteproc/tee_remoteproc.c
> new file mode 100644
> index 000000000000..c855210e52e3
> --- /dev/null
> +++ b/drivers/remoteproc/tee_remoteproc.c
> @@ -0,0 +1,434 @@
> +// SPDX-License-Identifier: GPL-2.0-or-later
> +/*
> + * Copyright (C) STMicroelectronics 2024 - All Rights Reserved
> + * Author: Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>
> + */
> +
> +#include <linux/firmware.h>
> +#include <linux/io.h>
> +#include <linux/module.h>
> +#include <linux/remoteproc.h>
> +#include <linux/slab.h>
> +#include <linux/tee_drv.h>
> +#include <linux/tee_remoteproc.h>
> +
> +#include "remoteproc_internal.h"
> +
> +#define MAX_TEE_PARAM_ARRY_MEMBER	4
> +
> +/*
> + * Authentication of the firmware and load in the remote processor memory
> + *
> + * [in]  params[0].value.a:	unique 32bit identifier of the remote processor
> + * [in]	 params[1].memref:	buffer containing the image of the buffer
> + */
> +#define TA_RPROC_FW_CMD_LOAD_FW		1
> +
> +/*
> + * Start the remote processor
> + *
> + * [in]  params[0].value.a:	unique 32bit identifier of the remote processor
> + */
> +#define TA_RPROC_FW_CMD_START_FW	2
> +
> +/*
> + * Stop the remote processor
> + *
> + * [in]  params[0].value.a:	unique 32bit identifier of the remote processor
> + */
> +#define TA_RPROC_FW_CMD_STOP_FW		3
> +
> +/*
> + * Return the address of the resource table, or 0 if not found
> + * No check is done to verify that the address returned is accessible by
> + * the non secure context. If the resource table is loaded in a protected
> + * memory the access by the non secure context will lead to a data abort.
> + *
> + * [in]  params[0].value.a:	unique 32bit identifier of the remote processor
> + * [out]  params[1].value.a:	32bit LSB resource table memory address
> + * [out]  params[1].value.b:	32bit MSB resource table memory address
> + * [out]  params[2].value.a:	32bit LSB resource table memory size
> + * [out]  params[2].value.b:	32bit MSB resource table memory size
> + */
> +#define TA_RPROC_FW_CMD_GET_RSC_TABLE	4
> +
> +/*
> + * Return the address of the core dump
> + *
> + * [in]  params[0].value.a:	unique 32bit identifier of the remote processor
> + * [out] params[1].memref:	address of the core dump image if exist,
> + *				else return Null
> + */
> +#define TA_RPROC_FW_CMD_GET_COREDUMP	5
> +
> +struct tee_rproc_context {
> +	struct list_head sessions;
> +	struct tee_context *tee_ctx;
> +	struct device *dev;
> +};
> +
> +static struct tee_rproc_context *tee_rproc_ctx;
> +
> +static void tee_rproc_prepare_args(struct tee_rproc *trproc, int cmd,
> +				   struct tee_ioctl_invoke_arg *arg,
> +				   struct tee_param *param,
> +				   unsigned int num_params)
> +{
> +	memset(arg, 0, sizeof(*arg));
> +	memset(param, 0, MAX_TEE_PARAM_ARRY_MEMBER * sizeof(*param));
> +
> +	arg->func = cmd;
> +	arg->session = trproc->session_id;
> +	arg->num_params = num_params + 1;
> +
> +	param[0] = (struct tee_param) {
> +		.attr = TEE_IOCTL_PARAM_ATTR_TYPE_VALUE_INPUT,
> +		.u.value.a = trproc->rproc_id,
> +	};
> +}
> +
> +int tee_rproc_load_fw(struct rproc *rproc, const struct firmware *fw)
> +{
> +	struct tee_ioctl_invoke_arg arg;
> +	struct tee_param param[MAX_TEE_PARAM_ARRY_MEMBER];
> +	struct tee_rproc *trproc = rproc->tee_interface;
> +	struct tee_shm *fw_shm;
> +	int ret;

Declarations in reverse ascending order here and everywhere in the driver.
Sometimes it is done properly, sometimes it isn't. 

> +
> +	if (!trproc)
> +		return -EINVAL;
> +
> +	fw_shm = tee_shm_register_kernel_buf(tee_rproc_ctx->tee_ctx, (void *)fw->data, fw->size);
> +	if (IS_ERR(fw_shm))
> +		return PTR_ERR(fw_shm);
> +
> +	tee_rproc_prepare_args(trproc, TA_RPROC_FW_CMD_LOAD_FW, &arg, param, 1);
> +
> +	/* Provide the address of the firmware image */
> +	param[1] = (struct tee_param) {
> +		.attr = TEE_IOCTL_PARAM_ATTR_TYPE_MEMREF_INPUT,
> +		.u.memref = {
> +			.shm = fw_shm,
> +			.size = fw->size,
> +			.shm_offs = 0,
> +		},
> +	};
> +
> +	ret = tee_client_invoke_func(tee_rproc_ctx->tee_ctx, &arg, param);
> +	if (ret < 0 || arg.ret != 0) {
> +		dev_err(tee_rproc_ctx->dev,
> +			"TA_RPROC_FW_CMD_LOAD_FW invoke failed TEE err: %x, ret:%x\n",
> +			arg.ret, ret);
> +		if (!ret)
> +			ret = -EIO;
> +	}
> +
> +	tee_shm_free(fw_shm);
> +
> +	return ret;
> +}
> +EXPORT_SYMBOL_GPL(tee_rproc_load_fw);
> +
> +struct resource_table *tee_rproc_get_loaded_rsc_table(struct rproc *rproc, size_t *table_sz)
> +{
> +	struct tee_ioctl_invoke_arg arg;
> +	struct tee_param param[MAX_TEE_PARAM_ARRY_MEMBER];
> +	struct tee_rproc *trproc = rproc->tee_interface;
> +	struct resource_table *rsc_table;
> +	int ret;
> +
> +	if (!trproc)
> +		return ERR_PTR(-EINVAL);
> +
> +	tee_rproc_prepare_args(trproc, TA_RPROC_FW_CMD_GET_RSC_TABLE, &arg, param, 2);
> +
> +	param[1].attr = TEE_IOCTL_PARAM_ATTR_TYPE_VALUE_OUTPUT;
> +	param[2].attr = TEE_IOCTL_PARAM_ATTR_TYPE_VALUE_OUTPUT;
> +
> +	ret = tee_client_invoke_func(tee_rproc_ctx->tee_ctx, &arg, param);
> +	if (ret < 0 || arg.ret != 0) {
> +		dev_err(tee_rproc_ctx->dev,
> +			"TA_RPROC_FW_CMD_GET_RSC_TABLE invoke failed TEE err: %x, ret:%x\n",
> +			arg.ret, ret);
> +		return ERR_PTR(-EIO);
> +	}
> +
> +	*table_sz = param[2].u.value.a;
> +
> +	/* If the size is null no resource table defined in the image */
> +	if (!*table_sz)
> +		return NULL;
> +
> +	/* Store the resource table address that would be updated by the remote core. */
> +	rsc_table = ioremap_wc(param[1].u.value.a, *table_sz);
> +	if (IS_ERR_OR_NULL(rsc_table)) {
> +		dev_err(tee_rproc_ctx->dev, "Unable to map memory region: %lld+%zx\n",
> +			param[1].u.value.a, *table_sz);
> +		return ERR_PTR(-ENOMEM);
> +	}
> +
> +	return rsc_table;
> +}
> +EXPORT_SYMBOL_GPL(tee_rproc_get_loaded_rsc_table);
> +
> +int tee_rproc_parse_fw(struct rproc *rproc, const struct firmware *fw)
> +{
> +	struct tee_rproc *trproc = rproc->tee_interface;
> +	struct resource_table *rsc_table;
> +	size_t table_sz;
> +	int ret;
> +
> +	ret = tee_rproc_load_fw(rproc, fw);
> +	if (ret)
> +		return ret;
> +
> +	rsc_table = tee_rproc_get_loaded_rsc_table(rproc, &table_sz);
> +	if (IS_ERR(rsc_table))
> +		return PTR_ERR(rsc_table);
> +
> +	/* Create a copy of the resource table to have same behaviour than the elf loader. */
> +	rproc->cached_table = kmemdup(rsc_table, table_sz, GFP_KERNEL);
> +	if (!rproc->cached_table)
> +		return -ENOMEM;

Why not ->table_ptr and setting ->cached_table to NULL?

> +
> +	rproc->table_ptr = rproc->cached_table;
> +	rproc->table_sz = table_sz;
> +	trproc->rsc_table = rsc_table;

I really don't see why this is needed, please remove and use rproc->table_ptr
instead.

> +
> +	return 0;
> +}
> +EXPORT_SYMBOL_GPL(tee_rproc_parse_fw);
> +
> +struct resource_table *tee_rproc_find_loaded_rsc_table(struct rproc *rproc,
> +						       const struct firmware *fw)
> +{
> +	struct tee_rproc *trproc = rproc->tee_interface;
> +	struct resource_table *rsc_table;
> +	size_t table_sz;
> +
> +	if (!trproc)
> +		return ERR_PTR(-EINVAL);
> +
> +	/* Check if the resourse table has already been obtained in tee_rproc_parse_fw() */
> +	if (trproc->rsc_table)
> +		return trproc->rsc_table;

Again, why not simply use rproc->rsc_table?  This function should only return
the resource table that was set in tee_rproc_parse_fw(). 

> +
> +	rsc_table = tee_rproc_get_loaded_rsc_table(rproc, &table_sz);
> +	if (IS_ERR(rsc_table))
> +		return rsc_table;
> +
> +	rproc->table_sz = table_sz;
> +	trproc->rsc_table = rsc_table;
> +
> +	return rsc_table;
> +}
> +EXPORT_SYMBOL_GPL(tee_rproc_find_loaded_rsc_table);
> +
> +int tee_rproc_start(struct rproc *rproc)
> +{
> +	struct tee_ioctl_invoke_arg arg;
> +	struct tee_param param[MAX_TEE_PARAM_ARRY_MEMBER];
> +	struct tee_rproc *trproc = rproc->tee_interface;
> +	int ret;
> +
> +	if (!trproc)
> +		return -EINVAL;
> +
> +	tee_rproc_prepare_args(trproc, TA_RPROC_FW_CMD_START_FW, &arg, param, 0);
> +
> +	ret = tee_client_invoke_func(tee_rproc_ctx->tee_ctx, &arg, param);
> +	if (ret < 0 || arg.ret != 0) {
> +		dev_err(tee_rproc_ctx->dev,
> +			"TA_RPROC_FW_CMD_START_FW invoke failed TEE err: %x, ret:%x\n",
> +			arg.ret, ret);
> +		if (!ret)
> +			ret = -EIO;
> +	}
> +
> +	return ret;
> +}
> +EXPORT_SYMBOL_GPL(tee_rproc_start);
> +
> +int tee_rproc_stop(struct rproc *rproc)
> +{
> +	struct tee_ioctl_invoke_arg arg;
> +	struct tee_param param[MAX_TEE_PARAM_ARRY_MEMBER];
> +	struct tee_rproc *trproc = rproc->tee_interface;
> +	int ret;
> +
> +	if (!trproc)
> +		return -EINVAL;
> +
> +	tee_rproc_prepare_args(trproc, TA_RPROC_FW_CMD_STOP_FW, &arg, param, 0);
> +
> +	ret = tee_client_invoke_func(tee_rproc_ctx->tee_ctx, &arg, param);
> +	if (ret < 0 || arg.ret != 0) {
> +		dev_err(tee_rproc_ctx->dev,
> +			"TA_RPROC_FW_CMD_STOP_FW invoke failed TEE err: %x, ret:%x\n",
> +			arg.ret, ret);
> +		if (!ret)
> +			ret = -EIO;
> +	}
> +
> +	if (!rproc->table_ptr)
> +		return ret;
> +
> +	iounmap(trproc->rsc_table);
> +	trproc->rsc_table = NULL;
> +	rproc->table_ptr = NULL;
> +
> +	return 0;
> +}
> +EXPORT_SYMBOL_GPL(tee_rproc_stop);
> +
> +static const struct tee_client_device_id stm32_tee_rproc_id_table[] = {
> +	{UUID_INIT(0x80a4c275, 0x0a47, 0x4905,
> +		   0x82, 0x85, 0x14, 0x86, 0xa9, 0x77, 0x1a, 0x08)},
> +	{}
> +};
> +
> +struct tee_rproc *tee_rproc_register(struct device *dev, struct rproc *rproc, unsigned int rproc_id)
> +{
> +	struct tee_client_device *tee_device;
> +	struct tee_ioctl_open_session_arg sess_arg;
> +	struct tee_param param[MAX_TEE_PARAM_ARRY_MEMBER];
> +	struct tee_rproc *trproc;
> +	int ret;
> +
> +	/*
> +	 * Test if the device has been probed by the TEE bus. In case of failure, we ignore the
> +	 * reason. The bus could be not yet probed or the service not available in the secure
> +	 * firmware.The assumption in such a case is that the TEE remoteproc is not probed.
> +	 */
> +	if (!tee_rproc_ctx)
> +		return ERR_PTR(-EPROBE_DEFER);
> +
> +	trproc =  devm_kzalloc(dev, sizeof(*trproc), GFP_KERNEL);
> +	if (!trproc)
> +		return ERR_PTR(-ENOMEM);
> +
> +	tee_device = to_tee_client_device(tee_rproc_ctx->dev);
> +	memset(&sess_arg, 0, sizeof(sess_arg));
> +
> +	memcpy(sess_arg.uuid, tee_device->id.uuid.b, TEE_IOCTL_UUID_LEN);
> +
> +	sess_arg.clnt_login = TEE_IOCTL_LOGIN_REE_KERNEL;
> +	sess_arg.num_params = 1;
> +
> +	param[0] = (struct tee_param) {
> +		.attr = TEE_IOCTL_PARAM_ATTR_TYPE_VALUE_INPUT,
> +		.u.value.a = rproc_id,
> +	};
> +
> +	ret = tee_client_open_session(tee_rproc_ctx->tee_ctx, &sess_arg, param);
> +	if (ret < 0 || sess_arg.ret != 0) {
> +		dev_err(dev, "tee_client_open_session failed, err: %x\n", sess_arg.ret);
> +		return ERR_PTR(-EINVAL);
> +	}
> +
> +	trproc->parent =  dev;
> +	trproc->rproc_id = rproc_id;
> +	trproc->session_id = sess_arg.session;
> +
> +	trproc->rproc = rproc;
> +	rproc->tee_interface = trproc;
> +
> +	list_add_tail(&trproc->node, &tee_rproc_ctx->sessions);
> +
> +	return trproc;

Once this function was called by a client, what prevents a user from unloading
the tee_remoteproc module and breaking everything?

> +}
> +EXPORT_SYMBOL_GPL(tee_rproc_register);
> +
> +int tee_rproc_unregister(struct tee_rproc *trproc)
> +{

If you pass a struct_rproc instead of a struct tee_rproc there is no need for
tee_rproc::rproc, which is only ever used in this function.


> +	struct rproc *rproc = trproc->rproc;
> +	int ret;
> +
> +	ret = tee_client_close_session(tee_rproc_ctx->tee_ctx, trproc->session_id);
> +	if (ret < 0)
> +		dev_err(trproc->parent,	"tee_client_close_session failed, err: %x\n", ret);
> +
> +	list_del(&trproc->node);
> +	rproc->tee_interface = NULL;
> +
> +	return ret;
> +}
> +EXPORT_SYMBOL_GPL(tee_rproc_unregister);
> +
> +static int tee_rproc_ctx_match(struct tee_ioctl_version_data *ver, const void *data)
> +{
> +	/* Today we support only the OP-TEE, could be extend to other tees */
> +	return (ver->impl_id == TEE_IMPL_ID_OPTEE);
> +}
> +
> +static int tee_rproc_probe(struct device *dev)
> +{
> +	struct tee_context *tee_ctx;
> +	int ret;
> +
> +	/* Open context with TEE driver */
> +	tee_ctx = tee_client_open_context(NULL, tee_rproc_ctx_match, NULL, NULL);
> +	if (IS_ERR(tee_ctx))
> +		return PTR_ERR(tee_ctx);
> +
> +	tee_rproc_ctx = devm_kzalloc(dev, sizeof(*tee_ctx), GFP_KERNEL);
> +	if (!tee_rproc_ctx) {
> +		ret = -ENOMEM;
> +		goto err;
> +	}
> +
> +	tee_rproc_ctx->dev = dev;
> +	tee_rproc_ctx->tee_ctx = tee_ctx;
> +	INIT_LIST_HEAD(&tee_rproc_ctx->sessions);
> +
> +	return 0;
> +err:
> +	tee_client_close_context(tee_ctx);
> +
> +	return ret;
> +}
> +
> +static int tee_rproc_remove(struct device *dev)
> +{
> +	struct tee_rproc *entry, *tmp;
> +
> +	list_for_each_entry_safe(entry, tmp, &tee_rproc_ctx->sessions, node) {
> +		tee_client_close_session(tee_rproc_ctx->tee_ctx, entry->session_id);
> +		list_del(&entry->node);
> +		if (entry->rsc_table)
> +			iounmap(entry->rsc_table);
> +		kfree(entry);
> +	}
> +
> +	tee_client_close_context(tee_rproc_ctx->tee_ctx);
> +
> +	return 0;
> +}
> +
> +MODULE_DEVICE_TABLE(tee, stm32_tee_rproc_id_table);
> +
> +static struct tee_client_driver tee_rproc_fw_driver = {
> +	.id_table	= stm32_tee_rproc_id_table,
> +	.driver		= {
> +		.name		= KBUILD_MODNAME,
> +		.bus		= &tee_bus_type,
> +		.probe		= tee_rproc_probe,
> +		.remove		= tee_rproc_remove,
> +	},
> +};
> +
> +static int __init tee_rproc_fw_mod_init(void)
> +{
> +	return driver_register(&tee_rproc_fw_driver.driver);
> +}
> +
> +static void __exit tee_rproc_fw_mod_exit(void)
> +{
> +	driver_unregister(&tee_rproc_fw_driver.driver);
> +}
> +
> +module_init(tee_rproc_fw_mod_init);
> +module_exit(tee_rproc_fw_mod_exit);
> +
> +MODULE_DESCRIPTION(" TEE remote processor control driver");
> +MODULE_LICENSE("GPL");
> diff --git a/include/linux/remoteproc.h b/include/linux/remoteproc.h
> index b4795698d8c2..8b678009e481 100644
> --- a/include/linux/remoteproc.h
> +++ b/include/linux/remoteproc.h
> @@ -503,6 +503,8 @@ enum rproc_features {
>  	RPROC_MAX_FEATURES,
>  };
>  
> +struct tee_rproc;
> +
>  /**
>   * struct rproc - represents a physical remote processor device
>   * @node: list node of this rproc object
> @@ -545,6 +547,7 @@ enum rproc_features {
>   * @cdev: character device of the rproc
>   * @cdev_put_on_release: flag to indicate if remoteproc should be shutdown on @char_dev release
>   * @features: indicate remoteproc features
> + * @tee_interface: pointer to the remoteproc tee context
>   */
>  struct rproc {
>  	struct list_head node;
> @@ -586,6 +589,7 @@ struct rproc {
>  	struct cdev cdev;
>  	bool cdev_put_on_release;
>  	DECLARE_BITMAP(features, RPROC_MAX_FEATURES);
> +	struct tee_rproc *tee_interface;
>  };
>  
>  /**
> diff --git a/include/linux/tee_remoteproc.h b/include/linux/tee_remoteproc.h
> new file mode 100644
> index 000000000000..571e47190d02
> --- /dev/null
> +++ b/include/linux/tee_remoteproc.h
> @@ -0,0 +1,112 @@
> +/* SPDX-License-Identifier: GPL-2.0-or-later */
> +/*
> + * Copyright(c) 2024 STMicroelectronics - All Rights Reserved
> + */
> +
> +#ifndef TEE_REMOTEPROC_H
> +#define TEE_REMOTEPROC_H
> +
> +#include <linux/tee_drv.h>
> +#include <linux/firmware.h>
> +#include <linux/remoteproc.h>
> +
> +struct rproc;
> +
> +/**
> + * struct tee_rproc - TEE remoteproc structure
> + * @node:		Reference in list
> + * @rproc:		Remoteproc reference
> + * @parent:		Parent device
> + * @rproc_id:		Identifier of the target firmware
> + * @session_id:		TEE session identifier
> + * @rsc_table:		Resource table virtual address.
> + */
> +struct tee_rproc {
> +	struct list_head node;
> +	struct rproc *rproc;
> +	struct device *parent;
> +	u32 rproc_id;
> +	u32 session_id;
> +	struct resource_table *rsc_table;
> +};
> +
> +#if IS_REACHABLE(CONFIG_TEE_REMOTEPROC)
> +
> +struct tee_rproc *tee_rproc_register(struct device *dev, struct rproc *rproc,
> +				     unsigned int rproc_id);
> +int tee_rproc_unregister(struct tee_rproc *trproc);
> +int tee_rproc_parse_fw(struct rproc *rproc, const struct firmware *fw);
> +int tee_rproc_load_fw(struct rproc *rproc, const struct firmware *fw);
> +struct resource_table *tee_rproc_get_loaded_rsc_table(struct rproc *rproc, size_t *table_sz);
> +struct resource_table *tee_rproc_find_loaded_rsc_table(struct rproc *rproc,
> +						       const struct firmware *fw);
> +int tee_rproc_start(struct rproc *rproc);
> +int tee_rproc_stop(struct rproc *rproc);
> +
> +#else
> +
> +static inline struct tee_rproc *tee_rproc_register(struct device *dev, struct rproc *rproc,
> +						   unsigned int rproc_id)
> +{
> +	return ERR_PTR(-ENODEV);
> +}
> +
> +static int tee_rproc_parse_fw(struct rproc *rproc, const struct firmware *fw)
> +{
> +	/* This shouldn't be possible */
> +	WARN_ON(1);
> +
> +	return 0;
> +}
> +
> +static inline int tee_rproc_unregister(struct tee_rproc *trproc)
> +{
> +	/* This shouldn't be possible */
> +	WARN_ON(1);
> +
> +	return 0;
> +}
> +
> +static inline int tee_rproc_load_fw(struct rproc *rproc,  const struct firmware *fw)
> +{
> +	/* This shouldn't be possible */
> +	WARN_ON(1);
> +
> +	return 0;
> +}
> +
> +static inline int tee_rproc_start(struct rproc *rproc)
> +{
> +	/* This shouldn't be possible */
> +	WARN_ON(1);
> +
> +	return 0;
> +}
> +
> +static inline int tee_rproc_stop(struct rproc *rproc)
> +{
> +	/* This shouldn't be possible */
> +	WARN_ON(1);
> +
> +	return 0;
> +}
> +
> +static inline struct resource_table *
> +tee_rproc_get_loaded_rsc_table(struct rproc *rproc, size_t *table_sz)
> +{
> +	/* This shouldn't be possible */
> +	WARN_ON(1);
> +
> +	return NULL;
> +}
> +
> +static inline struct resource_table *
> +tee_rproc_find_loaded_rsc_table(struct rproc *rproc, const struct firmware *fw)
> +{
> +	/* This shouldn't be possible */
> +	WARN_ON(1);
> +
> +	return NULL;
> +}
> +#endif /* CONFIG_TEE_REMOTEPROC */
> +#endif /* TEE_REMOTEPROC_H */
> -- 
> 2.25.1
> 

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* [PATCH] arm64/ptrace: Use saved floating point state type to determine SVE layout
From: Mark Brown @ 2024-03-25 16:35 UTC (permalink / raw)
  To: Catalin Marinas, Will Deacon
  Cc: Dave Martin, linux-arm-kernel, linux-kernel, Mark Brown, stable

The SVE register sets have two different formats, one of which is a wrapped
version of the standard FPSIMD register set and another with actual SVE
register data. At present we check TIF_SVE to see if full SVE register
state should be provided when reading the SVE regset but if we were in a
syscall we may have saved only floating point registers even though that is
set.

Fix this and simplify the logic by checking and using the format which we
recorded when deciding if we should use FPSIMD or SVE format.

Fixes: 8c845e273104 ("arm64/sve: Leave SVE enabled on syscall if we don't context switch")
Signed-off-by: Mark Brown <broonie@kernel.org>
Cc: stable@vger.kernel.org
---
 arch/arm64/kernel/ptrace.c | 5 +----
 1 file changed, 1 insertion(+), 4 deletions(-)

diff --git a/arch/arm64/kernel/ptrace.c b/arch/arm64/kernel/ptrace.c
index 162b030ab9da..0d022599eb61 100644
--- a/arch/arm64/kernel/ptrace.c
+++ b/arch/arm64/kernel/ptrace.c
@@ -761,7 +761,6 @@ static void sve_init_header_from_task(struct user_sve_header *header,
 {
 	unsigned int vq;
 	bool active;
-	bool fpsimd_only;
 	enum vec_type task_type;
 
 	memset(header, 0, sizeof(*header));
@@ -777,12 +776,10 @@ static void sve_init_header_from_task(struct user_sve_header *header,
 	case ARM64_VEC_SVE:
 		if (test_tsk_thread_flag(target, TIF_SVE_VL_INHERIT))
 			header->flags |= SVE_PT_VL_INHERIT;
-		fpsimd_only = !test_tsk_thread_flag(target, TIF_SVE);
 		break;
 	case ARM64_VEC_SME:
 		if (test_tsk_thread_flag(target, TIF_SME_VL_INHERIT))
 			header->flags |= SVE_PT_VL_INHERIT;
-		fpsimd_only = false;
 		break;
 	default:
 		WARN_ON_ONCE(1);
@@ -790,7 +787,7 @@ static void sve_init_header_from_task(struct user_sve_header *header,
 	}
 
 	if (active) {
-		if (fpsimd_only) {
+		if (target->thread.fp_type == FP_STATE_FPSIMD) {
 			header->flags |= SVE_PT_REGS_FPSIMD;
 		} else {
 			header->flags |= SVE_PT_REGS_SVE;

---
base-commit: 4cece764965020c22cff7665b18a012006359095
change-id: 20240129-arm64-ptrace-fp-type-d3ce48f8883e

Best regards,
-- 
Mark Brown <broonie@kernel.org>


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* Re: [PATCH v6 04/16] dt-bindings: net: wireless: qcom,ath11k: describe the ath11k on QCA6390
From: Bartosz Golaszewski @ 2024-03-25 16:23 UTC (permalink / raw)
  To: Kalle Valo
  Cc: Marcel Holtmann, Luiz Augusto von Dentz, David S . Miller,
	Eric Dumazet, Jakub Kicinski, Paolo Abeni, Rob Herring,
	Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson, Konrad Dybcio,
	Liam Girdwood, Mark Brown, Catalin Marinas, Will Deacon,
	Bjorn Helgaas, Saravana Kannan, Geert Uytterhoeven, Arnd Bergmann,
	Neil Armstrong, Marek Szyprowski, Alex Elder, Srini Kandagatla,
	Greg Kroah-Hartman, Abel Vesa, Manivannan Sadhasivam,
	Lukas Wunner, Dmitry Baryshkov, linux-bluetooth, netdev,
	devicetree, linux-kernel, linux-wireless, linux-arm-msm,
	linux-arm-kernel, linux-pci, linux-pm, Bartosz Golaszewski,
	ath11k, Johan Hovold
In-Reply-To: <87frwe8jiu.fsf@kernel.org>

On Mon, Mar 25, 2024 at 3:37 PM Kalle Valo <kvalo@kernel.org> wrote:
>
> Bartosz Golaszewski <brgl@bgdev.pl> writes:
>
> > On Mon, Mar 25, 2024 at 2:57 PM Kalle Valo <kvalo@kernel.org> wrote:
> >
> >>
> >> Bartosz Golaszewski <brgl@bgdev.pl> writes:
> >>
> >> > From: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
> >> >
> >> > Add a PCI compatible for the ATH11K module on QCA6390 and describe the
> >> > power inputs from the PMU that it consumes.
> >> >
> >> > Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
> >>
> >> [...]
> >>
> >> > +allOf:
> >> > +  - if:
> >> > +      properties:
> >> > +        compatible:
> >> > +          contains:
> >> > +            const: pci17cb,1101
> >> > +    then:
> >> > +      required:
> >> > +        - vddrfacmn-supply
> >> > +        - vddaon-supply
> >> > +        - vddwlcx-supply
> >> > +        - vddwlmx-supply
> >> > +        - vddrfa0p8-supply
> >> > +        - vddrfa1p2-supply
> >> > +        - vddrfa1p7-supply
> >> > +        - vddpcie0p9-supply
> >> > +        - vddpcie1p8-supply
> >>
> >> I don't know DT well enough to know what the "required:" above means,
> >> but does this take into account that there are normal "plug&play" type
> >> of QCA6390 boards as well which don't need any DT settings?
> >
> > Do they require a DT node though for some reason?
>
> You can attach the device to any PCI slot, connect the WLAN antenna and
> it just works without DT nodes. I'm trying to make sure here that basic
> setup still works.
>

Sure, definitely. I there's no DT node, then the binding doesn't apply
and the driver (the platform part of it) will not probe.

> Adding also Johan and ath11k list. For example, I don't know what's the
> plan with Lenovo X13s, will it use this framework? I guess in theory we
> could have devices which use qcom,ath11k-calibration-variant from DT but
> not any of these supply properties?
>

Good point. I will receive the X13s in a month from now. I do plan on
upstreaming correct support for WLAN and BT for it as well.

I guess we can always relax the requirements once a valid use-case appears?

Bart

> --
> https://patchwork.kernel.org/project/linux-wireless/list/
>
> https://wireless.wiki.kernel.org/en/developers/documentation/submittingpatches

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* Re: [PATCH v3 1/1] dt-bindings: net: starfive,jh7110-dwmac: Add StarFive JH8100 support
From: Rob Herring @ 2024-03-25 16:22 UTC (permalink / raw)
  To: Tan Chun Hau
  Cc: David S . Miller, Eric Dumazet, Jakub Kicinski, Paolo Abeni,
	Emil Renner Berthing, Krzysztof Kozlowski, Conor Dooley,
	Maxime Coquelin, Alexandre Torgue, Simon Horman,
	Bartosz Golaszewski, Andrew Halaney, Jisheng Zhang,
	Uwe Kleine-König, Russell King, Ley Foon Tan, Jee Heng Sia,
	netdev, devicetree, linux-kernel, linux-stm32, linux-arm-kernel,
	linux-riscv
In-Reply-To: <20240325085131.182657-2-chunhau.tan@starfivetech.com>

On Mon, Mar 25, 2024 at 01:51:31AM -0700, Tan Chun Hau wrote:
> Add StarFive JH8100 dwmac support.
> The JH8100 dwmac shares the same driver code as the JH7110 dwmac
> and has only one reset signal.
> 
> Please refer to below:
> 
>   JH8100: reset-names = "stmmaceth";
>   JH7110: reset-names = "stmmaceth", "ahb";

It's debatable whether JH8100 is compatible with JH7110 if the 2nd reset 
was not optional. I guess if the Linux driver treated it that way, we 
can get away with it. It would simplify the conditionals in the schema 
if the schema also treated the 2nd entry as optional on JH7110 as well.


>   JH7100: reset-names = "ahb";
> 
> Example usage of JH8100 in the device tree:
> 
> gmac0: ethernet@16030000 {
>         compatible = "starfive,jh8100-dwmac",
>                      "starfive,jh7110-dwmac",
>                      "snps,dwmac-5.20";
>         ...
> };
> 
> Signed-off-by: Tan Chun Hau <chunhau.tan@starfivetech.com>
> ---
>  .../devicetree/bindings/net/snps,dwmac.yaml   |  1 +
>  .../bindings/net/starfive,jh7110-dwmac.yaml   | 82 +++++++++++++------
>  2 files changed, 58 insertions(+), 25 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml b/Documentation/devicetree/bindings/net/snps,dwmac.yaml
> index 6b0341a8e0ea..a6d596b7dcf4 100644
> --- a/Documentation/devicetree/bindings/net/snps,dwmac.yaml
> +++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml
> @@ -97,6 +97,7 @@ properties:
>          - snps,dwxgmac-2.10
>          - starfive,jh7100-dwmac
>          - starfive,jh7110-dwmac
> +        - starfive,jh8100-dwmac
>  
>    reg:
>      minItems: 1
> diff --git a/Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml b/Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml
> index 0d1962980f57..da3cc984fec9 100644
> --- a/Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml
> +++ b/Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml
> @@ -18,6 +18,7 @@ select:
>          enum:
>            - starfive,jh7100-dwmac
>            - starfive,jh7110-dwmac
> +          - starfive,jh8100-dwmac
>    required:
>      - compatible
>  
> @@ -30,6 +31,10 @@ properties:
>        - items:
>            - const: starfive,jh7110-dwmac
>            - const: snps,dwmac-5.20
> +      - items:
> +          - const: starfive,jh8100-dwmac
> +          - const: starfive,jh7110-dwmac
> +          - const: snps,dwmac-5.20
>  
>    reg:
>      maxItems: 1
> @@ -83,29 +88,13 @@ allOf:
>    - if:
>        properties:
>          compatible:
> -          contains:
> -            const: starfive,jh7100-dwmac
> -    then:
> -      properties:
> -        interrupts:
> -          minItems: 2
> -          maxItems: 2
> -
> -        interrupt-names:
> -          minItems: 2
> -          maxItems: 2
> -
> -        resets:
> -          maxItems: 1
> -
> -        reset-names:
> -          const: ahb
> -
> -  - if:
> -      properties:
> -        compatible:
> -          contains:
> -            const: starfive,jh7110-dwmac
> +          allOf:
> +            - contains:
> +                enum:
> +                  - starfive,jh8100-dwmac
> +            - contains:
> +                enum:
> +                  - starfive,jh7110-dwmac

There's no need for the 2nd entry. You just need to check

I would something like this structure:

  - if:
      properties:
        compatible:
          contains:
            const: starfive,jh7100-dwmac

    then:

      if:
        properties:
          compatible:
            contains:
              const: starfive,jh8100-dwmac
      then:
        ...
      else:
        ...


>      then:
>        properties:
>          interrupts:
> @@ -117,10 +106,53 @@ allOf:
>            maxItems: 3
>  
>          resets:
> -          minItems: 2
> +          maxItems: 1
>  
>          reset-names:
> -          minItems: 2
> +          const: stmmaceth
> +
> +    else:

I don't think you need the else. Just do another 'if' entry.

> +      if:
> +        properties:
> +          compatible:
> +            contains:
> +              const: starfive,jh7100-dwmac
> +      then:
> +        properties:
> +          interrupts:
> +            minItems: 2
> +            maxItems: 2
> +
> +          interrupt-names:
> +            minItems: 2
> +            maxItems: 2
> +
> +          resets:
> +            maxItems: 1
> +
> +          reset-names:
> +            const: ahb
> +
> +        if:
> +          properties:
> +            compatible:
> +              contains:
> +                const: starfive,jh7110-dwmac
> +        then:
> +          properties:
> +            interrupts:
> +              minItems: 3
> +              maxItems: 3
> +
> +            interrupt-names:
> +              minItems: 3
> +              maxItems: 3
> +
> +            resets:
> +              minItems: 2
> +
> +            reset-names:
> +              minItems: 2
>  
>  unevaluatedProperties: false
>  
> -- 
> 2.25.1
> 

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