* Re: [PATCH] arm64: dts: rockchip: Remove unsupported node from the Pinebook Pro dts
From: Heiko Stuebner @ 2024-04-01 21:55 UTC (permalink / raw)
To: linux-rockchip, Dragan Simic
Cc: Heiko Stuebner, devicetree, krzysztof.kozlowski+dt, conor+dt,
linux-arm-kernel, robh+dt
In-Reply-To: <0f82c3f97cb798d012270d13b34d8d15305ef293.1711923520.git.dsimic@manjaro.org>
On Mon, 1 Apr 2024 00:20:56 +0200, Dragan Simic wrote:
> Remove a redundant node from the Pine64 Pinebook Pro dts, which is intended
> to provide a value for the delay in PCI Express enumeration, but that isn't
> supported without additional out-of-tree kernel patches.
>
> There were already efforts to upstream those kernel patches, because they
> reportedly make some PCI Express cards (such as LSI SAS HBAs) usable in
> Pine64 RockPro64 (which is also based on the RK3399); otherwise, those PCI
> Express cards fail to enumerate. However, providing the required background
> and explanations proved to be a tough nut to crack, which is the reason why
> those patches remain outside of the kernel mainline for now.
>
> [...]
Applied, thanks!
[1/1] arm64: dts: rockchip: Remove unsupported node from the Pinebook Pro dts
commit: 43853e843aa6c3d47ff2b0cce898318839483d05
Best regards,
--
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* Re: [PATCH 0/2] Enable internal strobe pulldown on Radxa ROCK 4 SBCs
From: Heiko Stuebner @ 2024-04-01 21:55 UTC (permalink / raw)
To: Krzysztof Kozlowski, Rob Herring, Folker Schwesinger,
Conor Dooley, Chris Ruehl, Vinod Koul, Yogesh Hegde
Cc: Heiko Stuebner, devicetree, linux-arm-kernel, Christopher Obbard,
linux-kernel, Dragan Simic, linux-rockchip
In-Reply-To: <20240327192641.14220-1-dev@folker-schwesinger.de>
On Wed, 27 Mar 2024 20:26:36 +0100, Folker Schwesinger wrote:
> Various RK3399 boards, including the ROCK Pi 4 series showed instabilities
> with some eMMC modules when operating in HS400 mode [1]. Later, a missing
> pull-down resistor on the eMMC strobe line was identified as the root
> cause of these instabilities [2].
>
> This series enables the internal pull-down on the eMMC PHY strobe line
> for all ROCK 4 series boards as they all lack an external strobe
> pull-down resistor.
>
> [...]
Applied, thanks!
[1/2] arm64: dts: rockchip: Add enable-strobe-pulldown to emmc phy on ROCK Pi 4
commit: f720dd9b8b6d8b2160beda789429d5489ce8a099
[2/2] arm64: dts: rockchip: Add enable-strobe-pulldown to emmc phy on ROCK 4C+
commit: c1b1f340dd7db11f273e426e110697551c9f501f
Best regards,
--
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* Re: [PATCH 1/2] arm64: dts: rockchip: Enable gpu on Cool Pi CM5
From: Heiko Stuebner @ 2024-04-01 21:55 UTC (permalink / raw)
To: Andy Yan
Cc: Heiko Stuebner, devicetree, sebastian.reichel, dsimic,
krzysztof.kozlowski+dt, conor+dt, linux-arm-kernel, linux-kernel,
linux-rockchip
In-Reply-To: <20240330100134.3588223-1-andyshrk@163.com>
On Sat, 30 Mar 2024 18:01:33 +0800, Andy Yan wrote:
> Enable mali gpu node and add the board specific supply-regulator.
>
>
Applied, thanks!
[1/2] arm64: dts: rockchip: Enable gpu on Cool Pi CM5
commit: 3436ded09656f1f49e064c5e791656acf0dd25c5
[2/2] arm64: dts: rockchip: Enable gpu on Cool Pi 4B
commit: 604552d0102c4260ef2561b8c84f849e43731678
Best regards,
--
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* Re: [PATCH] arm64: dts: rockchip: drop panel port unit address in GRU Scarlet
From: Heiko Stuebner @ 2024-04-01 21:55 UTC (permalink / raw)
To: devicetree, Krzysztof Kozlowski, linux-arm-kernel, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, linux-kernel, linux-rockchip
Cc: Heiko Stuebner
In-Reply-To: <20240401140939.97808-1-krzk@kernel.org>
On Mon, 1 Apr 2024 16:09:39 +0200, Krzysztof Kozlowski wrote:
> Panel port does not have "reg", thus it should not have unit address, as
> reported by dtc W=1 warning:
>
> rk3399-gru-scarlet.dtsi:666.32-668.7: Warning (unit_address_vs_reg): /dsi@ff960000/panel@0/ports/port@1/endpoint@1: node has a unit name, but no reg or ranges property
>
>
Applied, thanks!
[1/1] arm64: dts: rockchip: drop panel port unit address in GRU Scarlet
commit: 4ddc13461740308d3133c2defda97d9e3a30ede8
Best regards,
--
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* [PATCH] dt-bindings: rockchip: grf: Add missing type to 'pcie-phy' node
From: Rob Herring @ 2024-04-01 20:49 UTC (permalink / raw)
To: Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner
Cc: devicetree, linux-arm-kernel, linux-rockchip, linux-kernel
'pcie-phy' is missing any type. Add 'type: object' to indicate it's a
node.
Signed-off-by: Rob Herring <robh@kernel.org>
---
Documentation/devicetree/bindings/soc/rockchip/grf.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/soc/rockchip/grf.yaml b/Documentation/devicetree/bindings/soc/rockchip/grf.yaml
index 0b87c266760c..79798c747476 100644
--- a/Documentation/devicetree/bindings/soc/rockchip/grf.yaml
+++ b/Documentation/devicetree/bindings/soc/rockchip/grf.yaml
@@ -171,6 +171,7 @@ allOf:
unevaluatedProperties: false
pcie-phy:
+ type: object
description:
Documentation/devicetree/bindings/phy/rockchip-pcie-phy.txt
--
2.43.0
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* [PATCH] pinctrl: pinctrl-single: Remove some unused fields in struct pcs_function
From: Christophe JAILLET @ 2024-04-01 20:48 UTC (permalink / raw)
To: Tony Lindgren, Haojian Zhuang, Linus Walleij
Cc: linux-kernel, kernel-janitors, Christophe JAILLET,
linux-arm-kernel, linux-omap, linux-gpio
In "struct pcs_function", the 'pgnames' and 'npgnames' fields are unused.
This is a left-over from commit 571aec4df5b7 ("pinctrl: single: Use generic
pinmux helpers for managing functions");
Remove them.
Found with cppcheck, unusedStructMember.
Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
---
Compile tested only.
---
drivers/pinctrl/pinctrl-single.c | 4 ----
1 file changed, 4 deletions(-)
diff --git a/drivers/pinctrl/pinctrl-single.c b/drivers/pinctrl/pinctrl-single.c
index 19cc0db771a5..2261d4663d19 100644
--- a/drivers/pinctrl/pinctrl-single.c
+++ b/drivers/pinctrl/pinctrl-single.c
@@ -81,8 +81,6 @@ struct pcs_conf_type {
* @name: pinctrl function name
* @vals: register and vals array
* @nvals: number of entries in vals array
- * @pgnames: array of pingroup names the function uses
- * @npgnames: number of pingroup names the function uses
* @conf: array of pin configurations
* @nconfs: number of pin configurations available
* @node: list node
@@ -91,8 +89,6 @@ struct pcs_function {
const char *name;
struct pcs_func_vals *vals;
unsigned nvals;
- const char **pgnames;
- int npgnames;
struct pcs_conf_vals *conf;
int nconfs;
struct list_head node;
--
2.44.0
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* Re: [PATCH RESEND] arm64: dts: marvell: add DTS for 7215-IXS-A1 board
From: Natarajan Subbiramani @ 2024-04-01 19:49 UTC (permalink / raw)
To: Andrew Lunn; +Cc: gregory.clement, linux-arm-kernel, nsubbara
In-Reply-To: <d93b9795-7f9e-4cf1-af44-3dcf08f4a204@lunn.ch>
>
> > +// SPDX-License-Identifier: GPL-2.0+
> > +/*
> > + * Copyright (C) 2024 Nokia
> > + * Copyright (C) 2020 Marvell International Ltd.
> > + */
> > +
> > +#include "cn9130.dtsi" /* include SoC device tree */
> > +
> > +#include <dt-bindings/gpio/gpio.h>
> > +
> > +/ {
> > + #address-cells = <0x02>;
> > + #size-cells = <0x02>;
> > + model = "7215 IXS-A1";
> > + compatible = "marvell,cn9130\0marvell,armada-ap807-quad\0marvell,armada-ap807";
>
> Could you please explain the \0 ?
We inherited this from the Marvell SDK for our board.
Sure, We will remove this compatible property and use the default
present in included the dtsi file.
>
> Also, there is generally a compatible which has something to do with
> the actual product, 7215 IXS-A1, not just the RDK it is based on.
>
> > +&cp0_mdio {
> > + status = "okay";
> > + phy0: ethernet-phy@0 {
> > + reg = <0>;
> > + /* Management port LED blink activity*/
> > + marvell,reg-init = <0x03 0x10 0x0 0x1140>;
>
> Please configure this via /sys/class/leds. Take a look at armada 370
> rd for an example for what you need in DT.
The present Network Operating System (NOS) lacks the LED functionality
modifications in the Marvell PHY drivers you mentioned. Therefore, we
cannot verify the suggested changes at this time. We plan to address
this by upgrading to the latest kernel and conducting thorough
testing. Thank you for taking the time to review the changes.
>
> > diff --git a/arch/arm64/boot/dts/marvell/Makefile b/arch/arm64/boot/dts/marvell/Makefile
> > index 99b8cb3c49e1..124a7d1fd5a8 100644
> > --- a/arch/arm64/boot/dts/marvell/Makefile
> > +++ b/arch/arm64/boot/dts/marvell/Makefile
> > @@ -28,3 +28,4 @@ dtb-$(CONFIG_ARCH_MVEBU) += cn9130-crb-A.dtb
> > dtb-$(CONFIG_ARCH_MVEBU) += cn9130-crb-B.dtb
> > dtb-$(CONFIG_ARCH_MVEBU) += ac5x-rd-carrier-cn9131.dtb
> > dtb-$(CONFIG_ARCH_MVEBU) += ac5-98dx35xx-rd.dtb
> > +dtb-$(CONFIG_ARCH_MVEBU) += 7215-ixs-a1.dtb
>
> This file is sorted alphabetically. It is not so important for this
> file, but Makefiles which see a lot of changed get merge conflicts if
> you always add at the end. By keeping it in alphabetic order it tends
> to spread changes out so they are less likely to cause such conflicts.
>
> Also, maybe this should be nokia-7215-ixs-a1.dtb?
This was intentional, we will move it as per alphabetical order when
we upstream again.
>
> Andrew
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* [PATCH v4] net: stmmac: fix rx queue priority assignment
From: Piotr Wejman @ 2024-04-01 19:22 UTC (permalink / raw)
To: Alexandre Torgue, Jose Abreu, David S. Miller, Eric Dumazet,
Jakub Kicinski, Paolo Abeni, Maxime Coquelin, Joao Pinto, netdev,
linux-stm32, linux-arm-kernel, linux-kernel
Cc: Piotr Wejman
The driver should ensure that same priority is not mapped to multiple
rx queues. From DesignWare Cores Ethernet Quality-of-Service
Databook, section 17.1.29 MAC_RxQ_Ctrl2:
"[...]The software must ensure that the content of this field is
mutually exclusive to the PSRQ fields for other queues, that is,
the same priority is not mapped to multiple Rx queues[...]"
Previously rx_queue_priority() function was:
- clearing all priorities from a queue
- adding new priorities to that queue
After this patch it will:
- first assign new priorities to a queue
- then remove those priorities from all other queues
- keep other priorities previously assigned to that queue
Fixes: a8f5102af2a7 ("net: stmmac: TX and RX queue priority configuration")
Fixes: 2142754f8b9c ("net: stmmac: Add MAC related callbacks for XGMAC2")
Signed-off-by: Piotr Wejman <piotrwejman90@gmail.com>
---
Changes in v2:
- Add some comments
- Apply same changes to dwxgmac2_rx_queue_prio()
- Revert "Rename prio argument to prio_mask"
- Link to v1: https://lore.kernel.org/netdev/20240219102405.32015-1-piotrwejman90@gmail.com/T/#u
Changes in v3:
- Fix trailing whitespace
- Link to v2: https://lore.kernel.org/netdev/20240226093144.31965-1-piotrwejman90@gmail.com/
Changes in v4:
- amend comment and commit message
- Link to v3: https://lore.kernel.org/netdev/20240303190339.52496-1-piotrwejman90@gmail.com/
.../net/ethernet/stmicro/stmmac/dwmac4_core.c | 40 ++++++++++++++-----
.../ethernet/stmicro/stmmac/dwxgmac2_core.c | 38 ++++++++++++++----
2 files changed, 62 insertions(+), 16 deletions(-)
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c b/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
index 6b6d0de09619..eb2d0976d010 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
@@ -92,19 +92,41 @@ static void dwmac4_rx_queue_priority(struct mac_device_info *hw,
u32 prio, u32 queue)
{
void __iomem *ioaddr = hw->pcsr;
- u32 base_register;
- u32 value;
+ u32 clear_mask = 0;
+ u32 ctrl2, ctrl3;
+ int i;
- base_register = (queue < 4) ? GMAC_RXQ_CTRL2 : GMAC_RXQ_CTRL3;
- if (queue >= 4)
- queue -= 4;
+ ctrl2 = readl(ioaddr + GMAC_RXQ_CTRL2);
+ ctrl3 = readl(ioaddr + GMAC_RXQ_CTRL3);
- value = readl(ioaddr + base_register);
+ /* The software must ensure that the same priority
+ * is not mapped to multiple Rx queues
+ */
+ for (i = 0; i < 4; i++)
+ clear_mask |= ((prio << GMAC_RXQCTRL_PSRQX_SHIFT(i)) &
+ GMAC_RXQCTRL_PSRQX_MASK(i));
+
+ ctrl2 &= ~clear_mask;
+ ctrl3 &= ~clear_mask;
+
+ /* First assign new priorities to a queue, then
+ * clear them from others queues
+ */
+ if (queue < 4) {
+ ctrl2 |= (prio << GMAC_RXQCTRL_PSRQX_SHIFT(queue)) &
+ GMAC_RXQCTRL_PSRQX_MASK(queue);
- value &= ~GMAC_RXQCTRL_PSRQX_MASK(queue);
- value |= (prio << GMAC_RXQCTRL_PSRQX_SHIFT(queue)) &
+ writel(ctrl2, ioaddr + GMAC_RXQ_CTRL2);
+ writel(ctrl3, ioaddr + GMAC_RXQ_CTRL3);
+ } else {
+ queue -= 4;
+
+ ctrl3 |= (prio << GMAC_RXQCTRL_PSRQX_SHIFT(queue)) &
GMAC_RXQCTRL_PSRQX_MASK(queue);
- writel(value, ioaddr + base_register);
+
+ writel(ctrl3, ioaddr + GMAC_RXQ_CTRL3);
+ writel(ctrl2, ioaddr + GMAC_RXQ_CTRL2);
+ }
}
static void dwmac4_tx_queue_priority(struct mac_device_info *hw,
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c
index 1af2f89a0504..2bc05173884e 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c
@@ -105,17 +105,41 @@ static void dwxgmac2_rx_queue_prio(struct mac_device_info *hw, u32 prio,
u32 queue)
{
void __iomem *ioaddr = hw->pcsr;
- u32 value, reg;
+ u32 clear_mask = 0;
+ u32 ctrl2, ctrl3;
+ int i;
- reg = (queue < 4) ? XGMAC_RXQ_CTRL2 : XGMAC_RXQ_CTRL3;
- if (queue >= 4)
+ ctrl2 = readl(ioaddr + XGMAC_RXQ_CTRL2);
+ ctrl3 = readl(ioaddr + XGMAC_RXQ_CTRL3);
+
+ /* The software must ensure that the same priority
+ * is not mapped to multiple Rx queues
+ */
+ for (i = 0; i < 4; i++)
+ clear_mask |= ((prio << XGMAC_PSRQ_SHIFT(i)) &
+ XGMAC_PSRQ(i));
+
+ ctrl2 &= ~clear_mask;
+ ctrl3 &= ~clear_mask;
+
+ /* First assign new priorities to a queue, then
+ * clear them from others queues
+ */
+ if (queue < 4) {
+ ctrl2 |= (prio << XGMAC_PSRQ_SHIFT(queue)) &
+ XGMAC_PSRQ(queue);
+
+ writel(ctrl2, ioaddr + XGMAC_RXQ_CTRL2);
+ writel(ctrl3, ioaddr + XGMAC_RXQ_CTRL3);
+ } else {
queue -= 4;
- value = readl(ioaddr + reg);
- value &= ~XGMAC_PSRQ(queue);
- value |= (prio << XGMAC_PSRQ_SHIFT(queue)) & XGMAC_PSRQ(queue);
+ ctrl3 |= (prio << XGMAC_PSRQ_SHIFT(queue)) &
+ XGMAC_PSRQ(queue);
- writel(value, ioaddr + reg);
+ writel(ctrl3, ioaddr + XGMAC_RXQ_CTRL3);
+ writel(ctrl2, ioaddr + XGMAC_RXQ_CTRL2);
+ }
}
static void dwxgmac2_tx_queue_prio(struct mac_device_info *hw, u32 prio,
--
2.25.1
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* Re: [PATCH v3] net: stmmac: fix rx queue priority assignment
From: Piotr Wejman @ 2024-04-01 17:48 UTC (permalink / raw)
To: Jakub Kicinski
Cc: Alexandre Torgue, Jose Abreu, David S. Miller, Eric Dumazet,
Paolo Abeni, Maxime Coquelin, netdev, linux-stm32,
linux-arm-kernel, linux-kernel
In-Reply-To: <20240311134144.7b1e1a34@kernel.org>
On Mon, Mar 11, 2024 at 01:41:44PM -0700, Jakub Kicinski wrote:
> On Sun, 3 Mar 2024 20:03:38 +0100 Piotr Wejman wrote:
> > The driver should ensure that same priority is not mapped to multiple
> > rx queues. Currently rx_queue_priority() function is adding
> > priorities for a queue without clearing them from others.
>
> Do you know what user-visible mis-behavior this may result in?
When changing priority to rx queue mapping with tc qdisc taprio command (man tc-taprio),
all packets with priority assigned to multiple queues are dropped.
>
> > From DesignWare Cores Ethernet Quality-of-Service
> > Databook, section 17.1.29 MAC_RxQ_Ctrl2:
> > "[...]The software must ensure that the content of this field is
> > mutually exclusive to the PSRQ fields for other queues, that is,
> > the same priority is not mapped to multiple Rx queues[...]"
> >
> > After this patch, rx_queue_priority() function will:
> > - assign desired priorities to a queue
> > - remove those priorities from all other queues
>
> But also you seem to remove clearing all other prios from the queue:
>
> - value &= ~GMAC_RXQCTRL_PSRQX_MASK(queue);
>
> and
>
> - value &= ~XGMAC_PSRQ(queue);
>
> is that intentional? Commit message should explain why.
Yes, that keeps other priorities assigned to that queue and only clears
the same priorities from all other queues.
>
> > The write sequence of CTRL2 and CTRL3 registers is done in the way to
> > ensure this order.
>
> Ensure which order? Looks like you're actually writing in the opposite
> order than what I'd expect :S First the register you want to assign to,
> and then the register you only clear from.
>
I meant the order you wrote: first assign new priorities to a queue,
then clear them from others queues.
> When you repost please include a Fixes tag.
> --
> pw-bot: cr
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* Re: [PATCH] ASoC: dt-bindings: mt2701-wm8960: Convert to dtschema
From: Kartik Agarwala @ 2024-04-01 17:38 UTC (permalink / raw)
To: Rob Herring
Cc: lgirdwood, broonie, krzysztof.kozlowski+dt, conor+dt,
matthias.bgg, angelogioacchino.delregno, linux-sound, devicetree,
linux-kernel, linux-arm-kernel, linux-mediatek
In-Reply-To: <20240401151414.GA706943-robh@kernel.org>
On 4/1/24 8:44 PM, Rob Herring wrote:
> On Mon, Apr 01, 2024 at 10:05:05AM +0530, Kartik Agarwala wrote:
>> + A list of the connections between audio components. Each entry is a
>> + pair of strings, the first being the connection's sink, the second
>> + being the connection's source.
>> +
>> + mediatek,audio-codec:
>> + $ref: /schemas/types.yaml#/definitions/phandle
>> + description: The phandle of the WM8960 audio codec.
>> +
>> + pinctrl-names:
>> + const: default
>> +
>> + pinctrl-0: true
>
> You can drop pinctrl properties. Those are implicitly supported.
Hi,
Thanks for the review!
Just to clarify, the removal of pinctrl properties should only apply
to this section and not to the required properties or the example,
is that correct?
Regards,
Kartik Agarwala
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* Re: [PATCH v2] PCI: rockchip-host: Fix rockchip_pcie_host_init_port() PERST# handling
From: Dragan Simic @ 2024-04-01 17:28 UTC (permalink / raw)
To: Damien Le Moal
Cc: Shawn Lin, Bjorn Helgaas, Heiko Stuebner, linux-pci,
Lorenzo Pieralisi, Krzysztof Wilczyński, linux-rockchip,
linux-arm-kernel
In-Reply-To: <89eb3414-38ba-4397-9ed7-aebebbdadd07@kernel.org>
On 2024-04-01 08:59, Damien Le Moal wrote:
> On 4/1/24 04:34, Dragan Simic wrote:
>> Please see my comments below.
>>
>> On 2024-03-30 04:50, Damien Le Moal wrote:
>>> The PCIe specifications (PCI Express Electromechanical Specification
>>> rev
>>> 2.0, section 2.6.2) mandate that the PERST# signal must remain
>>> asserted
>>> for at least 100 usec (Tperst-clk) after the PCIe reference clock
>>> becomes stable (if a reference clock is supplied), for at least 100
>>> msec
>>> after the power is stable (Tpvperl).
>>>
>>> In addition, the PCI Express Base SPecification Rev 2.0, section
>>> 6.6.1
>>> state that the host should wait for at least 100 msec from the end of
>>> a
>>> conventional reset (PERST# is de-asserted) before accessing the
>>> configuration space of the attached device.
>>>
>>> Modify rockchip_pcie_host_init_port() by adding two 100ms sleep, one
>>> before and after bringing back PESRT signal to high using the ep_gpio
>>> GPIO. Comments are also added to clarify this behavior.
>>>
>>> Signed-off-by: Damien Le Moal <dlemoal@kernel.org>
>>> ---
>>>
>>> Changes from v1:
>>> - Add more specification details to the commit message.
>>> - Add missing msleep(100) after PERST# is deasserted.
>>>
>>> drivers/pci/controller/pcie-rockchip-host.c | 12 ++++++++++++
>>> 1 file changed, 12 insertions(+)
>>>
>>> diff --git a/drivers/pci/controller/pcie-rockchip-host.c
>>> b/drivers/pci/controller/pcie-rockchip-host.c
>>> index 300b9dc85ecc..ff2fa27bd883 100644
>>> --- a/drivers/pci/controller/pcie-rockchip-host.c
>>> +++ b/drivers/pci/controller/pcie-rockchip-host.c
>>> @@ -294,6 +294,7 @@ static int rockchip_pcie_host_init_port(struct
>>> rockchip_pcie *rockchip)
>>> int err, i = MAX_LANE_NUM;
>>> u32 status;
>>>
>>> + /* Assert PERST */
>>> gpiod_set_value_cansleep(rockchip->ep_gpio, 0);
>>>
>>> err = rockchip_pcie_init_port(rockchip);
>>> @@ -322,8 +323,19 @@ static int rockchip_pcie_host_init_port(struct
>>> rockchip_pcie *rockchip)
>>> rockchip_pcie_write(rockchip, PCIE_CLIENT_LINK_TRAIN_ENABLE,
>>> PCIE_CLIENT_CONFIG);
>>>
>>> + /*
>>> + * PCIe CME specifications mandate that PERST be asserted for at
>>> + * least 100ms after power is stable.
>>> + */
>>> + msleep(100);
>>
>> Perhaps it would be slightly better to use usleep_range()
>> instead of msleep().
>
> I can do that, but I fail to see the advantage. Why do you say that
> it may be better ?
Actually, I was wrong. When sleeping for 100 msec, msleep()
is actually the preferred variant. [1]
[1] https://www.kernel.org/doc/Documentation/timers/timers-howto.txt
>>> gpiod_set_value_cansleep(rockchip->ep_gpio, 1);
>>>
>>> + /*
>>> + * PCIe base specifications rev 2.0 mandate that the host wait for
>>> + * 100ms after completion of a conventional reset.
>>> + */
>>> + msleep(100);
>>
>> Obviously, the same comment as above applies here.
>>
>>> +
>>> /* 500ms timeout value should be enough for Gen1/2 training */
>>> err = readl_poll_timeout(rockchip->apb_base +
>>> PCIE_CLIENT_BASIC_STATUS1,
>>> status, PCIE_LINK_UP(status), 20,
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* Re: [PATCH v1 1/6] dt-bindings: clock: meson: a1: pll: introduce new syspll bindings
From: Dmitry Rokosov @ 2024-04-01 17:22 UTC (permalink / raw)
To: Rob Herring
Cc: neil.armstrong, jbrunet, mturquette, sboyd,
krzysztof.kozlowski+dt, khilman, martin.blumenstingl, kernel,
rockosov, linux-amlogic, linux-clk, devicetree, linux-kernel,
linux-arm-kernel
In-Reply-To: <20240401142011.GA537763-robh@kernel.org>
Hello Rob,
On Mon, Apr 01, 2024 at 09:20:11AM -0500, Rob Herring wrote:
> On Fri, Mar 29, 2024 at 11:58:41PM +0300, Dmitry Rokosov wrote:
> > The 'syspll' PLL is a general-purpose PLL designed specifically for the
> > CPU clock. It is capable of producing output frequencies within the
> > range of 768MHz to 1536MHz.
> >
> > Signed-off-by: Dmitry Rokosov <ddrokosov@salutedevices.com>
> > ---
> > .../devicetree/bindings/clock/amlogic,a1-pll-clkc.yaml | 7 +++++--
> > include/dt-bindings/clock/amlogic,a1-pll-clkc.h | 2 ++
> > 2 files changed, 7 insertions(+), 2 deletions(-)
> >
> > diff --git a/Documentation/devicetree/bindings/clock/amlogic,a1-pll-clkc.yaml b/Documentation/devicetree/bindings/clock/amlogic,a1-pll-clkc.yaml
> > index a59b188a8bf5..fbba57031278 100644
> > --- a/Documentation/devicetree/bindings/clock/amlogic,a1-pll-clkc.yaml
> > +++ b/Documentation/devicetree/bindings/clock/amlogic,a1-pll-clkc.yaml
> > @@ -26,11 +26,13 @@ properties:
> > items:
> > - description: input fixpll_in
> > - description: input hifipll_in
> > + - description: input syspll_in
> >
> > clock-names:
> > items:
> > - const: fixpll_in
> > - const: hifipll_in
> > + - const: syspll_in
>
> A new required entry is an ABI break. Please state why that's ok or make
> it optional (minItems: 2).
Unfortunatelly, it cannot be optional. I've explained here why:
https://lore.kernel.org/all/20240401171933.bqmjsuanqsjvjosn@CAB-WSD-L081021/
"""
The clock source sys_pll_div16, being one of the GEN clock parents,
plays a crucial role and cannot be tagged as "optional". Unfortunately,
it was not implemented earlier due to the cpu clock ctrl driver's
pending status on the TODO list.
"""
Could you please provide guidance on whether there is any alternative
approach that could potentially make it possible?
--
Thank you,
Dmitry
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* Re: [PATCH v1 3/6] dt-bindings: clock: meson: a1: peripherals: support sys_pll_div16 input
From: Dmitry Rokosov @ 2024-04-01 17:19 UTC (permalink / raw)
To: Rob Herring
Cc: neil.armstrong, jbrunet, mturquette, sboyd,
krzysztof.kozlowski+dt, khilman, martin.blumenstingl, kernel,
rockosov, linux-amlogic, linux-clk, devicetree, linux-kernel,
linux-arm-kernel
In-Reply-To: <20240401142136.GA559114-robh@kernel.org>
Hello Rob,
Thank you for the quick review.
On Mon, Apr 01, 2024 at 09:21:36AM -0500, Rob Herring wrote:
> On Fri, Mar 29, 2024 at 11:58:43PM +0300, Dmitry Rokosov wrote:
> > The 'sys_pll_div16' input clock is used as one of the sources for the
> > GEN clock.
> >
> > Signed-off-by: Dmitry Rokosov <ddrokosov@salutedevices.com>
> > ---
> > .../bindings/clock/amlogic,a1-peripherals-clkc.yaml | 5 ++++-
> > 1 file changed, 4 insertions(+), 1 deletion(-)
> >
> > diff --git a/Documentation/devicetree/bindings/clock/amlogic,a1-peripherals-clkc.yaml b/Documentation/devicetree/bindings/clock/amlogic,a1-peripherals-clkc.yaml
> > index 6d84cee1bd75..f6668991ff1f 100644
> > --- a/Documentation/devicetree/bindings/clock/amlogic,a1-peripherals-clkc.yaml
> > +++ b/Documentation/devicetree/bindings/clock/amlogic,a1-peripherals-clkc.yaml
> > @@ -29,6 +29,7 @@ properties:
> > - description: input fixed pll div5
> > - description: input fixed pll div7
> > - description: input hifi pll
> > + - description: input sys pll div16
> > - description: input oscillator (usually at 24MHz)
> >
> > clock-names:
> > @@ -38,6 +39,7 @@ properties:
> > - const: fclk_div5
> > - const: fclk_div7
> > - const: hifi_pll
> > + - const: sys_pll_div16
> > - const: xtal
>
> And adding an entry in the middle is also an ABI break. New entries go
> on the end (and should be optional).
The clock source sys_pll_div16, being one of the GEN clock parents,
plays a crucial role and cannot be tagged as "optional". Unfortunately,
it was not implemented earlier due to the cpu clock ctrl driver's
pending status on the TODO list.
I would greatly appreciate your advice on the best and simplest way to
resolve this matter in an effective manner..
--
Thank you,
Dmitry
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* Re: [PATCH v1 6/6] clk: meson: a1: add Amlogic A1 CPU clock controller driver
From: Dmitry Rokosov @ 2024-04-01 17:12 UTC (permalink / raw)
To: Martin Blumenstingl
Cc: neil.armstrong, jbrunet, mturquette, sboyd, robh+dt,
krzysztof.kozlowski+dt, khilman, kernel, rockosov, linux-amlogic,
linux-clk, devicetree, linux-kernel, linux-arm-kernel
In-Reply-To: <CAFBinCCC5KK-4_w41B-+ZJ3zdZckq_EDuAW+Kak2C0Ow8uuD6Q@mail.gmail.com>
Hello Martin,
Thank you for quick response. Please find my thoughts below.
On Sun, Mar 31, 2024 at 11:40:13PM +0200, Martin Blumenstingl wrote:
> Hi Dmitry,
>
> On Fri, Mar 29, 2024 at 9:59 PM Dmitry Rokosov
> <ddrokosov@salutedevices.com> wrote:
> [...]
> > +static struct clk_regmap cpu_fclk = {
> > + .data = &(struct clk_regmap_mux_data) {
> > + .offset = CPUCTRL_CLK_CTRL0,
> > + .mask = 0x1,
> > + .shift = 10,
> > + },
> > + .hw.init = &(struct clk_init_data) {
> > + .name = "cpu_fclk",
> > + .ops = &clk_regmap_mux_ops,
> > + .parent_hws = (const struct clk_hw *[]) {
> > + &cpu_fsel0.hw,
> > + &cpu_fsel1.hw,
> Have you considered the CLK_SET_RATE_GATE flag for &cpu_fsel0.hw and
> &cpu_fsel1.hw and then dropping the clock notifier below?
> We use that approach with the Mali GPU clock on other SoCs, see for
> example commit 8daeaea99caa ("clk: meson: meson8b: make the CCF use
> the glitch-free mali mux").
> It may differ from what Amlogic does in their BSP,
Amlogic in their BSP takes a different approach, which is slightly
different from mine. They cleverly change the parent of cpu_clk directly
by forking the cpufreq driver to a custom version. I must admit, it's
quite an "interesting and amazing" idea :) but it's not architecturally
correct totally.
> but I don't think
> that there's any harm (if it works in general) because CCF (common
> clock framework) will set all clocks in the "inactive" tree and then
> as a last step just change the mux (&cpu_fclk.hw). So at no point in
> time will we get any other rate than a) the original CPU clock rate
> before the rate change b) the new desired CPU clock rate. This is
> because we have two symmetric clock trees.
Now, let's dive into the specifics of the issue we're facing. I've
examined the CLK_SET_RATE_GATE flag, which, to my understanding, blocks
rate changes for the entire clock chain. However, in this particular
situation, it doesn't provide the solution we need.
Here's the problem we're dealing with:
1) The CPU clock can have the following frequency points:
available frequency steps: 128 MHz, 256 MHz, 512 MHz, 768 MHz, 1.01 GHz, 1.20 GHz
When we run the cpupower, we get the following information:
# cpupower -c 0,1 frequency-info
analyzing CPU 0:
driver: cpufreq-dt
CPUs which run at the same hardware frequency: 0 1
CPUs which need to have their frequency coordinated by software: 0 1
maximum transition latency: 50.0 us
hardware limits: 128 MHz - 1.20 GHz
available frequency steps: 128 MHz, 256 MHz, 512 MHz, 768 MHz, 1.01 GHz, 1.20 GHz
available cpufreq governors: conservative ondemand userspace performance schedutil
current policy: frequency should be within 128 MHz and 128 MHz.
The governor "schedutil" may decide which speed to use
within this range.
current CPU frequency: 128 MHz (asserted by call to hardware)
analyzing CPU 1:
driver: cpufreq-dt
CPUs which run at the same hardware frequency: 0 1
CPUs which need to have their frequency coordinated by software: 0 1
maximum transition latency: 50.0 us
hardware limits: 128 MHz - 1.20 GHz
available frequency steps: 128 MHz, 256 MHz, 512 MHz, 768 MHz, 1.01 GHz, 1.20 GHz
available cpufreq governors: conservative ondemand userspace performance schedutil
current policy: frequency should be within 128 MHz and 128 MHz.
The governor "schedutil" may decide which speed to use
within this range.
current CPU frequency: 128 MHz (asserted by call to hardware)
2) For the frequency points 128 MHz, 256 MHz, and 512 MHz, the CPU fixed
clock should be used. Fortunately, we don't encounter any freeze
problems when we attempt to change its rate at these frequencies.
3) However, for the frequency points 768 MHz, 1.01 GHz, and 1.20 GHz,
the sys_pll is used as the clock source because it's a faster option.
Now, let's imagine that we want to change the CPU clock from 768 MHz to
1.01 GHz. Unfortunately, it's not possible due to the broken sys_pll,
and any execution attempts will result in a hang.
4) As you can observe, in this case, we actually don't need to lock the
rate for the sys_pll chain. We want to change the rate instead. Hence,
I'm not aware of any other method to achieve this except by switching
the cpu_clk parent to a stable clock using clock notifier block.
Interestingly, I've noticed a similar approach in the CPU clock drivers
of Rockchip, Qualcomm, and Mediatek.
--
Thank you,
Dmitry
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* [PATCH RFT 01/10] arm64: dts: microchip: sparx5: fix mdio reg
From: Krzysztof Kozlowski @ 2024-04-01 15:37 UTC (permalink / raw)
To: Conor Dooley, Nicolas Ferre, Claudiu Beznea, Rob Herring,
Krzysztof Kozlowski, Lars Povlsen, Steen Hegelund, Daniel Machon,
UNGLinuxDriver, David S. Miller, Bjarni Jonasson,
linux-arm-kernel, devicetree, linux-kernel
Cc: Krzysztof Kozlowski
Correct the reg address of mdio node to match unit address. Assume the
reg is not correct and unit address was correct, because there is
alerady node using the existing reg 0x110102d4.
sparx5.dtsi:443.25-451.5: Warning (simple_bus_reg): /axi@600000000/mdio@6110102f8: simple-bus unit address format error, expected "6110102d4"
Fixes: d0f482bb06f9 ("arm64: dts: sparx5: Add the Sparx5 switch node")
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
---
Not tested on hardware
---
arch/arm64/boot/dts/microchip/sparx5.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/microchip/sparx5.dtsi b/arch/arm64/boot/dts/microchip/sparx5.dtsi
index 24075cd91420..5d820da8c69d 100644
--- a/arch/arm64/boot/dts/microchip/sparx5.dtsi
+++ b/arch/arm64/boot/dts/microchip/sparx5.dtsi
@@ -447,7 +447,7 @@ mdio2: mdio@6110102f8 {
pinctrl-names = "default";
#address-cells = <1>;
#size-cells = <0>;
- reg = <0x6 0x110102d4 0x24>;
+ reg = <0x6 0x110102f8 0x24>;
};
mdio3: mdio@61101031c {
--
2.34.1
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* Re: [PATCH] iommu/arm-smmu-v3: Free MSIs in case of ENOMEM
From: Jonathan Cameron @ 2024-04-01 16:40 UTC (permalink / raw)
To: Aleksandr Aprelkov
Cc: Will Deacon, Robin Murphy, Joerg Roedel, Jason Gunthorpe,
Nicolin Chen, Michael Shavit, Lu Baolu, Marc Zyngier,
linux-arm-kernel, iommu, linux-kernel
In-Reply-To: <20240329095133.576605-1-aaprelkov@usergate.com>
On Fri, 29 Mar 2024 16:51:33 +0700
Aleksandr Aprelkov <aaprelkov@usergate.com> wrote:
> If devm_add_action() returns ENOMEM, then MSIs allocated but
> not freed on teardown.
>
> Found by Linux Verification Center (linuxtesting.org) with SVACE.
>
> Fixes: 166bdbd23161 ("iommu/arm-smmu: Add support for MSI on SMMUv3")
> Signed-off-by: Aleksandr Aprelkov <aaprelkov@usergate.com>
I've not checked this is an actual bug (though it looks like one from
the context of the patch - the comment below is just about
how you fix it.
> ---
> drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 7 ++++++-
> 1 file changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> index 41f93c3ab160..136d0cdce6a9 100644
> --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> @@ -3402,7 +3402,12 @@ static void arm_smmu_setup_msis(struct arm_smmu_device *smmu)
> smmu->priq.q.irq = msi_get_virq(dev, PRIQ_MSI_INDEX);
>
> /* Add callback to free MSIs on teardown */
> - devm_add_action(dev, arm_smmu_free_msis, dev);
> + ret = devm_add_action(dev, arm_smmu_free_msis, dev);
Use devm_add_action_or_reset() which exists to solve the case of devm registration failing.
> + if (ret) {
> + dev_warn(dev, "failed to add free MSIs callback - falling back to wired irqs\n");
> + arm_smmu_free_msis(dev);
> + return;
> + }
> }
>
> static void arm_smmu_setup_unique_irqs(struct arm_smmu_device *smmu)
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* Re: [PATCH v1] Revise duty cycle for SMB9 and SMB10
From: Rob Herring @ 2024-04-01 16:36 UTC (permalink / raw)
To: Delphine CC Chiu
Cc: Krzysztof Kozlowski, linux-arm-kernel, linux-aspeed, patrick,
linux-kernel, Andrew Jeffery, Joel Stanley, Conor Dooley,
devicetree
In-Reply-To: <20240401090509.2338027-1-Delphine_CC_Chiu@Wiwynn.com>
On Mon, 01 Apr 2024 17:05:09 +0800, Delphine CC Chiu wrote:
> ARM: dts: aspeed: yosemite4:
> Revise duty cycle for SMB9 and SMB10 to 40:60
> To meet 400kHz-i2c clock low time spec (> 1.3 us).
>
> Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@Wiwynn.com>
> ---
> arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts | 2 ++
> 1 file changed, 2 insertions(+)
>
My bot found new DTB warnings on the .dts files added or changed in this
series.
Some warnings may be from an existing SoC .dtsi. Or perhaps the warnings
are fixed by another series. Ultimately, it is up to the platform
maintainer whether these warnings are acceptable or not. No need to reply
unless the platform maintainer has comments.
If you already ran DT checks and didn't see these error(s), then
make sure dt-schema is up to date:
pip3 install dtschema --upgrade
New warnings running 'make CHECK_DTBS=y aspeed/aspeed-bmc-facebook-yosemite4.dtb' for 20240401090509.2338027-1-Delphine_CC_Chiu@Wiwynn.com:
arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dtb: ahb: apb: {'compatible': ['simple-bus'], '#address-cells': [[1]], '#size-cells': [[1]], 'ranges': True, 'crypto@1e6d0000': {'compatible': ['aspeed,ast2600-hace'], 'reg': [[510459904, 512]], 'interrupts': [[0, 4, 4]], 'clocks': [[2, 9]], 'resets': [[2, 4]]}, 'syscon@1e6e2000': {'compatible': ['aspeed,ast2600-scu', 'syscon', 'simple-mfd'], 'reg': [[510533632, 4096]], 'ranges': [[0, 510533632, 4096]], '#address-cells': [[1]], '#size-cells': [[1]], '#clock-cells': [[1]], '#reset-cells': [[1]], 'phandle': [[2]], 'pinctrl': {'compatible': ['aspeed,ast2600-pinctrl'], 'phandle': [[25]], 'adc0_default': {'function': ['ADC0'], 'groups': ['ADC0'], 'phandle': [[14]]}, 'adc1_default': {'function': ['ADC1'], 'groups': ['ADC1'], 'phandle': [[15]]}, 'adc10_default': {'function': ['ADC10'], 'groups': ['ADC10']}, 'adc11_default': {'function': ['ADC11'], 'groups': ['ADC11']}, 'adc12_default': {'function': ['ADC12'], 'groups': ['ADC12']}, 'adc1
3_default': {'function': ['ADC13'], 'groups': ['ADC13']}, 'adc14_default': {'function': ['ADC14'], 'groups': ['ADC14']}, 'adc15_default': {'function': ['ADC15'], 'groups': ['ADC15']}, 'adc2_default': {'function': ['ADC2'], 'groups': ['ADC2'], 'phandle': [[16]]}, 'adc3_default': {'function': ['ADC3'], 'groups': ['ADC3'], 'phandle': [[17]]}, 'adc4_default': {'function': ['ADC4'], 'groups': ['ADC4'], 'phandle': [[18]]}, 'adc5_default': {'function': ['ADC5'], 'groups': ['ADC5'], 'phandle': [[19]]}, 'adc6_default': {'function': ['ADC6'], 'groups': ['ADC6'], 'phandle': [[20]]}, 'adc7_default': {'function': ['ADC7'], 'groups': ['ADC7'], 'phandle': [[21]]}, 'adc8_default': {'function': ['ADC8'], 'groups': ['ADC8'], 'phandle': [[22]]}, 'adc9_default': {'function': ['ADC9'], 'groups': ['ADC9'], 'phandle': [[23]]}, 'bmcint_default': {'function': ['BMCINT'], 'groups': ['BMCINT']}, 'espi_default': {'function': ['ESPI'], 'groups': ['ESPI']}, 'espialt_default': {'function': ['ESPIALT'], 'groups':
['ESPIALT']}, 'fsi1_default': {'function': ['FSI1'], 'groups': ['FSI1'], 'phandle': [[59]]}, 'fsi2_default': {'function': ['FSI2'], 'groups': ['FSI2'], 'phandle': [[60]]}, 'fwspiabr_default': {'function': ['FWSPIABR'], 'groups': ['FWSPIABR']}, 'fwspid_default': {'function': ['FWSPID'], 'groups': ['FWSPID']}, 'fwqspi_default': {'function': ['FWQSPI'], 'groups': ['FWQSPI']}, 'fwspiwp_default': {'function': ['FWSPIWP'], 'groups': ['FWSPIWP']}, 'gpit0_default': {'function': ['GPIT0'], 'groups': ['GPIT0']}, 'gpit1_default': {'function': ['GPIT1'], 'groups': ['GPIT1']}, 'gpit2_default': {'function': ['GPIT2'], 'groups': ['GPIT2']}, 'gpit3_default': {'function': ['GPIT3'], 'groups': ['GPIT3']}, 'gpit4_default': {'function': ['GPIT4'], 'groups': ['GPIT4']}, 'gpit5_default': {'function': ['GPIT5'], 'groups': ['GPIT5']}, 'gpit6_default': {'function': ['GPIT6'], 'groups': ['GPIT6']}, 'gpit7_default': {'function': ['GPIT7'], 'groups': ['GPIT7']}, 'gpiu0_default': {'function': ['GPIU0'], 'groups
': ['GPIU0']}, 'gpiu1_default': {'function': ['GPIU1'], 'groups': ['GPIU1']}, 'gpiu2_default': {'function': ['GPIU2'], 'groups': ['GPIU2']}, 'gpiu3_default': {'function': ['GPIU3'], 'groups': ['GPIU3']}, 'gpiu4_default': {'function': ['GPIU4'], 'groups': ['GPIU4']}, 'gpiu5_default': {'function': ['GPIU5'], 'groups': ['GPIU5']}, 'gpiu6_default': {'function': ['GPIU6'], 'groups': ['GPIU6']}, 'gpiu7_default': {'function': ['GPIU7'], 'groups': ['GPIU7']}, 'hvi3c3_default': {'function': ['I3C3'], 'groups': ['HVI3C3']}, 'hvi3c4_default': {'function': ['I3C4'], 'groups': ['HVI3C4']}, 'i2c1_default': {'function': ['I2C1'], 'groups': ['I2C1'], 'phandle': [[43]]}, 'i2c10_default': {'function': ['I2C10'], 'groups': ['I2C10'], 'phandle': [[52]]}, 'i2c11_default': {'function': ['I2C11'], 'groups': ['I2C11'], 'phandle': [[53]]}, 'i2c12_default': {'function': ['I2C12'], 'groups': ['I2C12'], 'phandle': [[54]]}, 'i2c13_default': {'function': ['I2C13'], 'groups': ['I2C13'], 'phandle': [[55]]}, 'i2c14
_default': {'function': ['I2C14'], 'groups': ['I2C14'], 'phandle': [[56]]}, 'i2c15_default': {'function': ['I2C15'], 'groups': ['I2C15'], 'phandle': [[57]]}, 'i2c16_default': {'function': ['I2C16'], 'groups': ['I2C16'], 'phandle': [[58]]}, 'i2c2_default': {'function': ['I2C2'], 'groups': ['I2C2'], 'phandle': [[44]]}, 'i2c3_default': {'function': ['I2C3'], 'groups': ['I2C3'], 'phandle': [[45]]}, 'i2c4_default': {'function': ['I2C4'], 'groups': ['I2C4'], 'phandle': [[46]]}, 'i2c5_default': {'function': ['I2C5'], 'groups': ['I2C5'], 'phandle': [[47]]}, 'i2c6_default': {'function': ['I2C6'], 'groups': ['I2C6'], 'phandle': [[48]]}, 'i2c7_default': {'function': ['I2C7'], 'groups': ['I2C7'], 'phandle': [[49]]}, 'i2c8_default': {'function': ['I2C8'], 'groups': ['I2C8'], 'phandle': [[50]]}, 'i2c9_default': {'function': ['I2C9'], 'groups': ['I2C9'], 'phandle': [[51]]}, 'i3c1_default': {'function': ['I3C1'], 'groups': ['I3C1']}, 'i3c2_default': {'function': ['I3C2'], 'groups': ['I3C2']}, 'i3c3
_default': {'function': ['I3C3'], 'groups': ['I3C3']}, 'i3c4_default': {'function': ['I3C4'], 'groups': ['I3C4']}, 'i3c5_default': {'function': ['I3C5'], 'groups': ['I3C5']}, 'i3c6_default': {'function': ['I3C6'], 'groups': ['I3C6']}, 'jtagm_default': {'function': ['JTAGM'], 'groups': ['JTAGM']}, 'lhpd_default': {'function': ['LHPD'], 'groups': ['LHPD']}, 'lhsirq_default': {'function': ['LHSIRQ'], 'groups': ['LHSIRQ']}, 'lpc_default': {'function': ['LPC'], 'groups': ['LPC']}, 'lpchc_default': {'function': ['LPCHC'], 'groups': ['LPCHC']}, 'lpcpd_default': {'function': ['LPCPD'], 'groups': ['LPCPD']}, 'lpcpme_default': {'function': ['LPCPME'], 'groups': ['LPCPME']}, 'lpcsmi_default': {'function': ['LPCSMI'], 'groups': ['LPCSMI']}, 'lsirq_default': {'function': ['LSIRQ'], 'groups': ['LSIRQ']}, 'maclink1_default': {'function': ['MACLINK1'], 'groups': ['MACLINK1']}, 'maclink2_default': {'function': ['MACLINK2'], 'groups': ['MACLINK2']}, 'maclink3_default': {'function': ['MACLINK3'], 'gro
ups': ['MACLINK3']}, 'maclink4_default': {'function': ['MACLINK4'], 'groups': ['MACLINK4']}, 'mdio1_default': {'function': ['MDIO1'], 'groups': ['MDIO1'], 'phandle': [[3]]}, 'mdio2_default': {'function': ['MDIO2'], 'groups': ['MDIO2'], 'phandle': [[4]]}, 'mdio3_default': {'function': ['MDIO3'], 'groups': ['MDIO3'], 'phandle': [[5]]}, 'mdio4_default': {'function': ['MDIO4'], 'groups': ['MDIO4'], 'phandle': [[6]]}, 'ncts1_default': {'function': ['NCTS1'], 'groups': ['NCTS1']}, 'ncts2_default': {'function': ['NCTS2'], 'groups': ['NCTS2']}, 'ncts3_default': {'function': ['NCTS3'], 'groups': ['NCTS3']}, 'ncts4_default': {'function': ['NCTS4'], 'groups': ['NCTS4']}, 'ndcd1_default': {'function': ['NDCD1'], 'groups': ['NDCD1']}, 'ndcd2_default': {'function': ['NDCD2'], 'groups': ['NDCD2']}, 'ndcd3_default': {'function': ['NDCD3'], 'groups': ['NDCD3']}, 'ndcd4_default': {'function': ['NDCD4'], 'groups': ['NDCD4']}, 'ndsr1_default': {'function': ['NDSR1'], 'groups': ['NDSR1']}, 'ndsr2_defaul
t': {'function': ['NDSR2'], 'groups': ['NDSR2']}, 'ndsr3_default': {'function': ['NDSR3'], 'groups': ['NDSR3']}, 'ndsr4_default': {'function': ['NDSR4'], 'groups': ['NDSR4']}, 'ndtr1_default': {'function': ['NDTR1'], 'groups': ['NDTR1']}, 'ndtr2_default': {'function': ['NDTR2'], 'groups': ['NDTR2']}, 'ndtr3_default': {'function': ['NDTR3'], 'groups': ['NDTR3']}, 'ndtr4_default': {'function': ['NDTR4'], 'groups': ['NDTR4']}, 'nri1_default': {'function': ['NRI1'], 'groups': ['NRI1']}, 'nri2_default': {'function': ['NRI2'], 'groups': ['NRI2']}, 'nri3_default': {'function': ['NRI3'], 'groups': ['NRI3']}, 'nri4_default': {'function': ['NRI4'], 'groups': ['NRI4']}, 'nrts1_default': {'function': ['NRTS1'], 'groups': ['NRTS1']}, 'nrts2_default': {'function': ['NRTS2'], 'groups': ['NRTS2']}, 'nrts3_default': {'function': ['NRTS3'], 'groups': ['NRTS3']}, 'nrts4_default': {'function': ['NRTS4'], 'groups': ['NRTS4']}, 'oscclk_default': {'function': ['OSCCLK'], 'groups': ['OSCCLK']}, 'pewake_def
ault': {'function': ['PEWAKE'], 'groups': ['PEWAKE']}, 'pwm0_default': {'function': ['PWM0'], 'groups': ['PWM0']}, 'pwm1_default': {'function': ['PWM1'], 'groups': ['PWM1']}, 'pwm10g0_default': {'function': ['PWM10'], 'groups': ['PWM10G0']}, 'pwm10g1_default': {'function': ['PWM10'], 'groups': ['PWM10G1']}, 'pwm11g0_default': {'function': ['PWM11'], 'groups': ['PWM11G0']}, 'pwm11g1_default': {'function': ['PWM11'], 'groups': ['PWM11G1']}, 'pwm12g0_default': {'function': ['PWM12'], 'groups': ['PWM12G0']}, 'pwm12g1_default': {'function': ['PWM12'], 'groups': ['PWM12G1']}, 'pwm13g0_default': {'function': ['PWM13'], 'groups': ['PWM13G0']}, 'pwm13g1_default': {'function': ['PWM13'], 'groups': ['PWM13G1']}, 'pwm14g0_default': {'function': ['PWM14'], 'groups': ['PWM14G0']}, 'pwm14g1_default': {'function': ['PWM14'], 'groups': ['PWM14G1']}, 'pwm15g0_default': {'function': ['PWM15'], 'groups': ['PWM15G0']}, 'pwm15g1_default': {'function': ['PWM15'], 'groups': ['PWM15G1']}, 'pwm2_default': {'
function': ['PWM2'], 'groups': ['PWM2']}, 'pwm3_default': {'function': ['PWM3'], 'groups': ['PWM3']}, 'pwm4_default': {'function': ['PWM4'], 'groups': ['PWM4']}, 'pwm5_default': {'function': ['PWM5'], 'groups': ['PWM5']}, 'pwm6_default': {'function': ['PWM6'], 'groups': ['PWM6']}, 'pwm7_default': {'function': ['PWM7'], 'groups': ['PWM7']}, 'pwm8g0_default': {'function': ['PWM8'], 'groups': ['PWM8G0']}, 'pwm8g1_default': {'function': ['PWM8'], 'groups': ['PWM8G1']}, 'pwm9g0_default': {'function': ['PWM9'], 'groups': ['PWM9G0']}, 'pwm9g1_default': {'function': ['PWM9'], 'groups': ['PWM9G1']}, 'qspi1_default': {'function': ['SPI1'], 'groups': ['QSPI1']}, 'qspi2_default': {'function': ['SPI2'], 'groups': ['QSPI2']}, 'rgmii1_default': {'function': ['RGMII1'], 'groups': ['RGMII1']}, 'rgmii2_default': {'function': ['RGMII2'], 'groups': ['RGMII2']}, 'rgmii3_default': {'function': ['RGMII3'], 'groups': ['RGMII3']}, 'rgmii4_default': {'function': ['RGMII4'], 'groups': ['RGMII4']}, 'rmii1_defa
ult': {'function': ['RMII1'], 'groups': ['RMII1']}, 'rmii2_default': {'function': ['RMII2'], 'groups': ['RMII2']}, 'rmii3_default': {'function': ['RMII3'], 'groups': ['RMII3'], 'phandle': [[7]]}, 'rmii4_default': {'function': ['RMII4'], 'groups': ['RMII4'], 'phandle': [[8]]}, 'rxd1_default': {'function': ['RXD1'], 'groups': ['RXD1'], 'phandle': [[30]]}, 'rxd2_default': {'function': ['RXD2'], 'groups': ['RXD2'], 'phandle': [[34]]}, 'rxd3_default': {'function': ['RXD3'], 'groups': ['RXD3'], 'phandle': [[36]]}, 'rxd4_default': {'function': ['RXD4'], 'groups': ['RXD4'], 'phandle': [[38]]}, 'salt1_default': {'function': ['SALT1'], 'groups': ['SALT1']}, 'salt10g0_default': {'function': ['SALT10'], 'groups': ['SALT10G0']}, 'salt10g1_default': {'function': ['SALT10'], 'groups': ['SALT10G1']}, 'salt11g0_default': {'function': ['SALT11'], 'groups': ['SALT11G0']}, 'salt11g1_default': {'function': ['SALT11'], 'groups': ['SALT11G1']}, 'salt12g0_default': {'function': ['SALT12'], 'groups': ['SALT
12G0']}, 'salt12g1_default': {'function': ['SALT12'], 'groups': ['SALT12G1']}, 'salt13g0_default': {'function': ['SALT13'], 'groups': ['SALT13G0']}, 'salt13g1_default': {'function': ['SALT13'], 'groups': ['SALT13G1']}, 'salt14g0_default': {'function': ['SALT14'], 'groups': ['SALT14G0']}, 'salt14g1_default': {'function': ['SALT14'], 'groups': ['SALT14G1']}, 'salt15g0_default': {'function': ['SALT15'], 'groups': ['SALT15G0']}, 'salt15g1_default': {'function': ['SALT15'], 'groups': ['SALT15G1']}, 'salt16g0_default': {'function': ['SALT16'], 'groups': ['SALT16G0']}, 'salt16g1_default': {'function': ['SALT16'], 'groups': ['SALT16G1']}, 'salt2_default': {'function': ['SALT2'], 'groups': ['SALT2']}, 'salt3_default': {'function': ['SALT3'], 'groups': ['SALT3']}, 'salt4_default': {'function': ['SALT4'], 'groups': ['SALT4']}, 'salt5_default': {'function': ['SALT5'], 'groups': ['SALT5']}, 'salt6_default': {'function': ['SALT6'], 'groups': ['SALT6']}, 'salt7_default': {'function': ['SALT7'], 'g
roups': ['SALT7']}, 'salt8_default': {'function': ['SALT8'], 'groups': ['SALT8']}, 'salt9g0_default': {'function': ['SALT9'], 'groups': ['SALT9G0']}, 'salt9g1_default': {'function': ['SALT9'], 'groups': ['SALT9G1']}, 'sd1_default': {'function': ['SD1'], 'groups': ['SD1']}, 'sd2_default': {'function': ['SD2'], 'groups': ['SD2']}, 'emmc_default': {'function': ['EMMC'], 'groups': ['EMMCG4'], 'phandle': [[32]]}, 'sgpm1_default': {'function': ['SGPM1'], 'groups': ['SGPM1'], 'phandle': [[26]]}, 'sgpm2_default': {'function': ['SGPM2'], 'groups': ['SGPM2'], 'phandle': [[27]]}, 'sgps1_default': {'function': ['SGPS1'], 'groups': ['SGPS1']}, 'sgps2_default': {'function': ['SGPS2'], 'groups': ['SGPS2']}, 'sioonctrl_default': {'function': ['SIOONCTRL'], 'groups': ['SIOONCTRL']}, 'siopbi_default': {'function': ['SIOPBI'], 'groups': ['SIOPBI']}, 'siopbo_default': {'function': ['SIOPBO'], 'groups': ['SIOPBO']}, 'siopwreq_default': {'function': ['SIOPWREQ'], 'groups': ['SIOPWREQ']}, 'siopwrgd_defaul
t': {'function': ['SIOPWRGD'], 'groups': ['SIOPWRGD']}, 'sios3_default': {'function': ['SIOS3'], 'groups': ['SIOS3']}, 'sios5_default': {'function': ['SIOS5'], 'groups': ['SIOS5']}, 'siosci_default': {'function': ['SIOSCI'], 'groups': ['SIOSCI']}, 'spi1_default': {'function': ['SPI1'], 'groups': ['SPI1']}, 'spi1abr_default': {'function': ['SPI1ABR'], 'groups': ['SPI1ABR']}, 'spi1cs1_default': {'function': ['SPI1CS1'], 'groups': ['SPI1CS1']}, 'spi1wp_default': {'function': ['SPI1WP'], 'groups': ['SPI1WP']}, 'spi2_default': {'function': ['SPI2'], 'groups': ['SPI2']}, 'spi2cs1_default': {'function': ['SPI2CS1'], 'groups': ['SPI2CS1']}, 'spi2cs2_default': {'function': ['SPI2CS2'], 'groups': ['SPI2CS2']}, 'tach0_default': {'function': ['TACH0'], 'groups': ['TACH0']}, 'tach1_default': {'function': ['TACH1'], 'groups': ['TACH1']}, 'tach10_default': {'function': ['TACH10'], 'groups': ['TACH10']}, 'tach11_default': {'function': ['TACH11'], 'groups': ['TACH11']}, 'tach12_default': {'function'
: ['TACH12'], 'groups': ['TACH12']}, 'tach13_default': {'function': ['TACH13'], 'groups': ['TACH13']}, 'tach14_default': {'function': ['TACH14'], 'groups': ['TACH14']}, 'tach15_default': {'function': ['TACH15'], 'groups': ['TACH15']}, 'tach2_default': {'function': ['TACH2'], 'groups': ['TACH2']}, 'tach3_default': {'function': ['TACH3'], 'groups': ['TACH3']}, 'tach4_default': {'function': ['TACH4'], 'groups': ['TACH4']}, 'tach5_default': {'function': ['TACH5'], 'groups': ['TACH5']}, 'tach6_default': {'function': ['TACH6'], 'groups': ['TACH6']}, 'tach7_default': {'function': ['TACH7'], 'groups': ['TACH7']}, 'tach8_default': {'function': ['TACH8'], 'groups': ['TACH8']}, 'tach9_default': {'function': ['TACH9'], 'groups': ['TACH9']}, 'thru0_default': {'function': ['THRU0'], 'groups': ['THRU0']}, 'thru1_default': {'function': ['THRU1'], 'groups': ['THRU1']}, 'thru2_default': {'function': ['THRU2'], 'groups': ['THRU2']}, 'thru3_default': {'function': ['THRU3'], 'groups': ['THRU3']}, 'txd1_
default': {'function': ['TXD1'], 'groups': ['TXD1'], 'phandle': [[29]]}, 'txd2_default': {'function': ['TXD2'], 'groups': ['TXD2'], 'phandle': [[33]]}, 'txd3_default': {'function': ['TXD3'], 'groups': ['TXD3'], 'phandle': [[35]]}, 'txd4_default': {'function': ['TXD4'], 'groups': ['TXD4'], 'phandle': [[37]]}, 'uart10_default': {'function': ['UART10'], 'groups': ['UART10']}, 'uart11_default': {'function': ['UART11'], 'groups': ['UART11']}, 'uart12g0_default': {'function': ['UART12'], 'groups': ['UART12G0']}, 'uart12g1_default': {'function': ['UART12'], 'groups': ['UART12G1']}, 'uart13g0_default': {'function': ['UART13'], 'groups': ['UART13G0']}, 'uart13g1_default': {'function': ['UART13'], 'groups': ['UART13G1']}, 'uart6_default': {'function': ['UART6'], 'groups': ['UART6'], 'phandle': [[39]]}, 'uart7_default': {'function': ['UART7'], 'groups': ['UART7'], 'phandle': [[40]]}, 'uart8_default': {'function': ['UART8'], 'groups': ['UART8'], 'phandle': [[41]]}, 'uart9_default': {'function':
['UART9'], 'groups': ['UART9'], 'phandle': [[42]]}, 'usb2ah_default': {'function': ['USB2AH'], 'groups': ['USBA'], 'phandle': [[9]]}, 'usb2ad_default': {'function': ['USB2AD'], 'groups': ['USBA'], 'phandle': [[11]]}, 'usb2bh_default': {'function': ['USB2BH'], 'groups': ['USBB'], 'phandle': [[10]]}, 'usb2bd_default': {'function': ['USB2BD'], 'groups': ['USBB'], 'phandle': [[12]]}, 'usb11bhid_default': {'function': ['USB11BHID'], 'groups': ['USBB']}, 'vb_default': {'function': ['VB'], 'groups': ['VB']}, 'vgahs_default': {'function': ['VGAHS'], 'groups': ['VGAHS']}, 'vgavs_default': {'function': ['VGAVS'], 'groups': ['VGAVS']}, 'wdtrst1_default': {'function': ['WDTRST1'], 'groups': ['WDTRST1'], 'phandle': [[31]]}, 'wdtrst2_default': {'function': ['WDTRST2'], 'groups': ['WDTRST2']}, 'wdtrst3_default': {'function': ['WDTRST3'], 'groups': ['WDTRST3']}, 'wdtrst4_default': {'function': ['WDTRST4'], 'groups': ['WDTRST4']}}, 'silicon-id@14': {'compatible': ['aspeed,ast2600-silicon-id', 'aspe
ed,silicon-id'], 'reg': [[20, 4], [1456, 8]]}, 'smp-memram@180': {'compatible': ['aspeed,ast2600-smpmem'], 'reg': [[384, 64]]}, 'interrupt-controller@560': {'#interrupt-cells': [[1]], 'compatible': ['aspeed,ast2600-scu-ic0'], 'reg': [[1376, 4]], 'interrupts': [[0, 12, 4]], 'interrupt-controller': True, 'phandle': [[13]]}, 'interrupt-controller@570': {'#interrupt-cells': [[1]], 'compatible': ['aspeed,ast2600-scu-ic1'], 'reg': [[1392, 4]], 'interrupts': [[0, 41, 4]], 'interrupt-controller': True}}, 'hwrng@1e6e2524': {'compatible': ['timeriomem_rng'], 'reg': [[510534948, 4]], 'period': [[1]], 'quality': [[100]]}, 'display@1e6e6000': {'compatible': ['aspeed,ast2600-gfx', 'syscon'], 'reg': [[510550016, 4096]], 'reg-io-width': [[4]], 'clocks': [[2, 8]], 'resets': [[2, 26]], 'syscon': [[2]], 'status': ['disabled'], 'interrupts': [[0, 14, 4]]}, 'xdma@1e6e7000': {'compatible': ['aspeed,ast2600-xdma'], 'reg': [[510554112, 256]], 'clocks': [[2, 4]], 'resets': [[2, 25], [2, 27]], 'reset-names':
['device', 'root-complex'], 'interrupts-extended': [[1, 0, 6, 4], [13, 2]], 'aspeed,pcie-device': ['bmc'], 'aspeed,scu': [[2]], 'status': ['disabled']}, 'adc@1e6e9000': {'compatible': ['aspeed,ast2600-adc0'], 'reg': [[510562304, 256]], 'clocks': [[2, 53]], 'resets': [[2, 55]], 'interrupts': [[0, 46, 4]], '#io-channel-cells': [[1]], 'status': ['okay'], 'ref_voltage': [[2500]], 'pinctrl-0': [[14, 15, 16, 17, 18, 19, 20, 21]], 'phandle': [[61]]}, 'adc@1e6e9100': {'compatible': ['aspeed,ast2600-adc1'], 'reg': [[510562560, 256]], 'clocks': [[2, 53]], 'resets': [[2, 55]], 'interrupts': [[0, 46, 4]], '#io-channel-cells': [[1]], 'status': ['okay'], 'ref_voltage': [[2500]], 'pinctrl-0': [[22, 23]], 'phandle': [[62]]}, 'secure-boot-controller@1e6f2000': {'compatible': ['aspeed,ast2600-sbc'], 'reg': [[510599168, 4096]]}, 'crypto@1e6fa000': {'compatible': ['aspeed,ast2600-acry'], 'reg': [[510631936, 1024], [510722048, 6144]], 'interrupts': [[0, 160, 4]], 'clocks': [[2, 16]], 'aspeed,ahbc': [[2
4]]}, 'video@1e700000': {'compatible': ['aspeed,ast2600-video-engine'], 'reg': [[510656512, 4096]], 'clocks': [[2, 3], [2, 0]], 'clock-names': ['vclk', 'eclk'], 'interrupts': [[0, 7, 4]], 'status': ['disabled']}, 'gpio@1e780000': {'#gpio-cells': [[2]], 'gpio-controller': True, 'compatible': ['aspeed,ast2600-gpio'], 'reg': [[511180800, 1024]], 'interrupts': [[0, 40, 4]], 'gpio-ranges': [[25, 0, 0, 208]], 'ngpios': [[208]], 'clocks': [[2, 53]], 'interrupt-controller': True, '#interrupt-cells': [[2]]}, 'sgpiom@1e780500': {'#gpio-cells': [[2]], 'gpio-controller': True, 'compatible': ['aspeed,ast2600-sgpiom'], 'reg': [[511182080, 256]], 'interrupts': [[0, 51, 4]], 'clocks': [[2, 53]], '#interrupt-cells': [[2]], 'interrupt-controller': True, 'bus-frequency': [[12000000]], 'pinctrl-names': ['default'], 'pinctrl-0': [[26]], 'status': ['disabled']}, 'sgpiom@1e780600': {'#gpio-cells': [[2]], 'gpio-controller': True, 'compatible': ['aspeed,ast2600-sgpiom'], 'reg': [[511182336, 256]], 'interrup
ts': [[0, 70, 4]], 'clocks': [[2, 53]], '#interrupt-cells': [[2]], 'interrupt-controller': True, 'bus-frequency': [[12000000]], 'pinctrl-names': ['default'], 'pinctrl-0': [[27]], 'status': ['disabled']}, 'gpio@1e780800': {'#gpio-cells': [[2]], 'gpio-controller': True, 'compatible': ['aspeed,ast2600-gpio'], 'reg': [[511182848, 2048]], 'interrupts': [[0, 11, 4]], 'gpio-ranges': [[25, 0, 208, 36]], 'ngpios': [[36]], 'clocks': [[2, 52]], 'interrupt-controller': True, '#interrupt-cells': [[2]]}, 'rtc@1e781000': {'compatible': ['aspeed,ast2600-rtc'], 'reg': [[511184896, 24]], 'interrupts': [[0, 13, 4]], 'status': ['disabled']}, 'timer@1e782000': {'compatible': ['aspeed,ast2600-timer'], 'reg': [[511188992, 144]], 'interrupts-extended': [[1, 0, 16, 4], [1, 0, 17, 4], [1, 0, 18, 4], [1, 0, 19, 4], [1, 0, 20, 4], [1, 0, 21, 4], [1, 0, 22, 4], [1, 0, 23, 4]], 'clocks': [[2, 52]], 'clock-names': ['PCLK'], 'status': ['disabled']}, 'serial@1e783000': {'compatible': ['ns16550a'], 'reg': [[51119308
8, 32]], 'reg-shift': [[2]], 'reg-io-width': [[4]], 'interrupts': [[0, 47, 4]], 'clocks': [[2, 22]], 'resets': [[28, 4]], 'no-loopback-test': True, 'pinctrl-names': ['default'], 'pinctrl-0': [[29, 30]], 'status': ['okay']}, 'serial@1e784000': {'compatible': ['ns16550a'], 'reg': [[511197184, 4096]], 'reg-shift': [[2]], 'interrupts': [[0, 8, 4]], 'clocks': [[2, 26]], 'no-loopback-test': True, 'status': ['okay']}, 'watchdog@1e785000': {'compatible': ['aspeed,ast2600-wdt'], 'reg': [[511201280, 64]], 'status': ['okay'], 'pinctrl-names': ['default'], 'pinctrl-0': [[31]], 'aspeed,reset-type': ['soc'], 'aspeed,external-signal': True, 'aspeed,ext-push-pull': True, 'aspeed,ext-active-high': True, 'aspeed,ext-pulse-duration': [[256]]}, 'watchdog@1e785040': {'compatible': ['aspeed,ast2600-wdt'], 'reg': [[511201344, 64]], 'status': ['disabled']}, 'watchdog@1e785080': {'compatible': ['aspeed,ast2600-wdt'], 'reg': [[511201408, 64]], 'status': ['disabled']}, 'watchdog@1e7850c0': {'compatible': ['as
peed,ast2600-wdt'], 'reg': [[511201472, 64]], 'status': ['disabled']}, 'peci-controller@1e78b000': {'compatible': ['aspeed,ast2600-peci'], 'reg': [[511225856, 256]], 'interrupts': [[0, 38, 4]], 'clocks': [[2, 10]], 'resets': [[2, 36]], 'cmd-timeout-ms': [[1000]], 'clock-frequency': [[1000000]], 'status': ['disabled']}, 'lpc@1e789000': {'compatible': ['aspeed,ast2600-lpc-v2', 'simple-mfd', 'syscon'], 'reg': [[511217664, 4096]], 'reg-io-width': [[4]], '#address-cells': [[1]], '#size-cells': [[1]], 'ranges': [[0, 511217664, 4096]], 'kcs@24': {'compatible': ['aspeed,ast2500-kcs-bmc-v2'], 'reg': [[36, 1], [48, 1], [60, 1]], 'interrupts': [[0, 138, 4]], 'clocks': [[2, 6]], 'kcs_chan': [[1]], 'status': ['disabled']}, 'kcs@28': {'compatible': ['aspeed,ast2500-kcs-bmc-v2'], 'reg': [[40, 1], [52, 1], [64, 1]], 'interrupts': [[0, 139, 4]], 'clocks': [[2, 6]], 'status': ['disabled']}, 'kcs@2c': {'compatible': ['aspeed,ast2500-kcs-bmc-v2'], 'reg': [[44, 1], [56, 1], [68, 1]], 'interrupts': [[0,
140, 4]], 'clocks': [[2, 6]], 'status': ['disabled']}, 'kcs@114': {'compatible': ['aspeed,ast2500-kcs-bmc-v2'], 'reg': [[276, 1], [280, 1], [284, 1]], 'interrupts': [[0, 141, 4]], 'clocks': [[2, 6]], 'status': ['disabled']}, 'lpc-ctrl@80': {'compatible': ['aspeed,ast2600-lpc-ctrl'], 'reg': [[128, 128]], 'clocks': [[2, 6]], 'status': ['disabled']}, 'lpc-snoop@80': {'compatible': ['aspeed,ast2600-lpc-snoop'], 'reg': [[128, 128]], 'interrupts': [[0, 144, 4]], 'clocks': [[2, 6]], 'status': ['disabled']}, 'lhc@a0': {'compatible': ['aspeed,ast2600-lhc'], 'reg': [[160, 36], [200, 8]]}, 'reset-controller@98': {'compatible': ['aspeed,ast2600-lpc-reset'], 'reg': [[152, 4]], '#reset-cells': [[1]], 'phandle': [[28]]}, 'uart-routing@98': {'compatible': ['aspeed,ast2600-uart-routing'], 'reg': [[152, 8]], 'status': ['disabled']}, 'ibt@140': {'compatible': ['aspeed,ast2600-ibt-bmc'], 'reg': [[320, 24]], 'interrupts': [[0, 143, 4]], 'clocks': [[2, 6]], 'status': ['disabled']}}, 'sdc@1e740000': {'com
patible': ['aspeed,ast2600-sd-controller'], 'reg': [[510918656, 256]], '#address-cells': [[1]], '#size-cells': [[1]], 'ranges': [[0, 510918656, 65536]], 'clocks': [[2, 35]], 'status': ['disabled'], 'sdhci@1e740100': {'compatible': ['aspeed,ast2600-sdhci', 'sdhci'], 'reg': [[256, 256]], 'interrupts': [[0, 43, 4]], 'sdhci,auto-cmd12': True, 'clocks': [[2, 60]], 'status': ['disabled']}, 'sdhci@1e740200': {'compatible': ['aspeed,ast2600-sdhci', 'sdhci'], 'reg': [[512, 256]], 'interrupts': [[0, 43, 4]], 'sdhci,auto-cmd12': True, 'clocks': [[2, 60]], 'status': ['disabled']}}, 'sdc@1e750000': {'compatible': ['aspeed,ast2600-sd-controller'], 'reg': [[510984192, 256]], '#address-cells': [[1]], '#size-cells': [[1]], 'ranges': [[0, 510984192, 65536]], 'clocks': [[2, 36]], 'status': ['disabled'], 'sdhci@1e750100': {'compatible': ['aspeed,ast2600-sdhci'], 'reg': [[256, 256]], 'sdhci,auto-cmd12': True, 'interrupts': [[0, 15, 4]], 'clocks': [[2, 61]], 'pinctrl-names': ['default'], 'pinctrl-0': [[3
2]]}}, 'serial@1e787000': {'compatible': ['aspeed,ast2500-vuart'], 'reg': [[511209472, 64]], 'reg-shift': [[2]], 'interrupts': [[0, 147, 4]], 'clocks': [[2, 52]], 'no-loopback-test': True, 'status': ['disabled']}, 'serial@1e787800': {'compatible': ['aspeed,ast2500-vuart'], 'reg': [[511211520, 64]], 'reg-shift': [[2]], 'interrupts': [[0, 180, 4]], 'clocks': [[2, 53]], 'no-loopback-test': True, 'status': ['disabled']}, 'serial@1e788000': {'compatible': ['aspeed,ast2500-vuart'], 'reg': [[511213568, 64]], 'reg-shift': [[2]], 'interrupts': [[0, 148, 4]], 'clocks': [[2, 52]], 'no-loopback-test': True, 'status': ['disabled']}, 'serial@1e788800': {'compatible': ['aspeed,ast2500-vuart'], 'reg': [[511215616, 64]], 'reg-shift': [[2]], 'interrupts': [[0, 181, 4]], 'clocks': [[2, 53]], 'no-loopback-test': True, 'status': ['disabled']}, 'serial@1e78d000': {'compatible': ['ns16550a'], 'reg': [[511234048, 32]], 'reg-shift': [[2]], 'reg-io-width': [[4]], 'interrupts': [[0, 48, 4]], 'clocks': [[2, 23
]], 'resets': [[28, 5]], 'no-loopback-test': True, 'pinctrl-names': ['default'], 'pinctrl-0': [[33, 34]], 'status': ['okay']}, 'serial@1e78e000': {'compatible': ['ns16550a'], 'reg': [[511238144, 32]], 'reg-shift': [[2]], 'reg-io-width': [[4]], 'interrupts': [[0, 49, 4]], 'clocks': [[2, 24]], 'resets': [[28, 6]], 'no-loopback-test': True, 'pinctrl-names': ['default'], 'pinctrl-0': [[35, 36]], 'status': ['okay']}, 'serial@1e78f000': {'compatible': ['ns16550a'], 'reg': [[511242240, 32]], 'reg-shift': [[2]], 'reg-io-width': [[4]], 'interrupts': [[0, 50, 4]], 'clocks': [[2, 25]], 'resets': [[28, 7]], 'no-loopback-test': True, 'pinctrl-names': ['default'], 'pinctrl-0': [[37, 38]], 'status': ['okay']}, 'serial@1e790000': {'compatible': ['ns16550a'], 'reg': [[511246336, 32]], 'reg-shift': [[2]], 'reg-io-width': [[4]], 'interrupts': [[0, 57, 4]], 'clocks': [[2, 27]], 'no-loopback-test': True, 'pinctrl-names': ['default'], 'pinctrl-0': [[39]], 'status': ['okay']}, 'serial@1e790100': {'compati
ble': ['ns16550a'], 'reg': [[511246592, 32]], 'reg-shift': [[2]], 'reg-io-width': [[4]], 'interrupts': [[0, 58, 4]], 'clocks': [[2, 28]], 'no-loopback-test': True, 'pinctrl-names': ['default'], 'pinctrl-0': [[40]], 'status': ['okay']}, 'serial@1e790200': {'compatible': ['ns16550a'], 'reg': [[511246848, 32]], 'reg-shift': [[2]], 'reg-io-width': [[4]], 'interrupts': [[0, 59, 4]], 'clocks': [[2, 29]], 'no-loopback-test': True, 'pinctrl-names': ['default'], 'pinctrl-0': [[41]], 'status': ['okay']}, 'serial@1e790300': {'compatible': ['ns16550a'], 'reg': [[511247104, 32]], 'reg-shift': [[2]], 'reg-io-width': [[4]], 'interrupts': [[0, 60, 4]], 'clocks': [[2, 30]], 'no-loopback-test': True, 'pinctrl-names': ['default'], 'pinctrl-0': [[42]], 'status': ['okay']}, 'bus@1e78a000': {'compatible': ['simple-bus'], '#address-cells': [[1]], '#size-cells': [[1]], 'ranges': [[0, 511221760, 4096]], 'i2c-bus@80': {'#address-cells': [[1]], '#size-cells': [[0]], 'reg': [[128, 128]], 'compatible': ['aspeed
,ast2600-i2c-bus'], 'clocks': [[2, 53]], 'resets': [[2, 34]], 'interrupts': [[0, 110, 4]], 'bus-frequency': [[400000]], 'pinctrl-names': ['default'], 'pinctrl-0': [[43]], 'status': ['okay'], 'mctp-controller': True, 'multi-master': True, 'mctp@10': {'compatible': ['mctp-i2c-controller'], 'reg': [[1073741840]]}, 'power-sensor@40': {'compatible': ['adi,adm1278'], 'reg': [[64]]}}, 'i2c-bus@100': {'#address-cells': [[1]], '#size-cells': [[0]], 'reg': [[256, 128]], 'compatible': ['aspeed,ast2600-i2c-bus'], 'clocks': [[2, 53]], 'resets': [[2, 34]], 'interrupts': [[0, 111, 4]], 'bus-frequency': [[400000]], 'pinctrl-names': ['default'], 'pinctrl-0': [[44]], 'status': ['okay'], 'mctp-controller': True, 'multi-master': True, 'mctp@10': {'compatible': ['mctp-i2c-controller'], 'reg': [[1073741840]]}, 'power-sensor@40': {'compatible': ['adi,adm1278'], 'reg': [[64]]}}, 'i2c-bus@180': {'#address-cells': [[1]], '#size-cells': [[0]], 'reg': [[384, 128]], 'compatible': ['aspeed,ast2600-i2c-bus'], 'cl
ocks': [[2, 53]], 'resets': [[2, 34]], 'interrupts': [[0, 112, 4]], 'bus-frequency': [[400000]], 'pinctrl-names': ['default'], 'pinctrl-0': [[45]], 'status': ['okay'], 'mctp-controller': True, 'multi-master': True, 'mctp@10': {'compatible': ['mctp-i2c-controller'], 'reg': [[1073741840]]}, 'power-sensor@40': {'compatible': ['adi,adm1278'], 'reg': [[64]]}}, 'i2c-bus@200': {'#address-cells': [[1]], '#size-cells': [[0]], 'reg': [[512, 128]], 'compatible': ['aspeed,ast2600-i2c-bus'], 'clocks': [[2, 53]], 'resets': [[2, 34]], 'interrupts': [[0, 113, 4]], 'bus-frequency': [[400000]], 'pinctrl-names': ['default'], 'pinctrl-0': [[46]], 'status': ['okay'], 'mctp-controller': True, 'multi-master': True, 'mctp@10': {'compatible': ['mctp-i2c-controller'], 'reg': [[1073741840]]}, 'power-sensor@40': {'compatible': ['adi,adm1278'], 'reg': [[64]]}}, 'i2c-bus@280': {'#address-cells': [[1]], '#size-cells': [[0]], 'reg': [[640, 128]], 'compatible': ['aspeed,ast2600-i2c-bus'], 'clocks': [[2, 53]], 'rese
ts': [[2, 34]], 'interrupts': [[0, 114, 4]], 'bus-frequency': [[400000]], 'pinctrl-names': ['default'], 'pinctrl-0': [[47]], 'status': ['okay'], 'mctp-controller': True, 'multi-master': True, 'mctp@10': {'compatible': ['mctp-i2c-controller'], 'reg': [[1073741840]]}, 'power-sensor@40': {'compatible': ['adi,adm1278'], 'reg': [[64]]}}, 'i2c-bus@300': {'#address-cells': [[1]], '#size-cells': [[0]], 'reg': [[768, 128]], 'compatible': ['aspeed,ast2600-i2c-bus'], 'clocks': [[2, 53]], 'resets': [[2, 34]], 'interrupts': [[0, 115, 4]], 'bus-frequency': [[400000]], 'pinctrl-names': ['default'], 'pinctrl-0': [[48]], 'status': ['okay'], 'mctp-controller': True, 'multi-master': True, 'mctp@10': {'compatible': ['mctp-i2c-controller'], 'reg': [[1073741840]]}, 'power-sensor@40': {'compatible': ['adi,adm1278'], 'reg': [[64]]}}, 'i2c-bus@380': {'#address-cells': [[1]], '#size-cells': [[0]], 'reg': [[896, 128]], 'compatible': ['aspeed,ast2600-i2c-bus'], 'clocks': [[2, 53]], 'resets': [[2, 34]], 'interr
upts': [[0, 116, 4]], 'bus-frequency': [[400000]], 'pinctrl-names': ['default'], 'pinctrl-0': [[49]], 'status': ['okay'], 'mctp-controller': True, 'multi-master': True, 'mctp@10': {'compatible': ['mctp-i2c-controller'], 'reg': [[1073741840]]}, 'power-sensor@40': {'compatible': ['adi,adm1278'], 'reg': [[64]]}}, 'i2c-bus@400': {'#address-cells': [[1]], '#size-cells': [[0]], 'reg': [[1024, 128]], 'compatible': ['aspeed,ast2600-i2c-bus'], 'clocks': [[2, 53]], 'resets': [[2, 34]], 'interrupts': [[0, 117, 4]], 'bus-frequency': [[400000]], 'pinctrl-names': ['default'], 'pinctrl-0': [[50]], 'status': ['okay'], 'mctp-controller': True, 'multi-master': True, 'mctp@10': {'compatible': ['mctp-i2c-controller'], 'reg': [[1073741840]]}, 'power-sensor@40': {'compatible': ['adi,adm1278'], 'reg': [[64]]}}, 'i2c-bus@480': {'#address-cells': [[1]], '#size-cells': [[0]], 'reg': [[1152, 128]], 'compatible': ['aspeed,ast2600-i2c-bus'], 'clocks': [[2, 53]], 'resets': [[2, 34]], 'interrupts': [[0, 118, 4]],
'bus-frequency': [[400000]], 'pinctrl-names': ['default'], 'pinctrl-0': [[51]], 'status': ['okay'], 'i2c-clk-high-min-percent': [[40]], 'i2c-mux@70': {'compatible': ['nxp,pca9544'], 'idle-state': [[0]], 'i2c-mux-idle-disconnect': True, 'reg': [[112]]}}, 'i2c-bus@500': {'#address-cells': [[1]], '#size-cells': [[0]], 'reg': [[1280, 128]], 'compatible': ['aspeed,ast2600-i2c-bus'], 'clocks': [[2, 53]], 'resets': [[2, 34]], 'interrupts': [[0, 119, 4]], 'bus-frequency': [[400000]], 'pinctrl-names': ['default'], 'pinctrl-0': [[52]], 'status': ['okay'], 'i2c-clk-high-min-percent': [[40]], 'i2c-mux@71': {'compatible': ['nxp,pca9544'], 'idle-state': [[0]], 'i2c-mux-idle-disconnect': True, 'reg': [[113]]}}, 'i2c-bus@580': {'#address-cells': [[1]], '#size-cells': [[0]], 'reg': [[1408, 128]], 'compatible': ['aspeed,ast2600-i2c-bus'], 'clocks': [[2, 53]], 'resets': [[2, 34]], 'interrupts': [[0, 120, 4]], 'bus-frequency': [[400000]], 'pinctrl-names': ['default'], 'pinctrl-0': [[53]], 'status': ['
okay']}, 'i2c-bus@600': {'#address-cells': [[1]], '#size-cells': [[0]], 'reg': [[1536, 128]], 'compatible': ['aspeed,ast2600-i2c-bus'], 'clocks': [[2, 53]], 'resets': [[2, 34]], 'interrupts': [[0, 121, 4]], 'bus-frequency': [[100000]], 'pinctrl-names': ['default'], 'pinctrl-0': [[54]], 'status': ['okay'], 'power-sensor@10': {'compatible': ['adi, adm1272'], 'reg': [[16]]}, 'power-sensor@12': {'compatible': ['adi, adm1272'], 'reg': [[18]]}, 'gpio@20': {'compatible': ['nxp,pca9555'], 'reg': [[32]], 'gpio-controller': True, '#gpio-cells': [[2]]}, 'gpio@21': {'compatible': ['nxp,pca9555'], 'reg': [[33]], 'gpio-controller': True, '#gpio-cells': [[2]]}, 'gpio@22': {'compatible': ['nxp,pca9555'], 'reg': [[34]], 'gpio-controller': True, '#gpio-cells': [[2]]}, 'gpio@23': {'compatible': ['nxp,pca9555'], 'reg': [[35]], 'gpio-controller': True, '#gpio-cells': [[2]]}, 'temperature-sensor@48': {'compatible': ['ti,tmp75'], 'reg': [[72]]}, 'temperature-sensor@49': {'compatible': ['ti,tmp75'], 'reg':
[[73]]}, 'temperature-sensor@4a': {'compatible': ['ti,tmp75'], 'reg': [[74]]}, 'temperature-sensor@4b': {'compatible': ['ti,tmp75'], 'reg': [[75]]}, 'eeprom@54': {'compatible': ['atmel,24c256'], 'reg': [[84]]}}, 'i2c-bus@680': {'#address-cells': [[1]], '#size-cells': [[0]], 'reg': [[1664, 128]], 'compatible': ['aspeed,ast2600-i2c-bus'], 'clocks': [[2, 53]], 'resets': [[2, 34]], 'interrupts': [[0, 122, 4]], 'bus-frequency': [[400000]], 'pinctrl-names': ['default'], 'pinctrl-0': [[55]], 'status': ['okay'], 'temperature-sensor@48': {'compatible': ['ti,tmp75'], 'reg': [[72]]}, 'eeprom@50': {'compatible': ['atmel,24c128'], 'reg': [[80]]}, 'rtc@6f': {'compatible': ['nuvoton,nct3018y'], 'reg': [[111]]}}, 'i2c-bus@700': {'#address-cells': [[1]], '#size-cells': [[0]], 'reg': [[1792, 128]], 'compatible': ['aspeed,ast2600-i2c-bus'], 'clocks': [[2, 53]], 'resets': [[2, 34]], 'interrupts': [[0, 123, 4]], 'bus-frequency': [[400000]], 'pinctrl-names': ['default'], 'pinctrl-0': [[56]], 'status': [
'okay']}, 'i2c-bus@780': {'#address-cells': [[1]], '#size-cells': [[0]], 'reg': [[1920, 128]], 'compatible': ['aspeed,ast2600-i2c-bus'], 'clocks': [[2, 53]], 'resets': [[2, 34]], 'interrupts': [[0, 124, 4]], 'bus-frequency': [[400000]], 'pinctrl-names': ['default'], 'pinctrl-0': [[57]], 'status': ['okay'], 'adc@1d': {'compatible': ['ti,adc128d818'], 'reg': [[29]], 'ti,mode': [[2]]}, 'adc@35': {'compatible': ['ti,adc128d818'], 'reg': [[53]], 'ti,mode': [[2]]}, 'adc@37': {'compatible': ['ti,adc128d818'], 'reg': [[55]], 'ti,mode': [[2]]}, 'power-sensor@40': {'compatible': ['ti,ina230'], 'reg': [[64]]}, 'power-sensor@41': {'compatible': ['ti,ina230'], 'reg': [[65]]}, 'power-sensor@42': {'compatible': ['ti,ina230'], 'reg': [[66]]}, 'power-sensor@43': {'compatible': ['ti,ina230'], 'reg': [[67]]}, 'power-sensor@44': {'compatible': ['ti,ina230'], 'reg': [[68]]}, 'temperature-sensor@4e': {'compatible': ['ti,tmp75'], 'reg': [[78]]}, 'temperature-sensor@4f': {'compatible': ['ti,tmp75'], 'reg':
[[79]]}, 'eeprom@51': {'compatible': ['atmel,24c128'], 'reg': [[81]]}, 'i2c-mux@71': {'compatible': ['nxp,pca9846'], '#address-cells': [[1]], '#size-cells': [[0]], 'idle-state': [[0]], 'i2c-mux-idle-disconnect': True, 'reg': [[113]], 'i2c@0': {'#address-cells': [[1]], '#size-cells': [[0]], 'reg': [[0]], 'adc@1f': {'compatible': ['ti,adc128d818'], 'reg': [[31]], 'ti,mode': [[2]]}, 'pwm@20': {'compatible': ['max31790'], 'reg': [[32]], '#address-cells': [[1]], '#size-cells': [[0]]}, 'gpio@22': {'compatible': ['ti,tca6424'], 'reg': [[34]]}, 'pwm@23': {'compatible': ['max31790'], 'reg': [[35]], '#address-cells': [[1]], '#size-cells': [[0]]}, 'adc@33': {'compatible': ['maxim,max11615'], 'reg': [[51]]}, 'eeprom@52': {'compatible': ['atmel,24c128'], 'reg': [[82]]}, 'gpio@61': {'compatible': ['nxp,pca9552'], 'reg': [[97]], '#address-cells': [[1]], '#size-cells': [[0]], 'gpio-controller': True, '#gpio-cells': [[2]]}}, 'i2c@1': {'#address-cells': [[1]], '#size-cells': [[0]], 'reg': [[0]], 'ad
c@1f': {'compatible': ['ti,adc128d818'], 'reg': [[31]], 'ti,mode': [[2]]}, 'pwm@20': {'compatible': ['max31790'], 'reg': [[32]], '#address-cells': [[1]], '#size-cells': [[0]]}, 'gpio@22': {'compatible': ['ti,tca6424'], 'reg': [[34]]}, 'pwm@23': {'compatible': ['max31790'], 'reg': [[35]], '#address-cells': [[1]], '#size-cells': [[0]]}, 'adc@33': {'compatible': ['maxim,max11615'], 'reg': [[51]]}, 'eeprom@52': {'compatible': ['atmel,24c128'], 'reg': [[82]]}, 'gpio@61': {'compatible': ['nxp,pca9552'], 'reg': [[97]], '#address-cells': [[1]], '#size-cells': [[0]], 'gpio-controller': True, '#gpio-cells': [[2]]}}}, 'i2c-mux@73': {'compatible': ['nxp,pca9544'], '#address-cells': [[1]], '#size-cells': [[0]], 'idle-state': [[0]], 'i2c-mux-idle-disconnect': True, 'reg': [[115]], 'i2c@0': {'#address-cells': [[1]], '#size-cells': [[0]], 'reg': [[0]], 'adc@35': {'compatible': ['maxim,max11617'], 'reg': [[53]]}}, 'i2c@1': {'#address-cells': [[1]], '#size-cells': [[0]], 'reg': [[0]], 'adc@35': {'com
patible': ['maxim,max11617'], 'reg': [[53]]}}}}, 'i2c-bus@800': {'#address-cells': [[1]], '#size-cells': [[0]], 'reg': [[2048, 128]], 'compatible': ['aspeed,ast2600-i2c-bus'], 'clocks': [[2, 53]], 'resets': [[2, 34]], 'interrupts': [[0, 125, 4]], 'bus-frequency': [[400000]], 'pinctrl-names': ['default'], 'pinctrl-0': [[58]], 'status': ['okay'], 'mctp-controller': True, 'multi-master': True, 'mctp@10': {'compatible': ['mctp-i2c-controller'], 'reg': [[1073741840]]}, 'i2c-mux@72': {'compatible': ['nxp,pca9544'], 'idle-state': [[0]], 'i2c-mux-idle-disconnect': True, 'reg': [[114]]}}}, 'fsi@1e79b000': {'#interrupt-cells': [[1]], 'compatible': ['aspeed,ast2600-fsi-master', 'fsi-master'], 'reg': [[511291392, 148]], 'interrupts': [[0, 100, 4]], 'pinctrl-names': ['default'], 'pinctrl-0': [[59]], 'clocks': [[2, 45]], 'interrupt-controller': True, 'status': ['disabled']}, 'fsi@1e79b100': {'#interrupt-cells': [[1]], 'compatible': ['aspeed,ast2600-fsi-master', 'fsi-master'], 'reg': [[511291648,
148]], 'interrupts': [[0, 101, 4]], 'pinctrl-names': ['default'], 'pinctrl-0': [[60]], 'clocks': [[2, 45]], 'interrupt-controller': True, 'status': ['disabled']}, 'dma-controller@1e79e000': {'compatible': ['aspeed,ast2600-udma'], 'reg': [[511303680, 4096]], 'interrupts': [[0, 56, 4]], 'dma-channels': [[28]], '#dma-cells': [[1]], 'status': ['disabled']}} should not be valid under {'type': 'object'}
from schema $id: http://devicetree.org/schemas/simple-bus.yaml#
arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dtb: i2c-bus@480: Unevaluated properties are not allowed ('i2c-clk-high-min-percent' was unexpected)
from schema $id: http://devicetree.org/schemas/i2c/aspeed,i2c.yaml#
arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dtb: i2c-bus@500: Unevaluated properties are not allowed ('i2c-clk-high-min-percent' was unexpected)
from schema $id: http://devicetree.org/schemas/i2c/aspeed,i2c.yaml#
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* Re: [PATCH RESEND] arm64: dts: marvell: add DTS for 7215-IXS-A1 board
From: Rob Herring @ 2024-04-01 16:36 UTC (permalink / raw)
To: Natarajan Subbiramani; +Cc: gregory.clement, nsubbara, linux-arm-kernel
In-Reply-To: <20240329223012.935-1-nataccet@gmail.com>
On Fri, 29 Mar 2024 18:30:12 -0400, Natarajan Subbiramani wrote:
> From: nsubbara <natarajan.subbiramani.ext@nokia.com>
>
> 7215-IXS-A1 is an aggregation switch based on Marvell AlleyCat5X.
> This dts is extracted from Marvell cn9130-crb and removed unused
> nodes along with platform specific changes.
>
> Signed-off-by: nsubbara <natarajan.subbiramani.ext@nokia.com>
> ---
> arch/arm64/boot/dts/marvell/7215-ixs-a1.dts | 226 ++++++++++++++++++++
> arch/arm64/boot/dts/marvell/Makefile | 1 +
> 2 files changed, 227 insertions(+)
> create mode 100644 arch/arm64/boot/dts/marvell/7215-ixs-a1.dts
>
My bot found new DTB warnings on the .dts files added or changed in this
series.
Some warnings may be from an existing SoC .dtsi. Or perhaps the warnings
are fixed by another series. Ultimately, it is up to the platform
maintainer whether these warnings are acceptable or not. No need to reply
unless the platform maintainer has comments.
If you already ran DT checks and didn't see these error(s), then
make sure dt-schema is up to date:
pip3 install dtschema --upgrade
New warnings running 'make CHECK_DTBS=y marvell/7215-ixs-a1.dtb' for 20240329223012.935-1-nataccet@gmail.com:
arch/arm64/boot/dts/marvell/7215-ixs-a1.dtb: ap807: $nodename:0: 'ap807' does not match '^([a-z][a-z0-9\-]+-bus|bus|localbus|soc|axi|ahb|apb)(@.+)?$'
from schema $id: http://devicetree.org/schemas/simple-bus.yaml#
arch/arm64/boot/dts/marvell/7215-ixs-a1.dtb: config-space@f0000000: $nodename:0: 'config-space@f0000000' does not match '^([a-z][a-z0-9\-]+-bus|bus|localbus|soc|axi|ahb|apb)(@.+)?$'
from schema $id: http://devicetree.org/schemas/simple-bus.yaml#
arch/arm64/boot/dts/marvell/7215-ixs-a1.dtb: config-space@f0000000: timer: {'compatible': ['arm,armv8-timer'], 'interrupts': [[1, 13, 3848], [1, 14, 3848], [1, 11, 3848], [1, 10, 3848]]} should not be valid under {'type': 'object'}
from schema $id: http://devicetree.org/schemas/simple-bus.yaml#
arch/arm64/boot/dts/marvell/7215-ixs-a1.dtb: config-space@f0000000: pmu: {'compatible': ['arm,cortex-a72-pmu'], 'interrupt-parent': [[2]], 'interrupts': [[17]]} should not be valid under {'type': 'object'}
from schema $id: http://devicetree.org/schemas/simple-bus.yaml#
arch/arm64/boot/dts/marvell/7215-ixs-a1.dtb: mmc@6e0000: clocks: [[4, 4]] is too short
from schema $id: http://devicetree.org/schemas/mmc/marvell,xenon-sdhci.yaml#
arch/arm64/boot/dts/marvell/7215-ixs-a1.dtb: mmc@6e0000: clock-names: ['core'] is too short
from schema $id: http://devicetree.org/schemas/mmc/marvell,xenon-sdhci.yaml#
arch/arm64/boot/dts/marvell/7215-ixs-a1.dtb: mmc@6e0000: Unevaluated properties are not allowed ('dma-coherent' was unexpected)
from schema $id: http://devicetree.org/schemas/mmc/marvell,xenon-sdhci.yaml#
arch/arm64/boot/dts/marvell/7215-ixs-a1.dtb: gpio@1040: Unevaluated properties are not allowed ('gpio-ranges' was unexpected)
from schema $id: http://devicetree.org/schemas/gpio/gpio-mvebu.yaml#
arch/arm64/boot/dts/marvell/7215-ixs-a1.dtb: cp0: $nodename:0: 'cp0' does not match '^([a-z][a-z0-9\-]+-bus|bus|localbus|soc|axi|ahb|apb)(@.+)?$'
from schema $id: http://devicetree.org/schemas/simple-bus.yaml#
arch/arm64/boot/dts/marvell/7215-ixs-a1.dtb: config-space@f2000000: $nodename:0: 'config-space@f2000000' does not match '^([a-z][a-z0-9\-]+-bus|bus|localbus|soc|axi|ahb|apb)(@.+)?$'
from schema $id: http://devicetree.org/schemas/simple-bus.yaml#
arch/arm64/boot/dts/marvell/7215-ixs-a1.dtb: gpio@100: Unevaluated properties are not allowed ('gpio-ranges' was unexpected)
from schema $id: http://devicetree.org/schemas/gpio/gpio-mvebu.yaml#
arch/arm64/boot/dts/marvell/7215-ixs-a1.dtb: gpio@140: Unevaluated properties are not allowed ('gpio-ranges' was unexpected)
from schema $id: http://devicetree.org/schemas/gpio/gpio-mvebu.yaml#
arch/arm64/boot/dts/marvell/7215-ixs-a1.dtb: usb@500000: Unevaluated properties are not allowed ('dma-coherent' was unexpected)
from schema $id: http://devicetree.org/schemas/usb/generic-xhci.yaml#
arch/arm64/boot/dts/marvell/7215-ixs-a1.dtb: usb@510000: Unevaluated properties are not allowed ('dma-coherent' was unexpected)
from schema $id: http://devicetree.org/schemas/usb/generic-xhci.yaml#
arch/arm64/boot/dts/marvell/7215-ixs-a1.dtb: cp0_usb3_phy0: '#phy-cells' is a required property
from schema $id: http://devicetree.org/schemas/usb/usb-nop-xceiv.yaml#
arch/arm64/boot/dts/marvell/7215-ixs-a1.dtb: cp0_usb3_phy1: '#phy-cells' is a required property
from schema $id: http://devicetree.org/schemas/usb/usb-nop-xceiv.yaml#
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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* Re: [PATCH v1 5/6] dt-bindings: clock: meson: add A1 CPU clock controller bindings
From: Rob Herring @ 2024-04-01 14:57 UTC (permalink / raw)
To: Dmitry Rokosov
Cc: sboyd, neil.armstrong, jbrunet, khilman, rockosov, linux-clk,
linux-kernel, krzysztof.kozlowski+dt, kernel, devicetree,
linux-amlogic, robh+dt, mturquette, linux-arm-kernel,
martin.blumenstingl
In-Reply-To: <20240329205904.25002-6-ddrokosov@salutedevices.com>
On Fri, 29 Mar 2024 23:58:45 +0300, Dmitry Rokosov wrote:
> Add the documentation and dt bindings for Amlogic A1 CPU clock
> controller.
>
> This controller consists of the general 'cpu_clk' and two main parents:
> 'cpu fixed clock' and 'syspll'. The 'cpu fixed clock' is an internal
> fixed clock, while the 'syspll' serves as an external input from the A1
> PLL clock controller.
>
> Signed-off-by: Dmitry Rokosov <ddrokosov@salutedevices.com>
> ---
> .../bindings/clock/amlogic,a1-cpu-clkc.yaml | 64 +++++++++++++++++++
> .../dt-bindings/clock/amlogic,a1-cpu-clkc.h | 19 ++++++
> 2 files changed, 83 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/clock/amlogic,a1-cpu-clkc.yaml
> create mode 100644 include/dt-bindings/clock/amlogic,a1-cpu-clkc.h
>
Reviewed-by: Rob Herring <robh@kernel.org>
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^ permalink raw reply
* Re: [External] Re: [PATCH bpf-next v2 1/9] bpf: tracing: add support to record and check the accessed args
From: Steven Rostedt @ 2024-04-01 15:59 UTC (permalink / raw)
To: 梦龙董
Cc: Alexei Starovoitov, Jiri Olsa, Andrii Nakryiko,
Alexei Starovoitov, Daniel Borkmann, Martin KaFai Lau, Eddy Z,
Song Liu, Yonghong Song, John Fastabend, KP Singh,
Stanislav Fomichev, Hao Luo, Alexander Gordeev,
Christian Borntraeger, Sven Schnelle, David S. Miller,
David Ahern, Dave Hansen, X86 ML, Mathieu Desnoyers,
Quentin Monnet, bpf, linux-arm-kernel, LKML, linux-riscv,
linux-s390, Network Development, linux-trace-kernel,
open list:KERNEL SELFTEST FRAMEWORK, linux-stm32
In-Reply-To: <CALz3k9j_RGqSMdN+GvbHEjRqMWYe4R9VNZRANG7jbfL_jVpoVg@mail.gmail.com>
On Mon, 1 Apr 2024 10:28:17 +0800
梦龙董 <dongmenglong.8@bytedance.com> wrote:
> On Sun, Mar 31, 2024 at 3:34 AM Steven Rostedt <rostedt@goodmis.org> wrote:
> >
> > On Sat, 30 Mar 2024 11:18:29 +0800
> > 梦龙董 <dongmenglong.8@bytedance.com> wrote:
> >
> > > > If you really want to have thousands of functions, why not just register it
> > > > with ftrace itself. It will give you the arguments via the ftrace_regs
> > > > structure. Can't you just register a program as the callback?
> > > >
> > >
> > > Ennn...I don't understand. The main purpose for
> > > me to use TRACING is:
> > >
> > > 1. we can directly access the memory, which is more
> > > efficient.
> >
> > I'm not sure what you mean by the above. Access what memory?
> >
>
> We need to use the helper of bpf_probe_read_kernel
> when we read "skb->sk" in kprobe, and the "skb" is the
> 1st arg in ip_rcv(). And we can directly read "skb->sk"
> in tracing, which is more efficient. Isn't it?
If you add a ftrace_ops function handler that calls a BPF program, I don't
see why you can't just give it the parameters it needs instead of using bpf
helpers. It's no different than using a trampoline to do the same thing.
-- Steve
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^ permalink raw reply
* Re: [PATCH v4 1/4] remoteproc: Add TEE support
From: Mathieu Poirier @ 2024-04-01 15:54 UTC (permalink / raw)
To: Arnaud POULIQUEN
Cc: Bjorn Andersson, Jens Wiklander, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, linux-stm32, linux-arm-kernel, linux-remoteproc,
linux-kernel, op-tee, devicetree
In-Reply-To: <a4a1f938-d185-46d7-9f57-af7bf3a65e9c@foss.st.com>
On Fri, Mar 29, 2024 at 09:58:11AM +0100, Arnaud POULIQUEN wrote:
> Hello Mathieu,
>
> On 3/27/24 18:07, Mathieu Poirier wrote:
> > On Tue, Mar 26, 2024 at 08:18:23PM +0100, Arnaud POULIQUEN wrote:
> >> Hello Mathieu,
> >>
> >> On 3/25/24 17:46, Mathieu Poirier wrote:
> >>> On Fri, Mar 08, 2024 at 03:47:05PM +0100, Arnaud Pouliquen wrote:
> >>>> Add a remoteproc TEE (Trusted Execution Environment) driver
> >>>> that will be probed by the TEE bus. If the associated Trusted
> >>>> application is supported on secure part this device offers a client
> >>>
> >>> Device or driver? I thought I touched on that before.
> >>
> >> Right, I changed the first instance and missed this one
> >>
> >>>
> >>>> interface to load a firmware in the secure part.
> >>>> This firmware could be authenticated by the secure trusted application.
> >>>>
> >>>> Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>
> >>>> ---
> >>>> Updates from V3:
> >>>> - rework TEE_REMOTEPROC description in Kconfig
> >>>> - fix some namings
> >>>> - add tee_rproc_parse_fw to support rproc_ops::parse_fw
> >>>> - add proc::tee_interface;
> >>>> - add rproc struct as parameter of the tee_rproc_register() function
> >>>> ---
> >>>> drivers/remoteproc/Kconfig | 10 +
> >>>> drivers/remoteproc/Makefile | 1 +
> >>>> drivers/remoteproc/tee_remoteproc.c | 434 ++++++++++++++++++++++++++++
> >>>> include/linux/remoteproc.h | 4 +
> >>>> include/linux/tee_remoteproc.h | 112 +++++++
> >>>> 5 files changed, 561 insertions(+)
> >>>> create mode 100644 drivers/remoteproc/tee_remoteproc.c
> >>>> create mode 100644 include/linux/tee_remoteproc.h
> >>>>
> >>>> diff --git a/drivers/remoteproc/Kconfig b/drivers/remoteproc/Kconfig
> >>>> index 48845dc8fa85..2cf1431b2b59 100644
> >>>> --- a/drivers/remoteproc/Kconfig
> >>>> +++ b/drivers/remoteproc/Kconfig
> >>>> @@ -365,6 +365,16 @@ config XLNX_R5_REMOTEPROC
> >>>>
> >>>> It's safe to say N if not interested in using RPU r5f cores.
> >>>>
> >>>> +
> >>>> +config TEE_REMOTEPROC
> >>>> + tristate "remoteproc support by a TEE application"
> >>>
> >>> s/remoteproc/Remoteproc
> >>>
> >>>> + depends on OPTEE
> >>>> + help
> >>>> + Support a remote processor with a TEE application. The Trusted
> >>>> + Execution Context is responsible for loading the trusted firmware
> >>>> + image and managing the remote processor's lifecycle.
> >>>> + This can be either built-in or a loadable module.
> >>>> +
> >>>> endif # REMOTEPROC
> >>>>
> >>>> endmenu
> >>>> diff --git a/drivers/remoteproc/Makefile b/drivers/remoteproc/Makefile
> >>>> index 91314a9b43ce..fa8daebce277 100644
> >>>> --- a/drivers/remoteproc/Makefile
> >>>> +++ b/drivers/remoteproc/Makefile
> >>>> @@ -36,6 +36,7 @@ obj-$(CONFIG_RCAR_REMOTEPROC) += rcar_rproc.o
> >>>> obj-$(CONFIG_ST_REMOTEPROC) += st_remoteproc.o
> >>>> obj-$(CONFIG_ST_SLIM_REMOTEPROC) += st_slim_rproc.o
> >>>> obj-$(CONFIG_STM32_RPROC) += stm32_rproc.o
> >>>> +obj-$(CONFIG_TEE_REMOTEPROC) += tee_remoteproc.o
> >>>> obj-$(CONFIG_TI_K3_DSP_REMOTEPROC) += ti_k3_dsp_remoteproc.o
> >>>> obj-$(CONFIG_TI_K3_R5_REMOTEPROC) += ti_k3_r5_remoteproc.o
> >>>> obj-$(CONFIG_XLNX_R5_REMOTEPROC) += xlnx_r5_remoteproc.o
> >>>> diff --git a/drivers/remoteproc/tee_remoteproc.c b/drivers/remoteproc/tee_remoteproc.c
> >>>> new file mode 100644
> >>>> index 000000000000..c855210e52e3
> >>>> --- /dev/null
> >>>> +++ b/drivers/remoteproc/tee_remoteproc.c
> >>>> @@ -0,0 +1,434 @@
> >>>> +// SPDX-License-Identifier: GPL-2.0-or-later
> >>>> +/*
> >>>> + * Copyright (C) STMicroelectronics 2024 - All Rights Reserved
> >>>> + * Author: Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>
> >>>> + */
> >>>> +
> >>>> +#include <linux/firmware.h>
> >>>> +#include <linux/io.h>
> >>>> +#include <linux/module.h>
> >>>> +#include <linux/remoteproc.h>
> >>>> +#include <linux/slab.h>
> >>>> +#include <linux/tee_drv.h>
> >>>> +#include <linux/tee_remoteproc.h>
> >>>> +
> >>>> +#include "remoteproc_internal.h"
> >>>> +
> >>>> +#define MAX_TEE_PARAM_ARRY_MEMBER 4
> >>>> +
> >>>> +/*
> >>>> + * Authentication of the firmware and load in the remote processor memory
> >>>> + *
> >>>> + * [in] params[0].value.a: unique 32bit identifier of the remote processor
> >>>> + * [in] params[1].memref: buffer containing the image of the buffer
> >>>> + */
> >>>> +#define TA_RPROC_FW_CMD_LOAD_FW 1
> >>>> +
> >>>> +/*
> >>>> + * Start the remote processor
> >>>> + *
> >>>> + * [in] params[0].value.a: unique 32bit identifier of the remote processor
> >>>> + */
> >>>> +#define TA_RPROC_FW_CMD_START_FW 2
> >>>> +
> >>>> +/*
> >>>> + * Stop the remote processor
> >>>> + *
> >>>> + * [in] params[0].value.a: unique 32bit identifier of the remote processor
> >>>> + */
> >>>> +#define TA_RPROC_FW_CMD_STOP_FW 3
> >>>> +
> >>>> +/*
> >>>> + * Return the address of the resource table, or 0 if not found
> >>>> + * No check is done to verify that the address returned is accessible by
> >>>> + * the non secure context. If the resource table is loaded in a protected
> >>>> + * memory the access by the non secure context will lead to a data abort.
> >>>> + *
> >>>> + * [in] params[0].value.a: unique 32bit identifier of the remote processor
> >>>> + * [out] params[1].value.a: 32bit LSB resource table memory address
> >>>> + * [out] params[1].value.b: 32bit MSB resource table memory address
> >>>> + * [out] params[2].value.a: 32bit LSB resource table memory size
> >>>> + * [out] params[2].value.b: 32bit MSB resource table memory size
> >>>> + */
> >>>> +#define TA_RPROC_FW_CMD_GET_RSC_TABLE 4
> >>>> +
> >>>> +/*
> >>>> + * Return the address of the core dump
> >>>> + *
> >>>> + * [in] params[0].value.a: unique 32bit identifier of the remote processor
> >>>> + * [out] params[1].memref: address of the core dump image if exist,
> >>>> + * else return Null
> >>>> + */
> >>>> +#define TA_RPROC_FW_CMD_GET_COREDUMP 5
> >>>> +
> >>>> +struct tee_rproc_context {
> >>>> + struct list_head sessions;
> >>>> + struct tee_context *tee_ctx;
> >>>> + struct device *dev;
> >>>> +};
> >>>> +
> >>>> +static struct tee_rproc_context *tee_rproc_ctx;
> >>>> +
> >>>> +static void tee_rproc_prepare_args(struct tee_rproc *trproc, int cmd,
> >>>> + struct tee_ioctl_invoke_arg *arg,
> >>>> + struct tee_param *param,
> >>>> + unsigned int num_params)
> >>>> +{
> >>>> + memset(arg, 0, sizeof(*arg));
> >>>> + memset(param, 0, MAX_TEE_PARAM_ARRY_MEMBER * sizeof(*param));
> >>>> +
> >>>> + arg->func = cmd;
> >>>> + arg->session = trproc->session_id;
> >>>> + arg->num_params = num_params + 1;
> >>>> +
> >>>> + param[0] = (struct tee_param) {
> >>>> + .attr = TEE_IOCTL_PARAM_ATTR_TYPE_VALUE_INPUT,
> >>>> + .u.value.a = trproc->rproc_id,
> >>>> + };
> >>>> +}
> >>>> +
> >>>> +int tee_rproc_load_fw(struct rproc *rproc, const struct firmware *fw)
> >>>> +{
> >>>> + struct tee_ioctl_invoke_arg arg;
> >>>> + struct tee_param param[MAX_TEE_PARAM_ARRY_MEMBER];
> >>>> + struct tee_rproc *trproc = rproc->tee_interface;
> >>>> + struct tee_shm *fw_shm;
> >>>> + int ret;
> >>>
> >>> Declarations in reverse ascending order here and everywhere in the driver.
> >>> Sometimes it is done properly, sometimes it isn't.
> >>>
> >>>> +
> >>>> + if (!trproc)
> >>>> + return -EINVAL;
> >>>> +
> >>>> + fw_shm = tee_shm_register_kernel_buf(tee_rproc_ctx->tee_ctx, (void *)fw->data, fw->size);
> >>>> + if (IS_ERR(fw_shm))
> >>>> + return PTR_ERR(fw_shm);
> >>>> +
> >>>> + tee_rproc_prepare_args(trproc, TA_RPROC_FW_CMD_LOAD_FW, &arg, param, 1);
> >>>> +
> >>>> + /* Provide the address of the firmware image */
> >>>> + param[1] = (struct tee_param) {
> >>>> + .attr = TEE_IOCTL_PARAM_ATTR_TYPE_MEMREF_INPUT,
> >>>> + .u.memref = {
> >>>> + .shm = fw_shm,
> >>>> + .size = fw->size,
> >>>> + .shm_offs = 0,
> >>>> + },
> >>>> + };
> >>>> +
> >>>> + ret = tee_client_invoke_func(tee_rproc_ctx->tee_ctx, &arg, param);
> >>>> + if (ret < 0 || arg.ret != 0) {
> >>>> + dev_err(tee_rproc_ctx->dev,
> >>>> + "TA_RPROC_FW_CMD_LOAD_FW invoke failed TEE err: %x, ret:%x\n",
> >>>> + arg.ret, ret);
> >>>> + if (!ret)
> >>>> + ret = -EIO;
> >>>> + }
> >>>> +
> >>>> + tee_shm_free(fw_shm);
> >>>> +
> >>>> + return ret;
> >>>> +}
> >>>> +EXPORT_SYMBOL_GPL(tee_rproc_load_fw);
> >>>> +
> >>>> +struct resource_table *tee_rproc_get_loaded_rsc_table(struct rproc *rproc, size_t *table_sz)
> >>>> +{
> >>>> + struct tee_ioctl_invoke_arg arg;
> >>>> + struct tee_param param[MAX_TEE_PARAM_ARRY_MEMBER];
> >>>> + struct tee_rproc *trproc = rproc->tee_interface;
> >>>> + struct resource_table *rsc_table;
> >>>> + int ret;
> >>>> +
> >>>> + if (!trproc)
> >>>> + return ERR_PTR(-EINVAL);
> >>>> +
> >>>> + tee_rproc_prepare_args(trproc, TA_RPROC_FW_CMD_GET_RSC_TABLE, &arg, param, 2);
> >>>> +
> >>>> + param[1].attr = TEE_IOCTL_PARAM_ATTR_TYPE_VALUE_OUTPUT;
> >>>> + param[2].attr = TEE_IOCTL_PARAM_ATTR_TYPE_VALUE_OUTPUT;
> >>>> +
> >>>> + ret = tee_client_invoke_func(tee_rproc_ctx->tee_ctx, &arg, param);
> >>>> + if (ret < 0 || arg.ret != 0) {
> >>>> + dev_err(tee_rproc_ctx->dev,
> >>>> + "TA_RPROC_FW_CMD_GET_RSC_TABLE invoke failed TEE err: %x, ret:%x\n",
> >>>> + arg.ret, ret);
> >>>> + return ERR_PTR(-EIO);
> >>>> + }
> >>>> +
> >>>> + *table_sz = param[2].u.value.a;
> >>>> +
> >>>> + /* If the size is null no resource table defined in the image */
> >>>> + if (!*table_sz)
> >>>> + return NULL;
> >>>> +
> >>>> + /* Store the resource table address that would be updated by the remote core. */
> >>>> + rsc_table = ioremap_wc(param[1].u.value.a, *table_sz);
> >>>> + if (IS_ERR_OR_NULL(rsc_table)) {
> >>>> + dev_err(tee_rproc_ctx->dev, "Unable to map memory region: %lld+%zx\n",
> >>>> + param[1].u.value.a, *table_sz);
> >>>> + return ERR_PTR(-ENOMEM);
> >>>> + }
> >>>> +
> >>>> + return rsc_table;
> >>>> +}
> >>>> +EXPORT_SYMBOL_GPL(tee_rproc_get_loaded_rsc_table);
> >>>> +
> >>>> +int tee_rproc_parse_fw(struct rproc *rproc, const struct firmware *fw)
> >>>> +{
> >>>> + struct tee_rproc *trproc = rproc->tee_interface;
> >>>> + struct resource_table *rsc_table;
> >>>> + size_t table_sz;
> >>>> + int ret;
> >>>> +
> >>>> + ret = tee_rproc_load_fw(rproc, fw);
> >>>> + if (ret)
> >>>> + return ret;
> >>>> +
> >>>> + rsc_table = tee_rproc_get_loaded_rsc_table(rproc, &table_sz);
> >>>> + if (IS_ERR(rsc_table))
> >>>> + return PTR_ERR(rsc_table);
> >>>> +
> >>>> + /* Create a copy of the resource table to have same behaviour than the elf loader. */
> >>>> + rproc->cached_table = kmemdup(rsc_table, table_sz, GFP_KERNEL);
> >>>> + if (!rproc->cached_table)
> >>>> + return -ENOMEM;
> >>>
> >>> Why not ->table_ptr and setting ->cached_table to NULL?
> >>
> >> It was my plan preparing this version. But during implementarion it looks
> >> to me that having exactly same behavior than the ELF loader would be
> >> simpler to maintain the remoteproc avoiding to update in the remoteproc core
> >> to manage for the cached resource table (see also my comment below abourt recovery)
> >> That why I propose this implementation
> >>
> >> That said what you proposal should also work (with some updates in
> >> remoteproc_core for the management of the cached table).
> >>
> >
> > Yes
> >
> >> So please just comfirm your preference.
> >>
> >
> > Definitely keep ->cached_table to NULL.
> >
> >>>
> >>>> +
> >>>> + rproc->table_ptr = rproc->cached_table;
> >>>> + rproc->table_sz = table_sz;
> >>>> + trproc->rsc_table = rsc_table;
> >>>
> >>> I really don't see why this is needed, please remove and use rproc->table_ptr
> >>> instead.
> >>
> >> I need to store it for the iounmap in tee_rproc_remove.
> >
> > iounmap(entry->rproc->rsc_table);
> >
> > What am I missing?
>
> rproc->rsc_table is a field that can be updated by remoteproc_core.
> How can we garanty in tee_remoteproc that it still points to the mapped resource
> table?
By making sure the core doesn't touch rproc->rsc_table when
rproc->tee_interface is valid.
> As the remoteproc_tee maps the pointer, it seems reliable that it stores it for
> unmap.
>
Doing so creates a shadow value that is confusing and really hard to maintain
going forward.
> Seems also that I also missed to handle the case where rproc_fw_boot() fails[3]
> (not done yet).
>
> [3]https://elixir.bootlin.com/linux/latest/source/drivers/remoteproc/remoteproc_core.c#L1442
>
>
> >
> >>
> >>>
> >>>> +
> >>>> + return 0;
> >>>> +}
> >>>> +EXPORT_SYMBOL_GPL(tee_rproc_parse_fw);
> >>>> +
> >>>> +struct resource_table *tee_rproc_find_loaded_rsc_table(struct rproc *rproc,
> >>>> + const struct firmware *fw)
> >>>> +{
> >>>> + struct tee_rproc *trproc = rproc->tee_interface;
> >>>> + struct resource_table *rsc_table;
> >>>> + size_t table_sz;
> >>>> +
> >>>> + if (!trproc)
> >>>> + return ERR_PTR(-EINVAL);
> >>>> +
> >>>> + /* Check if the resourse table has already been obtained in tee_rproc_parse_fw() */
> >>>> + if (trproc->rsc_table)
> >>>> + return trproc->rsc_table;
> >>>
> >>> Again, why not simply use rproc->rsc_table? This function should only return
> >>> the resource table that was set in tee_rproc_parse_fw().
> >>
> >> In case of recovery rproc->_rsc_table point to the cached table [1]
> >
> > In [1], on line 1554, add a check for rproc->tee_interface and if it is valid
> > call rproc_find_loaded_rsc_table().
> >
> >> and we need to reapply the configuration in rproc_start() called during the
> >> recovery[2]
> >
> > 1) Rename rproc_set_rsc_table() to rproc_set_rsc_table_on_attach()
> > 2) Introduce a new function called rproc_set_rsc_table_on_start()
> > 3) Move code from [2], line 1278 to 1292, to that new function. In the new
> > function, add a check on rproc->tee_interface. If it is valid then call
> > rproc_find_loaded_rsc_table().
> > 4) in rproc_start(), replace lines 1278 to 1292 with a call to
> > rproc_set_rsc_table_on_start().
>
>
> I will try this
>
Ok
> Thanks!
> Arnaud
>
> >
> >> [1]https://elixir.bootlin.com/linux/latest/source/drivers/remoteproc/remoteproc_core.c#L1586
> >> [2]https://elixir.bootlin.com/linux/latest/source/drivers/remoteproc/remoteproc_core.c#L1287
> >>
> >>>
> >>>> +
> >>>> + rsc_table = tee_rproc_get_loaded_rsc_table(rproc, &table_sz);
> >>>> + if (IS_ERR(rsc_table))
> >>>> + return rsc_table;
> >>>> +
> >>>> + rproc->table_sz = table_sz;
> >>>> + trproc->rsc_table = rsc_table;
> >>>> +
> >>>> + return rsc_table;
> >>>> +}
> >>>> +EXPORT_SYMBOL_GPL(tee_rproc_find_loaded_rsc_table);
> >>>> +
> >>>> +int tee_rproc_start(struct rproc *rproc)
> >>>> +{
> >>>> + struct tee_ioctl_invoke_arg arg;
> >>>> + struct tee_param param[MAX_TEE_PARAM_ARRY_MEMBER];
> >>>> + struct tee_rproc *trproc = rproc->tee_interface;
> >>>> + int ret;
> >>>> +
> >>>> + if (!trproc)
> >>>> + return -EINVAL;
> >>>> +
> >>>> + tee_rproc_prepare_args(trproc, TA_RPROC_FW_CMD_START_FW, &arg, param, 0);
> >>>> +
> >>>> + ret = tee_client_invoke_func(tee_rproc_ctx->tee_ctx, &arg, param);
> >>>> + if (ret < 0 || arg.ret != 0) {
> >>>> + dev_err(tee_rproc_ctx->dev,
> >>>> + "TA_RPROC_FW_CMD_START_FW invoke failed TEE err: %x, ret:%x\n",
> >>>> + arg.ret, ret);
> >>>> + if (!ret)
> >>>> + ret = -EIO;
> >>>> + }
> >>>> +
> >>>> + return ret;
> >>>> +}
> >>>> +EXPORT_SYMBOL_GPL(tee_rproc_start);
> >>>> +
> >>>> +int tee_rproc_stop(struct rproc *rproc)
> >>>> +{
> >>>> + struct tee_ioctl_invoke_arg arg;
> >>>> + struct tee_param param[MAX_TEE_PARAM_ARRY_MEMBER];
> >>>> + struct tee_rproc *trproc = rproc->tee_interface;
> >>>> + int ret;
> >>>> +
> >>>> + if (!trproc)
> >>>> + return -EINVAL;
> >>>> +
> >>>> + tee_rproc_prepare_args(trproc, TA_RPROC_FW_CMD_STOP_FW, &arg, param, 0);
> >>>> +
> >>>> + ret = tee_client_invoke_func(tee_rproc_ctx->tee_ctx, &arg, param);
> >>>> + if (ret < 0 || arg.ret != 0) {
> >>>> + dev_err(tee_rproc_ctx->dev,
> >>>> + "TA_RPROC_FW_CMD_STOP_FW invoke failed TEE err: %x, ret:%x\n",
> >>>> + arg.ret, ret);
> >>>> + if (!ret)
> >>>> + ret = -EIO;
> >>>> + }
> >>>> +
> >>>> + if (!rproc->table_ptr)
> >>>> + return ret;
> >>>> +
> >>>> + iounmap(trproc->rsc_table);
> >>>> + trproc->rsc_table = NULL;
> >>>> + rproc->table_ptr = NULL;
> >>>> +
> >>>> + return 0;
> >>>> +}
> >>>> +EXPORT_SYMBOL_GPL(tee_rproc_stop);
> >>>> +
> >>>> +static const struct tee_client_device_id stm32_tee_rproc_id_table[] = {
> >>>> + {UUID_INIT(0x80a4c275, 0x0a47, 0x4905,
> >>>> + 0x82, 0x85, 0x14, 0x86, 0xa9, 0x77, 0x1a, 0x08)},
> >>>> + {}
> >>>> +};
> >>>> +
> >>>> +struct tee_rproc *tee_rproc_register(struct device *dev, struct rproc *rproc, unsigned int rproc_id)
> >>>> +{
> >>>> + struct tee_client_device *tee_device;
> >>>> + struct tee_ioctl_open_session_arg sess_arg;
> >>>> + struct tee_param param[MAX_TEE_PARAM_ARRY_MEMBER];
> >>>> + struct tee_rproc *trproc;
> >>>> + int ret;
> >>>> +
> >>>> + /*
> >>>> + * Test if the device has been probed by the TEE bus. In case of failure, we ignore the
> >>>> + * reason. The bus could be not yet probed or the service not available in the secure
> >>>> + * firmware.The assumption in such a case is that the TEE remoteproc is not probed.
> >>>> + */
> >>>> + if (!tee_rproc_ctx)
> >>>> + return ERR_PTR(-EPROBE_DEFER);
> >>>> +
> >>>> + trproc = devm_kzalloc(dev, sizeof(*trproc), GFP_KERNEL);
> >>>> + if (!trproc)
> >>>> + return ERR_PTR(-ENOMEM);
> >>>> +
> >>>> + tee_device = to_tee_client_device(tee_rproc_ctx->dev);
> >>>> + memset(&sess_arg, 0, sizeof(sess_arg));
> >>>> +
> >>>> + memcpy(sess_arg.uuid, tee_device->id.uuid.b, TEE_IOCTL_UUID_LEN);
> >>>> +
> >>>> + sess_arg.clnt_login = TEE_IOCTL_LOGIN_REE_KERNEL;
> >>>> + sess_arg.num_params = 1;
> >>>> +
> >>>> + param[0] = (struct tee_param) {
> >>>> + .attr = TEE_IOCTL_PARAM_ATTR_TYPE_VALUE_INPUT,
> >>>> + .u.value.a = rproc_id,
> >>>> + };
> >>>> +
> >>>> + ret = tee_client_open_session(tee_rproc_ctx->tee_ctx, &sess_arg, param);
> >>>> + if (ret < 0 || sess_arg.ret != 0) {
> >>>> + dev_err(dev, "tee_client_open_session failed, err: %x\n", sess_arg.ret);
> >>>> + return ERR_PTR(-EINVAL);
> >>>> + }
> >>>> +
> >>>> + trproc->parent = dev;
> >>>> + trproc->rproc_id = rproc_id;
> >>>> + trproc->session_id = sess_arg.session;
> >>>> +
> >>>> + trproc->rproc = rproc;
> >>>> + rproc->tee_interface = trproc;
> >>>> +
> >>>> + list_add_tail(&trproc->node, &tee_rproc_ctx->sessions);
> >>>> +
> >>>> + return trproc;
> >>>
> >>> Once this function was called by a client, what prevents a user from unloading
> >>> the tee_remoteproc module and breaking everything?
> >>
> >> Good point! seems better toremove the module build capability
> >>
> >
> > I was thinking more along the lines of try_module_get() and module_put() to
> > avoid bloating the core.
> >
> >> Thanks,
> >> Arnaud
> >>
> >>>
> >>>> +}
> >>>> +EXPORT_SYMBOL_GPL(tee_rproc_register);
> >>>> +
> >>>> +int tee_rproc_unregister(struct tee_rproc *trproc)
> >>>> +{
> >>>
> >>> If you pass a struct_rproc instead of a struct tee_rproc there is no need for
> >>> tee_rproc::rproc, which is only ever used in this function.
> >>>
> >>>
> >>>> + struct rproc *rproc = trproc->rproc;
> >>>> + int ret;
> >>>> +
> >>>> + ret = tee_client_close_session(tee_rproc_ctx->tee_ctx, trproc->session_id);
> >>>> + if (ret < 0)
> >>>> + dev_err(trproc->parent, "tee_client_close_session failed, err: %x\n", ret);
> >>>> +
> >>>> + list_del(&trproc->node);
> >>>> + rproc->tee_interface = NULL;
> >>>> +
> >>>> + return ret;
> >>>> +}
> >>>> +EXPORT_SYMBOL_GPL(tee_rproc_unregister);
> >>>> +
> >>>> +static int tee_rproc_ctx_match(struct tee_ioctl_version_data *ver, const void *data)
> >>>> +{
> >>>> + /* Today we support only the OP-TEE, could be extend to other tees */
> >>>> + return (ver->impl_id == TEE_IMPL_ID_OPTEE);
> >>>> +}
> >>>> +
> >>>> +static int tee_rproc_probe(struct device *dev)
> >>>> +{
> >>>> + struct tee_context *tee_ctx;
> >>>> + int ret;
> >>>> +
> >>>> + /* Open context with TEE driver */
> >>>> + tee_ctx = tee_client_open_context(NULL, tee_rproc_ctx_match, NULL, NULL);
> >>>> + if (IS_ERR(tee_ctx))
> >>>> + return PTR_ERR(tee_ctx);
> >>>> +
> >>>> + tee_rproc_ctx = devm_kzalloc(dev, sizeof(*tee_ctx), GFP_KERNEL);
> >>>> + if (!tee_rproc_ctx) {
> >>>> + ret = -ENOMEM;
> >>>> + goto err;
> >>>> + }
> >>>> +
> >>>> + tee_rproc_ctx->dev = dev;
> >>>> + tee_rproc_ctx->tee_ctx = tee_ctx;
> >>>> + INIT_LIST_HEAD(&tee_rproc_ctx->sessions);
> >>>> +
> >>>> + return 0;
> >>>> +err:
> >>>> + tee_client_close_context(tee_ctx);
> >>>> +
> >>>> + return ret;
> >>>> +}
> >>>> +
> >>>> +static int tee_rproc_remove(struct device *dev)
> >>>> +{
> >>>> + struct tee_rproc *entry, *tmp;
> >>>> +
> >>>> + list_for_each_entry_safe(entry, tmp, &tee_rproc_ctx->sessions, node) {
> >>>> + tee_client_close_session(tee_rproc_ctx->tee_ctx, entry->session_id);
> >>>> + list_del(&entry->node);
> >>>> + if (entry->rsc_table)
> >>>> + iounmap(entry->rsc_table);
> >>>> + kfree(entry);
> >>>> + }
> >>>> +
> >>>> + tee_client_close_context(tee_rproc_ctx->tee_ctx);
> >>>> +
> >>>> + return 0;
> >>>> +}
> >>>> +
> >>>> +MODULE_DEVICE_TABLE(tee, stm32_tee_rproc_id_table);
> >>>> +
> >>>> +static struct tee_client_driver tee_rproc_fw_driver = {
> >>>> + .id_table = stm32_tee_rproc_id_table,
> >>>> + .driver = {
> >>>> + .name = KBUILD_MODNAME,
> >>>> + .bus = &tee_bus_type,
> >>>> + .probe = tee_rproc_probe,
> >>>> + .remove = tee_rproc_remove,
> >>>> + },
> >>>> +};
> >>>> +
> >>>> +static int __init tee_rproc_fw_mod_init(void)
> >>>> +{
> >>>> + return driver_register(&tee_rproc_fw_driver.driver);
> >>>> +}
> >>>> +
> >>>> +static void __exit tee_rproc_fw_mod_exit(void)
> >>>> +{
> >>>> + driver_unregister(&tee_rproc_fw_driver.driver);
> >>>> +}
> >>>> +
> >>>> +module_init(tee_rproc_fw_mod_init);
> >>>> +module_exit(tee_rproc_fw_mod_exit);
> >>>> +
> >>>> +MODULE_DESCRIPTION(" TEE remote processor control driver");
> >>>> +MODULE_LICENSE("GPL");
> >>>> diff --git a/include/linux/remoteproc.h b/include/linux/remoteproc.h
> >>>> index b4795698d8c2..8b678009e481 100644
> >>>> --- a/include/linux/remoteproc.h
> >>>> +++ b/include/linux/remoteproc.h
> >>>> @@ -503,6 +503,8 @@ enum rproc_features {
> >>>> RPROC_MAX_FEATURES,
> >>>> };
> >>>>
> >>>> +struct tee_rproc;
> >>>> +
> >>>> /**
> >>>> * struct rproc - represents a physical remote processor device
> >>>> * @node: list node of this rproc object
> >>>> @@ -545,6 +547,7 @@ enum rproc_features {
> >>>> * @cdev: character device of the rproc
> >>>> * @cdev_put_on_release: flag to indicate if remoteproc should be shutdown on @char_dev release
> >>>> * @features: indicate remoteproc features
> >>>> + * @tee_interface: pointer to the remoteproc tee context
> >>>> */
> >>>> struct rproc {
> >>>> struct list_head node;
> >>>> @@ -586,6 +589,7 @@ struct rproc {
> >>>> struct cdev cdev;
> >>>> bool cdev_put_on_release;
> >>>> DECLARE_BITMAP(features, RPROC_MAX_FEATURES);
> >>>> + struct tee_rproc *tee_interface;
> >>>> };
> >>>>
> >>>> /**
> >>>> diff --git a/include/linux/tee_remoteproc.h b/include/linux/tee_remoteproc.h
> >>>> new file mode 100644
> >>>> index 000000000000..571e47190d02
> >>>> --- /dev/null
> >>>> +++ b/include/linux/tee_remoteproc.h
> >>>> @@ -0,0 +1,112 @@
> >>>> +/* SPDX-License-Identifier: GPL-2.0-or-later */
> >>>> +/*
> >>>> + * Copyright(c) 2024 STMicroelectronics - All Rights Reserved
> >>>> + */
> >>>> +
> >>>> +#ifndef TEE_REMOTEPROC_H
> >>>> +#define TEE_REMOTEPROC_H
> >>>> +
> >>>> +#include <linux/tee_drv.h>
> >>>> +#include <linux/firmware.h>
> >>>> +#include <linux/remoteproc.h>
> >>>> +
> >>>> +struct rproc;
> >>>> +
> >>>> +/**
> >>>> + * struct tee_rproc - TEE remoteproc structure
> >>>> + * @node: Reference in list
> >>>> + * @rproc: Remoteproc reference
> >>>> + * @parent: Parent device
> >>>> + * @rproc_id: Identifier of the target firmware
> >>>> + * @session_id: TEE session identifier
> >>>> + * @rsc_table: Resource table virtual address.
> >>>> + */
> >>>> +struct tee_rproc {
> >>>> + struct list_head node;
> >>>> + struct rproc *rproc;
> >>>> + struct device *parent;
> >>>> + u32 rproc_id;
> >>>> + u32 session_id;
> >>>> + struct resource_table *rsc_table;
> >>>> +};
> >>>> +
> >>>> +#if IS_REACHABLE(CONFIG_TEE_REMOTEPROC)
> >>>> +
> >>>> +struct tee_rproc *tee_rproc_register(struct device *dev, struct rproc *rproc,
> >>>> + unsigned int rproc_id);
> >>>> +int tee_rproc_unregister(struct tee_rproc *trproc);
> >>>> +int tee_rproc_parse_fw(struct rproc *rproc, const struct firmware *fw);
> >>>> +int tee_rproc_load_fw(struct rproc *rproc, const struct firmware *fw);
> >>>> +struct resource_table *tee_rproc_get_loaded_rsc_table(struct rproc *rproc, size_t *table_sz);
> >>>> +struct resource_table *tee_rproc_find_loaded_rsc_table(struct rproc *rproc,
> >>>> + const struct firmware *fw);
> >>>> +int tee_rproc_start(struct rproc *rproc);
> >>>> +int tee_rproc_stop(struct rproc *rproc);
> >>>> +
> >>>> +#else
> >>>> +
> >>>> +static inline struct tee_rproc *tee_rproc_register(struct device *dev, struct rproc *rproc,
> >>>> + unsigned int rproc_id)
> >>>> +{
> >>>> + return ERR_PTR(-ENODEV);
> >>>> +}
> >>>> +
> >>>> +static int tee_rproc_parse_fw(struct rproc *rproc, const struct firmware *fw)
> >>>> +{
> >>>> + /* This shouldn't be possible */
> >>>> + WARN_ON(1);
> >>>> +
> >>>> + return 0;
> >>>> +}
> >>>> +
> >>>> +static inline int tee_rproc_unregister(struct tee_rproc *trproc)
> >>>> +{
> >>>> + /* This shouldn't be possible */
> >>>> + WARN_ON(1);
> >>>> +
> >>>> + return 0;
> >>>> +}
> >>>> +
> >>>> +static inline int tee_rproc_load_fw(struct rproc *rproc, const struct firmware *fw)
> >>>> +{
> >>>> + /* This shouldn't be possible */
> >>>> + WARN_ON(1);
> >>>> +
> >>>> + return 0;
> >>>> +}
> >>>> +
> >>>> +static inline int tee_rproc_start(struct rproc *rproc)
> >>>> +{
> >>>> + /* This shouldn't be possible */
> >>>> + WARN_ON(1);
> >>>> +
> >>>> + return 0;
> >>>> +}
> >>>> +
> >>>> +static inline int tee_rproc_stop(struct rproc *rproc)
> >>>> +{
> >>>> + /* This shouldn't be possible */
> >>>> + WARN_ON(1);
> >>>> +
> >>>> + return 0;
> >>>> +}
> >>>> +
> >>>> +static inline struct resource_table *
> >>>> +tee_rproc_get_loaded_rsc_table(struct rproc *rproc, size_t *table_sz)
> >>>> +{
> >>>> + /* This shouldn't be possible */
> >>>> + WARN_ON(1);
> >>>> +
> >>>> + return NULL;
> >>>> +}
> >>>> +
> >>>> +static inline struct resource_table *
> >>>> +tee_rproc_find_loaded_rsc_table(struct rproc *rproc, const struct firmware *fw)
> >>>> +{
> >>>> + /* This shouldn't be possible */
> >>>> + WARN_ON(1);
> >>>> +
> >>>> + return NULL;
> >>>> +}
> >>>> +#endif /* CONFIG_TEE_REMOTEPROC */
> >>>> +#endif /* TEE_REMOTEPROC_H */
> >>>> --
> >>>> 2.25.1
> >>>>
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^ permalink raw reply
* Re: [PATCH v4 4/4] remoteproc: stm32: Add support of an OP-TEE TA to load the firmware
From: Mathieu Poirier @ 2024-04-01 15:46 UTC (permalink / raw)
To: Arnaud POULIQUEN
Cc: Bjorn Andersson, Jens Wiklander, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, linux-stm32, linux-arm-kernel, linux-remoteproc,
linux-kernel, op-tee, devicetree
In-Reply-To: <2cd23e93-1a3a-4128-b947-35fe2b04ccab@foss.st.com>
On Fri, Mar 29, 2024 at 11:57:43AM +0100, Arnaud POULIQUEN wrote:
>
>
> On 3/27/24 18:14, Mathieu Poirier wrote:
> > On Tue, Mar 26, 2024 at 08:31:33PM +0100, Arnaud POULIQUEN wrote:
> >>
> >>
> >> On 3/25/24 17:51, Mathieu Poirier wrote:
> >>> On Fri, Mar 08, 2024 at 03:47:08PM +0100, Arnaud Pouliquen wrote:
> >>>> The new TEE remoteproc device is used to manage remote firmware in a
> >>>> secure, trusted context. The 'st,stm32mp1-m4-tee' compatibility is
> >>>> introduced to delegate the loading of the firmware to the trusted
> >>>> execution context. In such cases, the firmware should be signed and
> >>>> adhere to the image format defined by the TEE.
> >>>>
> >>>> Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>
> >>>> ---
> >>>> Updates from V3:
> >>>> - remove support of the attach use case. Will be addressed in a separate
> >>>> thread,
> >>>> - add st_rproc_tee_ops::parse_fw ops,
> >>>> - inverse call of devm_rproc_alloc()and tee_rproc_register() to manage cross
> >>>> reference between the rproc struct and the tee_rproc struct in tee_rproc.c.
> >>>> ---
> >>>> drivers/remoteproc/stm32_rproc.c | 60 +++++++++++++++++++++++++++++---
> >>>> 1 file changed, 56 insertions(+), 4 deletions(-)
> >>>>
> >>>> diff --git a/drivers/remoteproc/stm32_rproc.c b/drivers/remoteproc/stm32_rproc.c
> >>>> index 8cd838df4e92..13df33c78aa2 100644
> >>>> --- a/drivers/remoteproc/stm32_rproc.c
> >>>> +++ b/drivers/remoteproc/stm32_rproc.c
> >>>> @@ -20,6 +20,7 @@
> >>>> #include <linux/remoteproc.h>
> >>>> #include <linux/reset.h>
> >>>> #include <linux/slab.h>
> >>>> +#include <linux/tee_remoteproc.h>
> >>>> #include <linux/workqueue.h>
> >>>>
> >>>> #include "remoteproc_internal.h"
> >>>> @@ -49,6 +50,9 @@
> >>>> #define M4_STATE_STANDBY 4
> >>>> #define M4_STATE_CRASH 5
> >>>>
> >>>> +/* Remote processor unique identifier aligned with the Trusted Execution Environment definitions */
> >>>
> >>> Why is this the case? At least from the kernel side it is possible to call
> >>> tee_rproc_register() with any kind of value, why is there a need to be any
> >>> kind of alignment with the TEE?
> >>
> >>
> >> The use of the proc_id is to identify a processor in case of multi co-processors.
> >>
> >
> > That is well understood.
> >
> >> For instance we can have a system with A DSP and a modem. We would use the same
> >> TEE service, but
> >
> > That too.
> >
> >> the TEE driver will probably be different, same for the signature key.
> >
> > What TEE driver are we talking about here?
>
> In OP-TEE remoteproc frameork is divided in 2 or 3 layers:
>
> - the remoteproc Trusted Application (TA) [1] which is platform agnostic
> - The remoteproc Pseudo Trusted Application (PTA) [2] which is platform
> dependent and can rely on the proc ID to retrieve the context.
> - the remoteproc driver (optional for some platforms) [3], which is in charge
> of DT parsing and platform configuration.
>
That part makes sense.
> Here TEE driver can be interpreted by remote PTA and/or platform driver.
>
I have to guess PTA means "Platform Trusted Application" but I have no
guarantee, adding to the level of (already high) confusion brought on by this
patchset.
> [1]
> https://elixir.bootlin.com/op-tee/latest/source/ta/remoteproc/src/remoteproc_core.c
> [2]
> https://elixir.bootlin.com/op-tee/latest/source/core/pta/stm32mp/remoteproc_pta.c
> [3]
> https://elixir.bootlin.com/op-tee/latest/source/core/drivers/remoteproc/stm32_remoteproc.c
>
> >
> >> In such case the proc ID allows to identify the the processor you want to address.
> >>
> >
> > That too is well understood, but there is no alignment needed with the TEE, i.e
> > the TEE application is not expecting a value of '0'. We could set
> > STM32_MP1_M4_PROC_ID to 0xDEADBEEF and things would work. This driver won't go
> > anywhere for as long as it is not the case.
>
>
> Here I suppose that you do not challenge the rproc_ID use in general, but for
> the stm32mp1 platform as we have only one remote processor. I'm right?
That is correct - I understand the need for an rproc_ID. The problem is with
the comment that states that '0' is aligned with the TEE definitions, which in
my head means hard coded value and a big red flag. What it should say is
"aligned with the TEE device tree definition".
>
> In OP-TEE the check is done here:
> https://elixir.bootlin.com/op-tee/latest/source/core/drivers/remoteproc/stm32_remoteproc.c#L64
>
> If driver does not register the proc ID an error is returned indicating that the
> feature is not supported.
>
> In case of stm32mp1 yes we could consider it as useless as we have only one
> remote proc.
>
> Nevertheless I can not guaranty that a customer will not add an external
> companion processor that uses OP-TEE to authenticate the associated firmware. As
> the trusted Application is the unique entry point. he will need the proc_id to
> identify the target at PTA level.
>
> So from my point of view having a proc ID on stm32MP1 (and on stm32mp2 that will
> reuse same driver) aligned between Linux and OP-TEE is useful.
I agree, for as long as it is not hard coded. The way remote processors are
discovered in the DT is perfectly acceptable, i.e the first remote processor is
for application X, the second for application Y...
>
> That said using a TEE_REMOTEPROC_DEFAULT_ID is something that could be
> more generic (for linux and OP-TEE). This ID could be reuse in the stm32mp
> driver and platform drivers with an unique internal remote processor.
>
I can't find the definition of TEE_REMOTEPROC_DEFAULT_ID anywhere, something
that doesn't help the confusion I referred to above.
> It that solution would be ok for you?
>
> Regards,
> Arnaud
>
>
> >
> >>
> >>>
> >>>> +#define STM32_MP1_M4_PROC_ID 0
> >>>> +
> >>>> struct stm32_syscon {
> >>>> struct regmap *map;
> >>>> u32 reg;
> >>>> @@ -257,6 +261,19 @@ static int stm32_rproc_release(struct rproc *rproc)
> >>>> return 0;
> >>>> }
> >>>>
> >>>> +static int stm32_rproc_tee_stop(struct rproc *rproc)
> >>>> +{
> >>>> + int err;
> >>>> +
> >>>> + stm32_rproc_request_shutdown(rproc);
> >>>> +
> >>>> + err = tee_rproc_stop(rproc);
> >>>> + if (err)
> >>>> + return err;
> >>>> +
> >>>> + return stm32_rproc_release(rproc);
> >>>> +}
> >>>> +
> >>>> static int stm32_rproc_prepare(struct rproc *rproc)
> >>>> {
> >>>> struct device *dev = rproc->dev.parent;
> >>>> @@ -693,8 +710,19 @@ static const struct rproc_ops st_rproc_ops = {
> >>>> .get_boot_addr = rproc_elf_get_boot_addr,
> >>>> };
> >>>>
> >>>> +static const struct rproc_ops st_rproc_tee_ops = {
> >>>> + .prepare = stm32_rproc_prepare,
> >>>> + .start = tee_rproc_start,
> >>>> + .stop = stm32_rproc_tee_stop,
> >>>> + .kick = stm32_rproc_kick,
> >>>> + .load = tee_rproc_load_fw,
> >>>> + .parse_fw = tee_rproc_parse_fw,
> >>>> + .find_loaded_rsc_table = tee_rproc_find_loaded_rsc_table,
> >>>> +};
> >>>> +
> >>>> static const struct of_device_id stm32_rproc_match[] = {
> >>>> - { .compatible = "st,stm32mp1-m4" },
> >>>> + {.compatible = "st,stm32mp1-m4",},
> >>>> + {.compatible = "st,stm32mp1-m4-tee",},
> >>>> {},
> >>>> };
> >>>> MODULE_DEVICE_TABLE(of, stm32_rproc_match);
> >>>> @@ -853,6 +881,7 @@ static int stm32_rproc_probe(struct platform_device *pdev)
> >>>> struct device *dev = &pdev->dev;
> >>>> struct stm32_rproc *ddata;
> >>>> struct device_node *np = dev->of_node;
> >>>> + struct tee_rproc *trproc = NULL;
> >>>> struct rproc *rproc;
> >>>> unsigned int state;
> >>>> int ret;
> >>>> @@ -861,9 +890,26 @@ static int stm32_rproc_probe(struct platform_device *pdev)
> >>>> if (ret)
> >>>> return ret;
> >>>>
> >>>> - rproc = devm_rproc_alloc(dev, np->name, &st_rproc_ops, NULL, sizeof(*ddata));
> >>>> - if (!rproc)
> >>>> - return -ENOMEM;
> >>>> + if (of_device_is_compatible(np, "st,stm32mp1-m4-tee")) {
> >>>> + /*
> >>>> + * Delegate the firmware management to the secure context.
> >>>> + * The firmware loaded has to be signed.
> >>>> + */
> >>>> + rproc = devm_rproc_alloc(dev, np->name, &st_rproc_tee_ops, NULL, sizeof(*ddata));
> >>>> + if (!rproc)
> >>>> + return -ENOMEM;
> >>>> +
> >>>> + trproc = tee_rproc_register(dev, rproc, STM32_MP1_M4_PROC_ID);
> >>>> + if (IS_ERR(trproc)) {
> >>>> + dev_err_probe(dev, PTR_ERR(trproc),
> >>>> + "signed firmware not supported by TEE\n");
> >>>> + return PTR_ERR(trproc);
> >>>> + }
> >>>> + } else {
> >>>> + rproc = devm_rproc_alloc(dev, np->name, &st_rproc_ops, NULL, sizeof(*ddata));
> >>>> + if (!rproc)
> >>>> + return -ENOMEM;
> >>>> + }
> >>>>
> >>>> ddata = rproc->priv;
> >>>>
> >>>> @@ -915,6 +961,9 @@ static int stm32_rproc_probe(struct platform_device *pdev)
> >>>> dev_pm_clear_wake_irq(dev);
> >>>> device_init_wakeup(dev, false);
> >>>> }
> >>>> + if (trproc)
> >>>
> >>> if (rproc->tee_interface)
> >>>
> >>>
> >>> I am done reviewing this set.
> >>
> >> Thank for your review!
> >> Arnaud
> >>
> >>>
> >>> Thanks,
> >>> Mathieu
> >>>
> >>>> + tee_rproc_unregister(trproc);
> >>>> +
> >>>> return ret;
> >>>> }
> >>>>
> >>>> @@ -935,6 +984,9 @@ static void stm32_rproc_remove(struct platform_device *pdev)
> >>>> dev_pm_clear_wake_irq(dev);
> >>>> device_init_wakeup(dev, false);
> >>>> }
> >>>> + if (rproc->tee_interface)
> >>>> + tee_rproc_unregister(rproc->tee_interface);
> >>>> +
> >>>> }
> >>>>
> >>>> static int stm32_rproc_suspend(struct device *dev)
> >>>> --
> >>>> 2.25.1
> >>>>
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* [PATCH RFT 10/10] arm64: dts: microchip: sparx5_pcb135: drop duplicated NOR flash
From: Krzysztof Kozlowski @ 2024-04-01 15:37 UTC (permalink / raw)
To: Conor Dooley, Nicolas Ferre, Claudiu Beznea, Rob Herring,
Krzysztof Kozlowski, Lars Povlsen, Steen Hegelund, Daniel Machon,
UNGLinuxDriver, David S. Miller, Bjarni Jonasson,
linux-arm-kernel, devicetree, linux-kernel
Cc: Krzysztof Kozlowski
In-Reply-To: <20240401153740.123978-1-krzk@kernel.org>
Since beginning the DTS extended the SPI0 in two places adding two SPI
muxes, each with same SPI NOR flash. Both used exactly the same
chip-selects, so this was clearly buggy code. Without checking in
datasheet, assume device has only one SPI NOR flash, so code was
duplicated.
Fixes dtc W=1 warnings:
sparx5_pcb135_board.dtsi:92.10-96.4: Warning (unique_unit_address_if_enabled): /axi@600000000/spi@600104000/flash@0: duplicate unit-address (also used in node /axi@600000000/spi@600104000/spi@0)
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
---
Not tested on hardware
---
.../boot/dts/microchip/sparx5_pcb135_board.dtsi | 16 ----------------
1 file changed, 16 deletions(-)
diff --git a/arch/arm64/boot/dts/microchip/sparx5_pcb135_board.dtsi b/arch/arm64/boot/dts/microchip/sparx5_pcb135_board.dtsi
index 20016efb3656..d64e642e3873 100644
--- a/arch/arm64/boot/dts/microchip/sparx5_pcb135_board.dtsi
+++ b/arch/arm64/boot/dts/microchip/sparx5_pcb135_board.dtsi
@@ -96,22 +96,6 @@ flash@0 {
};
};
-&spi0 {
- status = "okay";
- spi@0 {
- compatible = "spi-mux";
- mux-controls = <&mux>;
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0>; /* CS0 */
- flash@9 {
- compatible = "jedec,spi-nor";
- spi-max-frequency = <8000000>;
- reg = <0x9>; /* SPI */
- };
- };
-};
-
&sgpio1 {
status = "okay";
microchip,sgpio-port-ranges = <24 31>;
--
2.34.1
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* [PATCH RFT 09/10] arm64: dts: microchip: sparx5_pcb134: drop duplicated NOR flash
From: Krzysztof Kozlowski @ 2024-04-01 15:37 UTC (permalink / raw)
To: Conor Dooley, Nicolas Ferre, Claudiu Beznea, Rob Herring,
Krzysztof Kozlowski, Lars Povlsen, Steen Hegelund, Daniel Machon,
UNGLinuxDriver, David S. Miller, Bjarni Jonasson,
linux-arm-kernel, devicetree, linux-kernel
Cc: Krzysztof Kozlowski
In-Reply-To: <20240401153740.123978-1-krzk@kernel.org>
Since beginning the DTS extended the SPI0 in two places adding two SPI
muxes, each with same SPI NOR flash. Both used exactly the same
chip-selects, so this was clearly buggy code. Without checking in
datasheet, assume device has only one SPI NOR flash, so code was
duplicated.
Fixes dtc W=1 warnings:
sparx5_pcb134_board.dtsi:277.10-281.4: Warning (unique_unit_address_if_enabled): /axi@600000000/spi@600104000/flash@0: duplicate unit-address (also used in node /axi@600000000/spi@600104000/spi@0)
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
---
Not tested on hardware
---
.../boot/dts/microchip/sparx5_pcb134_board.dtsi | 16 ----------------
1 file changed, 16 deletions(-)
diff --git a/arch/arm64/boot/dts/microchip/sparx5_pcb134_board.dtsi b/arch/arm64/boot/dts/microchip/sparx5_pcb134_board.dtsi
index f165a409bc1d..dc7b59dfcb40 100644
--- a/arch/arm64/boot/dts/microchip/sparx5_pcb134_board.dtsi
+++ b/arch/arm64/boot/dts/microchip/sparx5_pcb134_board.dtsi
@@ -281,22 +281,6 @@ flash@0 {
};
};
-&spi0 {
- status = "okay";
- spi@0 {
- compatible = "spi-mux";
- mux-controls = <&mux>;
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0>; /* CS0 */
- flash@9 {
- compatible = "jedec,spi-nor";
- spi-max-frequency = <8000000>;
- reg = <0x9>; /* SPI */
- };
- };
-};
-
&sgpio0 {
status = "okay";
microchip,sgpio-port-ranges = <8 15>;
--
2.34.1
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* [PATCH 08/10] arm64: dts: microchip: sparx5_pcb135: drop LED unit addresses
From: Krzysztof Kozlowski @ 2024-04-01 15:37 UTC (permalink / raw)
To: Conor Dooley, Nicolas Ferre, Claudiu Beznea, Rob Herring,
Krzysztof Kozlowski, Lars Povlsen, Steen Hegelund, Daniel Machon,
UNGLinuxDriver, David S. Miller, Bjarni Jonasson,
linux-arm-kernel, devicetree, linux-kernel
Cc: Krzysztof Kozlowski
In-Reply-To: <20240401153740.123978-1-krzk@kernel.org>
GPIO leds should not have unit addresses (no "reg" property), as
reported by dtc W=1 warnings:
sparx5_pcb135_board.dtsi:18.9-22.5: Warning (unit_address_vs_reg): /leds/led@0: node has a unit name, but no reg or ranges property
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
---
.../boot/dts/microchip/sparx5_pcb135_board.dtsi | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/arch/arm64/boot/dts/microchip/sparx5_pcb135_board.dtsi b/arch/arm64/boot/dts/microchip/sparx5_pcb135_board.dtsi
index 860975ffe0a1..20016efb3656 100644
--- a/arch/arm64/boot/dts/microchip/sparx5_pcb135_board.dtsi
+++ b/arch/arm64/boot/dts/microchip/sparx5_pcb135_board.dtsi
@@ -15,42 +15,42 @@ gpio-restart {
leds {
compatible = "gpio-leds";
- led@0 {
+ led-0 {
label = "eth60:yellow";
gpios = <&sgpio_out1 28 0 GPIO_ACTIVE_LOW>;
default-state = "off";
};
- led@1 {
+ led-1 {
label = "eth60:green";
gpios = <&sgpio_out1 28 1 GPIO_ACTIVE_LOW>;
default-state = "off";
};
- led@2 {
+ led-2 {
label = "eth61:yellow";
gpios = <&sgpio_out1 29 0 GPIO_ACTIVE_LOW>;
default-state = "off";
};
- led@3 {
+ led-3 {
label = "eth61:green";
gpios = <&sgpio_out1 29 1 GPIO_ACTIVE_LOW>;
default-state = "off";
};
- led@4 {
+ led-4 {
label = "eth62:yellow";
gpios = <&sgpio_out1 30 0 GPIO_ACTIVE_LOW>;
default-state = "off";
};
- led@5 {
+ led-5 {
label = "eth62:green";
gpios = <&sgpio_out1 30 1 GPIO_ACTIVE_LOW>;
default-state = "off";
};
- led@6 {
+ led-6 {
label = "eth63:yellow";
gpios = <&sgpio_out1 31 0 GPIO_ACTIVE_LOW>;
default-state = "off";
};
- led@7 {
+ led-7 {
label = "eth63:green";
gpios = <&sgpio_out1 31 1 GPIO_ACTIVE_LOW>;
default-state = "off";
--
2.34.1
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