* Re: [PATCH v1 2/3] arm64: mm: Handle invalid large leaf mappings correctly
From: Yang Shi @ 2026-03-24 18:20 UTC (permalink / raw)
To: Ryan Roberts, Catalin Marinas, Will Deacon,
David Hildenbrand (Arm), Dev Jain, Suzuki K Poulose, Jinjiang Tu,
Kevin Brodsky
Cc: linux-arm-kernel, linux-kernel, stable
In-Reply-To: <20260323130317.1737522-3-ryan.roberts@arm.com>
On 3/23/26 6:03 AM, Ryan Roberts wrote:
> It has been possible for a long time to mark ptes in the linear map as
> invalid. This is done for secretmem, kfence, realm dma memory un/share,
> and others, by simply clearing the PTE_VALID bit. But until commit
> a166563e7ec37 ("arm64: mm: support large block mapping when
> rodata=full") large leaf mappings were never made invalid in this way.
>
> It turns out various parts of the code base are not equipped to handle
> invalid large leaf mappings (in the way they are currently encoded) and
> I've observed a kernel panic while booting a realm guest on a
> BBML2_NOABORT system as a result:
>
> [ 15.432706] software IO TLB: Memory encryption is active and system is using DMA bounce buffers
> [ 15.476896] Unable to handle kernel paging request at virtual address ffff000019600000
> [ 15.513762] Mem abort info:
> [ 15.527245] ESR = 0x0000000096000046
> [ 15.548553] EC = 0x25: DABT (current EL), IL = 32 bits
> [ 15.572146] SET = 0, FnV = 0
> [ 15.592141] EA = 0, S1PTW = 0
> [ 15.612694] FSC = 0x06: level 2 translation fault
> [ 15.640644] Data abort info:
> [ 15.661983] ISV = 0, ISS = 0x00000046, ISS2 = 0x00000000
> [ 15.694875] CM = 0, WnR = 1, TnD = 0, TagAccess = 0
> [ 15.723740] GCS = 0, Overlay = 0, DirtyBit = 0, Xs = 0
> [ 15.755776] swapper pgtable: 4k pages, 48-bit VAs, pgdp=0000000081f3f000
> [ 15.800410] [ffff000019600000] pgd=0000000000000000, p4d=180000009ffff403, pud=180000009fffe403, pmd=00e8000199600704
> [ 15.855046] Internal error: Oops: 0000000096000046 [#1] SMP
> [ 15.886394] Modules linked in:
> [ 15.900029] CPU: 0 UID: 0 PID: 1 Comm: swapper/0 Not tainted 7.0.0-rc4-dirty #4 PREEMPT
> [ 15.935258] Hardware name: linux,dummy-virt (DT)
> [ 15.955612] pstate: 21400005 (nzCv daif +PAN -UAO -TCO +DIT -SSBS BTYPE=--)
> [ 15.986009] pc : __pi_memcpy_generic+0x128/0x22c
> [ 16.006163] lr : swiotlb_bounce+0xf4/0x158
> [ 16.024145] sp : ffff80008000b8f0
> [ 16.038896] x29: ffff80008000b8f0 x28: 0000000000000000 x27: 0000000000000000
> [ 16.069953] x26: ffffb3976d261ba8 x25: 0000000000000000 x24: ffff000019600000
> [ 16.100876] x23: 0000000000000001 x22: ffff0000043430d0 x21: 0000000000007ff0
> [ 16.131946] x20: 0000000084570010 x19: 0000000000000000 x18: ffff00001ffe3fcc
> [ 16.163073] x17: 0000000000000000 x16: 00000000003fffff x15: 646e612065766974
> [ 16.194131] x14: 0000000000000000 x13: 0000000000000000 x12: 0000000000000000
> [ 16.225059] x11: 0000000000000000 x10: 0000000000000010 x9 : 0000000000000018
> [ 16.256113] x8 : 0000000000000018 x7 : 0000000000000000 x6 : 0000000000000000
> [ 16.287203] x5 : ffff000019607ff0 x4 : ffff000004578000 x3 : ffff000019600000
> [ 16.318145] x2 : 0000000000007ff0 x1 : ffff000004570010 x0 : ffff000019600000
> [ 16.349071] Call trace:
> [ 16.360143] __pi_memcpy_generic+0x128/0x22c (P)
> [ 16.380310] swiotlb_tbl_map_single+0x154/0x2b4
> [ 16.400282] swiotlb_map+0x5c/0x228
> [ 16.415984] dma_map_phys+0x244/0x2b8
> [ 16.432199] dma_map_page_attrs+0x44/0x58
> [ 16.449782] virtqueue_map_page_attrs+0x38/0x44
> [ 16.469596] virtqueue_map_single_attrs+0xc0/0x130
> [ 16.490509] virtnet_rq_alloc.isra.0+0xa4/0x1fc
> [ 16.510355] try_fill_recv+0x2a4/0x584
> [ 16.526989] virtnet_open+0xd4/0x238
> [ 16.542775] __dev_open+0x110/0x24c
> [ 16.558280] __dev_change_flags+0x194/0x20c
> [ 16.576879] netif_change_flags+0x24/0x6c
> [ 16.594489] dev_change_flags+0x48/0x7c
> [ 16.611462] ip_auto_config+0x258/0x1114
> [ 16.628727] do_one_initcall+0x80/0x1c8
> [ 16.645590] kernel_init_freeable+0x208/0x2f0
> [ 16.664917] kernel_init+0x24/0x1e0
> [ 16.680295] ret_from_fork+0x10/0x20
> [ 16.696369] Code: 927cec03 cb0e0021 8b0e0042 a9411c26 (a900340c)
> [ 16.723106] ---[ end trace 0000000000000000 ]---
> [ 16.752866] Kernel panic - not syncing: Attempted to kill init! exitcode=0x0000000b
> [ 16.792556] Kernel Offset: 0x3396ea200000 from 0xffff800080000000
> [ 16.818966] PHYS_OFFSET: 0xfff1000080000000
> [ 16.837237] CPU features: 0x0000000,00060005,13e38581,957e772f
> [ 16.862904] Memory Limit: none
> [ 16.876526] ---[ end Kernel panic - not syncing: Attempted to kill init! exitcode=0x0000000b ]---
>
> This panic occurs because the swiotlb memory was previously shared to
> the host (__set_memory_enc_dec()), which involves transitioning the
> (large) leaf mappings to invalid, sharing to the host, then marking the
> mappings valid again. But pageattr_p[mu]d_entry() would only update the
> entry if it is a section mapping, since otherwise it concluded it must
> be a table entry so shouldn't be modified. But p[mu]d_sect() only
> returns true if the entry is valid. So the result was that the large
> leaf entry was made invalid in the first pass then ignored in the second
> pass. It remains invalid until the above code tries to access it and
> blows up.
Good catch. I recall I met this problem when I worked on a very early
PoC of large block mapping patch. It took a total different approach
than BBML2_NOABORT. I didn't run into that problem when I implemented
BBML2_NOABORT because nobody actually changed valid/invalid attribute on
large block mapping granule so I forgot it. But I definitely missed
realm usecase.
>
> The simple fix would be to update pageattr_pmd_entry() to use
> !pmd_table() instead of pmd_sect(). That would solve this problem.
Yes, I agree.
>
> But the ptdump code also suffers from a similar issue. It checks
> pmd_leaf() and doesn't call into the arch-specific note_page() machinery
> if it returns false. As a result of this, ptdump wasn't even able to
> show the invalid large leaf mappings; it looked like they were valid
> which made this super fun to debug. the ptdump code is core-mm and
> pmd_table() is arm64-specific so we can't use the same trick to solve
> that.
I don't quite get why we need to show invalid mappings in ptdump? IIUC
ptdump is not supposed to show invalid mappings even though they are
transient.
Thanks,
Yang
>
> But we already support the concept of "present-invalid" for user space
> entries. And even better, pmd_leaf() will return true for a leaf mapping
> that is marked present-invalid. So let's just use that encoding for
> present-invalid kernel mappings too. Then we can use pmd_leaf() where we
> previously used pmd_sect() and everything is magically fixed.
>
> Additionally, from inspection kernel_page_present() was broken in a
> similar way, so I'm also updating that to use pmd_leaf().
>
> I haven't spotted any other issues of this shape but plan to do a follow
> up patch to remove pmd_sect() and pud_sect() in favour of the more
> sophisticated pmd_leaf()/pud_leaf() which are core-mm APIs and will
> simplify arm64 code a bit.
>
> Fixes: a166563e7ec37 ("arm64: mm: support large block mapping when rodata=full")
> Cc: stable@vger.kernel.org
> Signed-off-by: Ryan Roberts <ryan.roberts@arm.com>
> ---
> arch/arm64/mm/pageattr.c | 50 ++++++++++++++++++++++------------------
> 1 file changed, 28 insertions(+), 22 deletions(-)
>
> diff --git a/arch/arm64/mm/pageattr.c b/arch/arm64/mm/pageattr.c
> index 358d1dc9a576f..87dfe4c82fa92 100644
> --- a/arch/arm64/mm/pageattr.c
> +++ b/arch/arm64/mm/pageattr.c
> @@ -25,6 +25,11 @@ static ptdesc_t set_pageattr_masks(ptdesc_t val, struct mm_walk *walk)
> {
> struct page_change_data *masks = walk->private;
>
> + /*
> + * Some users clear and set bits which alias eachother (e.g. PTE_NG and
> + * PTE_PRESENT_INVALID). It is therefore important that we always clear
> + * first then set.
> + */
> val &= ~(pgprot_val(masks->clear_mask));
> val |= (pgprot_val(masks->set_mask));
>
> @@ -36,7 +41,7 @@ static int pageattr_pud_entry(pud_t *pud, unsigned long addr,
> {
> pud_t val = pudp_get(pud);
>
> - if (pud_sect(val)) {
> + if (pud_leaf(val)) {
> if (WARN_ON_ONCE((next - addr) != PUD_SIZE))
> return -EINVAL;
> val = __pud(set_pageattr_masks(pud_val(val), walk));
> @@ -52,7 +57,7 @@ static int pageattr_pmd_entry(pmd_t *pmd, unsigned long addr,
> {
> pmd_t val = pmdp_get(pmd);
>
> - if (pmd_sect(val)) {
> + if (pmd_leaf(val)) {
> if (WARN_ON_ONCE((next - addr) != PMD_SIZE))
> return -EINVAL;
> val = __pmd(set_pageattr_masks(pmd_val(val), walk));
> @@ -132,11 +137,12 @@ static int __change_memory_common(unsigned long start, unsigned long size,
> ret = update_range_prot(start, size, set_mask, clear_mask);
>
> /*
> - * If the memory is being made valid without changing any other bits
> - * then a TLBI isn't required as a non-valid entry cannot be cached in
> - * the TLB.
> + * If the memory is being switched from present-invalid to valid without
> + * changing any other bits then a TLBI isn't required as a non-valid
> + * entry cannot be cached in the TLB.
> */
> - if (pgprot_val(set_mask) != PTE_VALID || pgprot_val(clear_mask))
> + if (pgprot_val(set_mask) != (PTE_MAYBE_NG | PTE_VALID) ||
> + pgprot_val(clear_mask) != PTE_PRESENT_INVALID)
> flush_tlb_kernel_range(start, start + size);
> return ret;
> }
> @@ -237,18 +243,18 @@ int set_memory_valid(unsigned long addr, int numpages, int enable)
> {
> if (enable)
> return __change_memory_common(addr, PAGE_SIZE * numpages,
> - __pgprot(PTE_VALID),
> - __pgprot(0));
> + __pgprot(PTE_MAYBE_NG | PTE_VALID),
> + __pgprot(PTE_PRESENT_INVALID));
> else
> return __change_memory_common(addr, PAGE_SIZE * numpages,
> - __pgprot(0),
> - __pgprot(PTE_VALID));
> + __pgprot(PTE_PRESENT_INVALID),
> + __pgprot(PTE_MAYBE_NG | PTE_VALID));
> }
>
> int set_direct_map_invalid_noflush(struct page *page)
> {
> - pgprot_t clear_mask = __pgprot(PTE_VALID);
> - pgprot_t set_mask = __pgprot(0);
> + pgprot_t clear_mask = __pgprot(PTE_MAYBE_NG | PTE_VALID);
> + pgprot_t set_mask = __pgprot(PTE_PRESENT_INVALID);
>
> if (!can_set_direct_map())
> return 0;
> @@ -259,8 +265,8 @@ int set_direct_map_invalid_noflush(struct page *page)
>
> int set_direct_map_default_noflush(struct page *page)
> {
> - pgprot_t set_mask = __pgprot(PTE_VALID | PTE_WRITE);
> - pgprot_t clear_mask = __pgprot(PTE_RDONLY);
> + pgprot_t set_mask = __pgprot(PTE_MAYBE_NG | PTE_VALID | PTE_WRITE);
> + pgprot_t clear_mask = __pgprot(PTE_PRESENT_INVALID | PTE_RDONLY);
>
> if (!can_set_direct_map())
> return 0;
> @@ -296,8 +302,8 @@ static int __set_memory_enc_dec(unsigned long addr,
> * entries or Synchronous External Aborts caused by RIPAS_EMPTY
> */
> ret = __change_memory_common(addr, PAGE_SIZE * numpages,
> - __pgprot(set_prot),
> - __pgprot(clear_prot | PTE_VALID));
> + __pgprot(set_prot | PTE_PRESENT_INVALID),
> + __pgprot(clear_prot | PTE_MAYBE_NG | PTE_VALID));
>
> if (ret)
> return ret;
> @@ -311,8 +317,8 @@ static int __set_memory_enc_dec(unsigned long addr,
> return ret;
>
> return __change_memory_common(addr, PAGE_SIZE * numpages,
> - __pgprot(PTE_VALID),
> - __pgprot(0));
> + __pgprot(PTE_MAYBE_NG | PTE_VALID),
> + __pgprot(PTE_PRESENT_INVALID));
> }
>
> static int realm_set_memory_encrypted(unsigned long addr, int numpages)
> @@ -404,15 +410,15 @@ bool kernel_page_present(struct page *page)
> pud = READ_ONCE(*pudp);
> if (pud_none(pud))
> return false;
> - if (pud_sect(pud))
> - return true;
> + if (pud_leaf(pud))
> + return pud_valid(pud);
>
> pmdp = pmd_offset(pudp, addr);
> pmd = READ_ONCE(*pmdp);
> if (pmd_none(pmd))
> return false;
> - if (pmd_sect(pmd))
> - return true;
> + if (pmd_leaf(pmd))
> + return pmd_valid(pmd);
>
> ptep = pte_offset_kernel(pmdp, addr);
> return pte_valid(__ptep_get(ptep));
^ permalink raw reply
* Re: [PATCH 1/1] arm64: dts: imx95: Move funnel outside from soc
From: Frank Li @ 2026-03-24 18:24 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Sascha Hauer,
Pengutronix Kernel Team, Fabio Estevam, Alexander Stein
Cc: devicetree, imx, linux-arm-kernel, linux-kernel
In-Reply-To: <20260313141305.1844209-1-alexander.stein@ew.tq-group.com>
On Fri, 13 Mar 2026 15:13:04 +0100, Alexander Stein wrote:
> The 'funnel' node does not contain a register range, so it should
> be placed outside of the soc node to fix schema warnings from
> simple-bus.yaml.
> Change is similar to commit 9cfe3c892b761 ("arm64: dts: imx8mp: Move
> funnel outside from soc")
>
>
> [...]
Applied, thanks!
[1/1] arm64: dts: imx95: Move funnel outside from soc
commit: ec5de824033f29f5ed041b178078f8c9344b6fec
Best regards,
--
Frank Li <Frank.Li@nxp.com>
^ permalink raw reply
* [PATCH 00/10] i2c: Replace dev_err() with dev_err_probe()
From: Atharv Dubey @ 2026-03-24 18:26 UTC (permalink / raw)
To: Till Harbaum, Andi Shyti, Laxman Dewangan, Dmitry Osipenko,
Thierry Reding, Jonathan Hunter, Chen-Yu Tsai, Jernej Skrabec,
Samuel Holland, Pierre-Yves MORDRET, Alain Volmat,
Maxime Coquelin, Alexandre Torgue, Patrice Chotard, Orson Zhai,
Baolin Wang, Chunyan Zhang, Jean Delvare
Cc: linux-i2c, linux-kernel, linux-tegra, linux-arm-kernel,
linux-sunxi, linux-stm32, Enrico Zanda, Atharv Dubey
This patch series replaces dev_err() with dev_err_probe() in the probe()
functions of each module.
This simplifies the code and improves logs.
---
This Patch series was intially sent out by Encrio[1],
this series is an effort to get it reviewed and upstream
it.
[1]: https://lore.kernel.org/all/20250520194400.341079-3-e.zanda1@gmail.com/t/#u
---
Enrico Zanda (10):
i2c: tiny-usb: Replace dev_err() with dev_err_probe() in probe function
i2c: tegra: Replace dev_err() with dev_err_probe() in probe function
i2c: sun6i-p2wi: Replace dev_err() with dev_err_probe() in probe function
i2c: stm32f7: Replace dev_err() with dev_err_probe() in probe function
i2c: stm32f4: Replace dev_err() with dev_err_probe() in probe function
i2c: stm32: Replace dev_err() with dev_err_probe() in probe function
i2c: st: Replace dev_err() with dev_err_probe() in probe function
i2c: sprd: Replace dev_err() with dev_err_probe() in probe function
i2c: sis96x: Replace dev_err() with dev_err_probe() in probe function
i2c: sis630: Replace dev_err() with dev_err_probe() in probe function
drivers/i2c/busses/i2c-sis630.c | 31 +++++++--------
drivers/i2c/busses/i2c-sis96x.c | 30 +++++++-------
drivers/i2c/busses/i2c-sprd.c | 13 +++----
drivers/i2c/busses/i2c-st.c | 34 +++++++---------
drivers/i2c/busses/i2c-stm32.c | 4 +-
drivers/i2c/busses/i2c-stm32f4.c | 53 ++++++++++---------------
drivers/i2c/busses/i2c-stm32f7.c | 78 ++++++++++++++-----------------------
drivers/i2c/busses/i2c-sun6i-p2wi.c | 55 ++++++++++----------------
drivers/i2c/busses/i2c-tegra.c | 12 +++---
drivers/i2c/busses/i2c-tiny-usb.c | 5 +--
10 files changed, 127 insertions(+), 188 deletions(-)
---
base-commit: c612261bedd6bbab7109f798715e449c9d20ff2f
change-id: 20260324-deverr-4b0b0e50195c
Best regards,
--
Atharv Dubey <atharvd440@gmail.com>
^ permalink raw reply
* [PATCH 01/10] i2c: tiny-usb: Replace dev_err() with dev_err_probe() in probe function
From: Atharv Dubey @ 2026-03-24 18:26 UTC (permalink / raw)
To: Till Harbaum, Andi Shyti, Laxman Dewangan, Dmitry Osipenko,
Thierry Reding, Jonathan Hunter, Chen-Yu Tsai, Jernej Skrabec,
Samuel Holland, Pierre-Yves MORDRET, Alain Volmat,
Maxime Coquelin, Alexandre Torgue, Patrice Chotard, Orson Zhai,
Baolin Wang, Chunyan Zhang, Jean Delvare
Cc: linux-i2c, linux-kernel, linux-tegra, linux-arm-kernel,
linux-sunxi, linux-stm32, Enrico Zanda, Atharv Dubey
In-Reply-To: <20260324-deverr-v1-0-7e591cce33a3@gmail.com>
From: Enrico Zanda <e.zanda1@gmail.com>
This simplifies the code while improving log.
Signed-off-by: Enrico Zanda <e.zanda1@gmail.com>
Signed-off-by: Atharv Dubey <atharvd440@gmail.com>
---
drivers/i2c/busses/i2c-tiny-usb.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/i2c/busses/i2c-tiny-usb.c b/drivers/i2c/busses/i2c-tiny-usb.c
index 9ef495f88ef2..0637c71126f9 100644
--- a/drivers/i2c/busses/i2c-tiny-usb.c
+++ b/drivers/i2c/busses/i2c-tiny-usb.c
@@ -260,9 +260,8 @@ static int i2c_tiny_usb_probe(struct usb_interface *interface,
dev->usb_dev->bus->busnum, dev->usb_dev->devnum);
if (usb_write(&dev->adapter, CMD_SET_DELAY, delay, 0, NULL, 0) != 0) {
- dev_err(&dev->adapter.dev,
- "failure setting delay to %dus\n", delay);
- retval = -EIO;
+ retval = dev_err_probe(&dev->adapter.dev, -EIO,
+ "failure setting delay to %dus\n", delay);
goto error;
}
--
2.43.0
^ permalink raw reply related
* [PATCH 02/10] i2c: tegra: Replace dev_err() with dev_err_probe() in probe function
From: Atharv Dubey @ 2026-03-24 18:26 UTC (permalink / raw)
To: Till Harbaum, Andi Shyti, Laxman Dewangan, Dmitry Osipenko,
Thierry Reding, Jonathan Hunter, Chen-Yu Tsai, Jernej Skrabec,
Samuel Holland, Pierre-Yves MORDRET, Alain Volmat,
Maxime Coquelin, Alexandre Torgue, Patrice Chotard, Orson Zhai,
Baolin Wang, Chunyan Zhang, Jean Delvare
Cc: linux-i2c, linux-kernel, linux-tegra, linux-arm-kernel,
linux-sunxi, linux-stm32, Enrico Zanda, Atharv Dubey
In-Reply-To: <20260324-deverr-v1-0-7e591cce33a3@gmail.com>
From: Enrico Zanda <e.zanda1@gmail.com>
This simplifies the code while improving log.
Signed-off-by: Enrico Zanda <e.zanda1@gmail.com>
Signed-off-by: Atharv Dubey <atharvd440@gmail.com>
---
drivers/i2c/busses/i2c-tegra.c | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/i2c/busses/i2c-tegra.c b/drivers/i2c/busses/i2c-tegra.c
index bec619b9af4e..51d15fca82fc 100644
--- a/drivers/i2c/busses/i2c-tegra.c
+++ b/drivers/i2c/busses/i2c-tegra.c
@@ -575,8 +575,8 @@ static int tegra_i2c_init_dma(struct tegra_i2c_dev *i2c_dev)
dma_buf = dma_alloc_coherent(i2c_dev->dma_dev, i2c_dev->dma_buf_size,
&dma_phys, GFP_KERNEL | __GFP_NOWARN);
if (!dma_buf) {
- dev_err(i2c_dev->dev, "failed to allocate DMA buffer\n");
- err = -ENOMEM;
+ err = dev_err_probe(i2c_dev->dev, -ENOMEM,
+ "failed to allocate DMA buffer\n");
goto err_out;
}
@@ -588,8 +588,8 @@ static int tegra_i2c_init_dma(struct tegra_i2c_dev *i2c_dev)
err_out:
tegra_i2c_release_dma(i2c_dev);
if (err != -EPROBE_DEFER) {
- dev_err(i2c_dev->dev, "cannot use DMA: %d\n", err);
- dev_err(i2c_dev->dev, "falling back to PIO\n");
+ dev_err_probe(i2c_dev->dev, err,
+ "cannot use DMA, falling back to PIO\n");
return 0;
}
@@ -1953,7 +1953,7 @@ static int tegra_i2c_init_clocks(struct tegra_i2c_dev *i2c_dev)
err = clk_enable(i2c_dev->div_clk);
if (err) {
- dev_err(i2c_dev->dev, "failed to enable div-clk: %d\n", err);
+ dev_err_probe(i2c_dev->dev, err, "failed to enable div-clk\n");
goto unprepare_clocks;
}
@@ -1979,7 +1979,7 @@ static int tegra_i2c_init_hardware(struct tegra_i2c_dev *i2c_dev)
ret = pm_runtime_get_sync(i2c_dev->dev);
if (ret < 0)
- dev_err(i2c_dev->dev, "runtime resume failed: %d\n", ret);
+ dev_err_probe(i2c_dev->dev, ret, "runtime resume failed\n");
else
ret = tegra_i2c_init(i2c_dev);
--
2.43.0
^ permalink raw reply related
* [PATCH 03/10] i2c: sun6i-p2wi: Replace dev_err() with dev_err_probe() in probe function
From: Atharv Dubey @ 2026-03-24 18:26 UTC (permalink / raw)
To: Till Harbaum, Andi Shyti, Laxman Dewangan, Dmitry Osipenko,
Thierry Reding, Jonathan Hunter, Chen-Yu Tsai, Jernej Skrabec,
Samuel Holland, Pierre-Yves MORDRET, Alain Volmat,
Maxime Coquelin, Alexandre Torgue, Patrice Chotard, Orson Zhai,
Baolin Wang, Chunyan Zhang, Jean Delvare
Cc: linux-i2c, linux-kernel, linux-tegra, linux-arm-kernel,
linux-sunxi, linux-stm32, Enrico Zanda, Atharv Dubey
In-Reply-To: <20260324-deverr-v1-0-7e591cce33a3@gmail.com>
From: Enrico Zanda <e.zanda1@gmail.com>
This simplifies the code while improving log.
Signed-off-by: Enrico Zanda <e.zanda1@gmail.com>
Signed-off-by: Atharv Dubey <atharvd440@gmail.com>
---
drivers/i2c/busses/i2c-sun6i-p2wi.c | 55 ++++++++++++++-----------------------
1 file changed, 20 insertions(+), 35 deletions(-)
diff --git a/drivers/i2c/busses/i2c-sun6i-p2wi.c b/drivers/i2c/busses/i2c-sun6i-p2wi.c
index fb5280b8cf7f..dffbe776a195 100644
--- a/drivers/i2c/busses/i2c-sun6i-p2wi.c
+++ b/drivers/i2c/busses/i2c-sun6i-p2wi.c
@@ -194,22 +194,16 @@ static int p2wi_probe(struct platform_device *pdev)
int ret;
of_property_read_u32(np, "clock-frequency", &clk_freq);
- if (clk_freq > P2WI_MAX_FREQ) {
- dev_err(dev,
- "required clock-frequency (%u Hz) is too high (max = 6MHz)",
- clk_freq);
- return -EINVAL;
- }
+ if (clk_freq > P2WI_MAX_FREQ)
+ return dev_err_probe(dev, -EINVAL,
+ "required clock-frequency (%u Hz) is too high (max = 6MHz)",
+ clk_freq);
- if (clk_freq == 0) {
- dev_err(dev, "clock-frequency is set to 0 in DT\n");
- return -EINVAL;
- }
+ if (clk_freq == 0)
+ return dev_err_probe(dev, -EINVAL, "clock-frequency is set to 0 in DT\n");
- if (of_get_child_count(np) > 1) {
- dev_err(dev, "P2WI only supports one target device\n");
- return -EINVAL;
- }
+ if (of_get_child_count(np) > 1)
+ return dev_err_probe(dev, -EINVAL, "P2WI only supports one target device\n");
p2wi = devm_kzalloc(dev, sizeof(struct p2wi), GFP_KERNEL);
if (!p2wi)
@@ -226,11 +220,9 @@ static int p2wi_probe(struct platform_device *pdev)
childnp = of_get_next_available_child(np, NULL);
if (childnp) {
ret = of_property_read_u32(childnp, "reg", &target_addr);
- if (ret) {
- dev_err(dev, "invalid target address on node %pOF\n",
- childnp);
- return -EINVAL;
- }
+ if (ret)
+ return dev_err_probe(dev, -EINVAL,
+ "invalid target address on node %pOF\n", childnp);
p2wi->target_addr = target_addr;
}
@@ -245,26 +237,20 @@ static int p2wi_probe(struct platform_device *pdev)
return irq;
p2wi->clk = devm_clk_get_enabled(dev, NULL);
- if (IS_ERR(p2wi->clk)) {
- ret = PTR_ERR(p2wi->clk);
- dev_err(dev, "failed to enable clk: %d\n", ret);
- return ret;
- }
+ if (IS_ERR(p2wi->clk))
+ return dev_err_probe(dev, PTR_ERR(p2wi->clk),
+ "failed to enable clk\n");
parent_clk_freq = clk_get_rate(p2wi->clk);
p2wi->rstc = devm_reset_control_get_exclusive(dev, NULL);
- if (IS_ERR(p2wi->rstc)) {
- dev_err(dev, "failed to retrieve reset controller: %pe\n",
- p2wi->rstc);
- return PTR_ERR(p2wi->rstc);
- }
+ if (IS_ERR(p2wi->rstc))
+ return dev_err_probe(dev, PTR_ERR(p2wi->rstc),
+ "failed to retrieve reset controller\n");
ret = reset_control_deassert(p2wi->rstc);
- if (ret) {
- dev_err(dev, "failed to deassert reset line: %d\n", ret);
- return ret;
- }
+ if (ret)
+ return dev_err_probe(dev, ret, "failed to deassert reset line\n");
init_completion(&p2wi->complete);
p2wi->adapter.dev.parent = dev;
@@ -276,8 +262,7 @@ static int p2wi_probe(struct platform_device *pdev)
ret = devm_request_irq(dev, irq, p2wi_interrupt, 0, pdev->name, p2wi);
if (ret) {
- dev_err(dev, "can't register interrupt handler irq%d: %d\n",
- irq, ret);
+ dev_err_probe(dev, ret, "can't register interrupt handler irq%d\n", irq);
goto err_reset_assert;
}
--
2.43.0
^ permalink raw reply related
* [PATCH 04/10] i2c: stm32f7: Replace dev_err() with dev_err_probe() in probe function
From: Atharv Dubey @ 2026-03-24 18:26 UTC (permalink / raw)
To: Till Harbaum, Andi Shyti, Laxman Dewangan, Dmitry Osipenko,
Thierry Reding, Jonathan Hunter, Chen-Yu Tsai, Jernej Skrabec,
Samuel Holland, Pierre-Yves MORDRET, Alain Volmat,
Maxime Coquelin, Alexandre Torgue, Patrice Chotard, Orson Zhai,
Baolin Wang, Chunyan Zhang, Jean Delvare
Cc: linux-i2c, linux-kernel, linux-tegra, linux-arm-kernel,
linux-sunxi, linux-stm32, Enrico Zanda, Atharv Dubey
In-Reply-To: <20260324-deverr-v1-0-7e591cce33a3@gmail.com>
From: Enrico Zanda <e.zanda1@gmail.com>
This simplifies the code while improving log.
Signed-off-by: Enrico Zanda <e.zanda1@gmail.com>
Signed-off-by: Atharv Dubey <atharvd440@gmail.com>
---
drivers/i2c/busses/i2c-stm32f7.c | 78 ++++++++++++++++------------------------
1 file changed, 30 insertions(+), 48 deletions(-)
diff --git a/drivers/i2c/busses/i2c-stm32f7.c b/drivers/i2c/busses/i2c-stm32f7.c
index 70cb5822bf17..e7cc7f0fb56c 100644
--- a/drivers/i2c/busses/i2c-stm32f7.c
+++ b/drivers/i2c/busses/i2c-stm32f7.c
@@ -481,28 +481,22 @@ static int stm32f7_i2c_compute_timing(struct stm32f7_i2c_dev *i2c_dev,
int ret = 0;
specs = stm32f7_get_specs(setup->speed_freq);
- if (specs == ERR_PTR(-EINVAL)) {
- dev_err(i2c_dev->dev, "speed out of bound {%d}\n",
- setup->speed_freq);
- return -EINVAL;
- }
+ if (specs == ERR_PTR(-EINVAL))
+ return dev_err_probe(i2c_dev->dev, -EINVAL, "speed out of bound {%d}\n",
+ setup->speed_freq);
if ((setup->rise_time > specs->rise_max) ||
- (setup->fall_time > specs->fall_max)) {
- dev_err(i2c_dev->dev,
- "timings out of bound Rise{%d>%d}/Fall{%d>%d}\n",
- setup->rise_time, specs->rise_max,
- setup->fall_time, specs->fall_max);
- return -EINVAL;
- }
+ (setup->fall_time > specs->fall_max))
+ return dev_err_probe(i2c_dev->dev, -EINVAL,
+ "timings out of bound Rise{%d>%d}/Fall{%d>%d}\n",
+ setup->rise_time, specs->rise_max,
+ setup->fall_time, specs->fall_max);
i2c_dev->dnf = DIV_ROUND_CLOSEST(i2c_dev->dnf_dt, i2cclk);
- if (i2c_dev->dnf > STM32F7_I2C_DNF_MAX) {
- dev_err(i2c_dev->dev,
- "DNF out of bound %d/%d\n",
- i2c_dev->dnf * i2cclk, STM32F7_I2C_DNF_MAX * i2cclk);
- return -EINVAL;
- }
+ if (i2c_dev->dnf > STM32F7_I2C_DNF_MAX)
+ return dev_err_probe(i2c_dev->dev, -EINVAL,
+ "DNF out of bound %d/%d\n", i2c_dev->dnf * i2cclk,
+ STM32F7_I2C_DNF_MAX * i2cclk);
/* Analog and Digital Filters */
af_delay_min =
@@ -567,8 +561,7 @@ static int stm32f7_i2c_compute_timing(struct stm32f7_i2c_dev *i2c_dev,
}
if (list_empty(&solutions)) {
- dev_err(i2c_dev->dev, "no Prescaler solution\n");
- ret = -EPERM;
+ ret = dev_err_probe(i2c_dev->dev, -EPERM, "no Prescaler solution\n");
goto exit;
}
@@ -624,8 +617,7 @@ static int stm32f7_i2c_compute_timing(struct stm32f7_i2c_dev *i2c_dev,
}
if (!s) {
- dev_err(i2c_dev->dev, "no solution at all\n");
- ret = -EPERM;
+ ret = dev_err_probe(i2c_dev->dev, -EPERM, "no solution at all\n");
goto exit;
}
@@ -674,11 +666,9 @@ static int stm32f7_i2c_setup_timing(struct stm32f7_i2c_dev *i2c_dev,
i2c_parse_fw_timings(i2c_dev->dev, t, false);
- if (t->bus_freq_hz > I2C_MAX_FAST_MODE_PLUS_FREQ) {
- dev_err(i2c_dev->dev, "Invalid bus speed (%i>%i)\n",
- t->bus_freq_hz, I2C_MAX_FAST_MODE_PLUS_FREQ);
- return -EINVAL;
- }
+ if (t->bus_freq_hz > I2C_MAX_FAST_MODE_PLUS_FREQ)
+ return dev_err_probe(i2c_dev->dev, -EINVAL, "Invalid bus speed (%i>%i)\n",
+ t->bus_freq_hz, I2C_MAX_FAST_MODE_PLUS_FREQ);
setup->speed_freq = t->bus_freq_hz;
i2c_dev->setup.rise_time = t->scl_rise_ns;
@@ -686,10 +676,8 @@ static int stm32f7_i2c_setup_timing(struct stm32f7_i2c_dev *i2c_dev,
i2c_dev->dnf_dt = t->digital_filter_width_ns;
setup->clock_src = clk_get_rate(i2c_dev->clk);
- if (!setup->clock_src) {
- dev_err(i2c_dev->dev, "clock rate is 0\n");
- return -EINVAL;
- }
+ if (!setup->clock_src)
+ return dev_err_probe(i2c_dev->dev, -EINVAL, "clock rate is 0\n");
if (!of_property_read_bool(i2c_dev->dev->of_node, "i2c-digital-filter"))
i2c_dev->dnf_dt = STM32F7_I2C_DNF_DEFAULT;
@@ -698,8 +686,8 @@ static int stm32f7_i2c_setup_timing(struct stm32f7_i2c_dev *i2c_dev,
ret = stm32f7_i2c_compute_timing(i2c_dev, setup,
&i2c_dev->timing);
if (ret) {
- dev_err(i2c_dev->dev,
- "failed to compute I2C timings.\n");
+ dev_err_probe(i2c_dev->dev, ret,
+ "failed to compute I2C timings.\n");
if (setup->speed_freq <= I2C_MAX_STANDARD_MODE_FREQ)
break;
setup->speed_freq =
@@ -710,10 +698,8 @@ static int stm32f7_i2c_setup_timing(struct stm32f7_i2c_dev *i2c_dev,
}
} while (ret);
- if (ret) {
- dev_err(i2c_dev->dev, "Impossible to compute I2C timings.\n");
- return ret;
- }
+ if (ret)
+ return dev_err_probe(i2c_dev->dev, ret, "Impossible to compute I2C timings.\n");
i2c_dev->analog_filter = of_property_read_bool(i2c_dev->dev->of_node,
"i2c-analog-filter");
@@ -2175,10 +2161,8 @@ static int stm32f7_i2c_probe(struct platform_device *pdev)
return -ENOMEM;
setup = of_device_get_match_data(&pdev->dev);
- if (!setup) {
- dev_err(&pdev->dev, "Can't get device data\n");
- return -ENODEV;
- }
+ if (!setup)
+ return dev_err_probe(&pdev->dev, -ENODEV, "Can't get device data\n");
i2c_dev->setup = *setup;
i2c_dev->base = devm_platform_get_and_ioremap_resource(pdev, 0, &res);
@@ -2279,7 +2263,7 @@ static int stm32f7_i2c_probe(struct platform_device *pdev)
ret = dev_pm_set_wake_irq(i2c_dev->dev, irq_event);
if (ret) {
- dev_err(i2c_dev->dev, "Failed to set wake up irq\n");
+ dev_err_probe(i2c_dev->dev, ret, "Failed to set wake up irq\n");
goto clr_wakeup_capable;
}
}
@@ -2305,9 +2289,8 @@ static int stm32f7_i2c_probe(struct platform_device *pdev)
if (i2c_dev->smbus_mode) {
ret = stm32f7_i2c_enable_smbus_host(i2c_dev);
if (ret) {
- dev_err(i2c_dev->dev,
- "failed to enable SMBus Host-Notify protocol (%d)\n",
- ret);
+ dev_err_probe(i2c_dev->dev, ret,
+ "failed to enable SMBus Host-Notify protocol\n");
goto i2c_adapter_remove;
}
}
@@ -2315,9 +2298,8 @@ static int stm32f7_i2c_probe(struct platform_device *pdev)
if (of_property_read_bool(pdev->dev.of_node, "smbus-alert")) {
ret = stm32f7_i2c_enable_smbus_alert(i2c_dev);
if (ret) {
- dev_err(i2c_dev->dev,
- "failed to enable SMBus alert protocol (%d)\n",
- ret);
+ dev_err_probe(i2c_dev->dev, ret,
+ "failed to enable SMBus alert protocol\n");
goto i2c_disable_smbus_host;
}
}
--
2.43.0
^ permalink raw reply related
* [PATCH 05/10] i2c: stm32f4: Replace dev_err() with dev_err_probe() in probe function
From: Atharv Dubey @ 2026-03-24 18:26 UTC (permalink / raw)
To: Till Harbaum, Andi Shyti, Laxman Dewangan, Dmitry Osipenko,
Thierry Reding, Jonathan Hunter, Chen-Yu Tsai, Jernej Skrabec,
Samuel Holland, Pierre-Yves MORDRET, Alain Volmat,
Maxime Coquelin, Alexandre Torgue, Patrice Chotard, Orson Zhai,
Baolin Wang, Chunyan Zhang, Jean Delvare
Cc: linux-i2c, linux-kernel, linux-tegra, linux-arm-kernel,
linux-sunxi, linux-stm32, Enrico Zanda, Atharv Dubey
In-Reply-To: <20260324-deverr-v1-0-7e591cce33a3@gmail.com>
From: Enrico Zanda <e.zanda1@gmail.com>
This simplifies the code while improving log.
Signed-off-by: Enrico Zanda <e.zanda1@gmail.com>
Signed-off-by: Atharv Dubey <atharvd440@gmail.com>
---
drivers/i2c/busses/i2c-stm32f4.c | 53 ++++++++++++++++------------------------
1 file changed, 21 insertions(+), 32 deletions(-)
diff --git a/drivers/i2c/busses/i2c-stm32f4.c b/drivers/i2c/busses/i2c-stm32f4.c
index b3d56d0aa9d0..44e8b04962bb 100644
--- a/drivers/i2c/busses/i2c-stm32f4.c
+++ b/drivers/i2c/busses/i2c-stm32f4.c
@@ -163,11 +163,9 @@ static int stm32f4_i2c_set_periph_clk_freq(struct stm32f4_i2c_dev *i2c_dev)
* to hardware limitation
*/
if (freq < STM32F4_I2C_MIN_STANDARD_FREQ ||
- freq > STM32F4_I2C_MAX_FREQ) {
- dev_err(i2c_dev->dev,
- "bad parent clk freq for standard mode\n");
- return -EINVAL;
- }
+ freq > STM32F4_I2C_MAX_FREQ)
+ return dev_err_probe(i2c_dev->dev, -EINVAL,
+ "bad parent clk freq for standard mode\n");
} else {
/*
* To be as close as possible to 400 kHz, the parent clk
@@ -175,11 +173,9 @@ static int stm32f4_i2c_set_periph_clk_freq(struct stm32f4_i2c_dev *i2c_dev)
* maximum value of 46 MHz due to hardware limitation
*/
if (freq < STM32F4_I2C_MIN_FAST_FREQ ||
- freq > STM32F4_I2C_MAX_FREQ) {
- dev_err(i2c_dev->dev,
- "bad parent clk freq for fast mode\n");
- return -EINVAL;
- }
+ freq > STM32F4_I2C_MAX_FREQ)
+ return dev_err_probe(i2c_dev->dev, -EINVAL,
+ "bad parent clk freq for fast mode\n");
}
cr2 |= STM32F4_I2C_CR2_FREQ(freq);
@@ -772,22 +768,19 @@ static int stm32f4_i2c_probe(struct platform_device *pdev)
return PTR_ERR(i2c_dev->base);
irq_event = irq_of_parse_and_map(np, 0);
- if (!irq_event) {
- dev_err(&pdev->dev, "IRQ event missing or invalid\n");
- return -EINVAL;
- }
+ if (!irq_event)
+ return dev_err_probe(&pdev->dev, -EINVAL,
+ "IRQ event missing or invalid\n");
irq_error = irq_of_parse_and_map(np, 1);
- if (!irq_error) {
- dev_err(&pdev->dev, "IRQ error missing or invalid\n");
- return -EINVAL;
- }
+ if (!irq_error)
+ return dev_err_probe(&pdev->dev, -EINVAL,
+ "IRQ error missing or invalid\n");
i2c_dev->clk = devm_clk_get_enabled(&pdev->dev, NULL);
- if (IS_ERR(i2c_dev->clk)) {
- dev_err(&pdev->dev, "Failed to enable clock\n");
- return PTR_ERR(i2c_dev->clk);
- }
+ if (IS_ERR(i2c_dev->clk))
+ return dev_err_probe(&pdev->dev, PTR_ERR(i2c_dev->clk),
+ "Failed to enable clock\n");
rst = devm_reset_control_get_exclusive(&pdev->dev, NULL);
if (IS_ERR(rst))
@@ -807,19 +800,15 @@ static int stm32f4_i2c_probe(struct platform_device *pdev)
ret = devm_request_irq(&pdev->dev, irq_event, stm32f4_i2c_isr_event, 0,
pdev->name, i2c_dev);
- if (ret) {
- dev_err(&pdev->dev, "Failed to request irq event %i\n",
- irq_event);
- return ret;
- }
+ if (ret)
+ return dev_err_probe(&pdev->dev, ret,
+ "Failed to request irq event %i\n", irq_event);
ret = devm_request_irq(&pdev->dev, irq_error, stm32f4_i2c_isr_error, 0,
pdev->name, i2c_dev);
- if (ret) {
- dev_err(&pdev->dev, "Failed to request irq error %i\n",
- irq_error);
- return ret;
- }
+ if (ret)
+ return dev_err_probe(&pdev->dev, ret,
+ "Failed to request irq error %i\n", irq_error);
ret = stm32f4_i2c_hw_config(i2c_dev);
if (ret)
--
2.43.0
^ permalink raw reply related
* [PATCH 06/10] i2c: stm32: Replace dev_err() with dev_err_probe() in probe function
From: Atharv Dubey @ 2026-03-24 18:26 UTC (permalink / raw)
To: Till Harbaum, Andi Shyti, Laxman Dewangan, Dmitry Osipenko,
Thierry Reding, Jonathan Hunter, Chen-Yu Tsai, Jernej Skrabec,
Samuel Holland, Pierre-Yves MORDRET, Alain Volmat,
Maxime Coquelin, Alexandre Torgue, Patrice Chotard, Orson Zhai,
Baolin Wang, Chunyan Zhang, Jean Delvare
Cc: linux-i2c, linux-kernel, linux-tegra, linux-arm-kernel,
linux-sunxi, linux-stm32, Enrico Zanda, Atharv Dubey
In-Reply-To: <20260324-deverr-v1-0-7e591cce33a3@gmail.com>
From: Enrico Zanda <e.zanda1@gmail.com>
This simplifies the code while improving log.
Signed-off-by: Enrico Zanda <e.zanda1@gmail.com>
Signed-off-by: Atharv Dubey <atharvd440@gmail.com>
---
drivers/i2c/busses/i2c-stm32.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/i2c/busses/i2c-stm32.c b/drivers/i2c/busses/i2c-stm32.c
index becf8977979f..064e47d6c96f 100644
--- a/drivers/i2c/busses/i2c-stm32.c
+++ b/drivers/i2c/busses/i2c-stm32.c
@@ -39,7 +39,7 @@ struct stm32_i2c_dma *stm32_i2c_dma_request(struct device *dev,
dma_sconfig.direction = DMA_MEM_TO_DEV;
ret = dmaengine_slave_config(dma->chan_tx, &dma_sconfig);
if (ret < 0) {
- dev_err(dev, "can't configure tx channel\n");
+ dev_err_probe(dev, ret, "can't configure tx channel\n");
goto fail_tx;
}
@@ -60,7 +60,7 @@ struct stm32_i2c_dma *stm32_i2c_dma_request(struct device *dev,
dma_sconfig.direction = DMA_DEV_TO_MEM;
ret = dmaengine_slave_config(dma->chan_rx, &dma_sconfig);
if (ret < 0) {
- dev_err(dev, "can't configure rx channel\n");
+ dev_err_probe(dev, ret, "can't configure rx channel\n");
goto fail_rx;
}
--
2.43.0
^ permalink raw reply related
* [PATCH 07/10] i2c: st: Replace dev_err() with dev_err_probe() in probe function
From: Atharv Dubey @ 2026-03-24 18:26 UTC (permalink / raw)
To: Till Harbaum, Andi Shyti, Laxman Dewangan, Dmitry Osipenko,
Thierry Reding, Jonathan Hunter, Chen-Yu Tsai, Jernej Skrabec,
Samuel Holland, Pierre-Yves MORDRET, Alain Volmat,
Maxime Coquelin, Alexandre Torgue, Patrice Chotard, Orson Zhai,
Baolin Wang, Chunyan Zhang, Jean Delvare
Cc: linux-i2c, linux-kernel, linux-tegra, linux-arm-kernel,
linux-sunxi, linux-stm32, Enrico Zanda, Atharv Dubey
In-Reply-To: <20260324-deverr-v1-0-7e591cce33a3@gmail.com>
From: Enrico Zanda <e.zanda1@gmail.com>
This simplifies the code while improving log.
Signed-off-by: Enrico Zanda <e.zanda1@gmail.com>
Signed-off-by: Atharv Dubey <atharvd440@gmail.com>
---
drivers/i2c/busses/i2c-st.c | 34 ++++++++++++++--------------------
1 file changed, 14 insertions(+), 20 deletions(-)
diff --git a/drivers/i2c/busses/i2c-st.c b/drivers/i2c/busses/i2c-st.c
index 751ea421caaf..3f89c2145741 100644
--- a/drivers/i2c/busses/i2c-st.c
+++ b/drivers/i2c/busses/i2c-st.c
@@ -775,17 +775,15 @@ static int st_i2c_of_get_deglitch(struct device_node *np,
ret = of_property_read_u32(np, "st,i2c-min-scl-pulse-width-us",
&i2c_dev->scl_min_width_us);
- if ((ret == -ENODATA) || (ret == -EOVERFLOW)) {
- dev_err(i2c_dev->dev, "st,i2c-min-scl-pulse-width-us invalid\n");
- return ret;
- }
+ if ((ret == -ENODATA) || (ret == -EOVERFLOW))
+ return dev_err_probe(i2c_dev->dev, ret,
+ "st,i2c-min-scl-pulse-width-us invalid\n");
ret = of_property_read_u32(np, "st,i2c-min-sda-pulse-width-us",
&i2c_dev->sda_min_width_us);
- if ((ret == -ENODATA) || (ret == -EOVERFLOW)) {
- dev_err(i2c_dev->dev, "st,i2c-min-sda-pulse-width-us invalid\n");
- return ret;
- }
+ if ((ret == -ENODATA) || (ret == -EOVERFLOW))
+ return dev_err_probe(i2c_dev->dev, ret,
+ "st,i2c-min-sda-pulse-width-us invalid\n");
return 0;
}
@@ -808,16 +806,13 @@ static int st_i2c_probe(struct platform_device *pdev)
return PTR_ERR(i2c_dev->base);
i2c_dev->irq = irq_of_parse_and_map(np, 0);
- if (!i2c_dev->irq) {
- dev_err(&pdev->dev, "IRQ missing or invalid\n");
- return -EINVAL;
- }
+ if (!i2c_dev->irq)
+ return dev_err_probe(&pdev->dev, -EINVAL, "IRQ missing or invalid\n");
i2c_dev->clk = of_clk_get_by_name(np, "ssc");
- if (IS_ERR(i2c_dev->clk)) {
- dev_err(&pdev->dev, "Unable to request clock\n");
- return PTR_ERR(i2c_dev->clk);
- }
+ if (IS_ERR(i2c_dev->clk))
+ return dev_err_probe(&pdev->dev, PTR_ERR(i2c_dev->clk),
+ "Unable to request clock\n");
i2c_dev->mode = I2C_MODE_STANDARD;
ret = of_property_read_u32(np, "clock-frequency", &clk_rate);
@@ -829,10 +824,9 @@ static int st_i2c_probe(struct platform_device *pdev)
ret = devm_request_threaded_irq(&pdev->dev, i2c_dev->irq,
NULL, st_i2c_isr_thread,
IRQF_ONESHOT, pdev->name, i2c_dev);
- if (ret) {
- dev_err(&pdev->dev, "Failed to request irq %i\n", i2c_dev->irq);
- return ret;
- }
+ if (ret)
+ return dev_err_probe(&pdev->dev, ret,
+ "Failed to request irq %i\n", i2c_dev->irq);
pinctrl_pm_select_default_state(i2c_dev->dev);
/* In case idle state available, select it */
--
2.43.0
^ permalink raw reply related
* [PATCH 08/10] i2c: sprd: Replace dev_err() with dev_err_probe() in probe function
From: Atharv Dubey @ 2026-03-24 18:26 UTC (permalink / raw)
To: Till Harbaum, Andi Shyti, Laxman Dewangan, Dmitry Osipenko,
Thierry Reding, Jonathan Hunter, Chen-Yu Tsai, Jernej Skrabec,
Samuel Holland, Pierre-Yves MORDRET, Alain Volmat,
Maxime Coquelin, Alexandre Torgue, Patrice Chotard, Orson Zhai,
Baolin Wang, Chunyan Zhang, Jean Delvare
Cc: linux-i2c, linux-kernel, linux-tegra, linux-arm-kernel,
linux-sunxi, linux-stm32, Enrico Zanda, Atharv Dubey
In-Reply-To: <20260324-deverr-v1-0-7e591cce33a3@gmail.com>
From: Enrico Zanda <e.zanda1@gmail.com>
This simplifies the code while improving log.
Signed-off-by: Enrico Zanda <e.zanda1@gmail.com>
Signed-off-by: Atharv Dubey <atharvd440@gmail.com>
---
drivers/i2c/busses/i2c-sprd.c | 13 ++++++-------
1 file changed, 6 insertions(+), 7 deletions(-)
diff --git a/drivers/i2c/busses/i2c-sprd.c b/drivers/i2c/busses/i2c-sprd.c
index 1b490525d8dd..7b321a956fca 100644
--- a/drivers/i2c/busses/i2c-sprd.c
+++ b/drivers/i2c/busses/i2c-sprd.c
@@ -469,11 +469,10 @@ static int sprd_i2c_clk_init(struct sprd_i2c *i2c_dev)
i2c_dev->adap.nr, i2c_dev->src_clk);
i2c_dev->clk = devm_clk_get(i2c_dev->dev, "enable");
- if (IS_ERR(i2c_dev->clk)) {
- dev_err(i2c_dev->dev, "i2c%d can't get the enable clock\n",
- i2c_dev->adap.nr);
- return PTR_ERR(i2c_dev->clk);
- }
+ if (IS_ERR(i2c_dev->clk))
+ return dev_err_probe(i2c_dev->dev, PTR_ERR(i2c_dev->clk),
+ "i2c%d can't get the enable clock\n",
+ i2c_dev->adap.nr);
return 0;
}
@@ -548,13 +547,13 @@ static int sprd_i2c_probe(struct platform_device *pdev)
IRQF_NO_SUSPEND | IRQF_ONESHOT,
pdev->name, i2c_dev);
if (ret) {
- dev_err(&pdev->dev, "failed to request irq %d\n", i2c_dev->irq);
+ dev_err_probe(&pdev->dev, ret, "failed to request irq %d\n", i2c_dev->irq);
goto err_rpm_put;
}
ret = i2c_add_numbered_adapter(&i2c_dev->adap);
if (ret) {
- dev_err(&pdev->dev, "add adapter failed\n");
+ dev_err_probe(&pdev->dev, ret, "add adapter failed\n");
goto err_rpm_put;
}
--
2.43.0
^ permalink raw reply related
* [PATCH 09/10] i2c: sis96x: Replace dev_err() with dev_err_probe() in probe function
From: Atharv Dubey @ 2026-03-24 18:26 UTC (permalink / raw)
To: Till Harbaum, Andi Shyti, Laxman Dewangan, Dmitry Osipenko,
Thierry Reding, Jonathan Hunter, Chen-Yu Tsai, Jernej Skrabec,
Samuel Holland, Pierre-Yves MORDRET, Alain Volmat,
Maxime Coquelin, Alexandre Torgue, Patrice Chotard, Orson Zhai,
Baolin Wang, Chunyan Zhang, Jean Delvare
Cc: linux-i2c, linux-kernel, linux-tegra, linux-arm-kernel,
linux-sunxi, linux-stm32, Enrico Zanda, Atharv Dubey
In-Reply-To: <20260324-deverr-v1-0-7e591cce33a3@gmail.com>
From: Enrico Zanda <e.zanda1@gmail.com>
This simplifies the code while improving log.
Signed-off-by: Enrico Zanda <e.zanda1@gmail.com>
Signed-off-by: Atharv Dubey <atharvd440@gmail.com>
---
drivers/i2c/busses/i2c-sis96x.c | 30 +++++++++++++-----------------
1 file changed, 13 insertions(+), 17 deletions(-)
diff --git a/drivers/i2c/busses/i2c-sis96x.c b/drivers/i2c/busses/i2c-sis96x.c
index 77529dda6fcd..eee41dc9d706 100644
--- a/drivers/i2c/busses/i2c-sis96x.c
+++ b/drivers/i2c/busses/i2c-sis96x.c
@@ -245,23 +245,19 @@ static int sis96x_probe(struct pci_dev *dev,
u16 ww = 0;
int retval;
- if (sis96x_smbus_base) {
- dev_err(&dev->dev, "Only one device supported.\n");
- return -EBUSY;
- }
+ if (sis96x_smbus_base)
+ return dev_err_probe(&dev->dev, -EBUSY, "Only one device supported.\n");
pci_read_config_word(dev, PCI_CLASS_DEVICE, &ww);
- if (PCI_CLASS_SERIAL_SMBUS != ww) {
- dev_err(&dev->dev, "Unsupported device class 0x%04x!\n", ww);
- return -ENODEV;
- }
+ if (ww != PCI_CLASS_SERIAL_SMBUS)
+ return dev_err_probe(&dev->dev, -ENODEV,
+ "Unsupported device class 0x%04x!\n", ww);
sis96x_smbus_base = pci_resource_start(dev, SIS96x_BAR);
- if (!sis96x_smbus_base) {
- dev_err(&dev->dev, "SiS96x SMBus base address "
- "not initialized!\n");
- return -EINVAL;
- }
+ if (!sis96x_smbus_base)
+ return dev_err_probe(&dev->dev, -EINVAL,
+ "SiS96x SMBus base address not initialized!\n");
+
dev_info(&dev->dev, "SiS96x SMBus base address: 0x%04x\n",
sis96x_smbus_base);
@@ -272,9 +268,9 @@ static int sis96x_probe(struct pci_dev *dev,
/* Everything is happy, let's grab the memory and set things up. */
if (!request_region(sis96x_smbus_base, SMB_IOSIZE,
sis96x_driver.name)) {
- dev_err(&dev->dev, "SMBus registers 0x%04x-0x%04x "
- "already in use!\n", sis96x_smbus_base,
- sis96x_smbus_base + SMB_IOSIZE - 1);
+ dev_err_probe(&dev->dev, -EINVAL,
+ "SMBus registers 0x%04x-0x%04x already in use!\n",
+ sis96x_smbus_base, sis96x_smbus_base + SMB_IOSIZE - 1);
sis96x_smbus_base = 0;
return -EINVAL;
@@ -287,7 +283,7 @@ static int sis96x_probe(struct pci_dev *dev,
"SiS96x SMBus adapter at 0x%04x", sis96x_smbus_base);
if ((retval = i2c_add_adapter(&sis96x_adapter))) {
- dev_err(&dev->dev, "Couldn't register adapter!\n");
+ dev_err_probe(&dev->dev, retval, "Couldn't register adapter!\n");
release_region(sis96x_smbus_base, SMB_IOSIZE);
sis96x_smbus_base = 0;
}
--
2.43.0
^ permalink raw reply related
* [PATCH 10/10] i2c: sis630: Replace dev_err() with dev_err_probe() in probe function
From: Atharv Dubey @ 2026-03-24 18:26 UTC (permalink / raw)
To: Till Harbaum, Andi Shyti, Laxman Dewangan, Dmitry Osipenko,
Thierry Reding, Jonathan Hunter, Chen-Yu Tsai, Jernej Skrabec,
Samuel Holland, Pierre-Yves MORDRET, Alain Volmat,
Maxime Coquelin, Alexandre Torgue, Patrice Chotard, Orson Zhai,
Baolin Wang, Chunyan Zhang, Jean Delvare
Cc: linux-i2c, linux-kernel, linux-tegra, linux-arm-kernel,
linux-sunxi, linux-stm32, Enrico Zanda, Atharv Dubey
In-Reply-To: <20260324-deverr-v1-0-7e591cce33a3@gmail.com>
From: Enrico Zanda <e.zanda1@gmail.com>
This simplifies the code while improving log.
Signed-off-by: Enrico Zanda <e.zanda1@gmail.com>
Signed-off-by: Atharv Dubey <atharvd440@gmail.com>
---
drivers/i2c/busses/i2c-sis630.c | 31 +++++++++++++------------------
1 file changed, 13 insertions(+), 18 deletions(-)
diff --git a/drivers/i2c/busses/i2c-sis630.c b/drivers/i2c/busses/i2c-sis630.c
index a19c3d251804..3d0638c2bc51 100644
--- a/drivers/i2c/busses/i2c-sis630.c
+++ b/drivers/i2c/busses/i2c-sis630.c
@@ -431,24 +431,23 @@ static int sis630_setup(struct pci_dev *sis630_dev)
in acpi io space and read acpi base addr
*/
if (pci_read_config_byte(sis630_dev, SIS630_BIOS_CTL_REG, &b)) {
- dev_err(&sis630_dev->dev, "Error: Can't read bios ctl reg\n");
- retval = -ENODEV;
+ retval = dev_err_probe(&sis630_dev->dev, -ENODEV,
+ "Error: Can't read bios ctl reg\n");
goto exit;
}
/* if ACPI already enabled , do nothing */
if (!(b & 0x80) &&
pci_write_config_byte(sis630_dev, SIS630_BIOS_CTL_REG, b | 0x80)) {
- dev_err(&sis630_dev->dev, "Error: Can't enable ACPI\n");
- retval = -ENODEV;
+ retval = dev_err_probe(&sis630_dev->dev, -ENODEV,
+ "Error: Can't enable ACPI\n");
goto exit;
}
/* Determine the ACPI base address */
if (pci_read_config_word(sis630_dev,
SIS630_ACPI_BASE_REG, &acpi_base)) {
- dev_err(&sis630_dev->dev,
- "Error: Can't determine ACPI base address\n");
- retval = -ENODEV;
+ retval = dev_err_probe(&sis630_dev->dev, -ENODEV,
+ "Error: Can't determine ACPI base address\n");
goto exit;
}
@@ -469,11 +468,10 @@ static int sis630_setup(struct pci_dev *sis630_dev)
/* Everything is happy, let's grab the memory and set things up. */
if (!request_region(smbus_base + SMB_STS, SIS630_SMB_IOREGION,
sis630_driver.name)) {
- dev_err(&sis630_dev->dev,
- "I/O Region 0x%04x-0x%04x for SMBus already in use.\n",
- smbus_base + SMB_STS,
- smbus_base + SMB_STS + SIS630_SMB_IOREGION - 1);
- retval = -EBUSY;
+ retval = dev_err_probe(&sis630_dev->dev, -EBUSY,
+ "I/O Region 0x%04x-0x%04x for SMBus already in use.\n",
+ smbus_base + SMB_STS,
+ smbus_base + SMB_STS + SIS630_SMB_IOREGION - 1);
goto exit;
}
@@ -511,12 +509,9 @@ static int sis630_probe(struct pci_dev *dev, const struct pci_device_id *id)
{
int ret;
- if (sis630_setup(dev)) {
- dev_err(&dev->dev,
- "SIS630 compatible bus not detected, "
- "module not inserted.\n");
- return -ENODEV;
- }
+ if (sis630_setup(dev))
+ return dev_err_probe(&dev->dev, -ENODEV,
+ "Compatible bus not detected, module not inserted.\n");
/* set up the sysfs linkage to our parent device */
sis630_adapter.dev.parent = &dev->dev;
--
2.43.0
^ permalink raw reply related
* Re: [PATCH] ARM: dts: imx: Add DT overlays for DH i.MX6 DHCOM SoM and boards
From: Frank Li @ 2026-03-24 18:31 UTC (permalink / raw)
To: Marek Vasut
Cc: linux-arm-kernel, Christoph Niedermaier, Conor Dooley,
Fabio Estevam, Krzysztof Kozlowski, Pengutronix Kernel Team,
Rob Herring, Sascha Hauer, devicetree, imx, kernel, linux-kernel
In-Reply-To: <20260312233526.200157-1-marex@nabladev.com>
On Fri, Mar 13, 2026 at 12:34:05AM +0100, Marek Vasut wrote:
> Add DT overlays to support DH i.MX6 DHCOM SoM carrier board expansion
> modules. The following DT overlays are implemented:
> - PDK2:
> - DH 497-200 Display board in edge connector X12
> - DH 505-200 Display board in edge connector X12
> - DH 531-100 SPI/I2C board in header X21
> - DH 531-200 SPI/I2C board in header X22
> - DH 560-200 Display board in edge connector X12
> - PicoITX:
> - DH 626-100 Display board in edge connector X2
>
> Signed-off-by: Marek Vasut <marex@nabladev.com>
> ---
> Cc: Christoph Niedermaier <cniedermaier@dh-electronics.com>
> Cc: Conor Dooley <conor+dt@kernel.org>
> Cc: Fabio Estevam <festevam@gmail.com>
> Cc: Frank Li <Frank.Li@nxp.com>
> Cc: Krzysztof Kozlowski <krzk+dt@kernel.org>
> Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
> Cc: Rob Herring <robh@kernel.org>
> Cc: Sascha Hauer <s.hauer@pengutronix.de>
> Cc: devicetree@vger.kernel.org
> Cc: imx@lists.linux.dev
> Cc: kernel@dh-electronics.com
> Cc: linux-arm-kernel@lists.infradead.org
> Cc: linux-kernel@vger.kernel.org
> ---
> arch/arm/boot/dts/nxp/imx/Makefile | 37 +++++++++
> ...l-dhcom-overlay-panel-dpi-ch101olhlwh.dtsi | 75 +++++++++++++++++++
> .../imx/imx6qdl-dhcom-overlay-panel-dpi.dtsi | 61 +++++++++++++++
> ...mx6qdl-dhcom-pdk2-overlay-497-200-x12.dtso | 28 +++++++
> ...-pdk2-overlay-505-200-x12-ch101olhlwh.dtso | 26 +++++++
> ...mx6qdl-dhcom-pdk2-overlay-531-100-x21.dtso | 32 ++++++++
> ...mx6qdl-dhcom-pdk2-overlay-531-100-x22.dtso | 32 ++++++++
> ...mx6qdl-dhcom-pdk2-overlay-560-200-x12.dtso | 39 ++++++++++
> ...icoitx-overlay-626-100-x2-ch101olhlwh.dtso | 8 ++
> .../boot/dts/nxp/imx/imx6qdl-dhcom-som.dtsi | 2 +-
> 10 files changed, 339 insertions(+), 1 deletion(-)
> create mode 100644 arch/arm/boot/dts/nxp/imx/imx6qdl-dhcom-overlay-panel-dpi-ch101olhlwh.dtsi
> create mode 100644 arch/arm/boot/dts/nxp/imx/imx6qdl-dhcom-overlay-panel-dpi.dtsi
> create mode 100644 arch/arm/boot/dts/nxp/imx/imx6qdl-dhcom-pdk2-overlay-497-200-x12.dtso
> create mode 100644 arch/arm/boot/dts/nxp/imx/imx6qdl-dhcom-pdk2-overlay-505-200-x12-ch101olhlwh.dtso
> create mode 100644 arch/arm/boot/dts/nxp/imx/imx6qdl-dhcom-pdk2-overlay-531-100-x21.dtso
> create mode 100644 arch/arm/boot/dts/nxp/imx/imx6qdl-dhcom-pdk2-overlay-531-100-x22.dtso
> create mode 100644 arch/arm/boot/dts/nxp/imx/imx6qdl-dhcom-pdk2-overlay-560-200-x12.dtso
> create mode 100644 arch/arm/boot/dts/nxp/imx/imx6qdl-dhcom-picoitx-overlay-626-100-x2-ch101olhlwh.dtso
>
...
> diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-dhcom-overlay-panel-dpi-ch101olhlwh.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-dhcom-overlay-panel-dpi-ch101olhlwh.dtsi
> new file mode 100644
> index 0000000000000..afdb936f1d4e3
> --- /dev/null
> +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-dhcom-overlay-panel-dpi-ch101olhlwh.dtsi
> @@ -0,0 +1,75 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
> +/*
> + * Copyright (C) 2021 Marek Vasut
2026
> + */
...
> +
> +&panel {
> + compatible = "edt,etm0700g0edh6";
> +};
> +
> +&panel_in {
> + remote-endpoint = <&ipu1_dpi0_out>;
> +};
> +
> +&i2c2 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + touchscreen@38 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_dhcom_e>;
> + compatible = "edt,edt-ft5406";
compatible should first property
> + reg = <0x38>;
reg is the second one.
Frank
^ permalink raw reply
* Re: [PATCH 05/10] am68k/PCI: Remove unnecessary second application of align
From: John Paul Adrian Glaubitz @ 2026-03-24 18:36 UTC (permalink / raw)
To: Ilpo Järvinen
Cc: linux-pci, Bjorn Helgaas, Guenter Roeck, linux-alpha,
linux-arm-kernel, linux-m68k, linux-mips, linux-parisc,
linuxppc-dev, linux-s390, linux-sh, Russell King,
Geert Uytterhoeven, Thomas Bogendoerfer, James E.J. Bottomley,
Helge Deller, Michael Ellerman, Thomas Gleixner, Ingo Molnar,
Borislav Petkov, Dave Hansen, H. Peter Anvin, Chris Zankel,
Max Filippov, Madhavan Srinivasan, Yoshinori Sato, Rich Felker,
LKML
In-Reply-To: <1c08efcd-25e8-6436-52ab-ac3d50dcf58f@linux.intel.com>
On Tue, 2026-03-24 at 19:55 +0200, Ilpo Järvinen wrote:
> On Tue, 24 Mar 2026, John Paul Adrian Glaubitz wrote:
>
> > Hi Ilpo,
> >
> > On Tue, 2026-03-24 at 18:56 +0200, Ilpo Järvinen wrote:
> > > Aligning res->start by align inside pcibios_align_resource() is
> > > unnecessary because caller of pcibios_align_resource() is
> > > __find_resource_space() that aligns res->start with align before
> > > calling pcibios_align_resource().
> > >
> > > Aligning by align in case of IORESOURCE_IO && start & 0x300 cannot ever
> > > result in changing start either because 0x300 bits would have not
> > > survived the earlier alignment if align was large enough to have an
> > > impact.
> > >
> > > Thus, remove the duplicated aligning from pcibios_align_resource().
> > >
> > > Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
> > > ---
> > > arch/m68k/kernel/pcibios.c | 2 --
> > > 1 file changed, 2 deletions(-)
> > >
> > > diff --git a/arch/m68k/kernel/pcibios.c b/arch/m68k/kernel/pcibios.c
> > > index 1415f6e4e5ce..7e286ee1976b 100644
> > > --- a/arch/m68k/kernel/pcibios.c
> > > +++ b/arch/m68k/kernel/pcibios.c
> > > @@ -36,8 +36,6 @@ resource_size_t pcibios_align_resource(void *data, const struct resource *res,
> > > if ((res->flags & IORESOURCE_IO) && (start & 0x300))
> > > start = (start + 0x3ff) & ~0x3ff;
> > >
> > > - start = (start + align - 1) & ~(align - 1);
> > > -
> > > return start;
> > > }
> > >
> >
> > Sorry if it's a stupid question, but what does "am68k" in the subject refer to?
>
> The extra "a" is a typo. I'm sorry about that.
No worries, I just thought I missed something obvious and felt stupid to ask ;-).
Adrian
--
.''`. John Paul Adrian Glaubitz
: :' : Debian Developer
`. `' Physicist
`- GPG: 62FF 8A75 84E0 2956 9546 0006 7426 3B37 F5B5 F913
^ permalink raw reply
* Re: [PATCH 5/5] fpga: m10bmc-sec: switch show_canceled_csk() to using sysfs_emit()
From: Yury Norov @ 2026-03-24 18:38 UTC (permalink / raw)
To: Xu Yilun
Cc: linux-kernel, Christophe Leroy (CS GROUP), Peter Zijlstra (Intel),
Rafael J. Wysocki, Alexander Shishkin, Daniel Lezcano,
Ingo Molnar, James Clark, Kees Cook, Lukasz Luba,
Madhavan Srinivasan, Michael Ellerman, Mike Leach, Moritz Fischer,
Nicholas Piggin, Russ Weight, Shrikanth Hegde, Suki K Poulose,
Tom Rix, Thomas Weißschuh, Xu Yilun, Yury Norov, Zhang Rui,
coresight, linux-arm-kernel, linux-fpga, linux-pm, linuxppc-dev,
Jakub Kicinski
In-Reply-To: <acJWNRb1t96yu/H6@yilunxu-OptiPlex-7050>
On Tue, Mar 24, 2026 at 05:15:33PM +0800, Xu Yilun wrote:
> On Tue, Mar 03, 2026 at 03:08:41PM -0500, Yury Norov wrote:
> > Switch show_canceled_csk() to use the proper sysfs_emit("%*pbl").
> >
> > Reviewed-by: Russ Weight <russ.weight@linux.dev>
> > Suggested-by: Thomas Weißschuh <linux@weissschuh.net>
> > Signed-off-by: Yury Norov <ynorov@nvidia.com>
> > ---
> > drivers/fpga/intel-m10-bmc-sec-update.c | 3 ++-
> > 1 file changed, 2 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/fpga/intel-m10-bmc-sec-update.c b/drivers/fpga/intel-m10-bmc-sec-update.c
> > index 10f678b9ed36..ae364c6636eb 100644
> > --- a/drivers/fpga/intel-m10-bmc-sec-update.c
> > +++ b/drivers/fpga/intel-m10-bmc-sec-update.c
> > @@ -10,6 +10,7 @@
> > #include <linux/firmware.h>
> > #include <linux/mfd/intel-m10-bmc.h>
> > #include <linux/mod_devicetable.h>
> > +#include <linux/mm.h>
>
> Why add this header file?
When I was preparing the series, I had build issues without this. But
now I checked it against -rc5, and it's clean. Would you like me to
resend?
> > #include <linux/module.h>
> > #include <linux/platform_device.h>
> > #include <linux/slab.h>
> > @@ -183,7 +184,7 @@ show_canceled_csk(struct device *dev, u32 addr, char *buf)
> >
> > bitmap_from_arr32(csk_map, csk32, CSK_BIT_LEN);
> > bitmap_complement(csk_map, csk_map, CSK_BIT_LEN);
> > - return bitmap_print_to_pagebuf(1, buf, csk_map, CSK_BIT_LEN);
> > + return sysfs_emit(buf, "%*pbl\n", CSK_BIT_LEN, csk_map);
> > }
> >
> > #define DEVICE_ATTR_SEC_CSK_RO(_name) \
> > --
> > 2.43.0
> >
> >
^ permalink raw reply
* Re: [PATCH v5 0/2] Add support for Variscite DART-MX91 and Sonata board
From: Frank Li @ 2026-03-24 18:40 UTC (permalink / raw)
To: linux-kernel, devicetree, imx, Stefano Radaelli
Cc: pierluigi.p, Stefano Radaelli, Sascha Hauer,
Pengutronix Kernel Team, Fabio Estevam, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, linux-arm-kernel
In-Reply-To: <cover.1773417666.git.stefano.r@variscite.com>
On Fri, 13 Mar 2026 17:20:01 +0100, Stefano Radaelli wrote:
> This patch series adds support for the Variscite DART-MX91 system on
> module and the Sonata carrier board.
>
> The series includes:
> - SOM device tree with on-module peripherals
> - Sonata carrier board device tree with board-specific features
>
> [...]
Applied, thanks!
[1/2] arm64: dts: freescale: Add support for Variscite DART-MX91
commit: 89b79fe7af37b2d8f3f3fda4786f6f507bb45e3d
[2/2] arm64: dts: imx91-var-dart: Add support for Variscite Sonata board
commit: 5354185411cffa7317bb7699e626bde5d6900bf0
Best regards,
--
Frank Li <Frank.Li@nxp.com>
^ permalink raw reply
* Re: (subset) [PATCH v6 0/3] Add support for Variscite DART-MX95 and Sonata board
From: Frank Li @ 2026-03-24 18:45 UTC (permalink / raw)
To: devicetree, linux-kernel, Stefano Radaelli
Cc: Stefano Radaelli, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Shawn Guo, Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam,
Alexander Stein, Dario Binacchi, Primoz Fiser, Markus Niebel,
Yannic Moog, Josua Mayer, Francesco Dolcini, imx,
linux-arm-kernel
In-Reply-To: <20260225170347.77841-1-stefano.r@variscite.com>
On Wed, 25 Feb 2026 18:03:35 +0100, Stefano Radaelli wrote:
> This patch series adds support for the Variscite DART-MX95 system on
> module and the Sonata carrier board.
>
> The series includes:
> - Device tree bindings documentation for both SOM and carrier board
> - SOM device tree with on-module peripherals
> - Sonata carrier board device tree with board-specific features
>
> [...]
Applied, thanks!
[2/3] arm64: dts: freescale: Add support for Variscite DART-MX95
commit: 5953966f26f5f825cf1fed6f96c1f3138bee6d6b
[3/3] arm64: dts: imx95-var-dart: Add support for Variscite Sonata board
commit: b5fede0246d012e0fe66588e85825c2bfac626eb
Best regards,
--
Frank Li <Frank.Li@nxp.com>
^ permalink raw reply
* Re: [PATCH v7 0/2] Add support for Variscite DART-MX95 and Sonata board
From: Frank Li @ 2026-03-24 18:45 UTC (permalink / raw)
To: devicetree, linux-kernel, Stefano Radaelli
Cc: pierluigi.p, Stefano Radaelli, Shawn Guo, Sascha Hauer,
Pengutronix Kernel Team, Fabio Estevam, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, imx, linux-arm-kernel
In-Reply-To: <20260313174707.26902-1-stefano.r@variscite.com>
On Fri, 13 Mar 2026 18:47:01 +0100, Stefano Radaelli wrote:
> This patch series adds support for the Variscite DART-MX95 system on
> module and the Sonata carrier board.
>
> The series includes:
> - Device tree bindings documentation for both SOM and carrier board
> - SOM device tree with on-module peripherals
> - Sonata carrier board device tree with board-specific features
>
> [...]
Applied, thanks!
[1/2] arm64: dts: freescale: Add support for Variscite DART-MX95
commit: 5953966f26f5f825cf1fed6f96c1f3138bee6d6b
[2/2] arm64: dts: imx95-var-dart: Add support for Variscite Sonata board
commit: b5fede0246d012e0fe66588e85825c2bfac626eb
Best regards,
--
Frank Li <Frank.Li@nxp.com>
^ permalink raw reply
* Re: [PATCH rc] iommu/arm-smmu-v3: Drain in-flight fault handlers
From: Jason Gunthorpe @ 2026-03-24 18:53 UTC (permalink / raw)
To: Will Deacon
Cc: Lu Baolu, Kevin Tian, Nicolin Chen, robin.murphy, joro, praan,
mmarrid, kees, Alexander.Grest, smostafa, linux-arm-kernel, iommu,
linux-kernel, bbiber, skaestle
In-Reply-To: <acKhIh-s3pglUmEL@willie-the-truck>
On Tue, Mar 24, 2026 at 02:35:14PM +0000, Will Deacon wrote:
> On Tue, Mar 24, 2026 at 11:17:16AM -0300, Jason Gunthorpe wrote:
> > On Tue, Mar 24, 2026 at 02:04:03PM +0000, Will Deacon wrote:
> > > Sorry, that was sloppy terminology on my part. I'm trying to reason about
> > > faults that are generated by accesses that were translated with the
> > > page-tables of the old domain being reported once we think we are using
> > > the new domain.
> >
> > It doesn't matter.
> >
> > If a concurrent fault is resolving on the old domain and it completes
> > after the STE is in the new domain the device will restart and if the
> > IOVA is still non-present it will refault. This is normal and fine.
> >
> > If it is resolving on the new domain and the new domain has a present
> > PTE so the PRI is spurious then the fault handler should NOP it and
> > restart the device.
>
> Hmm, I can see that working out if both domains expect faults, but if
> I'm switching to a domain without a handler
iommu_report_device_fault() still handles the event and generates an
error ack.
> wouldn't I be better off draining the outstanding faults generated
> on the old domain first? Otherwise, won't we see a bunch of noise
> from the eventq thread as it dumps unexpected events to the console?
Yes, it does look like since iommu_report_device_fault() handles it
but returns an error code we will get a print.
You'd need to double flush the the event queue. We always have to
flush after changing the group->domain since that is preventing a UAF
Then you'd have to flush before changing the group->domain to avoid
the prints if faulting is being disabled.
IDK, may not be worth worrying about or maybe we should just remove
the prints..
Jason
^ permalink raw reply
* [PATCH v2] ARM: dts: imx: Add DT overlays for DH i.MX6 DHCOM SoM and boards
From: Marek Vasut @ 2026-03-24 19:03 UTC (permalink / raw)
To: linux-arm-kernel
Cc: Marek Vasut, Christoph Niedermaier, Conor Dooley, Fabio Estevam,
Frank Li, Krzysztof Kozlowski, Pengutronix Kernel Team,
Rob Herring, Sascha Hauer, devicetree, imx, kernel, linux-kernel
Add DT overlays to support DH i.MX6 DHCOM SoM carrier board expansion
modules. The following DT overlays are implemented:
- PDK2:
- DH 497-200 Display board in edge connector X12
- DH 505-200 Display board in edge connector X12
- DH 531-100 SPI/I2C board in header X21
- DH 531-200 SPI/I2C board in header X22
- DH 560-200 Display board in edge connector X12
- PicoITX:
- DH 626-100 Display board in edge connector X2
Signed-off-by: Marek Vasut <marex@nabladev.com>
---
Cc: Christoph Niedermaier <cniedermaier@dh-electronics.com>
Cc: Conor Dooley <conor+dt@kernel.org>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Frank Li <Frank.Li@nxp.com>
Cc: Krzysztof Kozlowski <krzk+dt@kernel.org>
Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
Cc: Rob Herring <robh@kernel.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: devicetree@vger.kernel.org
Cc: imx@lists.linux.dev
Cc: kernel@dh-electronics.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
---
V2: - Update copyright years
- Sort compatible and reg
---
arch/arm/boot/dts/nxp/imx/Makefile | 37 +++++++++
...l-dhcom-overlay-panel-dpi-ch101olhlwh.dtsi | 75 +++++++++++++++++++
.../imx/imx6qdl-dhcom-overlay-panel-dpi.dtsi | 61 +++++++++++++++
...mx6qdl-dhcom-pdk2-overlay-497-200-x12.dtso | 28 +++++++
...-pdk2-overlay-505-200-x12-ch101olhlwh.dtso | 26 +++++++
...mx6qdl-dhcom-pdk2-overlay-531-100-x21.dtso | 32 ++++++++
...mx6qdl-dhcom-pdk2-overlay-531-100-x22.dtso | 32 ++++++++
...mx6qdl-dhcom-pdk2-overlay-560-200-x12.dtso | 39 ++++++++++
...icoitx-overlay-626-100-x2-ch101olhlwh.dtso | 8 ++
.../boot/dts/nxp/imx/imx6qdl-dhcom-som.dtsi | 6 +-
10 files changed, 341 insertions(+), 3 deletions(-)
create mode 100644 arch/arm/boot/dts/nxp/imx/imx6qdl-dhcom-overlay-panel-dpi-ch101olhlwh.dtsi
create mode 100644 arch/arm/boot/dts/nxp/imx/imx6qdl-dhcom-overlay-panel-dpi.dtsi
create mode 100644 arch/arm/boot/dts/nxp/imx/imx6qdl-dhcom-pdk2-overlay-497-200-x12.dtso
create mode 100644 arch/arm/boot/dts/nxp/imx/imx6qdl-dhcom-pdk2-overlay-505-200-x12-ch101olhlwh.dtso
create mode 100644 arch/arm/boot/dts/nxp/imx/imx6qdl-dhcom-pdk2-overlay-531-100-x21.dtso
create mode 100644 arch/arm/boot/dts/nxp/imx/imx6qdl-dhcom-pdk2-overlay-531-100-x22.dtso
create mode 100644 arch/arm/boot/dts/nxp/imx/imx6qdl-dhcom-pdk2-overlay-560-200-x12.dtso
create mode 100644 arch/arm/boot/dts/nxp/imx/imx6qdl-dhcom-picoitx-overlay-626-100-x2-ch101olhlwh.dtso
diff --git a/arch/arm/boot/dts/nxp/imx/Makefile b/arch/arm/boot/dts/nxp/imx/Makefile
index de4142e8f3ce8..856c9f21bd703 100644
--- a/arch/arm/boot/dts/nxp/imx/Makefile
+++ b/arch/arm/boot/dts/nxp/imx/Makefile
@@ -58,6 +58,31 @@ dtb-$(CONFIG_SOC_IMX53) += \
imx53-voipac-bsb.dtb
imx53-qsb-hdmi-dtbs := imx53-qsb.dtb imx53-qsb-hdmi.dtbo
imx53-qsrb-hdmi-dtbs := imx53-qsrb.dtb imx53-qsb-hdmi.dtbo
+
+imx6qdl-dhcom-pdk2-overlay-497-200-x12-dtbs := \
+ imx6q-dhcom-pdk2.dtb \
+ imx6qdl-dhcom-pdk2-overlay-497-200-x12.dtbo
+
+imx6qdl-dhcom-pdk2-overlay-505-200-x12-ch101olhlwh-dtbs := \
+ imx6q-dhcom-pdk2.dtb \
+ imx6qdl-dhcom-pdk2-overlay-505-200-x12-ch101olhlwh.dtbo
+
+imx6qdl-dhcom-pdk2-overlay-531-100-x21-dtbs := \
+ imx6q-dhcom-pdk2.dtb \
+ imx6qdl-dhcom-pdk2-overlay-531-100-x21.dtbo
+
+imx6qdl-dhcom-pdk2-overlay-531-100-x22-dtbs := \
+ imx6q-dhcom-pdk2.dtb \
+ imx6qdl-dhcom-pdk2-overlay-531-100-x22.dtbo
+
+imx6qdl-dhcom-pdk2-overlay-560-200-x12-dtbs := \
+ imx6q-dhcom-pdk2.dtb \
+ imx6qdl-dhcom-pdk2-overlay-560-200-x12.dtbo
+
+imx6qdl-dhcom-picoitx-overlay-626-100-x2-ch101olhlwh-dtbs := \
+ imx6q-dhcom-pdk2.dtb \
+ imx6qdl-dhcom-picoitx-overlay-626-100-x2-ch101olhlwh.dtbo
+
dtb-$(CONFIG_SOC_IMX6Q) += \
imx6dl-alti6p.dtb \
imx6dl-apf6dev.dtb \
@@ -179,6 +204,18 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
imx6q-cubox-i-som-v15.dtb \
imx6q-dfi-fs700-m60.dtb \
imx6q-dhcom-pdk2.dtb \
+ imx6qdl-dhcom-pdk2-overlay-497-200-x12.dtb \
+ imx6qdl-dhcom-pdk2-overlay-497-200-x12.dtbo \
+ imx6qdl-dhcom-pdk2-overlay-505-200-x12-ch101olhlwh.dtb \
+ imx6qdl-dhcom-pdk2-overlay-505-200-x12-ch101olhlwh.dtbo \
+ imx6qdl-dhcom-pdk2-overlay-531-100-x21.dtb \
+ imx6qdl-dhcom-pdk2-overlay-531-100-x21.dtbo \
+ imx6qdl-dhcom-pdk2-overlay-531-100-x22.dtb \
+ imx6qdl-dhcom-pdk2-overlay-531-100-x22.dtbo \
+ imx6qdl-dhcom-pdk2-overlay-560-200-x12.dtb \
+ imx6qdl-dhcom-pdk2-overlay-560-200-x12.dtbo \
+ imx6qdl-dhcom-picoitx-overlay-626-100-x2-ch101olhlwh.dtb \
+ imx6qdl-dhcom-picoitx-overlay-626-100-x2-ch101olhlwh.dtbo \
imx6q-display5-tianma-tm070-1280x768.dtb \
imx6q-dmo-edmqmx6.dtb \
imx6q-dms-ba16.dtb \
diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-dhcom-overlay-panel-dpi-ch101olhlwh.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-dhcom-overlay-panel-dpi-ch101olhlwh.dtsi
new file mode 100644
index 0000000000000..90259785126ba
--- /dev/null
+++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-dhcom-overlay-panel-dpi-ch101olhlwh.dtsi
@@ -0,0 +1,75 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+/*
+ * Copyright (C) 2021-2026 Marek Vasut
+ */
+/dts-v1/;
+/plugin/;
+
+#include "imx6qdl-dhcom-overlay-panel-dpi.dtsi"
+
+&{/} {
+ lvds-encoder {
+ compatible = "onnn,fin3385", "lvds-encoder";
+ pclk-sample = <1>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ lvds_bridge_in: endpoint {
+ remote-endpoint = <&ipu1_dpi0_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ lvds_bridge_out: endpoint {
+ remote-endpoint = <&panel_in>;
+ };
+ };
+ };
+ };
+};
+
+&display_bl {
+ pwms = <&pwm1 0 5000000 0>;
+};
+
+&i2c2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ touchscreen@41 {
+ compatible = "ilitek,ili251x";
+ reg = <0x41>;
+ interrupt-parent = <&gpio4>;
+ interrupts = <7 IRQ_TYPE_EDGE_FALLING>;
+ reset-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
+ touchscreen-size-x = <16384>;
+ touchscreen-size-y = <9600>;
+ touchscreen-inverted-x;
+ touchscreen-inverted-y;
+ };
+
+ eeprom@50 {
+ compatible = "atmel,24c04";
+ reg = <0x50>;
+ pagesize = <16>;
+ };
+};
+
+&ipu1_dpi0_out {
+ remote-endpoint = <&lvds_bridge_in>;
+};
+
+&panel {
+ compatible = "chefree,ch101olhlwh-002";
+};
+
+&panel_in {
+ remote-endpoint = <&lvds_bridge_out>;
+};
diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-dhcom-overlay-panel-dpi.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-dhcom-overlay-panel-dpi.dtsi
new file mode 100644
index 0000000000000..48d346b6b484b
--- /dev/null
+++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-dhcom-overlay-panel-dpi.dtsi
@@ -0,0 +1,61 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+/*
+ * Copyright (C) 2021-2026 Marek Vasut
+ */
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/pwm/pwm.h>
+
+&{/} {
+ display_bl: display-bl {
+ compatible = "pwm-backlight";
+ brightness-levels = <0 16 22 30 40 55 75 102 138 188 255>;
+ default-brightness-level = <8>;
+ enable-gpios = <&gpio3 27 GPIO_ACTIVE_HIGH>;
+ status = "okay";
+ };
+
+ lcd_display: disp0 {
+ compatible = "fsl,imx-parallel-display";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interface-pix-fmt = "rgb24";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ipu1_lcdif>;
+ status = "okay";
+
+ port@0 {
+ reg = <0>;
+
+ ipu1_display_in: endpoint {
+ remote-endpoint = <&ipu1_di0_disp0>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ ipu1_dpi0_out: endpoint {
+ remote-endpoint = <&panel_in>;
+ };
+ };
+ };
+
+ panel: panel {
+ backlight = <&display_bl>;
+
+ port {
+ panel_in: endpoint {
+ };
+ };
+ };
+};
+
+&ipu1_di0_disp0 {
+ remote-endpoint = <&ipu1_display_in>;
+};
+
+&pwm1 {
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-dhcom-pdk2-overlay-497-200-x12.dtso b/arch/arm/boot/dts/nxp/imx/imx6qdl-dhcom-pdk2-overlay-497-200-x12.dtso
new file mode 100644
index 0000000000000..a5cb77b351af9
--- /dev/null
+++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-dhcom-pdk2-overlay-497-200-x12.dtso
@@ -0,0 +1,28 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+/*
+ * Copyright (C) 2021-2026 Marek Vasut
+ */
+/dts-v1/;
+/plugin/;
+
+#include "imx6qdl-dhcom-overlay-panel-dpi.dtsi"
+
+&display_bl {
+ pwms = <&pwm1 0 50000 PWM_POLARITY_INVERTED>;
+};
+
+&ipu1_dpi0_out {
+ remote-endpoint = <&panel_in>;
+};
+
+&panel {
+ compatible = "dataimage,scf0700c48ggu18";
+};
+
+&panel_in {
+ remote-endpoint = <&ipu1_dpi0_out>;
+};
+
+&touch_som { /* TSC2004 */
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-dhcom-pdk2-overlay-505-200-x12-ch101olhlwh.dtso b/arch/arm/boot/dts/nxp/imx/imx6qdl-dhcom-pdk2-overlay-505-200-x12-ch101olhlwh.dtso
new file mode 100644
index 0000000000000..3e02031b74d0c
--- /dev/null
+++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-dhcom-pdk2-overlay-505-200-x12-ch101olhlwh.dtso
@@ -0,0 +1,26 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+/*
+ * Copyright (C) 2021-2026 Marek Vasut
+ */
+/dts-v1/;
+/plugin/;
+
+#include "imx6qdl-dhcom-overlay-panel-dpi-ch101olhlwh.dtsi"
+
+&{/} {
+ gpio-keys {
+ /* BUTTON1 GPIO-B conflicts with touchscreen reset */
+ button-1 {
+ /* Use status as /delete-node/ does not work in DTOs */
+ status = "disabled";
+ };
+ };
+
+ led {
+ /* LED7 GPIO-H conflicts with touchscreen IRQ */
+ led-7 {
+ /* Use status as /delete-node/ does not work in DTOs */
+ status = "disabled";
+ };
+ };
+};
diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-dhcom-pdk2-overlay-531-100-x21.dtso b/arch/arm/boot/dts/nxp/imx/imx6qdl-dhcom-pdk2-overlay-531-100-x21.dtso
new file mode 100644
index 0000000000000..84a498833674d
--- /dev/null
+++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-dhcom-pdk2-overlay-531-100-x21.dtso
@@ -0,0 +1,32 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+/*
+ * Copyright (C) 2021-2026 Marek Vasut
+ */
+/dts-v1/;
+/plugin/;
+
+&ecspi1 {
+ status = "okay";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ eeprom@1 {
+ compatible = "microchip,25aa010a", "atmel,at25";
+ reg = <1>;
+ address-width = <8>;
+ pagesize = <16>;
+ size = <128>;
+ spi-max-frequency = <5000000>;
+ };
+};
+
+&i2c2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ eeprom@56 {
+ compatible = "atmel,24c04";
+ reg = <0x56>;
+ pagesize = <16>;
+ };
+};
diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-dhcom-pdk2-overlay-531-100-x22.dtso b/arch/arm/boot/dts/nxp/imx/imx6qdl-dhcom-pdk2-overlay-531-100-x22.dtso
new file mode 100644
index 0000000000000..9ff0771c6abf9
--- /dev/null
+++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-dhcom-pdk2-overlay-531-100-x22.dtso
@@ -0,0 +1,32 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+/*
+ * Copyright (C) 2021-2026 Marek Vasut
+ */
+/dts-v1/;
+/plugin/;
+
+&ecspi2 {
+ status = "okay";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ eeprom@0 {
+ compatible = "microchip,25aa010a", "atmel,at25";
+ reg = <0>;
+ address-width = <8>;
+ pagesize = <16>;
+ size = <128>;
+ spi-max-frequency = <5000000>;
+ };
+};
+
+&i2c1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ eeprom@56 {
+ compatible = "atmel,24c04";
+ reg = <0x56>;
+ pagesize = <16>;
+ };
+};
diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-dhcom-pdk2-overlay-560-200-x12.dtso b/arch/arm/boot/dts/nxp/imx/imx6qdl-dhcom-pdk2-overlay-560-200-x12.dtso
new file mode 100644
index 0000000000000..9f5814e7a04f2
--- /dev/null
+++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-dhcom-pdk2-overlay-560-200-x12.dtso
@@ -0,0 +1,39 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+/*
+ * Copyright (C) 2021-2026 Marek Vasut
+ */
+/dts-v1/;
+/plugin/;
+
+#include "imx6qdl-dhcom-overlay-panel-dpi.dtsi"
+
+&display_bl {
+ pwms = <&pwm1 0 50000 PWM_POLARITY_INVERTED>;
+};
+
+&i2c2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ touchscreen@38 {
+ compatible = "edt,edt-ft5406";
+ reg = <0x38>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_dhcom_e>;
+ /* Touchscreen IRQ GPIO-E conflicts with LED5 GPIO */
+ interrupt-parent = <&gpio4>;
+ interrupts = <5 IRQ_TYPE_EDGE_FALLING>; /* GPIO E */
+ };
+};
+
+&ipu1_dpi0_out {
+ remote-endpoint = <&panel_in>;
+};
+
+&panel {
+ compatible = "edt,etm0700g0edh6";
+};
+
+&panel_in {
+ remote-endpoint = <&ipu1_dpi0_out>;
+};
diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-dhcom-picoitx-overlay-626-100-x2-ch101olhlwh.dtso b/arch/arm/boot/dts/nxp/imx/imx6qdl-dhcom-picoitx-overlay-626-100-x2-ch101olhlwh.dtso
new file mode 100644
index 0000000000000..5c380572c4092
--- /dev/null
+++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-dhcom-picoitx-overlay-626-100-x2-ch101olhlwh.dtso
@@ -0,0 +1,8 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+/*
+ * Copyright (C) 2023-2026 Marek Vasut
+ */
+/dts-v1/;
+/plugin/;
+
+#include "imx6qdl-dhcom-overlay-panel-dpi-ch101olhlwh.dtsi"
diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-dhcom-som.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-dhcom-som.dtsi
index af0d95396cd51..74dfb92f15147 100644
--- a/arch/arm/boot/dts/nxp/imx/imx6qdl-dhcom-som.dtsi
+++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-dhcom-som.dtsi
@@ -1,7 +1,7 @@
// SPDX-License-Identifier: GPL-2.0+
/*
- * Copyright (C) 2015-2021 DH electronics GmbH
- * Copyright (C) 2018 Marek Vasut <marex@denx.de>
+ * Copyright (C) 2015-2026 DH electronics GmbH
+ * Copyright (C) 2018-2026 Marek Vasut
*/
#include <dt-bindings/pwm/pwm.h>
@@ -303,7 +303,7 @@ ldo2_reg: ldo2 {
};
};
- touchscreen@49 { /* TSC2004 */
+ touch_som: touchscreen@49 { /* TSC2004 */
compatible = "ti,tsc2004";
interrupts-extended = <&gpio4 14 IRQ_TYPE_EDGE_FALLING>;
pinctrl-0 = <&pinctrl_tsc2004>;
--
2.53.0
^ permalink raw reply related
* [PATCH v2] arm64: dts: imx8mp: Add DT overlays for DH i.MX8M Plus DHCOM SoM and boards
From: Marek Vasut @ 2026-03-24 19:04 UTC (permalink / raw)
To: linux-arm-kernel
Cc: Marek Vasut, Christoph Niedermaier, Conor Dooley, Fabio Estevam,
Frank Li, Krzysztof Kozlowski, Pengutronix Kernel Team,
Rob Herring, Sascha Hauer, devicetree, imx, kernel, linux-kernel
Add DT overlays to support DH i.MX8M Plus DHCOM SoM variants and carrier
board expansion modules. The following DT overlays are implemented:
- SoM:
- DH 660-x00 SoM with 1xRMII PHY
- DH 660-x00 SoM with 2xRMII PHY
- PDK2:
- DH 505-200 Display board in edge connector X12 via direct LVDS
- DH 531-100 SPI/I2C board in header X21
- DH 531-200 SPI/I2C board in header X22
- DH 560-200 Display board in edge connector X12
- PDK3:
- DH 505-200 Display board in edge connector X36 via direct LVDS
- DH 531-100 SPI/I2C board in header X40
- DH 531-200 SPI/I2C board in header X41
- DH 560-300 Display board in edge connector X36
- EA muRata 2AE M.2 A/E-Key card in connector X20
- NXP SPF-29853-C1 MINISASTOCSI with OV5640 sensor in connector X31
- NXP SPF-29853-C1 MINISASTOCSI with OV5640 sensor in connector X29
- PicoITX:
- DH 626-100 Display board in edge connector X2
Signed-off-by: Marek Vasut <marex@nabladev.com>
---
Cc: Christoph Niedermaier <cniedermaier@dh-electronics.com>
Cc: Conor Dooley <conor+dt@kernel.org>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Frank Li <Frank.Li@nxp.com>
Cc: Krzysztof Kozlowski <krzk+dt@kernel.org>
Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
Cc: Rob Herring <robh@kernel.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: devicetree@vger.kernel.org
Cc: imx@lists.linux.dev
Cc: kernel@dh-electronics.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
---
V2: - Update copyright years
- Add newline between reg and port
- Place status = "okay" at the end of nodes
- Sort compatible and reg
---
arch/arm64/boot/dts/freescale/Makefile | 115 +++++++++++++++++-
...mx8mp-dhcom-overlay-panel-ch101olhlwh.dtsi | 42 +++++++
.../imx8mp-dhcom-overlay-panel-clock.dtsi | 33 +++++
.../imx8mp-dhcom-overlay-panel-common.dtsi | 31 +++++
.../imx8mp-dhcom-overlay-panel-dpi.dtsi | 35 ++++++
...8mp-dhcom-overlay-panel-etm0700g0edh6.dtsi | 53 ++++++++
.../imx8mp-dhcom-overlay-panel-lvds.dtsi | 22 ++++
.../imx8mp-dhcom-pdk-overlay-eth2xfast.dtso | 10 ++
...-pdk2-overlay-505-200-x12-ch101olhlwh.dtso | 40 ++++++
...imx8mp-dhcom-pdk2-overlay-531-100-x21.dtso | 32 +++++
...imx8mp-dhcom-pdk2-overlay-531-100-x22.dtso | 32 +++++
...imx8mp-dhcom-pdk2-overlay-560-300-x12.dtso | 27 ++++
...-pdk3-overlay-505-200-x36-ch101olhlwh.dtso | 55 +++++++++
...imx8mp-dhcom-pdk3-overlay-531-100-x40.dtso | 32 +++++
...imx8mp-dhcom-pdk3-overlay-531-100-x41.dtso | 32 +++++
...imx8mp-dhcom-pdk3-overlay-560-300-x36.dtso | 26 ++++
...imx8mp-dhcom-pdk3-overlay-732-100-x36.dtso | 36 ++++++
...-dhcom-pdk3-overlay-ea-murata-2ae-x20.dtso | 56 +++++++++
...3-overlay-nxp-spf-29853-c1-ov5640-x29.dtso | 30 +++++
...3-overlay-nxp-spf-29853-c1-ov5640-x31.dtso | 30 +++++
...-pdk3-overlay-nxp-spf-29853-c1-ov5640.dtsi | 64 ++++++++++
...icoitx-overlay-626-100-x2-ch101olhlwh.dtso | 79 ++++++++++++
.../imx8mp-dhcom-som-overlay-eth1xfast.dtso | 85 +++++++++++++
.../imx8mp-dhcom-som-overlay-eth2xfast.dtso | 29 +++++
.../boot/dts/freescale/imx8mp-dhcom-som.dtsi | 4 +-
25 files changed, 1025 insertions(+), 5 deletions(-)
create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-dhcom-overlay-panel-ch101olhlwh.dtsi
create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-dhcom-overlay-panel-clock.dtsi
create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-dhcom-overlay-panel-common.dtsi
create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-dhcom-overlay-panel-dpi.dtsi
create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-dhcom-overlay-panel-etm0700g0edh6.dtsi
create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-dhcom-overlay-panel-lvds.dtsi
create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk-overlay-eth2xfast.dtso
create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk2-overlay-505-200-x12-ch101olhlwh.dtso
create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk2-overlay-531-100-x21.dtso
create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk2-overlay-531-100-x22.dtso
create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk2-overlay-560-300-x12.dtso
create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3-overlay-505-200-x36-ch101olhlwh.dtso
create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3-overlay-531-100-x40.dtso
create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3-overlay-531-100-x41.dtso
create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3-overlay-560-300-x36.dtso
create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3-overlay-732-100-x36.dtso
create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3-overlay-ea-murata-2ae-x20.dtso
create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3-overlay-nxp-spf-29853-c1-ov5640-x29.dtso
create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3-overlay-nxp-spf-29853-c1-ov5640-x31.dtso
create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3-overlay-nxp-spf-29853-c1-ov5640.dtsi
create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-dhcom-picoitx-overlay-626-100-x2-ch101olhlwh.dtso
create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-dhcom-som-overlay-eth1xfast.dtso
create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-dhcom-som-overlay-eth2xfast.dtso
diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
index 31bc80586c682..e054fdba72d7a 100644
--- a/arch/arm64/boot/dts/freescale/Makefile
+++ b/arch/arm64/boot/dts/freescale/Makefile
@@ -232,9 +232,118 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mp-data-modul-edm-sbc.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-debix-model-a.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-debix-som-a-bmb-08.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-dhcom-drc02.dtb
-dtb-$(CONFIG_ARCH_MXC) += imx8mp-dhcom-pdk2.dtb
-dtb-$(CONFIG_ARCH_MXC) += imx8mp-dhcom-pdk3.dtb
-dtb-$(CONFIG_ARCH_MXC) += imx8mp-dhcom-picoitx.dtb
+
+imx8mp-dhcom-pdk2-overlay-505-200-x12-ch101olhlwh-dtbs := \
+ imx8mp-dhcom-pdk2.dtb \
+ imx8mp-dhcom-pdk2-overlay-505-200-x12-ch101olhlwh.dtbo
+
+imx8mp-dhcom-pdk2-overlay-531-100-x21-dtbs := \
+ imx8mp-dhcom-pdk2.dtb \
+ imx8mp-dhcom-pdk2-overlay-531-100-x21.dtbo
+
+imx8mp-dhcom-pdk2-overlay-531-100-x22-dtbs := \
+ imx8mp-dhcom-pdk2.dtb \
+ imx8mp-dhcom-pdk2-overlay-531-100-x22.dtbo
+
+imx8mp-dhcom-pdk2-overlay-560-300-x12-dtbs := \
+ imx8mp-dhcom-pdk2.dtb \
+ imx8mp-dhcom-pdk2-overlay-560-300-x12.dtbo
+
+imx8mp-dhcom-pdk2-overlay-eth1xfast-dtbs := \
+ imx8mp-dhcom-pdk2.dtb \
+ imx8mp-dhcom-som-overlay-eth1xfast.dtbo
+
+imx8mp-dhcom-pdk2-overlay-eth2xfast-dtbs := \
+ imx8mp-dhcom-pdk2.dtb \
+ imx8mp-dhcom-som-overlay-eth2xfast.dtbo \
+ imx8mp-dhcom-pdk-overlay-eth2xfast.dtbo
+
+imx8mp-dhcom-pdk3-overlay-505-200-x36-ch101olhlwh-dtbs := \
+ imx8mp-dhcom-pdk3.dtb \
+ imx8mp-dhcom-pdk3-overlay-505-200-x36-ch101olhlwh.dtbo
+
+imx8mp-dhcom-pdk3-overlay-531-100-x40-dtbs := \
+ imx8mp-dhcom-pdk3.dtb \
+ imx8mp-dhcom-pdk3-overlay-531-100-x40.dtbo
+
+imx8mp-dhcom-pdk3-overlay-531-100-x41-dtbs := \
+ imx8mp-dhcom-pdk3.dtb \
+ imx8mp-dhcom-pdk3-overlay-531-100-x41.dtbo
+
+imx8mp-dhcom-pdk3-overlay-560-300-x36-dtbs := \
+ imx8mp-dhcom-pdk3.dtb \
+ imx8mp-dhcom-pdk3-overlay-560-300-x36.dtbo
+
+imx8mp-dhcom-pdk3-overlay-732-100-x36-dtbs := \
+ imx8mp-dhcom-pdk3.dtb \
+ imx8mp-dhcom-pdk3-overlay-732-100-x36.dtbo
+
+imx8mp-dhcom-pdk3-overlay-ea-murata-2ae-x20-dtbs := \
+ imx8mp-dhcom-pdk3.dtb \
+ imx8mp-dhcom-pdk3-overlay-ea-murata-2ae-x20.dtbo
+
+imx8mp-dhcom-pdk3-overlay-eth1xfast-dtbs := \
+ imx8mp-dhcom-pdk3.dtb \
+ imx8mp-dhcom-som-overlay-eth1xfast.dtbo
+
+imx8mp-dhcom-pdk3-overlay-eth2xfast-dtbs := \
+ imx8mp-dhcom-pdk3.dtb \
+ imx8mp-dhcom-som-overlay-eth2xfast.dtbo \
+ imx8mp-dhcom-pdk-overlay-eth2xfast.dtbo
+
+imx8mp-dhcom-pdk3-overlay-nxp-spf-29853-c1-ov5640-x29-dtbs := \
+ imx8mp-dhcom-pdk3.dtb \
+ imx8mp-dhcom-pdk3-overlay-nxp-spf-29853-c1-ov5640-x29.dtbo
+
+imx8mp-dhcom-pdk3-overlay-nxp-spf-29853-c1-ov5640-x31-dtbs := \
+ imx8mp-dhcom-pdk3.dtb \
+ imx8mp-dhcom-pdk3-overlay-nxp-spf-29853-c1-ov5640-x31.dtbo
+
+dtb-$(CONFIG_ARCH_MXC) += imx8mp-dhcom-som-overlay-eth1xfast.dtbo \
+ imx8mp-dhcom-som-overlay-eth2xfast.dtbo
+
+dtb-$(CONFIG_ARCH_MXC) += imx8mp-dhcom-pdk-overlay-eth2xfast.dtbo
+
+dtb-$(CONFIG_ARCH_MXC) += imx8mp-dhcom-pdk2.dtb \
+ imx8mp-dhcom-pdk2-overlay-505-200-x12-ch101olhlwh.dtb \
+ imx8mp-dhcom-pdk2-overlay-505-200-x12-ch101olhlwh.dtbo \
+ imx8mp-dhcom-pdk2-overlay-531-100-x21.dtb \
+ imx8mp-dhcom-pdk2-overlay-531-100-x21.dtbo \
+ imx8mp-dhcom-pdk2-overlay-531-100-x22.dtb \
+ imx8mp-dhcom-pdk2-overlay-531-100-x22.dtbo \
+ imx8mp-dhcom-pdk2-overlay-560-300-x12.dtb \
+ imx8mp-dhcom-pdk2-overlay-560-300-x12.dtbo \
+ imx8mp-dhcom-pdk2-overlay-eth1xfast.dtb \
+ imx8mp-dhcom-pdk2-overlay-eth2xfast.dtb
+
+dtb-$(CONFIG_ARCH_MXC) += imx8mp-dhcom-pdk3.dtb \
+ imx8mp-dhcom-pdk3-overlay-505-200-x36-ch101olhlwh.dtb \
+ imx8mp-dhcom-pdk3-overlay-505-200-x36-ch101olhlwh.dtbo \
+ imx8mp-dhcom-pdk3-overlay-531-100-x40.dtb \
+ imx8mp-dhcom-pdk3-overlay-531-100-x40.dtbo \
+ imx8mp-dhcom-pdk3-overlay-531-100-x41.dtb \
+ imx8mp-dhcom-pdk3-overlay-531-100-x41.dtbo \
+ imx8mp-dhcom-pdk3-overlay-560-300-x36.dtb \
+ imx8mp-dhcom-pdk3-overlay-560-300-x36.dtbo \
+ imx8mp-dhcom-pdk3-overlay-732-100-x36.dtb \
+ imx8mp-dhcom-pdk3-overlay-732-100-x36.dtbo \
+ imx8mp-dhcom-pdk3-overlay-ea-murata-2ae-x20.dtb \
+ imx8mp-dhcom-pdk3-overlay-ea-murata-2ae-x20.dtbo \
+ imx8mp-dhcom-pdk3-overlay-eth1xfast.dtb \
+ imx8mp-dhcom-pdk3-overlay-eth2xfast.dtb \
+ imx8mp-dhcom-pdk3-overlay-nxp-spf-29853-c1-ov5640-x29.dtb \
+ imx8mp-dhcom-pdk3-overlay-nxp-spf-29853-c1-ov5640-x29.dtbo \
+ imx8mp-dhcom-pdk3-overlay-nxp-spf-29853-c1-ov5640-x31.dtb \
+ imx8mp-dhcom-pdk3-overlay-nxp-spf-29853-c1-ov5640-x31.dtbo
+
+imx8mp-dhcom-picoitx-overlay-626-100-x2-ch101olhlwh-dtbs := \
+ imx8mp-dhcom-picoitx.dtb \
+ imx8mp-dhcom-picoitx-overlay-626-100-x2-ch101olhlwh.dtbo
+
+dtb-$(CONFIG_ARCH_MXC) += imx8mp-dhcom-picoitx.dtb \
+ imx8mp-dhcom-picoitx-overlay-626-100-x2-ch101olhlwh.dtb \
+ imx8mp-dhcom-picoitx-overlay-626-100-x2-ch101olhlwh.dtbo
+
dtb-$(CONFIG_ARCH_MXC) += imx8mp-edm-g-wb.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-evk.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-frdm.dtb
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-overlay-panel-ch101olhlwh.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-overlay-panel-ch101olhlwh.dtsi
new file mode 100644
index 0000000000000..0cb9e0738cd79
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-overlay-panel-ch101olhlwh.dtsi
@@ -0,0 +1,42 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2022-2026 Marek Vasut
+ */
+
+&display_bl {
+ pwms = <&pwm1 0 5000000 0>;
+};
+
+&DH_OVERLAY_PANEL_I2C_BUS {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ touchscreen@41 {
+ compatible = "ilitek,ili251x";
+ reg = <0x41>;
+ pinctrl-0 = <DH_OVERLAY_PANEL_I2C_TOUCHSCREEN_PINCTRL>;
+ pinctrl-names = "default";
+ interrupt-parent = <&DH_OVERLAY_PANEL_I2C_TOUCHSCREEN_IRQ_PARENT>;
+ interrupts = <DH_OVERLAY_PANEL_I2C_TOUCHSCREEN_IRQ_PIN IRQ_TYPE_EDGE_FALLING>;
+ reset-gpios = <&DH_OVERLAY_PANEL_I2C_TOUCHSCREEN_RESET_GPIO
+ DH_OVERLAY_PANEL_I2C_TOUCHSCREEN_RESET_PIN GPIO_ACTIVE_LOW>;
+ touchscreen-size-x = <16384>;
+ touchscreen-size-y = <9600>;
+ touchscreen-inverted-x;
+ touchscreen-inverted-y;
+ };
+
+ eeprom@50 {
+ compatible = "atmel,24c04";
+ reg = <0x50>;
+ pagesize = <16>;
+ };
+};
+
+&panel {
+ compatible = "chefree,ch101olhlwh-002";
+};
+
+&pwm1 {
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-overlay-panel-clock.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-overlay-panel-clock.dtsi
new file mode 100644
index 0000000000000..8e702636a8021
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-overlay-panel-clock.dtsi
@@ -0,0 +1,33 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2024-2026 Marek Vasut
+ */
+
+#include <dt-bindings/clock/imx8mp-clock.h>
+
+&media_blk_ctrl {
+ /*
+ * Sys PLL3 supplies TC9595 RefClk
+ * Audio PLL2 supplies MEDIA_DISP1_PIX (DSI)
+ * Video PLL1 supplies MEDIA_DISP2_PIX (LVDS)
+ */
+ assigned-clocks = <&clk IMX8MP_CLK_MEDIA_AXI>,
+ <&clk IMX8MP_CLK_MEDIA_APB>,
+ <&clk IMX8MP_CLK_MEDIA_DISP1_PIX>,
+ <&clk IMX8MP_CLK_MEDIA_DISP2_PIX>,
+ <&clk IMX8MP_AUDIO_PLL2>,
+ <&clk IMX8MP_VIDEO_PLL1>;
+ assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_1000M>,
+ <&clk IMX8MP_SYS_PLL1_800M>,
+ <&clk IMX8MP_AUDIO_PLL2_OUT>,
+ <&clk IMX8MP_VIDEO_PLL1_OUT>;
+ assigned-clock-rates = <500000000>, <200000000>,
+ <0>, <0>, <0>, <0>;
+};
+
+&tc_bridge {
+ assigned-clocks = <&clk IMX8MP_CLK_CLKOUT2_SEL>,
+ <&clk IMX8MP_CLK_CLKOUT2>,
+ <&clk IMX8MP_SYS_PLL3_OUT>;
+ assigned-clock-parents = <&clk IMX8MP_SYS_PLL3_OUT>;
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-overlay-panel-common.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-overlay-panel-common.dtsi
new file mode 100644
index 0000000000000..e8e4b40e20449
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-overlay-panel-common.dtsi
@@ -0,0 +1,31 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2023-2026 Marek Vasut
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/pwm/pwm.h>
+
+#include "imx8mp-dhcom-overlay-panel-clock.dtsi"
+
+&{/} {
+ display_bl: display-bl {
+ compatible = "pwm-backlight";
+ brightness-levels = <0 16 22 30 40 55 75 102 138 188 255>;
+ default-brightness-level = <8>;
+ enable-gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>; /* GPIO G */
+ status = "okay";
+ };
+
+ panel: panel {
+ backlight = <&display_bl>;
+ power-supply = <®_vdd_3p3v_awo>;
+
+ port {
+ panel_in: endpoint {
+ };
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-overlay-panel-dpi.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-overlay-panel-dpi.dtsi
new file mode 100644
index 0000000000000..9c81e9f28852c
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-overlay-panel-dpi.dtsi
@@ -0,0 +1,35 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2022-2026 Marek Vasut
+ */
+
+#include "imx8mp-dhcom-overlay-panel-common.dtsi"
+
+&lcdif1 {
+ status = "okay";
+};
+
+&mipi_dsi {
+ status = "okay";
+};
+
+&panel_in {
+ remote-endpoint = <&tc_bridge_out>;
+};
+
+&tc_bridge {
+ status = "okay";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@1 {
+ reg = <1>;
+
+ tc_bridge_out: endpoint {
+ remote-endpoint = <&panel_in>;
+ };
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-overlay-panel-etm0700g0edh6.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-overlay-panel-etm0700g0edh6.dtsi
new file mode 100644
index 0000000000000..1e691e7c46ce9
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-overlay-panel-etm0700g0edh6.dtsi
@@ -0,0 +1,53 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+/*
+ * Copyright (C) 2022-2026 Marek Vasut
+ */
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/clock/imx8mp-clock.h>
+#include "imx8mp-dhcom-overlay-panel-dpi.dtsi"
+
+&{/} {
+ led {
+ led-0 {
+ /* LED5 GPIO conflicts with Touchscreen IRQ GPIO-E */
+ status = "disabled";
+ };
+ };
+};
+
+&display_bl {
+ pwms = <&pwm1 0 5000000 PWM_POLARITY_INVERTED>;
+};
+
+&DH_OVERLAY_PANEL_I2C_BUS {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ touchscreen@38 {
+ compatible = "edt,edt-ft5406";
+ reg = <0x38>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_dhcom_e>;
+ /* Touchscreen IRQ GPIO-E conflicts with LED5 GPIO */
+ interrupt-parent = <&gpio5>;
+ interrupts = <22 IRQ_TYPE_EDGE_FALLING>; /* GPIO E */
+ };
+};
+
+&mipi_dsi {
+ /*
+ * This is DSIM PLL frequency, DSI HS clock lane frequency
+ * is half of the "samsung,burst-clock-frequency" value.
+ */
+ samsung,burst-clock-frequency = <500000000>;
+};
+
+&panel {
+ compatible = "edt,etm0700g0edh6";
+};
+
+&pwm1 {
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-overlay-panel-lvds.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-overlay-panel-lvds.dtsi
new file mode 100644
index 0000000000000..c6e60a99488a5
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-overlay-panel-lvds.dtsi
@@ -0,0 +1,22 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2023-2026 Marek Vasut
+ */
+
+#include "imx8mp-dhcom-overlay-panel-common.dtsi"
+
+&ldb_lvds_ch0 {
+ remote-endpoint = <&panel_in>;
+};
+
+&lcdif2 {
+ status = "okay";
+};
+
+&lvds_bridge {
+ status = "okay";
+};
+
+&panel_in {
+ remote-endpoint = <&ldb_lvds_ch0>;
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk-overlay-eth2xfast.dtso b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk-overlay-eth2xfast.dtso
new file mode 100644
index 0000000000000..0da2b11720db3
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk-overlay-eth2xfast.dtso
@@ -0,0 +1,10 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+/*
+ * Copyright (C) 2023-2026 Marek Vasut
+ */
+/dts-v1/;
+/plugin/;
+
+ðphypdk { /* Micrel KSZ9131RNXI */
+ status = "disabled";
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk2-overlay-505-200-x12-ch101olhlwh.dtso b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk2-overlay-505-200-x12-ch101olhlwh.dtso
new file mode 100644
index 0000000000000..4f16641b09f01
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk2-overlay-505-200-x12-ch101olhlwh.dtso
@@ -0,0 +1,40 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2022-2026 Marek Vasut
+ */
+/dts-v1/;
+/plugin/;
+
+#define DH_OVERLAY_PANEL_I2C_BUS i2c5
+#define DH_OVERLAY_PANEL_I2C_TOUCHSCREEN_PINCTRL &pinctrl_dhcom_b &pinctrl_dhcom_h
+#define DH_OVERLAY_PANEL_I2C_TOUCHSCREEN_IRQ_PARENT gpio1
+#define DH_OVERLAY_PANEL_I2C_TOUCHSCREEN_IRQ_PIN 11
+#define DH_OVERLAY_PANEL_I2C_TOUCHSCREEN_RESET_GPIO gpio1
+#define DH_OVERLAY_PANEL_I2C_TOUCHSCREEN_RESET_PIN 8
+
+#include "imx8mp-dhcom-overlay-panel-lvds.dtsi"
+#include "imx8mp-dhcom-overlay-panel-ch101olhlwh.dtsi"
+
+&{/} {
+ gpio-keys {
+ button-1 {
+ /* BUTTON1 GPIO conflicts with Touchscreen RESET GPIO-B */
+ status = "disabled";
+ };
+ };
+
+ led {
+ led-2 {
+ /* LED7 GPIO conflicts with Touchscreen IRQ GPIO-H */
+ status = "disabled";
+ };
+ };
+};
+
+&media_blk_ctrl {
+ /*
+ * The Chefree CH101OLHLWH-002 panel requires 71.1 MHz LVDS clock.
+ * Set IMX8MP_VIDEO_PLL1 to 497.7 MHz , since 497.7 MHz / 7 = 71.1 MHz .
+ */
+ assigned-clock-rates = <500000000>, <200000000>, <0>, <0>, <0>, <497700000>;
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk2-overlay-531-100-x21.dtso b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk2-overlay-531-100-x21.dtso
new file mode 100644
index 0000000000000..64c730d11e6a8
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk2-overlay-531-100-x21.dtso
@@ -0,0 +1,32 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+/*
+ * Copyright (C) 2022-2026 Marek Vasut
+ */
+/dts-v1/;
+/plugin/;
+
+&ecspi1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ eeprom@0 {
+ compatible = "microchip,25aa010a", "atmel,at25";
+ reg = <0>;
+ address-width = <8>;
+ pagesize = <16>;
+ size = <128>;
+ spi-max-frequency = <5000000>;
+ };
+};
+
+&i2c5 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ eeprom@56 {
+ compatible = "atmel,24c04";
+ reg = <0x56>;
+ pagesize = <16>;
+ };
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk2-overlay-531-100-x22.dtso b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk2-overlay-531-100-x22.dtso
new file mode 100644
index 0000000000000..d789bf07cbb84
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk2-overlay-531-100-x22.dtso
@@ -0,0 +1,32 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+/*
+ * Copyright (C) 2022-2026 Marek Vasut
+ */
+/dts-v1/;
+/plugin/;
+
+&ecspi2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ eeprom@0 {
+ compatible = "microchip,25aa010a", "atmel,at25";
+ reg = <0>;
+ address-width = <8>;
+ pagesize = <16>;
+ size = <128>;
+ spi-max-frequency = <5000000>;
+ };
+};
+
+&i2c4 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ eeprom@56 {
+ compatible = "atmel,24c04";
+ reg = <0x56>;
+ pagesize = <16>;
+ };
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk2-overlay-560-300-x12.dtso b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk2-overlay-560-300-x12.dtso
new file mode 100644
index 0000000000000..ef5942b6f68b8
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk2-overlay-560-300-x12.dtso
@@ -0,0 +1,27 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+/*
+ * Copyright (C) 2022-2026 Marek Vasut
+ */
+/dts-v1/;
+/plugin/;
+
+#define DH_OVERLAY_PANEL_I2C_BUS i2c5
+
+#include "imx8mp-dhcom-overlay-panel-etm0700g0edh6.dtsi"
+#include "imx8mp-pinfunc.h"
+
+&{/} {
+ led {
+ led-0 {
+ /* LED5 GPIO conflicts with Touchscreen IRQ GPIO-E */
+ status = "disabled";
+ };
+ };
+};
+
+&pinctrl_dhcom_e {
+ fsl,pins = <
+ /* GPIO_E */
+ MX8MP_IOMUXC_UART1_RXD__GPIO5_IO22 0x40000000
+ >;
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3-overlay-505-200-x36-ch101olhlwh.dtso b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3-overlay-505-200-x36-ch101olhlwh.dtso
new file mode 100644
index 0000000000000..c42075e55833c
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3-overlay-505-200-x36-ch101olhlwh.dtso
@@ -0,0 +1,55 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2022-2026 Marek Vasut
+ */
+/dts-v1/;
+/plugin/;
+
+#define DH_OVERLAY_PANEL_I2C_BUS i2cmuxed0
+#define DH_OVERLAY_PANEL_I2C_TOUCHSCREEN_PINCTRL &pinctrl_dhcom_b &pinctrl_dhcom_c
+/* GPIO C - X21 */
+#define DH_OVERLAY_PANEL_I2C_TOUCHSCREEN_IRQ_PARENT gpio5
+#define DH_OVERLAY_PANEL_I2C_TOUCHSCREEN_IRQ_PIN 2
+/* GPIO B - X25 */
+#define DH_OVERLAY_PANEL_I2C_TOUCHSCREEN_RESET_GPIO gpio1
+#define DH_OVERLAY_PANEL_I2C_TOUCHSCREEN_RESET_PIN 8
+
+#include "imx8mp-dhcom-overlay-panel-lvds.dtsi"
+#include "imx8mp-dhcom-overlay-panel-ch101olhlwh.dtsi"
+#include "imx8mp-pinfunc.h"
+
+&{/} {
+ gpio-keys {
+ button-1 {
+ /* TA2 GPIO conflicts with Touchscreen RESET GPIO-B */
+ status = "disabled";
+ };
+
+ button-2 {
+ /* TA3 GPIO conflicts with Touchscreen IRQ GPIO-C */
+ status = "disabled";
+ };
+ };
+
+ led {
+ led-2 {
+ /* LED2 GPIO conflicts with BL-ON1 GPIO-G */
+ status = "disabled";
+ };
+ };
+};
+
+&media_blk_ctrl {
+ /*
+ * The Chefree CH101OLHLWH-002 panel requires 71.1 MHz LVDS clock.
+ * Set IMX8MP_VIDEO_PLL1 to 497.7 MHz , since 497.7 MHz / 7 = 71.1 MHz .
+ */
+ assigned-clock-rates = <500000000>, <200000000>, <0>, <0>, <0>, <497700000>;
+};
+
+&pinctrl_dhcom_c {
+ fsl,pins = <
+ /* GPIO_C */
+ MX8MP_IOMUXC_SAI3_MCLK__GPIO5_IO02 0x40000000
+ >;
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3-overlay-531-100-x40.dtso b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3-overlay-531-100-x40.dtso
new file mode 100644
index 0000000000000..a319f0d881a52
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3-overlay-531-100-x40.dtso
@@ -0,0 +1,32 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+/*
+ * Copyright (C) 2023-2026 Marek Vasut
+ */
+/dts-v1/;
+/plugin/;
+
+&ecspi1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ eeprom@0 {
+ compatible = "microchip,25aa010a", "atmel,at25";
+ reg = <0>;
+ address-width = <8>;
+ pagesize = <16>;
+ size = <128>;
+ spi-max-frequency = <5000000>;
+ };
+};
+
+&i2cmuxed0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ eeprom@56 {
+ compatible = "atmel,24c04";
+ reg = <0x56>;
+ pagesize = <16>;
+ };
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3-overlay-531-100-x41.dtso b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3-overlay-531-100-x41.dtso
new file mode 100644
index 0000000000000..aaddcc88087ae
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3-overlay-531-100-x41.dtso
@@ -0,0 +1,32 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+/*
+ * Copyright (C) 2023-2026 Marek Vasut
+ */
+/dts-v1/;
+/plugin/;
+
+&ecspi2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ eeprom@0 {
+ compatible = "microchip,25aa010a", "atmel,at25";
+ reg = <0>;
+ address-width = <8>;
+ pagesize = <16>;
+ size = <128>;
+ spi-max-frequency = <5000000>;
+ };
+};
+
+&i2c4 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ eeprom@56 {
+ compatible = "atmel,24c04";
+ reg = <0x56>;
+ pagesize = <16>;
+ };
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3-overlay-560-300-x36.dtso b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3-overlay-560-300-x36.dtso
new file mode 100644
index 0000000000000..a8c2af0aaf3c8
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3-overlay-560-300-x36.dtso
@@ -0,0 +1,26 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+/*
+ * Copyright (C) 2023-2026 Marek Vasut
+ */
+/dts-v1/;
+/plugin/;
+
+#define DH_OVERLAY_PANEL_I2C_BUS i2cmuxed0
+
+#include "imx8mp-dhcom-overlay-panel-etm0700g0edh6.dtsi"
+
+&{/} {
+ gpio-keys {
+ button-3 {
+ /* TA4 GPIO conflicts with Touchscreen IRQ GPIO-E */
+ status = "disabled";
+ };
+ };
+
+ led {
+ led-2 {
+ /* LED2 GPIO conflicts with BL-ON1 GPIO-G */
+ status = "disabled";
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3-overlay-732-100-x36.dtso b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3-overlay-732-100-x36.dtso
new file mode 100644
index 0000000000000..a527b7abf9a28
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3-overlay-732-100-x36.dtso
@@ -0,0 +1,36 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2024-2026 Marek Vasut
+ */
+/dts-v1/;
+/plugin/;
+
+#include "imx8mp-dhcom-overlay-panel-clock.dtsi"
+
+&lcdif1 {
+ status = "okay";
+};
+
+&mipi_dsi {
+ samsung,burst-clock-frequency = <1000000000>;
+ status = "okay";
+};
+
+&tc_bridge {
+ assigned-clock-rates = <26000000>, <26000000>, <416000000>;
+ toshiba,hpd-pin = <0>;
+ status = "okay";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@2 {
+ reg = <2>;
+
+ endpoint {
+ toshiba,pre-emphasis = /bits/ 8 <1 1>;
+ };
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3-overlay-ea-murata-2ae-x20.dtso b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3-overlay-ea-murata-2ae-x20.dtso
new file mode 100644
index 0000000000000..92ed69baea452
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3-overlay-ea-murata-2ae-x20.dtso
@@ -0,0 +1,56 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+/*
+ * Copyright (C) 2023-2026 Marek Vasut
+ */
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/clock/imx8mp-clock.h>
+#include <dt-bindings/gpio/gpio.h>
+
+/* This DTO requires HI00106 SoM variant. */
+
+&{/} {
+ led {
+ led-0 {
+ /* LED0 GPIO conflicts with #SDIO_RST GPIO-D */
+ status = "disabled";
+ };
+ };
+};
+
+&uart3 {
+ assigned-clocks = <&clk IMX8MP_CLK_UART3>;
+ assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_80M>;
+ assigned-clock-rates = <80000000>;
+
+ bluetooth {
+ compatible = "cypress,cyw4373a0-bt";
+ max-speed = <4000000>;
+ };
+};
+
+/* SD slot */
+&usdhc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usdhc2>;
+ broken-cd;
+ cap-power-off-card;
+ keep-power-in-suspend;
+ non-removable;
+ vmmc-supply = <&buck4>;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ wifi@1 { /* muRata 2AE */
+ compatible = "cypress,cyw4373-fmac", "brcm,bcm4329-fmac";
+ reg = <1>;
+ /*
+ * The "host-wake" interrupt output is by default not
+ * connected to the SoC, but can be connected on to
+ * SoC pin on the carrier board.
+ */
+ reset-gpios = <&gpio4 27 GPIO_ACTIVE_LOW>; /* GPIO D */
+ };
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3-overlay-nxp-spf-29853-c1-ov5640-x29.dtso b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3-overlay-nxp-spf-29853-c1-ov5640-x29.dtso
new file mode 100644
index 0000000000000..8ff313ede7c75
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3-overlay-nxp-spf-29853-c1-ov5640-x29.dtso
@@ -0,0 +1,30 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+/*
+ * Copyright (C) 2023-2026 Marek Vasut
+ */
+/dts-v1/;
+/plugin/;
+
+#include "imx8mp-dhcom-pdk3-overlay-nxp-spf-29853-c1-ov5640.dtsi"
+
+&mipi_csi_1 {
+ status = "okay";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ mipi_csi0_ep: endpoint {
+ remote-endpoint = <&ov5640_to_mipi_csi2>;
+ clock-lanes = <0>;
+ data-lanes = <1 2>;
+ };
+ };
+ };
+};
+
+&ov5640 {
+ powerdown-gpios = <&csi2exp 1 GPIO_ACTIVE_HIGH>;
+ reset-gpios = <&csi2exp 0 GPIO_ACTIVE_LOW>;
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3-overlay-nxp-spf-29853-c1-ov5640-x31.dtso b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3-overlay-nxp-spf-29853-c1-ov5640-x31.dtso
new file mode 100644
index 0000000000000..52cdafa5dd2d9
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3-overlay-nxp-spf-29853-c1-ov5640-x31.dtso
@@ -0,0 +1,30 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+/*
+ * Copyright (C) 2023-2026 Marek Vasut
+ */
+/dts-v1/;
+/plugin/;
+
+#include "imx8mp-dhcom-pdk3-overlay-nxp-spf-29853-c1-ov5640.dtsi"
+
+&mipi_csi_0 {
+ status = "okay";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ mipi_csi0_ep: endpoint {
+ remote-endpoint = <&ov5640_to_mipi_csi2>;
+ clock-lanes = <0>;
+ data-lanes = <1 2>;
+ };
+ };
+ };
+};
+
+&ov5640 {
+ powerdown-gpios = <&csi2exp 2 GPIO_ACTIVE_HIGH>;
+ reset-gpios = <&csi2exp 3 GPIO_ACTIVE_LOW>;
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3-overlay-nxp-spf-29853-c1-ov5640.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3-overlay-nxp-spf-29853-c1-ov5640.dtsi
new file mode 100644
index 0000000000000..4e56547e229ee
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3-overlay-nxp-spf-29853-c1-ov5640.dtsi
@@ -0,0 +1,64 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+/*
+ * Copyright (C) 2023-2026 Marek Vasut
+ */
+
+#include <dt-bindings/clock/imx8mp-clock.h>
+#include <dt-bindings/gpio/gpio.h>
+
+&{/} {
+ camera0_1v5_pwr: regulator-camera0-1v5 {
+ compatible = "regulator-fixed";
+ regulator-name = "camera0-1v5-reg";
+ regulator-min-microvolt = <1500000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-always-on;
+ };
+
+ camera0_1v8_pwr: regulator-camera0-1v8 {
+ compatible = "regulator-fixed";
+ regulator-name = "camera0-1v8-reg";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ };
+
+ camera0_2v8_pwr: regulator-camera0-2v8 {
+ compatible = "regulator-fixed";
+ regulator-name = "camera0-2v8-reg";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ regulator-always-on;
+ };
+};
+
+&i2cmuxed0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ov5640: camera@3c {
+ compatible = "ovti,ov5640";
+ reg = <0x3c>;
+ clocks = <&clk IMX8MP_CLK_CLKOUT1>;
+ clock-names = "xclk";
+ assigned-clocks = <&clk IMX8MP_CLK_CLKOUT1_SEL>,
+ <&clk IMX8MP_CLK_CLKOUT1>;
+ assigned-clock-parents = <&clk IMX8MP_CLK_24M>;
+ assigned-clock-rates = <24000000>, <24000000>;
+ AVDD-supply = <&camera0_2v8_pwr>;
+ DOVDD-supply = <&camera0_1v8_pwr>;
+ DVDD-supply = <&camera0_1v5_pwr>;
+
+ port {
+ ov5640_to_mipi_csi2: endpoint {
+ remote-endpoint = <&mipi_csi0_ep>;
+ clock-lanes = <0>;
+ data-lanes = <1 2>;
+ };
+ };
+ };
+};
+
+&isi_0 {
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-picoitx-overlay-626-100-x2-ch101olhlwh.dtso b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-picoitx-overlay-626-100-x2-ch101olhlwh.dtso
new file mode 100644
index 0000000000000..6c8a90f1e52d9
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-picoitx-overlay-626-100-x2-ch101olhlwh.dtso
@@ -0,0 +1,79 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2024-2026 Marek Vasut
+ */
+/dts-v1/;
+/plugin/;
+
+#define DH_OVERLAY_PANEL_I2C_BUS i2c5
+#define DH_OVERLAY_PANEL_I2C_TOUCHSCREEN_PINCTRL &pinctrl_dhcom_b &pinctrl_dhcom_h
+/* GPIO C - X21 */
+#define DH_OVERLAY_PANEL_I2C_TOUCHSCREEN_IRQ_PARENT gpio1
+#define DH_OVERLAY_PANEL_I2C_TOUCHSCREEN_IRQ_PIN 11
+/* GPIO B - X25 */
+#define DH_OVERLAY_PANEL_I2C_TOUCHSCREEN_RESET_GPIO gpio1
+#define DH_OVERLAY_PANEL_I2C_TOUCHSCREEN_RESET_PIN 8
+
+#include "imx8mp-dhcom-overlay-panel-dpi.dtsi"
+#include "imx8mp-dhcom-overlay-panel-ch101olhlwh.dtsi"
+#include "imx8mp-pinfunc.h"
+
+&{/} {
+ lvds-encoder {
+ compatible = "onnn,fin3385", "lvds-encoder";
+ pclk-sample = <1>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ lvds_bridge_in: endpoint {
+ remote-endpoint = <&tc_bridge_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ lvds_bridge_out: endpoint {
+ remote-endpoint = <&panel_in>;
+ };
+ };
+ };
+ };
+};
+
+&mipi_dsi {
+ /*
+ * This is DSIM PLL frequency, DSI HS clock lane frequency
+ * is half of the "samsung,burst-clock-frequency" value.
+ */
+ samsung,burst-clock-frequency = <900000000>;
+};
+
+&panel_in {
+ remote-endpoint = <&lvds_bridge_out>;
+};
+
+&tc_bridge_out {
+ remote-endpoint = <&lvds_bridge_in>;
+};
+
+&iomuxc {
+ /*
+ * The following DHCOM GPIOs are used on this board.
+ * Therefore, they have been removed from the list below.
+ * B: Touch controller #RESET
+ * H: Touch controller IRQ
+ * I: Yellow led
+ */
+ pinctrl-0 = <&pinctrl_dhcom_a &pinctrl_dhcom_c &pinctrl_dhcom_d
+ &pinctrl_dhcom_e &pinctrl_dhcom_f &pinctrl_dhcom_g
+ &pinctrl_dhcom_j &pinctrl_dhcom_k &pinctrl_dhcom_l
+ &pinctrl_dhcom_m &pinctrl_dhcom_n &pinctrl_dhcom_o
+ &pinctrl_dhcom_p &pinctrl_dhcom_q &pinctrl_dhcom_r
+ &pinctrl_dhcom_s &pinctrl_dhcom_int>;
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som-overlay-eth1xfast.dtso b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som-overlay-eth1xfast.dtso
new file mode 100644
index 0000000000000..49cbf3e44601e
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som-overlay-eth1xfast.dtso
@@ -0,0 +1,85 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+/*
+ * Copyright (C) 2023-2026 Marek Vasut
+ */
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/clock/imx8mp-clock.h>
+
+&eqos { /* First ethernet */
+ pinctrl-0 = <&pinctrl_eqos_rmii>;
+ phy-handle = <ðphy0f>;
+ phy-mode = "rmii";
+
+ assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_266M>,
+ <&clk IMX8MP_SYS_PLL2_100M>,
+ <&clk IMX8MP_SYS_PLL2_50M>;
+ assigned-clock-rates = <0>, <100000000>, <50000000>;
+};
+
+ðphy0g { /* Micrel KSZ9131RNXI */
+ status = "disabled";
+};
+
+ðphy0f { /* SMSC LAN8740Ai */
+ status = "okay";
+};
+
+&fec { /* Second ethernet -- HS connector not populated on 1x RMII PHY SoM */
+ status = "disabled";
+};
+
+/* No HS connector on this SoM variant, so no HDMI, PCIe and only USB HS. */
+
+&hdmi_blk_ctrl {
+ status = "disabled";
+};
+
+&hdmi_pvi {
+ status = "disabled";
+};
+
+&hdmi_tx {
+ status = "disabled";
+};
+
+&hdmi_tx_phy {
+ status = "disabled";
+};
+
+&irqsteer_hdmi {
+ status = "disabled";
+};
+
+&lcdif3 {
+ status = "disabled";
+};
+
+&pcie_phy {
+ status = "disabled";
+};
+
+&pcie {
+ status = "disabled";
+};
+
+/* No WiFi/BT chipset on this SoM variant. */
+&uart2 {
+ bluetooth {
+ status = "disabled";
+ };
+};
+
+&usb_dwc3_0 {
+ maximum-speed = "high-speed";
+};
+
+&usb_dwc3_1 {
+ maximum-speed = "high-speed";
+};
+
+/* No WiFi/BT chipset on this SoM variant. */
+&usdhc1 {
+ status = "disabled";
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som-overlay-eth2xfast.dtso b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som-overlay-eth2xfast.dtso
new file mode 100644
index 0000000000000..e773a754477cc
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som-overlay-eth2xfast.dtso
@@ -0,0 +1,29 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+/*
+ * Copyright (C) 2023-2026 Marek Vasut
+ */
+#include "imx8mp-dhcom-som-overlay-eth1xfast.dtso"
+
+/* Dual RMII 100/Full Fast ethernet on this SoM variant. */
+
+ðphy1f { /* SMSC LAN8740Ai */
+ status = "okay";
+};
+
+&fec { /* Second ethernet */
+ pinctrl-0 = <&pinctrl_fec_rmii>;
+ phy-handle = <ðphy1f>;
+ phy-mode = "rmii";
+ status = "okay";
+
+ assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_266M>,
+ <&clk IMX8MP_SYS_PLL2_100M>,
+ <&clk IMX8MP_SYS_PLL2_50M>,
+ <&clk IMX8MP_SYS_PLL2_50M>;
+ assigned-clock-rates = <0>, <100000000>, <50000000>, <0>;
+};
+
+/* Resistive touch controller not populated on this one SoM variant. */
+&touch_som {
+ status = "disabled";
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi
index f8303b7e2bd22..9d735a4a36d32 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0
/*
- * Copyright (C) 2021-2022 Marek Vasut <marex@denx.de>
+ * Copyright (C) 2021-2026 Marek Vasut
*/
#include "imx8mp.dtsi"
@@ -398,7 +398,7 @@ channel@7 { /* Voltage over AIN3 and GND. */
};
};
- touchscreen@49 {
+ touch_som: touchscreen@49 {
compatible = "ti,tsc2004";
reg = <0x49>;
interrupts-extended = <&gpio4 0 IRQ_TYPE_EDGE_FALLING>;
--
2.53.0
^ permalink raw reply related
* Re: [PATCH v11 03/22] drm: Add new general DRM property "color format"
From: Nicolas Frattaroli @ 2026-03-24 19:10 UTC (permalink / raw)
To: Ville Syrjälä
Cc: Harry Wentland, Leo Li, Rodrigo Siqueira, Alex Deucher,
Christian König, David Airlie, Simona Vetter,
Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann,
Andrzej Hajda, Neil Armstrong, Robert Foss, Laurent Pinchart,
Jonas Karlman, Jernej Skrabec, Sandy Huang, Heiko Stübner,
Andy Yan, Jani Nikula, Rodrigo Vivi, Joonas Lahtinen,
Tvrtko Ursulin, Dmitry Baryshkov, Sascha Hauer, Rob Herring,
Jonathan Corbet, Shuah Khan, kernel, amd-gfx, dri-devel,
linux-kernel, linux-arm-kernel, linux-rockchip, intel-gfx,
intel-xe, linux-doc, Werner Sembach, Andri Yngvason, Marius Vlad
In-Reply-To: <acLDPYuaVI2-12JX@intel.com>
On Tuesday, 24 March 2026 18:00:45 Central European Standard Time Ville Syrjälä wrote:
> On Tue, Mar 24, 2026 at 05:01:07PM +0100, Nicolas Frattaroli wrote:
> > +enum drm_connector_color_format {
> > + /**
> > + * @DRM_CONNECTOR_COLOR_FORMAT_AUTO: The driver or display protocol
> > + * helpers should pick a suitable color format. All implementations of a
> > + * specific display protocol must behave the same way with "AUTO", but
> > + * different display protocols do not necessarily have the same "AUTO"
> > + * semantics.
> > + *
> > + * For HDMI, "AUTO" picks RGB, but falls back to YCbCr 4:2:0 if the
> > + * bandwidth required for full-scale RGB is not available, or the mode
> > + * is YCbCr 4:2:0-only, as long as the mode and output both support
> > + * YCbCr 4:2:0.
> > + *
> > + * For display protocols other than HDMI, the recursive bridge chain
> > + * format selection picks the first chain of bridge formats that works,
> > + * as has already been the case before the introduction of the "color
> > + * format" property. Non-HDMI bridges should therefore either sort their
> > + * bus output formats by preference, or agree on a unified auto format
> > + * selection logic that's implemented in a common state helper (like
> > + * how HDMI does it).
> > + */
> > + DRM_CONNECTOR_COLOR_FORMAT_AUTO = 0,
> > +
> > + /**
> > + * @DRM_CONNECTOR_COLOR_FORMAT_RGB444: RGB output format
> > + */
> > + DRM_CONNECTOR_COLOR_FORMAT_RGB444,
> > +
> > + /**
> > + * @DRM_CONNECTOR_COLOR_FORMAT_YCBCR444: YCbCr 4:4:4 output format (ie.
> > + * not subsampled)
> > + */
> > + DRM_CONNECTOR_COLOR_FORMAT_YCBCR444,
> > +
> > + /**
> > + * @DRM_CONNECTOR_COLOR_FORMAT_YCBCR422: YCbCr 4:2:2 output format (ie.
> > + * with horizontal subsampling)
> > + */
> > + DRM_CONNECTOR_COLOR_FORMAT_YCBCR422,
> > +
> > + /**
> > + * @DRM_CONNECTOR_COLOR_FORMAT_YCBCR420: YCbCr 4:2:0 output format (ie.
> > + * with horizontal and vertical subsampling)
> > + */
> > + DRM_CONNECTOR_COLOR_FORMAT_YCBCR420,
>
> Seems like this should document what the quantization range
> should be for each format.
>
I don't think so? If you want per-component bit depth values,
DRM_FORMAT_* defines would be the appropriate values to use. This
enum is more abstract than that, and is there to communicate
YUV vs. RGB and chroma subsampling, with bit depth being handled
by other properties.
If you mean the factor used for subsampling, then that'd only be
relevant if YCBCR410 was supported where one chroma plane isn't
halved but quartered in resolution. I suspect 4:1:0 will never
be added; no digital display protocol standard supports it to my
knowledge, and hopefully none ever will.
> > +
> > + /**
> > + * @DRM_CONNECTOR_COLOR_FORMAT_COUNT: Number of valid connector color
> > + * format values in this enum
> > + */
> > + DRM_CONNECTOR_COLOR_FORMAT_COUNT,
> > +};
> > +
> > +/**
> > + * drm_connector_color_format_valid - Validate drm_connector_color_format value
> > + * @fmt: value to check against all values of &enum drm_connector_color_format
> > + *
> > + * Checks whether the passed in value of @fmt is one of the allowable values in
> > + * &enum drm_connector_color_format.
> > + *
> > + * Returns: %true if it's a valid value for the enum, %false otherwise.
> > + */
> > +static inline bool __pure
> > +drm_connector_color_format_valid(enum drm_connector_color_format fmt)
> > +{
> > + switch (fmt) {
> > + case DRM_CONNECTOR_COLOR_FORMAT_AUTO:
> > + case DRM_CONNECTOR_COLOR_FORMAT_RGB444:
> > + case DRM_CONNECTOR_COLOR_FORMAT_YCBCR444:
> > + case DRM_CONNECTOR_COLOR_FORMAT_YCBCR422:
> > + case DRM_CONNECTOR_COLOR_FORMAT_YCBCR420:
> > + return true;
> > + default:
> > + return false;
> > + }
> > +}
> > +
> > const char *
> > drm_hdmi_connector_get_output_format_name(enum drm_output_color_format fmt);
> >
> > @@ -1129,6 +1217,13 @@ struct drm_connector_state {
> > */
> > enum drm_colorspace colorspace;
> >
> > + /**
> > + * @color_format: State variable for Connector property to request
> > + * color format change on Sink. This is most commonly used to switch
> > + * between RGB to YUV and vice-versa.
> > + */
> > + enum drm_connector_color_format color_format;
> > +
> > /**
> > * @writeback_job: Writeback job for writeback connectors
> > *
> > @@ -2127,6 +2222,12 @@ struct drm_connector {
> > */
> > struct drm_property *colorspace_property;
> >
> > + /**
> > + * @color_format_property: Connector property to set the suitable
> > + * color format supported by the sink.
> > + */
> > + struct drm_property *color_format_property;
> > +
> > /**
> > * @path_blob_ptr:
> > *
> > @@ -2610,6 +2711,9 @@ bool drm_connector_has_possible_encoder(struct drm_connector *connector,
> > struct drm_encoder *encoder);
> > const char *drm_get_colorspace_name(enum drm_colorspace colorspace);
> >
> > +int drm_connector_attach_color_format_property(struct drm_connector *connector,
> > + unsigned long supported_color_formats);
> > +
> > /**
> > * drm_for_each_connector_iter - connector_list iterator macro
> > * @connector: &struct drm_connector pointer used as cursor
> >
>
>
^ permalink raw reply
* [PATCH v3] gpio: mxc: map Both Edge pad wakeup to Rising Edge
From: Shenwei Wang @ 2026-03-24 19:21 UTC (permalink / raw)
To: Linus Walleij, Bartosz Golaszewski, Frank Li, Sascha Hauer
Cc: Pengutronix Kernel Team, Fabio Estevam, Shenwei Wang, Peng Fan,
linux-gpio, imx, linux-arm-kernel, linux-kernel, linux-imx,
stable
Suspend may fail on i.MX8QM when Falling Edge is used as a pad wakeup
trigger due to a hardware bug in the detection logic. Since the hardware
does not support Both Edge wakeup, remap requests for Both Edge to Rising
Edge by default to avoid hitting this issue.
A warning is emitted when Falling Edge is selected on i.MX8QM.
Fixes: f60c9eac54af ("gpio: mxc: enable pad wakeup on i.MX8x platforms")
cc: stable@vger.kernel.org
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shenwei Wang <shenwei.wang@nxp.com>
---
Changes in V3:
- improve the warning message per Alexander's feedback.
Changes in V2:
- add a check for i.mx8qm and emit a warning when Falling Edge is
selected.
drivers/gpio/gpio-mxc.c | 10 +++++++++-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/drivers/gpio/gpio-mxc.c b/drivers/gpio/gpio-mxc.c
index d7666fe9dbf8..647b6f4861b7 100644
--- a/drivers/gpio/gpio-mxc.c
+++ b/drivers/gpio/gpio-mxc.c
@@ -584,12 +584,13 @@ static bool mxc_gpio_set_pad_wakeup(struct mxc_gpio_port *port, bool enable)
unsigned long config;
bool ret = false;
int i, type;
+ bool is_imx8qm = of_device_is_compatible(port->dev->of_node, "fsl,imx8qm-gpio");
static const u32 pad_type_map[] = {
IMX_SCU_WAKEUP_OFF, /* 0 */
IMX_SCU_WAKEUP_RISE_EDGE, /* IRQ_TYPE_EDGE_RISING */
IMX_SCU_WAKEUP_FALL_EDGE, /* IRQ_TYPE_EDGE_FALLING */
- IMX_SCU_WAKEUP_FALL_EDGE, /* IRQ_TYPE_EDGE_BOTH */
+ IMX_SCU_WAKEUP_RISE_EDGE, /* IRQ_TYPE_EDGE_BOTH */
IMX_SCU_WAKEUP_HIGH_LVL, /* IRQ_TYPE_LEVEL_HIGH */
IMX_SCU_WAKEUP_OFF, /* 5 */
IMX_SCU_WAKEUP_OFF, /* 6 */
@@ -604,6 +605,13 @@ static bool mxc_gpio_set_pad_wakeup(struct mxc_gpio_port *port, bool enable)
config = pad_type_map[type];
else
config = IMX_SCU_WAKEUP_OFF;
+
+ if (is_imx8qm && config == IMX_SCU_WAKEUP_FALL_EDGE) {
+ dev_warn_once(port->dev,
+ "No falling-edge support for wakeup on i.MX8QM\n");
+ config = IMX_SCU_WAKEUP_OFF;
+ }
+
ret |= mxc_gpio_generic_config(port, i, config);
}
}
--
2.43.0
^ permalink raw reply related
* Re: [PATCH v4 0/2] Allow non-coherent video capture buffers on Rockchip ISP V1
From: Mikhail Rudenko @ 2026-03-24 19:12 UTC (permalink / raw)
To: Jacopo Mondi
Cc: Dafna Hirschfeld, Laurent Pinchart, Mauro Carvalho Chehab,
Heiko Stuebner, Tomasz Figa, Marek Szyprowski, Hans Verkuil,
Sergey Senozhatsky, linux-media, linux-rockchip, linux-arm-kernel,
linux-kernel, Mauro Carvalho Chehab, stable
In-Reply-To: <acFkAPreOFBvoHid@zed>
Hi, Jacopo!
On 2026-03-23 at 17:03 +01, Jacopo Mondi <jacopo.mondi@ideasonboard.com> wrote:
> Hello
>
> On Mon, Mar 03, 2025 at 02:40:08PM +0300, Mikhail Rudenko wrote:
>> This small series adds support for non-coherent video capture buffers
>> on Rockchip ISP V1. Patch 1 fixes cache management for dmabuf's
>> allocated by dma-contig allocator. Patch 2 allows non-coherent
>> allocations on the rkisp1 capture queue. Some timing measurements are
>> provided in the commit message of patch 2.
>>
>> Signed-off-by: Mikhail Rudenko <mike.rudenko@gmail.com>
>
> I regularly get back to this series everytime I have to reason about
> the caching policies in vb2..
>
> Is there any reason why it didn't get in ?
My impression is that all the review comments were addressed, but these
patches somehow fell through the cracks. I can rebase and post v5 if any
maintainer is interested in picking it up.
>> ---
>> Changes in v4:
>> - rebase to media/next
>> - use `direction` instead of `buf->dma_dir` in dma_sync_sgtable_*
>> - Link to v3: https://lore.kernel.org/r/20250128-b4-rkisp-noncoherent-v3-0-baf39c997d2a@gmail.com
>>
>> Changes in v3:
>> - ignore skip_cache_sync_* flags in vb2_dc_dmabuf_ops_{begin,end}_cpu_access
>> - invalidate/flush kernel mappings as appropriate if they exist
>> - use dma_sync_sgtable_* instead of dma_sync_sg_*
>> - Link to v2: https://lore.kernel.org/r/20250115-b4-rkisp-noncoherent-v2-0-0853e1a24012@gmail.com
>>
>> Changes in v2:
>> - Fix vb2_dc_dmabuf_ops_{begin,end}_cpu_access() for non-coherent buffers.
>> - Add cache management timing information to patch 2 commit message.
>> - Link to v1: https://lore.kernel.org/r/20250102-b4-rkisp-noncoherent-v1-1-bba164f7132c@gmail.com
>>
>> ---
>> Mikhail Rudenko (2):
>> media: videobuf2: Fix dmabuf cache sync/flush in dma-contig
>> media: rkisp1: Allow non-coherent video capture buffers
>>
>> .../media/common/videobuf2/videobuf2-dma-contig.c | 22 ++++++++++++++++++++++
>> .../platform/rockchip/rkisp1/rkisp1-capture.c | 1 +
>> 2 files changed, 23 insertions(+)
>> ---
>> base-commit: b2c4bf0c102084e77ed1b12090d77a76469a6814
>> change-id: 20241231-b4-rkisp-noncoherent-ad6e7c7a68ba
>>
>> Best regards,
>> --
>> Mikhail Rudenko <mike.rudenko@gmail.com>
>>
>>
--
Best regards,
Mikhail Rudenko
^ permalink raw reply
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