* Re: [PATCH] net: ti: icssg-prueth: fix missing data copy and wrong recycle in ZC RX dispatch
From: Simon Horman @ 2026-03-27 10:29 UTC (permalink / raw)
To: David Carlier
Cc: danishanwar, rogerq, andrew+netdev, davem, edumazet, kuba, pabeni,
m-malladi, jacob.e.keller, linux-arm-kernel, netdev, linux-kernel
In-Reply-To: <20260325125131.53399-1-devnexen@gmail.com>
+ Meghana Malladi
On Wed, Mar 25, 2026 at 12:51:30PM +0000, David Carlier wrote:
> emac_dispatch_skb_zc() allocates a new skb via napi_alloc_skb() but
> never copies the packet data from the XDP buffer into it. The skb is
> passed up the stack containing uninitialized heap memory instead of
> the actual received packet, leaking kernel heap contents to userspace.
>
> Copy the received packet data from the XDP buffer into the skb using
> skb_copy_to_linear_data().
>
> Additionally, remove the skb_mark_for_recycle() call since the skb is
> backed by the NAPI page frag allocator, not page_pool. Marking a
> non-page_pool skb for recycle causes the free path to return pages to
> a page_pool that does not own them, corrupting page_pool state.
>
> The non-ZC path (emac_rx_packet) does not have these issues because it
> uses napi_build_skb() to wrap the existing page_pool page directly,
> requiring no copy, and correctly marks for recycle since the page comes
> from page_pool_dev_alloc_pages().
>
> Fixes: 7a64bb388df3 ("net: ti: icssg-prueth: Add AF_XDP zero copy for RX")
> Signed-off-by: David Carlier <devnexen@gmail.com>
> ---
> drivers/net/ethernet/ti/icssg/icssg_common.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Hi David,
Thanks for the update.
My understanding is that this addresses the review of v1.
Reviewed-by: Simon Horman <horms@kernel.org>
v1: https://lore.kernel.org/all/20260324211402.342474-1-devnexen@gmail.com/
Some points to keep in mind for the future:
* Please include a version number in the subject when posting versions >
This helps a lot in tracking things.
Subject: [PATCH v2] ...
* Please include the target tree. As a fix for code, which I asusme
is present in net, in this case that would be the net tree.
Subject: [PATCH net v2] ...
Otherwise it would probably be the net-next tree.
* Please CC all relevant parties. In this case that would
include Meghana as he provided review of v1.
* Please consider including a changelog, along with links to earlier
versions below the scissors ("---")
* b4 can help with most of these things
* More information on the Netdev development process can be found at
https://docs.kernel.org/process/maintainer-netdev.html
...
^ permalink raw reply
* Re: [PATCH 00/10] PCI: Improve head free space usage
From: Ilpo Järvinen @ 2026-03-27 10:28 UTC (permalink / raw)
To: Bjorn Helgaas
Cc: linux-pci, Bjorn Helgaas, Guenter Roeck, linux-alpha,
linux-arm-kernel, linux-m68k, linux-mips, linux-parisc,
linuxppc-dev, linux-s390, linux-sh, Russell King,
Geert Uytterhoeven, Thomas Bogendoerfer, James E.J. Bottomley,
Helge Deller, Michael Ellerman, Thomas Gleixner, Ingo Molnar,
Borislav Petkov, Dave Hansen, H. Peter Anvin, Chris Zankel,
Max Filippov, Madhavan Srinivasan, Yoshinori Sato, Rich Felker,
John Paul Adrian Glaubitz, LKML, Xifer
In-Reply-To: <20260326192520.GA1337681@bhelgaas>
[-- Attachment #1: Type: text/plain, Size: 3860 bytes --]
On Thu, 26 Mar 2026, Bjorn Helgaas wrote:
> [+cc Xifer; thanks very much for reporting and testing!]
>
> On Tue, Mar 24, 2026 at 06:56:23PM +0200, Ilpo Järvinen wrote:
> > Hi all,
> >
> > This series attempts to take advantage of free head space (the free
> > space before the aligned start address) in order to generally produce a
> > tighter packing of the resources/bridge windows.
> >
> > The recent changes to the resource fitting algorithm caused resource
> > allocation failures in some cases where a bridge window that is sized
> > to be gapless could no longer be assigned. The previous algorithm left
> > a huge gaps which allowed it to place the remainder (non-aligning part
> > of the size) before the start address of used for the gapless fit,
> > whereas the new gapless approach always had to place the remainder
> > after the aligning part of the resources. There is not always space
> > for the remainder triggering those failures (e.g., when the aligning
> > part must be placed at the top of the window).
> >
> > This series attempts to allow placing the remainder once again before
> > the aligning part, but now without leaving huge gaps to retain the
> > benefits of the gapless bridge windows. The approach is somewhat hacky
> > but should work thanks to PCI resources fundamentally consisting only
> > power-of-two atoms.
> >
> > There maybe cases where architecture would not want to do such
> > relocation. This series adds the relocation to arch
> > pcibios_align_resource() functions to allow all of them taking
> > advantage of the better resource packing but if somebody objects doing
> > this relocation for a particular arch, I can remove it, please just let
> > me know (this relocation doesn't seem critical unless there are
> > regressions).
> >
> > Ilpo Järvinen (10):
> > resource: Add __resource_contains_unbound() for internal contains
> > checks
> > resource: Pass full extent of empty space to resource_alignf CB
> > resource: Rename 'tmp' variable to 'full_avail'
> > ARM/PCI: Remove unnecessary second application of align
> > am68k/PCI: Remove unnecessary second application of align
> > MIPS: PCI: Remove unnecessary second application of align
> > parisc/PCI: Cleanup align handling
> > PCI: Rename window_alignment() to pci_min_window_alignment()
> > PCI: Align head space better
> > PCI: Fix alignment calculation for resource size larger than align
> >
> > arch/alpha/kernel/pci.c | 1 +
> > arch/arm/kernel/bios32.c | 9 ++++---
> > arch/m68k/kernel/pcibios.c | 8 +++++--
> > arch/mips/pci/pci-generic.c | 8 ++++---
> > arch/mips/pci/pci-legacy.c | 3 +++
> > arch/parisc/kernel/pci.c | 17 ++++++++------
> > arch/powerpc/kernel/pci-common.c | 6 ++++-
> > arch/s390/pci/pci.c | 1 +
> > arch/sh/drivers/pci/pci.c | 6 ++++-
> > arch/x86/pci/i386.c | 5 +++-
> > arch/xtensa/kernel/pci.c | 3 +++
> > drivers/pci/pci.h | 3 +++
> > drivers/pci/setup-bus.c | 15 ++++++++----
> > drivers/pci/setup-res.c | 40 +++++++++++++++++++++++++++++++-
> > drivers/pcmcia/rsrc_nonstatic.c | 3 ++-
> > include/linux/ioport.h | 22 +++++++++++++++---
> > include/linux/pci.h | 12 +++++++---
> > kernel/resource.c | 33 +++++++++++++-------------
> > 18 files changed, 149 insertions(+), 46 deletions(-)
>
> I added Xifer's tested-by, fixed the "am68k" and missing "if"
> typos, and applied these to pci/resource for v7.1.
>
> Ilpo, if you post a v2 with more changes, I'll update to it. I
> applied the series now to get a head start on 0-day building and into
> next.
Thanks.
I don't have anything in addition to those.
--
i.
^ permalink raw reply
* Re: [PATCH v2] arm64: defconfig: Enable Rockchip video decoder
From: Krzysztof Kozlowski @ 2026-03-27 10:25 UTC (permalink / raw)
To: Detlev Casanova, linux-kernel, Heiko Stuebner, linux-arm-kernel,
kernel, linux-rockchip
In-Reply-To: <20260326-rkvdec-add-defconfig-v2-1-d65c296da9ba@collabora.com>
On 26/03/2026 22:33, Detlev Casanova wrote:
> The rkvdec driver is now out of staging and can be built by default.
This is not a reason "why" we enable it. Many drivers are not in staging
and we do not enable them by default. With that explanation, why not
enable everything from allyesconfig? That "everything" can be built by
default and for example is out of staging. So why are we not making
allyesconfig->defconfig?
BTW, git log or lore/lei also would help you here.
Best regards,
Krzysztof
^ permalink raw reply
* Re: [PATCH v2 1/1] arm64: defconfig: Enable pinctrl/gpio/pcie for CIX Sky1 SoC
From: Krzysztof Kozlowski @ 2026-03-27 10:22 UTC (permalink / raw)
To: Peter Chen, arnd
Cc: geert+renesas, linux-kernel, linux-arm-kernel,
cix-kernel-upstream, Yunseong Kim
In-Reply-To: <20260327095652.3793688-1-peter.chen@cixtech.com>
On 27/03/2026 10:56, Peter Chen wrote:
> Pinctrl, PCIe, and GPIO device are used at Radxa Orion O6 board.
> - Pinctrl is the base for peripheral IP and peripheral device.
> - PCIe NVMe is needed for Debian boot.
I don't see NVMe there, only PCI controller.
> - GPIO is added due to Debian bug report[1].
Rationale must be here, not in external references - this explicitly
requested in submitting patches.
This entire Debian reference does not really matter. It is enough to
explain what hardware you are enabling it for, so the board, its
contents, and SoC.
This is as simple as - does board use it or not? Does SoC with this
board has it or not?
Best regards,
Krzysztof
^ permalink raw reply
* [Question mpam mpam/snapshot+extras/v6.18-rc1] Question with Configuring iommu_group in 'task'
From: Qinxin Xia @ 2026-03-27 10:21 UTC (permalink / raw)
To: ben.horgan
Cc: amitsinght, baisheng.gao, baolin.wang, carl, dave.martin, david,
dfustini, fenghuay, gshan, james.morse, jonathan.cameron, kobak,
lcherian, linux-arm-kernel, linux-kernel, peternewman,
punit.agrawal, quic_jiles, reinette.chatre, rohit.mathew, scott,
sdonthineni, xhao, zengheng4, Linuxarm
Hello everyone!
In earlier versions, mpam supports the configuration of iommu_groups.
823 static ssize_t rdtgroup_tasks_write(struct kernfs_open_file *of,
824 char *buf, size_t nbytes,
loff_t off)
825 {
826 struct rdtgroup *rdtgrp;
827 int iommu_group_id;
828 bool is_iommu;
829 char *pid_str;
830 int ret = 0;
831 pid_t pid;
832
833 rdtgrp = rdtgroup_kn_lock_live(of->kn);
834 if (!rdtgrp) {
835 rdtgroup_kn_unlock(of->kn);
836 return -ENOENT;
837 }
838 rdt_last_cmd_clear();
839
840 if (rdtgrp->mode == RDT_MODE_PSEUDO_LOCKED ||
841 rdtgrp->mode == RDT_MODE_PSEUDO_LOCKSETUP) {
842 ret = -EINVAL;
843 rdt_last_cmd_puts("Pseudo-locking in progress\n");
844 goto unlock;
845 }
846
847 while (buf && buf[0] != '\0' && buf[0] != '\n') {
848 pid_str = strim(strsep(&buf, ","));
849
850 is_iommu = string_is_iommu_group(pid_str,
&iommu_group_id);
What puzzles me is why we would put it under 'task'—this seems a little
strange to users.It seems they are not related.Why don't we add a new
interface like 'iommu'?
851 if (is_iommu)
852 ret = rdtgroup_move_iommu(iommu_group_id,
rdtgrp, of);
853 else if (kstrtoint(pid_str, 0, &pid)) {
854 rdt_last_cmd_printf("Task list parsing
error pid %s\n", pid_str);
855 ret = -EINVAL;
856 break;
857 }
858
859 if (pid < 0) {
860 rdt_last_cmd_printf("Invalid pid %d\n", pid);
861 ret = -EINVAL;
862 break;
863 }
864
In future glue versions, will you re-enable support for iommu_group, and
if so, will the configuration scheme be changed?
--
Thanks,
Qinxin
^ permalink raw reply
* Re: [PATCH v6 1/5] mm: rmap: support batched checks of the references for large folios
From: Baolin Wang @ 2026-03-27 10:20 UTC (permalink / raw)
To: Lorenzo Stoakes (Oracle)
Cc: David Hildenbrand (Arm), Barry Song, akpm, catalin.marinas, will,
lorenzo.stoakes, ryan.roberts, Liam.Howlett, vbabka, rppt, surenb,
mhocko, riel, harry.yoo, jannh, willy, dev.jain, linux-mm,
linux-arm-kernel, linux-kernel
In-Reply-To: <5b1c0687-a4e4-4a95-8e8f-2d2ce171247c@lucifer.local>
On 3/26/26 8:21 PM, Lorenzo Stoakes (Oracle) wrote:
> On Thu, Mar 26, 2026 at 08:04:10PM +0800, Baolin Wang wrote:
>>
>>
>> On 3/26/26 7:10 PM, Lorenzo Stoakes (Oracle) wrote:
>>> On Thu, Mar 26, 2026 at 09:47:51AM +0800, Baolin Wang wrote:
>>>>
>>>>
>>>> On 3/25/26 11:06 PM, Lorenzo Stoakes (Oracle) wrote:
>>>>> On Wed, Mar 25, 2026 at 03:58:36PM +0100, David Hildenbrand (Arm) wrote:
>>>>>> On 3/25/26 15:36, Lorenzo Stoakes (Oracle) wrote:
>>>>>>> On Mon, Mar 16, 2026 at 03:15:18PM +0100, David Hildenbrand (Arm) wrote:
>>>>>>>> On 3/16/26 07:25, Baolin Wang wrote:
>>>>>>>>>
>>>>>>>>>
>>>>>>>>>
>>>>>>>>> Sure. However, after investigating RISC‑V and x86, I found that
>>>>>>>>> ptep_clear_flush_young() does not flush the TLB on these architectures:
>>>>>>>>>
>>>>>>>>> int ptep_clear_flush_young(struct vm_area_struct *vma,
>>>>>>>>> unsigned long address, pte_t *ptep)
>>>>>>>>> {
>>>>>>>>> /*
>>>>>>>>> * On x86 CPUs, clearing the accessed bit without a TLB flush
>>>>>>>>> * doesn't cause data corruption. [ It could cause incorrect
>>>>>>>>> * page aging and the (mistaken) reclaim of hot pages, but the
>>>>>>>>> * chance of that should be relatively low. ]
>>>>>>>>> *
>>>>>>>>> * So as a performance optimization don't flush the TLB when
>>>>>>>>> * clearing the accessed bit, it will eventually be flushed by
>>>>>>>>> * a context switch or a VM operation anyway. [ In the rare
>>>>>>>>> * event of it not getting flushed for a long time the delay
>>>>>>>>> * shouldn't really matter because there's no real memory
>>>>>>>>> * pressure for swapout to react to. ]
>>>>>>>>> */
>>>>>>>>> return ptep_test_and_clear_young(vma, address, ptep);
>>>>>>>>> }
>>>>>>>>
>>>>>>>> You'd probably want an arch helper then, that tells you whether
>>>>>>>> a flush_tlb_range() after ptep_test_and_clear_young() is required.
>>>>>>>>
>>>>>>>> Or some special flush_tlb_range() helper.
>>>>>>>>
>>>>>>>> I agree that it requires more work.
>>>>
>>>> (Sorry, David. I forgot to reply to your email because I've had a lot to
>>>> sort out recently.)
>>>>
>>>> Rather than adding more arch helpers (we already have plenty for the young
>>>> flag check), I think we should try removing the TLB flush, as I mentioned to
>>>> Barry[1]. MGLRU reclaim already skips the TLB flush, and it seems to work
>>>> fine. What do you think?
>>>>
>>>> Here are our previous attempts to remove the TLB flush:
>>>>
>>>> My patch: https://lkml.org/lkml/2023/10/24/533
>>>> Barry's patch:
>>>> https://lore.kernel.org/lkml/20220617070555.344368-1-21cnbao@gmail.com/
>>>>
>>>> [1] https://lore.kernel.org/all/6bdc4b03-9631-4717-a3fa-2785a7930aba@linux.alibaba.com/
>>>>
>>>>>>> Sorry unclear here - does the series need more work or does a follow up patch
>>>>>>> need more work?
>>>>>>
>>>>>> Follow up!
>>>>>
>>>>> Ok good as in mm-stable now. Sadly means I don't get to review it but there we
>>>>> go.
>>>>
>>>> Actually this patchset has already been merged upstream:)
>>
>> Let me try to make things clear.
>>
>>> Err but this revision was sent _during_ the merge window...?
>>>
>>> Was sent on 9th Feb on Monday in merge window week 1, with a functional change
>>> listed:
>>>
>>> - Skip batched unmapping for uffd case, reported by Dev. Thanks.
>>>
>>> And then sent in 2nd batch on 18th Feb (see [0]).
>>>
>>> So we were ok with 1 week of 'testing' (does anybody actually test -next during
>>> the merge window? Was it even sent to -next?) for what appears to be a
>>> functional change?
>>
>> I posted v5 on Dec 26th[0], and it collected quite a few Reviewed-by tags
>> and sat in mm-unstable for testing.
>>
>> Later, Dev reported a uffd-related issue (I hope you recall that
>> discussion). I posted a fix[1] for it on Jan 16th, which Andrew accepted.
>>
>> Since then, the v5 series (plus the fix) continued to be tested in
>> mm-unstable. We kept it there mainly because David mentioned he wanted to
>> review the series, so we were waiting for his time.
>>
>> On Feb 9th, after returning from vacation, David reviewed the series
>> (thanks, David!). I replied to and addressed all his comments, then posted
>> v6 on the same day[2].
>
> OK thanks, I see that now.
>
> I still don't think we should have made any changes _during_ the merge window,
> even if they were simple code quality things.
>
> Changing patches then seems just crazy to me, as even code quality stuff can
> cause unexpected bugs, and now we're having upstream take it.
>
> Also this speaks to -fix patches just being broken in general.
>
> If you'd just respun with the fix as a v6, then we'd know 'v6 sent on 16th Jan
> addressed this' and there'd be no isssue.
>
> Now v5 isn't v5, there's v5 and something-not-v5 and to have a sense of the
> testing you have to go read a bunch of email chains.
>
> It also means change logs are now really inaccurate:
>
> Changes from v5:
> - Collect reviewed tags from Ryan, Harry and David. Thanks.
> - Fix some coding style issues (per David).
> - Skip batched unmapping for uffd case, reported by Dev. Thanks.
>
> And that to me means 'v5 didn't have this, v6 does'.
>
> And it's really hard to track timelines for testing.
Indeed. At least I need make the change history clearer.
>> Additionally, v6 had no functional changes compared to v5 + the fix, and it
>> mainly addressed some coding style issues pointed out by David. I also
>> discussed this with David off-list, and since there were no functional
>> changes, my expectation was that it could still make it into the merge
>> window. That is why v6 was merged.
>
> Yeah, we still shouldn't have taken changes to a series DURING the merge window,
> it's just crazy.
>
>>
>> [0] https://lore.kernel.org/linux-mm/cover.1766631066.git.baolin.wang@linux.alibaba.com/#t
>> [1] https://lore.kernel.org/linux-mm/20260116162652.176054-1-baolin.wang@linux.alibaba.com/
>> [2] https://lore.kernel.org/all/cover.1770645603.git.baolin.wang@linux.alibaba.com/
>>
>>> And there was ongoing feedback on this and the v5 series (at [1])?
>>
>> Regarding the feedback on v5, I believe everything has been addressed.
>>
>>> This doesn't really feel sane?
>>>
>>> And now I'm confused as to whether mm-stable patches can collect tags, since
>>> presumably this was in mm-stable at the point this respin was done?
>>>
>>> Maybe I'm missing something here but this doesn't feel like a sane process?
>>
>> Andrew, David, please correct me if I've missed anything. Also, please let
>> me know if there's anything in the process that needs to be improved.
>> Thanks.
>
> This isn't on you, it's about the process as a whole. We need clear rules about
> when changes will be accepted and when not.
>
> And frankly I think we need to do away with fix patches as a whole based on
> this, or at least anything even vaguely non-trivial or that potentially impacts
> code.
Understood. I'll check first before sending fixes to avoid confusion
next time.
^ permalink raw reply
* Re: [PATCH 1/2] crypto: stm32 - use list_first_entry_or_null to simplify hash_find_dev
From: Herbert Xu @ 2026-03-27 10:08 UTC (permalink / raw)
To: Thorsten Blum
Cc: David S. Miller, Maxime Coquelin, Alexandre Torgue, Sakari Ailus,
linux-crypto, linux-stm32, linux-arm-kernel, linux-kernel
In-Reply-To: <20260320084914.7180-3-thorsten.blum@linux.dev>
On Fri, Mar 20, 2026 at 09:49:13AM +0100, Thorsten Blum wrote:
> Use list_first_entry_or_null() to simplify stm32_hash_find_dev() and
> remove the now-unused local variable 'struct stm32_hash_dev *tmp'.
>
> Signed-off-by: Thorsten Blum <thorsten.blum@linux.dev>
> ---
> drivers/crypto/stm32/stm32-hash.c | 16 +++++-----------
> 1 file changed, 5 insertions(+), 11 deletions(-)
All applied. Thanks.
--
Email: Herbert Xu <herbert@gondor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
^ permalink raw reply
* Re: [PATCH] crypto: testmgr - Add test vectors for authenc(hmac(md5),rfc3686(ctr(aes)))
From: Herbert Xu @ 2026-03-27 10:08 UTC (permalink / raw)
To: Aleksander Jan Bajkowski
Cc: davem, mcoquelin.stm32, alexandre.torgue, linux-crypto,
linux-stm32, linux-arm-kernel, linux-kernel
In-Reply-To: <20260319171128.10566-1-olek2@wp.pl>
On Thu, Mar 19, 2026 at 06:11:21PM +0100, Aleksander Jan Bajkowski wrote:
> Test vectors were generated starting from existing RFC3686(CTR(AES)) test
> vectors and adding HMAC(MD5) computed with software implementation.
> Then, the results were double-checked on Mediatek MT7986 (safexcel).
> Platform pass self-tests.
>
> Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
> ---
> crypto/testmgr.c | 7 ++
> crypto/testmgr.h | 207 +++++++++++++++++++++++++++++++++++++++++++++++
> 2 files changed, 214 insertions(+)
Patch applied. Thanks.
--
Email: Herbert Xu <herbert@gondor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
^ permalink raw reply
* [PATCH v2 1/1] arm64: defconfig: Enable pinctrl/gpio/pcie for CIX Sky1 SoC
From: Peter Chen @ 2026-03-27 9:56 UTC (permalink / raw)
To: arnd
Cc: krzysztof.kozlowski, geert+renesas, linux-kernel,
linux-arm-kernel, cix-kernel-upstream, Peter Chen, Yunseong Kim
Pinctrl, PCIe, and GPIO device are used at Radxa Orion O6 board.
- Pinctrl is the base for peripheral IP and peripheral device.
- PCIe NVMe is needed for Debian boot.
- GPIO is added due to Debian bug report[1].
[1] https://bugs.debian.org/cgi-bin/bugreport.cgi?bug=1131772
Cc: Yunseong Kim <ysk@kzalloc.com>
Signed-off-by: Peter Chen <peter.chen@cixtech.com>
---
Changes for v2:
- Delete CIX HDA configurations due to it is not used at current
Orion O6 board device tree.
arch/arm64/configs/defconfig | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index b67d5b1fc45b..f9be52484008 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -241,6 +241,7 @@ CONFIG_PCIE_XILINX_DMA_PL=y
CONFIG_PCIE_XILINX_NWL=y
CONFIG_PCIE_XILINX_CPM=y
CONFIG_PCI_J721E_HOST=m
+CONFIG_PCI_SKY1_HOST=m
CONFIG_PCI_IMX6_HOST=y
CONFIG_PCI_LAYERSCAPE=y
CONFIG_PCI_HISI=y
@@ -676,6 +677,7 @@ CONFIG_PINCTRL_SDM660=y
CONFIG_PINCTRL_SDM670=y
CONFIG_PINCTRL_SDM845=y
CONFIG_PINCTRL_SDX75=y
+CONFIG_PINCTRL_SKY1=y
CONFIG_PINCTRL_SM4450=y
CONFIG_PINCTRL_SM6115=y
CONFIG_PINCTRL_SM6125=y
@@ -701,6 +703,7 @@ CONFIG_PINCTRL_SM8550_LPASS_LPI=m
CONFIG_PINCTRL_SM8650_LPASS_LPI=m
CONFIG_PINCTRL_SOPHGO_SG2000=y
CONFIG_GPIO_ALTERA=m
+CONFIG_GPIO_CADENCE=m
CONFIG_GPIO_DAVINCI=y
CONFIG_GPIO_DWAPB=y
CONFIG_GPIO_MB86S7X=y
--
2.50.1
^ permalink raw reply related
* Re: [PATCH] coresight: cti: fix the check condition in inout_sel_store
From: Leo Yan @ 2026-03-27 9:56 UTC (permalink / raw)
To: Jie Gan
Cc: Suzuki K Poulose, Mike Leach, James Clark, Alexander Shishkin,
Mathieu Poirier, Greg Kroah-Hartman, Tingwei Zhang, coresight,
linux-arm-kernel, linux-kernel
In-Reply-To: <20260327-fix-cti-issue-v1-1-2c8921e21fc8@oss.qualcomm.com>
On Fri, Mar 27, 2026 at 02:24:14PM +0800, Jie Gan wrote:
> Correct the upper bound from CTIINOUTEN_MAX to config->nr_trig_max,
> since nr_trig_max varies across CTI devices. An out-of-bounds issue
> occurs when a value greater than config->nr_trig_max is provided,
> leading to unexpected errors.
>
> Fixes: b5213376c240 ("coresight: cti: Add sysfs access to program function registers")
> Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com>
Reviewed-by: Leo Yan <leo.yan@arm.com>
^ permalink raw reply
* Re: [RFC PATCH v2 2/5] arm_mpam: resctrl: Pre-allocate assignable monitors
From: Ben Horgan @ 2026-03-27 9:54 UTC (permalink / raw)
To: Shaopeng Tan (Fujitsu)
Cc: amitsinght@marvell.com, baisheng.gao@unisoc.com,
baolin.wang@linux.alibaba.com, carl@os.amperecomputing.com,
dave.martin@arm.com, david@kernel.org, dfustini@baylibre.com,
fenghuay@nvidia.com, gshan@redhat.com, james.morse@arm.com,
jonathan.cameron@huawei.com, kobak@nvidia.com,
lcherian@marvell.com, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, peternewman@google.com,
punit.agrawal@oss.qualcomm.com, quic_jiles@quicinc.com,
reinette.chatre@intel.com, rohit.mathew@arm.com,
scott@os.amperecomputing.com, sdonthineni@nvidia.com,
xhao@linux.alibaba.com, zengheng4@huawei.com
In-Reply-To: <TY4PR01MB16930BFFB7CE7FEB56CA693098B57A@TY4PR01MB16930.jpnprd01.prod.outlook.com>
Hi Shaopeng,
On 3/27/26 03:00, Shaopeng Tan (Fujitsu) wrote:
> Hello Ben,
>
>> MPAM is able to emulate ABMC, i.e. mbm_event mode, by making memory
>> bandwidth monitors assignable. Rather than supporting the 'default'
>> mbm_assign_mode always use 'mbm_event'mode even if there are sufficient
>> memory bandwidth monitors. The per monitor event configuration is only
>> provided by resctrl when in 'mbm_event' mode and so only allowing
>> 'mbm_event' mode will make it easier to support per-monitor event
>> configuration for MPAM. For the moment, the only event supported is
>> mbm_total_event with no bandwidth type configuration. The 'mbm_assign_mode'
>> file will still show 'default' when there is no support for memory
>> bandwidth monitoring.
>>
>> The monitors need to be allocated from the driver, and mapped to whichever
>> control/monitor group resctrl wants to use them with.
>>
>> Add a second array to hold the monitor values indexed by resctrl's cntr_id.
>>
>> When CDP is in use, two monitors are needed so the available number of
>> counters halves. Platforms with one monitor will have zero monitors when
>> CDP is in use.
>>
>> Co-developed-by: James Morse <james.morse@arm.com>
>> Signed-off-by: James Morse <james.morse@arm.com>
>> Signed-off-by: Ben Horgan <ben.horgan@arm.com>
>>
>> +/*
>> + * This must run after all event counters have been picked so that any free
>> + * running counters have already been allocated.
>> + */
>> +static int mpam_resctrl_monitor_init_abmc(struct mpam_resctrl_mon *mon)
>> +{
>> + struct mpam_resctrl_res *res = &mpam_resctrl_controls[RDT_RESOURCE_L3];
>> + struct rdt_resource *l3 = &res->resctrl_res;
>> + struct mpam_class *class = mon->class;
>> + u16 num_mbwu_mon;
>> + size_t num_rmid = resctrl_arch_system_num_rmid_idx();
>> +
>> + if (mon->mbwu_idx_to_mon) {
>> + pr_debug("monitors free running\n");
>> + return 0;
>> + }
>
> ABMC is not supported under this condition.
> Why does this condition conclude that there are enough monitors(monitors freee running)?
This is just a mistake. I missed removing this condition when support for using mbwu in
"free running"/non-AMBC mode was removed.
Thanks,
Ben
>
> Best regards,
> Shaopeng TAN
>
^ permalink raw reply
* Re: [RFC PATCH v2 1/5] arm_mpam: resctrl: Pick classes for use as mbm counters
From: Ben Horgan @ 2026-03-27 9:50 UTC (permalink / raw)
To: Shaopeng Tan (Fujitsu)
Cc: amitsinght@marvell.com, baisheng.gao@unisoc.com,
baolin.wang@linux.alibaba.com, carl@os.amperecomputing.com,
dave.martin@arm.com, david@kernel.org, dfustini@baylibre.com,
fenghuay@nvidia.com, gshan@redhat.com, james.morse@arm.com,
jonathan.cameron@huawei.com, kobak@nvidia.com,
lcherian@marvell.com, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, peternewman@google.com,
punit.agrawal@oss.qualcomm.com, quic_jiles@quicinc.com,
reinette.chatre@intel.com, rohit.mathew@arm.com,
scott@os.amperecomputing.com, sdonthineni@nvidia.com,
xhao@linux.alibaba.com, zengheng4@huawei.com
In-Reply-To: <TY4PR01MB169309AB957008DE0FCA442F18B57A@TY4PR01MB16930.jpnprd01.prod.outlook.com>
Hi Shaopeng,
On 3/27/26 02:53, Shaopeng Tan (Fujitsu) wrote:
> Hello Ben,
>
>
>> resctrl has two types of counters, NUMA-local and global. MPAM can only
>> count global either using MSC at the L3 cache or in the memory controllers.
>> When global and local equate to the same thing continue just to call it
>> global.
>>
>> Tested-by: Shaopeng Tan <tan.shaopeng@jp.fujitsu.com>
>> Tested-by: Zeng Heng <zengheng4@huawei.com>
>> Reviewed-by: Shaopeng Tan <tan.shaopeng@jp.fujitsu.com>
>> Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
>> Signed-off-by: James Morse <james.morse@arm.com>
>> Signed-off-by: Ben Horgan <ben.horgan@arm.com>
>
> There are environments with multiple L3 caches within a single NUMA node.
> In this case, mbm_total will be the sum of traffic from all caches within that NUAM node.
> Is my understanding correct?
No, currently you only get mbm_total if there is single L3 cache and a single corresponding NUMA node. Rather than
adding partial support by summing across numa nodes we plan to add support for memory bandwidth monitoring with NUMA
node scope.
Thanks,
Ben
>
>
> Best regards,
> Shaopeng TAN
^ permalink raw reply
* [PATCH net] net: airoha: Add missing cleanup bits in airoha_qdma_cleanup_rx_queue()
From: Lorenzo Bianconi @ 2026-03-27 9:48 UTC (permalink / raw)
To: Andrew Lunn, David S. Miller, Eric Dumazet, Jakub Kicinski,
Paolo Abeni, Lorenzo Bianconi
Cc: linux-arm-kernel, linux-mediatek, netdev, Madhur Agrawal
In order to properly cleanup hw rx QDMA queues and bring the device to
the initial state, reset rx DMA queue head/tail index. Moreover, reset
queued DMA descriptor fields.
Fixes: 23020f049327 ("net: airoha: Introduce ethernet support for EN7581 SoC")
Tested-by: Madhur Agrawal <Madhur.Agrawal@airoha.com>
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
---
drivers/net/ethernet/airoha/airoha_eth.c | 18 +++++++++++++++++-
1 file changed, 17 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/airoha/airoha_eth.c b/drivers/net/ethernet/airoha/airoha_eth.c
index 56cf9a926a83da38bb03373ced9728f1fecdbce7..c2a54dbcbb0d576da298f2a36a354afaef89b240 100644
--- a/drivers/net/ethernet/airoha/airoha_eth.c
+++ b/drivers/net/ethernet/airoha/airoha_eth.c
@@ -794,18 +794,34 @@ static int airoha_qdma_init_rx_queue(struct airoha_queue *q,
static void airoha_qdma_cleanup_rx_queue(struct airoha_queue *q)
{
- struct airoha_eth *eth = q->qdma->eth;
+ struct airoha_qdma *qdma = q->qdma;
+ struct airoha_eth *eth = qdma->eth;
+ int qid = q - &qdma->q_rx[0];
while (q->queued) {
struct airoha_queue_entry *e = &q->entry[q->tail];
+ struct airoha_qdma_desc *desc = &q->desc[q->tail];
struct page *page = virt_to_head_page(e->buf);
dma_sync_single_for_cpu(eth->dev, e->dma_addr, e->dma_len,
page_pool_get_dma_dir(q->page_pool));
page_pool_put_full_page(q->page_pool, page, false);
+ /* Reset DMA descriptor */
+ WRITE_ONCE(desc->ctrl, 0);
+ WRITE_ONCE(desc->addr, 0);
+ WRITE_ONCE(desc->data, 0);
+ WRITE_ONCE(desc->msg0, 0);
+ WRITE_ONCE(desc->msg1, 0);
+ WRITE_ONCE(desc->msg2, 0);
+ WRITE_ONCE(desc->msg3, 0);
+
q->tail = (q->tail + 1) % q->ndesc;
q->queued--;
}
+
+ q->head = q->tail;
+ airoha_qdma_rmw(qdma, REG_RX_DMA_IDX(qid), RX_RING_DMA_IDX_MASK,
+ FIELD_PREP(RX_RING_DMA_IDX_MASK, q->tail));
}
static int airoha_qdma_init_rx(struct airoha_qdma *qdma)
---
base-commit: ae05340ccaa9d347fe85415609e075545bec589f
change-id: 20260326-airoha_qdma_cleanup_rx_queue-fix-5efd8e392bd0
Best regards,
--
Lorenzo Bianconi <lorenzo@kernel.org>
^ permalink raw reply related
* Re: [PATCH v2 3/3] remoteproc: imx_rproc: Add support for i.MX94
From: Daniel Baluta @ 2026-03-27 9:46 UTC (permalink / raw)
To: Peng Fan (OSS), Bjorn Andersson, Mathieu Poirier, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Frank Li, Sascha Hauer,
Pengutronix Kernel Team, Fabio Estevam, Daniel Baluta
Cc: linux-remoteproc, devicetree, imx, linux-arm-kernel, linux-kernel,
Peng Fan
In-Reply-To: <20260327-imx943-rproc-v2-3-a547a3588730@nxp.com>
On 3/27/26 04:42, Peng Fan (OSS) wrote:
> From: Peng Fan <peng.fan@nxp.com>
>
> Add basic remoteproc support for the i.MX94 M-core processors, including
> address translation tables(dev addr is from view of remote processor,
> sys addr is from view of main processor) and device configuration data for
> the CM70, CM71, and CM33S cores.
>
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
^ permalink raw reply
* Re: [PATCH v2 2/3] remoteproc: imx_rproc: Pass bootaddr to SM CPU/LMM reset vector
From: Daniel Baluta @ 2026-03-27 9:45 UTC (permalink / raw)
To: Peng Fan (OSS), Bjorn Andersson, Mathieu Poirier, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Frank Li, Sascha Hauer,
Pengutronix Kernel Team, Fabio Estevam, Daniel Baluta
Cc: linux-remoteproc, devicetree, imx, linux-arm-kernel, linux-kernel,
Peng Fan
In-Reply-To: <20260327-imx943-rproc-v2-2-a547a3588730@nxp.com>
On 3/27/26 04:42, Peng Fan (OSS) wrote:
> From: Peng Fan <peng.fan@nxp.com>
>
> Cortex-M[7,33] processors use a fixed reset vector table format:
>
> 0x00 Initial SP value
> 0x04 Reset vector
> 0x08 NMI
> 0x0C ...
> ...
> IRQ[n]
>
> In ELF images, the corresponding layout is:
>
> reset_vectors: --> hardware reset address
> .word __stack_end__
> .word Reset_Handler
> .word NMI_Handler
> .word HardFault_Handler
> ...
> .word UART_IRQHandler
> .word SPI_IRQHandler
> ...
>
> Reset_Handler: --> ELF entry point address
> ...
>
> The hardware fetches the first two words from reset_vectors and populates
> SP with __stack_end__ and PC with Reset_Handler. Execution proceeds from
> Reset_Handler.
>
> However, the ELF entry point does not always match the hardware reset
> address. For example, on i.MX94 CM33S:
>
> ELF entry point: 0x0ffc211d
> hardware reset base: 0x0ffc0000 (default reset value, sw programmable)
>
> To derive the correct hardware reset address, the unused lower bits must
> be masked off. The boot code should apply a SoC-specific mask before
> programming the reset address registers, e.g.:
>
> reset_address = entry & reset_vector_mask
>
> Current driver always programs the reset vector as 0. But i.MX94 CM33S's
> default reset base is 0x0ffc0000, so the correct reset vector must be
> passed to the SM API; otherwise the M33 Sync core cannot boot successfully.
>
> rproc_elf_get_boot_addr() returns the ELF entry point, which is not the
> hardware reset vector address. To derive the proper reset vector, this
> patch introduces imx_rproc_get_boot_addr(), which masks the ELF entry
> point using the SoC‑specific 'reset_vector_mask'. The resulting reset
> vector address is then passed to the SM CPU/LMM reset vector API calls.
>
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
^ permalink raw reply
* [PATCH net-next 2/2] net: stmmac: simplify GSO/TSO test in stmmac_xmit()
From: Russell King (Oracle) @ 2026-03-27 9:40 UTC (permalink / raw)
To: Andrew Lunn
Cc: Alexandre Torgue, Andrew Lunn, David S. Miller, Eric Dumazet,
Jakub Kicinski, linux-arm-kernel, linux-stm32, netdev,
Paolo Abeni
In-Reply-To: <acZQaDeCoib5S5UA@shell.armlinux.org.uk>
The test in stmmac_xmit() to see whether we should pass the skbuff to
stmmac_tso_xmit() is more complex than it needs to be. This test can
be simplified by storing the mask of GSO types that we will pass, and
setting it according to the enabled features.
Note that "tso" is a mis-nomer since commit b776620651a1 ("net:
stmmac: Implement UDP Segmentation Offload"). Also note that this
commit controls both via the TSO feature. We preserve this behaviour
in this commit.
Also, this commit unconditionally accessed skb_shinfo(skb)->gso_type
for all frames, even when skb_is_gso() was false. This access is
eliminated.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
---
drivers/net/ethernet/stmicro/stmmac/stmmac.h | 3 +-
.../net/ethernet/stmicro/stmmac/stmmac_main.c | 30 +++++++++++--------
2 files changed, 20 insertions(+), 13 deletions(-)
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac.h b/drivers/net/ethernet/stmicro/stmmac/stmmac.h
index 919a93a52390..8ba8f03e1ce0 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac.h
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac.h
@@ -265,8 +265,9 @@ struct stmmac_priv {
u32 rx_coal_frames[MTL_MAX_RX_QUEUES];
int hwts_tx_en;
+ /* skb_shinfo(skb)->gso_type types that we handle */
+ unsigned int gso_enabled_types;
bool tx_path_in_lpi_mode;
- bool tso;
bool sph_active;
bool sph_capable;
u32 sarc_type;
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
index 8203d6845b00..d3e8d793af52 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
@@ -3700,7 +3700,7 @@ static int stmmac_hw_setup(struct net_device *dev)
stmmac_set_rings_length(priv);
/* Enable TSO */
- if (priv->tso) {
+ if (priv->gso_enabled_types) {
for (chan = 0; chan < tx_cnt; chan++) {
struct stmmac_tx_queue *tx_q = &priv->dma_conf.tx_queue[chan];
@@ -4675,7 +4675,6 @@ static netdev_tx_t stmmac_xmit(struct sk_buff *skb, struct net_device *dev)
u32 queue = skb_get_queue_mapping(skb);
int nfrags = skb_shinfo(skb)->nr_frags;
unsigned int first_entry, tx_packets;
- int gso = skb_shinfo(skb)->gso_type;
struct stmmac_txq_stats *txq_stats;
struct dma_desc *desc, *first_desc;
struct stmmac_tx_queue *tx_q;
@@ -4687,14 +4686,9 @@ static netdev_tx_t stmmac_xmit(struct sk_buff *skb, struct net_device *dev)
if (priv->tx_path_in_lpi_mode && priv->eee_sw_timer_en)
stmmac_stop_sw_lpi(priv);
- /* Manage oversized TCP frames for GMAC4 device */
- if (skb_is_gso(skb) && priv->tso) {
- if (gso & (SKB_GSO_TCPV4 | SKB_GSO_TCPV6))
- return stmmac_tso_xmit(skb, dev);
- if (priv->plat->core_type == DWMAC_CORE_GMAC4 &&
- (gso & SKB_GSO_UDP_L4))
- return stmmac_tso_xmit(skb, dev);
- }
+ if (skb_is_gso(skb) &&
+ skb_shinfo(skb)->gso_type & priv->gso_enabled_types)
+ return stmmac_tso_xmit(skb, dev);
if (priv->est && priv->est->enable &&
priv->est->max_sdu[queue]) {
@@ -6049,6 +6043,18 @@ static int stmmac_change_mtu(struct net_device *dev, int new_mtu)
return 0;
}
+static void stmmac_set_gso_types(struct stmmac_priv *priv, bool tso)
+{
+ if (!tso) {
+ priv->gso_enabled_types = 0;
+ } else {
+ /* Manage oversized TCP frames for GMAC4 device */
+ priv->gso_enabled_types = SKB_GSO_TCPV4 | SKB_GSO_TCPV6;
+ if (priv->plat->core_type == DWMAC_CORE_GMAC4)
+ priv->gso_enabled_types |= SKB_GSO_UDP_L4;
+ }
+}
+
static netdev_features_t stmmac_fix_features(struct net_device *dev,
netdev_features_t features)
{
@@ -6094,7 +6100,7 @@ static int stmmac_set_features(struct net_device *netdev,
stmmac_enable_sph(priv, priv->ioaddr, sph_en, chan);
}
- priv->tso = !!(features & NETIF_F_TSO);
+ stmmac_set_gso_types(priv, features & NETIF_F_TSO);
if (features & NETIF_F_HW_VLAN_CTAG_RX)
priv->hw->hw_vlan_en = true;
@@ -7828,7 +7834,7 @@ static int __stmmac_dvr_probe(struct device *device,
ndev->hw_features |= NETIF_F_TSO | NETIF_F_TSO6;
if (priv->plat->core_type == DWMAC_CORE_GMAC4)
ndev->hw_features |= NETIF_F_GSO_UDP_L4;
- priv->tso = true;
+ stmmac_set_gso_types(priv, true);
dev_info(priv->device, "TSO feature enabled\n");
}
--
2.47.3
^ permalink raw reply related
* [PATCH net-next 1/2] net: stmmac: fix .ndo_fix_features()
From: Russell King (Oracle) @ 2026-03-27 9:40 UTC (permalink / raw)
To: Andrew Lunn
Cc: Alexandre Torgue, Andrew Lunn, David S. Miller, Eric Dumazet,
Jakub Kicinski, linux-arm-kernel, linux-stm32, netdev,
Paolo Abeni
In-Reply-To: <acZQaDeCoib5S5UA@shell.armlinux.org.uk>
netdev features documentation requires that .ndo_fix_features() is
stateless: it shouldn't modify driver state. Yet, stmmac_fix_features()
does exactly that, changing whether GSO frames are processed by the
driver.
Move this code to stmmac_set_features() instead, which is the correct
place for it. We don't need to check whether TSO is supported; this
is already handled via the setup of netdev->hw_features, and we are
guaranteed that if netdev->hw_features indicates that a feature is
not supported, .ndo_set_features() won't be called with it set.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
---
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 10 ++--------
1 file changed, 2 insertions(+), 8 deletions(-)
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
index 9b6b49331639..8203d6845b00 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
@@ -6068,14 +6068,6 @@ static netdev_features_t stmmac_fix_features(struct net_device *dev,
if (priv->plat->bugged_jumbo && (dev->mtu > ETH_DATA_LEN))
features &= ~NETIF_F_CSUM_MASK;
- /* Disable tso if asked by ethtool */
- if ((priv->plat->flags & STMMAC_FLAG_TSO_EN) && (priv->dma_cap.tsoen)) {
- if (features & NETIF_F_TSO)
- priv->tso = true;
- else
- priv->tso = false;
- }
-
return features;
}
@@ -6102,6 +6094,8 @@ static int stmmac_set_features(struct net_device *netdev,
stmmac_enable_sph(priv, priv->ioaddr, sph_en, chan);
}
+ priv->tso = !!(features & NETIF_F_TSO);
+
if (features & NETIF_F_HW_VLAN_CTAG_RX)
priv->hw->hw_vlan_en = true;
else
--
2.47.3
^ permalink raw reply related
* [PATCH net-next 0/2] net: stmmac: fix and clean up TSO/GSO support
From: Russell King (Oracle) @ 2026-03-27 9:39 UTC (permalink / raw)
To: Andrew Lunn
Cc: Alexandre Torgue, Andrew Lunn, David S. Miller, Eric Dumazet,
Jakub Kicinski, linux-arm-kernel, linux-stm32, netdev,
Paolo Abeni
This series:
1. moves setting priv->tso from stmmac_fix_features() to
stmmac_set_features() as fix_features is not supposed to change
driver state.
2. simplifies the TSO/GSP test in stmmac_xmit() to simply check if the
skbuff is a GSO buffer, and whether the gso_type is one that we
should handle.
A previous version of patch 1 was posted in February:
https://lore.kernel.org/r/E1vuU3X-0000000Ae9G-1Er8@rmk-PC.armlinux.org.uk/
drivers/net/ethernet/stmicro/stmmac/stmmac.h | 3 +-
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 38 +++++++++++------------
2 files changed, 21 insertions(+), 20 deletions(-)
--
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTP is here! 80Mbps down 10Mbps up. Decent connectivity at last!
^ permalink raw reply
* Re: [PATCH net-next] net: airoha: Grab flow_offload_mutex running airoha_register_gdm_devices()
From: Lorenzo Bianconi @ 2026-03-27 8:55 UTC (permalink / raw)
To: Jakub Kicinski
Cc: Andrew Lunn, David S. Miller, Eric Dumazet, Paolo Abeni,
linux-arm-kernel, linux-mediatek, netdev
In-Reply-To: <20260326200605.39222917@kernel.org>
[-- Attachment #1: Type: text/plain, Size: 747 bytes --]
On Mar 26, Jakub Kicinski wrote:
> On Tue, 24 Mar 2026 17:54:45 +0100 Lorenzo Bianconi wrote:
> > Netfilter flowtable can theoretically try offload flower rules as soon
> > as a net-device is registered while not all the other ones are
> > registered/initialized, triggering a possible NULL pointer dereferencing
> > of qdma pointer in airoha_ppe_set_cpu_port routine. In order to avoid any
> > possible race, grab the flow_offload_mutex running
> > airoha_register_gdm_devices().
>
> Sashiko says this causes a lock ordering issue:
> https://sashiko.dev/#/patchset/20260324-airoha-regiser-race-fix-v1-1-6014df55886b@kernel.org
Ack, right. Thx for pointing this issue out. I will work on a different
solution.
Regards,
Lorenzo
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]
^ permalink raw reply
* Re: [PATCH v3 1/3] drm: Introduce DRM_MODE_DUMB_KERNEL_MAP flag
From: Chen-Yu Tsai @ 2026-03-27 9:38 UTC (permalink / raw)
To: Thomas Zimmermann
Cc: Maarten Lankhorst, Maxime Ripard, David Airlie, Simona Vetter,
Rob Herring, dri-devel, linux-kernel, linux-arm-kernel
In-Reply-To: <243dbc45-cb11-4dfe-b8d1-e08f1b5f73b6@suse.de>
On Fri, Mar 27, 2026 at 3:21 PM Thomas Zimmermann <tzimmermann@suse.de> wrote:
>
> Hi
>
> Am 26.03.26 um 11:01 schrieb Chen-Yu Tsai:
> > From: Rob Herring <robh@kernel.org>
> >
> > Introduce a new flag, DRM_MODE_DUMB_KERNEL_MAP, for struct
> > drm_mode_create_dumb. This flag is for internal kernel use to indicate
> > if dumb buffer allocation needs a kernel mapping. This is needed only for
> > GEM DMA where creating a kernel mapping or not has to be decided at
> > allocation time because creating a mapping on demand (with vmap()) is not
> > guaranteed to work.
>
> I still don't understand what you're trying to achieve. As I pointed
> out, ever driver's memory manager potentially requires a vmap. Passing
> around flags will not solve that problem. If vmap is not possible, the
> driver should not provide the vmap callbacks in the first place.
I'm trying to convert the Rockchip and Exynos drivers to the GEM DMA
helpers. Both have their reasons for not using the helpers, one of them
being that the DRM device is not the DMA device. This is already fixed
by my other series. Both drivers also set DMA_ATTR_NO_KERNEL_MAPPING
for buffer allocations other than the one used by fb_helper.
Exynos's GEM implementation also sets extra DMA attributes at the
allocation phase for their custom GEM create ioctl. But otherwise
exynos is just reimplementing all the GEM DMA helpers in almost
identical fashion. And to your point, exynos does not provide the
vmap callback.
Rockchip's GEM implementation splits the code path between DMA and
IOMMU usage as it needs to attach and detach the DMA device from the
IOMMU domain on the fly. This predates the DMA IOMMU framework. This
GEM implementation provides the vmap callback, which will fail for
direct DMA allocations without the kernel mapping.
There's also something fishy about Rockchip's DRM driver. It's using
fbdev-dma, even though it's not based on the GEM DMA helpers or even
drm_gem_dma_object.
As you are against changing the existing *_dumb_create() interface,
I will look into reusing drm_gem_dma_object with driver-specific
functions. I believe I will need to keep patch 2 adding dma_attrs
though. Would that be acceptable?
Once again, thank you for your patience.
ChenYu
> Best regards
> Thomas
>
> >
> > Several drivers are using reimplementing the GEM DMA helpers because
> > they distinguish between kernel and userspace allocations to create a
> > kernel mapping or not. Adding a flag allows migrating these drivers
> > to the helpers while preserving their existing behavior. These include
> > exynos, rockchip, and previously mediatek.
> >
> > Update the callers of drm_mode_dumb_create() to set
> > drm_mode_dumb_create.flags to appropriate defaults. Currently, flags can
> > be set to anything by userspace, but is unused within the kernel. Let's
> > force flags to zero (no kernel mapping) for userspace callers by default.
> > For in kernel clients, set DRM_MODE_DUMB_KERNEL_MAP by default. Drivers
> > can override this as needed.
> >
> > Signed-off-by: Rob Herring <robh@kernel.org>
> > [wenst@chromium.org: Emit warning (once) if args->flags is not zero]
> > [wenst@chromium.org: Moved flag def. to include/drm/drm_dumb_buffers.h]
> > Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
> > ---
> > Changes since v2:
> > - Switched to drm_warn_once()
> > - Moved flag definition from include/uapi/ to include/drm/drm_dumb_buffers.h
> > - Reworded commit message
> >
> > Changes since v1:
> > - Emit warning if args->flags is not zero
> > ---
> > drivers/gpu/drm/drm_client.c | 2 ++
> > drivers/gpu/drm/drm_dumb_buffers.c | 4 ++++
> > include/drm/drm_dumb_buffers.h | 3 +++
> > 3 files changed, 9 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/drm_client.c b/drivers/gpu/drm/drm_client.c
> > index 46c465bce98c..3d3e61823cc1 100644
> > --- a/drivers/gpu/drm/drm_client.c
> > +++ b/drivers/gpu/drm/drm_client.c
> > @@ -14,6 +14,7 @@
> > #include <drm/drm_client_event.h>
> > #include <drm/drm_device.h>
> > #include <drm/drm_drv.h>
> > +#include <drm/drm_dumb_buffers.h>
> > #include <drm/drm_file.h>
> > #include <drm/drm_fourcc.h>
> > #include <drm/drm_framebuffer.h>
> > @@ -404,6 +405,7 @@ drm_client_buffer_create_dumb(struct drm_client_dev *client, u32 width, u32 heig
> > dumb_args.width = width;
> > dumb_args.height = height;
> > dumb_args.bpp = drm_format_info_bpp(info, 0);
> > + dumb_args.flags = DRM_MODE_DUMB_KERNEL_MAP;
> > ret = drm_mode_create_dumb(dev, &dumb_args, client->file);
> > if (ret)
> > return ERR_PTR(ret);
> > diff --git a/drivers/gpu/drm/drm_dumb_buffers.c b/drivers/gpu/drm/drm_dumb_buffers.c
> > index e2b62e5fb891..60f4c2d08641 100644
> > --- a/drivers/gpu/drm/drm_dumb_buffers.c
> > +++ b/drivers/gpu/drm/drm_dumb_buffers.c
> > @@ -233,6 +233,10 @@ int drm_mode_create_dumb_ioctl(struct drm_device *dev,
> > struct drm_mode_create_dumb *args = data;
> > int err;
> >
> > + if (args->flags)
> > + drm_warn_once(dev, "drm_mode_create_dumb.flags is not zero.\n");
> > + args->flags = 0;
> > +
> > err = drm_mode_create_dumb(dev, args, file_priv);
> > if (err) {
> > args->handle = 0;
> > diff --git a/include/drm/drm_dumb_buffers.h b/include/drm/drm_dumb_buffers.h
> > index 1f3a8236fb3d..4657e44533f4 100644
> > --- a/include/drm/drm_dumb_buffers.h
> > +++ b/include/drm/drm_dumb_buffers.h
> > @@ -6,6 +6,9 @@
> > struct drm_device;
> > struct drm_mode_create_dumb;
> >
> > +/* drm_mode_create_dumb flags for internal use */
> > +#define DRM_MODE_DUMB_KERNEL_MAP (1<<0)
> > +
> > int drm_mode_size_dumb(struct drm_device *dev,
> > struct drm_mode_create_dumb *args,
> > unsigned long hw_pitch_align,
>
> --
> --
> Thomas Zimmermann
> Graphics Driver Developer
> SUSE Software Solutions Germany GmbH
> Frankenstr. 146, 90461 Nürnberg, Germany, www.suse.com
> GF: Jochen Jaser, Andrew McDonald, Werner Knoblich, (HRB 36809, AG Nürnberg)
>
>
^ permalink raw reply
* Re: [PATCH 2/2] arm64: dts: qcom: monaco-evk: enable UART6 for robot expansion board
From: Konrad Dybcio @ 2026-03-27 9:37 UTC (permalink / raw)
To: Canfeng Zhuang, konradybcio, andersson
Cc: robh, krzk+dt, conor+dt, linux-arm-msm, devicetree,
linux-arm-kernel
In-Reply-To: <20260327083101.1343613-3-canfeng.zhuang@oss.qualcomm.com>
On 3/27/26 9:31 AM, Canfeng Zhuang wrote:
> The monaco-evk mezzanine connector supports a robot expansion board that
> requires UART6, which is currently disabled. This prevents the expansion
> board from exchanging data and control commands.
>
> Enable UART6 and assign the serial2 alias to provide stable device
> enumeration for the expansion board.
>
> Signed-off-by: Canfeng Zhuang <canfeng.zhuang@oss.qualcomm.com>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Konrad
^ permalink raw reply
* Re: [PATCH 1/2] arm64: dts: qcom: lemans-evk: enable UART0 for robot expansion board
From: Konrad Dybcio @ 2026-03-27 9:37 UTC (permalink / raw)
To: Canfeng Zhuang, konradybcio, andersson
Cc: robh, krzk+dt, conor+dt, linux-arm-msm, devicetree,
linux-arm-kernel
In-Reply-To: <20260327083101.1343613-2-canfeng.zhuang@oss.qualcomm.com>
On 3/27/26 9:31 AM, Canfeng Zhuang wrote:
> The lemans-evk mezzanine connector supports a robot expansion board that
> requires UART0, which is currently disabled. This prevents the expansion
> board from exchanging data and control commands.
>
> Enable UART0 and assign the serial2 alias to provide stable device
> enumeration for the expansion board.
>
> Signed-off-by: Canfeng Zhuang <canfeng.zhuang@oss.qualcomm.com>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Konrad
^ permalink raw reply
* Re: [PATCH v11 2/3] of: Factor arguments passed to of_map_id() into a struct
From: Vijayanand Jitta @ 2026-03-27 9:35 UTC (permalink / raw)
To: Bjorn Helgaas, Richard Zhu, Lucas Stach
Cc: Nipun Gupta, Nikhil Agarwal, Joerg Roedel, Will Deacon,
Robin Murphy, Marc Zyngier, Lorenzo Pieralisi, Thomas Gleixner,
Saravana Kannan, Krzysztof Wilczyński, Manivannan Sadhasivam,
Bjorn Helgaas, Frank Li, Sascha Hauer, Pengutronix Kernel Team,
Fabio Estevam, Juergen Gross, Stefano Stabellini,
Oleksandr Tyshchenko, Dmitry Baryshkov, Konrad Dybcio,
Bjorn Andersson, Rob Herring, Conor Dooley, Krzysztof Kozlowski,
Prakash Gupta, Vikash Garodia, linux-kernel, iommu,
linux-arm-kernel, devicetree, linux-pci, imx, xen-devel,
linux-arm-msm, Charan Teja Kalla
In-Reply-To: <20260326161957.GA1324845@bhelgaas>
On 3/26/2026 9:49 PM, Bjorn Helgaas wrote:
> [cc->to: Richard, Lucas for pci-imx6.c question]
>
> On Wed, Mar 25, 2026 at 04:38:23PM +0530, Vijayanand Jitta wrote:
>> From: Charan Teja Kalla <charan.kalla@oss.qualcomm.com>
>>
>> Change of_map_id() to take a pointer to struct of_phandle_args
>> instead of passing target device node and translated IDs separately.
>> Update all callers accordingly.
>>
>> Add an explicit filter_np parameter to of_map_id() and of_map_msi_id()
>> to separate the filter input from the output. Previously, the target
>> parameter served dual purpose: as an input filter (if non-NULL, only
>> match entries targeting that node) and as an output (receiving the
>> matched node with a reference held). Now filter_np is the explicit
>> input filter and arg->np is the pure output.
>>
>> Previously, of_map_id() would call of_node_put() on the matched node
>> when a filter was provided, making reference ownership inconsistent.
>> Remove this internal of_node_put() call so that of_map_id() now always
>> transfers ownership of the matched node reference to the caller via
>> arg->np. Callers are now consistently responsible for releasing this
>> reference with of_node_put(arg->np) when done.
>> ...
>
> Not actually part of *this* patch, and AFAICS this patch is correct
> as-is, but is it necessary to have different logic around
> of_node_put() for imx_pcie_add_lut_by_rid() and
> apple_pcie_enable_device()?
>
Thanks for the review comments. Right, there is no need to have different
logic, I will update imx_pcie_add_lut_by_rid() in v12 so that of_node_put()
would be called unconditionally.
>> +++ b/drivers/pci/controller/dwc/pci-imx6.c
>> @@ -1137,6 +1137,8 @@ static void imx_pcie_remove_lut(struct imx_pcie *imx_pcie, u16 rid)
>>
>> static int imx_pcie_add_lut_by_rid(struct imx_pcie *imx_pcie, u32 rid)
>> {
>> + struct of_phandle_args iommu_spec = {};
>> + struct of_phandle_args msi_spec = {};
>> struct device *dev = imx_pcie->pci->dev;
>> struct device_node *target;
>> u32 sid_i, sid_m;
>> @@ -1144,7 +1146,12 @@ static int imx_pcie_add_lut_by_rid(struct imx_pcie *imx_pcie, u32 rid)
>> u32 sid = 0;
>>
>> target = NULL;
>> - err_i = of_map_iommu_id(dev->of_node, rid, &target, &sid_i);
>> + err_i = of_map_iommu_id(dev->of_node, rid, &iommu_spec);
>> + if (!err_i) {
>> + target = iommu_spec.np;
>> + sid_i = iommu_spec.args[0];
>> + }
>> +
>> if (target) {
>> of_node_put(target);
>
> Here it's conditional on "target" even though of_node_put() checks
> internally for non-NULL, so it would be safe without the conditional
> here.
>
Agreed, here of_node_put can be called unconditionally , will fix it in v12.
>> } else {
>> @@ -1156,8 +1163,11 @@ static int imx_pcie_add_lut_by_rid(struct imx_pcie *imx_pcie, u32 rid)
>> err_i = -EINVAL;
>> }
>>
>> - target = NULL;
>> - err_m = of_map_msi_id(dev->of_node, rid, &target, &sid_m);
>> + err_m = of_map_msi_id(dev->of_node, rid, NULL, &msi_spec);
>> + if (!err_m) {
>> + target = msi_spec.np;
>> + sid_m = msi_spec.args[0];
>> + }
>>
>> /*
>> * err_m target
>
> And here (outside the diff context) we also call of_node_put()
> conditionally:
>
> ...
> else if (target)
> of_node_put(target);
>
Agreed, same as above.
>> diff --git a/drivers/pci/controller/pcie-apple.c b/drivers/pci/controller/pcie-apple.c
>> index a0937b7b3c4d..c2cffc0659f4 100644
>> --- a/drivers/pci/controller/pcie-apple.c
>> +++ b/drivers/pci/controller/pcie-apple.c
>> @@ -755,6 +755,7 @@ static int apple_pcie_enable_device(struct pci_host_bridge *bridge, struct pci_d
>> {
>> u32 sid, rid = pci_dev_id(pdev);
>> struct apple_pcie_port *port;
>> + struct of_phandle_args iommu_spec = {};
>> int idx, err;
>>
>> port = apple_pcie_get_port(pdev);
>> @@ -764,10 +765,12 @@ static int apple_pcie_enable_device(struct pci_host_bridge *bridge, struct pci_d
>> dev_dbg(&pdev->dev, "added to bus %s, index %d\n",
>> pci_name(pdev->bus->self), port->idx);
>>
>> - err = of_map_iommu_id(port->pcie->dev->of_node, rid, NULL, &sid);
>> + err = of_map_iommu_id(port->pcie->dev->of_node, rid, &iommu_spec);
>> if (err)
>> return err;
>>
>> + of_node_put(iommu_spec.np);
>
> Here we call of_node_put() unconditionally.
>
> I think it would be much nicer if imx_pcie_add_lut_by_rid() used the
> same style as apple_pcie_enable_device() and did the of_node_put()
> unconditionally. That would untangle the function a bit and make it
> easier to analyze.
>
Sure, as mentioned above will align imx_pcie_add_lut_by_rid() and
apple_pcie_enable_device().
Thanks,
Vijay
>> + sid = iommu_spec.args[0];
>> mutex_lock(&port->pcie->lock);
>>
>> idx = bitmap_find_free_region(port->sid_map, port->sid_map_sz, 0);
^ permalink raw reply
* [PATCH v1 1/3] arm64: dts: amlogic: meson-s4: add VRTC node
From: Nick Xie @ 2026-03-27 9:30 UTC (permalink / raw)
To: neil.armstrong, khilman, martin.blumenstingl, jbrunet
Cc: krzk+dt, robh, conor+dt, linux-amlogic, linux-arm-kernel,
devicetree, linux-kernel, Nick Xie
In-Reply-To: <20260327093016.722095-1-nick@khadas.com>
Add the Virtual RTC (VRTC) controller node to the Meson S4 SoC dtsi.
Signed-off-by: Nick Xie <nick@khadas.com>
---
arch/arm64/boot/dts/amlogic/meson-s4.dtsi | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-s4.dtsi b/arch/arm64/boot/dts/amlogic/meson-s4.dtsi
index 936a5c1353d15..2a6fbd5308362 100644
--- a/arch/arm64/boot/dts/amlogic/meson-s4.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-s4.dtsi
@@ -59,6 +59,11 @@ psci {
method = "smc";
};
+ vrtc: rtc@fe010288 {
+ compatible = "amlogic,meson-vrtc";
+ reg = <0x0 0xfe010288 0x0 0x4>;
+ };
+
xtal: xtal-clk {
compatible = "fixed-clock";
clock-frequency = <24000000>;
--
2.34.1
^ permalink raw reply related
* [PATCH v1 3/3] arm64: dts: amlogic: meson-s4-s905y4-khadas-vim1s: use rc-khadas keymap
From: Nick Xie @ 2026-03-27 9:30 UTC (permalink / raw)
To: neil.armstrong, khilman, martin.blumenstingl, jbrunet
Cc: krzk+dt, robh, conor+dt, linux-amlogic, linux-arm-kernel,
devicetree, linux-kernel, Nick Xie
In-Reply-To: <20260327093016.722095-1-nick@khadas.com>
The Khadas VIM1S board has an onboard IR receiver.
Configure the default keymap to "rc-khadas" to support the official
Khadas IR remote control.
Signed-off-by: Nick Xie <nick@khadas.com>
---
arch/arm64/boot/dts/amlogic/meson-s4-s905y4-khadas-vim1s.dts | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-s4-s905y4-khadas-vim1s.dts b/arch/arm64/boot/dts/amlogic/meson-s4-s905y4-khadas-vim1s.dts
index 7314e0ab81da3..99d5df71b9cd4 100644
--- a/arch/arm64/boot/dts/amlogic/meson-s4-s905y4-khadas-vim1s.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-s4-s905y4-khadas-vim1s.dts
@@ -242,6 +242,7 @@ &ir {
status = "okay";
pinctrl-0 = <&remote_pins>;
pinctrl-names = "default";
+ linux,rc-map-name = "rc-khadas";
};
&pwm_ef {
--
2.34.1
^ permalink raw reply related
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