* Re: [PATCH] remoteproc: xlnx: check remote node state
From: Shah, Tanmay @ 2026-04-27 18:51 UTC (permalink / raw)
To: Mathieu Poirier, tanmay.shah
Cc: Padhi, Beleswar, michal.simek, andersson, linux-arm-kernel,
linux-kernel, linux-remoteproc
In-Reply-To: <ae-iTAk0KvtPvMSB@p14s>
On 4/27/2026 12:52 PM, Mathieu Poirier wrote:
> Good morning
>
> On Mon, Apr 27, 2026 at 11:15:29AM -0500, Shah, Tanmay wrote:
>> Hello Beleswar,
>>
>> Thanks for reviews. Please find my answer below:
>>
>> On 4/24/2026 10:51 PM, Padhi, Beleswar wrote:
>>> Hi Tanmay,
>>>
>>> In $subject-line, s/remote node/remoteproc
>>>
>>
>> Ack. 'node' is platform management firmware term, which might not be
>> right here. subject line already contains remoteproc so no need to have
>> it again. Instead, will replace 'node' with 'core'. new subject:
>>
>> remoteproc: xlnx: check remote core state.
>>
>
> Much better.
>
>>> On 4/25/2026 8:32 AM, Tanmay Shah wrote:
>>>> The remote state is set to RPROC_DETACHED if the resource table is found
>>>> in the memory. However, this can be wrong if the remote is not started,
>>>> but firmware is still loaded in the memory. Use PM_GET_NODE_STATUS call
>>>> to the firmware to request the state of the RPU node. If the RPU is
>>>> actually out of reset and running, only then move the remote state to
>>>> RPROC_DETACHED, otherwise keep the remote state to RPROC_OFFLINE.
>>>
>>>
>>> This is a good additional check. However, one thing to note is
[...]
>>>> +
>>>> + /*
>>>> + * If RPU state is power on and out of reset i.e. running, then
>>>> + * assign RPROC_DETACHED state. If the RPU is not out of reset
>>>> + * then do not attempt to attach to the remote processor.
>>>> + */
>>>> + if (status == PM_NODE_RUNNING) {
>>>> + if (zynqmp_r5_get_rsc_table_va(r5_core))
>>>> + dev_dbg(r5_core->dev, "rsc tbl not found\n");
>>>
>>>
>>> Do you still want to set state = RPROC_DETACHED if resource table is not
>>> found in the
>>> memory?
>>>
>>
>> Yes. Not all the firmware that is running on remote core is expected to
>> have the resource table. The firmware might not use RPMsg at all, and in
>> that case resource table becomes irrelevant. However, we still need to
>> make sure that running core is not reported as offline.
>
> Please add the above explanation to the inlined comment. Otherwise I'm good
> with this patch but I'll need an RB from Michael before moving forward.
>
Ack.
> Do you see this as a bug fix? Is there a point adding this patch to the stable
> kernels?
>
That's a good point. I should add Fixes tag as well, for the commit that
introduced attach-detach feature.
I will do that in v2.
Thanks,
Tanmay
>>
>> Thanks.
>>
>>> Thanks,
>>> Beleswar
>>>
>>>> + r5_core->rproc->state = RPROC_DETACHED;
>>>> + }
>>>> }
>>>> return 0;
>>>> diff --git a/include/linux/firmware/xlnx-zynqmp.h b/include/linux/
>>>> firmware/xlnx-zynqmp.h
>>>> index d70dcd462b44..7e27b0f7bf7e 100644
>>>> --- a/include/linux/firmware/xlnx-zynqmp.h
>>>> +++ b/include/linux/firmware/xlnx-zynqmp.h
>>>> @@ -542,6 +542,18 @@ enum pm_gem_config_type {
>>>> GEM_CONFIG_FIXED = 2,
>>>> };
>>>> +/**
>>>> + * enum pm_node_status - Device node status provided by xilpm fw
>>>> + * @PM_NODE_UNUSED: Device is not used
>>>> + * @PM_NODE_RUNNING: Device is power-on and out of reset
>>>> + * @PM_NODE_HALT: Device is power-on but in the reset state
>>>> + */
>>>> +enum pm_node_status {
>>>> + PM_NODE_UNUSED = 0,
>>>> + PM_NODE_RUNNING = 1,
>>>> + PM_NODE_HALT = 12,
>>>> +};
>>>> +
>>>> /**
>>>> * struct zynqmp_pm_query_data - PM query data
>>>> * @qid: query ID
>>>> @@ -630,6 +642,8 @@ int zynqmp_pm_set_rpu_mode(u32 node_id, enum
>>>> rpu_oper_mode rpu_mode);
>>>> int zynqmp_pm_set_tcm_config(u32 node_id, enum rpu_tcm_comb tcm_mode);
>>>> int zynqmp_pm_get_node_status(const u32 node, u32 *const status,
>>>> u32 *const requirements, u32 *const usage);
>>>> +int zynqmp_pm_get_rpu_node_status(const u32 node, u32 *const status,
>>>> + u32 *const requirements, u32 *const usage);
>>>> int zynqmp_pm_set_sd_config(u32 node, enum pm_sd_config_type config,
>>>> u32 value);
>>>> int zynqmp_pm_set_gem_config(u32 node, enum pm_gem_config_type config,
>>>> u32 value);
>>>> @@ -939,6 +953,13 @@ static inline int zynqmp_pm_get_node_status(const
>>>> u32 node, u32 *const status,
>>>> return -ENODEV;
>>>> }
>>>> +static inline int zynqmp_pm_get_rpu_node_status(const u32 node, u32
>>>> *const status,
>>>> + u32 *const requirements,
>>>> + u32 *const usage)
>>>> +{
>>>> + return -ENODEV;
>>>> +}
>>>> +
>>>> static inline int zynqmp_pm_set_sd_config(u32 node,
>>>> enum pm_sd_config_type config,
>>>> u32 value)
>>>>
>>>> base-commit: 6f860d238b44da8ac57be25289b9f4410691c4e2
>>
^ permalink raw reply
* Re: [RFC PATCH v1 2/9] uaccess: Convert INLINE_COPY_{TO/FROM}_USER to kconfig and reduce ifdefery
From: Yury Norov @ 2026-04-27 18:39 UTC (permalink / raw)
To: Christophe Leroy (CS GROUP)
Cc: Andrew Morton, Linus Torvalds, David Laight, Thomas Gleixner,
linux-alpha, Yury Norov, linux-kernel, linux-snps-arc,
linux-arm-kernel, linux-mips, linuxppc-dev, kvm, linux-riscv,
linux-s390, sparclinux, linux-um, dmaengine, linux-efi, linux-fsi,
amd-gfx, dri-devel, intel-gfx, linux-wpan, netdev, linux-wireless,
linux-spi, linux-media, linux-staging, linux-serial, linux-usb,
xen-devel, linux-fsdevel, ocfs2-devel, bpf, kasan-dev, linux-mm,
linux-x25, rust-for-linux, linux-sound, sound-open-firmware,
linux-csky, linux-hexagon, loongarch, linux-m68k, linux-openrisc,
linux-parisc, linux-sh, linux-arch
In-Reply-To: <9fe875d2f55af59c12708336c571a46038528678.1777306795.git.chleroy@kernel.org>
On Mon, Apr 27, 2026 at 07:13:43PM +0200, Christophe Leroy (CS GROUP) wrote:
> Among the 21 architectures supported by the kernel, 16 define both
> INLINE_COPY_TO_USER and INLINE_COPY_FROM_USER while the 5 other ones
> don't define any of the two.
>
> To simplify and reduce risk of mistakes, convert them to a single
> kconfig item named CONFIG_ARCH_WANTS_NOINLINE_COPY which will be
We've got a special word for it: outline. Can you name it
CONFIG_OUTLINE_USERCOPY, or similar?
> selected by the 5 architectures that don't want inlined copy.
>
> To minimise complication in a later patch, also remove
> ifdefery and replace it with IS_ENABLED().
>
> Signed-off-by: Christophe Leroy (CS GROUP) <chleroy@kernel.org>
Andrew has taken my consolidation patch for INLINE_COPY_USER:
https://lore.kernel.org/all/20260427085814.7ca0b134603b8d5813e23396@linux-foundation.org/
Please base your series on top of it.
I'm not sure this patch is relevant to the goal of your series. Maybe
send it separately?
Thanks,
Yury
^ permalink raw reply
* Re: [PATCH v2] iio: adc: mt6359: fix unchecked return value in mt6358_read_imp
From: Andy Shevchenko @ 2026-04-27 18:38 UTC (permalink / raw)
To: Jonathan Cameron
Cc: Salah Triki, David Lechner, Nuno Sá, Andy Shevchenko,
Matthias Brugger, AngeloGioacchino Del Regno, linux-iio,
linux-kernel, linux-arm-kernel, linux-mediatek
In-Reply-To: <20260427181856.613a22ee@jic23-huawei>
On Mon, Apr 27, 2026 at 06:18:56PM +0100, Jonathan Cameron wrote:
> On Mon, 27 Apr 2026 17:57:59 +0100
> Salah Triki <salah.triki@gmail.com> wrote:
>
> > In mt6358_read_imp(), the return value of regmap_read() is currently
> > ignored. This is problematic because if the bus read fails the variable
> > val_v remains uninitialized.
> >
> > The function subsequently assigns this uninitialized stack value to
> > *vbat, leading to incorrect measurement results being reported to
> > the IIO subsystem without any error indication.
> >
> > Update the function to check the return value of regmap_read(). Ensure
> > that mt6358_stop_imp_conv() is still called to clean up the hardware
> > state before returning the error code.
> I'd be more concerned about what it might otherwise report.. Will expose
> something random that was on the stack previously.
>
> Ok on this one having a fixes tag given the uninitialized, though as I mentioned
> I'd have been tempted to take the approach of just initialising it.
>
> Even with the code as you have it here a static analyzer may not be able
> to see far enough to tell it is initialized and so throw false positive warnings.
True.
> Still, let's see what Andy thinks before you change anything.
...
> > /* Read the params before stopping */
> > - regmap_read(regmap, reg_adc0 + (cinfo->imp_adc_num << 1), &val_v);
> > + ret = regmap_read(regmap, reg_adc0 + (cinfo->imp_adc_num << 1), &val_v);
> > mt6358_stop_imp_conv(adc_dev);
This still uses unchecked IO.
> > + if (ret)
> > + return ret;
So, assume we got it right and error code is 0, but failed to stop conversion.
What would be the consequences?
As I said, the whole driver needs to be re-think of. If you going to check this
you need to add checks into _stop_imp_conv() which may lead to adding checks to
the complementary functions and it will go as a rabbit hole.
I agree with Jonathan that quick fix of initialising it explicitly with
a comment will be better approach taking into account the state of affairs
of this driver as a whole.
--
With Best Regards,
Andy Shevchenko
^ permalink raw reply
* Re: [REGRESSION] rseq: refactoring in v6.19 broke everyone on arm64 and tcmalloc everywhere
From: Mathieu Desnoyers @ 2026-04-27 18:35 UTC (permalink / raw)
To: Florian Weimer, Thomas Gleixner
Cc: Peter Zijlstra, Mathias Stearn, Dmitry Vyukov, Jinjie Ruan,
linux-man, Mark Rutland, Catalin Marinas, Will Deacon, Boqun Feng,
Paul E. McKenney, Chris Kennelly, regressions, linux-kernel,
linux-arm-kernel, Ingo Molnar, Blake Oler, Rich Felker,
Matthew Wilcox, Greg Kroah-Hartman, Linus Torvalds, criu,
Michael Jeanson
In-Reply-To: <lhujyts4zr8.fsf@oldenburg.str.redhat.com>
On 2026-04-27 03:40, Florian Weimer wrote:
> * Thomas Gleixner:
>
>> The real question is how to differentiate between the legacy and the
>> optimized mode. I have two working variants to achieve that:
[...]
>
> Switching to the new extensible RSEQ allocation code in older glibc
> builds is not entirely trivial, and I would prefer not doing that.
> Registering with a new flag is comparatively simple, and we could
> backport it, except that it might not be compatible with CRIU.
A third option would allow the entire range of older libc versions to
benefit from rseq optimizations, gating the "v2" behavior on:
rseq_len > 32 || (flags & RSEQ_FLAG_V2)
As a result:
- restore compatibility with existing tcmalloc binaries.
- glibc 2.41+ would benefit from optimization without changes.
- glibc 2.35-2.40 would be able to easily backport minimal changes [*]
to benefit from kernel optimizations (flags & RSEQ_FLAG_V2).
Likewise for RHEL glibc 2.34 with backported rseq support.
[*] Minimal changes to allow older libc to use the optimized mode
involve implementing a new query for getauxval(AT_RSEQ_V2),
which would return nonzero when the kernel supports the v2
flag, and when supported pass a new RSEQ_FLAG_V2 flag to rseq
on registration.
That v2 behavior would:
A) Enforce the ABI contract:
- RO fields corruption -> kill process,
- System call within rseq critical section -> kill process,
B) Allow optimization of the rseq field updates (only update relevant
fields on migration),
This entirely decouples the feature enablement concern (rseq_len) from
the strictness/optimization mode (v2).
This keeps compatibility with current tcmalloc binaries because
tcmalloc always registers a 32 bytes rseq_len without the v2
flag set. tcmalloc already has its own internal fields at fixed
offsets from the rseq structure which conflict with extended rseq
fields, so limiting the tcmalloc work-around behavior to
rseq_len == 32 seem to align well with the tcmalloc project
approach towards extensibility and ecosystem inter-compatibility.
Thoughts ?
Thanks,
Mathieu
--
Mathieu Desnoyers
EfficiOS Inc.
https://www.efficios.com
^ permalink raw reply
* [PATCH v3] gpu: ipu-v3: clean up kernel-doc warnings
From: Randy Dunlap @ 2026-04-27 18:32 UTC (permalink / raw)
To: dri-devel
Cc: Randy Dunlap, Philipp Zabel, Maarten Lankhorst, Maxime Ripard,
Thomas Zimmermann, David Airlie, Simona Vetter, imx,
linux-arm-kernel, Helge Deller, linux-fbdev
Correct all kernel-doc warnings:
- fix a typedef kernel-doc comment
- mark a list_head as private
- use Returns: for function return values
Warning: include/video/imx-ipu-image-convert.h:31 struct member 'list' not
described in 'ipu_image_convert_run'
Warning: include/video/imx-ipu-image-convert.h:40 function parameter
'ipu_image_convert_cb_t' not described in 'void'
Warning: include/video/imx-ipu-image-convert.h:40 expecting prototype for
ipu_image_convert_cb_t(). Prototype was for void() instead
Warning: include/video/imx-ipu-image-convert.h:66 No description found for
return value of 'ipu_image_convert_verify'
Warning: include/video/imx-ipu-image-convert.h:90 No description found for
return value of 'ipu_image_convert_prepare'
Warning: include/video/imx-ipu-image-convert.h:125 No description found for
return value of 'ipu_image_convert_queue'
Warning: include/video/imx-ipu-image-convert.h:163 No description found for
return value of 'ipu_image_convert'
Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
---
v2: add Reviewed-by, update Cc: list, rebase, resend
v3: rebase & resend
Cc: Philipp Zabel <p.zabel@pengutronix.de>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: Maxime Ripard <mripard@kernel.org>
Cc: Thomas Zimmermann <tzimmermann@suse.de>
Cc: David Airlie <airlied@gmail.com>
Cc: Simona Vetter <simona@ffwll.ch>
Cc: imx@lists.linux.dev
Cc: linux-arm-kernel@lists.infradead.org
Cc: Helge Deller <deller@gmx.de>
Cc: linux-fbdev@vger.kernel.org
include/video/imx-ipu-image-convert.h | 16 +++++++++++-----
1 file changed, 11 insertions(+), 5 deletions(-)
--- linux-next-20260427.orig/include/video/imx-ipu-image-convert.h
+++ linux-next-20260427/include/video/imx-ipu-image-convert.h
@@ -27,12 +27,13 @@ struct ipu_image_convert_run {
int status;
+ /* private: */
/* internal to image converter, callers don't touch */
struct list_head list;
};
/**
- * ipu_image_convert_cb_t - conversion callback function prototype
+ * typedef ipu_image_convert_cb_t - conversion callback function prototype
*
* @run: the completed conversion run pointer
* @ctx: a private context pointer for the callback
@@ -60,7 +61,7 @@ void ipu_image_convert_adjust(struct ipu
* @out: output image format
* @rot_mode: rotation mode
*
- * Returns 0 if the formats and rotation mode meet IPU restrictions,
+ * Returns: 0 if the formats and rotation mode meet IPU restrictions,
* -EINVAL otherwise.
*/
int ipu_image_convert_verify(struct ipu_image *in, struct ipu_image *out,
@@ -77,11 +78,11 @@ int ipu_image_convert_verify(struct ipu_
* @complete: run completion callback
* @complete_context: a context pointer for the completion callback
*
- * Returns an opaque conversion context pointer on success, error pointer
+ * In V4L2, drivers should call ipu_image_convert_prepare() at streamon.
+ *
+ * Returns: an opaque conversion context pointer on success, error pointer
* on failure. The input/output formats and rotation mode must already meet
* IPU retrictions.
- *
- * In V4L2, drivers should call ipu_image_convert_prepare() at streamon.
*/
struct ipu_image_convert_ctx *
ipu_image_convert_prepare(struct ipu_soc *ipu, enum ipu_ic_task ic_task,
@@ -122,6 +123,8 @@ void ipu_image_convert_unprepare(struct
* In V4L2, drivers should call ipu_image_convert_queue() while
* streaming to queue the conversion of a received input buffer.
* For example mem2mem devices this would be called in .device_run.
+ *
+ * Returns: 0 on success or -errno on error.
*/
int ipu_image_convert_queue(struct ipu_image_convert_run *run);
@@ -155,6 +158,9 @@ void ipu_image_convert_abort(struct ipu_
* On successful return the caller can queue more run requests if needed, using
* the prepared context in run->ctx. The caller is responsible for unpreparing
* the context when no more conversion requests are needed.
+ *
+ * Returns: pointer to the created &struct ipu_image_convert_run that has
+ * been queued on success; an ERR_PTR(errno) on error.
*/
struct ipu_image_convert_run *
ipu_image_convert(struct ipu_soc *ipu, enum ipu_ic_task ic_task,
^ permalink raw reply
* Re: [RFC PATCH v1 7/9] x86: Add unsafe_copy_from_user()
From: Christophe Leroy (CS GROUP) @ 2026-04-27 18:20 UTC (permalink / raw)
To: Yury Norov
Cc: Andrew Morton, Linus Torvalds, David Laight, Thomas Gleixner,
linux-alpha, linux-kernel, linux-snps-arc, linux-arm-kernel,
linux-mips, linuxppc-dev, kvm, linux-riscv, linux-s390,
sparclinux, linux-um, dmaengine, linux-efi, linux-fsi, amd-gfx,
dri-devel, intel-gfx, linux-wpan, netdev, linux-wireless,
linux-spi, linux-media, linux-staging, linux-serial, linux-usb,
xen-devel, linux-fsdevel, ocfs2-devel, bpf, kasan-dev, linux-mm,
linux-x25, rust-for-linux, linux-sound, sound-open-firmware,
linux-csky, linux-hexagon, loongarch, linux-m68k, linux-openrisc,
linux-parisc, linux-sh, linux-arch
In-Reply-To: <ae-j2_QirCySZD02@yury>
Le 27/04/2026 à 19:58, Yury Norov a écrit :
> On Mon, Apr 27, 2026 at 07:13:48PM +0200, Christophe Leroy (CS GROUP) wrote:
>> At the time being, x86 and arm64 are missing unsafe_copy_from_user().
>
> No, they don't. They (should) rely on a generic implementation from
> linux/uaccess.h, like every other arch, except for PPC and RISCV.
>
> But they #define arch_unsafe_get_user, and the unsafe_copy_from_user()
> becomes undefined conditionally on that.
>
> So please, fix that bug instead of introducing another arch flavor.
> We'd always choose generic version, unless there's strong evidence
> that arch one is better.
But they both implement the exact same unsafe_copy_to_user(). What is
the difference here ?
Should that function become generic too ?
Christophe
>
>
> Thanks,
> Yury
>
>> Add it.
>>
>> Signed-off-by: Christophe Leroy (CS GROUP) <chleroy@kernel.org>
>> ---
>> arch/x86/include/asm/uaccess.h | 29 ++++++++++++++++++++++++-----
>> 1 file changed, 24 insertions(+), 5 deletions(-)
>>
>> diff --git a/arch/x86/include/asm/uaccess.h b/arch/x86/include/asm/uaccess.h
>> index 3a0dd3c2b233..10c458ffa399 100644
>> --- a/arch/x86/include/asm/uaccess.h
>> +++ b/arch/x86/include/asm/uaccess.h
>> @@ -598,7 +598,7 @@ _label: \
>> * We want the unsafe accessors to always be inlined and use
>> * the error labels - thus the macro games.
>> */
>> -#define unsafe_copy_loop(dst, src, len, type, label) \
>> +#define unsafe_put_loop(dst, src, len, type, label) \
>> while (len >= sizeof(type)) { \
>> unsafe_put_user(*(type *)(src),(type __user *)(dst),label); \
>> dst += sizeof(type); \
>> @@ -611,10 +611,29 @@ do { \
>> char __user *__ucu_dst = (_dst); \
>> const char *__ucu_src = (_src); \
>> size_t __ucu_len = (_len); \
>> - unsafe_copy_loop(__ucu_dst, __ucu_src, __ucu_len, u64, label); \
>> - unsafe_copy_loop(__ucu_dst, __ucu_src, __ucu_len, u32, label); \
>> - unsafe_copy_loop(__ucu_dst, __ucu_src, __ucu_len, u16, label); \
>> - unsafe_copy_loop(__ucu_dst, __ucu_src, __ucu_len, u8, label); \
>> + unsafe_put_loop(__ucu_dst, __ucu_src, __ucu_len, u64, label); \
>> + unsafe_put_loop(__ucu_dst, __ucu_src, __ucu_len, u32, label); \
>> + unsafe_put_loop(__ucu_dst, __ucu_src, __ucu_len, u16, label); \
>> + unsafe_put_loop(__ucu_dst, __ucu_src, __ucu_len, u8, label); \
>> +} while (0)
>> +
>> +#define unsafe_get_loop(dst, src, len, type, label) \
>> + while (len >= sizeof(type)) { \
>> + unsafe_get_user(*(type __user *)(src),(type *)(dst),label); \
>> + dst += sizeof(type); \
>> + src += sizeof(type); \
>> + len -= sizeof(type); \
>> + }
>> +
>> +#define unsafe_copy_from_user(_dst,_src,_len,label) \
>> +do { \
>> + char *__ucu_dst = (_dst); \
>> + const char __user *__ucu_src = (_src); \
>> + size_t __ucu_len = (_len); \
>> + unsafe_get_loop(__ucu_dst, __ucu_src, __ucu_len, u64, label); \
>> + unsafe_get_loop(__ucu_dst, __ucu_src, __ucu_len, u32, label); \
>> + unsafe_get_loop(__ucu_dst, __ucu_src, __ucu_len, u16, label); \
>> + unsafe_get_loop(__ucu_dst, __ucu_src, __ucu_len, u8, label); \
>> } while (0)
>>
>> #ifdef CONFIG_CC_HAS_ASM_GOTO_OUTPUT
>> --
>> 2.49.0
>>
^ permalink raw reply
* Re: [PATCH v8 4/4] coresight: cti: expose banked sysfs registers for Qualcomm extended CTI
From: Leo Yan @ 2026-04-27 18:15 UTC (permalink / raw)
To: Yingchao Deng
Cc: Suzuki K Poulose, Mike Leach, James Clark, Alexander Shishkin,
coresight, linux-arm-kernel, linux-kernel, linux-arm-msm,
quic_yingdeng, Jinlong Mao, Tingwei Zhang, Jie Gan
In-Reply-To: <20260426-extended-cti-v8-4-23b900a4902f@oss.qualcomm.com>
On Sun, Apr 26, 2026 at 05:44:41PM +0800, Yingchao Deng wrote:
> Qualcomm extended CTI implements banked trigger status and integration
> registers, where each bank covers 32 triggers. Multiple instances of
> these registers are required to expose the full trigger space.
>
> Add static sysfs entries for the banked CTI registers and control their
> visibility based on the underlying hardware configuration. Numbered
> sysfs nodes are hidden on standard ARM CTIs, preserving the existing ABI.
> On Qualcomm CTIs, only banked registers backed by hardware are exposed,
> with the number of visible banks derived from nr_trig_max.
>
> This ensures that userspace only sees registers that are actually
> implemented, while maintaining compatibility with existing CTI tooling.
>
> Signed-off-by: Yingchao Deng <yingchao.deng@oss.qualcomm.com>
> ---
> drivers/hwtracing/coresight/coresight-cti-sysfs.c | 58 +++++++++++++++++++++++
> 1 file changed, 58 insertions(+)
>
> diff --git a/drivers/hwtracing/coresight/coresight-cti-sysfs.c b/drivers/hwtracing/coresight/coresight-cti-sysfs.c
> index 8b70e7e38ea3..046757e4e9b6 100644
> --- a/drivers/hwtracing/coresight/coresight-cti-sysfs.c
> +++ b/drivers/hwtracing/coresight/coresight-cti-sysfs.c
> @@ -512,18 +512,36 @@ static struct attribute *coresight_cti_regs_attrs[] = {
> &dev_attr_appclear.attr,
> &dev_attr_apppulse.attr,
> coresight_cti_reg(triginstatus, CTITRIGINSTATUS),
> + coresight_cti_reg(triginstatus1, CTI_REG_SET_NR_CONST(CTITRIGINSTATUS, 1)),
How about extend the cs_off_attribute struct:
struct cs_off_attribute {
struct device_attribute attr;
u32 off;
u32 index;
};
// by default, the index is 0
#define coresight_cti_reg(name, offset) \
(&((struct cs_off_attribute[]) { \
{ \
__ATTR(name, 0444, coresight_cti_reg_show, NULL), \
offset \
0 \
} \
})[0].attr.attr)
// For the register with index
#define coresight_cti_reg_index(name, offset, index) \
(&((struct cs_off_attribute[]) { \
{ \
__ATTR(name, 0444, coresight_cti_reg_show, NULL), \
offset \
index \
} \
})[0].attr.attr)
coresight_cti_reg_index(triginstatus1, CTITRIGINSTATUS, 1),
> + coresight_cti_reg(triginstatus2, CTI_REG_SET_NR_CONST(CTITRIGINSTATUS, 2)),
> + coresight_cti_reg(triginstatus3, CTI_REG_SET_NR_CONST(CTITRIGINSTATUS, 3)),
> coresight_cti_reg(trigoutstatus, CTITRIGOUTSTATUS),
> + coresight_cti_reg(trigoutstatus1, CTI_REG_SET_NR_CONST(CTITRIGOUTSTATUS, 1)),
> + coresight_cti_reg(trigoutstatus2, CTI_REG_SET_NR_CONST(CTITRIGOUTSTATUS, 2)),
> + coresight_cti_reg(trigoutstatus3, CTI_REG_SET_NR_CONST(CTITRIGOUTSTATUS, 3)),
> coresight_cti_reg(chinstatus, CTICHINSTATUS),
> coresight_cti_reg(choutstatus, CTICHOUTSTATUS),
> #ifdef CONFIG_CORESIGHT_CTI_INTEGRATION_REGS
> coresight_cti_reg_rw(itctrl, CORESIGHT_ITCTRL),
> coresight_cti_reg(ittrigin, ITTRIGIN),
> + coresight_cti_reg(ittrigin1, CTI_REG_SET_NR_CONST(ITTRIGIN, 1)),
> + coresight_cti_reg(ittrigin2, CTI_REG_SET_NR_CONST(ITTRIGIN, 2)),
> + coresight_cti_reg(ittrigin3, CTI_REG_SET_NR_CONST(ITTRIGIN, 3)),
> coresight_cti_reg(itchin, ITCHIN),
> coresight_cti_reg_rw(ittrigout, ITTRIGOUT),
> + coresight_cti_reg_rw(ittrigout1, CTI_REG_SET_NR_CONST(ITTRIGOUT, 1)),
> + coresight_cti_reg_rw(ittrigout2, CTI_REG_SET_NR_CONST(ITTRIGOUT, 2)),
> + coresight_cti_reg_rw(ittrigout3, CTI_REG_SET_NR_CONST(ITTRIGOUT, 3)),
> coresight_cti_reg_rw(itchout, ITCHOUT),
> coresight_cti_reg(itchoutack, ITCHOUTACK),
> coresight_cti_reg(ittrigoutack, ITTRIGOUTACK),
> + coresight_cti_reg(ittrigoutack1, CTI_REG_SET_NR_CONST(ITTRIGOUTACK, 1)),
> + coresight_cti_reg(ittrigoutack2, CTI_REG_SET_NR_CONST(ITTRIGOUTACK, 2)),
> + coresight_cti_reg(ittrigoutack3, CTI_REG_SET_NR_CONST(ITTRIGOUTACK, 3)),
> coresight_cti_reg_wo(ittriginack, ITTRIGINACK),
> + coresight_cti_reg_wo(ittriginack1, CTI_REG_SET_NR_CONST(ITTRIGINACK, 1)),
> + coresight_cti_reg_wo(ittriginack2, CTI_REG_SET_NR_CONST(ITTRIGINACK, 2)),
> + coresight_cti_reg_wo(ittriginack3, CTI_REG_SET_NR_CONST(ITTRIGINACK, 3)),
> coresight_cti_reg_wo(itchinack, ITCHINACK),
> #endif
> NULL,
> @@ -534,10 +552,50 @@ static umode_t coresight_cti_regs_is_visible(struct kobject *kobj,
> {
> struct device *dev = kobj_to_dev(kobj);
> struct cti_drvdata *drvdata = dev_get_drvdata(dev->parent);
> + static const char * const qcom_suffix_registers[] = {
> + "triginstatus",
> + "trigoutstatus",
> +#ifdef CONFIG_CORESIGHT_CTI_INTEGRATION_REGS
> + "ittrigin",
> + "ittrigout",
> + "ittriginack",
> + "ittrigoutack",
> +#endif
> + };
> + int i, nr, max_bank;
> + size_t len;
>
> if (attr == &dev_attr_asicctl.attr && !drvdata->config.asicctl_impl)
> return 0;
>
> + /*
> + * Banked regs are exposed as <qcom_suffix_registers><nr> (nr = 1..3).
> + * - Hide them on standard CTIs.
> + * - On QCOM CTIs, hide suffixes beyond the number of banks implied
> + * by nr_trig_max (32 triggers per bank).
> + */
> + for (i = 0; i < ARRAY_SIZE(qcom_suffix_registers); i++) {
This can be general for a register with index? Like:
for (i = 0; i < ARRAY_SIZE(registers_with_index); i++) {
> + len = strlen(qcom_suffix_registers[i]);
> +
> + if (strncmp(attr->name, qcom_suffix_registers[i], len))
> + continue;
> +
> + if (kstrtoint(attr->name + len, 10, &nr))
> + continue;
> +
> + if (!drvdata->is_qcom_cti)
> + return 0;
> +
> + if (nr < 1 || nr > 3)
> + return 0;
> +
> + max_bank = DIV_ROUND_UP(drvdata->config.nr_trig_max, 32) - 1;
> + if (nr > max_bank)
> + return 0;
Directly check the attr's index here?
struct cs_off_attribute *cti_attr =
container_of(attr, struct cs_off_attribute, attr);
max_bank = DIV_ROUND_UP(drvdata->config.nr_trig_max, 32);
if (cti_attr->index >= max_bank)
return 0;
Thanks,
Leo
^ permalink raw reply
* ❌ FAIL: Test report for for-kernelci (7.1.0-rc1, upstream-arm-next, 3ea44150)
From: cki-project @ 2026-04-27 18:12 UTC (permalink / raw)
To: yoyang, will, catalin.marinas, linux-arm-kernel
Hi, we tested your kernel and here are the results:
Overall result: FAILED
Merge: OK
Compile: OK
Test: FAILED
Kernel information:
Commit message: ACPI: arm64: cpuidle: Tolerate platforms with no deep PSCI idle states
You can find all the details about the test run at
https://datawarehouse.cki-project.org/kcidb/checkouts/redhat:2482691236
One or more kernel tests failed:
Unrecognized or new issues:
xfstests - btrfs
aarch64
Logs: https://datawarehouse.cki-project.org/kcidb/tests/redhat:2482691236_aarch64_kernel_kcidb_tool_21181696_9
Non-passing ran subtests:
❌ FAIL generic/301
We also see the following known issues which are not related to your changes:
Issue: [upstream] Hardware - Firmware test suite - auto-waive failures
URL: https://gitlab.com/cki-project/infrastructure/-/issues/779
Affected tests:
Hardware - Firmware test suite [aarch64]
If you find a failure unrelated to your changes, please ask the test maintainer to review it.
This will prevent the failures from being incorrectly reported in the future.
Please reply to this email if you have any questions about the tests that we
ran or if you have any suggestions on how to make future tests more effective.
,-. ,-.
( C ) ( K ) Continuous
`-',-.`-' Kernel
( I ) Integration
`-'
______________________________________________________________________________
^ permalink raw reply
* Re: [RFC PATCH v1 5/9] uaccess: Switch to copy_{to/from}_user_partial() when relevant
From: Alice Ryhl @ 2026-04-27 18:07 UTC (permalink / raw)
To: Christophe Leroy (CS GROUP)
Cc: Yury Norov, Andrew Morton, Linus Torvalds, David Laight,
Thomas Gleixner, linux-alpha, linux-kernel, linux-snps-arc,
linux-arm-kernel, linux-mips, linuxppc-dev, kvm, linux-riscv,
linux-s390, sparclinux, linux-um, dmaengine, linux-efi, linux-fsi,
amd-gfx, dri-devel, intel-gfx, linux-wpan, netdev, linux-wireless,
linux-spi, linux-media, linux-staging, linux-serial, linux-usb,
xen-devel, linux-fsdevel, ocfs2-devel, bpf, kasan-dev, linux-mm,
linux-x25, rust-for-linux, linux-sound, sound-open-firmware,
linux-csky, linux-hexagon, loongarch, linux-m68k, linux-openrisc,
linux-parisc, linux-sh, linux-arch
In-Reply-To: <289b424e243ba2c4139ea04009cf8b9c448a87ff.1777306795.git.chleroy@kernel.org>
On Mon, Apr 27, 2026 at 07:13:46PM +0200, Christophe Leroy (CS GROUP) wrote:
> diff --git a/rust/helpers/uaccess.c b/rust/helpers/uaccess.c
> index 01de4fbbcc84..710e07cd60ae 100644
> --- a/rust/helpers/uaccess.c
> +++ b/rust/helpers/uaccess.c
> @@ -5,13 +5,13 @@
> __rust_helper unsigned long
> rust_helper_copy_from_user(void *to, const void __user *from, unsigned long n)
> {
> - return copy_from_user(to, from, n);
> + return copy_from_user_partial(to, from, n);
> }
>
> __rust_helper unsigned long
> rust_helper_copy_to_user(void __user *to, const void *from, unsigned long n)
> {
> - return copy_to_user(to, from, n);
> + return copy_to_user_partial(to, from, n);
> }
No Rust code uses the return value for anything other than comparing it
with zero, so you can keep these as copy_[from|to]_user() without
issues.
Thanks, Alice
^ permalink raw reply
* Re: [RFC PATCH v1 7/9] x86: Add unsafe_copy_from_user()
From: Yury Norov @ 2026-04-27 17:58 UTC (permalink / raw)
To: Christophe Leroy (CS GROUP)
Cc: Andrew Morton, Linus Torvalds, David Laight, Thomas Gleixner,
linux-alpha, linux-kernel, linux-snps-arc, linux-arm-kernel,
linux-mips, linuxppc-dev, kvm, linux-riscv, linux-s390,
sparclinux, linux-um, dmaengine, linux-efi, linux-fsi, amd-gfx,
dri-devel, intel-gfx, linux-wpan, netdev, linux-wireless,
linux-spi, linux-media, linux-staging, linux-serial, linux-usb,
xen-devel, linux-fsdevel, ocfs2-devel, bpf, kasan-dev, linux-mm,
linux-x25, rust-for-linux, linux-sound, sound-open-firmware,
linux-csky, linux-hexagon, loongarch, linux-m68k, linux-openrisc,
linux-parisc, linux-sh, linux-arch
In-Reply-To: <0ee46bb228d97163fbdc14f2a7c52b93d8bc34ce.1777306795.git.chleroy@kernel.org>
On Mon, Apr 27, 2026 at 07:13:48PM +0200, Christophe Leroy (CS GROUP) wrote:
> At the time being, x86 and arm64 are missing unsafe_copy_from_user().
No, they don't. They (should) rely on a generic implementation from
linux/uaccess.h, like every other arch, except for PPC and RISCV.
But they #define arch_unsafe_get_user, and the unsafe_copy_from_user()
becomes undefined conditionally on that.
So please, fix that bug instead of introducing another arch flavor.
We'd always choose generic version, unless there's strong evidence
that arch one is better.
Thanks,
Yury
> Add it.
>
> Signed-off-by: Christophe Leroy (CS GROUP) <chleroy@kernel.org>
> ---
> arch/x86/include/asm/uaccess.h | 29 ++++++++++++++++++++++++-----
> 1 file changed, 24 insertions(+), 5 deletions(-)
>
> diff --git a/arch/x86/include/asm/uaccess.h b/arch/x86/include/asm/uaccess.h
> index 3a0dd3c2b233..10c458ffa399 100644
> --- a/arch/x86/include/asm/uaccess.h
> +++ b/arch/x86/include/asm/uaccess.h
> @@ -598,7 +598,7 @@ _label: \
> * We want the unsafe accessors to always be inlined and use
> * the error labels - thus the macro games.
> */
> -#define unsafe_copy_loop(dst, src, len, type, label) \
> +#define unsafe_put_loop(dst, src, len, type, label) \
> while (len >= sizeof(type)) { \
> unsafe_put_user(*(type *)(src),(type __user *)(dst),label); \
> dst += sizeof(type); \
> @@ -611,10 +611,29 @@ do { \
> char __user *__ucu_dst = (_dst); \
> const char *__ucu_src = (_src); \
> size_t __ucu_len = (_len); \
> - unsafe_copy_loop(__ucu_dst, __ucu_src, __ucu_len, u64, label); \
> - unsafe_copy_loop(__ucu_dst, __ucu_src, __ucu_len, u32, label); \
> - unsafe_copy_loop(__ucu_dst, __ucu_src, __ucu_len, u16, label); \
> - unsafe_copy_loop(__ucu_dst, __ucu_src, __ucu_len, u8, label); \
> + unsafe_put_loop(__ucu_dst, __ucu_src, __ucu_len, u64, label); \
> + unsafe_put_loop(__ucu_dst, __ucu_src, __ucu_len, u32, label); \
> + unsafe_put_loop(__ucu_dst, __ucu_src, __ucu_len, u16, label); \
> + unsafe_put_loop(__ucu_dst, __ucu_src, __ucu_len, u8, label); \
> +} while (0)
> +
> +#define unsafe_get_loop(dst, src, len, type, label) \
> + while (len >= sizeof(type)) { \
> + unsafe_get_user(*(type __user *)(src),(type *)(dst),label); \
> + dst += sizeof(type); \
> + src += sizeof(type); \
> + len -= sizeof(type); \
> + }
> +
> +#define unsafe_copy_from_user(_dst,_src,_len,label) \
> +do { \
> + char *__ucu_dst = (_dst); \
> + const char __user *__ucu_src = (_src); \
> + size_t __ucu_len = (_len); \
> + unsafe_get_loop(__ucu_dst, __ucu_src, __ucu_len, u64, label); \
> + unsafe_get_loop(__ucu_dst, __ucu_src, __ucu_len, u32, label); \
> + unsafe_get_loop(__ucu_dst, __ucu_src, __ucu_len, u16, label); \
> + unsafe_get_loop(__ucu_dst, __ucu_src, __ucu_len, u8, label); \
> } while (0)
>
> #ifdef CONFIG_CC_HAS_ASM_GOTO_OUTPUT
> --
> 2.49.0
>
^ permalink raw reply
* Re: [PATCH] remoteproc: xlnx: check remote node state
From: Mathieu Poirier @ 2026-04-27 17:52 UTC (permalink / raw)
To: tanmay.shah
Cc: Padhi, Beleswar, michal.simek, andersson, linux-arm-kernel,
linux-kernel, linux-remoteproc
In-Reply-To: <5aabddce-eeee-43de-be30-115bc58040dc@amd.com>
Good morning
On Mon, Apr 27, 2026 at 11:15:29AM -0500, Shah, Tanmay wrote:
> Hello Beleswar,
>
> Thanks for reviews. Please find my answer below:
>
> On 4/24/2026 10:51 PM, Padhi, Beleswar wrote:
> > Hi Tanmay,
> >
> > In $subject-line, s/remote node/remoteproc
> >
>
> Ack. 'node' is platform management firmware term, which might not be
> right here. subject line already contains remoteproc so no need to have
> it again. Instead, will replace 'node' with 'core'. new subject:
>
> remoteproc: xlnx: check remote core state.
>
Much better.
> > On 4/25/2026 8:32 AM, Tanmay Shah wrote:
> >> The remote state is set to RPROC_DETACHED if the resource table is found
> >> in the memory. However, this can be wrong if the remote is not started,
> >> but firmware is still loaded in the memory. Use PM_GET_NODE_STATUS call
> >> to the firmware to request the state of the RPU node. If the RPU is
> >> actually out of reset and running, only then move the remote state to
> >> RPROC_DETACHED, otherwise keep the remote state to RPROC_OFFLINE.
> >
> >
> > This is a good additional check. However, one thing to note is
> > remoteproc core
> > framework will load the firmware if the state is set to RPROC_OFFLINE. This
> > will override the existing firmware in the memory, I hope that is not
> > fatal for
> > your usecase?
> >
>
> That is expected. If remote core is 'offline' during driver probe then
> any firmware already in the memory becomes irrelevant and new firmware
> can be loaded.
>
> >>
> >> Signed-off-by: Tanmay Shah <tanmay.shah@amd.com>
> >> ---
> >> drivers/firmware/xilinx/zynqmp.c | 28 +++++++++++++++++++
> >> drivers/remoteproc/xlnx_r5_remoteproc.c | 37 ++++++++++++++++++-------
> >> include/linux/firmware/xlnx-zynqmp.h | 21 ++++++++++++++
> >> 3 files changed, 76 insertions(+), 10 deletions(-)
> >>
> >> diff --git a/drivers/firmware/xilinx/zynqmp.c b/drivers/firmware/
> >> xilinx/zynqmp.c
> >> index fbe8510f4927..af838b2dc327 100644
> >> --- a/drivers/firmware/xilinx/zynqmp.c
> >> +++ b/drivers/firmware/xilinx/zynqmp.c
> >> @@ -1450,6 +1450,34 @@ int zynqmp_pm_get_node_status(const u32 node,
> >> u32 *const status,
> >> }
> >> EXPORT_SYMBOL_GPL(zynqmp_pm_get_node_status);
> >> +/**
> >> + * zynqmp_pm_get_rpu_node_status - PM call to request a RPU node's
> >> current power state
> >> + * @node: ID of the RPU component or sub-system in question
> >> + * @status: Current operating state of the requested RPU node.
> >> + * @requirements: Current requirements asserted on the RPU node.
> >> + * @usage: Usage information, used for RPU slave nodes only:
> >> + * PM_USAGE_NO_MASTER - No master is currently using
> >> + * the node
> >> + * PM_USAGE_CURRENT_MASTER - Only requesting master is
> >> + * currently using the node
> >> + * PM_USAGE_OTHER_MASTER - Only other masters are
> >> + * currently using the node
> >> + * PM_USAGE_BOTH_MASTERS - Both the current and at least
> >> + * one other master is currently
> >> + * using the node
> >> + *
> >> + * Return: Returns status, either success or error+reason
> >> + */
> >> +int zynqmp_pm_get_rpu_node_status(const u32 node, u32 *const status,
> >> + u32 *const requirements, u32 *const usage)
> >> +{
> >> + if (zynqmp_pm_feature(PM_GET_NODE_STATUS) < PM_API_VERSION_2)
> >> + return -EOPNOTSUPP;
> >> +
> >> + return zynqmp_pm_get_node_status(node, status, requirements, usage);
> >> +}
> >> +EXPORT_SYMBOL_GPL(zynqmp_pm_get_rpu_node_status);
> >> +
> >> /**
> >> * zynqmp_pm_force_pwrdwn - PM call to request for another PU or
> >> subsystem to
> >> * be powered down forcefully
> >> diff --git a/drivers/remoteproc/xlnx_r5_remoteproc.c b/drivers/
> >> remoteproc/xlnx_r5_remoteproc.c
> >> index 50a9974f3202..e2f25d94177d 100644
> >> --- a/drivers/remoteproc/xlnx_r5_remoteproc.c
> >> +++ b/drivers/remoteproc/xlnx_r5_remoteproc.c
> >> @@ -948,16 +948,6 @@ static struct zynqmp_r5_core
> >> *zynqmp_r5_add_rproc_core(struct device *cdev)
> >> goto free_rproc;
> >> }
> >> - /*
> >> - * If firmware is already available in the memory then move rproc
> >> state
> >> - * to DETACHED. Firmware can be preloaded via debugger or by any
> >> other
> >> - * agent (processors) in the system.
> >> - * If firmware isn't available in the memory and resource table
> >> isn't
> >> - * found, then rproc state remains OFFLINE.
> >> - */
> >> - if (!zynqmp_r5_get_rsc_table_va(r5_core))
> >> - r5_rproc->state = RPROC_DETACHED;
> >> -
> >> r5_core->rproc = r5_rproc;
> >> return r5_core;
> >> @@ -1210,6 +1200,7 @@ static int zynqmp_r5_core_init(struct
> >> zynqmp_r5_cluster *cluster,
> >> {
> >> struct device *dev = cluster->dev;
> >> struct zynqmp_r5_core *r5_core;
> >> + u32 req, usage, status;
> >> int ret = -EINVAL, i;
> >> r5_core = cluster->r5_cores[0];
> >> @@ -1255,6 +1246,32 @@ static int zynqmp_r5_core_init(struct
> >> zynqmp_r5_cluster *cluster,
> >> ret = zynqmp_r5_get_sram_banks(r5_core);
> >> if (ret)
> >> return ret;
> >> +
> >> + /*
> >> + * It is possible that firmware is loaded into the memory, but
> >> + * RPU (remote) is not running. In such case, RPU state will be
> >> + * moved to RPROC_DETACHED wrongfully. To avoid it first make
> >> + * sure RPU is power-on and out of reset before parsing for the
> >> + * resource table.
> >> + */
> >> + ret = zynqmp_pm_get_rpu_node_status(r5_core->pm_domain_id,
> >> + &status, &req, &usage);
> >> + if (ret) {
> >> + dev_warn(r5_core->dev,
> >> + "failed to get rpu node status, err %d\n", ret);
> >> + continue;
> >> + }
> >> +
> >> + /*
> >> + * If RPU state is power on and out of reset i.e. running, then
> >> + * assign RPROC_DETACHED state. If the RPU is not out of reset
> >> + * then do not attempt to attach to the remote processor.
> >> + */
> >> + if (status == PM_NODE_RUNNING) {
> >> + if (zynqmp_r5_get_rsc_table_va(r5_core))
> >> + dev_dbg(r5_core->dev, "rsc tbl not found\n");
> >
> >
> > Do you still want to set state = RPROC_DETACHED if resource table is not
> > found in the
> > memory?
> >
>
> Yes. Not all the firmware that is running on remote core is expected to
> have the resource table. The firmware might not use RPMsg at all, and in
> that case resource table becomes irrelevant. However, we still need to
> make sure that running core is not reported as offline.
Please add the above explanation to the inlined comment. Otherwise I'm good
with this patch but I'll need an RB from Michael before moving forward.
Do you see this as a bug fix? Is there a point adding this patch to the stable
kernels?
>
> Thanks.
>
> > Thanks,
> > Beleswar
> >
> >> + r5_core->rproc->state = RPROC_DETACHED;
> >> + }
> >> }
> >> return 0;
> >> diff --git a/include/linux/firmware/xlnx-zynqmp.h b/include/linux/
> >> firmware/xlnx-zynqmp.h
> >> index d70dcd462b44..7e27b0f7bf7e 100644
> >> --- a/include/linux/firmware/xlnx-zynqmp.h
> >> +++ b/include/linux/firmware/xlnx-zynqmp.h
> >> @@ -542,6 +542,18 @@ enum pm_gem_config_type {
> >> GEM_CONFIG_FIXED = 2,
> >> };
> >> +/**
> >> + * enum pm_node_status - Device node status provided by xilpm fw
> >> + * @PM_NODE_UNUSED: Device is not used
> >> + * @PM_NODE_RUNNING: Device is power-on and out of reset
> >> + * @PM_NODE_HALT: Device is power-on but in the reset state
> >> + */
> >> +enum pm_node_status {
> >> + PM_NODE_UNUSED = 0,
> >> + PM_NODE_RUNNING = 1,
> >> + PM_NODE_HALT = 12,
> >> +};
> >> +
> >> /**
> >> * struct zynqmp_pm_query_data - PM query data
> >> * @qid: query ID
> >> @@ -630,6 +642,8 @@ int zynqmp_pm_set_rpu_mode(u32 node_id, enum
> >> rpu_oper_mode rpu_mode);
> >> int zynqmp_pm_set_tcm_config(u32 node_id, enum rpu_tcm_comb tcm_mode);
> >> int zynqmp_pm_get_node_status(const u32 node, u32 *const status,
> >> u32 *const requirements, u32 *const usage);
> >> +int zynqmp_pm_get_rpu_node_status(const u32 node, u32 *const status,
> >> + u32 *const requirements, u32 *const usage);
> >> int zynqmp_pm_set_sd_config(u32 node, enum pm_sd_config_type config,
> >> u32 value);
> >> int zynqmp_pm_set_gem_config(u32 node, enum pm_gem_config_type config,
> >> u32 value);
> >> @@ -939,6 +953,13 @@ static inline int zynqmp_pm_get_node_status(const
> >> u32 node, u32 *const status,
> >> return -ENODEV;
> >> }
> >> +static inline int zynqmp_pm_get_rpu_node_status(const u32 node, u32
> >> *const status,
> >> + u32 *const requirements,
> >> + u32 *const usage)
> >> +{
> >> + return -ENODEV;
> >> +}
> >> +
> >> static inline int zynqmp_pm_set_sd_config(u32 node,
> >> enum pm_sd_config_type config,
> >> u32 value)
> >>
> >> base-commit: 6f860d238b44da8ac57be25289b9f4410691c4e2
>
^ permalink raw reply
* [PATCH v2] dt-bindings: arm-smmu: qcom: Add Hawi compatible for Application processor
From: Mukesh Ojha @ 2026-04-27 17:49 UTC (permalink / raw)
To: Will Deacon, Joerg Roedel, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Robin Murphy
Cc: Robin Murphy, linux-arm-kernel, iommu, devicetree, linux-kernel,
Mukesh Ojha
Commit 5e8323c3d528 ("dt-bindings: arm-smmu: qcom: Add compatible for
Hawi SoC") was intended for the APSS SMMU but was mistakenly placed
under the Adreno GPU SMMU section. Since that compatible is also valid
for the Hawi GPU SMMU, keep that commit as-is and add proper
documentation for the Hawi APSS SMMU here.
Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
---
Changes in v2: https://lore.kernel.org/lkml/20260422083329.885979-1-mukesh.ojha@oss.qualcomm.com/
- Not a fix commit after discussion.
- Not removing the earlier commit change instead add one for APSS
SMMU.
Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
index 06fb5c8e7547..07b71b347205 100644
--- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
+++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
@@ -37,6 +37,7 @@ properties:
- enum:
- qcom,eliza-smmu-500
- qcom,glymur-smmu-500
+ - qcom,hawi-smmu-500
- qcom,kaanapali-smmu-500
- qcom,milos-smmu-500
- qcom,qcm2290-smmu-500
--
2.53.0
^ permalink raw reply related
* Re: [PATCH v8 2/4] coresight: cti: encode trigger register index in register offsets
From: Leo Yan @ 2026-04-27 17:48 UTC (permalink / raw)
To: Yingchao Deng
Cc: Suzuki K Poulose, Mike Leach, James Clark, Alexander Shishkin,
coresight, linux-arm-kernel, linux-kernel, linux-arm-msm,
quic_yingdeng, Jinlong Mao, Tingwei Zhang, Jie Gan
In-Reply-To: <20260426-extended-cti-v8-2-23b900a4902f@oss.qualcomm.com>
On Sun, Apr 26, 2026 at 05:44:39PM +0800, Yingchao Deng wrote:
> Introduce a small encoding to carry the register index together with the
> base offset in a single u32, and use a common helper to compute the final
> MMIO address. This refactors register access to be based on the encoded
> (reg, nr) pair, reducing duplicated arithmetic and making it easier to
> support variants that bank or relocate trigger-indexed registers.
>
> Signed-off-by: Yingchao Deng <yingchao.deng@oss.qualcomm.com>
> ---
> drivers/hwtracing/coresight/coresight-cti-core.c | 31 +++++++++++++++--------
> drivers/hwtracing/coresight/coresight-cti-sysfs.c | 4 +--
> drivers/hwtracing/coresight/coresight-cti.h | 16 ++++++++++--
> 3 files changed, 36 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/hwtracing/coresight/coresight-cti-core.c b/drivers/hwtracing/coresight/coresight-cti-core.c
> index 4e7d12bd2d3e..c4cbeb64365b 100644
> --- a/drivers/hwtracing/coresight/coresight-cti-core.c
> +++ b/drivers/hwtracing/coresight/coresight-cti-core.c
> @@ -42,6 +42,14 @@ static DEFINE_MUTEX(ect_mutex);
> #define csdev_to_cti_drvdata(csdev) \
> dev_get_drvdata(csdev->dev.parent)
>
> +static void __iomem *cti_reg_addr(struct cti_drvdata *drvdata, int reg)
> +{
> + u32 offset = CTI_REG_CLR_NR(reg);
> + u32 nr = CTI_REG_GET_NR(reg);
> +
> + return drvdata->base + offset + sizeof(u32) * nr;
> +}
Could you try below change, which is more straightforward?
static void __iomem *__reg_addr(struct cti_drvdata *drvdata, int off,
int index)
{
return drvdata->base + offset + sizeof(u32) * index;
}
#define reg_addr(drvdata, off) \
__reg_addr((drvdata), (off), 0)
#define reg_index_addr(drvdata, off, i) \
__reg_addr((drvdata), (off), (i))
> +
> /* write set of regs to hardware - call with spinlock claimed */
> void cti_write_all_hw_regs(struct cti_drvdata *drvdata)
> {
> @@ -55,16 +63,17 @@ void cti_write_all_hw_regs(struct cti_drvdata *drvdata)
>
> /* write the CTI trigger registers */
> for (i = 0; i < config->nr_trig_max; i++) {
> - writel_relaxed(config->ctiinen[i], drvdata->base + CTIINEN(i));
> + writel_relaxed(config->ctiinen[i],
> + cti_reg_addr(drvdata, CTI_REG_SET_NR(CTIINEN, i)));
writel_relaxed(config->ctiinen[i],
reg_index_addr(drvdata, CTIINEN, i));
> writel_relaxed(config->ctiouten[i],
> - drvdata->base + CTIOUTEN(i));
> + cti_reg_addr(drvdata, CTI_REG_SET_NR(CTIOUTEN, i)));
writel_relaxed(config->ctiouten[i],
reg_index_addr(drvdata, CTIOUTEN, i));
[...]
> +/*
> + * Encode CTI register offset and register index in one u32:
> + * - bits[0:11] : base register offset (0x000 to 0xFFF)
> + * - bits[24:31] : register index (nr)
> + */
> +#define CTI_REG_NR_MASK GENMASK(31, 24)
> +#define CTI_REG_GET_NR(reg) FIELD_GET(CTI_REG_NR_MASK, (reg))
> +#define CTI_REG_SET_NR_CONST(reg, nr) ((reg) | FIELD_PREP_CONST(CTI_REG_NR_MASK, (nr)))
> +#define CTI_REG_SET_NR(reg, nr) ((reg) | FIELD_PREP(CTI_REG_NR_MASK, (nr)))
> +#define CTI_REG_CLR_NR(reg) ((reg) & (~CTI_REG_NR_MASK))
I know this might come from my suggestion, and it is also will be
heavily used in patch 04. We can have strightforward way to
implement this, please drop these macros.
I will reply in patch 04 separately. Sorry my review might cause
extra effort.
Thanks,
Leo
^ permalink raw reply
* Re: [PATCH 3/3] ASoC: pxa: integrate sound/arm/pxa2xx into sound/soc/pxa2xx
From: Andy Shevchenko @ 2026-04-27 17:47 UTC (permalink / raw)
To: Arnd Bergmann
Cc: Arnd Bergmann, Daniel Mack, Haojian Zhuang, Robert Jarzmik,
Jaroslav Kysela, Takashi Iwai, Liam Girdwood, Mark Brown,
Peng Fan, Bartosz Golaszewski, Randy Dunlap, Kuninori Morimoto,
Kees Cook, linux-kernel, linux-arm-kernel, linux-sound
In-Reply-To: <2e77971c-ce4d-4489-9e8a-7766c6576a39@app.fastmail.com>
On Mon, Apr 27, 2026 at 05:58:00PM +0200, Arnd Bergmann wrote:
> On Mon, Apr 27, 2026, at 17:52, Andy Shevchenko wrote:
> > On Mon, Apr 27, 2026 at 04:46:31PM +0200, Arnd Bergmann wrote:
> >
> >> The pxa2xx sound library modules are only used by the ASoC driver since
> >> commit b094de7810f3 ("ASoC: codec: Remove pxa2xx-ac97.c"), so move the
> >> code into the one module that uses as a simpliciation.
> >
> > Is this part of the series that touches UDC? Btw, the UDC one despite on being
> > mentioned as v2 in the changelog still have no versioning in the Subject.
>
> Both patches came out of my work to hide the last users of GPIO numbers
> behind CONFIG_GPIO_LEGACY that I first posted last year. A lot of my
> patches got merged (or replaced with other work) in the meantime,
> so there are only a few drivers and platforms left that won't use
> GPIO descriptors any time soon.
I'm fine with that, I just got patch for UDC and patches 2 and 3 out of 3 of
some series related to ASoC PXA. I was wondering if they are coming from the
same series. Anyway, it's not so important.
...
> > What a lovely change! I would like to give a tag, but see a comment below.
>
> >> +extern int pxa2xx_soc_pcm_new(struct snd_soc_component *component,
> >> + struct snd_soc_pcm_runtime *rtd);
> >
> > Can we kill 'extern' while at it?
>
> I can change that, though I usually try to minimize changes to
> code that I just move around.
I don't see the point to have another patch to drop 'extern' while we anyway
move the code around and all those are being touched.
--
With Best Regards,
Andy Shevchenko
^ permalink raw reply
* Re: [PATCH v7 01/59] perf inject: Fix itrace branch stack synthesis
From: Ian Rogers @ 2026-04-27 17:46 UTC (permalink / raw)
To: Namhyung Kim
Cc: acme, adrian.hunter, james.clark, leo.yan, tmricht,
alice.mei.rogers, dapeng1.mi, linux-arm-kernel, linux-kernel,
linux-perf-users, mingo, peterz
In-Reply-To: <ae7-jS-TeQ-TUXSF@google.com>
On Sun, Apr 26, 2026 at 11:13 PM Namhyung Kim <namhyung@kernel.org> wrote:
>
> Hi Ian,
>
> On Sat, Apr 25, 2026 at 03:48:53PM -0700, Ian Rogers wrote:
> > When using "perf inject --itrace=L" to synthesize branch stacks from
> > AUX data, several issues caused failures:
> >
> > 1. The synthesized samples were delivered without the
> > PERF_SAMPLE_BRANCH_STACK flag if it was not in the original event's
> > sample_type. Fixed by using sample_type | evsel->synth_sample_type
> > in intel_pt_deliver_synth_event.
> >
> > 2. The record layout was misaligned because of inconsistent handling
> > of PERF_SAMPLE_BRANCH_HW_INDEX. Fixed by explicitly writing nr and
> > hw_idx in perf_event__synthesize_sample.
> >
> > 3. Modifying evsel->core.attr.sample_type early in __cmd_inject caused
> > parse failures for subsequent records in the input file. Fixed by
> > moving this modification to just before writing the header.
> >
> > 4. perf_event__repipe_sample was narrowed to only synthesize samples
> > when branch stack injection was requested, and restored the use of
> > perf_inject__cut_auxtrace_sample as a fallback to preserve
> > functionality.
>
> Looks like it does a lot of things in a patch. I think these are
> independent fixes from this series. How about moving this out to a
> separate series?
Doesn't seem unreasonable. We can have the itrace=L fix for `perf
inject` be one patch and then other patches for the issues sashiko has
detected around this problem.
I think `perf inject --itrace=L` being broken is out of scope for
sashiko to detect a regression in the intel-PT testing. Care is needed
to ensure we merge the `perf inject --itrace=L` fixes before these
changes to avoid introducing a known regression.
Thanks,
Ian
> Thanks,
> Namhyung
>
> >
> > Assisted-by: Gemini:gemini-3.1-pro-preview
> > Signed-off-by: Ian Rogers <irogers@google.com>
> > ---
> > Issues fixed in v2:
> >
> > 1. Potential Heap Overflow in perf_event__repipe_sample : Addressed by
> > adding a check that prints an error and returns -EFAULT if the
> > calculated event size exceeds PERF_SAMPLE_MAX_SIZE , as you
> > requested.
> >
> > 2. Header vs Payload Mismatch in __cmd_inject : Addressed by narrowing
> > the condition so that HEADER_BRANCH_STACK is only set in the file
> > header if add_last_branch was true.
> >
> > 3. NULL Pointer Dereference in intel-pt.c : Addressed by updating the
> > condition in intel_pt_do_synth_pebs_sample to fill sample.
> > branch_stack if it was synthesized, even if not in the original
> > sample_type .
> >
> > 4. Unsafe Reads for events lacking HW_INDEX in synthetic-events.c :
> > Addressed by using the perf_sample__branch_entries() macro and
> > checking sample->no_hw_idx .
> >
> > 5. Size mismatch in perf_event__sample_event_size : Addressed by
> > passing branch_sample_type to it and conditioning the hw_idx size on
> > PERF_SAMPLE_BRANCH_HW_INDEX .
> > ---
> > tools/perf/bench/inject-buildid.c | 9 ++--
> > tools/perf/builtin-inject.c | 77 ++++++++++++++++++++++++++++--
> > tools/perf/tests/dlfilter-test.c | 8 +++-
> > tools/perf/tests/sample-parsing.c | 5 +-
> > tools/perf/util/arm-spe.c | 7 ++-
> > tools/perf/util/cs-etm.c | 6 ++-
> > tools/perf/util/intel-bts.c | 3 +-
> > tools/perf/util/intel-pt.c | 13 +++--
> > tools/perf/util/synthetic-events.c | 25 +++++++---
> > tools/perf/util/synthetic-events.h | 6 ++-
> > 10 files changed, 129 insertions(+), 30 deletions(-)
> >
> > diff --git a/tools/perf/bench/inject-buildid.c b/tools/perf/bench/inject-buildid.c
> > index aad572a78d7f..bfd2c5ec9488 100644
> > --- a/tools/perf/bench/inject-buildid.c
> > +++ b/tools/perf/bench/inject-buildid.c
> > @@ -228,9 +228,12 @@ static ssize_t synthesize_sample(struct bench_data *data, struct bench_dso *dso,
> >
> > event.header.type = PERF_RECORD_SAMPLE;
> > event.header.misc = PERF_RECORD_MISC_USER;
> > - event.header.size = perf_event__sample_event_size(&sample, bench_sample_type, 0);
> > -
> > - perf_event__synthesize_sample(&event, bench_sample_type, 0, &sample);
> > + event.header.size = perf_event__sample_event_size(&sample, bench_sample_type,
> > + /*read_format=*/0,
> > + /*branch_sample_type=*/0);
> > + perf_event__synthesize_sample(&event, bench_sample_type,
> > + /*read_format=*/0,
> > + /*branch_sample_type=*/0, &sample);
> >
> > return writen(data->input_pipe[1], &event, event.header.size);
> > }
> > diff --git a/tools/perf/builtin-inject.c b/tools/perf/builtin-inject.c
> > index f174bc69cec4..88c0ef4f5ff1 100644
> > --- a/tools/perf/builtin-inject.c
> > +++ b/tools/perf/builtin-inject.c
> > @@ -375,7 +375,59 @@ static int perf_event__repipe_sample(const struct perf_tool *tool,
> >
> > build_id__mark_dso_hit(tool, event, sample, evsel, machine);
> >
> > - if (inject->itrace_synth_opts.set && sample->aux_sample.size) {
> > + if (inject->itrace_synth_opts.set &&
> > + (inject->itrace_synth_opts.last_branch ||
> > + inject->itrace_synth_opts.add_last_branch)) {
> > + union perf_event *event_copy = (void *)inject->event_copy;
> > + struct branch_stack dummy_bs = { .nr = 0 };
> > + int err;
> > + size_t sz;
> > + u64 orig_type = evsel->core.attr.sample_type;
> > + u64 orig_branch_type = evsel->core.attr.branch_sample_type;
> > +
> > + if (event_copy == NULL) {
> > + inject->event_copy = malloc(PERF_SAMPLE_MAX_SIZE);
> > + if (!inject->event_copy)
> > + return -ENOMEM;
> > +
> > + event_copy = (void *)inject->event_copy;
> > + }
> > +
> > + if (!sample->branch_stack)
> > + sample->branch_stack = &dummy_bs;
> > +
> > + if (inject->itrace_synth_opts.add_last_branch) {
> > + /* Temporarily add in type bits for synthesis. */
> > + evsel->core.attr.sample_type |= PERF_SAMPLE_BRANCH_STACK;
> > + evsel->core.attr.branch_sample_type |= PERF_SAMPLE_BRANCH_HW_INDEX;
> > + evsel->core.attr.sample_type &= ~PERF_SAMPLE_AUX;
> > + }
> > +
> > + sz = perf_event__sample_event_size(sample, evsel->core.attr.sample_type,
> > + evsel->core.attr.read_format,
> > + evsel->core.attr.branch_sample_type);
> > +
> > + if (sz > PERF_SAMPLE_MAX_SIZE) {
> > + pr_err("Sample size %zu exceeds max size %d\n", sz, PERF_SAMPLE_MAX_SIZE);
> > + return -EFAULT;
> > + }
> > +
> > + event_copy->header.type = PERF_RECORD_SAMPLE;
> > + event_copy->header.size = sz;
> > +
> > + err = perf_event__synthesize_sample(event_copy, evsel->core.attr.sample_type,
> > + evsel->core.attr.read_format,
> > + evsel->core.attr.branch_sample_type, sample);
> > +
> > + evsel->core.attr.sample_type = orig_type;
> > + evsel->core.attr.branch_sample_type = orig_branch_type;
> > +
> > + if (err) {
> > + pr_err("Failed to synthesize sample\n");
> > + return err;
> > + }
> > + event = event_copy;
> > + } else if (inject->itrace_synth_opts.set && sample->aux_sample.size) {
> > event = perf_inject__cut_auxtrace_sample(inject, event, sample);
> > if (IS_ERR(event))
> > return PTR_ERR(event);
> > @@ -464,7 +516,8 @@ static int perf_event__convert_sample_callchain(const struct perf_tool *tool,
> > sample_type &= ~(PERF_SAMPLE_STACK_USER | PERF_SAMPLE_REGS_USER);
> >
> > perf_event__synthesize_sample(event_copy, sample_type,
> > - evsel->core.attr.read_format, sample);
> > + evsel->core.attr.read_format,
> > + evsel->core.attr.branch_sample_type, sample);
> > return perf_event__repipe_synth(tool, event_copy);
> > }
> >
> > @@ -1100,7 +1153,8 @@ static int perf_inject__sched_stat(const struct perf_tool *tool,
> > sample_sw.period = sample->period;
> > sample_sw.time = sample->time;
> > perf_event__synthesize_sample(event_sw, evsel->core.attr.sample_type,
> > - evsel->core.attr.read_format, &sample_sw);
> > + evsel->core.attr.read_format,
> > + evsel->core.attr.branch_sample_type, &sample_sw);
> > build_id__mark_dso_hit(tool, event_sw, &sample_sw, evsel, machine);
> > ret = perf_event__repipe(tool, event_sw, &sample_sw, machine);
> > perf_sample__exit(&sample_sw);
> > @@ -2434,12 +2488,25 @@ static int __cmd_inject(struct perf_inject *inject)
> > * synthesized hardware events, so clear the feature flag.
> > */
> > if (inject->itrace_synth_opts.set) {
> > + struct evsel *evsel;
> > +
> > perf_header__clear_feat(&session->header,
> > HEADER_AUXTRACE);
> > - if (inject->itrace_synth_opts.last_branch ||
> > - inject->itrace_synth_opts.add_last_branch)
> > +
> > + evlist__for_each_entry(session->evlist, evsel) {
> > + evsel->core.attr.sample_type &= ~PERF_SAMPLE_AUX;
> > + }
> > +
> > + if (inject->itrace_synth_opts.add_last_branch) {
> > perf_header__set_feat(&session->header,
> > HEADER_BRANCH_STACK);
> > +
> > + evlist__for_each_entry(session->evlist, evsel) {
> > + evsel->core.attr.sample_type |= PERF_SAMPLE_BRANCH_STACK;
> > + evsel->core.attr.branch_sample_type |=
> > + PERF_SAMPLE_BRANCH_HW_INDEX;
> > + }
> > + }
> > }
> >
> > /*
> > diff --git a/tools/perf/tests/dlfilter-test.c b/tools/perf/tests/dlfilter-test.c
> > index e63790c61d53..204663571943 100644
> > --- a/tools/perf/tests/dlfilter-test.c
> > +++ b/tools/perf/tests/dlfilter-test.c
> > @@ -188,8 +188,12 @@ static int write_sample(struct test_data *td, u64 sample_type, u64 id, pid_t pid
> >
> > event->header.type = PERF_RECORD_SAMPLE;
> > event->header.misc = PERF_RECORD_MISC_USER;
> > - event->header.size = perf_event__sample_event_size(&sample, sample_type, 0);
> > - err = perf_event__synthesize_sample(event, sample_type, 0, &sample);
> > + event->header.size = perf_event__sample_event_size(&sample, sample_type,
> > + /*read_format=*/0,
> > + /*branch_sample_type=*/0);
> > + err = perf_event__synthesize_sample(event, sample_type,
> > + /*read_format=*/0,
> > + /*branch_sample_type=*/0, &sample);
> > if (err)
> > return test_result("perf_event__synthesize_sample() failed", TEST_FAIL);
> >
> > diff --git a/tools/perf/tests/sample-parsing.c b/tools/perf/tests/sample-parsing.c
> > index a7327c942ca2..55f0b73ca20e 100644
> > --- a/tools/perf/tests/sample-parsing.c
> > +++ b/tools/perf/tests/sample-parsing.c
> > @@ -310,7 +310,8 @@ static int do_test(u64 sample_type, u64 sample_regs, u64 read_format)
> > sample.read.one.lost = 1;
> > }
> >
> > - sz = perf_event__sample_event_size(&sample, sample_type, read_format);
> > + sz = perf_event__sample_event_size(&sample, sample_type, read_format,
> > + evsel.core.attr.branch_sample_type);
> > bufsz = sz + 4096; /* Add a bit for overrun checking */
> > event = malloc(bufsz);
> > if (!event) {
> > @@ -324,7 +325,7 @@ static int do_test(u64 sample_type, u64 sample_regs, u64 read_format)
> > event->header.size = sz;
> >
> > err = perf_event__synthesize_sample(event, sample_type, read_format,
> > - &sample);
> > + evsel.core.attr.branch_sample_type, &sample);
> > if (err) {
> > pr_debug("%s failed for sample_type %#"PRIx64", error %d\n",
> > "perf_event__synthesize_sample", sample_type, err);
> > diff --git a/tools/perf/util/arm-spe.c b/tools/perf/util/arm-spe.c
> > index e5835042acdf..c4ed9f10e731 100644
> > --- a/tools/perf/util/arm-spe.c
> > +++ b/tools/perf/util/arm-spe.c
> > @@ -484,8 +484,11 @@ static void arm_spe__prep_branch_stack(struct arm_spe_queue *speq)
> >
> > static int arm_spe__inject_event(union perf_event *event, struct perf_sample *sample, u64 type)
> > {
> > - event->header.size = perf_event__sample_event_size(sample, type, 0);
> > - return perf_event__synthesize_sample(event, type, 0, sample);
> > + event->header.type = PERF_RECORD_SAMPLE;
> > + event->header.size = perf_event__sample_event_size(sample, type, /*read_format=*/0,
> > + /*branch_sample_type=*/0);
> > + return perf_event__synthesize_sample(event, type, /*read_format=*/0,
> > + /*branch_sample_type=*/0, sample);
> > }
> >
> > static inline int
> > diff --git a/tools/perf/util/cs-etm.c b/tools/perf/util/cs-etm.c
> > index 8a639d2e51a4..1ebc1a6a5e75 100644
> > --- a/tools/perf/util/cs-etm.c
> > +++ b/tools/perf/util/cs-etm.c
> > @@ -1425,8 +1425,10 @@ static void cs_etm__update_last_branch_rb(struct cs_etm_queue *etmq,
> > static int cs_etm__inject_event(union perf_event *event,
> > struct perf_sample *sample, u64 type)
> > {
> > - event->header.size = perf_event__sample_event_size(sample, type, 0);
> > - return perf_event__synthesize_sample(event, type, 0, sample);
> > + event->header.size = perf_event__sample_event_size(sample, type, /*read_format=*/0,
> > + /*branch_sample_type=*/0);
> > + return perf_event__synthesize_sample(event, type, /*read_format=*/0,
> > + /*branch_sample_type=*/0, sample);
> > }
> >
> >
> > diff --git a/tools/perf/util/intel-bts.c b/tools/perf/util/intel-bts.c
> > index 382255393fb3..0b18ebd13f7c 100644
> > --- a/tools/perf/util/intel-bts.c
> > +++ b/tools/perf/util/intel-bts.c
> > @@ -303,7 +303,8 @@ static int intel_bts_synth_branch_sample(struct intel_bts_queue *btsq,
> > event.sample.header.size = bts->branches_event_size;
> > ret = perf_event__synthesize_sample(&event,
> > bts->branches_sample_type,
> > - 0, &sample);
> > + /*read_format=*/0, /*branch_sample_type=*/0,
> > + &sample);
> > if (ret)
> > return ret;
> > }
> > diff --git a/tools/perf/util/intel-pt.c b/tools/perf/util/intel-pt.c
> > index fc9eec8b54b8..2dce6106c038 100644
> > --- a/tools/perf/util/intel-pt.c
> > +++ b/tools/perf/util/intel-pt.c
> > @@ -1731,8 +1731,12 @@ static void intel_pt_prep_b_sample(struct intel_pt *pt,
> > static int intel_pt_inject_event(union perf_event *event,
> > struct perf_sample *sample, u64 type)
> > {
> > - event->header.size = perf_event__sample_event_size(sample, type, 0);
> > - return perf_event__synthesize_sample(event, type, 0, sample);
> > + event->header.type = PERF_RECORD_SAMPLE;
> > + event->header.size = perf_event__sample_event_size(sample, type, /*read_format=*/0,
> > + /*branch_sample_type=*/0);
> > +
> > + return perf_event__synthesize_sample(event, type, /*read_format=*/0,
> > + /*branch_sample_type=*/0, sample);
> > }
> >
> > static inline int intel_pt_opt_inject(struct intel_pt *pt,
> > @@ -2486,7 +2490,7 @@ static int intel_pt_do_synth_pebs_sample(struct intel_pt_queue *ptq, struct evse
> > intel_pt_add_xmm(intr_regs, pos, items, regs_mask);
> > }
> >
> > - if (sample_type & PERF_SAMPLE_BRANCH_STACK) {
> > + if ((sample_type | evsel->synth_sample_type) & PERF_SAMPLE_BRANCH_STACK) {
> > if (items->mask[INTEL_PT_LBR_0_POS] ||
> > items->mask[INTEL_PT_LBR_1_POS] ||
> > items->mask[INTEL_PT_LBR_2_POS]) {
> > @@ -2557,7 +2561,8 @@ static int intel_pt_do_synth_pebs_sample(struct intel_pt_queue *ptq, struct evse
> > sample.transaction = txn;
> > }
> >
> > - ret = intel_pt_deliver_synth_event(pt, event, &sample, sample_type);
> > + ret = intel_pt_deliver_synth_event(pt, event, &sample,
> > + sample_type | evsel->synth_sample_type);
> > perf_sample__exit(&sample);
> > return ret;
> > }
> > diff --git a/tools/perf/util/synthetic-events.c b/tools/perf/util/synthetic-events.c
> > index 85bee747f4cd..2461f25a4d7d 100644
> > --- a/tools/perf/util/synthetic-events.c
> > +++ b/tools/perf/util/synthetic-events.c
> > @@ -1455,7 +1455,8 @@ int perf_event__synthesize_stat_round(const struct perf_tool *tool,
> > return process(tool, (union perf_event *) &event, NULL, machine);
> > }
> >
> > -size_t perf_event__sample_event_size(const struct perf_sample *sample, u64 type, u64 read_format)
> > +size_t perf_event__sample_event_size(const struct perf_sample *sample, u64 type, u64 read_format,
> > + u64 branch_sample_type)
> > {
> > size_t sz, result = sizeof(struct perf_record_sample);
> >
> > @@ -1515,8 +1516,10 @@ size_t perf_event__sample_event_size(const struct perf_sample *sample, u64 type,
> >
> > if (type & PERF_SAMPLE_BRANCH_STACK) {
> > sz = sample->branch_stack->nr * sizeof(struct branch_entry);
> > - /* nr, hw_idx */
> > - sz += 2 * sizeof(u64);
> > + /* nr */
> > + sz += sizeof(u64);
> > + if (branch_sample_type & PERF_SAMPLE_BRANCH_HW_INDEX)
> > + sz += sizeof(u64);
> > result += sz;
> > }
> >
> > @@ -1605,7 +1608,7 @@ static __u64 *copy_read_group_values(__u64 *array, __u64 read_format,
> > }
> >
> > int perf_event__synthesize_sample(union perf_event *event, u64 type, u64 read_format,
> > - const struct perf_sample *sample)
> > + u64 branch_sample_type, const struct perf_sample *sample)
> > {
> > __u64 *array;
> > size_t sz;
> > @@ -1719,9 +1722,17 @@ int perf_event__synthesize_sample(union perf_event *event, u64 type, u64 read_fo
> >
> > if (type & PERF_SAMPLE_BRANCH_STACK) {
> > sz = sample->branch_stack->nr * sizeof(struct branch_entry);
> > - /* nr, hw_idx */
> > - sz += 2 * sizeof(u64);
> > - memcpy(array, sample->branch_stack, sz);
> > +
> > + *array++ = sample->branch_stack->nr;
> > +
> > + if (branch_sample_type & PERF_SAMPLE_BRANCH_HW_INDEX) {
> > + if (sample->no_hw_idx)
> > + *array++ = 0;
> > + else
> > + *array++ = sample->branch_stack->hw_idx;
> > + }
> > +
> > + memcpy(array, perf_sample__branch_entries((struct perf_sample *)sample), sz);
> > array = (void *)array + sz;
> > }
> >
> > diff --git a/tools/perf/util/synthetic-events.h b/tools/perf/util/synthetic-events.h
> > index b0edad0c3100..8c7f49f9ccf5 100644
> > --- a/tools/perf/util/synthetic-events.h
> > +++ b/tools/perf/util/synthetic-events.h
> > @@ -81,7 +81,8 @@ int perf_event__synthesize_mmap_events(const struct perf_tool *tool, union perf_
> > int perf_event__synthesize_modules(const struct perf_tool *tool, perf_event__handler_t process, struct machine *machine);
> > int perf_event__synthesize_namespaces(const struct perf_tool *tool, union perf_event *event, pid_t pid, pid_t tgid, perf_event__handler_t process, struct machine *machine);
> > int perf_event__synthesize_cgroups(const struct perf_tool *tool, perf_event__handler_t process, struct machine *machine);
> > -int perf_event__synthesize_sample(union perf_event *event, u64 type, u64 read_format, const struct perf_sample *sample);
> > +int perf_event__synthesize_sample(union perf_event *event, u64 type, u64 read_format,
> > + u64 branch_sample_type, const struct perf_sample *sample);
> > int perf_event__synthesize_stat_config(const struct perf_tool *tool, struct perf_stat_config *config, perf_event__handler_t process, struct machine *machine);
> > int perf_event__synthesize_stat_events(struct perf_stat_config *config, const struct perf_tool *tool, struct evlist *evlist, perf_event__handler_t process, bool attrs);
> > int perf_event__synthesize_stat_round(const struct perf_tool *tool, u64 time, u64 type, perf_event__handler_t process, struct machine *machine);
> > @@ -97,7 +98,8 @@ void perf_event__synthesize_final_bpf_metadata(struct perf_session *session,
> >
> > int perf_tool__process_synth_event(const struct perf_tool *tool, union perf_event *event, struct machine *machine, perf_event__handler_t process);
> >
> > -size_t perf_event__sample_event_size(const struct perf_sample *sample, u64 type, u64 read_format);
> > +size_t perf_event__sample_event_size(const struct perf_sample *sample, u64 type,
> > + u64 read_format, u64 branch_sample_type);
> >
> > int __machine__synthesize_threads(struct machine *machine, const struct perf_tool *tool,
> > struct target *target, struct perf_thread_map *threads,
> > --
> > 2.54.0.545.g6539524ca2-goog
> >
^ permalink raw reply
* [PATCH v21 13/13] arm64: dts: qcom: Add psci reboot-modes for talos boards
From: Shivendra Pratap @ 2026-04-27 17:34 UTC (permalink / raw)
To: Sebastian Reichel, Mark Rutland, Lorenzo Pieralisi,
Rafael J. Wysocki, Daniel Lezcano, Christian Loehle, Ulf Hansson,
Lee Jones, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Bjorn Andersson, Konrad Dybcio, Arnd Bergmann, Souvik Chakravarty,
Andy Yan, Matthias Brugger, John Stultz, Moritz Fischer,
Bartosz Golaszewski, Sudeep Holla, Ulf Hansson
Cc: linux-pm, linux-kernel, linux-arm-msm, linux-arm-kernel,
devicetree, Shivendra Pratap, Florian Fainelli,
Krzysztof Kozlowski, Dmitry Baryshkov, Mukesh Ojha, Andre Draszik,
Greg Kroah-Hartman, Kathiravan Thirumoorthy, Srinivas Kandagatla,
Song Xue
In-Reply-To: <20260427-arm-psci-system_reset2-vendor-reboots-v21-0-dcf937775e73@oss.qualcomm.com>
Add PSCI SYSTEM_RESET2 reboot-modes for qcs615-ride, for use by the
psci-reboot-mode driver.
The following modes are defined:
- bootloader: reboot into fastboot mode for fastboot flashing.
- edl: reboot into emergency download mode for image loading via the
Firehose protocol.
Support for these modes is firmware dependent.
Signed-off-by: Song Xue <quic_songxue@quicinc.com>
Signed-off-by: Shivendra Pratap <shivendra.pratap@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/qcs615-ride.dts | 7 +++++++
arch/arm64/boot/dts/qcom/talos.dtsi | 2 +-
2 files changed, 8 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/qcs615-ride.dts b/arch/arm64/boot/dts/qcom/qcs615-ride.dts
index 7e05f873194a0b61e80281104104079b4e0f51a8..8e0c5235f6741b80f975326e2b4268af068c0ae2 100644
--- a/arch/arm64/boot/dts/qcom/qcs615-ride.dts
+++ b/arch/arm64/boot/dts/qcom/qcs615-ride.dts
@@ -498,6 +498,13 @@ &pon_resin {
status = "okay";
};
+&psci {
+ reboot-mode {
+ mode-bootloader = <0x80010001 0x2>;
+ mode-edl = <0x80000000 0x1>;
+ };
+};
+
&qupv3_id_0 {
status = "okay";
};
diff --git a/arch/arm64/boot/dts/qcom/talos.dtsi b/arch/arm64/boot/dts/qcom/talos.dtsi
index ff5afbfce2a4744777829a1938754f02a5f6cb5c..83ba8d3bc40731f54d71b6892045bc1dd15d320d 100644
--- a/arch/arm64/boot/dts/qcom/talos.dtsi
+++ b/arch/arm64/boot/dts/qcom/talos.dtsi
@@ -560,7 +560,7 @@ pmu-a76 {
interrupts = <GIC_PPI 5 IRQ_TYPE_LEVEL_HIGH &ppi_cluster1>;
};
- psci {
+ psci: psci {
compatible = "arm,psci-1.0";
method = "smc";
--
2.34.1
^ permalink raw reply related
* [PATCH v21 12/13] arm64: dts: qcom: Add psci reboot-modes for monaco boards
From: Shivendra Pratap @ 2026-04-27 17:34 UTC (permalink / raw)
To: Sebastian Reichel, Mark Rutland, Lorenzo Pieralisi,
Rafael J. Wysocki, Daniel Lezcano, Christian Loehle, Ulf Hansson,
Lee Jones, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Bjorn Andersson, Konrad Dybcio, Arnd Bergmann, Souvik Chakravarty,
Andy Yan, Matthias Brugger, John Stultz, Moritz Fischer,
Bartosz Golaszewski, Sudeep Holla, Ulf Hansson
Cc: linux-pm, linux-kernel, linux-arm-msm, linux-arm-kernel,
devicetree, Shivendra Pratap, Florian Fainelli,
Krzysztof Kozlowski, Dmitry Baryshkov, Mukesh Ojha, Andre Draszik,
Greg Kroah-Hartman, Kathiravan Thirumoorthy, Srinivas Kandagatla
In-Reply-To: <20260427-arm-psci-system_reset2-vendor-reboots-v21-0-dcf937775e73@oss.qualcomm.com>
Add PSCI SYSTEM_RESET2 reboot-modes for monaco-evk and
qcs8300-ride for use by the psci-reboot-mode driver.
The following modes are defined:
- bootloader: reboot into fastboot mode for fastboot flashing.
- edl: reboot into emergency download mode for image loading via
the Firehose protocol.
Support for these modes is firmware dependent.
Signed-off-by: Shivendra Pratap <shivendra.pratap@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/monaco-evk.dts | 7 +++++++
arch/arm64/boot/dts/qcom/monaco.dtsi | 2 +-
arch/arm64/boot/dts/qcom/qcs8300-ride.dts | 7 +++++++
3 files changed, 15 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/monaco-evk.dts b/arch/arm64/boot/dts/qcom/monaco-evk.dts
index 9d17ef7d2caf130564efc2d0159ac0de39126e80..df668dbf2bc60175c36cabfa310aff625647899e 100644
--- a/arch/arm64/boot/dts/qcom/monaco-evk.dts
+++ b/arch/arm64/boot/dts/qcom/monaco-evk.dts
@@ -661,6 +661,13 @@ usb2_id: usb2-id-state {
};
};
+&psci {
+ reboot-mode {
+ mode-bootloader = <0x80010001 0x2>;
+ mode-edl = <0x80000000 0x1>;
+ };
+};
+
&qup_i2c0_data_clk {
drive-strength = <2>;
bias-pull-up;
diff --git a/arch/arm64/boot/dts/qcom/monaco.dtsi b/arch/arm64/boot/dts/qcom/monaco.dtsi
index 7b1d57460f1e6953acc7fa06d22a1f83ab24edb0..da675f7a8f2d83f3598a6a7ad71a99206213d03c 100644
--- a/arch/arm64/boot/dts/qcom/monaco.dtsi
+++ b/arch/arm64/boot/dts/qcom/monaco.dtsi
@@ -674,7 +674,7 @@ pmu-a78 {
interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>;
};
- psci {
+ psci: psci {
compatible = "arm,psci-1.0";
method = "smc";
diff --git a/arch/arm64/boot/dts/qcom/qcs8300-ride.dts b/arch/arm64/boot/dts/qcom/qcs8300-ride.dts
index e9a8553a8d821ca88a38ac59a78625707850bb5d..3ab5ae3124ed5314f04202b6b247fbbbef665053 100644
--- a/arch/arm64/boot/dts/qcom/qcs8300-ride.dts
+++ b/arch/arm64/boot/dts/qcom/qcs8300-ride.dts
@@ -678,6 +678,13 @@ &mdss_dsi0_out {
remote-endpoint = <&dsi2dp_bridge_in>;
};
+&psci {
+ reboot-mode {
+ mode-bootloader = <0x80010001 0x2>;
+ mode-edl = <0x80000000 0x1>;
+ };
+};
+
&qupv3_id_0 {
status = "okay";
};
--
2.34.1
^ permalink raw reply related
* [PATCH v21 11/13] arm64: dts: qcom: Add psci reboot-modes for lemans boards
From: Shivendra Pratap @ 2026-04-27 17:34 UTC (permalink / raw)
To: Sebastian Reichel, Mark Rutland, Lorenzo Pieralisi,
Rafael J. Wysocki, Daniel Lezcano, Christian Loehle, Ulf Hansson,
Lee Jones, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Bjorn Andersson, Konrad Dybcio, Arnd Bergmann, Souvik Chakravarty,
Andy Yan, Matthias Brugger, John Stultz, Moritz Fischer,
Bartosz Golaszewski, Sudeep Holla, Ulf Hansson
Cc: linux-pm, linux-kernel, linux-arm-msm, linux-arm-kernel,
devicetree, Shivendra Pratap, Florian Fainelli,
Krzysztof Kozlowski, Dmitry Baryshkov, Mukesh Ojha, Andre Draszik,
Greg Kroah-Hartman, Kathiravan Thirumoorthy, Srinivas Kandagatla
In-Reply-To: <20260427-arm-psci-system_reset2-vendor-reboots-v21-0-dcf937775e73@oss.qualcomm.com>
Add PSCI SYSTEM_RESET2 reboot-modes for lemans-evk and
lemans-ride-common(sa8775p-ride, sa8775p-ride-r3, qcs9100-ride,
qcs9100-ride-r3) for use by the psci-reboot-mode driver.
The following modes are defined:
- bootloader: reboot into fastboot mode for fastboot flashing.
- edl: reboot into emergency download mode for image loading via
the Firehose protocol.
Support for these modes is firmware dependent.
Signed-off-by: Shivendra Pratap <shivendra.pratap@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/lemans-evk.dts | 7 +++++++
arch/arm64/boot/dts/qcom/lemans-ride-common.dtsi | 7 +++++++
arch/arm64/boot/dts/qcom/lemans.dtsi | 2 +-
3 files changed, 15 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/lemans-evk.dts b/arch/arm64/boot/dts/qcom/lemans-evk.dts
index c665db6a4595cef441f4bd5ba21fe133652b97c6..8be0f50188839e6301e33a50948a523825fc5a6a 100644
--- a/arch/arm64/boot/dts/qcom/lemans-evk.dts
+++ b/arch/arm64/boot/dts/qcom/lemans-evk.dts
@@ -758,6 +758,13 @@ usb2_id: usb2-id-state {
};
};
+&psci {
+ reboot-mode {
+ mode-bootloader = <0x80010001 0x2>;
+ mode-edl = <0x80000000 0x1>;
+ };
+};
+
&qup_i2c19_default {
drive-strength = <2>;
bias-pull-up;
diff --git a/arch/arm64/boot/dts/qcom/lemans-ride-common.dtsi b/arch/arm64/boot/dts/qcom/lemans-ride-common.dtsi
index 31bd00546d55f4e37f6dd8db58f0adc36336d873..ff01f71fad54dab735e799eeb25ce9d0938031c6 100644
--- a/arch/arm64/boot/dts/qcom/lemans-ride-common.dtsi
+++ b/arch/arm64/boot/dts/qcom/lemans-ride-common.dtsi
@@ -704,6 +704,13 @@ &pmm8654au_3_gpios {
"GNSS_BOOT_MODE";
};
+&psci {
+ reboot-mode {
+ mode-bootloader = <0x80010001 0x2>;
+ mode-edl = <0x80000000 0x1>;
+ };
+};
+
&qupv3_id_1 {
status = "okay";
};
diff --git a/arch/arm64/boot/dts/qcom/lemans.dtsi b/arch/arm64/boot/dts/qcom/lemans.dtsi
index fe6e7635182307386c06b16a547b52e5bc4dc2ea..e3ba8a4b57df02687e1321e3df9f1e9856a8588c 100644
--- a/arch/arm64/boot/dts/qcom/lemans.dtsi
+++ b/arch/arm64/boot/dts/qcom/lemans.dtsi
@@ -559,7 +559,7 @@ pmu {
interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>;
};
- psci {
+ psci: psci {
compatible = "arm,psci-1.0";
method = "smc";
--
2.34.1
^ permalink raw reply related
* [PATCH v21 10/13] arm64: dts: qcom: Add psci reboot-modes for kodiak boards
From: Shivendra Pratap @ 2026-04-27 17:34 UTC (permalink / raw)
To: Sebastian Reichel, Mark Rutland, Lorenzo Pieralisi,
Rafael J. Wysocki, Daniel Lezcano, Christian Loehle, Ulf Hansson,
Lee Jones, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Bjorn Andersson, Konrad Dybcio, Arnd Bergmann, Souvik Chakravarty,
Andy Yan, Matthias Brugger, John Stultz, Moritz Fischer,
Bartosz Golaszewski, Sudeep Holla, Ulf Hansson
Cc: linux-pm, linux-kernel, linux-arm-msm, linux-arm-kernel,
devicetree, Shivendra Pratap, Florian Fainelli,
Krzysztof Kozlowski, Dmitry Baryshkov, Mukesh Ojha, Andre Draszik,
Greg Kroah-Hartman, Kathiravan Thirumoorthy, Srinivas Kandagatla
In-Reply-To: <20260427-arm-psci-system_reset2-vendor-reboots-v21-0-dcf937775e73@oss.qualcomm.com>
Add PSCI SYSTEM_RESET2 reboot-modes for qcm6490-idp and qcs6490-rb3gen2
for use by the psci-reboot-mode driver.
The following modes are defined:
- bootloader: reboot into fastboot mode for fastboot flashing.
- edl: reboot into emergency download mode for image loading via
the Firehose protocol.
Support for these modes is firmware dependent and not available across
all kodiak based boards.
Signed-off-by: Shivendra Pratap <shivendra.pratap@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/kodiak.dtsi | 2 +-
arch/arm64/boot/dts/qcom/qcm6490-idp.dts | 7 +++++++
arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts | 7 +++++++
3 files changed, 15 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/kodiak.dtsi b/arch/arm64/boot/dts/qcom/kodiak.dtsi
index 988ca5f7c8a0ec5196c88881f529236c321ad617..72bcc732ab7b64288e1848edb8a55e2c7fe34f98 100644
--- a/arch/arm64/boot/dts/qcom/kodiak.dtsi
+++ b/arch/arm64/boot/dts/qcom/kodiak.dtsi
@@ -863,7 +863,7 @@ pmu-a78 {
interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>;
};
- psci {
+ psci: psci {
compatible = "arm,psci-1.0";
method = "smc";
diff --git a/arch/arm64/boot/dts/qcom/qcm6490-idp.dts b/arch/arm64/boot/dts/qcom/qcm6490-idp.dts
index bdc02260f902bd37242ba96b90a858ff091e0c80..b7a0b53476395c25f264f2808176588f5943c4c7 100644
--- a/arch/arm64/boot/dts/qcom/qcm6490-idp.dts
+++ b/arch/arm64/boot/dts/qcom/qcm6490-idp.dts
@@ -786,6 +786,13 @@ &qup_uart7_tx {
bias-disable;
};
+&psci {
+ reboot-mode {
+ mode-bootloader = <0x80010001 0x2>;
+ mode-edl = <0x80000000 0x1>;
+ };
+};
+
&qupv3_id_0 {
status = "okay";
};
diff --git a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts
index e393ccf1884afde7816739053d41ca789acfca91..ec614003bd83664b5485940edd366c9ddbd57340 100644
--- a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts
+++ b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts
@@ -1088,6 +1088,13 @@ &pon_resin {
status = "okay";
};
+&psci {
+ reboot-mode {
+ mode-bootloader = <0x80010001 0x2>;
+ mode-edl = <0x80000000 0x1>;
+ };
+};
+
&qup_uart7_cts {
/*
* Configure a bias-bus-hold on CTS to lower power
--
2.34.1
^ permalink raw reply related
* [PATCH v21 09/13] mfd: psci-mfd: Add psci-reboot-mode child cell
From: Shivendra Pratap @ 2026-04-27 17:34 UTC (permalink / raw)
To: Sebastian Reichel, Mark Rutland, Lorenzo Pieralisi,
Rafael J. Wysocki, Daniel Lezcano, Christian Loehle, Ulf Hansson,
Lee Jones, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Bjorn Andersson, Konrad Dybcio, Arnd Bergmann, Souvik Chakravarty,
Andy Yan, Matthias Brugger, John Stultz, Moritz Fischer,
Bartosz Golaszewski, Sudeep Holla, Ulf Hansson
Cc: linux-pm, linux-kernel, linux-arm-msm, linux-arm-kernel,
devicetree, Shivendra Pratap, Florian Fainelli,
Krzysztof Kozlowski, Dmitry Baryshkov, Mukesh Ojha, Andre Draszik,
Greg Kroah-Hartman, Kathiravan Thirumoorthy, Srinivas Kandagatla
In-Reply-To: <20260427-arm-psci-system_reset2-vendor-reboots-v21-0-dcf937775e73@oss.qualcomm.com>
The PSCI "reboot-mode" node does not define a compatible because it is a
configuration of boot-states provided by the underlying firmware. With
the new firmware-node based cells in mfd-core, this node can now be
exposed as a proper child cell.
Add the psci-reboot-mode child cell to the psci-mfd driver and associate
the reboot-mode node as its firmware-node.
Signed-off-by: Shivendra Pratap <shivendra.pratap@oss.qualcomm.com>
---
drivers/mfd/psci-mfd.c | 23 +++++++++++++++++++++--
drivers/power/reset/Kconfig | 2 +-
2 files changed, 22 insertions(+), 3 deletions(-)
diff --git a/drivers/mfd/psci-mfd.c b/drivers/mfd/psci-mfd.c
index 7affd6bb09dd83452664edeccb09290fe4f43186..dbb7c23b57d89765996ac887beda24fec76e8373 100644
--- a/drivers/mfd/psci-mfd.c
+++ b/drivers/mfd/psci-mfd.c
@@ -7,17 +7,36 @@
#include <linux/module.h>
#include <linux/of.h>
#include <linux/platform_device.h>
+#include <linux/string.h>
+
+#define PSCI_REBOOT_MODE_CELL_IDX 1
static const struct mfd_cell psci_cells[] = {
{
.name = "psci-cpuidle-domain",
},
+ {
+ .name = "psci-reboot-mode",
+ },
};
static int psci_mfd_probe(struct platform_device *pdev)
{
- return devm_mfd_add_devices(&pdev->dev, PLATFORM_DEVID_AUTO, psci_cells,
- ARRAY_SIZE(psci_cells), NULL, 0, NULL);
+ struct mfd_cell cells[ARRAY_SIZE(psci_cells)];
+ struct device_node *np = NULL;
+ int ret;
+
+ memcpy(cells, psci_cells, sizeof(cells));
+
+ if (pdev->dev.of_node)
+ np = of_get_child_by_name(pdev->dev.of_node, "reboot-mode");
+ cells[PSCI_REBOOT_MODE_CELL_IDX].fwnode = of_fwnode_handle(np);
+
+ ret = devm_mfd_add_devices(&pdev->dev, PLATFORM_DEVID_AUTO, cells,
+ ARRAY_SIZE(cells), NULL, 0, NULL);
+ of_node_put(np);
+
+ return ret;
}
static const struct of_device_id psci_mfd_of_match[] = {
diff --git a/drivers/power/reset/Kconfig b/drivers/power/reset/Kconfig
index d9d1f768b8691abc3b32f2675519f2ddbaf19b84..79559206d5852ae5eae4c8eb2c390901cea7531c 100644
--- a/drivers/power/reset/Kconfig
+++ b/drivers/power/reset/Kconfig
@@ -350,7 +350,7 @@ config NVMEM_REBOOT_MODE
config PSCI_REBOOT_MODE
bool "PSCI reboot mode driver"
- depends on OF && ARM_PSCI_FW
+ depends on OF && ARM_PSCI_FW && MFD_PSCI
select REBOOT_MODE
help
Say y here will enable PSCI reboot mode driver. This gets
--
2.34.1
^ permalink raw reply related
* [PATCH v21 08/13] mfd: core: Add firmware-node support to MFD cells
From: Shivendra Pratap @ 2026-04-27 17:34 UTC (permalink / raw)
To: Sebastian Reichel, Mark Rutland, Lorenzo Pieralisi,
Rafael J. Wysocki, Daniel Lezcano, Christian Loehle, Ulf Hansson,
Lee Jones, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Bjorn Andersson, Konrad Dybcio, Arnd Bergmann, Souvik Chakravarty,
Andy Yan, Matthias Brugger, John Stultz, Moritz Fischer,
Bartosz Golaszewski, Sudeep Holla, Ulf Hansson
Cc: linux-pm, linux-kernel, linux-arm-msm, linux-arm-kernel,
devicetree, Shivendra Pratap, Florian Fainelli,
Krzysztof Kozlowski, Dmitry Baryshkov, Mukesh Ojha, Andre Draszik,
Greg Kroah-Hartman, Kathiravan Thirumoorthy, Srinivas Kandagatla
In-Reply-To: <20260427-arm-psci-system_reset2-vendor-reboots-v21-0-dcf937775e73@oss.qualcomm.com>
MFD core has no way to register a child device using an explicit firmware
node. This prevents drivers from registering child nodes when those nodes
do not define a compatible string. One such example is the PSCI
"reboot-mode" node, which omits a compatible string as it describes
boot-states provided by the underlying firmware.
Extend struct mfd_cell with an optional fwnode pointer and attach it to the
child device during registration when no firmware node is already assigned.
Signed-off-by: Shivendra Pratap <shivendra.pratap@oss.qualcomm.com>
---
drivers/mfd/mfd-core.c | 10 ++++++++++
include/linux/mfd/core.h | 6 ++++++
2 files changed, 16 insertions(+)
diff --git a/drivers/mfd/mfd-core.c b/drivers/mfd/mfd-core.c
index 7aa32b90cf1eb7fa0a05bf3dc506e60a262c9850..d2153d9b6dd75a5f55d232ba87bd9e4abc93c8be 100644
--- a/drivers/mfd/mfd-core.c
+++ b/drivers/mfd/mfd-core.c
@@ -10,6 +10,7 @@
#include <linux/kernel.h>
#include <linux/platform_device.h>
#include <linux/acpi.h>
+#include <linux/fwnode.h>
#include <linux/list.h>
#include <linux/property.h>
#include <linux/mfd/core.h>
@@ -224,6 +225,15 @@ static int mfd_add_device(struct device *parent, int id,
mfd_acpi_add_device(cell, pdev);
+ /* Use explicit cell fwnode only when no firmware node has been assigned. */
+ if (!pdev->dev.fwnode && cell->fwnode) {
+ /* Get a refcount if fwnode is a device-tree node. */
+ if (is_of_node(cell->fwnode))
+ of_node_get(to_of_node(cell->fwnode));
+
+ device_set_node(&pdev->dev, cell->fwnode);
+ }
+
if (cell->pdata_size) {
ret = platform_device_add_data(pdev,
cell->platform_data, cell->pdata_size);
diff --git a/include/linux/mfd/core.h b/include/linux/mfd/core.h
index faeea7abd688f223fb0b31cde0a9b69dfe2a61ff..8a461b43fac360672a489ffffeb8d0e1acd193ac 100644
--- a/include/linux/mfd/core.h
+++ b/include/linux/mfd/core.h
@@ -50,6 +50,7 @@
#define MFD_DEP_LEVEL_HIGH 1
struct irq_domain;
+struct fwnode_handle;
struct software_node;
/* Matches ACPI PNP id, either _HID or _CID, or ACPI _ADR */
@@ -80,6 +81,11 @@ struct mfd_cell {
/* Software node for the device. */
const struct software_node *swnode;
+ /*
+ * Firmware node for the device.
+ * Caller owns the pointer; mfd-core takes an OF node reference.
+ */
+ struct fwnode_handle *fwnode;
/*
* Device Tree compatible string
--
2.34.1
^ permalink raw reply related
* [PATCH v21 07/13] power: reset: Add psci-reboot-mode driver
From: Shivendra Pratap @ 2026-04-27 17:34 UTC (permalink / raw)
To: Sebastian Reichel, Mark Rutland, Lorenzo Pieralisi,
Rafael J. Wysocki, Daniel Lezcano, Christian Loehle, Ulf Hansson,
Lee Jones, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Bjorn Andersson, Konrad Dybcio, Arnd Bergmann, Souvik Chakravarty,
Andy Yan, Matthias Brugger, John Stultz, Moritz Fischer,
Bartosz Golaszewski, Sudeep Holla, Ulf Hansson
Cc: linux-pm, linux-kernel, linux-arm-msm, linux-arm-kernel,
devicetree, Shivendra Pratap, Florian Fainelli,
Krzysztof Kozlowski, Dmitry Baryshkov, Mukesh Ojha, Andre Draszik,
Greg Kroah-Hartman, Kathiravan Thirumoorthy, Srinivas Kandagatla
In-Reply-To: <20260427-arm-psci-system_reset2-vendor-reboots-v21-0-dcf937775e73@oss.qualcomm.com>
PSCI supports different types of resets like SYSTEM_RESET, SYSTEM_RESET2
ARCH WARM reset and SYSTEM_RESET2 vendor-specific resets. Currently
there is no common driver that handles all supported psci resets at one
place. Additionally, there is no common mechanism to issue the supported
psci resets from userspace.
Add a psci-reboot-mode driver, and define two types of PSCI resets,
predefined-resets and vendor-specific resets. Predefined-resets are
defined by psci driver and vendor-specific resets are defined by SoC
vendors, under the psci:reboot-mode node of SoC device tree.
Register the driver with the reboot-mode framework to interface these
resets to userspace. When userspace initiates a supported command, pass
the reset arguments to the PSCI driver to enable command-based reset.
This change allows userspace to issue supported PSCI reset commands
using the standard reboot system calls while enabling SoC vendors to
define their specific resets for PSCI.
Signed-off-by: Shivendra Pratap <shivendra.pratap@oss.qualcomm.com>
---
MAINTAINERS | 1 +
drivers/power/reset/Kconfig | 10 +++
drivers/power/reset/Makefile | 1 +
drivers/power/reset/psci-reboot-mode.c | 109 +++++++++++++++++++++++++++++++++
4 files changed, 121 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 333b01fa00b8fbd15e6f31a6b9af47600411624e..8cebc2c7e161c8a226802a4102756b4ed6034395 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -21240,6 +21240,7 @@ S: Maintained
F: Documentation/devicetree/bindings/arm/psci.yaml
F: drivers/firmware/psci/
F: drivers/mfd/psci-mfd.c
+F: drivers/power/reset/psci-reboot-mode.c
F: include/linux/psci.h
F: include/uapi/linux/psci.h
diff --git a/drivers/power/reset/Kconfig b/drivers/power/reset/Kconfig
index 124afb99febe92450b6ae322aeed3b63fa2070df..d9d1f768b8691abc3b32f2675519f2ddbaf19b84 100644
--- a/drivers/power/reset/Kconfig
+++ b/drivers/power/reset/Kconfig
@@ -348,6 +348,16 @@ config NVMEM_REBOOT_MODE
then the bootloader can read it and take different
action according to the mode.
+config PSCI_REBOOT_MODE
+ bool "PSCI reboot mode driver"
+ depends on OF && ARM_PSCI_FW
+ select REBOOT_MODE
+ help
+ Say y here will enable PSCI reboot mode driver. This gets
+ the PSCI reboot mode arguments and passes them to psci
+ driver. psci driver uses these arguments for issuing
+ device reset into different boot states.
+
config POWER_MLXBF
tristate "Mellanox BlueField power handling driver"
depends on (GPIO_MLXBF2 || GPIO_MLXBF3) && ACPI
diff --git a/drivers/power/reset/Makefile b/drivers/power/reset/Makefile
index d7ae97241a838fe1b536b2f911868e7590d12e3b..02948622fe3d00e165f941108ab92ecb66b0f0e8 100644
--- a/drivers/power/reset/Makefile
+++ b/drivers/power/reset/Makefile
@@ -40,5 +40,6 @@ obj-$(CONFIG_REBOOT_MODE) += reboot-mode.o
obj-$(CONFIG_SYSCON_REBOOT_MODE) += syscon-reboot-mode.o
obj-$(CONFIG_POWER_RESET_SC27XX) += sc27xx-poweroff.o
obj-$(CONFIG_NVMEM_REBOOT_MODE) += nvmem-reboot-mode.o
+obj-$(CONFIG_PSCI_REBOOT_MODE) += psci-reboot-mode.o
obj-$(CONFIG_POWER_MLXBF) += pwr-mlxbf.o
obj-$(CONFIG_POWER_RESET_QEMU_VIRT_CTRL) += qemu-virt-ctrl.o
diff --git a/drivers/power/reset/psci-reboot-mode.c b/drivers/power/reset/psci-reboot-mode.c
new file mode 100644
index 0000000000000000000000000000000000000000..29f53d2f50da8e34e714adef9507d340bc4130e2
--- /dev/null
+++ b/drivers/power/reset/psci-reboot-mode.c
@@ -0,0 +1,109 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
+ */
+
+#include <linux/device.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/psci.h>
+#include <linux/reboot.h>
+#include <linux/reboot-mode.h>
+#include <linux/types.h>
+
+/* Predefined modes use reset_type = 0 and cookie in magic[63:32]. */
+#define PSCI_PREDEF_MAGIC(cookie) ((cookie) * BIT_ULL(32))
+
+struct psci_predefined_reset {
+ const char *mode;
+ u64 magic;
+};
+
+static const struct psci_predefined_reset psci_resets[] = {
+ {
+ .mode = "psci-system-reset",
+ .magic = PSCI_PREDEF_MAGIC(PSCI_RESET_TYPE_SYSTEM_RESET),
+ },
+ {
+ .mode = "psci-system-reset2-arch-warm-reset",
+ .magic = PSCI_PREDEF_MAGIC(PSCI_RESET_TYPE_SYSTEM_RESET2_ARCH_WARM),
+ },
+};
+
+static int psci_reboot_mode_add_predefined_mode(struct device *dev,
+ struct reboot_mode_driver *reboot,
+ const struct psci_predefined_reset *predef)
+{
+ struct mode_info *info;
+
+ info = devm_kzalloc(dev, sizeof(*info), GFP_KERNEL);
+ if (!info)
+ return -ENOMEM;
+
+ INIT_LIST_HEAD(&info->list);
+ info->mode = predef->mode;
+ info->magic = predef->magic;
+ list_add_tail(&info->list, &reboot->predefined_modes);
+
+ return 0;
+}
+
+static int psci_reboot_mode_set_predefined_modes(struct device *dev,
+ struct reboot_mode_driver *reboot)
+{
+ int ret;
+
+ INIT_LIST_HEAD(&reboot->predefined_modes);
+
+ /* Always register psci-system-reset. */
+ ret = psci_reboot_mode_add_predefined_mode(dev, reboot, &psci_resets[0]);
+ if (ret)
+ return ret;
+
+ /* Register arch warm reset only if SYSTEM_RESET2 is supported. */
+ if (!psci_has_system_reset2_support())
+ return 0;
+
+ return psci_reboot_mode_add_predefined_mode(dev, reboot, &psci_resets[1]);
+}
+
+/*
+ * Pass the encoded magic to psci_set_reset_cmd.
+ * magic is encoded as reset_type (low 32 bits) and cookie (high 32 bits).
+ */
+static int psci_reboot_mode_write(struct reboot_mode_driver *reboot, u64 magic)
+{
+ psci_set_reset_cmd(magic);
+ return 0;
+}
+
+static int psci_reboot_mode_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct reboot_mode_driver *reboot;
+ int ret;
+
+ reboot = devm_kzalloc(dev, sizeof(*reboot), GFP_KERNEL);
+ if (!reboot)
+ return -ENOMEM;
+
+ ret = psci_reboot_mode_set_predefined_modes(dev, reboot);
+ if (ret)
+ return ret;
+
+ reboot->write = psci_reboot_mode_write;
+ reboot->dev = dev;
+
+ return devm_reboot_mode_register(dev, reboot);
+}
+
+static struct platform_driver psci_reboot_mode_driver = {
+ .probe = psci_reboot_mode_probe,
+ .driver = {
+ .name = "psci-reboot-mode",
+ },
+};
+
+module_platform_driver(psci_reboot_mode_driver);
+
+MODULE_LICENSE("GPL");
--
2.34.1
^ permalink raw reply related
* [PATCH v21 06/13] dt-bindings: arm: Document reboot mode magic
From: Shivendra Pratap @ 2026-04-27 17:34 UTC (permalink / raw)
To: Sebastian Reichel, Mark Rutland, Lorenzo Pieralisi,
Rafael J. Wysocki, Daniel Lezcano, Christian Loehle, Ulf Hansson,
Lee Jones, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Bjorn Andersson, Konrad Dybcio, Arnd Bergmann, Souvik Chakravarty,
Andy Yan, Matthias Brugger, John Stultz, Moritz Fischer,
Bartosz Golaszewski, Sudeep Holla, Ulf Hansson
Cc: linux-pm, linux-kernel, linux-arm-msm, linux-arm-kernel,
devicetree, Shivendra Pratap, Florian Fainelli,
Krzysztof Kozlowski, Dmitry Baryshkov, Mukesh Ojha, Andre Draszik,
Greg Kroah-Hartman, Kathiravan Thirumoorthy, Srinivas Kandagatla
In-Reply-To: <20260427-arm-psci-system_reset2-vendor-reboots-v21-0-dcf937775e73@oss.qualcomm.com>
Add bindings to describe vendor-specific reboot modes. Values here
correspond to valid parameters to vendor-specific reset types in PSCI
SYSTEM_RESET2 call.
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Shivendra Pratap <shivendra.pratap@oss.qualcomm.com>
---
Documentation/devicetree/bindings/arm/psci.yaml | 42 +++++++++++++++++++++++++
1 file changed, 42 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/psci.yaml b/Documentation/devicetree/bindings/arm/psci.yaml
index 6e2e0c551841111fbb0aa8c0951dca411b94035c..5fdcbf331ea5620363638feb6f8105427a87c00f 100644
--- a/Documentation/devicetree/bindings/arm/psci.yaml
+++ b/Documentation/devicetree/bindings/arm/psci.yaml
@@ -98,6 +98,26 @@ properties:
[1] Kernel documentation - ARM idle states bindings
Documentation/devicetree/bindings/cpu/idle-states.yaml
+ reboot-mode:
+ type: object
+ $ref: /schemas/power/reset/reboot-mode.yaml#
+ unevaluatedProperties: false
+ properties:
+ # "mode-normal" is just SYSTEM_RESET
+ mode-normal: false
+ patternProperties:
+ "^mode-.*$":
+ minItems: 1
+ maxItems: 2
+ description: |
+ Describes a vendor-specific reset type. The string after "mode-"
+ maps a reboot mode to the parameters in the PSCI SYSTEM_RESET2 call.
+
+ Parameters are named mode-xxx = <type[, cookie]>, where xxx is the
+ name of the magic reboot mode, type corresponds to the reset_type
+ and the values should be provided as per the PSCI SYSTEM_RESET2
+ specs. The cookie value is optional and defaulted to zero.
+
patternProperties:
"^power-domain-":
$ref: /schemas/power/power-domain.yaml#
@@ -137,6 +157,15 @@ allOf:
required:
- cpu_off
- cpu_on
+ - if:
+ not:
+ properties:
+ compatible:
+ contains:
+ const: arm,psci-1.0
+ then:
+ properties:
+ reboot-mode: false
additionalProperties: false
@@ -260,4 +289,17 @@ examples:
domain-idle-states = <&cluster_ret>, <&cluster_pwrdn>;
};
};
+
+ - |+
+
+ // Case 5: SYSTEM_RESET2 vendor resets
+ psci {
+ compatible = "arm,psci-1.0";
+ method = "smc";
+
+ reboot-mode {
+ mode-edl = <0x80000000 1>;
+ mode-bootloader = <0x80010001 2>;
+ };
+ };
...
--
2.34.1
^ permalink raw reply related
* [PATCH v21 05/13] mfd: psci-mfd: Add PSCI MFD driver for cpuidle-psci-domain cell
From: Shivendra Pratap @ 2026-04-27 17:34 UTC (permalink / raw)
To: Sebastian Reichel, Mark Rutland, Lorenzo Pieralisi,
Rafael J. Wysocki, Daniel Lezcano, Christian Loehle, Ulf Hansson,
Lee Jones, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Bjorn Andersson, Konrad Dybcio, Arnd Bergmann, Souvik Chakravarty,
Andy Yan, Matthias Brugger, John Stultz, Moritz Fischer,
Bartosz Golaszewski, Sudeep Holla, Ulf Hansson
Cc: linux-pm, linux-kernel, linux-arm-msm, linux-arm-kernel,
devicetree, Shivendra Pratap, Florian Fainelli,
Krzysztof Kozlowski, Dmitry Baryshkov, Mukesh Ojha, Andre Draszik,
Greg Kroah-Hartman, Kathiravan Thirumoorthy, Srinivas Kandagatla
In-Reply-To: <20260427-arm-psci-system_reset2-vendor-reboots-v21-0-dcf937775e73@oss.qualcomm.com>
PSCI has multiple kernel consumers, such as cpuidle-psci-domain.
Currently, both the PSCI core driver and cpuidle-psci-domain bind
directly to the same PSCI node "arm,psci-1.0". Additional consumers, if
introduced, would also need to bind in the same way, leading to several
drivers attached to a single device node.
Introduce a PSCI MFD driver that binds to "arm,psci-1.0" and registers
PSCI child cells. As the first user, register cpuidle-psci-domain as a
child cell.
Update cpuidle-psci-domain to probe as an MFD child and use the parent
PSCI node for power-domain traversal.
Signed-off-by: Shivendra Pratap <shivendra.pratap@oss.qualcomm.com>
---
MAINTAINERS | 1 +
drivers/cpuidle/Kconfig.arm | 1 +
drivers/cpuidle/cpuidle-psci-domain.c | 9 +-------
drivers/mfd/Kconfig | 10 ++++++++
drivers/mfd/Makefile | 2 ++
drivers/mfd/psci-mfd.c | 43 +++++++++++++++++++++++++++++++++++
6 files changed, 58 insertions(+), 8 deletions(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index c871acf2179ce16c80b404027e6b969c7787a6bb..333b01fa00b8fbd15e6f31a6b9af47600411624e 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -21239,6 +21239,7 @@ L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Maintained
F: Documentation/devicetree/bindings/arm/psci.yaml
F: drivers/firmware/psci/
+F: drivers/mfd/psci-mfd.c
F: include/linux/psci.h
F: include/uapi/linux/psci.h
diff --git a/drivers/cpuidle/Kconfig.arm b/drivers/cpuidle/Kconfig.arm
index a1ee475d180dacab245510674514811aec337ad3..1a1316d11e0a2e4f61801586229f5104e2435865 100644
--- a/drivers/cpuidle/Kconfig.arm
+++ b/drivers/cpuidle/Kconfig.arm
@@ -36,6 +36,7 @@ config ARM_PSCI_CPUIDLE_DOMAIN
bool "PSCI CPU idle Domain"
depends on ARM_PSCI_CPUIDLE
depends on PM_GENERIC_DOMAINS_OF
+ depends on MFD_PSCI
select DT_IDLE_GENPD
default y
help
diff --git a/drivers/cpuidle/cpuidle-psci-domain.c b/drivers/cpuidle/cpuidle-psci-domain.c
index b9e4ad7d43a3310a76ce62018dff0af1488e33d2..a2d01810f2957abdfa52ae66503dc0cbb205f163 100644
--- a/drivers/cpuidle/cpuidle-psci-domain.c
+++ b/drivers/cpuidle/cpuidle-psci-domain.c
@@ -17,7 +17,6 @@
#include <linux/pm_runtime.h>
#include <linux/psci.h>
#include <linux/slab.h>
-#include <linux/string.h>
#include "cpuidle-psci.h"
#include "dt_idle_genpd.h"
@@ -122,14 +121,9 @@ static void psci_pd_remove(void)
}
}
-static const struct of_device_id psci_of_match[] = {
- { .compatible = "arm,psci-1.0" },
- {}
-};
-
static int psci_cpuidle_domain_probe(struct platform_device *pdev)
{
- struct device_node *np = pdev->dev.of_node;
+ struct device_node *np = pdev->dev.parent->of_node;
bool use_osi = psci_has_osi_support();
int ret = 0, pd_count = 0;
@@ -181,7 +175,6 @@ static struct platform_driver psci_cpuidle_domain_driver = {
.probe = psci_cpuidle_domain_probe,
.driver = {
.name = "psci-cpuidle-domain",
- .of_match_table = psci_of_match,
},
};
diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index 7192c9d1d268e93d1557ca6519ac96056e37e221..75ea5b47315cedfd1153899eef28614a165a14f5 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -2376,6 +2376,16 @@ config MFD_KHADAS_MCU
additional drivers must be enabled in order to use the functionality
of the device.
+config MFD_PSCI
+ bool "PSCI MFD for psci child cells"
+ depends on ARM_PSCI_FW
+ select MFD_CORE
+ help
+ PSCI MFD registers PSCI child cells and exposes them as
+ platform devices. Child drivers are probed only if enabled in the
+ kernel configuration. Select this option whenever a supported PSCI
+ child driver is selected.
+
config MFD_ACER_A500_EC
tristate "Support for Acer Iconia Tab A500 Embedded Controller"
depends on I2C
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
index e75e8045c28afae975ac61d282b3b85af5440119..36e872b11b995135a04ca24c33fd3a4d08e4f49a 100644
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -24,6 +24,8 @@ obj-$(CONFIG_MFD_EXYNOS_LPASS) += exynos-lpass.o
obj-$(CONFIG_MFD_GATEWORKS_GSC) += gateworks-gsc.o
obj-$(CONFIG_MFD_MACSMC) += macsmc.o
+obj-$(CONFIG_MFD_PSCI) += psci-mfd.o
+
obj-$(CONFIG_MFD_TI_LP873X) += lp873x.o
obj-$(CONFIG_MFD_TI_LP87565) += lp87565.o
obj-$(CONFIG_MFD_TI_AM335X_TSCADC) += ti_am335x_tscadc.o
diff --git a/drivers/mfd/psci-mfd.c b/drivers/mfd/psci-mfd.c
new file mode 100644
index 0000000000000000000000000000000000000000..7affd6bb09dd83452664edeccb09290fe4f43186
--- /dev/null
+++ b/drivers/mfd/psci-mfd.c
@@ -0,0 +1,43 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
+ */
+
+#include <linux/mfd/core.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+
+static const struct mfd_cell psci_cells[] = {
+ {
+ .name = "psci-cpuidle-domain",
+ },
+};
+
+static int psci_mfd_probe(struct platform_device *pdev)
+{
+ return devm_mfd_add_devices(&pdev->dev, PLATFORM_DEVID_AUTO, psci_cells,
+ ARRAY_SIZE(psci_cells), NULL, 0, NULL);
+}
+
+static const struct of_device_id psci_mfd_of_match[] = {
+ { .compatible = "arm,psci-1.0" },
+ { }
+};
+
+static struct platform_driver psci_mfd_driver = {
+ .probe = psci_mfd_probe,
+ .driver = {
+ .name = "psci-mfd",
+ .of_match_table = psci_mfd_of_match,
+ },
+};
+
+static int __init psci_mfd_init(void)
+{
+ return platform_driver_register(&psci_mfd_driver);
+}
+
+core_initcall(psci_mfd_init);
+
+MODULE_LICENSE("GPL");
--
2.34.1
^ permalink raw reply related
* [PATCH v21 04/13] firmware: psci: Introduce command-based with magic
From: Shivendra Pratap @ 2026-04-27 17:34 UTC (permalink / raw)
To: Sebastian Reichel, Mark Rutland, Lorenzo Pieralisi,
Rafael J. Wysocki, Daniel Lezcano, Christian Loehle, Ulf Hansson,
Lee Jones, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Bjorn Andersson, Konrad Dybcio, Arnd Bergmann, Souvik Chakravarty,
Andy Yan, Matthias Brugger, John Stultz, Moritz Fischer,
Bartosz Golaszewski, Sudeep Holla, Ulf Hansson
Cc: linux-pm, linux-kernel, linux-arm-msm, linux-arm-kernel,
devicetree, Shivendra Pratap, Florian Fainelli,
Krzysztof Kozlowski, Dmitry Baryshkov, Mukesh Ojha, Andre Draszik,
Greg Kroah-Hartman, Kathiravan Thirumoorthy, Srinivas Kandagatla
In-Reply-To: <20260427-arm-psci-system_reset2-vendor-reboots-v21-0-dcf937775e73@oss.qualcomm.com>
PSCI currently supports only two resets - SYSTEM_RESET and SYSTEM_RESET2
ARCH WARM reset. The reset patch is selected based on the Linux
reboot_mode variable. The PSCI specification now includes SYSTEM_RESET2
for vendor-specific resets but there's no mechanism to issue these
through psci_sys_reset().
Add a command-based reset mechanism that allows external drivers to set
the psci reset command via a exported psci_set_reset_cmd() function.
Define predefined reset_types - PSCI_RESET_TYPE_SYSTEM_RESET to map to
SYSTEM_RESET, and PSCI_RESET_TYPE_SYSTEM_RESET2_ARCH_WARM to map to
SYSTEM_RESET2 arch warm reset. Interpret zero cmd_reset_type, for
predefined reset-command selection via cmd_cookie. For non-zero
cmd_reset_type, check for valid vendor_reset_type and set the psci
reset_command and cookie accordingly.
Disable PSCI command-based reset by default and treat invalid reset
commands as no‑op. psci_sys_reset() follows its original flow based on
reboot_mode until a reset command is explicitly set by
psci_set_reset_cmd(). In the device reset flow, psci_set_reset_cmd() is
called in reboot_notifier phase and the device reset happens in
psci_sys_reset() which is called later in the restart_notifier phase. If
a kernel panic occurs in between these two phases, the reboot should
take its original flow based on the value of reboot_mode. Disable the
command-based reset in such case.
Signed-off-by: Shivendra Pratap <shivendra.pratap@oss.qualcomm.com>
---
drivers/firmware/psci/psci.c | 75 ++++++++++++++++++++++++++++++++++++++++++--
include/linux/psci.h | 19 +++++++++++
2 files changed, 92 insertions(+), 2 deletions(-)
diff --git a/drivers/firmware/psci/psci.c b/drivers/firmware/psci/psci.c
index 38ca190d4a22d6e7e0f06420e8478a2b0ec2fe6f..cb37c39e2b4b1d99f0080f6a5cd6c92a070beda8 100644
--- a/drivers/firmware/psci/psci.c
+++ b/drivers/firmware/psci/psci.c
@@ -51,6 +51,16 @@ static int resident_cpu = -1;
struct psci_operations psci_ops;
static enum arm_smccc_conduit psci_conduit = SMCCC_CONDUIT_NONE;
+/*
+ * Encoded reset command:
+ * bits[63:32] = cookie
+ * bits[31:0] = reset_type
+ */
+static u64 reset_cmd;
+
+#define PSCI_RESET_TYPE(reset_cmd) ((u32)(reset_cmd))
+#define PSCI_RESET_COOKIE(reset_cmd) ((u32)((reset_cmd) >> 32))
+
bool psci_tos_resident_on(int cpu)
{
return cpu == resident_cpu;
@@ -80,6 +90,35 @@ static u32 psci_cpu_suspend_feature;
static bool psci_system_reset2_supported;
static bool psci_system_off2_hibernate_supported;
+static u32 psci_fn_from_cookie(u32 cookie)
+{
+ switch (cookie) {
+ case PSCI_RESET_TYPE_SYSTEM_RESET2_ARCH_WARM:
+ if (psci_system_reset2_supported)
+ return PSCI_FN_NATIVE(1_1, SYSTEM_RESET2);
+ return 0;
+ case PSCI_RESET_TYPE_SYSTEM_RESET:
+ return PSCI_0_2_FN_SYSTEM_RESET;
+ default:
+ return 0;
+ }
+}
+
+/** psci_set_reset_cmd() - Configure reset request for psci_sys_reset()
+ * @psci_reset_cmd: reset command encoded as cookie[63:32] | reset_type[31:0]
+ *
+ * Save reset command.
+ */
+void psci_set_reset_cmd(u64 psci_reset_cmd)
+{
+ reset_cmd = psci_reset_cmd;
+}
+
+bool psci_has_system_reset2_support(void)
+{
+ return psci_system_reset2_supported;
+}
+
static inline bool psci_has_ext_power_state(void)
{
return psci_cpu_suspend_feature &
@@ -306,8 +345,24 @@ static int get_set_conduit_method(const struct device_node *np)
return 0;
}
-static int psci_sys_reset(struct notifier_block *nb, unsigned long action,
- void *data)
+static void psci_handle_reset_cmd(void)
+{
+ u32 psci_sys_reset_fn;
+
+ if ((reset_cmd & BIT_ULL(31)) && psci_system_reset2_supported) {
+ /* PSCI SYSTEM_RESET2 Vendor-specific reset */
+ invoke_psci_fn(PSCI_FN_NATIVE(1_1, SYSTEM_RESET2),
+ PSCI_RESET_TYPE(reset_cmd),
+ PSCI_RESET_COOKIE(reset_cmd), 0);
+ } else {
+ /* cookie part of the reset_cmd decides ARCH WARM RESET vs SYSTEM_RESET */
+ psci_sys_reset_fn = psci_fn_from_cookie(PSCI_RESET_COOKIE(reset_cmd));
+ if (!PSCI_RESET_TYPE(reset_cmd) && psci_sys_reset_fn)
+ invoke_psci_fn(psci_sys_reset_fn, 0, 0, 0);
+ }
+}
+
+static void psci_handle_reboot_mode(void)
{
if ((reboot_mode == REBOOT_WARM || reboot_mode == REBOOT_SOFT) &&
psci_system_reset2_supported) {
@@ -320,6 +375,22 @@ static int psci_sys_reset(struct notifier_block *nb, unsigned long action,
} else {
invoke_psci_fn(PSCI_0_2_FN_SYSTEM_RESET, 0, 0, 0);
}
+}
+
+static int psci_sys_reset(struct notifier_block *nb, unsigned long action,
+ void *data)
+{
+ /*
+ * Command-based resets are configured at the reboot_notifier phase.
+ * If a kernel panic occurs between the reboot_notifier and this final
+ * reset, ignore the command-based reset and let reboot_mode drive the
+ * reset flow.
+ * If reset_cmd is zero, there is no command to handle.
+ */
+ if (reset_cmd && !panic_in_progress())
+ psci_handle_reset_cmd();
+ else
+ psci_handle_reboot_mode();
return NOTIFY_DONE;
}
diff --git a/include/linux/psci.h b/include/linux/psci.h
index 4ca0060a3fc42ba1ca751c7862fb4ad8dda35a4c..c2458291a3faf5ac89b1528dae2c9b805a2dd075 100644
--- a/include/linux/psci.h
+++ b/include/linux/psci.h
@@ -21,6 +21,21 @@ bool psci_power_state_is_valid(u32 state);
int psci_set_osi_mode(bool enable);
bool psci_has_osi_support(void);
+/**
+ * enum psci_reset_type - PSCI_RESET_TYPE for SYSTEM_RESET.
+ * @PSCI_RESET_TYPE_SYSTEM_RESET: Standard SYSTEM_RESET command.
+ * @PSCI_RESET_TYPE_SYSTEM_RESET2_ARCH_WARM: SYSTEM_RESET2 architectural warm reset.
+ *
+ * These enum values map PSCI_RESET_TYPE_SYSTEM_* constants to reset strings
+ * issued from user space. When user space requests a reset, the cookie
+ * carries one of these values, and the PSCI reset path translates it into
+ * the appropriate PSCI system reset call.
+ */
+enum psci_reset_type {
+ PSCI_RESET_TYPE_SYSTEM_RESET = 1,
+ PSCI_RESET_TYPE_SYSTEM_RESET2_ARCH_WARM,
+};
+
struct psci_operations {
u32 (*get_version)(void);
int (*cpu_suspend)(u32 state, unsigned long entry_point);
@@ -45,8 +60,12 @@ struct psci_0_1_function_ids get_psci_0_1_function_ids(void);
#if defined(CONFIG_ARM_PSCI_FW)
int __init psci_dt_init(void);
+void psci_set_reset_cmd(u64 psci_reset_cmd);
+bool psci_has_system_reset2_support(void);
#else
static inline int psci_dt_init(void) { return 0; }
+static inline void psci_set_reset_cmd(u64 psci_reset_cmd) { }
+static inline bool psci_has_system_reset2_support(void) { return false; }
#endif
#if defined(CONFIG_ARM_PSCI_FW) && defined(CONFIG_ACPI)
--
2.34.1
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