* [PATCH 1/4] dt-bindings: arm: sunxi: add Radxa Cubie A7S
From: Enzo Adriano via B4 Relay @ 2026-06-13 9:42 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Chen-Yu Tsai,
Jernej Skrabec, Samuel Holland, Maxime Ripard, Ulf Hansson
Cc: devicetree, linux-arm-kernel, linux-sunxi, linux-kernel,
linux-mmc, Enzo Adriano
In-Reply-To: <20260613-a733-dts-v1-public-ready-v1-0-7787c94681db@gmail.com>
From: Enzo Adriano <enzo.adriano.code@gmail.com>
Document the Radxa Cubie A7S board compatible for the Allwinner A733 SoC.
Signed-off-by: Enzo Adriano <enzo.adriano.code@gmail.com>
---
Documentation/devicetree/bindings/arm/sunxi.yaml | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/sunxi.yaml b/Documentation/devicetree/bindings/arm/sunxi.yaml
index e6443c266fa1..9f603681c78e 100644
--- a/Documentation/devicetree/bindings/arm/sunxi.yaml
+++ b/Documentation/devicetree/bindings/arm/sunxi.yaml
@@ -850,6 +850,11 @@ properties:
- const: radxa,cubie-a5e
- const: allwinner,sun55i-a527
+ - description: Radxa Cubie A7S
+ items:
+ - const: radxa,cubie-a7s
+ - const: allwinner,sun60i-a733
+
- description: Remix Mini PC
items:
- const: jide,remix-mini-pc
--
2.53.0
^ permalink raw reply related
* [PATCH 0/4] arm64: dts: allwinner: add A733/Cubie A7S DTS support
From: Enzo Adriano via B4 Relay @ 2026-06-13 9:42 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Chen-Yu Tsai,
Jernej Skrabec, Samuel Holland, Maxime Ripard, Ulf Hansson
Cc: devicetree, linux-arm-kernel, linux-sunxi, linux-kernel,
linux-mmc, Enzo Adriano
This series adds initial devicetree support for the Allwinner A733 SoC and
Radxa Cubie A7S board.
It includes the Radxa Cubie A7S board compatible, the A733 MMC compatible,
an initial A733 SoC DTSI with CPUs, timer, GICv3, RTC oscillator provider,
CCU/R-CCU, pinctrl, UART0, and SDMMC0, and a board DTS enabling UART0 console
and SD card boot storage.
This series intentionally does not carry local CCU/PRCM or pinctrl driver
patches. Those areas overlap active A733 RFC work and remain external
prerequisites unless maintainers ask for a different plan. The A733 CCU RFC
also depends on the A733 RTC series.
Ethernet, VPU/Cedrus, display, Wi-Fi, Bluetooth, USB-C, PCIe, and other board
peripherals are intentionally out of scope. Vendor U-Boot workarounds used for
local proof collection are not encoded in these device trees.
Cubie A7S runtime proof has shown the v4 Image and DTB loading, Linux
7.1.0-rc6-gabc8d07b0a63, Radxa Cubie A7S machine model, 8 CPUs, GICv3
redistributors, A733 pinctrl/UART0, SDMMC0 enumeration, mmcblk0 partition
discovery, and a read-only mmcblk0p3 root mount via the corrected PARTUUID
path.
Signed-off-by: Enzo Adriano <enzo.adriano.code@gmail.com>
---
Enzo Adriano (4):
dt-bindings: arm: sunxi: add Radxa Cubie A7S
dt-bindings: mmc: add Allwinner A733 compatible
arm64: dts: allwinner: add Allwinner A733 SoC
arm64: dts: allwinner: add Radxa Cubie A7S
Documentation/devicetree/bindings/arm/sunxi.yaml | 5 +
.../bindings/mmc/allwinner,sun4i-a10-mmc.yaml | 3 +
arch/arm64/boot/dts/allwinner/Makefile | 1 +
.../boot/dts/allwinner/sun60i-a733-cubie-a7s.dts | 48 +++++
arch/arm64/boot/dts/allwinner/sun60i-a733.dtsi | 198 +++++++++++++++++++++
5 files changed, 255 insertions(+)
---
base-commit: 1626ce5bc85bd3faaa92877d1b65c924d86a9546
change-id: 20260613-a733-dts-v1-public-ready-8cbb37133b64
prerequisite-message-id: <20260121-a733-rtc-v1-0-d359437f23a7@pigmoral.tech>
prerequisite-patch-id: 042a3289f0d794493871f52adbd992a9f4de1f95
prerequisite-patch-id: a133b49e027edbb982e1e0e6c5712416ffa8512a
prerequisite-patch-id: c512a7bc19f2d6d8cd54eb0950db302cc71795df
prerequisite-patch-id: 1ea3a72e957d15a896a95127908c9c2a188bd46c
prerequisite-patch-id: df374a147afb6d96e5c3c9ee9f0d3085c57a9076
prerequisite-patch-id: cd4375ce65c5b79a1c67b33dc373c0bc0af6d308
prerequisite-patch-id: 4ec938bcd2096388f4c1928b0aa1a9c72ef6fe35
prerequisite-message-id: <20260310-a733-clk-v1-0-36b4e9b24457@pigmoral.tech>
prerequisite-patch-id: 42a81ed9298600d95a32d3d61bbfb632580413e7
prerequisite-patch-id: c5736d2edbcad45007995bcdc6a61e2e1953f87a
prerequisite-patch-id: 3dc8be31aade04035ca759e75e9c67efd9dcafce
prerequisite-patch-id: c24ddc9c08cfc410f38f595a8000b4f7dedc74b3
prerequisite-patch-id: 9fac441fc346bc54b1f09130849aa320c0b912d2
prerequisite-patch-id: 7c36a3a750676915eec3b1927158d9d61209a460
prerequisite-patch-id: ed8a7bba18ba5e7c88f6f546fa9fc582aecabc82
prerequisite-patch-id: ac155f53daee5eaa9f893704d4c3fbb9ff4a184c
prerequisite-message-id: <20250821004232.8134-1-andre.przywara@arm.com>
prerequisite-patch-id: 03fdbd2faff5bdeff1e7bfb7b4844cf3fafd655d
prerequisite-patch-id: 15e73fad7383f55ad6d0592294dcc9e8274c1c02
prerequisite-patch-id: bea03fba87ae3dffc5ad9920ef5a045d74c6dbd7
prerequisite-patch-id: c29b0eb9119cb6ea38e3babd689463cc26b66894
prerequisite-patch-id: 639bf50ff42c85812716fb5dc89b616284481867
prerequisite-patch-id: 9fc3b375667be361f1279d9f9b976c7f2698136c
prerequisite-patch-id: 75fc07dc2648e6610e80b21b910d9ae00d31c304
prerequisite-patch-id: 3214731f042dd5eb1aa1d38388384428548a053f
prerequisite-patch-id: 69702560a13f180161afb5a48c2ea7ebb3f9ec5c
Best regards,
--
Enzo Adriano <enzo.adriano.code@gmail.com>
^ permalink raw reply
* [PATCH 2/4] dt-bindings: mmc: add Allwinner A733 compatible
From: Enzo Adriano via B4 Relay @ 2026-06-13 9:42 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Chen-Yu Tsai,
Jernej Skrabec, Samuel Holland, Maxime Ripard, Ulf Hansson
Cc: devicetree, linux-arm-kernel, linux-sunxi, linux-kernel,
linux-mmc, Enzo Adriano
In-Reply-To: <20260613-a733-dts-v1-public-ready-v1-0-7787c94681db@gmail.com>
From: Enzo Adriano <enzo.adriano.code@gmail.com>
Document the A733 MMC controller compatible with the existing D1-style
fallback.
Signed-off-by: Enzo Adriano <enzo.adriano.code@gmail.com>
---
Documentation/devicetree/bindings/mmc/allwinner,sun4i-a10-mmc.yaml | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/mmc/allwinner,sun4i-a10-mmc.yaml b/Documentation/devicetree/bindings/mmc/allwinner,sun4i-a10-mmc.yaml
index 9f3b1edacaa0..9e9590521210 100644
--- a/Documentation/devicetree/bindings/mmc/allwinner,sun4i-a10-mmc.yaml
+++ b/Documentation/devicetree/bindings/mmc/allwinner,sun4i-a10-mmc.yaml
@@ -58,6 +58,9 @@ properties:
- items:
- const: allwinner,sun55i-a523-mmc
- const: allwinner,sun20i-d1-mmc
+ - items:
+ - const: allwinner,sun60i-a733-mmc
+ - const: allwinner,sun20i-d1-mmc
reg:
maxItems: 1
--
2.53.0
^ permalink raw reply related
* [PATCH 3/4] arm64: dts: allwinner: add Allwinner A733 SoC
From: Enzo Adriano via B4 Relay @ 2026-06-13 9:42 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Chen-Yu Tsai,
Jernej Skrabec, Samuel Holland, Maxime Ripard, Ulf Hansson
Cc: devicetree, linux-arm-kernel, linux-sunxi, linux-kernel,
linux-mmc, Enzo Adriano
In-Reply-To: <20260613-a733-dts-v1-public-ready-v1-0-7787c94681db@gmail.com>
From: Enzo Adriano <enzo.adriano.code@gmail.com>
Add the initial A733 SoC description with CPUs, timers, interrupt
controller, clocks, pinctrl, UART0, and MMC0.
Keep peripherals disabled by default. Board DTS files can enable only the
devices that are proven on their hardware.
Signed-off-by: Enzo Adriano <enzo.adriano.code@gmail.com>
---
arch/arm64/boot/dts/allwinner/sun60i-a733.dtsi | 198 +++++++++++++++++++++++++
1 file changed, 198 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun60i-a733.dtsi b/arch/arm64/boot/dts/allwinner/sun60i-a733.dtsi
new file mode 100644
index 000000000000..3721aa9e8573
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun60i-a733.dtsi
@@ -0,0 +1,198 @@
+// SPDX-License-Identifier: (GPL-2.0-only OR MIT)
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/clock/sun60i-a733-ccu.h>
+#include <dt-bindings/reset/sun60i-a733-ccu.h>
+
+/ {
+ interrupt-parent = <&gic>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu0: cpu@0 {
+ compatible = "arm,cortex-a55";
+ device_type = "cpu";
+ reg = <0x000>;
+ enable-method = "psci";
+ capacity-dmips-mhz = <530>;
+ };
+
+ cpu1: cpu@100 {
+ compatible = "arm,cortex-a55";
+ device_type = "cpu";
+ reg = <0x100>;
+ enable-method = "psci";
+ capacity-dmips-mhz = <530>;
+ };
+
+ cpu2: cpu@200 {
+ compatible = "arm,cortex-a55";
+ device_type = "cpu";
+ reg = <0x200>;
+ enable-method = "psci";
+ capacity-dmips-mhz = <530>;
+ };
+
+ cpu3: cpu@300 {
+ compatible = "arm,cortex-a55";
+ device_type = "cpu";
+ reg = <0x300>;
+ enable-method = "psci";
+ capacity-dmips-mhz = <530>;
+ };
+
+ cpu4: cpu@400 {
+ compatible = "arm,cortex-a55";
+ device_type = "cpu";
+ reg = <0x400>;
+ enable-method = "psci";
+ capacity-dmips-mhz = <530>;
+ };
+
+ cpu5: cpu@500 {
+ compatible = "arm,cortex-a55";
+ device_type = "cpu";
+ reg = <0x500>;
+ enable-method = "psci";
+ capacity-dmips-mhz = <530>;
+ };
+
+ cpu6: cpu@600 {
+ compatible = "arm,cortex-a76";
+ device_type = "cpu";
+ reg = <0x600>;
+ enable-method = "psci";
+ capacity-dmips-mhz = <1024>;
+ };
+
+ cpu7: cpu@700 {
+ compatible = "arm,cortex-a76";
+ device_type = "cpu";
+ reg = <0x700>;
+ enable-method = "psci";
+ capacity-dmips-mhz = <1024>;
+ };
+ };
+
+ osc24M: osc24M-clk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <24000000>;
+ clock-output-names = "osc24M";
+ };
+
+ osc32k: osc32k-clk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <32768>;
+ clock-output-names = "osc32k";
+ };
+
+ iosc: internal-osc-clk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <16000000>;
+ clock-output-names = "iosc";
+ };
+
+ psci {
+ compatible = "arm,psci-1.0", "arm,psci-0.2";
+ method = "smc";
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ arm,no-tick-in-suspend;
+ interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_PPI 14 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_PPI 10 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ soc {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x0 0x0 0x40000000>;
+
+ pio: pinctrl@2000000 {
+ compatible = "allwinner,sun60i-a733-pinctrl";
+ reg = <0x02000000 0x600>;
+ interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_APB1>, <&osc24M>, <&osc32k>;
+ clock-names = "apb", "hosc", "losc";
+ gpio-controller;
+ #gpio-cells = <3>;
+ interrupt-controller;
+ #interrupt-cells = <3>;
+
+ mmc0_pins: mmc0-pins {
+ pins = "PF0", "PF1", "PF2",
+ "PF3", "PF4", "PF5";
+ function = "mmc0";
+ drive-strength = <30>;
+ bias-pull-up;
+ };
+ };
+
+ ccu: clock-controller@2002000 {
+ compatible = "allwinner,sun60i-a733-ccu";
+ reg = <0x02002000 0x2000>;
+ clocks = <&osc24M>, <&osc32k>, <&iosc>;
+ clock-names = "hosc", "losc", "iosc";
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+ };
+
+ uart0: serial@2500000 {
+ compatible = "snps,dw-apb-uart";
+ reg = <0x02500000 0x400>;
+ interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ clocks = <&ccu CLK_BUS_UART0>;
+ resets = <&ccu RST_BUS_UART0>;
+ status = "disabled";
+ };
+
+ gic: interrupt-controller@3400000 {
+ compatible = "arm,gic-v3";
+ #interrupt-cells = <3>;
+ interrupt-controller;
+ reg = <0x03400000 0x10000>,
+ <0x03460000 0x100000>;
+ };
+
+ mmc0: mmc@4020000 {
+ compatible = "allwinner,sun60i-a733-mmc",
+ "allwinner,sun20i-d1-mmc";
+ reg = <0x04020000 0x1000>;
+ interrupts = <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_MMC0>, <&ccu CLK_MMC0>;
+ clock-names = "ahb", "mmc";
+ resets = <&ccu RST_BUS_MMC0>;
+ reset-names = "ahb";
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc0_pins>;
+ max-frequency = <200000000>;
+ cap-sd-highspeed;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+};
--
2.53.0
^ permalink raw reply related
* [PATCH 4/4] arm64: dts: allwinner: add Radxa Cubie A7S
From: Enzo Adriano via B4 Relay @ 2026-06-13 9:42 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Chen-Yu Tsai,
Jernej Skrabec, Samuel Holland, Maxime Ripard, Ulf Hansson
Cc: devicetree, linux-arm-kernel, linux-sunxi, linux-kernel,
linux-mmc, Enzo Adriano
In-Reply-To: <20260613-a733-dts-v1-public-ready-v1-0-7787c94681db@gmail.com>
From: Enzo Adriano <enzo.adriano.code@gmail.com>
Add the Radxa Cubie A7S board description with serial console and SD card
boot support.
Ethernet remains disabled until the GMAC210 wrapper, clocks, resets,
MDIO, PHY reset, PHY power, and link behavior are proven.
Signed-off-by: Enzo Adriano <enzo.adriano.code@gmail.com>
---
arch/arm64/boot/dts/allwinner/Makefile | 1 +
.../boot/dts/allwinner/sun60i-a733-cubie-a7s.dts | 48 ++++++++++++++++++++++
2 files changed, 49 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
index d116864b6c2b..824cc35152db 100644
--- a/arch/arm64/boot/dts/allwinner/Makefile
+++ b/arch/arm64/boot/dts/allwinner/Makefile
@@ -56,6 +56,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h700-anbernic-rg35xx-2024.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h700-anbernic-rg35xx-h.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h700-anbernic-rg35xx-plus.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h700-anbernic-rg35xx-sp.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun60i-a733-cubie-a7s.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun55i-a527-cubie-a5e.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun55i-h728-x96qpro+.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun55i-t527-avaota-a1.dtb
diff --git a/arch/arm64/boot/dts/allwinner/sun60i-a733-cubie-a7s.dts b/arch/arm64/boot/dts/allwinner/sun60i-a733-cubie-a7s.dts
new file mode 100644
index 000000000000..453761a96323
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun60i-a733-cubie-a7s.dts
@@ -0,0 +1,48 @@
+// SPDX-License-Identifier: (GPL-2.0-only OR MIT)
+
+/dts-v1/;
+
+#include "sun60i-a733.dtsi"
+
+/ {
+ model = "Radxa Cubie A7S";
+ compatible = "radxa,cubie-a7s", "allwinner,sun60i-a733";
+
+ aliases {
+ serial0 = &uart0;
+ mmc0 = &mmc0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ reg_vcc3v3: vcc3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc-3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
+};
+
+&mmc0 {
+ vmmc-supply = <®_vcc3v3>;
+ bus-width = <4>;
+ no-mmc;
+ no-sdio;
+ status = "okay";
+};
+
+&pio {
+ uart0_pb9_pb10_pins: uart0-pb9-pb10-pins {
+ pins = "PB9", "PB10";
+ function = "uart0";
+ };
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pb9_pb10_pins>;
+ status = "okay";
+};
--
2.53.0
^ permalink raw reply related
* Re: [PATCH net-next v5 3/3] net: airoha: defer GDM3/GDM4 WAN mode and GDM2 loopback to QoS offload
From: Lorenzo Bianconi @ 2026-06-13 10:04 UTC (permalink / raw)
To: Andrew Lunn, David S. Miller, Eric Dumazet, Jakub Kicinski,
Paolo Abeni
Cc: linux-arm-kernel, linux-mediatek, netdev, Madhur Agrawal,
Alexander Lobakin
In-Reply-To: <20260611-airoha-ethtool-priv_flags-v5-3-c11de08486d1@kernel.org>
[-- Attachment #1: Type: text/plain, Size: 7641 bytes --]
Commenting on sashiko's report:
https://netdev-ai.bots.linux.dev/sashiko/#/patchset/20260611-airoha-ethtool-priv_flags-v5-0-c11de08486d1%40kernel.org
[...]
> +static int airoha_enable_qos_for_gdm34(struct net_device *netdev,
> + struct netlink_ext_ack *extack)
> +{
> + struct airoha_gdm_dev *wan_dev, *dev = netdev_priv(netdev);
> + struct airoha_gdm_port *port = dev->port;
> + struct airoha_eth *eth = dev->eth;
> + int err = -EBUSY;
> +
> + if (port->id != AIROHA_GDM3_IDX &&
> + port->id != AIROHA_GDM4_IDX) {
> + /* HW QoS is always supported by GDM1 and GDM2 */
> + return 0;
> + }
> +
> + if (!airoha_is_lan_gdm_dev(dev)) /* Already enabled */
> + return 0;
> +
> + mutex_lock(&flow_offload_mutex);
> +
> + wan_dev = airoha_get_wan_gdm_dev(eth);
> + if (wan_dev) {
> + if ((wan_dev->flags & AIROHA_PRIV_F_QOS) ||
> + wan_dev->port->id == AIROHA_GDM2_IDX) {
> + NL_SET_ERR_MSG_MOD(extack,
> + "QoS configured for WAN device");
> + goto error_unlock;
> + }
> + airoha_disable_qos_for_gdm34(netdev_from_priv(wan_dev));
> + }
> +
> + dev->flags |= AIROHA_PRIV_F_WAN;
> + airoha_dev_set_qdma(dev);
> + err = airoha_enable_gdm2_loopback(dev);
> + if (err)
> + goto error_disable_wan;
> +
> + err = airoha_set_macaddr(dev, netdev->dev_addr);
> + if (err)
> + goto error_disable_loopback;
> +
> + if (netif_running(netdev)) {
> + u32 pse_port;
> +
> + pse_port = airoha_ppe_is_enabled(eth, 1) ? FE_PSE_PORT_PPE2
> + : FE_PSE_PORT_PPE1;
> + airoha_set_gdm_port_fwd_cfg(eth, REG_GDM_FWD_CFG(port->id),
> + pse_port);
> + }
> +
> + mutex_unlock(&flow_offload_mutex);
> +
> + return 0;
> +
> +error_disable_loopback:
> + airoha_disable_gdm2_loopback(dev);
> +error_disable_wan:
> + dev->flags &= ~AIROHA_PRIV_F_WAN;
> + airoha_dev_set_qdma(dev);
> +error_unlock:
> + mutex_unlock(&flow_offload_mutex);
> +
> + return err;
> +}
- The error_disable_loopback / error_disable_wan / error_unlock paths only
revert the requesting dev. The earlier airoha_disable_qos_for_gdm34(wan_dev)
demotion is never undone.
Could a TC_HTB_CREATE that returns an error to userspace then leave the
system with no WAN GDM3/GDM4 device, with the previously-working sibling
silently flipped to LAN, its QDMA migrated to QDMA0, GDM2 loopback torn
down, and its forwarding rewritten to PPE1?
Should the failure paths re-promote wan_dev (re-call airoha_enable_qos_for_gdm34
or an equivalent restore helper on it) before unlocking and returning?
- This is the same item reported by sashiko-gemini in [0]. In my previous
reply I have explained why I do not think it worths to re-promote the
original interface in case of failure in airoha_enable_qos_for_gdm34().
Regards,
Lorenzo
[0] https://sashiko.dev/#/patchset/20260611-airoha-ethtool-priv_flags-v5-0-c11de08486d1%40kernel.org
> +
> static int airoha_tc_htb_destroy(struct net_device *netdev)
> {
> struct airoha_gdm_dev *dev = netdev_priv(netdev);
> @@ -3038,6 +3205,8 @@ static int airoha_tc_htb_destroy(struct net_device *netdev)
> for_each_set_bit(q, dev->qos_sq_bmap, AIROHA_NUM_QOS_CHANNELS)
> airoha_tc_remove_htb_queue(netdev, q);
>
> + dev->flags &= ~AIROHA_PRIV_F_QOS;
> +
> return 0;
> }
>
> @@ -3057,24 +3226,33 @@ static int airoha_tc_get_htb_get_leaf_queue(struct net_device *netdev,
> return 0;
> }
>
> -static int airoha_tc_setup_qdisc_htb(struct net_device *dev,
> +static int airoha_tc_setup_qdisc_htb(struct net_device *netdev,
> struct tc_htb_qopt_offload *opt)
> {
> switch (opt->command) {
> - case TC_HTB_CREATE:
> + case TC_HTB_CREATE: {
> + struct airoha_gdm_dev *dev = netdev_priv(netdev);
> + int err;
> +
> + err = airoha_enable_qos_for_gdm34(netdev, opt->extack);
> + if (err)
> + return err;
> +
> + dev->flags |= AIROHA_PRIV_F_QOS;
> break;
> + }
> case TC_HTB_DESTROY:
> - return airoha_tc_htb_destroy(dev);
> + return airoha_tc_htb_destroy(netdev);
> case TC_HTB_NODE_MODIFY:
> - return airoha_tc_htb_modify_queue(dev, opt);
> + return airoha_tc_htb_modify_queue(netdev, opt);
> case TC_HTB_LEAF_ALLOC_QUEUE:
> - return airoha_tc_htb_alloc_leaf_queue(dev, opt);
> + return airoha_tc_htb_alloc_leaf_queue(netdev, opt);
> case TC_HTB_LEAF_DEL:
> case TC_HTB_LEAF_DEL_LAST:
> case TC_HTB_LEAF_DEL_LAST_FORCE:
> - return airoha_tc_htb_delete_leaf_queue(dev, opt);
> + return airoha_tc_htb_delete_leaf_queue(netdev, opt);
> case TC_HTB_LEAF_QUERY_QUEUE:
> - return airoha_tc_get_htb_get_leaf_queue(dev, opt);
> + return airoha_tc_get_htb_get_leaf_queue(netdev, opt);
> default:
> return -EOPNOTSUPP;
> }
> diff --git a/drivers/net/ethernet/airoha/airoha_eth.h b/drivers/net/ethernet/airoha/airoha_eth.h
> index 24fd8dcf7fca..d1390ffcea7c 100644
> --- a/drivers/net/ethernet/airoha/airoha_eth.h
> +++ b/drivers/net/ethernet/airoha/airoha_eth.h
> @@ -540,11 +540,12 @@ struct airoha_qdma {
>
> enum airoha_priv_flags {
> AIROHA_PRIV_F_WAN = BIT(0),
> + AIROHA_PRIV_F_QOS = BIT(1),
> };
>
> struct airoha_gdm_dev {
> + struct airoha_qdma __rcu *qdma;
> struct airoha_gdm_port *port;
> - struct airoha_qdma *qdma;
> struct airoha_eth *eth;
>
> DECLARE_BITMAP(qos_sq_bmap, AIROHA_NUM_QOS_CHANNELS);
> @@ -676,6 +677,16 @@ int airoha_get_fe_port(struct airoha_gdm_dev *dev);
> bool airoha_is_valid_gdm_dev(struct airoha_eth *eth,
> struct airoha_gdm_dev *dev);
>
> +extern struct mutex flow_offload_mutex;
> +
> +static inline struct airoha_qdma *
> +airoha_qdma_deref(struct airoha_gdm_dev *dev)
> +{
> + return rcu_dereference_protected(dev->qdma,
> + lockdep_rtnl_is_held() ||
> + lockdep_is_held(&flow_offload_mutex));
> +}
> +
> void airoha_ppe_set_cpu_port(struct airoha_gdm_dev *dev, u8 ppe_id, u8 fport);
> bool airoha_ppe_is_enabled(struct airoha_eth *eth, int index);
> void airoha_ppe_check_skb(struct airoha_ppe_dev *dev, struct sk_buff *skb,
> diff --git a/drivers/net/ethernet/airoha/airoha_ppe.c b/drivers/net/ethernet/airoha/airoha_ppe.c
> index 91bcc55a6ac6..1d1b1a57d795 100644
> --- a/drivers/net/ethernet/airoha/airoha_ppe.c
> +++ b/drivers/net/ethernet/airoha/airoha_ppe.c
> @@ -15,7 +15,10 @@
> #include "airoha_regs.h"
> #include "airoha_eth.h"
>
> -static DEFINE_MUTEX(flow_offload_mutex);
> +/* Serialize airoha_gdm_dev flags, QDMA pointer and PPE CPU port
> + * configuration.
> + */
> +DEFINE_MUTEX(flow_offload_mutex);
> static DEFINE_SPINLOCK(ppe_lock);
>
> static const struct rhashtable_params airoha_flow_table_params = {
> @@ -86,8 +89,8 @@ static u32 airoha_ppe_get_timestamp(struct airoha_ppe *ppe)
>
> void airoha_ppe_set_cpu_port(struct airoha_gdm_dev *dev, u8 ppe_id, u8 fport)
> {
> - struct airoha_qdma *qdma = dev->qdma;
> - struct airoha_eth *eth = qdma->eth;
> + struct airoha_qdma *qdma = airoha_qdma_deref(dev);
> + struct airoha_eth *eth = dev->eth;
> u8 qdma_id = qdma - ð->qdma[0];
> u32 fe_cpu_port;
>
> diff --git a/drivers/net/ethernet/airoha/airoha_regs.h b/drivers/net/ethernet/airoha/airoha_regs.h
> index 436f3c8779c1..4e17dfbcf2b8 100644
> --- a/drivers/net/ethernet/airoha/airoha_regs.h
> +++ b/drivers/net/ethernet/airoha/airoha_regs.h
> @@ -376,6 +376,7 @@
>
> #define REG_SRC_PORT_FC_MAP6 0x2298
> #define FC_ID_OF_SRC_PORT_MASK(_n) GENMASK(4 + ((_n) << 3), ((_n) << 3))
> +#define FC_MAP6_DEF_VALUE 0x1b1a1918
>
> #define REG_CDM5_RX_OQ1_DROP_CNT 0x29d4
>
>
> --
> 2.54.0
>
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]
^ permalink raw reply
* Re: [PATCH] crypto: atmel-ecc - remove stale comments in atmel_ecc_remove
From: Lothar Rubusch @ 2026-06-13 10:06 UTC (permalink / raw)
To: linux-crypto, davem, nicolas.ferre, alexandre.belloni
Cc: thorsten.blum, herbert, linux-arm-kernel, linux-kernel, l.rubusch
In-Reply-To: <aiqUBXIybgHXA6uj@linux.dev>
> From linux-crypto-vger Thu Jun 11 10:55:01 2026
> From: Thorsten Blum <thorsten.blum () linux ! dev>
> Date: Thu, 11 Jun 2026 10:55:01 +0000
> To: linux-crypto-vger
> Subject: Re: [PATCH] crypto: atmel-ecc - remove stale comments in atmel_ecc_remove
> Message-Id: <aiqUBXIybgHXA6uj () linux ! dev>
> X-MARC-Message: https://marc.info/?l=linux-crypto-vger&m=178117527182807
>
> On Thu, Jun 11, 2026 at 01:29:52PM +0800, Herbert Xu wrote:
> > On Tue, Jun 02, 2026 at 06:52:49PM +0200, Thorsten Blum wrote:
> > > atmel_ecc_remove() no longer returns -EBUSY since commit 7df7563b16aa
> > > ("crypto: atmel-ecc - Remove duplicated error reporting in .remove()")
> > > and is a void function since commit ed5c2f5fd10d ("i2c: Make remove
> > > callback return void").
> > >
> > > Remove and update the outdated comments.
> > >
> > > Signed-off-by: Thorsten Blum <thorsten.blum@linux.dev>
> > > ---
> > > drivers/crypto/atmel-ecc.c | 6 ++----
> > > 1 file changed, 2 insertions(+), 4 deletions(-)
> > >
> > > diff --git a/drivers/crypto/atmel-ecc.c b/drivers/crypto/atmel-ecc.c
> > > index 9c380351d2f9..e6068dc0a0c1 100644
> > > --- a/drivers/crypto/atmel-ecc.c
> > > +++ b/drivers/crypto/atmel-ecc.c
> > > @@ -347,13 +347,11 @@ static void atmel_ecc_remove(struct i2c_client *client)
> > > {
> > > struct atmel_i2c_client_priv *i2c_priv = i2c_get_clientdata(client);
> > >
> > > - /* Return EBUSY if i2c client already allocated. */
> > > if (atomic_read(&i2c_priv->tfm_count)) {
> > > /*
> > > * After we return here, the memory backing the device is freed.
> > > - * That happens no matter what the return value of this function
> > > - * is because in the Linux device model there is no error
> > > - * handling for unbinding a driver.
> > > + * That happens because in the Linux device model there is no
> > > + * error handling for unbinding a driver.
> > > * If there is still some action pending, it probably involves
> > > * accessing the freed memory.
> > > */
> >
> > Please fix this properly rather than fiddling with the comments.
> >
> > Drivers should always fail gracefully if the hardware disappears.
>
> Yes, I'm working on a fix, but it's not ready yet.
>
Hi guys, since this is going towards some work I already presented here and
still waiting on answer/request for comment from maintainer(s).
https://marc.info/?l=linux-kernel&m=178099821038957&w=2
The issue in the remove() arises when working with devres in combination with
asynch slow bus hardware, as we do here. AFAIK in the remove() are mainly two
options, either give a timeout to solve communication gracefully, then cut; or
wait indefinitely on the device to clear, in case forever.
When we cut off after timeout (first case) and still something arrives, it
would probably access freed memory resources. In the second case, simply
waiting on the device to resolve, might contain the risk of an infinite
waiting at driver removal. The other alternative would be to manage kmallocs
manually, i.e. to move away from devres (probably not what we want).
Currently, the driver just simply cuts off and has this problematic situation
very well spotted by the original author and commented.
Further, related to this situation in the remove() is using the global driver
data, which then might be overriden, and thus leak, when still around, and
this connects to dealing with synchronizing adding to the i2c_clientList and
algo registration, both happening in probe().
I tried to address all three issues. That's why the patch ended with such a
lengthy comment. The patch is reviewed by sashiko complaining only the above
dilemma.
https://sashiko.dev/#/patchset/20260609092927.47222-1-l.rubusch%40gmail.com
I hope I did not interfere too much with Thorstens fixes here. Since I assumed
you were active on rather different topics. Pls, let me know if so. I just
want to see this issue out of my way for the refac patch series.
Best,
L
^ permalink raw reply
* Re: [PATCH 1/2] iio: adc: lpc32xx: Initialize completion before requesting IRQ
From: Vladimir Zapolskiy @ 2026-06-13 10:09 UTC (permalink / raw)
To: Maxwell Doose, Jonathan Cameron, David Lechner, Nuno Sá,
Andy Shevchenko, Piotr Wojtaszczyk, Hartmut Knaack,
open list:IIO SUBSYSTEM AND DRIVERS,
moderated list:ARM/LPC32XX SOC SUPPORT, open list
Cc: Sangyun Kim, Kyungwook Boo, Jaeyoung Chung
In-Reply-To: <20260613005812.160572-2-m32285159@gmail.com>
On 6/13/26 03:58, Maxwell Doose wrote:
> In the report from Jaeyoung Chung:
>
> "lpc32xx_adc_probe() in drivers/iio/adc/lpc32xx_adc.c registers its
> interrupt handler with devm_request_irq() before it initializes
> st->completion with init_completion(). If an interrupt arrives after
> devm_request_irq() and before init_completion(), the handler calls
> complete() on an uninitialized completion, causing a kernel panic.
>
> The probe path, in lpc32xx_adc_probe():
>
> iodev = devm_iio_device_alloc(&pdev->dev, sizeof(*st)); /* st kzalloc-zeroed */
> ...
> retval = devm_request_irq(&pdev->dev, irq, lpc32xx_adc_isr, 0,
> LPC32XXAD_NAME, st); /* register handler */
> ...
> init_completion(&st->completion); /* initialize completion */
>
> lpc32xx_adc_isr() calls complete():
>
> complete(&st->completion);
>
> If the device raises an interrupt before init_completion() runs,
> complete() acquires the uninitialized wait.lock and walks the zeroed
> task_list in swake_up_locked(). The zeroed task_list makes list_empty()
> return false, so swake_up_locked() dereferences a NULL list entry,
> triggering a KASAN wild-memory-access."
>
> Fix the chance of a spurious IRQ causing an uninitialized pointer
> dereference by moving init_completion() above devm_request_irq().
>
> Fixes: 7901b2a1453e ("staging:iio:adc:lpc32xx rename local state structure to _state")
> Reported-by: Sangyun Kim <sangyun.kim@snu.ac.kr>
> Reported-by: Kyungwook Boo <bookyungwook@gmail.com>
> Reported-by: Jaeyoung Chung <jjy600901@snu.ac.kr>
> Closes: https://lore.kernel.org/linux-iio/20260610115700.774689-1-jjy600901@snu.ac.kr/
> Signed-off-by: Maxwell Doose <m32285159@gmail.com>
> ---
> drivers/iio/adc/lpc32xx_adc.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/iio/adc/lpc32xx_adc.c b/drivers/iio/adc/lpc32xx_adc.c
> index 43a7bc8158b5..db3a602327ff 100644
> --- a/drivers/iio/adc/lpc32xx_adc.c
> +++ b/drivers/iio/adc/lpc32xx_adc.c
> @@ -179,6 +179,8 @@ static int lpc32xx_adc_probe(struct platform_device *pdev)
> if (irq < 0)
> return irq;
>
> + init_completion(&st->completion);
> +
> retval = devm_request_irq(&pdev->dev, irq, lpc32xx_adc_isr, 0,
> LPC32XXAD_NAME, st);
> if (retval < 0) {
> @@ -197,8 +199,6 @@ static int lpc32xx_adc_probe(struct platform_device *pdev)
>
> platform_set_drvdata(pdev, iodev);
>
> - init_completion(&st->completion);
> -
> iodev->name = LPC32XXAD_NAME;
> iodev->info = &lpc32xx_adc_iio_info;
> iodev->modes = INDIO_DIRECT_MODE;
Reviewed-by: Vladimir Zapolskiy <vz@kernel.org>
--
Best wishes,
Vladimir
^ permalink raw reply
* Re: [PATCH 2/2] iio: adc: spear: Initialize completion before requesting IRQ
From: Vladimir Zapolskiy @ 2026-06-13 10:10 UTC (permalink / raw)
To: Maxwell Doose, Jonathan Cameron, David Lechner, Nuno Sá,
Andy Shevchenko, Piotr Wojtaszczyk, Hartmut Knaack,
open list:IIO SUBSYSTEM AND DRIVERS,
moderated list:ARM/LPC32XX SOC SUPPORT, open list
Cc: Sangyun Kim, Kyungwook Boo, Jaeyoung Chung
In-Reply-To: <20260613005812.160572-3-m32285159@gmail.com>
On 6/13/26 03:58, Maxwell Doose wrote:
> In the report from Jaeyoung Chung:
>
> "spear_adc_probe() in drivers/iio/adc/spear_adc.c registers its
> interrupt handler with devm_request_irq() before it initializes
> st->completion with init_completion(). If an interrupt arrives after
> devm_request_irq() and before init_completion(), the handler calls
> complete() on an uninitialized completion, causing a kernel panic.
>
> The probe path, in spear_adc_probe():
>
> iodev = devm_iio_device_alloc(&pdev->dev, sizeof(*st)); /* st kzalloc-zeroed */
> ...
> retval = devm_request_irq(&pdev->dev, irq, spear_adc_isr, 0,
> LPC32XXAD_NAME, st); /* register handler */
> ...
> init_completion(&st->completion); /* initialize completion */
>
> spear_adc_isr() calls complete():
>
> complete(&st->completion);
>
> If the device raises an interrupt before init_completion() runs,
> complete() acquires the uninitialized wait.lock and walks the zeroed
> task_list in swake_up_locked(). The zeroed task_list makes list_empty()
> return false, so swake_up_locked() dereferences a NULL list entry,
> triggering a KASAN wild-memory-access."
>
> Fix the chance of a spurious IRQ causing an uninitialized pointer
> dereference by moving init_completion() above devm_request_irq().
>
> Fixes: b586e5d9eee0 ("staging:iio:adc:spear rename device specific state structure to _state")
> Reported-by: Sangyun Kim <sangyun.kim@snu.ac.kr>
> Reported-by: Kyungwook Boo <bookyungwook@gmail.com>
> Reported-by: Jaeyoung Chung <jjy600901@snu.ac.kr>
> Closes: https://lore.kernel.org/linux-iio/20260610115700.774689-1-jjy600901@snu.ac.kr/
> Signed-off-by: Maxwell Doose <m32285159@gmail.com>
> ---
> drivers/iio/adc/spear_adc.c | 3 +--
> 1 file changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/drivers/iio/adc/spear_adc.c b/drivers/iio/adc/spear_adc.c
> index 4be722406bb5..ab02a14682ed 100644
> --- a/drivers/iio/adc/spear_adc.c
> +++ b/drivers/iio/adc/spear_adc.c
> @@ -283,6 +283,7 @@ static int spear_adc_probe(struct platform_device *pdev)
> st = iio_priv(indio_dev);
> st->dev = dev;
>
> + init_completion(&st->completion);
> mutex_init(&st->lock);
>
> /*
> @@ -329,8 +330,6 @@ static int spear_adc_probe(struct platform_device *pdev)
>
> spear_adc_configure(st);
>
> - init_completion(&st->completion);
> -
> indio_dev->name = SPEAR_ADC_MOD_NAME;
> indio_dev->info = &spear_adc_info;
> indio_dev->modes = INDIO_DIRECT_MODE;
Reviewed-by: Vladimir Zapolskiy <vz@kernel.org>
--
Best wishes,
Vladimir
^ permalink raw reply
* Re: [PATCH v8 6/6] pinctrl: mediatek: Add MT6735 pinctrl driver
From: Yassine Oudjana @ 2026-06-13 10:20 UTC (permalink / raw)
To: Linus Walleij
Cc: Yassine Oudjana, Sean Wang, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Matthias Brugger, AngeloGioacchino Del Regno,
Andy Teng, linux-mediatek, linux-gpio, devicetree, linux-kernel,
linux-arm-kernel
In-Reply-To: <CAD++jLkA3v0RD1skaanqqG2eN8JLivUQPrYdK+hbX1YhQBgKqw@mail.gmail.com>
On Monday, June 8th, 2026 at 9:41 PM, Linus Walleij <linusw@kernel.org> wrote:
> Hi Yassine,
>
> thanks for your patch!
>
> On Sat, May 30, 2026 at 4:58 PM Yassine Oudjana
> <yassine.oudjana@gmail.com> wrote:
>
> > From: Yassine Oudjana <y.oudjana@protonmail.com>
> >
> > Add a driver for the MediaTek MT6735 SoC pin controller. This driver
> > also supports the pin controller on MT6735M, which lacks 6 physical
> > pins (198-203) used for MSDC2 on MT6735.
> >
> > Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
>
> Sashiko has good comments on this driver, look into them!
Didn't receive any comments and I don't see anything on the mailing list
archives either. Am I missing something?
>
> > +config PINCTRL_MT6735
> > + bool "MediaTek MT6735(M) pin control"
> > + depends on OF
> > + default ARM64 && ARCH_MEDIATEK
> > + select PINCTRL_MTK_PARIS
>
> There are in-flight patches to make MTK drivers tristate for
> the Android GKI. Do you want to use tristate for this driver too?
Sure, doesn't matter much to me since I'm always compiling it as built-in.
^ permalink raw reply
* Re: [PATCH 2/4] dt-bindings: mfd: Add UGREEN NASync DH2300 MCU
From: Krzysztof Kozlowski @ 2026-06-13 10:44 UTC (permalink / raw)
To: Alexey Charkov
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Lee Jones,
Heiko Stuebner, Liam Girdwood, Mark Brown, devicetree,
linux-kernel, linux-arm-kernel, linux-rockchip
In-Reply-To: <20260612-dh2300-mcu-v1-2-ab8db1617bc0@flipper.net>
On Fri, Jun 12, 2026 at 07:34:15PM +0400, Alexey Charkov wrote:
> Document the UGREEN NASync DH2300 embedded controller (HC32F005 MCU),
> which is responsible for gating the SATA drive-bay power rail and
> providing a hardware watchdog.
>
> This is based on disassebly of a GPL binary from vendor firmware for which
> no source code could be found, so parts of it can be inaccurate. Only
> the power gating function is confirmed.
>
> Signed-off-by: Alexey Charkov <alchark@flipper.net>
> ---
> .../devicetree/bindings/mfd/ugreen,dh2300-mcu.yaml | 62 ++++++++++++++++++++++
> MAINTAINERS | 5 ++
> 2 files changed, 67 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/mfd/ugreen,dh2300-mcu.yaml b/Documentation/devicetree/bindings/mfd/ugreen,dh2300-mcu.yaml
> new file mode 100644
> index 000000000000..847970c609cd
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mfd/ugreen,dh2300-mcu.yaml
Place it in embedded-controller
> @@ -0,0 +1,62 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/mfd/ugreen,dh2300-mcu.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: UGREEN NASync DH2300 embedded controller
> +
> +maintainers:
> + - Alexey Charkov <alchark@flipper.net>
> +
> +description:
> + The UGREEN NASync DH2300 NAS carries a HC32F005 microcontroller on I2C that
> + acts as a board embedded controller. It gates power to the SATA drive bays
> + through an internal register and apparently also serves as a watchdog
> + (unconfirmed, as vendor kernel sources are unavailable, works without it)
> +
> +properties:
> + compatible:
> + const: ugreen,dh2300-mcu
> +
> + reg:
> + maxItems: 1
> +
> + regulator:
This should have specific name matching the actual regulator name, e.g.
pin.
> + type: object
> + $ref: /schemas/regulator/regulator.yaml#
> + unevaluatedProperties: false
> + description:
> + The SATA drive-bay power gate controlled by the MCU.
> +
> + watchdog-gpios:
> + description:
> + Optional GPIO line used to ping the hardware watchdog function of the MCU
> + maxItems: 1
Best regards,
Krzysztof
^ permalink raw reply
* Re: [PATCH v2 2/2] clk: samsung: exynos990: Fix PERIS gate clock parents
From: Krzysztof Kozlowski @ 2026-06-13 10:02 UTC (permalink / raw)
To: Denzeel Oliva
Cc: Sylwester Nawrocki, Chanwoo Choi, Peter Griffin, Alim Akhtar,
Michael Turquette, Stephen Boyd, Brian Masney, Rob Herring,
Conor Dooley, linux-samsung-soc, linux-clk, devicetree,
linux-arm-kernel, linux-kernel
In-Reply-To: <20260613-exynos990-peris-fix-v2-v2-2-3dff7ade75b3@gmail.com>
On Sat, Jun 13, 2026 at 12:19:52AM -0500, Denzeel Oliva wrote:
> Correct eight PERIS gate clock parents to match the hardware clock
> tree, reorder the GIC mux parents, and add the missing TMU_SUB_PCLK
> gate.
Separate commit. Fixing clock parents is something completely different
than adding new clock gate.
Best regards,
Krzysztof
^ permalink raw reply
* Re: [PATCH v4 7/7] arm64: dts: allwinner: A133: add support for Baijie Helper A133 board
From: Jernej Škrabec @ 2026-06-13 11:01 UTC (permalink / raw)
To: linux-arm-kernel, linux-sunxi, Alexander Sverdlin
Cc: Alexander Sverdlin, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Chen-Yu Tsai, Samuel Holland, Hans de Goede,
Dmitry Torokhov, Andre Przywara, Jun Yan, Lukas Schmid,
J. Neuschäfer, Eric Biggers, Michal Simek, Luca Weiss,
Sven Peter, Maxime Ripard, devicetree, linux-kernel, linux-input
In-Reply-To: <20260605070923.3045073-8-alexander.sverdlin@gmail.com>
Dne petek, 5. junij 2026 ob 09:09:21 Srednjeevropski poletni čas je Alexander Sverdlin napisal(a):
> Baijie Helper A133 board is a development board around Baijie A133 Core
> SBC. Features:
>
> - 1/2/4GiB LPDDR4 DRAM
> - 8/16/32GiB eMMC
> - AXP707 PMIC
> - USB-C OTG port in peripheral mode (via onboard hub)
> - 2 USB 2.0 ports
> - MicroSD slot and on-board eMMC module
> - Gigabit Ethernet
> - Bluetooth
> - WiFi
>
> Add initial support for both the Helper and Core boards, including UART,
> PMU, eMMC, USB, Ethernet, LRADC-connected buttons.
>
> UART1 can only be used for Bluetooth module, but BT-WiFi combo Allwinner
> AW869A chip has no mainline driver currently.
>
> Signed-off-by: Alexander Sverdlin <alexander.sverdlin@gmail.com>
Schema validation passes, so:
Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Best regards,
Jernej
^ permalink raw reply
* Re: [PATCH 4/4] arm64: dts: allwinner: add Radxa Cubie A7S
From: Jernej Škrabec @ 2026-06-13 11:37 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Chen-Yu Tsai,
Samuel Holland, Maxime Ripard, Ulf Hansson, enzo.adriano.code
Cc: devicetree, linux-arm-kernel, linux-sunxi, linux-kernel,
linux-mmc, Enzo Adriano
In-Reply-To: <20260613-a733-dts-v1-public-ready-v1-4-7787c94681db@gmail.com>
Dne sobota, 13. junij 2026 ob 11:42:16 Srednjeevropski poletni čas je Enzo Adriano via B4 Relay napisal(a):
> From: Enzo Adriano <enzo.adriano.code@gmail.com>
>
> Add the Radxa Cubie A7S board description with serial console and SD card
> boot support.
>
> Ethernet remains disabled until the GMAC210 wrapper, clocks, resets,
> MDIO, PHY reset, PHY power, and link behavior are proven.
>
> Signed-off-by: Enzo Adriano <enzo.adriano.code@gmail.com>
> ---
> arch/arm64/boot/dts/allwinner/Makefile | 1 +
> .../boot/dts/allwinner/sun60i-a733-cubie-a7s.dts | 48 ++++++++++++++++++++++
> 2 files changed, 49 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
> index d116864b6c2b..824cc35152db 100644
> --- a/arch/arm64/boot/dts/allwinner/Makefile
> +++ b/arch/arm64/boot/dts/allwinner/Makefile
> @@ -56,6 +56,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h700-anbernic-rg35xx-2024.dtb
> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h700-anbernic-rg35xx-h.dtb
> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h700-anbernic-rg35xx-plus.dtb
> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h700-anbernic-rg35xx-sp.dtb
> +dtb-$(CONFIG_ARCH_SUNXI) += sun60i-a733-cubie-a7s.dtb
> dtb-$(CONFIG_ARCH_SUNXI) += sun55i-a527-cubie-a5e.dtb
> dtb-$(CONFIG_ARCH_SUNXI) += sun55i-h728-x96qpro+.dtb
> dtb-$(CONFIG_ARCH_SUNXI) += sun55i-t527-avaota-a1.dtb
> diff --git a/arch/arm64/boot/dts/allwinner/sun60i-a733-cubie-a7s.dts b/arch/arm64/boot/dts/allwinner/sun60i-a733-cubie-a7s.dts
> new file mode 100644
> index 000000000000..453761a96323
> --- /dev/null
> +++ b/arch/arm64/boot/dts/allwinner/sun60i-a733-cubie-a7s.dts
> @@ -0,0 +1,48 @@
> +// SPDX-License-Identifier: (GPL-2.0-only OR MIT)
> +
> +/dts-v1/;
> +
> +#include "sun60i-a733.dtsi"
> +
> +/ {
> + model = "Radxa Cubie A7S";
> + compatible = "radxa,cubie-a7s", "allwinner,sun60i-a733";
> +
> + aliases {
> + serial0 = &uart0;
> + mmc0 = &mmc0;
> + };
> +
> + chosen {
> + stdout-path = "serial0:115200n8";
> + };
> +
> + reg_vcc3v3: vcc3v3 {
> + compatible = "regulator-fixed";
> + regulator-name = "vcc-3v3";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-always-on;
> + };
> +};
> +
> +&mmc0 {
> + vmmc-supply = <®_vcc3v3>;
> + bus-width = <4>;
> + no-mmc;
> + no-sdio;
> + status = "okay";
> +};
> +
> +&pio {
> + uart0_pb9_pb10_pins: uart0-pb9-pb10-pins {
> + pins = "PB9", "PB10";
> + function = "uart0";
> + };
Besides sashiko bot comments, these pins should go to main A733 DTSI,
like it's done for other SoCs.
In any case, it's a bit early for DT. At least clocks should land before.
Best regards,
Jernej
> +};
> +
> +&uart0 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&uart0_pb9_pb10_pins>;
> + status = "okay";
> +};
>
>
^ permalink raw reply
* Re: [PATCH v4 6/7] arm64: dts: allwinner: a100: reserve RAM for ATF
From: Alexander Sverdlin @ 2026-06-13 12:23 UTC (permalink / raw)
To: Jernej Škrabec, linux-arm-kernel, linux-sunxi
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Chen-Yu Tsai,
Samuel Holland, Hans de Goede, Dmitry Torokhov, Andre Przywara,
Jun Yan, Lukas Schmid, J. Neuschäfer, Eric Biggers,
Michal Simek, Luca Weiss, Sven Peter, Maxime Ripard, devicetree,
linux-kernel, linux-input
In-Reply-To: <FE7Vh4yfTmGMM24i18Wwwg@gmail.com>
Hi Jernej,
On Sat, 2026-06-13 at 11:38 +0200, Jernej Škrabec wrote:
> > > > Add reserved-memory node carving out Trusted Firmware-A region spanning
> > > > fixed 256K from physical address 0x40000000. Even though Allwinner ATF
> > > > itself passes the address range in the fdt to U-Boot, U-Boot currently
> > > > only reserves this memory internally, but doesn't carve out the region
> > > > in the fdt passed to Linux.
> > > >
> > > > Signed-off-by: Alexander Sverdlin <alexander.sverdlin@gmail.com>
> > >
> > > NAK. It is job of boot procedure to properly inject TF-A reserved node.
> > > Any issue should be fixed there.
> >
> >
> > like in commit 0d17c865118881609ea7e381c7cadbb7979cc596
> > ("arm64: dts: allwinner: Add Allwinner H616 .dtsi file")
> > Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
> >
> > ? ;-)
>
> I was against that too.
>
> It's time to be fixed in bootloader.
I agree, I was wondering about this shortcut as well... I'll implement
some sort of generic reserved memory handling in U-Boot.
--
Alexander Sverdlin.
^ permalink raw reply
* [PATCH] ARM: Fix potential register clobbering in __get_user_check
From: Tal Well @ 2026-06-13 12:27 UTC (permalink / raw)
To: linux; +Cc: linux-arm-kernel, linux-kernel, Tal Well
This can happen due to local variable registers being call-clobbered by
uaccess_save_and_enable or uaccess_restore, which can happen if they
become slightly more complicated than they are (for example contain any
memory access while KASAN is enabled).
In that case, the first user access will fail while trying to execute
the init process and the kernel will panic.
While this is not strictly a bug given r0, r1 and r2 remain unused in
the uaccess functions, even something as simple as making them noinline
breaks this assumption and there's no reason to rely on it.
This is similar to the issue fixed by commit df909df0770779f1a556
("ARM: 9132/1: Fix __get_user_check failure with ARM KASAN images"),
but that only handled clobbering of r0 by the uaccess_restore function.
Signed-off-by: Tal Well <talwell02@gmail.com>
---
arch/arm/include/asm/uaccess.h | 8 +++++---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/arch/arm/include/asm/uaccess.h b/arch/arm/include/asm/uaccess.h
index d6ae80b5df36..290ce8710773 100644
--- a/arch/arm/include/asm/uaccess.h
+++ b/arch/arm/include/asm/uaccess.h
@@ -180,12 +180,13 @@ extern int __get_user_64t_4(void *);
#define __get_user_check(x, p) \
({ \
- unsigned long __limit = TASK_SIZE - 1; \
+ unsigned long __limit = TASK_SIZE - 1; \
+ unsigned int __ua_flags = uaccess_save_and_enable(); \
register typeof(*(p)) __user *__p asm("r0") = (p); \
register __inttype(x) __r2 asm("r2"); \
register unsigned long __l asm("r1") = __limit; \
register int __e asm("r0"); \
- unsigned int __ua_flags = uaccess_save_and_enable(); \
+ __inttype(x) __tmp_r2; \
int __tmp_e; \
switch (sizeof(*(__p))) { \
case 1: \
@@ -214,9 +215,10 @@ extern int __get_user_64t_4(void *);
break; \
default: __e = __get_user_bad(); break; \
} \
+ __tmp_r2 = __r2; \
__tmp_e = __e; \
uaccess_restore(__ua_flags); \
- x = (typeof(*(p))) __r2; \
+ x = (typeof(*(p))) __tmp_r2; \
__tmp_e; \
})
base-commit: 062871f1371b2e02a272ff5279c6479aff0a37ef
--
2.39.5
^ permalink raw reply related
* Re: [PATCH v5 2/3] pwm: rp1: Add RP1 PWM controller driver
From: Julian Braha @ 2026-06-13 12:27 UTC (permalink / raw)
To: Andrea della Porta, Uwe Kleine-König, linux-pwm, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Florian Fainelli,
Broadcom internal kernel review list, devicetree,
linux-rpi-kernel, linux-arm-kernel, linux-kernel, Naushir Patuck,
Stanimir Varbanov, mbrugger
In-Reply-To: <f8dd46a553351adaf9d29fbba9f98e803b672fe7.1780670224.git.andrea.porta@suse.com>
On 6/12/26 15:01, Andrea della Porta wrote:
> +config PWM_RASPBERRYPI_RP1
> + tristate "RP1 PWM support"
> + depends on MISC_RP1 || COMPILE_TEST
> + depends on HAS_IOMEM
> + select REGMAP_MMIO
> + select MFD_SYSCON
> + help
> + PWM framework driver for Raspberry Pi RP1 controller.
> +
Hi Andrea,
Selecting REGMAP_MMIO is unnecessary here since you're already selecting
MFD_SYSCON.
- Julian Braha
^ permalink raw reply
* Re: [PATCH RESEND v2 1/1] crypto: atmel-sha204a - fix heap info leak on I2C transfer failure
From: Herbert Xu @ 2026-06-13 12:28 UTC (permalink / raw)
To: Lothar Rubusch
Cc: thorsten.blum, davem, nicolas.ferre, alexandre.belloni,
claudiu.beznea, ardb, krzk+dt, linux-crypto, linux-arm-kernel,
linux-kernel
In-Reply-To: <CAFXKEHYcp-0+uCA47mtDe_+LUAZucEPbDJzoh5+e3Q3R20mN9Q@mail.gmail.com>
On Sat, Jun 13, 2026 at 10:52:25AM +0200, Lothar Rubusch wrote:
> On Thu, Jun 11, 2026 at 6:59 AM Herbert Xu <herbert@gondor.apana.org.au> wrote:
> >
> > On Tue, Jun 09, 2026 at 09:47:23AM +0000, Lothar Rubusch wrote:
> > >
> > > diff --git a/drivers/crypto/atmel-sha204a.c b/drivers/crypto/atmel-sha204a.c
> > > index 4c9af737b33a..20cd915ea8a3 100644
> > > --- a/drivers/crypto/atmel-sha204a.c
> > > +++ b/drivers/crypto/atmel-sha204a.c
> > > @@ -31,10 +31,15 @@ static void atmel_sha204a_rng_done(struct atmel_i2c_work_data *work_data,
> > > struct atmel_i2c_client_priv *i2c_priv = work_data->ctx;
> > > struct hwrng *rng = areq;
> > >
> > > - if (status)
> > > + if (status) {
> > > dev_warn_ratelimited(&i2c_priv->client->dev,
> > > "i2c transaction failed (%d)\n",
> > > status);
> > > + kfree(work_data);
> > > + rng->priv = 0;
> >
> > Why is this necessary? It appears that rng_read_nonblocking already
> > zeroes rng->priv.
> >
>
> IMHO this is not the same. The patch targets the error path. If the
> `status` in `atmel_sha204a_rng_done()` is failed, then failed `work_data` is
> still assigned and `rng->priv` is not zeroed at the moment. Only a
> subsequent call to `rng_read_nonblocking()` will set `rng->priv = 0;`
Right, the rng->priv gets set on the error path prior to your patch.
But with your patch, there is no need to clear rng->priv because it
never gets set on the error path.
All I'm asking for is to remove the rng->priv = 0 because it only
causes confusion.
Cheers,
--
Email: Herbert Xu <herbert@gondor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
^ permalink raw reply
* Re: [PATCH v4 3/3] ARM: dts: sunxi: add support for NetCube Systems OpenNMC (dobermann)
From: Jernej Škrabec @ 2026-06-13 11:04 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Chen-Yu Tsai,
Samuel Holland, Paul Walmsley, Palmer Dabbelt, Albert Ou,
Alexandre Ghiti, Maxime Ripard, Lukas Schmid
Cc: Lukas Schmid, devicetree, linux-arm-kernel, linux-sunxi,
linux-kernel, linux-riscv
In-Reply-To: <20260606205452.2386930-4-lukas.schmid@netcube.li>
Dne sobota, 6. junij 2026 ob 22:54:43 Srednjeevropski poletni čas je Lukas Schmid napisal(a):
> NetCube Systems OpenNMC is an open replacement for APC SmartSlot Management
> Cards. It is based on the Nagami System-on-Module. It breaks out the
> following interfaces:
>
> - 10/100 Mbps Ethernet
> - USB Type-C OTG using a TUSB320 (usb0)
> - USB Type-C Console Port using a CH340 (uart3)
> - USB Type-A Host with internal CH334 USB-Hub (usb1)
> - MicroSD Slot with Card-Detect (mmc0)
> - WiFi/Bluetooth using the modules built-in ESP32
> - SmartSlot serial interface (uart4)
> - DS3232 RTC with CR1220 Battery Backup
> - Extension connector providing SPI,I2C,USB,CAN,UART for future use.
>
> Signed-off-by: Lukas Schmid <lukas.schmid@netcube.li>
DT Check passes, so:
Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Best regards,
Jernej
^ permalink raw reply
* [PATCH v3 0/3] clk: samsung: exynos990: Fix PERIS gate clock parents and add TMU_SUB
From: Denzeel Oliva @ 2026-06-13 12:36 UTC (permalink / raw)
To: Krzysztof Kozlowski, Sylwester Nawrocki, Chanwoo Choi,
Peter Griffin, Alim Akhtar, Michael Turquette, Stephen Boyd,
Brian Masney, Rob Herring, Conor Dooley
Cc: linux-samsung-soc, linux-clk, devicetree, linux-arm-kernel,
linux-kernel, Denzeel Oliva
Fix several PERIS CMU clock parent mismatches and add the missing
TMU_SUB_PCLK gate clock. The dt-bindings patch adds the new clock
ID. The second patch adds the TMU_SUB_PCLK gate. The third patch
corrects eight gate clock parents and reorders the GIC mux parents.
Signed-off-by: Denzeel Oliva <wachiturroxd150@gmail.com>
---
v2 -> v3:
- Split TMU_SUB gate addition from parent fixes into separate
patches (Krzysztof)
- Now three patches: dt-bindings, add gate, fix parents
v2: https://lore.kernel.org/r/20260613-exynos990-peris-fix-v2-v2-0-3dff7ade75b3@gmail.com
v1: https://lore.kernel.org/r/20260528-exynos990-peris-fix-v1-1-5b65aa7def2d@gmail.com
---
Denzeel Oliva (3):
dt-bindings: clock: exynos990: Add CLK_GOUT_PERIS_TMU_SUB_PCLK
clk: samsung: exynos990: Add PERIS TMU_SUB_PCLK gate
clk: samsung: exynos990: Fix PERIS gate clock parents
drivers/clk/samsung/clk-exynos990.c | 24 ++++++++++++++----------
include/dt-bindings/clock/samsung,exynos990.h | 1 +
2 files changed, 15 insertions(+), 10 deletions(-)
---
base-commit: c425609d6ac4012c8bbf01ec2e10e801b1923a7b
change-id: 20260613-exynos990-peris-fix-v3-fac19b879206
Best regards,
--
Denzeel Oliva <wachiturroxd150@gmail.com>
^ permalink raw reply
* [PATCH v3 1/3] dt-bindings: clock: exynos990: Add CLK_GOUT_PERIS_TMU_SUB_PCLK
From: Denzeel Oliva @ 2026-06-13 12:36 UTC (permalink / raw)
To: Krzysztof Kozlowski, Sylwester Nawrocki, Chanwoo Choi,
Peter Griffin, Alim Akhtar, Michael Turquette, Stephen Boyd,
Brian Masney, Rob Herring, Conor Dooley
Cc: linux-samsung-soc, linux-clk, devicetree, linux-arm-kernel,
linux-kernel, Denzeel Oliva
In-Reply-To: <20260613-exynos990-peris-fix-v3-v3-0-2b230db78ae4@gmail.com>
Add the missing TMU_SUB_PCLK clock ID for the Exynos990 PERIS CMU.
Signed-off-by: Denzeel Oliva <wachiturroxd150@gmail.com>
---
include/dt-bindings/clock/samsung,exynos990.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/dt-bindings/clock/samsung,exynos990.h b/include/dt-bindings/clock/samsung,exynos990.h
index 47540307cb52..c06f591d9d90 100644
--- a/include/dt-bindings/clock/samsung,exynos990.h
+++ b/include/dt-bindings/clock/samsung,exynos990.h
@@ -434,5 +434,6 @@
#define CLK_GOUT_PERIS_TMU_TOP_PCLK 17
#define CLK_GOUT_PERIS_OTP_CON_BIRA_OSCCLK 18
#define CLK_GOUT_PERIS_OTP_CON_TOP_OSCCLK 19
+#define CLK_GOUT_PERIS_TMU_SUB_PCLK 20
#endif
--
2.54.0
^ permalink raw reply related
* [PATCH v3 2/3] clk: samsung: exynos990: Add PERIS TMU_SUB_PCLK gate
From: Denzeel Oliva @ 2026-06-13 12:36 UTC (permalink / raw)
To: Krzysztof Kozlowski, Sylwester Nawrocki, Chanwoo Choi,
Peter Griffin, Alim Akhtar, Michael Turquette, Stephen Boyd,
Brian Masney, Rob Herring, Conor Dooley
Cc: linux-samsung-soc, linux-clk, devicetree, linux-arm-kernel,
linux-kernel, Denzeel Oliva
In-Reply-To: <20260613-exynos990-peris-fix-v3-v3-0-2b230db78ae4@gmail.com>
Add the missing CLK_GOUT_PERIS_TMU_SUB_PCLK gate clock for the Thermal
Management Unit sub-block and update CLKS_NR_PERIS accordingly.
Signed-off-by: Denzeel Oliva <wachiturroxd150@gmail.com>
---
drivers/clk/samsung/clk-exynos990.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/samsung/clk-exynos990.c b/drivers/clk/samsung/clk-exynos990.c
index 4385c3b76dd6..ee3566b8e57c 100644
--- a/drivers/clk/samsung/clk-exynos990.c
+++ b/drivers/clk/samsung/clk-exynos990.c
@@ -21,7 +21,7 @@
#define CLKS_NR_HSI0 (CLK_GOUT_HSI0_LHS_ACEL_D_HSI0_CLK + 1)
#define CLKS_NR_PERIC0 (CLK_GOUT_PERIC0_SYSREG_PCLK + 1)
#define CLKS_NR_PERIC1 (CLK_GOUT_PERIC1_XIU_P_ACLK + 1)
-#define CLKS_NR_PERIS (CLK_GOUT_PERIS_OTP_CON_TOP_OSCCLK + 1)
+#define CLKS_NR_PERIS (CLK_GOUT_PERIS_TMU_SUB_PCLK + 1)
/* ---- CMU_TOP ------------------------------------------------------------- */
@@ -2619,6 +2619,10 @@ static const struct samsung_gate_clock peris_gate_clks[] __initconst = {
"gout_peris_d_tzpc_peris_pclk", "mout_peris_bus_user",
CLK_CON_GAT_GOUT_BLK_PERIS_UID_D_TZPC_PERIS_IPCLKPORT_PCLK,
21, 0, 0),
+ GATE(CLK_GOUT_PERIS_TMU_SUB_PCLK,
+ "gout_peris_tmu_sub_pclk", "mout_peris_bus_user",
+ CLK_CON_GAT_GOUT_BLK_PERIS_UID_TMU_SUB_IPCLKPORT_PCLK,
+ 21, 0, 0),
GATE(CLK_GOUT_PERIS_TMU_TOP_PCLK,
"gout_peris_tmu_top_pclk", "mout_peris_clk_peris_gic",
CLK_CON_GAT_GOUT_BLK_PERIS_UID_TMU_TOP_IPCLKPORT_PCLK,
--
2.54.0
^ permalink raw reply related
* [PATCH v3 3/3] clk: samsung: exynos990: Fix PERIS gate clock parents
From: Denzeel Oliva @ 2026-06-13 12:36 UTC (permalink / raw)
To: Krzysztof Kozlowski, Sylwester Nawrocki, Chanwoo Choi,
Peter Griffin, Alim Akhtar, Michael Turquette, Stephen Boyd,
Brian Masney, Rob Herring, Conor Dooley
Cc: linux-samsung-soc, linux-clk, devicetree, linux-arm-kernel,
linux-kernel, Denzeel Oliva
In-Reply-To: <20260613-exynos990-peris-fix-v3-v3-0-2b230db78ae4@gmail.com>
Correct eight PERIS gate clock parents to match the hardware clock
tree and reorder the GIC mux parents so mout_peris_bus_user is the
default source.
Signed-off-by: Denzeel Oliva <wachiturroxd150@gmail.com>
---
drivers/clk/samsung/clk-exynos990.c | 18 +++++++++---------
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/drivers/clk/samsung/clk-exynos990.c b/drivers/clk/samsung/clk-exynos990.c
index ee3566b8e57c..df5928833b23 100644
--- a/drivers/clk/samsung/clk-exynos990.c
+++ b/drivers/clk/samsung/clk-exynos990.c
@@ -2551,7 +2551,7 @@ static const unsigned long peris_clk_regs[] __initconst = {
/* Parent clock list for CMU_PERIS muxes */
PNAME(mout_peris_bus_user_p) = { "oscclk", "mout_cmu_peris_bus" };
-PNAME(mout_peris_clk_peris_gic_p) = { "oscclk", "mout_peris_bus_user" };
+PNAME(mout_peris_clk_peris_gic_p) = { "mout_peris_bus_user", "oscclk" };
static const struct samsung_mux_clock peris_mux_clks[] __initconst = {
MUX(CLK_MOUT_PERIS_BUS_USER, "mout_peris_bus_user",
@@ -2584,15 +2584,15 @@ static const struct samsung_gate_clock peris_gate_clks[] __initconst = {
CLK_CON_GAT_GOUT_BLK_PERIS_UID_RSTNSYNC_CLK_PERIS_BUSP_IPCLKPORT_CLK,
21, 0, 0),
GATE(CLK_GOUT_PERIS_CLK_PERIS_OSCCLK_CLK,
- "gout_peris_clk_peris_oscclk_clk", "mout_peris_bus_user",
+ "gout_peris_clk_peris_oscclk_clk", "oscclk",
CLK_CON_GAT_CLK_BLK_PERIS_UID_RSTNSYNC_CLK_PERIS_OSCCLK_IPCLKPORT_CLK,
21, 0, 0),
GATE(CLK_GOUT_PERIS_CLK_PERIS_GIC_CLK,
- "gout_peris_clk_peris_gic_clk", "mout_peris_bus_user",
+ "gout_peris_clk_peris_gic_clk", "mout_peris_clk_peris_gic",
CLK_CON_GAT_GOUT_BLK_PERIS_UID_RSTNSYNC_CLK_PERIS_GIC_IPCLKPORT_CLK,
21, 0, 0),
GATE(CLK_GOUT_PERIS_AD_AXI_P_PERIS_ACLKM,
- "gout_peris_ad_axi_p_peris_aclkm", "mout_peris_bus_user",
+ "gout_peris_ad_axi_p_peris_aclkm", "mout_peris_clk_peris_gic",
CLK_CON_GAT_GOUT_BLK_PERIS_UID_AD_AXI_P_PERIS_IPCLKPORT_ACLKM,
21, CLK_IGNORE_UNUSED, 0),
GATE(CLK_GOUT_PERIS_OTP_CON_BIRA_PCLK,
@@ -2600,19 +2600,19 @@ static const struct samsung_gate_clock peris_gate_clks[] __initconst = {
CLK_CON_GAT_GOUT_BLK_PERIS_UID_OTP_CON_BIRA_IPCLKPORT_PCLK,
21, 0, 0),
GATE(CLK_GOUT_PERIS_GIC_CLK,
- "gout_peris_gic_clk", "mout_peris_bus_user",
+ "gout_peris_gic_clk", "mout_peris_clk_peris_gic",
CLK_CON_GAT_GOUT_BLK_PERIS_UID_GIC_IPCLKPORT_CLK,
21, CLK_IS_CRITICAL, 0),
GATE(CLK_GOUT_PERIS_LHM_AXI_P_PERIS_CLK,
- "gout_peris_lhm_axi_p_peris_clk", "oscclk",
+ "gout_peris_lhm_axi_p_peris_clk", "mout_peris_bus_user",
CLK_CON_GAT_GOUT_BLK_PERIS_UID_LHM_AXI_P_PERIS_IPCLKPORT_I_CLK,
21, CLK_IGNORE_UNUSED, 0),
GATE(CLK_GOUT_PERIS_MCT_PCLK,
- "gout_peris_mct_pclk", "mout_peris_clk_peris_gic",
+ "gout_peris_mct_pclk", "mout_peris_bus_user",
CLK_CON_GAT_GOUT_BLK_PERIS_UID_MCT_IPCLKPORT_PCLK,
21, 0, 0),
GATE(CLK_GOUT_PERIS_OTP_CON_TOP_PCLK,
- "gout_peris_otp_con_top_pclk", "mout_peris_clk_peris_gic",
+ "gout_peris_otp_con_top_pclk", "mout_peris_bus_user",
CLK_CON_GAT_GOUT_BLK_PERIS_UID_OTP_CON_TOP_IPCLKPORT_PCLK,
21, 0, 0),
GATE(CLK_GOUT_PERIS_D_TZPC_PERIS_PCLK,
@@ -2624,7 +2624,7 @@ static const struct samsung_gate_clock peris_gate_clks[] __initconst = {
CLK_CON_GAT_GOUT_BLK_PERIS_UID_TMU_SUB_IPCLKPORT_PCLK,
21, 0, 0),
GATE(CLK_GOUT_PERIS_TMU_TOP_PCLK,
- "gout_peris_tmu_top_pclk", "mout_peris_clk_peris_gic",
+ "gout_peris_tmu_top_pclk", "mout_peris_bus_user",
CLK_CON_GAT_GOUT_BLK_PERIS_UID_TMU_TOP_IPCLKPORT_PCLK,
21, 0, 0),
GATE(CLK_GOUT_PERIS_OTP_CON_BIRA_OSCCLK,
--
2.54.0
^ permalink raw reply related
* Re: [PATCH v2 02/16] device property: Add fwnode_graph_get_next_port_endpoint()
From: Andy Shevchenko @ 2026-06-13 13:00 UTC (permalink / raw)
To: Chen-Yu Tsai
Cc: Bartosz Golaszewski, Greg Kroah-Hartman, Daniel Scally,
Heikki Krogerus, Sakari Ailus, Rafael J. Wysocki,
Danilo Krummrich, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Matthias Brugger, AngeloGioacchino Del Regno, Alan Stern,
linux-acpi, driver-core, linux-pm, linux-usb, devicetree,
linux-mediatek, linux-arm-kernel, linux-kernel,
Manivannan Sadhasivam
In-Reply-To: <CAGXv+5EHHWfiWgqPpf-RMKoSQLc2cd9OA4Z36SNoL5C53kVh2g@mail.gmail.com>
On Fri, Jun 12, 2026 at 04:20:18PM +0900, Chen-Yu Tsai wrote:
> On Wed, Jun 10, 2026 at 11:08 PM Andy Shevchenko
> <andriy.shevchenko@linux.intel.com> wrote:
> > On Wed, Jun 10, 2026 at 04:40:36PM +0800, Chen-Yu Tsai wrote:
...
> > > +struct fwnode_handle *fwnode_graph_get_next_port_endpoint(const struct fwnode_handle *port,
> > > + struct fwnode_handle *prev)
> > > +{
> > > + struct fwnode_handle *ep;
> >
> > Unused?
> >
> > > + while (1) {
> >
> > This is usually harder to read and follow. It's like "pay much attention on
> > the code", but here no rocket science, no code to really pay attention to.
> >
> > > + prev = fwnode_get_next_child_node(port, prev);
> > > + if (!prev)
> > > + break;
> > > +
> > > + if (WARN(!fwnode_name_eq(prev, "endpoint"),
> > > + "non endpoint node is used (%pfw)", prev))
> > > + continue;
> > > +
> > > + break;
> > > + }
> > > +
> > > + return prev;
> > > +}
> >
> > So, this can be rewritten as
> >
> > ep = prev;
> > do {
> > ep = fwnode_get_next_child_node(port, ep);
> > if (fwnode_name_eq(ep, "endpoint"))
> > break;
> >
> > WARN_ON(ep, ...);
> > } while (ep);
> >
> > return ep;
> >
> > But also big question why? to WARN*(). There is no use in the entire
> > property.c.
>
> Will drop. This function was lifted from drivers/of/property.c then
> adapted to the fwnode APIs, so it still has the structure of its
> origin. With the WARN() gone, rewriting it as do {} while() becomes:
>
> do {
> prev = fwnode_get_next_child_node(port, prev);
> if (prev && fwnode_name_eq(prev, "endpoint"))
'prev &&' is not needed.
> break;
> } while (prev);
>
> return prev;
--
With Best Regards,
Andy Shevchenko
^ permalink raw reply
* [PATCH] iommu/arm-smmu-v3: Add tracepoint for EVTQ events
From: Chen Jun @ 2026-06-13 13:00 UTC (permalink / raw)
To: will, robin.murphy, joro, linux-kernel, linux-arm-kernel
Cc: chenjun102, zhangyuwei20
Events reported by the SMMU can severely impact accelerator
performance. Currently, only events that the SMMU fails to handle are
printed to the kernel log, leaving most events invisible to users.
To analyze and optimize accelerator performance, complete visibility
into all SMMU-reported events is required.
Add a tracepoint in the EVTQ interrupt handler to capture every
event record reported by the SMMU. This allows users to collect all
event information via ftrace/perf for further analysis, complementing
the existing event decoder and error dump which only cover a subset
of events.
Signed-off-by: Chen Jun <chenjun102@huawei.com>
---
drivers/iommu/arm/arm-smmu-v3/Makefile | 2 +-
drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 3 ++
drivers/iommu/arm/arm-smmu-v3/trace.c | 9 ++++
drivers/iommu/arm/arm-smmu-v3/trace.h | 53 +++++++++++++++++++++
4 files changed, 66 insertions(+), 1 deletion(-)
create mode 100644 drivers/iommu/arm/arm-smmu-v3/trace.c
create mode 100644 drivers/iommu/arm/arm-smmu-v3/trace.h
diff --git a/drivers/iommu/arm/arm-smmu-v3/Makefile b/drivers/iommu/arm/arm-smmu-v3/Makefile
index 493a659cc66b..63a8d71bfc93 100644
--- a/drivers/iommu/arm/arm-smmu-v3/Makefile
+++ b/drivers/iommu/arm/arm-smmu-v3/Makefile
@@ -1,6 +1,6 @@
# SPDX-License-Identifier: GPL-2.0
obj-$(CONFIG_ARM_SMMU_V3) += arm_smmu_v3.o
-arm_smmu_v3-y := arm-smmu-v3.o
+arm_smmu_v3-y := arm-smmu-v3.o trace.o
arm_smmu_v3-$(CONFIG_ARM_SMMU_V3_IOMMUFD) += arm-smmu-v3-iommufd.o
arm_smmu_v3-$(CONFIG_ARM_SMMU_V3_SVA) += arm-smmu-v3-sva.o
arm_smmu_v3-$(CONFIG_TEGRA241_CMDQV) += tegra241-cmdqv.o
diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
index e8d7dbe495f0..85e6c25b73ed 100644
--- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
+++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
@@ -34,6 +34,8 @@
#include "arm-smmu-v3.h"
#include "../../dma-iommu.h"
+#include "trace.h"
+
static bool disable_msipolling;
module_param(disable_msipolling, bool, 0444);
MODULE_PARM_DESC(disable_msipolling,
@@ -2271,6 +2273,7 @@ static irqreturn_t arm_smmu_evtq_thread(int irq, void *dev)
do {
while (!queue_remove_raw(q, evt)) {
+ trace_smmu_evtq_event(smmu, evt);
arm_smmu_decode_event(smmu, evt, &event);
if (arm_smmu_handle_event(smmu, evt, &event))
arm_smmu_dump_event(smmu, evt, &event, &rs);
diff --git a/drivers/iommu/arm/arm-smmu-v3/trace.c b/drivers/iommu/arm/arm-smmu-v3/trace.c
new file mode 100644
index 000000000000..77378698b1a3
--- /dev/null
+++ b/drivers/iommu/arm/arm-smmu-v3/trace.c
@@ -0,0 +1,9 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * ARM SMMUv3 trace support
+ *
+ * Copyright (c) 2026 OpenCloudOS / openEuler
+ */
+
+#define CREATE_TRACE_POINTS
+#include "trace.h"
diff --git a/drivers/iommu/arm/arm-smmu-v3/trace.h b/drivers/iommu/arm/arm-smmu-v3/trace.h
new file mode 100644
index 000000000000..7cec8d41745e
--- /dev/null
+++ b/drivers/iommu/arm/arm-smmu-v3/trace.h
@@ -0,0 +1,53 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * ARM SMMUv3 trace support
+ *
+ * Copyright (c) 2026 OpenCloudOS / openEuler
+ */
+
+#undef TRACE_SYSTEM
+#define TRACE_SYSTEM arm_smmu_v3
+
+#if !defined(_TRACE_ARM_SMMU_V3_H) || defined(TRACE_HEADER_MULTI_READ)
+#define _TRACE_ARM_SMMU_V3_H
+
+#include <linux/tracepoint.h>
+
+#include "arm-smmu-v3.h"
+
+TRACE_EVENT(smmu_evtq_event,
+
+ TP_PROTO(struct arm_smmu_device *smmu, u64 *evt),
+
+ TP_ARGS(smmu, evt),
+
+ TP_STRUCT__entry(
+ __string(iommu, dev_name(smmu->dev))
+ __field(u64, evt0)
+ __field(u64, evt1)
+ __field(u64, evt2)
+ __field(u64, evt3)
+ ),
+
+ TP_fast_assign(
+ __assign_str(iommu);
+ __entry->evt0 = evt[0];
+ __entry->evt1 = evt[1];
+ __entry->evt2 = evt[2];
+ __entry->evt3 = evt[3];
+ ),
+
+ TP_printk("%s evt: 0x%016llx 0x%016llx 0x%016llx 0x%016llx",
+ __get_str(iommu),
+ __entry->evt0, __entry->evt1,
+ __entry->evt2, __entry->evt3)
+);
+
+#endif /* _TRACE_ARM_SMMU_V3_H */
+
+/* This part must be outside protection */
+#undef TRACE_INCLUDE_PATH
+#undef TRACE_INCLUDE_FILE
+#define TRACE_INCLUDE_PATH ../../drivers/iommu/arm/arm-smmu-v3/
+#define TRACE_INCLUDE_FILE trace
+#include <trace/define_trace.h>
--
2.22.0
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