From: Mayank Rana <mayank.rana@oss.qualcomm.com>
To: linux-pci@vger.kernel.org, lpieralisi@kernel.org, kw@linux.com,
robh@kernel.org, bhelgaas@google.com, andersson@kernel.org,
manivannan.sadhasivam@linaro.org,
krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org,
devicetree@vger.kernel.org
Cc: linux-arm-msm@vger.kernel.org, quic_ramkri@quicinc.com,
quic_nkela@quicinc.com, quic_shazhuss@quicinc.com,
quic_msarkar@quicinc.com, quic_nitegupt@quicinc.com
Subject: Re: [PATCH v4 0/4] Add Qualcomm SA8255p based firmware managed PCIe root complex
Date: Wed, 4 Jun 2025 10:38:06 -0700 [thread overview]
Message-ID: <584d217a-e8df-4dbe-ad70-2c69597a0545@oss.qualcomm.com> (raw)
In-Reply-To: <20250522001425.1506240-1-mayank.rana@oss.qualcomm.com>
Hi Mani
As we discussed previously, I resumed working on this functionality.
Please help with reviewing this patchset.
Regards,
Mayank
On 5/21/2025 5:14 PM, Mayank Rana wrote:
> Based on received feedback, this patch series adds support with existing
> Linux qcom-pcie.c driver to get PCIe host root complex functionality on
> Qualcomm SA8255P auto platform.
>
> 1. Interface to allow requesting firmware to manage system resources and
> performing PCIe Link up (devicetree binding in terms of power domain and
> runtime PM APIs is used in driver)
>
> 2. SA8255P is using Synopsys Designware PCIe controller which supports MSI
> controller. Using existing MSI controller based functionality by exporting
> important pcie dwc core driver based MSI APIs, and using those from
> pcie-qcom.c driver.
>
> Below architecture is used on Qualcomm SA8255P auto platform to get ECAM
> compliant PCIe controller based functionality. Here firmware VM based PCIe
> driver takes care of resource management and performing PCIe link related
> handling (D0 and D3cold). Linux pcie-qcom.c driver uses power domain to
> request firmware VM to perform these operations using SCMI interface.
> --------------------
>
>
> ┌────────────────────────┐
> │ │
> ┌──────────────────────┐ │ SHARED MEMORY │ ┌──────────────────────────┐
> │ Firmware VM │ │ │ │ Linux VM │
> │ ┌─────────┐ │ │ │ │ ┌────────────────┐ │
> │ │ Drivers │ ┌──────┐ │ │ │ │ │ PCIE Qcom │ │
> │ │ PCIE PHY◄─┤ │ │ │ ┌────────────────┐ │ │ │ driver │ │
> │ │ │ │ SCMI │ │ │ │ │ │ │ │ │ │
> │ │PCIE CTL │ │ │ ├─────────┼───► PCIE ◄───┼─────┐ │ └──┬──────────▲──┘ │
> │ │ ├─►Server│ │ │ │ SHMEM │ │ │ │ │ │ │
> │ │Clk, Vreg│ │ │ │ │ │ │ │ │ │ ┌──▼──────────┴──┐ │
> │ │GPIO,GDSC│ └─▲──┬─┘ │ │ └────────────────┘ │ └──────┼────┤PCIE SCMI Inst │ │
> │ └─────────┘ │ │ │ │ │ │ └──▲──────────┬──┘ │
> │ │ │ │ │ │ │ │ │ │
> └───────────────┼──┼───┘ │ │ └───────┼──────────┼───────┘
> │ │ │ │ │ │
> │ │ └────────────────────────┘ │ │
> │ │ │ │
> │ │ │ │
> │ │ │ │
> │ │ │IRQ │HVC
> IRQ │ │HVC │ │
> │ │ │ │
> │ │ │ │
> │ │ │ │
> ┌─────────────────┴──▼───────────────────────────────────────────────────────────┴──────────▼──────────────┐
> │ │
> │ │
> │ HYPERVISOR │
> │ │
> │ │
> │ │
> └──────────────────────────────────────────────────────────────────────────────────────────────────────────┘
>
> ┌─────────────┐ ┌─────────────┐ ┌──────────┐ ┌───────────┐ ┌─────────────┐ ┌────────────┐
> │ │ │ │ │ │ │ │ │ PCIE │ │ PCIE │
> │ CLOCK │ │ REGULATOR │ │ GPIO │ │ GDSC │ │ PHY │ │ controller │
> └─────────────┘ └─────────────┘ └──────────┘ └───────────┘ └─────────────┘ └────────────┘
> -----------------
> Changes in v4:
> - Addressed provided review comments from reviewers
> Link to v3: https://lore.kernel.org/lkml/20241106221341.2218416-1-quic_mrana@quicinc.com/
>
> Changes in v3:
> - Drop usage of PCIE host generic driver usage, and splitting of MSI functionality
> - Modified existing pcie-qcom.c driver to add support for getting ECAM compliant and firmware managed
> PCIe root complex functionality
> Link to v2: https://lore.kernel.org/linux-arm-kernel/925d1eca-975f-4eec-bdf8-ca07a892361a@quicinc.com/T/
>
> Changes in v2:
> - Drop new PCIe Qcom ECAM driver, and use existing PCIe designware based MSI functionality
> - Add power domain based functionality within existing ECAM driver
> Link to v1: https://lore.kernel.org/all/d10199df-5fb3-407b-b404-a0a4d067341f@quicinc.com/T/
>
> Tested:
> - Validated NVME functionality with PCIe1 on SA8255P-RIDE platform
>
> Mayank Rana (4):
> PCI: dwc: Export dwc MSI controller related APIs
> PCI: host-generic: Rename and export gen_pci_init() API to allow ECAM
> creation
> dt-bindings: PCI: qcom,pcie-sa8255p: Document ECAM compliant PCIe root
> complex
> PCI: qcom: Add Qualcomm SA8255p based PCIe root complex functionality
>
> .../bindings/pci/qcom,pcie-sa8255p.yaml | 103 ++++++++++++++++
> drivers/pci/controller/dwc/Kconfig | 1 +
> .../pci/controller/dwc/pcie-designware-host.c | 38 +++---
> drivers/pci/controller/dwc/pcie-designware.h | 14 +++
> drivers/pci/controller/dwc/pcie-qcom.c | 114 ++++++++++++++++--
> drivers/pci/controller/pci-host-common.c | 5 +-
> include/linux/pci-ecam.h | 2 +
> 7 files changed, 248 insertions(+), 29 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/pci/qcom,pcie-sa8255p.yaml
>
next prev parent reply other threads:[~2025-06-04 17:39 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-05-22 0:14 [PATCH v4 0/4] Add Qualcomm SA8255p based firmware managed PCIe root complex Mayank Rana
2025-05-22 0:14 ` [PATCH v4 1/4] PCI: dwc: Export dwc MSI controller related APIs Mayank Rana
2025-05-22 0:14 ` [PATCH v4 2/4] PCI: host-generic: Rename and export gen_pci_init() to allow ECAM creation Mayank Rana
2025-05-22 0:14 ` [PATCH v4 3/4] dt-bindings: PCI: qcom,pcie-sa8255p: Document ECAM compliant PCIe root complex Mayank Rana
2025-06-04 17:42 ` Mayank Rana
2025-06-05 17:28 ` Rob Herring (Arm)
2025-05-22 0:14 ` [PATCH v4 4/4] PCI: qcom: Add support for Qualcomm SA8255p based " Mayank Rana
2025-06-04 17:38 ` Mayank Rana [this message]
2025-06-12 21:24 ` [PATCH v4 0/4] Add Qualcomm SA8255p based firmware managed " Mayank Rana
2025-06-13 9:29 ` Manivannan Sadhasivam
2025-06-16 18:08 ` Mayank Rana
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