Re: [PATCH v2 1/3] dt-bindings: interconnect: qcom,qcs8300-rpmh: add clocks property to enable QoS

[Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>]

On 1/27/26 10:01 AM, Odelu Kukatla wrote:
> Some QCS8300 interconnect nodes have QoS registers located inside
> a block whose interface is clock-gated. For those nodes, driver
> must enable the corresponding clock(s) before accessing the
> registers. Add the 'clocks' property so the driver can obtain
> and enable the required clock(s).
> 
> Only interconnects that have clock‑gated QoS register interface
> use this property; it is not applicable to all interconnect nodes.
> 
> Signed-off-by: Odelu Kukatla <odelu.kukatla@oss.qualcomm.com>
> ---

[...]

> +            - description: aggre UFS PHY AXI clock
> +            - description: aggre QUP PRIM AXI clock
> +            - description: aggre USB2 PRIM AXI clock
> +            - description: aggre USB3 PRIM AXI clock

LeMans has one more USB3 clock here, but it also happens to have
1 more USB3 host, so that checks out

> +
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            enum:
> +              - qcom,qcs8300-aggre2-noc
> +    then:
> +      properties:
> +        clocks:
> +          items:
> +            - description: RPMH CC IPA clock

LeMans also has ufscard clk here

> +
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            enum:
> +              - qcom,qcs8300-gem-noc
> +    then:
> +      properties:
> +        clocks:
> +          items:
> +            - description: GCC DDRSS GPU AXI clock

and lacks this one

Are there actual reasons for these differences?

Konrad