Re: [PATCH v2 1/3] dt-bindings: interconnect: qcom,qcs8300-rpmh: add clocks property to enable QoS

[Odelu Kukatla <odelu.kukatla@oss.qualcomm.com>]

On 1/27/2026 4:24 PM, Konrad Dybcio wrote:
> On 1/27/26 10:01 AM, Odelu Kukatla wrote:
>> Some QCS8300 interconnect nodes have QoS registers located inside
>> a block whose interface is clock-gated. For those nodes, driver
>> must enable the corresponding clock(s) before accessing the
>> registers. Add the 'clocks' property so the driver can obtain
>> and enable the required clock(s).
>>
>> Only interconnects that have clock‑gated QoS register interface
>> use this property; it is not applicable to all interconnect nodes.
>>
>> Signed-off-by: Odelu Kukatla <odelu.kukatla@oss.qualcomm.com>
>> ---
> 
> [...]
> 
>> +            - description: aggre UFS PHY AXI clock
>> +            - description: aggre QUP PRIM AXI clock
>> +            - description: aggre USB2 PRIM AXI clock
>> +            - description: aggre USB3 PRIM AXI clock
> 
> LeMans has one more USB3 clock here, but it also happens to have
> 1 more USB3 host, so that checks out
> 

Thanks for the review, Konrad!

On aggre1 noc, QCS8300 has only a single USB3 path, which corresponds to
the clock in the binding. LeMans includes an additional USB3 host block,
and therefore has an extra USB3 related clock that QCS8300 does not
have. The difference reflects a real hardware variation between the two
platforms.

>> +
>> +  - if:
>> +      properties:
>> +        compatible:
>> +          contains:
>> +            enum:
>> +              - qcom,qcs8300-aggre2-noc
>> +    then:
>> +      properties:
>> +        clocks:
>> +          items:
>> +            - description: RPMH CC IPA clock
> 
> LeMans also has ufscard clk here
> 

For aggre2 noc, QCS8300 does not integrate the ufscard controller
present on LeMans, so that clock is not part of the QCS8300 hardware.
The only QoS relevant clock on this node for QCS8300 is the RPMH CC IPA
clock, which is why only that one appears in the binding.

>> +
>> +  - if:
>> +      properties:
>> +        compatible:
>> +          contains:
>> +            enum:
>> +              - qcom,qcs8300-gem-noc
>> +    then:
>> +      properties:
>> +        clocks:
>> +          items:
>> +            - description: GCC DDRSS GPU AXI clock
> 
> and lacks this one
> 
> Are there actual reasons for these differences?
> 

The gem noc QoS interface on QCS8300 requires the DDRSS GPU AXI clock to
be enabled for QoS register access, so it is listed in the binding. The
difference is therefore due to SoC level differences.

Thanks,
Odelu

> Konrad