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From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
To: Odelu Kukatla <odelu.kukatla@oss.qualcomm.com>,
	Georgi Djakov <djakov@kernel.org>, Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Bjorn Andersson <andersson@kernel.org>,
	Konrad Dybcio <konradybcio@kernel.org>
Cc: Raviteja Laggyshetty <raviteja.laggyshetty@oss.qualcomm.com>,
	Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>,
	Bartosz Golaszewski <bartosz.golaszewski@linaro.org>,
	linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	Mike Tipton <mike.tipton@oss.qualcomm.com>
Subject: Re: [PATCH v2 1/3] dt-bindings: interconnect: qcom,qcs8300-rpmh: add clocks property to enable QoS
Date: Thu, 29 Jan 2026 11:32:54 +0100	[thread overview]
Message-ID: <d50ef396-5d02-4b26-89aa-1a9d2950a290@oss.qualcomm.com> (raw)
In-Reply-To: <ee02056d-34a4-4300-acab-98fc50c43a0b@oss.qualcomm.com>

On 1/29/26 11:10 AM, Odelu Kukatla wrote:
> 
> 
> On 1/27/2026 4:24 PM, Konrad Dybcio wrote:
>> On 1/27/26 10:01 AM, Odelu Kukatla wrote:
>>> Some QCS8300 interconnect nodes have QoS registers located inside
>>> a block whose interface is clock-gated. For those nodes, driver
>>> must enable the corresponding clock(s) before accessing the
>>> registers. Add the 'clocks' property so the driver can obtain
>>> and enable the required clock(s).
>>>
>>> Only interconnects that have clock‑gated QoS register interface
>>> use this property; it is not applicable to all interconnect nodes.
>>>
>>> Signed-off-by: Odelu Kukatla <odelu.kukatla@oss.qualcomm.com>
>>> ---

[...]

>>> +  - if:
>>> +      properties:
>>> +        compatible:
>>> +          contains:
>>> +            enum:
>>> +              - qcom,qcs8300-aggre2-noc
>>> +    then:
>>> +      properties:
>>> +        clocks:
>>> +          items:
>>> +            - description: RPMH CC IPA clock
>>
>> LeMans also has ufscard clk here
>>
> 
> For aggre2 noc, QCS8300 does not integrate the ufscard controller
> present on LeMans, so that clock is not part of the QCS8300 hardware.
> The only QoS relevant clock on this node for QCS8300 is the RPMH CC IPA
> clock, which is why only that one appears in the binding.

Ohhh I forgot UFSCard translated to UFS1..


>>> +
>>> +  - if:
>>> +      properties:
>>> +        compatible:
>>> +          contains:
>>> +            enum:
>>> +              - qcom,qcs8300-gem-noc
>>> +    then:
>>> +      properties:
>>> +        clocks:
>>> +          items:
>>> +            - description: GCC DDRSS GPU AXI clock
>>
>> and lacks this one
>>
>> Are there actual reasons for these differences?
>>
> 
> The gem noc QoS interface on QCS8300 requires the DDRSS GPU AXI clock to
> be enabled for QoS register access, so it is listed in the binding. The
> difference is therefore due to SoC level differences.

Alright, thanks

Konrad

  reply	other threads:[~2026-01-29 10:32 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-01-27  9:01 [PATCH v2 0/3] Enable QoS configuration on QCS8300 Odelu Kukatla
2026-01-27  9:01 ` [PATCH v2 1/3] dt-bindings: interconnect: qcom,qcs8300-rpmh: add clocks property to enable QoS Odelu Kukatla
2026-01-27 10:54   ` Konrad Dybcio
2026-01-29 10:10     ` Odelu Kukatla
2026-01-29 10:32       ` Konrad Dybcio [this message]
2026-02-05 12:28   ` Krzysztof Kozlowski
2026-01-27  9:01 ` [PATCH v2 2/3] interconnect: qcom: qcs8300: enable QoS configuration Odelu Kukatla
2026-02-04  2:54   ` Dmitry Baryshkov
2026-01-27  9:01 ` [PATCH v2 3/3] arm64: dts: qcom: qcs8300: Add clocks for " Odelu Kukatla
2026-02-04  2:59   ` Dmitry Baryshkov
2026-03-18 13:50 ` (subset) [PATCH v2 0/3] Enable QoS configuration on QCS8300 Bjorn Andersson

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