* [PATCH v2 0/2] Enable DPU and Display Port for Qualcomm QCS8300-ride platform
@ 2024-12-26 10:43 Yongxing Mou
2024-12-26 10:43 ` [PATCH v2 1/2] arm64: dts: qcom: qcs8300: add display dt nodes for MDSS, DPU, DisplayPort and eDP PHY Yongxing Mou
` (2 more replies)
0 siblings, 3 replies; 7+ messages in thread
From: Yongxing Mou @ 2024-12-26 10:43 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: linux-arm-msm, devicetree, linux-kernel, Yongxing Mou
This series adds the MDSS, DPU and DPTX0 node on Qualcomm QCS8300 SoC.
It also enables Display Port on Qualcomm QCS8300-ride platform.
Signed-off-by: Yongxing Mou <quic_yongmou@quicinc.com>
---
This series depends on following series:
https://lore.kernel.org/all/20241203-qcs8300_initial_dtsi-v4-2-d7c953484024@quicinc.com/
https://lore.kernel.org/all/20241106-qcs8300-mm-patches-v3-0-f611a8f87f15@quicinc.com/
https://lore.kernel.org/all/20241114-qcs8300-mm-cc-dt-patch-v1-1-7a974508c736@quicinc.com/
https://lore.kernel.org/all/20241024-defconfig_sa8775p_clock_controllers-v2-1-a9e1cdaed785@quicinc.com/
https://lore.kernel.org/all/20241226-mdssdt_qcs8300-v2-0-acba0db533ce@quicinc.com/
---
Changes in v2:Fixed review comments from Konrad, Dmitry and Krzysztof.
- Reuse eDP PHY and DPU of SA8775 Platform.[Dmitry][Krzysztof]
- Reuse DisplayPort controller of SM8650.[Dmitry]
- Correct the regs length, format issues and power-domains.[Konrad]
- Integrate the dt changes of DPU and DP together.
- Link to v1: https://lore.kernel.org/all/20241127-dp_dts_qcs8300-v1-0-e3d13dec4233@quicinc.com/
~
---
Yongxing Mou (2):
arm64: dts: qcom: qcs8300: add display dt nodes for MDSS, DPU, DisplayPort and eDP PHY
arm64: dts: qcom: qcs8300-ride: Enable Display Port
arch/arm64/boot/dts/qcom/qcs8300-ride.dts | 44 +++++++
arch/arm64/boot/dts/qcom/qcs8300.dtsi | 204 +++++++++++++++++++++++++++++-
2 files changed, 247 insertions(+), 1 deletion(-)
---
base-commit: 8155b4ef3466f0e289e8fcc9e6e62f3f4dceeac2
change-id: 20241225-dts_qcs8300-4d4299067306
prerequisite-message-id: <20241203-qcs8300_initial_dtsi-v4-2-d7c953484024@quicinc.com>
prerequisite-patch-id: 33f2488a8eb133431f200e17aac743598508dcf3
prerequisite-patch-id: 7b653ebeaf1ca3f87620ccf7d876e3d1fe496c4a
prerequisite-patch-id: e1b60af8a64332e5f0ecbd3a4ea2b6e090bd97cf
prerequisite-patch-id: b823d744d2fb302e2496eaf0cf0c9c66312dcf2a
prerequisite-message-id: <20241106-qcs8300-mm-patches-v3-0-f611a8f87f15@quicinc.com>
prerequisite-patch-id: 367d9c742fe5087cfa6fb8e7b05ebe9bc78d68f3
prerequisite-patch-id: ee0513c070ab96e63766d235b38ee53ca9b19181
prerequisite-patch-id: 970974160bcdc837ccbe5ea3b5dcac582e90bc0d
prerequisite-patch-id: 5b2bd9cc44a529b0b9e5d73128dca5d2ff9f2f44
prerequisite-patch-id: 6a0a81242e1d0f051e3102533bf0191615c6e96b
prerequisite-patch-id: 322540ce6d45c32f813ecef50e5135c6f08d9019
prerequisite-message-id: <20241114-qcs8300-mm-cc-dt-patch-v1-1-7a974508c736@quicinc.com>
prerequisite-patch-id: 8faad5c6d8ca255935d3e4d317dcbcc32b8261ff
prerequisite-message-id: <20241024-defconfig_sa8775p_clock_controllers-v2-1-a9e1cdaed785@quicinc.com>
prerequisite-patch-id: 81378ec66ab6e569bd828401c43c4f5af55db32c
prerequisite-message-id: <20241226-mdssdt_qcs8300-v2-0-acba0db533ce@quicinc.com>
prerequisite-patch-id: b798711c6a9bd9c4f0b692835865235e78cd2adb
prerequisite-patch-id: 146c61567c42bf5268d1005f8e9b307ea2af93d9
prerequisite-patch-id: 3ce5246ad3470d7392df23a52b3c8b8bd1662db6
prerequisite-patch-id: 2ea89bba3c9c6ba37250ebd947c1d4acedc78a5d
prerequisite-patch-id: e81de8a09467a49eaeb4af73a0e197e4156ce202
Best regards,
--
Yongxing Mou <quic_yongmou@quicinc.com>
^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH v2 1/2] arm64: dts: qcom: qcs8300: add display dt nodes for MDSS, DPU, DisplayPort and eDP PHY
2024-12-26 10:43 [PATCH v2 0/2] Enable DPU and Display Port for Qualcomm QCS8300-ride platform Yongxing Mou
@ 2024-12-26 10:43 ` Yongxing Mou
2024-12-30 14:34 ` Konrad Dybcio
2024-12-26 10:43 ` [PATCH v2 2/2] arm64: dts: qcom: qcs8300-ride: Enable Display Port Yongxing Mou
2024-12-27 15:18 ` [PATCH v2 0/2] Enable DPU and Display Port for Qualcomm QCS8300-ride platform Rob Herring (Arm)
2 siblings, 1 reply; 7+ messages in thread
From: Yongxing Mou @ 2024-12-26 10:43 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: linux-arm-msm, devicetree, linux-kernel, Yongxing Mou
Add devicetree changes to enable MDSS display-subsystem,
display-controller(DPU), DisplayPort controller and eDP PHY for
Qualcomm QCS8300 platform.
Signed-off-by: Yongxing Mou <quic_yongmou@quicinc.com>
---
arch/arm64/boot/dts/qcom/qcs8300.dtsi | 204 +++++++++++++++++++++++++++++++++-
1 file changed, 203 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/qcs8300.dtsi b/arch/arm64/boot/dts/qcom/qcs8300.dtsi
index 80226992a65d867124b33dfa490c3c9ca1030c75..8d88fe4a266432f05192d7ef0dd80362bdbdab85 100644
--- a/arch/arm64/boot/dts/qcom/qcs8300.dtsi
+++ b/arch/arm64/boot/dts/qcom/qcs8300.dtsi
@@ -952,6 +952,206 @@ camcc: clock-controller@ade0000 {
#power-domain-cells = <1>;
};
+ mdss: display-subsystem@ae00000 {
+ compatible = "qcom,qcs8300-mdss";
+ reg = <0x0 0x0ae00000 0x0 0x1000>;
+ reg-names = "mdss";
+
+ interconnects = <&mmss_noc MASTER_MDP0 QCOM_ICC_TAG_ACTIVE_ONLY
+ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY>,
+ <&mmss_noc MASTER_MDP1 QCOM_ICC_TAG_ACTIVE_ONLY
+ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY>,
+ <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
+ &config_noc SLAVE_DISPLAY_CFG QCOM_ICC_TAG_ACTIVE_ONLY>;
+ interconnect-names = "mdp0-mem",
+ "mdp1-mem",
+ "cpu-cfg";
+
+ resets = <&dispcc MDSS_DISP_CC_MDSS_CORE_BCR>;
+
+ power-domains = <&dispcc MDSS_DISP_CC_MDSS_CORE_GDSC>;
+
+ clocks = <&dispcc MDSS_DISP_CC_MDSS_AHB_CLK>,
+ <&gcc GCC_DISP_HF_AXI_CLK>,
+ <&dispcc MDSS_DISP_CC_MDSS_MDP_CLK>;
+
+ interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ iommus = <&apps_smmu 0x1000 0x402>;
+
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ status = "disabled";
+
+ mdss_mdp: display-controller@ae01000 {
+ compatible = "qcom,qcs8300-dpu", "qcom,sa8775p-dpu";
+ reg = <0x0 0x0ae01000 0x0 0x8f000>,
+ <0x0 0x0aeb0000 0x0 0x2008>;
+ reg-names = "mdp", "vbif";
+
+ clocks = <&gcc GCC_DISP_HF_AXI_CLK>,
+ <&dispcc MDSS_DISP_CC_MDSS_AHB_CLK>,
+ <&dispcc MDSS_DISP_CC_MDSS_MDP_LUT_CLK>,
+ <&dispcc MDSS_DISP_CC_MDSS_MDP_CLK>,
+ <&dispcc MDSS_DISP_CC_MDSS_VSYNC_CLK>;
+ clock-names = "bus",
+ "iface",
+ "lut",
+ "core",
+ "vsync";
+
+ assigned-clocks = <&dispcc MDSS_DISP_CC_MDSS_VSYNC_CLK>;
+ assigned-clock-rates = <19200000>;
+
+ operating-points-v2 = <&mdp_opp_table>;
+ power-domains = <&rpmhpd RPMHPD_MMCX>;
+
+ interrupt-parent = <&mdss>;
+ interrupts = <0>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ dpu_intf0_out: endpoint {
+ remote-endpoint = <&mdss_dp0_in>;
+ };
+ };
+ };
+
+ mdp_opp_table: opp-table {
+ compatible = "operating-points-v2";
+
+ opp-375000000 {
+ opp-hz = /bits/ 64 <375000000>;
+ required-opps = <&rpmhpd_opp_svs_l1>;
+ };
+
+ opp-500000000 {
+ opp-hz = /bits/ 64 <500000000>;
+ required-opps = <&rpmhpd_opp_nom>;
+ };
+
+ opp-575000000 {
+ opp-hz = /bits/ 64 <575000000>;
+ required-opps = <&rpmhpd_opp_turbo>;
+ };
+
+ opp-650000000 {
+ opp-hz = /bits/ 64 <650000000>;
+ required-opps = <&rpmhpd_opp_turbo_l1>;
+ };
+ };
+ };
+
+ mdss_dp0_phy: phy@aec2a00 {
+ compatible = "qcom,qcs8300-edp-phy", "qcom,sa8775p-edp-phy";
+
+ reg = <0x0 0x0aec2a00 0x0 0x19c>,
+ <0x0 0x0aec2200 0x0 0xec>,
+ <0x0 0x0aec2600 0x0 0xec>,
+ <0x0 0x0aec2000 0x0 0x1c8>;
+
+ clocks = <&dispcc MDSS_DISP_CC_MDSS_DPTX0_AUX_CLK>,
+ <&dispcc MDSS_DISP_CC_MDSS_AHB_CLK>;
+ clock-names = "aux",
+ "cfg_ahb";
+
+ power-domains = <&rpmhpd RPMHPD_MMCX>;
+
+ #clock-cells = <1>;
+ #phy-cells = <0>;
+
+ status = "disabled";
+ };
+
+ mdss_dp0: displayport-controller@af54000 {
+ compatible = "qcom,qcs8300-dp", "qcom,sm8650-dp";
+
+ reg = <0x0 0x0af54000 0x0 0x200>,
+ <0x0 0x0af54200 0x0 0x200>,
+ <0x0 0x0af55000 0x0 0xc00>,
+ <0x0 0x0af56000 0x0 0x400>;
+
+ interrupt-parent = <&mdss>;
+ interrupts = <12>;
+
+ clocks = <&dispcc MDSS_DISP_CC_MDSS_AHB_CLK>,
+ <&dispcc MDSS_DISP_CC_MDSS_DPTX0_AUX_CLK>,
+ <&dispcc MDSS_DISP_CC_MDSS_DPTX0_LINK_CLK>,
+ <&dispcc MDSS_DISP_CC_MDSS_DPTX0_LINK_INTF_CLK>,
+ <&dispcc MDSS_DISP_CC_MDSS_DPTX0_PIXEL0_CLK>;
+ clock-names = "core_iface",
+ "core_aux",
+ "ctrl_link",
+ "ctrl_link_iface",
+ "stream_pixel";
+ assigned-clocks = <&dispcc MDSS_DISP_CC_MDSS_DPTX0_LINK_CLK_SRC>,
+ <&dispcc MDSS_DISP_CC_MDSS_DPTX0_PIXEL0_CLK_SRC>;
+ assigned-clock-parents = <&mdss_dp0_phy 0>,
+ <&mdss_dp0_phy 1>;
+ phys = <&mdss_dp0_phy>;
+ phy-names = "dp";
+
+ operating-points-v2 = <&dp_opp_table>;
+ power-domains = <&rpmhpd RPMHPD_MMCX>;
+
+ #sound-dai-cells = <0>;
+
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ mdss_dp0_in: endpoint {
+ remote-endpoint = <&dpu_intf0_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ mdss_dp0_out: endpoint { };
+ };
+ };
+
+ dp_opp_table: opp-table {
+ compatible = "operating-points-v2";
+
+ opp-160000000 {
+ opp-hz = /bits/ 64 <160000000>;
+ required-opps = <&rpmhpd_opp_low_svs>;
+ };
+
+ opp-270000000 {
+ opp-hz = /bits/ 64 <270000000>;
+ required-opps = <&rpmhpd_opp_svs>;
+ };
+
+ opp-540000000 {
+ opp-hz = /bits/ 64 <540000000>;
+ required-opps = <&rpmhpd_opp_svs_l1>;
+ };
+
+ opp-810000000 {
+ opp-hz = /bits/ 64 <810000000>;
+ required-opps = <&rpmhpd_opp_nom>;
+ };
+ };
+ };
+ };
+
dispcc: clock-controller@af00000 {
compatible = "qcom,sa8775p-dispcc0";
reg = <0x0 0x0af00000 0x0 0x20000>;
@@ -959,7 +1159,9 @@ dispcc: clock-controller@af00000 {
<&rpmhcc RPMH_CXO_CLK>,
<&rpmhcc RPMH_CXO_CLK_A>,
<&sleep_clk>,
- <0>, <0>, <0>, <0>,
+ <&mdss_dp0_phy 0>,
+ <&mdss_dp0_phy 1>,
+ <0>, <0>,
<0>, <0>, <0>, <0>;
power-domains = <&rpmhpd RPMHPD_MMCX>;
#clock-cells = <1>;
--
2.34.1
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH v2 2/2] arm64: dts: qcom: qcs8300-ride: Enable Display Port
2024-12-26 10:43 [PATCH v2 0/2] Enable DPU and Display Port for Qualcomm QCS8300-ride platform Yongxing Mou
2024-12-26 10:43 ` [PATCH v2 1/2] arm64: dts: qcom: qcs8300: add display dt nodes for MDSS, DPU, DisplayPort and eDP PHY Yongxing Mou
@ 2024-12-26 10:43 ` Yongxing Mou
2024-12-30 14:35 ` Konrad Dybcio
2024-12-27 15:18 ` [PATCH v2 0/2] Enable DPU and Display Port for Qualcomm QCS8300-ride platform Rob Herring (Arm)
2 siblings, 1 reply; 7+ messages in thread
From: Yongxing Mou @ 2024-12-26 10:43 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: linux-arm-msm, devicetree, linux-kernel, Yongxing Mou
Enable DPTX0 along with their corresponding PHYs for
qcs8300-ride platform.
Signed-off-by: Yongxing Mou <quic_yongmou@quicinc.com>
---
arch/arm64/boot/dts/qcom/qcs8300-ride.dts | 44 +++++++++++++++++++++++++++++++
1 file changed, 44 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/qcs8300-ride.dts b/arch/arm64/boot/dts/qcom/qcs8300-ride.dts
index 85b84778e85ae712473eee78a8e090c49dfc3721..a41881ad7f85931688b06f20924cc1e744de8ff7 100644
--- a/arch/arm64/boot/dts/qcom/qcs8300-ride.dts
+++ b/arch/arm64/boot/dts/qcom/qcs8300-ride.dts
@@ -21,6 +21,18 @@ aliases {
chosen {
stdout-path = "serial0:115200n8";
};
+
+ dp0-connector {
+ compatible = "dp-connector";
+ label = "DP0";
+ type = "full-size";
+
+ port {
+ dp0_connector_in: endpoint {
+ remote-endpoint = <&mdss_dp0_out>;
+ };
+ };
+ };
};
&apps_rsc {
@@ -196,6 +208,30 @@ vreg_l9c: ldo9 {
};
};
+&mdss {
+ status = "okay";
+};
+
+&mdss_dp0 {
+ pinctrl-0 = <&dp_hot_plug_det>;
+ pinctrl-names = "default";
+
+ status = "okay";
+};
+
+&mdss_dp0_out {
+ data-lanes = <0 1 2 3>;
+ link-frequencies = /bits/ 64 <1620000000 2700000000 5400000000 8100000000>;
+ remote-endpoint = <&dp0_connector_in>;
+};
+
+&mdss_dp0_phy {
+ vdda-phy-supply = <&vreg_l5a>;
+ vdda-pll-supply = <&vreg_l4a>;
+
+ status = "okay";
+};
+
&qupv3_id_0 {
status = "okay";
};
@@ -215,6 +251,14 @@ &remoteproc_gpdsp {
status = "okay";
};
+&tlmm {
+ dp_hot_plug_det: dp-hot-plug-det-state {
+ pins = "gpio94";
+ function = "edp0_hot";
+ bias-disable;
+ };
+};
+
&uart7 {
status = "okay";
};
--
2.34.1
^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH v2 0/2] Enable DPU and Display Port for Qualcomm QCS8300-ride platform
2024-12-26 10:43 [PATCH v2 0/2] Enable DPU and Display Port for Qualcomm QCS8300-ride platform Yongxing Mou
2024-12-26 10:43 ` [PATCH v2 1/2] arm64: dts: qcom: qcs8300: add display dt nodes for MDSS, DPU, DisplayPort and eDP PHY Yongxing Mou
2024-12-26 10:43 ` [PATCH v2 2/2] arm64: dts: qcom: qcs8300-ride: Enable Display Port Yongxing Mou
@ 2024-12-27 15:18 ` Rob Herring (Arm)
2 siblings, 0 replies; 7+ messages in thread
From: Rob Herring (Arm) @ 2024-12-27 15:18 UTC (permalink / raw)
To: Yongxing Mou
Cc: Konrad Dybcio, Conor Dooley, Krzysztof Kozlowski, devicetree,
Bjorn Andersson, linux-kernel, linux-arm-msm
On Thu, 26 Dec 2024 18:43:51 +0800, Yongxing Mou wrote:
> This series adds the MDSS, DPU and DPTX0 node on Qualcomm QCS8300 SoC.
> It also enables Display Port on Qualcomm QCS8300-ride platform.
>
> Signed-off-by: Yongxing Mou <quic_yongmou@quicinc.com>
> ---
> This series depends on following series:
> https://lore.kernel.org/all/20241203-qcs8300_initial_dtsi-v4-2-d7c953484024@quicinc.com/
> https://lore.kernel.org/all/20241106-qcs8300-mm-patches-v3-0-f611a8f87f15@quicinc.com/
> https://lore.kernel.org/all/20241114-qcs8300-mm-cc-dt-patch-v1-1-7a974508c736@quicinc.com/
> https://lore.kernel.org/all/20241024-defconfig_sa8775p_clock_controllers-v2-1-a9e1cdaed785@quicinc.com/
> https://lore.kernel.org/all/20241226-mdssdt_qcs8300-v2-0-acba0db533ce@quicinc.com/
> ---
> Changes in v2:Fixed review comments from Konrad, Dmitry and Krzysztof.
> - Reuse eDP PHY and DPU of SA8775 Platform.[Dmitry][Krzysztof]
> - Reuse DisplayPort controller of SM8650.[Dmitry]
> - Correct the regs length, format issues and power-domains.[Konrad]
> - Integrate the dt changes of DPU and DP together.
> - Link to v1: https://lore.kernel.org/all/20241127-dp_dts_qcs8300-v1-0-e3d13dec4233@quicinc.com/
> ~
>
> ---
> Yongxing Mou (2):
> arm64: dts: qcom: qcs8300: add display dt nodes for MDSS, DPU, DisplayPort and eDP PHY
> arm64: dts: qcom: qcs8300-ride: Enable Display Port
>
> arch/arm64/boot/dts/qcom/qcs8300-ride.dts | 44 +++++++
> arch/arm64/boot/dts/qcom/qcs8300.dtsi | 204 +++++++++++++++++++++++++++++-
> 2 files changed, 247 insertions(+), 1 deletion(-)
> ---
> base-commit: 8155b4ef3466f0e289e8fcc9e6e62f3f4dceeac2
> change-id: 20241225-dts_qcs8300-4d4299067306
> prerequisite-message-id: <20241203-qcs8300_initial_dtsi-v4-2-d7c953484024@quicinc.com>
> prerequisite-patch-id: 33f2488a8eb133431f200e17aac743598508dcf3
> prerequisite-patch-id: 7b653ebeaf1ca3f87620ccf7d876e3d1fe496c4a
> prerequisite-patch-id: e1b60af8a64332e5f0ecbd3a4ea2b6e090bd97cf
> prerequisite-patch-id: b823d744d2fb302e2496eaf0cf0c9c66312dcf2a
> prerequisite-message-id: <20241106-qcs8300-mm-patches-v3-0-f611a8f87f15@quicinc.com>
> prerequisite-patch-id: 367d9c742fe5087cfa6fb8e7b05ebe9bc78d68f3
> prerequisite-patch-id: ee0513c070ab96e63766d235b38ee53ca9b19181
> prerequisite-patch-id: 970974160bcdc837ccbe5ea3b5dcac582e90bc0d
> prerequisite-patch-id: 5b2bd9cc44a529b0b9e5d73128dca5d2ff9f2f44
> prerequisite-patch-id: 6a0a81242e1d0f051e3102533bf0191615c6e96b
> prerequisite-patch-id: 322540ce6d45c32f813ecef50e5135c6f08d9019
> prerequisite-message-id: <20241114-qcs8300-mm-cc-dt-patch-v1-1-7a974508c736@quicinc.com>
> prerequisite-patch-id: 8faad5c6d8ca255935d3e4d317dcbcc32b8261ff
> prerequisite-message-id: <20241024-defconfig_sa8775p_clock_controllers-v2-1-a9e1cdaed785@quicinc.com>
> prerequisite-patch-id: 81378ec66ab6e569bd828401c43c4f5af55db32c
> prerequisite-message-id: <20241226-mdssdt_qcs8300-v2-0-acba0db533ce@quicinc.com>
> prerequisite-patch-id: b798711c6a9bd9c4f0b692835865235e78cd2adb
> prerequisite-patch-id: 146c61567c42bf5268d1005f8e9b307ea2af93d9
> prerequisite-patch-id: 3ce5246ad3470d7392df23a52b3c8b8bd1662db6
> prerequisite-patch-id: 2ea89bba3c9c6ba37250ebd947c1d4acedc78a5d
> prerequisite-patch-id: e81de8a09467a49eaeb4af73a0e197e4156ce202
>
> Best regards,
> --
> Yongxing Mou <quic_yongmou@quicinc.com>
>
>
>
My bot found new DTB warnings on the .dts files added or changed in this
series.
Some warnings may be from an existing SoC .dtsi. Or perhaps the warnings
are fixed by another series. Ultimately, it is up to the platform
maintainer whether these warnings are acceptable or not. No need to reply
unless the platform maintainer has comments.
If you already ran DT checks and didn't see these error(s), then
make sure dt-schema is up to date:
pip3 install dtschema --upgrade
New warnings running 'make CHECK_DTBS=y qcom/qcs8300-ride.dtb' for 20241226-dts_qcs8300-v2-0-ec8d4fb65cba@quicinc.com:
arch/arm64/boot/dts/qcom/qcs8300-ride.dtb: efuse@784000: compatible:0: 'qcom,qcs8300-qfprom' is not one of ['qcom,apq8064-qfprom', 'qcom,apq8084-qfprom', 'qcom,ipq5332-qfprom', 'qcom,ipq6018-qfprom', 'qcom,ipq8064-qfprom', 'qcom,ipq8074-qfprom', 'qcom,ipq9574-qfprom', 'qcom,msm8226-qfprom', 'qcom,msm8916-qfprom', 'qcom,msm8974-qfprom', 'qcom,msm8976-qfprom', 'qcom,msm8996-qfprom', 'qcom,msm8998-qfprom', 'qcom,qcm2290-qfprom', 'qcom,qcs404-qfprom', 'qcom,sc7180-qfprom', 'qcom,sc7280-qfprom', 'qcom,sc8280xp-qfprom', 'qcom,sdm630-qfprom', 'qcom,sdm670-qfprom', 'qcom,sdm845-qfprom', 'qcom,sm6115-qfprom', 'qcom,sm6350-qfprom', 'qcom,sm6375-qfprom', 'qcom,sm8150-qfprom', 'qcom,sm8250-qfprom', 'qcom,sm8450-qfprom', 'qcom,sm8550-qfprom', 'qcom,sm8650-qfprom']
from schema $id: http://devicetree.org/schemas/nvmem/qcom,qfprom.yaml#
arch/arm64/boot/dts/qcom/qcs8300-ride.dtb: efuse@784000: Unevaluated properties are not allowed ('compatible' was unexpected)
from schema $id: http://devicetree.org/schemas/nvmem/qcom,qfprom.yaml#
arch/arm64/boot/dts/qcom/qcs8300-ride.dtb: /soc@0/efuse@784000: failed to match any schema with compatible: ['qcom,qcs8300-qfprom', 'qcom,qfprom']
arch/arm64/boot/dts/qcom/qcs8300-ride.dtb: remoteproc@3000000: compatible:0: 'qcom,qcs8300-adsp-pas' is not one of ['qcom,sa8775p-adsp-pas', 'qcom,sa8775p-cdsp0-pas', 'qcom,sa8775p-cdsp1-pas', 'qcom,sa8775p-gpdsp0-pas', 'qcom,sa8775p-gpdsp1-pas']
from schema $id: http://devicetree.org/schemas/remoteproc/qcom,sa8775p-pas.yaml#
arch/arm64/boot/dts/qcom/qcs8300-ride.dtb: remoteproc@3000000: compatible: ['qcom,qcs8300-adsp-pas', 'qcom,sa8775p-adsp-pas'] is too long
from schema $id: http://devicetree.org/schemas/remoteproc/qcom,sa8775p-pas.yaml#
arch/arm64/boot/dts/qcom/qcs8300-ride.dtb: remoteproc@3000000: Unevaluated properties are not allowed ('compatible' was unexpected)
from schema $id: http://devicetree.org/schemas/remoteproc/qcom,sa8775p-pas.yaml#
arch/arm64/boot/dts/qcom/qcs8300-ride.dtb: /soc@0/remoteproc@3000000: failed to match any schema with compatible: ['qcom,qcs8300-adsp-pas', 'qcom,sa8775p-adsp-pas']
arch/arm64/boot/dts/qcom/qcs8300-ride.dtb: display-subsystem@ae00000: Unevaluated properties are not allowed ('phy@aec2a00' was unexpected)
from schema $id: http://devicetree.org/schemas/display/msm/qcom,qcs8300-mdss.yaml#
arch/arm64/boot/dts/qcom/qcs8300-ride.dtb: display-controller@ae01000: clock-names:0: 'nrt_bus' was expected
from schema $id: http://devicetree.org/schemas/display/msm/qcom,sm8650-dpu.yaml#
arch/arm64/boot/dts/qcom/qcs8300-ride.dtb: display-controller@ae01000: Unevaluated properties are not allowed ('clock-names' was unexpected)
from schema $id: http://devicetree.org/schemas/display/msm/qcom,sm8650-dpu.yaml#
arch/arm64/boot/dts/qcom/qcs8300-ride.dtb: displayport-controller@af54000: reg: [[0, 183844864, 0, 512], [0, 183845376, 0, 512], [0, 183848960, 0, 3072], [0, 183853056, 0, 1024]] is too short
from schema $id: http://devicetree.org/schemas/display/msm/dp-controller.yaml#
arch/arm64/boot/dts/qcom/qcs8300-ride.dtb: interrupt-controller@b220000: compatible:0: 'qcom,qcs8300-pdc' is not one of ['qcom,qdu1000-pdc', 'qcom,sa8255p-pdc', 'qcom,sa8775p-pdc', 'qcom,sar2130p-pdc', 'qcom,sc7180-pdc', 'qcom,sc7280-pdc', 'qcom,sc8180x-pdc', 'qcom,sc8280xp-pdc', 'qcom,sdm670-pdc', 'qcom,sdm845-pdc', 'qcom,sdx55-pdc', 'qcom,sdx65-pdc', 'qcom,sdx75-pdc', 'qcom,sm4450-pdc', 'qcom,sm6350-pdc', 'qcom,sm8150-pdc', 'qcom,sm8250-pdc', 'qcom,sm8350-pdc', 'qcom,sm8450-pdc', 'qcom,sm8550-pdc', 'qcom,sm8650-pdc', 'qcom,x1e80100-pdc']
from schema $id: http://devicetree.org/schemas/interrupt-controller/qcom,pdc.yaml#
arch/arm64/boot/dts/qcom/qcs8300-ride.dtb: /soc@0/interrupt-controller@b220000: failed to match any schema with compatible: ['qcom,qcs8300-pdc', 'qcom,pdc']
arch/arm64/boot/dts/qcom/qcs8300-ride.dtb: remoteproc@20c00000: compatible:0: 'qcom,qcs8300-gpdsp-pas' is not one of ['qcom,sa8775p-adsp-pas', 'qcom,sa8775p-cdsp0-pas', 'qcom,sa8775p-cdsp1-pas', 'qcom,sa8775p-gpdsp0-pas', 'qcom,sa8775p-gpdsp1-pas']
from schema $id: http://devicetree.org/schemas/remoteproc/qcom,sa8775p-pas.yaml#
arch/arm64/boot/dts/qcom/qcs8300-ride.dtb: remoteproc@20c00000: compatible: ['qcom,qcs8300-gpdsp-pas', 'qcom,sa8775p-gpdsp0-pas'] is too long
from schema $id: http://devicetree.org/schemas/remoteproc/qcom,sa8775p-pas.yaml#
arch/arm64/boot/dts/qcom/qcs8300-ride.dtb: remoteproc@20c00000: Unevaluated properties are not allowed ('compatible' was unexpected)
from schema $id: http://devicetree.org/schemas/remoteproc/qcom,sa8775p-pas.yaml#
arch/arm64/boot/dts/qcom/qcs8300-ride.dtb: /soc@0/remoteproc@20c00000: failed to match any schema with compatible: ['qcom,qcs8300-gpdsp-pas', 'qcom,sa8775p-gpdsp0-pas']
arch/arm64/boot/dts/qcom/qcs8300-ride.dtb: remoteproc@26300000: compatible:0: 'qcom,qcs8300-cdsp-pas' is not one of ['qcom,sa8775p-adsp-pas', 'qcom,sa8775p-cdsp0-pas', 'qcom,sa8775p-cdsp1-pas', 'qcom,sa8775p-gpdsp0-pas', 'qcom,sa8775p-gpdsp1-pas']
from schema $id: http://devicetree.org/schemas/remoteproc/qcom,sa8775p-pas.yaml#
arch/arm64/boot/dts/qcom/qcs8300-ride.dtb: remoteproc@26300000: compatible: ['qcom,qcs8300-cdsp-pas', 'qcom,sa8775p-cdsp0-pas'] is too long
from schema $id: http://devicetree.org/schemas/remoteproc/qcom,sa8775p-pas.yaml#
arch/arm64/boot/dts/qcom/qcs8300-ride.dtb: remoteproc@26300000: Unevaluated properties are not allowed ('compatible' was unexpected)
from schema $id: http://devicetree.org/schemas/remoteproc/qcom,sa8775p-pas.yaml#
arch/arm64/boot/dts/qcom/qcs8300-ride.dtb: /soc@0/remoteproc@26300000: failed to match any schema with compatible: ['qcom,qcs8300-cdsp-pas', 'qcom,sa8775p-cdsp0-pas']
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH v2 1/2] arm64: dts: qcom: qcs8300: add display dt nodes for MDSS, DPU, DisplayPort and eDP PHY
2024-12-26 10:43 ` [PATCH v2 1/2] arm64: dts: qcom: qcs8300: add display dt nodes for MDSS, DPU, DisplayPort and eDP PHY Yongxing Mou
@ 2024-12-30 14:34 ` Konrad Dybcio
2025-01-08 8:21 ` Yongxing Mou
0 siblings, 1 reply; 7+ messages in thread
From: Konrad Dybcio @ 2024-12-30 14:34 UTC (permalink / raw)
To: Yongxing Mou, Bjorn Andersson, Konrad Dybcio, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, devicetree, linux-kernel
On 26.12.2024 11:43 AM, Yongxing Mou wrote:
> Add devicetree changes to enable MDSS display-subsystem,
> display-controller(DPU), DisplayPort controller and eDP PHY for
> Qualcomm QCS8300 platform.
>
> Signed-off-by: Yongxing Mou <quic_yongmou@quicinc.com>
> ---
> arch/arm64/boot/dts/qcom/qcs8300.dtsi | 204 +++++++++++++++++++++++++++++++++-
> 1 file changed, 203 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/qcs8300.dtsi b/arch/arm64/boot/dts/qcom/qcs8300.dtsi
> index 80226992a65d867124b33dfa490c3c9ca1030c75..8d88fe4a266432f05192d7ef0dd80362bdbdab85 100644
> --- a/arch/arm64/boot/dts/qcom/qcs8300.dtsi
> +++ b/arch/arm64/boot/dts/qcom/qcs8300.dtsi
> @@ -952,6 +952,206 @@ camcc: clock-controller@ade0000 {
> #power-domain-cells = <1>;
> };
>
> + mdss: display-subsystem@ae00000 {
> + compatible = "qcom,qcs8300-mdss";
> + reg = <0x0 0x0ae00000 0x0 0x1000>;
> + reg-names = "mdss";
> +
> + interconnects = <&mmss_noc MASTER_MDP0 QCOM_ICC_TAG_ACTIVE_ONLY
> + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY>,
> + <&mmss_noc MASTER_MDP1 QCOM_ICC_TAG_ACTIVE_ONLY
> + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY>,
> + <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
> + &config_noc SLAVE_DISPLAY_CFG QCOM_ICC_TAG_ACTIVE_ONLY>;
> + interconnect-names = "mdp0-mem",
> + "mdp1-mem",
> + "cpu-cfg";
Only the CPU path should be ACTIVE_ONLY, the rest should be
QCOM_ICC_TAG_ALWAYS
> +
> + resets = <&dispcc MDSS_DISP_CC_MDSS_CORE_BCR>;
> +
> + power-domains = <&dispcc MDSS_DISP_CC_MDSS_CORE_GDSC>;
> +
> + clocks = <&dispcc MDSS_DISP_CC_MDSS_AHB_CLK>,
> + <&gcc GCC_DISP_HF_AXI_CLK>,
> + <&dispcc MDSS_DISP_CC_MDSS_MDP_CLK>;
Please align the property order with x1e80100.dtsi
[...]
> + mdss_dp0_phy: phy@aec2a00 {
> + compatible = "qcom,qcs8300-edp-phy", "qcom,sa8775p-edp-phy";
> +
> + reg = <0x0 0x0aec2a00 0x0 0x19c>,
> + <0x0 0x0aec2200 0x0 0xec>,
> + <0x0 0x0aec2600 0x0 0xec>,
> + <0x0 0x0aec2000 0x0 0x1c8>;
> +
> + clocks = <&dispcc MDSS_DISP_CC_MDSS_DPTX0_AUX_CLK>,
> + <&dispcc MDSS_DISP_CC_MDSS_AHB_CLK>;
> + clock-names = "aux",
> + "cfg_ahb";
> +
> + power-domains = <&rpmhpd RPMHPD_MMCX>;
The PHYs generally sit on a MX-like rail, please verify this
Konrad
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH v2 2/2] arm64: dts: qcom: qcs8300-ride: Enable Display Port
2024-12-26 10:43 ` [PATCH v2 2/2] arm64: dts: qcom: qcs8300-ride: Enable Display Port Yongxing Mou
@ 2024-12-30 14:35 ` Konrad Dybcio
0 siblings, 0 replies; 7+ messages in thread
From: Konrad Dybcio @ 2024-12-30 14:35 UTC (permalink / raw)
To: Yongxing Mou, Bjorn Andersson, Konrad Dybcio, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, devicetree, linux-kernel
On 26.12.2024 11:43 AM, Yongxing Mou wrote:
> Enable DPTX0 along with their corresponding PHYs for
> qcs8300-ride platform.
>
> Signed-off-by: Yongxing Mou <quic_yongmou@quicinc.com>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Konrad
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH v2 1/2] arm64: dts: qcom: qcs8300: add display dt nodes for MDSS, DPU, DisplayPort and eDP PHY
2024-12-30 14:34 ` Konrad Dybcio
@ 2025-01-08 8:21 ` Yongxing Mou
0 siblings, 0 replies; 7+ messages in thread
From: Yongxing Mou @ 2025-01-08 8:21 UTC (permalink / raw)
To: Konrad Dybcio, Bjorn Andersson, Konrad Dybcio, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, devicetree, linux-kernel
On 2024/12/30 22:34, Konrad Dybcio wrote:
> On 26.12.2024 11:43 AM, Yongxing Mou wrote:
>> Add devicetree changes to enable MDSS display-subsystem,
>> display-controller(DPU), DisplayPort controller and eDP PHY for
>> Qualcomm QCS8300 platform.
>>
>> Signed-off-by: Yongxing Mou <quic_yongmou@quicinc.com>
>> ---
>> arch/arm64/boot/dts/qcom/qcs8300.dtsi | 204 +++++++++++++++++++++++++++++++++-
>> 1 file changed, 203 insertions(+), 1 deletion(-)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/qcs8300.dtsi b/arch/arm64/boot/dts/qcom/qcs8300.dtsi
>> index 80226992a65d867124b33dfa490c3c9ca1030c75..8d88fe4a266432f05192d7ef0dd80362bdbdab85 100644
>> --- a/arch/arm64/boot/dts/qcom/qcs8300.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/qcs8300.dtsi
>> @@ -952,6 +952,206 @@ camcc: clock-controller@ade0000 {
>> #power-domain-cells = <1>;
>> };
>>
>> + mdss: display-subsystem@ae00000 {
>> + compatible = "qcom,qcs8300-mdss";
>> + reg = <0x0 0x0ae00000 0x0 0x1000>;
>> + reg-names = "mdss";
>> +
>> + interconnects = <&mmss_noc MASTER_MDP0 QCOM_ICC_TAG_ACTIVE_ONLY
>> + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY>,
>> + <&mmss_noc MASTER_MDP1 QCOM_ICC_TAG_ACTIVE_ONLY
>> + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY>,
>> + <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
>> + &config_noc SLAVE_DISPLAY_CFG QCOM_ICC_TAG_ACTIVE_ONLY>;
>> + interconnect-names = "mdp0-mem",
>> + "mdp1-mem",
>> + "cpu-cfg";
>
> Only the CPU path should be ACTIVE_ONLY, the rest should be
> QCOM_ICC_TAG_ALWAYS
>
Thank for point it. will update it in next patch.
>> +
>> + resets = <&dispcc MDSS_DISP_CC_MDSS_CORE_BCR>;
>> +
>> + power-domains = <&dispcc MDSS_DISP_CC_MDSS_CORE_GDSC>;
>> +
>> + clocks = <&dispcc MDSS_DISP_CC_MDSS_AHB_CLK>,
>> + <&gcc GCC_DISP_HF_AXI_CLK>,
>> + <&dispcc MDSS_DISP_CC_MDSS_MDP_CLK>;
>
> Please align the property order with x1e80100.dtsi
>
Ok got it thanks. will update it as x1e80100.dtsi in next patch.
> [...]
>
>> + mdss_dp0_phy: phy@aec2a00 {
>> + compatible = "qcom,qcs8300-edp-phy", "qcom,sa8775p-edp-phy";
>> +
>> + reg = <0x0 0x0aec2a00 0x0 0x19c>,
>> + <0x0 0x0aec2200 0x0 0xec>,
>> + <0x0 0x0aec2600 0x0 0xec>,
>> + <0x0 0x0aec2000 0x0 0x1c8>;
>> +
>> + clocks = <&dispcc MDSS_DISP_CC_MDSS_DPTX0_AUX_CLK>,
>> + <&dispcc MDSS_DISP_CC_MDSS_AHB_CLK>;
>> + clock-names = "aux",
>> + "cfg_ahb";
>> +
>> + power-domains = <&rpmhpd RPMHPD_MMCX>;
>
> The PHYs generally sit on a MX-like rail, please verify this
>
We are currently verifying this power domain. We will validate it and
update it accordingly. Thank you for pointing this out.
> Konrad
^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2025-01-08 8:21 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2024-12-26 10:43 [PATCH v2 0/2] Enable DPU and Display Port for Qualcomm QCS8300-ride platform Yongxing Mou
2024-12-26 10:43 ` [PATCH v2 1/2] arm64: dts: qcom: qcs8300: add display dt nodes for MDSS, DPU, DisplayPort and eDP PHY Yongxing Mou
2024-12-30 14:34 ` Konrad Dybcio
2025-01-08 8:21 ` Yongxing Mou
2024-12-26 10:43 ` [PATCH v2 2/2] arm64: dts: qcom: qcs8300-ride: Enable Display Port Yongxing Mou
2024-12-30 14:35 ` Konrad Dybcio
2024-12-27 15:18 ` [PATCH v2 0/2] Enable DPU and Display Port for Qualcomm QCS8300-ride platform Rob Herring (Arm)
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