* [PATCH v1] arm64: dts: qcom: sc7280: Remove CTS/RTS configuration
@ 2024-04-16 10:56 Viken Dadhaniya
2024-04-16 11:38 ` Luca Weiss
2024-04-17 4:39 ` Bjorn Andersson
0 siblings, 2 replies; 7+ messages in thread
From: Viken Dadhaniya @ 2024-04-16 10:56 UTC (permalink / raw)
To: cros-qcom-dts-watchers, andersson, konrad.dybcio, swboyd, robh,
krzk+dt, linux-arm-msm, conor+dt, devicetree, linux-kernel,
rajpat, mka, rojay
Cc: quic_msavaliy, quic_anupkulk, Viken Dadhaniya
Remove CTS and RTS pinctrl configuration for UART5 node as
it's designed for debug UART for all the board variants of the
sc7280 chipset.
Also change compatible string to debug UART.
Fixes: 38cd93f413fd ("arm64: dts: qcom: sc7280: Update QUPv3 UART5 DT node")
Signed-off-by: Viken Dadhaniya <quic_vdadhani@quicinc.com>
---
arch/arm64/boot/dts/qcom/sc7280.dtsi | 14 ++------------
1 file changed, 2 insertions(+), 12 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index 38c183b2bb26..2a6b4c4639d1 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -1440,12 +1440,12 @@
};
uart5: serial@994000 {
- compatible = "qcom,geni-uart";
+ compatible = "qcom,geni-debug-uart";
reg = <0 0x00994000 0 0x4000>;
clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>;
clock-names = "se";
pinctrl-names = "default";
- pinctrl-0 = <&qup_uart5_cts>, <&qup_uart5_rts>, <&qup_uart5_tx>, <&qup_uart5_rx>;
+ pinctrl-0 = <&qup_uart5_tx>, <&qup_uart5_rx>;
interrupts = <GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&rpmhpd SC7280_CX>;
operating-points-v2 = <&qup_opp_table>;
@@ -5397,16 +5397,6 @@
function = "qup04";
};
- qup_uart5_cts: qup-uart5-cts-state {
- pins = "gpio20";
- function = "qup05";
- };
-
- qup_uart5_rts: qup-uart5-rts-state {
- pins = "gpio21";
- function = "qup05";
- };
-
qup_uart5_tx: qup-uart5-tx-state {
pins = "gpio22";
function = "qup05";
--
2.17.1
^ permalink raw reply related [flat|nested] 7+ messages in thread* Re: [PATCH v1] arm64: dts: qcom: sc7280: Remove CTS/RTS configuration
2024-04-16 10:56 [PATCH v1] arm64: dts: qcom: sc7280: Remove CTS/RTS configuration Viken Dadhaniya
@ 2024-04-16 11:38 ` Luca Weiss
2024-04-16 14:39 ` Konrad Dybcio
2024-04-24 7:59 ` Viken Dadhaniya
2024-04-17 4:39 ` Bjorn Andersson
1 sibling, 2 replies; 7+ messages in thread
From: Luca Weiss @ 2024-04-16 11:38 UTC (permalink / raw)
To: Viken Dadhaniya, cros-qcom-dts-watchers, andersson, konrad.dybcio,
swboyd, robh, krzk+dt, linux-arm-msm, conor+dt, devicetree,
linux-kernel, rajpat, mka, rojay
Cc: quic_msavaliy, quic_anupkulk
On Tue Apr 16, 2024 at 12:56 PM CEST, Viken Dadhaniya wrote:
> Remove CTS and RTS pinctrl configuration for UART5 node as
> it's designed for debug UART for all the board variants of the
> sc7280 chipset.
>
> Also change compatible string to debug UART.
This change has little to do with the SoC design though and is dependent
on the usage on a given board, right? Also the QCM6490 datasheet
mentions gpio21 & gpio22 can be used for UART_CTS and UART_RFR.
But at least consistency-wise this change makes sense, in practically
all other SoCs one UART is marked as geni-debug-uart.
But with this patch you should then also remove some overrides that are
placed in various boards already?
arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts: compatible = "qcom,geni-debug-uart";
arch/arm64/boot/dts/qcom/qcm6490-idp.dts: compatible = "qcom,geni-debug-uart";
arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts: compatible = "qcom,geni-debug-uart";
arch/arm64/boot/dts/qcom/sc7280-idp.dtsi: compatible = "qcom,geni-debug-uart";
arch/arm64/boot/dts/qcom/sc7280-qcard.dtsi: compatible = "qcom,geni-debug-uart";
Regards
Luca
>
> Fixes: 38cd93f413fd ("arm64: dts: qcom: sc7280: Update QUPv3 UART5 DT node")
> Signed-off-by: Viken Dadhaniya <quic_vdadhani@quicinc.com>
> ---
> arch/arm64/boot/dts/qcom/sc7280.dtsi | 14 ++------------
> 1 file changed, 2 insertions(+), 12 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> index 38c183b2bb26..2a6b4c4639d1 100644
> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> @@ -1440,12 +1440,12 @@
> };
>
> uart5: serial@994000 {
> - compatible = "qcom,geni-uart";
> + compatible = "qcom,geni-debug-uart";
> reg = <0 0x00994000 0 0x4000>;
> clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>;
> clock-names = "se";
> pinctrl-names = "default";
> - pinctrl-0 = <&qup_uart5_cts>, <&qup_uart5_rts>, <&qup_uart5_tx>, <&qup_uart5_rx>;
> + pinctrl-0 = <&qup_uart5_tx>, <&qup_uart5_rx>;
> interrupts = <GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH>;
> power-domains = <&rpmhpd SC7280_CX>;
> operating-points-v2 = <&qup_opp_table>;
> @@ -5397,16 +5397,6 @@
> function = "qup04";
> };
>
> - qup_uart5_cts: qup-uart5-cts-state {
> - pins = "gpio20";
> - function = "qup05";
> - };
> -
> - qup_uart5_rts: qup-uart5-rts-state {
> - pins = "gpio21";
> - function = "qup05";
> - };
> -
> qup_uart5_tx: qup-uart5-tx-state {
> pins = "gpio22";
> function = "qup05";
^ permalink raw reply [flat|nested] 7+ messages in thread* Re: [PATCH v1] arm64: dts: qcom: sc7280: Remove CTS/RTS configuration
2024-04-16 11:38 ` Luca Weiss
@ 2024-04-16 14:39 ` Konrad Dybcio
2024-04-24 8:00 ` Viken Dadhaniya
2024-04-24 7:59 ` Viken Dadhaniya
1 sibling, 1 reply; 7+ messages in thread
From: Konrad Dybcio @ 2024-04-16 14:39 UTC (permalink / raw)
To: Luca Weiss, Viken Dadhaniya, cros-qcom-dts-watchers, andersson,
swboyd, robh, krzk+dt, linux-arm-msm, conor+dt, devicetree,
linux-kernel, rajpat, mka, rojay
Cc: quic_msavaliy, quic_anupkulk
On 4/16/24 13:38, Luca Weiss wrote:
> On Tue Apr 16, 2024 at 12:56 PM CEST, Viken Dadhaniya wrote:
>> Remove CTS and RTS pinctrl configuration for UART5 node as
>> it's designed for debug UART for all the board variants of the
>> sc7280 chipset.
>>
>> Also change compatible string to debug UART.
>
> This change has little to do with the SoC design though and is dependent
> on the usage on a given board, right? Also the QCM6490 datasheet
> mentions gpio21 & gpio22 can be used for UART_CTS and UART_RFR.
Yeah, using it as a debug uart doesn't rule out flow control I don't think
>
> But at least consistency-wise this change makes sense, in practically
> all other SoCs one UART is marked as geni-debug-uart.
>
> But with this patch you should then also remove some overrides that are
> placed in various boards already?
>
> arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts: compatible = "qcom,geni-debug-uart";
> arch/arm64/boot/dts/qcom/qcm6490-idp.dts: compatible = "qcom,geni-debug-uart";
> arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts: compatible = "qcom,geni-debug-uart";
> arch/arm64/boot/dts/qcom/sc7280-idp.dtsi: compatible = "qcom,geni-debug-uart";
> arch/arm64/boot/dts/qcom/sc7280-qcard.dtsi: compatible = "qcom,geni-debug-uart";
Definitely
Konrad
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH v1] arm64: dts: qcom: sc7280: Remove CTS/RTS configuration
2024-04-16 14:39 ` Konrad Dybcio
@ 2024-04-24 8:00 ` Viken Dadhaniya
0 siblings, 0 replies; 7+ messages in thread
From: Viken Dadhaniya @ 2024-04-24 8:00 UTC (permalink / raw)
To: Konrad Dybcio, Luca Weiss, cros-qcom-dts-watchers, andersson,
swboyd, robh, krzk+dt, linux-arm-msm, conor+dt, devicetree,
linux-kernel, rajpat, mka, rojay
Cc: quic_msavaliy, quic_anupkulk
On 4/16/2024 8:09 PM, Konrad Dybcio wrote:
>
>
> On 4/16/24 13:38, Luca Weiss wrote:
>> On Tue Apr 16, 2024 at 12:56 PM CEST, Viken Dadhaniya wrote:
>>> Remove CTS and RTS pinctrl configuration for UART5 node as
>>> it's designed for debug UART for all the board variants of the
>>> sc7280 chipset.
>>>
>>> Also change compatible string to debug UART.
>>
>> This change has little to do with the SoC design though and is dependent
>> on the usage on a given board, right? Also the QCM6490 datasheet
>> mentions gpio21 & gpio22 can be used for UART_CTS and UART_RFR.
>
> Yeah, using it as a debug uart doesn't rule out flow control I don't think
>
>>
>> But at least consistency-wise this change makes sense, in practically
>> all other SoCs one UART is marked as geni-debug-uart.
>>
>> But with this patch you should then also remove some overrides that are
>> placed in various boards already?
>>
>> arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts: compatible =
>> "qcom,geni-debug-uart";
>> arch/arm64/boot/dts/qcom/qcm6490-idp.dts: compatible =
>> "qcom,geni-debug-uart";
>> arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts: compatible =
>> "qcom,geni-debug-uart";
>> arch/arm64/boot/dts/qcom/sc7280-idp.dtsi: compatible =
>> "qcom,geni-debug-uart";
>> arch/arm64/boot/dts/qcom/sc7280-qcard.dtsi: compatible =
>> "qcom,geni-debug-uart";
>
> Definitely
Updated in V2.
>
> Konrad
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH v1] arm64: dts: qcom: sc7280: Remove CTS/RTS configuration
2024-04-16 11:38 ` Luca Weiss
2024-04-16 14:39 ` Konrad Dybcio
@ 2024-04-24 7:59 ` Viken Dadhaniya
1 sibling, 0 replies; 7+ messages in thread
From: Viken Dadhaniya @ 2024-04-24 7:59 UTC (permalink / raw)
To: Luca Weiss, cros-qcom-dts-watchers, andersson, konrad.dybcio,
swboyd, robh, krzk+dt, linux-arm-msm, conor+dt, devicetree,
linux-kernel, rajpat, mka, rojay
Cc: quic_msavaliy, quic_anupkulk
On 4/16/2024 5:08 PM, Luca Weiss wrote:
> On Tue Apr 16, 2024 at 12:56 PM CEST, Viken Dadhaniya wrote:
>> Remove CTS and RTS pinctrl configuration for UART5 node as
>> it's designed for debug UART for all the board variants of the
>> sc7280 chipset.
>>
>> Also change compatible string to debug UART.
>
> This change has little to do with the SoC design though and is dependent
> on the usage on a given board, right? Also the QCM6490 datasheet
> mentions gpio21 & gpio22 can be used for UART_CTS and UART_RFR.
>
> But at least consistency-wise this change makes sense, in practically
> all other SoCs one UART is marked as geni-debug-uart.
>
> But with this patch you should then also remove some overrides that are
> placed in various boards already?
>
> arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts: compatible = "qcom,geni-debug-uart";
> arch/arm64/boot/dts/qcom/qcm6490-idp.dts: compatible = "qcom,geni-debug-uart";
> arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts: compatible = "qcom,geni-debug-uart";
> arch/arm64/boot/dts/qcom/sc7280-idp.dtsi: compatible = "qcom,geni-debug-uart";
> arch/arm64/boot/dts/qcom/sc7280-qcard.dtsi: compatible = "qcom,geni-debug-uart";
>
> Regards
> Luca
>
Updated in V2.
>>
>> Fixes: 38cd93f413fd ("arm64: dts: qcom: sc7280: Update QUPv3 UART5 DT node")
>> Signed-off-by: Viken Dadhaniya <quic_vdadhani@quicinc.com>
>> ---
>> arch/arm64/boot/dts/qcom/sc7280.dtsi | 14 ++------------
>> 1 file changed, 2 insertions(+), 12 deletions(-)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> index 38c183b2bb26..2a6b4c4639d1 100644
>> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> @@ -1440,12 +1440,12 @@
>> };
>>
>> uart5: serial@994000 {
>> - compatible = "qcom,geni-uart";
>> + compatible = "qcom,geni-debug-uart";
>> reg = <0 0x00994000 0 0x4000>;
>> clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>;
>> clock-names = "se";
>> pinctrl-names = "default";
>> - pinctrl-0 = <&qup_uart5_cts>, <&qup_uart5_rts>, <&qup_uart5_tx>, <&qup_uart5_rx>;
>> + pinctrl-0 = <&qup_uart5_tx>, <&qup_uart5_rx>;
>> interrupts = <GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH>;
>> power-domains = <&rpmhpd SC7280_CX>;
>> operating-points-v2 = <&qup_opp_table>;
>> @@ -5397,16 +5397,6 @@
>> function = "qup04";
>> };
>>
>> - qup_uart5_cts: qup-uart5-cts-state {
>> - pins = "gpio20";
>> - function = "qup05";
>> - };
>> -
>> - qup_uart5_rts: qup-uart5-rts-state {
>> - pins = "gpio21";
>> - function = "qup05";
>> - };
>> -
>> qup_uart5_tx: qup-uart5-tx-state {
>> pins = "gpio22";
>> function = "qup05";
>
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH v1] arm64: dts: qcom: sc7280: Remove CTS/RTS configuration
2024-04-16 10:56 [PATCH v1] arm64: dts: qcom: sc7280: Remove CTS/RTS configuration Viken Dadhaniya
2024-04-16 11:38 ` Luca Weiss
@ 2024-04-17 4:39 ` Bjorn Andersson
2024-04-24 8:01 ` Viken Dadhaniya
1 sibling, 1 reply; 7+ messages in thread
From: Bjorn Andersson @ 2024-04-17 4:39 UTC (permalink / raw)
To: Viken Dadhaniya
Cc: cros-qcom-dts-watchers, andersson, konrad.dybcio, swboyd, robh,
krzk+dt, linux-arm-msm, conor+dt, devicetree, linux-kernel,
rajpat, mka, rojay, quic_msavaliy, quic_anupkulk
On Tue, Apr 16, 2024 at 04:26:50PM +0530, Viken Dadhaniya wrote:
> Remove CTS and RTS pinctrl configuration for UART5 node as
> it's designed for debug UART for all the board variants of the
> sc7280 chipset.
>
> Also change compatible string to debug UART.
>
Why are you posting this on the public mailing list without first
addressing the feedback and questions I gave you on the internal review
list?
Now you wasted the time of our community members, just to receive the
same feedback I gave you last week.
Regards,
Bjorn
> Fixes: 38cd93f413fd ("arm64: dts: qcom: sc7280: Update QUPv3 UART5 DT node")
> Signed-off-by: Viken Dadhaniya <quic_vdadhani@quicinc.com>
> ---
> arch/arm64/boot/dts/qcom/sc7280.dtsi | 14 ++------------
> 1 file changed, 2 insertions(+), 12 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> index 38c183b2bb26..2a6b4c4639d1 100644
> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> @@ -1440,12 +1440,12 @@
> };
>
> uart5: serial@994000 {
> - compatible = "qcom,geni-uart";
> + compatible = "qcom,geni-debug-uart";
> reg = <0 0x00994000 0 0x4000>;
> clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>;
> clock-names = "se";
> pinctrl-names = "default";
> - pinctrl-0 = <&qup_uart5_cts>, <&qup_uart5_rts>, <&qup_uart5_tx>, <&qup_uart5_rx>;
> + pinctrl-0 = <&qup_uart5_tx>, <&qup_uart5_rx>;
> interrupts = <GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH>;
> power-domains = <&rpmhpd SC7280_CX>;
> operating-points-v2 = <&qup_opp_table>;
> @@ -5397,16 +5397,6 @@
> function = "qup04";
> };
>
> - qup_uart5_cts: qup-uart5-cts-state {
> - pins = "gpio20";
> - function = "qup05";
> - };
> -
> - qup_uart5_rts: qup-uart5-rts-state {
> - pins = "gpio21";
> - function = "qup05";
> - };
> -
> qup_uart5_tx: qup-uart5-tx-state {
> pins = "gpio22";
> function = "qup05";
> --
> 2.17.1
>
^ permalink raw reply [flat|nested] 7+ messages in thread* Re: [PATCH v1] arm64: dts: qcom: sc7280: Remove CTS/RTS configuration
2024-04-17 4:39 ` Bjorn Andersson
@ 2024-04-24 8:01 ` Viken Dadhaniya
0 siblings, 0 replies; 7+ messages in thread
From: Viken Dadhaniya @ 2024-04-24 8:01 UTC (permalink / raw)
To: Bjorn Andersson
Cc: cros-qcom-dts-watchers, andersson, konrad.dybcio, swboyd, robh,
krzk+dt, linux-arm-msm, conor+dt, devicetree, linux-kernel,
rajpat, mka, rojay, quic_msavaliy, quic_anupkulk
On 4/17/2024 10:09 AM, Bjorn Andersson wrote:
> On Tue, Apr 16, 2024 at 04:26:50PM +0530, Viken Dadhaniya wrote:
>> Remove CTS and RTS pinctrl configuration for UART5 node as
>> it's designed for debug UART for all the board variants of the
>> sc7280 chipset.
>>
>> Also change compatible string to debug UART.
>>
>
> Why are you posting this on the public mailing list without first
> addressing the feedback and questions I gave you on the internal review
> list?
>
> Now you wasted the time of our community members, just to receive the
> same feedback I gave you last week.
>
> Regards,
> Bjorn
>
Sorry, I missed you feedback due to incorrect mail filler.
>> Fixes: 38cd93f413fd ("arm64: dts: qcom: sc7280: Update QUPv3 UART5 DT node")
>> Signed-off-by: Viken Dadhaniya <quic_vdadhani@quicinc.com>
>> ---
>> arch/arm64/boot/dts/qcom/sc7280.dtsi | 14 ++------------
>> 1 file changed, 2 insertions(+), 12 deletions(-)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> index 38c183b2bb26..2a6b4c4639d1 100644
>> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> @@ -1440,12 +1440,12 @@
>> };
>>
>> uart5: serial@994000 {
>> - compatible = "qcom,geni-uart";
>> + compatible = "qcom,geni-debug-uart";
>> reg = <0 0x00994000 0 0x4000>;
>> clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>;
>> clock-names = "se";
>> pinctrl-names = "default";
>> - pinctrl-0 = <&qup_uart5_cts>, <&qup_uart5_rts>, <&qup_uart5_tx>, <&qup_uart5_rx>;
>> + pinctrl-0 = <&qup_uart5_tx>, <&qup_uart5_rx>;
>> interrupts = <GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH>;
>> power-domains = <&rpmhpd SC7280_CX>;
>> operating-points-v2 = <&qup_opp_table>;
>> @@ -5397,16 +5397,6 @@
>> function = "qup04";
>> };
>>
>> - qup_uart5_cts: qup-uart5-cts-state {
>> - pins = "gpio20";
>> - function = "qup05";
>> - };
>> -
>> - qup_uart5_rts: qup-uart5-rts-state {
>> - pins = "gpio21";
>> - function = "qup05";
>> - };
>> -
>> qup_uart5_tx: qup-uart5-tx-state {
>> pins = "gpio22";
>> function = "qup05";
>> --
>> 2.17.1
>>
^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2024-04-24 8:02 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz follow: Atom feed
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2024-04-16 10:56 [PATCH v1] arm64: dts: qcom: sc7280: Remove CTS/RTS configuration Viken Dadhaniya
2024-04-16 11:38 ` Luca Weiss
2024-04-16 14:39 ` Konrad Dybcio
2024-04-24 8:00 ` Viken Dadhaniya
2024-04-24 7:59 ` Viken Dadhaniya
2024-04-17 4:39 ` Bjorn Andersson
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