From: Johan Hovold <johan@kernel.org>
To: Qiang Yu <quic_qianyu@quicinc.com>
Cc: andersson@kernel.org, konradybcio@kernel.org, robh@kernel.org,
krzk+dt@kernel.org, conor+dt@kernel.org,
linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, quic_cang@quicinc.com,
quic_mrana@quicinc.com, stable@vger.kernel.org
Subject: Re: [PATCH 1/1] arm64: dts: qcom: x1e80100: Fix up BAR space size for PCIe6a
Date: Wed, 13 Nov 2024 15:17:31 +0100 [thread overview]
Message-ID: <ZzS0-5U-4nmXW_8R@hovoldconsulting.com> (raw)
In-Reply-To: <20241113080508.3458849-1-quic_qianyu@quicinc.com>
On Wed, Nov 13, 2024 at 12:05:08AM -0800, Qiang Yu wrote:
> As per memory map table, the region for PCIe6a is 64MByte. Hence, set the
> size of 32 bit non-prefetchable memory region beginning on address
> 0x70300000 as 0x3d00000 so that BAR space assigned to BAR registers can be
> allocated from 0x70300000 to 0x74000000.
>
> Fixes: 7af141850012 ("arm64: dts: qcom: x1e80100: Fix up BAR spaces")
> Cc: stable@vger.kernel.org
> Signed-off-by: Qiang Yu <quic_qianyu@quicinc.com>
Thanks for the fix.
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
next prev parent reply other threads:[~2024-11-13 14:17 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-11-13 8:05 [PATCH 1/1] arm64: dts: qcom: x1e80100: Fix up BAR space size for PCIe6a Qiang Yu
2024-11-13 14:17 ` Johan Hovold [this message]
2024-12-17 16:38 ` (subset) " Bjorn Andersson
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