* [PATCH 1/1] arm64: dts: qcom: x1e80100: Fix up BAR space size for PCIe6a
@ 2024-11-13 8:05 Qiang Yu
2024-11-13 14:17 ` Johan Hovold
2024-12-17 16:38 ` (subset) " Bjorn Andersson
0 siblings, 2 replies; 3+ messages in thread
From: Qiang Yu @ 2024-11-13 8:05 UTC (permalink / raw)
To: andersson, konradybcio, robh, krzk+dt, conor+dt
Cc: johan, linux-arm-msm, devicetree, linux-kernel, quic_cang,
quic_mrana, quic_qianyu, stable
As per memory map table, the region for PCIe6a is 64MByte. Hence, set the
size of 32 bit non-prefetchable memory region beginning on address
0x70300000 as 0x3d00000 so that BAR space assigned to BAR registers can be
allocated from 0x70300000 to 0x74000000.
Fixes: 7af141850012 ("arm64: dts: qcom: x1e80100: Fix up BAR spaces")
Cc: stable@vger.kernel.org
Signed-off-by: Qiang Yu <quic_qianyu@quicinc.com>
---
arch/arm64/boot/dts/qcom/x1e80100.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
index f044921457d0..90ddac606719 100644
--- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi
+++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
@@ -3126,7 +3126,7 @@ pcie6a: pci@1bf8000 {
#address-cells = <3>;
#size-cells = <2>;
ranges = <0x01000000 0x0 0x00000000 0x0 0x70200000 0x0 0x100000>,
- <0x02000000 0x0 0x70300000 0x0 0x70300000 0x0 0x1d00000>;
+ <0x02000000 0x0 0x70300000 0x0 0x70300000 0x0 0x3d00000>;
bus-range = <0x00 0xff>;
dma-coherent;
--
2.34.1
^ permalink raw reply related [flat|nested] 3+ messages in thread* Re: [PATCH 1/1] arm64: dts: qcom: x1e80100: Fix up BAR space size for PCIe6a
2024-11-13 8:05 [PATCH 1/1] arm64: dts: qcom: x1e80100: Fix up BAR space size for PCIe6a Qiang Yu
@ 2024-11-13 14:17 ` Johan Hovold
2024-12-17 16:38 ` (subset) " Bjorn Andersson
1 sibling, 0 replies; 3+ messages in thread
From: Johan Hovold @ 2024-11-13 14:17 UTC (permalink / raw)
To: Qiang Yu
Cc: andersson, konradybcio, robh, krzk+dt, conor+dt, linux-arm-msm,
devicetree, linux-kernel, quic_cang, quic_mrana, stable
On Wed, Nov 13, 2024 at 12:05:08AM -0800, Qiang Yu wrote:
> As per memory map table, the region for PCIe6a is 64MByte. Hence, set the
> size of 32 bit non-prefetchable memory region beginning on address
> 0x70300000 as 0x3d00000 so that BAR space assigned to BAR registers can be
> allocated from 0x70300000 to 0x74000000.
>
> Fixes: 7af141850012 ("arm64: dts: qcom: x1e80100: Fix up BAR spaces")
> Cc: stable@vger.kernel.org
> Signed-off-by: Qiang Yu <quic_qianyu@quicinc.com>
Thanks for the fix.
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
^ permalink raw reply [flat|nested] 3+ messages in thread* Re: (subset) [PATCH 1/1] arm64: dts: qcom: x1e80100: Fix up BAR space size for PCIe6a
2024-11-13 8:05 [PATCH 1/1] arm64: dts: qcom: x1e80100: Fix up BAR space size for PCIe6a Qiang Yu
2024-11-13 14:17 ` Johan Hovold
@ 2024-12-17 16:38 ` Bjorn Andersson
1 sibling, 0 replies; 3+ messages in thread
From: Bjorn Andersson @ 2024-12-17 16:38 UTC (permalink / raw)
To: konradybcio, robh, krzk+dt, conor+dt, Qiang Yu
Cc: johan, linux-arm-msm, devicetree, linux-kernel, quic_cang,
quic_mrana, stable
On Wed, 13 Nov 2024 00:05:08 -0800, Qiang Yu wrote:
> As per memory map table, the region for PCIe6a is 64MByte. Hence, set the
> size of 32 bit non-prefetchable memory region beginning on address
> 0x70300000 as 0x3d00000 so that BAR space assigned to BAR registers can be
> allocated from 0x70300000 to 0x74000000.
>
>
Applied, thanks!
[1/1] arm64: dts: qcom: x1e80100: Fix up BAR space size for PCIe6a
commit: fb8e7b33c2174e00dfa411361eeed21eeaf3634b
Best regards,
--
Bjorn Andersson <andersson@kernel.org>
^ permalink raw reply [flat|nested] 3+ messages in thread
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2024-11-13 8:05 [PATCH 1/1] arm64: dts: qcom: x1e80100: Fix up BAR space size for PCIe6a Qiang Yu
2024-11-13 14:17 ` Johan Hovold
2024-12-17 16:38 ` (subset) " Bjorn Andersson
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