* [PATCH 1/5] drm/msm/dpu: enable SmartDMA on SM8150
2025-03-08 5:38 [PATCH 0/5] drm/msm/dpu: update SmartDMA feature masks Dmitry Baryshkov
@ 2025-03-08 5:38 ` Dmitry Baryshkov
2025-04-25 18:26 ` Jessica Zhang
2025-03-08 5:38 ` [PATCH 2/5] drm/msm/dpu: enable SmartDMA on SC8180X Dmitry Baryshkov
` (3 subsequent siblings)
4 siblings, 1 reply; 16+ messages in thread
From: Dmitry Baryshkov @ 2025-03-08 5:38 UTC (permalink / raw)
To: Rob Clark, Abhinav Kumar, Dmitry Baryshkov, Sean Paul,
Marijn Suijten, David Airlie, Simona Vetter, Konrad Dybcio
Cc: linux-arm-msm, dri-devel, freedreno, linux-kernel
From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reworking of the catalog dropped the SmartDMA feature bit on the SM8150
platform. Renable SmartDMA support on this SoC.
Fixes: 460c410f02e4 ("drm/msm/dpu: duplicate sdm845 catalog entries")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h
index 23188290001ffb45563a9953a9f710bacb4dac89..fe4de5b31644de33b77a882fa21a18f48ecd1790 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h
@@ -76,7 +76,7 @@ static const struct dpu_sspp_cfg sm8150_sspp[] = {
{
.name = "sspp_0", .id = SSPP_VIG0,
.base = 0x4000, .len = 0x1f0,
- .features = VIG_SDM845_MASK,
+ .features = VIG_SDM845_MASK_SDMA,
.sblk = &dpu_vig_sblk_qseed3_1_4,
.xin_id = 0,
.type = SSPP_TYPE_VIG,
@@ -84,7 +84,7 @@ static const struct dpu_sspp_cfg sm8150_sspp[] = {
}, {
.name = "sspp_1", .id = SSPP_VIG1,
.base = 0x6000, .len = 0x1f0,
- .features = VIG_SDM845_MASK,
+ .features = VIG_SDM845_MASK_SDMA,
.sblk = &dpu_vig_sblk_qseed3_1_4,
.xin_id = 4,
.type = SSPP_TYPE_VIG,
@@ -92,7 +92,7 @@ static const struct dpu_sspp_cfg sm8150_sspp[] = {
}, {
.name = "sspp_2", .id = SSPP_VIG2,
.base = 0x8000, .len = 0x1f0,
- .features = VIG_SDM845_MASK,
+ .features = VIG_SDM845_MASK_SDMA,
.sblk = &dpu_vig_sblk_qseed3_1_4,
.xin_id = 8,
.type = SSPP_TYPE_VIG,
@@ -100,7 +100,7 @@ static const struct dpu_sspp_cfg sm8150_sspp[] = {
}, {
.name = "sspp_3", .id = SSPP_VIG3,
.base = 0xa000, .len = 0x1f0,
- .features = VIG_SDM845_MASK,
+ .features = VIG_SDM845_MASK_SDMA,
.sblk = &dpu_vig_sblk_qseed3_1_4,
.xin_id = 12,
.type = SSPP_TYPE_VIG,
@@ -108,7 +108,7 @@ static const struct dpu_sspp_cfg sm8150_sspp[] = {
}, {
.name = "sspp_8", .id = SSPP_DMA0,
.base = 0x24000, .len = 0x1f0,
- .features = DMA_SDM845_MASK,
+ .features = DMA_SDM845_MASK_SDMA,
.sblk = &dpu_dma_sblk,
.xin_id = 1,
.type = SSPP_TYPE_DMA,
@@ -116,7 +116,7 @@ static const struct dpu_sspp_cfg sm8150_sspp[] = {
}, {
.name = "sspp_9", .id = SSPP_DMA1,
.base = 0x26000, .len = 0x1f0,
- .features = DMA_SDM845_MASK,
+ .features = DMA_SDM845_MASK_SDMA,
.sblk = &dpu_dma_sblk,
.xin_id = 5,
.type = SSPP_TYPE_DMA,
@@ -124,7 +124,7 @@ static const struct dpu_sspp_cfg sm8150_sspp[] = {
}, {
.name = "sspp_10", .id = SSPP_DMA2,
.base = 0x28000, .len = 0x1f0,
- .features = DMA_CURSOR_SDM845_MASK,
+ .features = DMA_CURSOR_SDM845_MASK_SDMA,
.sblk = &dpu_dma_sblk,
.xin_id = 9,
.type = SSPP_TYPE_DMA,
@@ -132,7 +132,7 @@ static const struct dpu_sspp_cfg sm8150_sspp[] = {
}, {
.name = "sspp_11", .id = SSPP_DMA3,
.base = 0x2a000, .len = 0x1f0,
- .features = DMA_CURSOR_SDM845_MASK,
+ .features = DMA_CURSOR_SDM845_MASK_SDMA,
.sblk = &dpu_dma_sblk,
.xin_id = 13,
.type = SSPP_TYPE_DMA,
--
2.39.5
^ permalink raw reply related [flat|nested] 16+ messages in thread* Re: [PATCH 1/5] drm/msm/dpu: enable SmartDMA on SM8150
2025-03-08 5:38 ` [PATCH 1/5] drm/msm/dpu: enable SmartDMA on SM8150 Dmitry Baryshkov
@ 2025-04-25 18:26 ` Jessica Zhang
2025-04-25 18:53 ` Dmitry Baryshkov
0 siblings, 1 reply; 16+ messages in thread
From: Jessica Zhang @ 2025-04-25 18:26 UTC (permalink / raw)
To: Dmitry Baryshkov, Rob Clark, Abhinav Kumar, Sean Paul,
Marijn Suijten, David Airlie, Simona Vetter, Konrad Dybcio
Cc: linux-arm-msm, dri-devel, freedreno, linux-kernel
On 3/7/2025 9:38 PM, Dmitry Baryshkov wrote:
> From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
>
> Reworking of the catalog dropped the SmartDMA feature bit on the SM8150
> platform. Renable SmartDMA support on this SoC.
>
> Fixes: 460c410f02e4 ("drm/msm/dpu: duplicate sdm845 catalog entries")
Hi Dmitry,
The code LGTM, but was just wondering why there's a fixes tag for the
first two patches but not for the other catalog changes.
Is there some context I'm missing with regards to this?
Thanks,
Jessica Zhang
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
> drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h | 16 ++++++++--------
> 1 file changed, 8 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h
> index 23188290001ffb45563a9953a9f710bacb4dac89..fe4de5b31644de33b77a882fa21a18f48ecd1790 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h
> +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h
> @@ -76,7 +76,7 @@ static const struct dpu_sspp_cfg sm8150_sspp[] = {
> {
> .name = "sspp_0", .id = SSPP_VIG0,
> .base = 0x4000, .len = 0x1f0,
> - .features = VIG_SDM845_MASK,
> + .features = VIG_SDM845_MASK_SDMA,
> .sblk = &dpu_vig_sblk_qseed3_1_4,
> .xin_id = 0,
> .type = SSPP_TYPE_VIG,
> @@ -84,7 +84,7 @@ static const struct dpu_sspp_cfg sm8150_sspp[] = {
> }, {
> .name = "sspp_1", .id = SSPP_VIG1,
> .base = 0x6000, .len = 0x1f0,
> - .features = VIG_SDM845_MASK,
> + .features = VIG_SDM845_MASK_SDMA,
> .sblk = &dpu_vig_sblk_qseed3_1_4,
> .xin_id = 4,
> .type = SSPP_TYPE_VIG,
> @@ -92,7 +92,7 @@ static const struct dpu_sspp_cfg sm8150_sspp[] = {
> }, {
> .name = "sspp_2", .id = SSPP_VIG2,
> .base = 0x8000, .len = 0x1f0,
> - .features = VIG_SDM845_MASK,
> + .features = VIG_SDM845_MASK_SDMA,
> .sblk = &dpu_vig_sblk_qseed3_1_4,
> .xin_id = 8,
> .type = SSPP_TYPE_VIG,
> @@ -100,7 +100,7 @@ static const struct dpu_sspp_cfg sm8150_sspp[] = {
> }, {
> .name = "sspp_3", .id = SSPP_VIG3,
> .base = 0xa000, .len = 0x1f0,
> - .features = VIG_SDM845_MASK,
> + .features = VIG_SDM845_MASK_SDMA,
> .sblk = &dpu_vig_sblk_qseed3_1_4,
> .xin_id = 12,
> .type = SSPP_TYPE_VIG,
> @@ -108,7 +108,7 @@ static const struct dpu_sspp_cfg sm8150_sspp[] = {
> }, {
> .name = "sspp_8", .id = SSPP_DMA0,
> .base = 0x24000, .len = 0x1f0,
> - .features = DMA_SDM845_MASK,
> + .features = DMA_SDM845_MASK_SDMA,
> .sblk = &dpu_dma_sblk,
> .xin_id = 1,
> .type = SSPP_TYPE_DMA,
> @@ -116,7 +116,7 @@ static const struct dpu_sspp_cfg sm8150_sspp[] = {
> }, {
> .name = "sspp_9", .id = SSPP_DMA1,
> .base = 0x26000, .len = 0x1f0,
> - .features = DMA_SDM845_MASK,
> + .features = DMA_SDM845_MASK_SDMA,
> .sblk = &dpu_dma_sblk,
> .xin_id = 5,
> .type = SSPP_TYPE_DMA,
> @@ -124,7 +124,7 @@ static const struct dpu_sspp_cfg sm8150_sspp[] = {
> }, {
> .name = "sspp_10", .id = SSPP_DMA2,
> .base = 0x28000, .len = 0x1f0,
> - .features = DMA_CURSOR_SDM845_MASK,
> + .features = DMA_CURSOR_SDM845_MASK_SDMA,
> .sblk = &dpu_dma_sblk,
> .xin_id = 9,
> .type = SSPP_TYPE_DMA,
> @@ -132,7 +132,7 @@ static const struct dpu_sspp_cfg sm8150_sspp[] = {
> }, {
> .name = "sspp_11", .id = SSPP_DMA3,
> .base = 0x2a000, .len = 0x1f0,
> - .features = DMA_CURSOR_SDM845_MASK,
> + .features = DMA_CURSOR_SDM845_MASK_SDMA,
> .sblk = &dpu_dma_sblk,
> .xin_id = 13,
> .type = SSPP_TYPE_DMA,
>
^ permalink raw reply [flat|nested] 16+ messages in thread* Re: [PATCH 1/5] drm/msm/dpu: enable SmartDMA on SM8150
2025-04-25 18:26 ` Jessica Zhang
@ 2025-04-25 18:53 ` Dmitry Baryshkov
2025-04-25 20:18 ` Jessica Zhang
0 siblings, 1 reply; 16+ messages in thread
From: Dmitry Baryshkov @ 2025-04-25 18:53 UTC (permalink / raw)
To: Jessica Zhang
Cc: Dmitry Baryshkov, Rob Clark, Abhinav Kumar, Sean Paul,
Marijn Suijten, David Airlie, Simona Vetter, Konrad Dybcio,
linux-arm-msm, dri-devel, freedreno, linux-kernel
On Fri, Apr 25, 2025 at 11:26:20AM -0700, Jessica Zhang wrote:
>
>
> On 3/7/2025 9:38 PM, Dmitry Baryshkov wrote:
> > From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> >
> > Reworking of the catalog dropped the SmartDMA feature bit on the SM8150
> > platform. Renable SmartDMA support on this SoC.
> >
> > Fixes: 460c410f02e4 ("drm/msm/dpu: duplicate sdm845 catalog entries")
>
> Hi Dmitry,
>
> The code LGTM, but was just wondering why there's a fixes tag for the first
> two patches but not for the other catalog changes.
>
> Is there some context I'm missing with regards to this?
As I wrote in the commit message, SmartDMA for these two platforms was
enabled previously, but then it got disabled by the mistake in the
commit 460c410f02e4 ("drm/msm/dpu: duplicate sdm845 catalog entries").
For the rest of the platforms SmartDMA supoprt was never enabled, so
no need for Fixes tags.
>
> Thanks,
>
> Jessica Zhang
>
> > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> > ---
> > drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h | 16 ++++++++--------
> > 1 file changed, 8 insertions(+), 8 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h
> > index 23188290001ffb45563a9953a9f710bacb4dac89..fe4de5b31644de33b77a882fa21a18f48ecd1790 100644
> > --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h
> > +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h
> > @@ -76,7 +76,7 @@ static const struct dpu_sspp_cfg sm8150_sspp[] = {
> > {
> > .name = "sspp_0", .id = SSPP_VIG0,
> > .base = 0x4000, .len = 0x1f0,
> > - .features = VIG_SDM845_MASK,
> > + .features = VIG_SDM845_MASK_SDMA,
> > .sblk = &dpu_vig_sblk_qseed3_1_4,
> > .xin_id = 0,
> > .type = SSPP_TYPE_VIG,
> > @@ -84,7 +84,7 @@ static const struct dpu_sspp_cfg sm8150_sspp[] = {
> > }, {
> > .name = "sspp_1", .id = SSPP_VIG1,
> > .base = 0x6000, .len = 0x1f0,
> > - .features = VIG_SDM845_MASK,
> > + .features = VIG_SDM845_MASK_SDMA,
> > .sblk = &dpu_vig_sblk_qseed3_1_4,
> > .xin_id = 4,
> > .type = SSPP_TYPE_VIG,
> > @@ -92,7 +92,7 @@ static const struct dpu_sspp_cfg sm8150_sspp[] = {
> > }, {
> > .name = "sspp_2", .id = SSPP_VIG2,
> > .base = 0x8000, .len = 0x1f0,
> > - .features = VIG_SDM845_MASK,
> > + .features = VIG_SDM845_MASK_SDMA,
> > .sblk = &dpu_vig_sblk_qseed3_1_4,
> > .xin_id = 8,
> > .type = SSPP_TYPE_VIG,
> > @@ -100,7 +100,7 @@ static const struct dpu_sspp_cfg sm8150_sspp[] = {
> > }, {
> > .name = "sspp_3", .id = SSPP_VIG3,
> > .base = 0xa000, .len = 0x1f0,
> > - .features = VIG_SDM845_MASK,
> > + .features = VIG_SDM845_MASK_SDMA,
> > .sblk = &dpu_vig_sblk_qseed3_1_4,
> > .xin_id = 12,
> > .type = SSPP_TYPE_VIG,
> > @@ -108,7 +108,7 @@ static const struct dpu_sspp_cfg sm8150_sspp[] = {
> > }, {
> > .name = "sspp_8", .id = SSPP_DMA0,
> > .base = 0x24000, .len = 0x1f0,
> > - .features = DMA_SDM845_MASK,
> > + .features = DMA_SDM845_MASK_SDMA,
> > .sblk = &dpu_dma_sblk,
> > .xin_id = 1,
> > .type = SSPP_TYPE_DMA,
> > @@ -116,7 +116,7 @@ static const struct dpu_sspp_cfg sm8150_sspp[] = {
> > }, {
> > .name = "sspp_9", .id = SSPP_DMA1,
> > .base = 0x26000, .len = 0x1f0,
> > - .features = DMA_SDM845_MASK,
> > + .features = DMA_SDM845_MASK_SDMA,
> > .sblk = &dpu_dma_sblk,
> > .xin_id = 5,
> > .type = SSPP_TYPE_DMA,
> > @@ -124,7 +124,7 @@ static const struct dpu_sspp_cfg sm8150_sspp[] = {
> > }, {
> > .name = "sspp_10", .id = SSPP_DMA2,
> > .base = 0x28000, .len = 0x1f0,
> > - .features = DMA_CURSOR_SDM845_MASK,
> > + .features = DMA_CURSOR_SDM845_MASK_SDMA,
> > .sblk = &dpu_dma_sblk,
> > .xin_id = 9,
> > .type = SSPP_TYPE_DMA,
> > @@ -132,7 +132,7 @@ static const struct dpu_sspp_cfg sm8150_sspp[] = {
> > }, {
> > .name = "sspp_11", .id = SSPP_DMA3,
> > .base = 0x2a000, .len = 0x1f0,
> > - .features = DMA_CURSOR_SDM845_MASK,
> > + .features = DMA_CURSOR_SDM845_MASK_SDMA,
> > .sblk = &dpu_dma_sblk,
> > .xin_id = 13,
> > .type = SSPP_TYPE_DMA,
> >
>
--
With best wishes
Dmitry
^ permalink raw reply [flat|nested] 16+ messages in thread* Re: [PATCH 1/5] drm/msm/dpu: enable SmartDMA on SM8150
2025-04-25 18:53 ` Dmitry Baryshkov
@ 2025-04-25 20:18 ` Jessica Zhang
0 siblings, 0 replies; 16+ messages in thread
From: Jessica Zhang @ 2025-04-25 20:18 UTC (permalink / raw)
To: Dmitry Baryshkov
Cc: Dmitry Baryshkov, Rob Clark, Abhinav Kumar, Sean Paul,
Marijn Suijten, David Airlie, Simona Vetter, Konrad Dybcio,
linux-arm-msm, dri-devel, freedreno, linux-kernel
On 4/25/2025 11:53 AM, Dmitry Baryshkov wrote:
> On Fri, Apr 25, 2025 at 11:26:20AM -0700, Jessica Zhang wrote:
>>
>>
>> On 3/7/2025 9:38 PM, Dmitry Baryshkov wrote:
>>> From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
>>>
>>> Reworking of the catalog dropped the SmartDMA feature bit on the SM8150
>>> platform. Renable SmartDMA support on this SoC.
>>>
>>> Fixes: 460c410f02e4 ("drm/msm/dpu: duplicate sdm845 catalog entries")
>>
>> Hi Dmitry,
>>
>> The code LGTM, but was just wondering why there's a fixes tag for the first
>> two patches but not for the other catalog changes.
>>
>> Is there some context I'm missing with regards to this?
>
> As I wrote in the commit message, SmartDMA for these two platforms was
> enabled previously, but then it got disabled by the mistake in the
> commit 460c410f02e4 ("drm/msm/dpu: duplicate sdm845 catalog entries").
> For the rest of the platforms SmartDMA supoprt was never enabled, so
> no need for Fixes tags.
Ah, sorry I missed that sdm845_sspp has the SDMA feature flag.
Reviewed-by: Jessica Zhang <quic_jesszhan@quicinc.com>
>
>>
>> Thanks,
>>
>> Jessica Zhang
>>
>>> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
>>> ---
>>> drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h | 16 ++++++++--------
>>> 1 file changed, 8 insertions(+), 8 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h
>>> index 23188290001ffb45563a9953a9f710bacb4dac89..fe4de5b31644de33b77a882fa21a18f48ecd1790 100644
>>> --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h
>>> +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h
>>> @@ -76,7 +76,7 @@ static const struct dpu_sspp_cfg sm8150_sspp[] = {
>>> {
>>> .name = "sspp_0", .id = SSPP_VIG0,
>>> .base = 0x4000, .len = 0x1f0,
>>> - .features = VIG_SDM845_MASK,
>>> + .features = VIG_SDM845_MASK_SDMA,
>>> .sblk = &dpu_vig_sblk_qseed3_1_4,
>>> .xin_id = 0,
>>> .type = SSPP_TYPE_VIG,
>>> @@ -84,7 +84,7 @@ static const struct dpu_sspp_cfg sm8150_sspp[] = {
>>> }, {
>>> .name = "sspp_1", .id = SSPP_VIG1,
>>> .base = 0x6000, .len = 0x1f0,
>>> - .features = VIG_SDM845_MASK,
>>> + .features = VIG_SDM845_MASK_SDMA,
>>> .sblk = &dpu_vig_sblk_qseed3_1_4,
>>> .xin_id = 4,
>>> .type = SSPP_TYPE_VIG,
>>> @@ -92,7 +92,7 @@ static const struct dpu_sspp_cfg sm8150_sspp[] = {
>>> }, {
>>> .name = "sspp_2", .id = SSPP_VIG2,
>>> .base = 0x8000, .len = 0x1f0,
>>> - .features = VIG_SDM845_MASK,
>>> + .features = VIG_SDM845_MASK_SDMA,
>>> .sblk = &dpu_vig_sblk_qseed3_1_4,
>>> .xin_id = 8,
>>> .type = SSPP_TYPE_VIG,
>>> @@ -100,7 +100,7 @@ static const struct dpu_sspp_cfg sm8150_sspp[] = {
>>> }, {
>>> .name = "sspp_3", .id = SSPP_VIG3,
>>> .base = 0xa000, .len = 0x1f0,
>>> - .features = VIG_SDM845_MASK,
>>> + .features = VIG_SDM845_MASK_SDMA,
>>> .sblk = &dpu_vig_sblk_qseed3_1_4,
>>> .xin_id = 12,
>>> .type = SSPP_TYPE_VIG,
>>> @@ -108,7 +108,7 @@ static const struct dpu_sspp_cfg sm8150_sspp[] = {
>>> }, {
>>> .name = "sspp_8", .id = SSPP_DMA0,
>>> .base = 0x24000, .len = 0x1f0,
>>> - .features = DMA_SDM845_MASK,
>>> + .features = DMA_SDM845_MASK_SDMA,
>>> .sblk = &dpu_dma_sblk,
>>> .xin_id = 1,
>>> .type = SSPP_TYPE_DMA,
>>> @@ -116,7 +116,7 @@ static const struct dpu_sspp_cfg sm8150_sspp[] = {
>>> }, {
>>> .name = "sspp_9", .id = SSPP_DMA1,
>>> .base = 0x26000, .len = 0x1f0,
>>> - .features = DMA_SDM845_MASK,
>>> + .features = DMA_SDM845_MASK_SDMA,
>>> .sblk = &dpu_dma_sblk,
>>> .xin_id = 5,
>>> .type = SSPP_TYPE_DMA,
>>> @@ -124,7 +124,7 @@ static const struct dpu_sspp_cfg sm8150_sspp[] = {
>>> }, {
>>> .name = "sspp_10", .id = SSPP_DMA2,
>>> .base = 0x28000, .len = 0x1f0,
>>> - .features = DMA_CURSOR_SDM845_MASK,
>>> + .features = DMA_CURSOR_SDM845_MASK_SDMA,
>>> .sblk = &dpu_dma_sblk,
>>> .xin_id = 9,
>>> .type = SSPP_TYPE_DMA,
>>> @@ -132,7 +132,7 @@ static const struct dpu_sspp_cfg sm8150_sspp[] = {
>>> }, {
>>> .name = "sspp_11", .id = SSPP_DMA3,
>>> .base = 0x2a000, .len = 0x1f0,
>>> - .features = DMA_CURSOR_SDM845_MASK,
>>> + .features = DMA_CURSOR_SDM845_MASK_SDMA,
>>> .sblk = &dpu_dma_sblk,
>>> .xin_id = 13,
>>> .type = SSPP_TYPE_DMA,
>>>
>>
>
^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH 2/5] drm/msm/dpu: enable SmartDMA on SC8180X
2025-03-08 5:38 [PATCH 0/5] drm/msm/dpu: update SmartDMA feature masks Dmitry Baryshkov
2025-03-08 5:38 ` [PATCH 1/5] drm/msm/dpu: enable SmartDMA on SM8150 Dmitry Baryshkov
@ 2025-03-08 5:38 ` Dmitry Baryshkov
2025-04-25 20:24 ` Jessica Zhang
2025-03-08 5:38 ` [PATCH 3/5] drm/msm/dpu: enable SmartDMA on SC8280XP Dmitry Baryshkov
` (2 subsequent siblings)
4 siblings, 1 reply; 16+ messages in thread
From: Dmitry Baryshkov @ 2025-03-08 5:38 UTC (permalink / raw)
To: Rob Clark, Abhinav Kumar, Dmitry Baryshkov, Sean Paul,
Marijn Suijten, David Airlie, Simona Vetter, Konrad Dybcio
Cc: linux-arm-msm, dri-devel, freedreno, linux-kernel
From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reworking of the catalog dropped the SmartDMA feature bit on the SC8180X
platform. Renable SmartDMA support on this SoC.
Fixes: 460c410f02e4 ("drm/msm/dpu: duplicate sdm845 catalog entries")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h
index de8ccf589f1fe026ca0697d48f9533befda4659d..330490d10247e6347df71927ce601da1468f466e 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h
@@ -75,7 +75,7 @@ static const struct dpu_sspp_cfg sc8180x_sspp[] = {
{
.name = "sspp_0", .id = SSPP_VIG0,
.base = 0x4000, .len = 0x1f0,
- .features = VIG_SDM845_MASK,
+ .features = VIG_SDM845_MASK_SDMA,
.sblk = &dpu_vig_sblk_qseed3_1_4,
.xin_id = 0,
.type = SSPP_TYPE_VIG,
@@ -83,7 +83,7 @@ static const struct dpu_sspp_cfg sc8180x_sspp[] = {
}, {
.name = "sspp_1", .id = SSPP_VIG1,
.base = 0x6000, .len = 0x1f0,
- .features = VIG_SDM845_MASK,
+ .features = VIG_SDM845_MASK_SDMA,
.sblk = &dpu_vig_sblk_qseed3_1_4,
.xin_id = 4,
.type = SSPP_TYPE_VIG,
@@ -91,7 +91,7 @@ static const struct dpu_sspp_cfg sc8180x_sspp[] = {
}, {
.name = "sspp_2", .id = SSPP_VIG2,
.base = 0x8000, .len = 0x1f0,
- .features = VIG_SDM845_MASK,
+ .features = VIG_SDM845_MASK_SDMA,
.sblk = &dpu_vig_sblk_qseed3_1_4,
.xin_id = 8,
.type = SSPP_TYPE_VIG,
@@ -99,7 +99,7 @@ static const struct dpu_sspp_cfg sc8180x_sspp[] = {
}, {
.name = "sspp_3", .id = SSPP_VIG3,
.base = 0xa000, .len = 0x1f0,
- .features = VIG_SDM845_MASK,
+ .features = VIG_SDM845_MASK_SDMA,
.sblk = &dpu_vig_sblk_qseed3_1_4,
.xin_id = 12,
.type = SSPP_TYPE_VIG,
@@ -107,7 +107,7 @@ static const struct dpu_sspp_cfg sc8180x_sspp[] = {
}, {
.name = "sspp_8", .id = SSPP_DMA0,
.base = 0x24000, .len = 0x1f0,
- .features = DMA_SDM845_MASK,
+ .features = DMA_SDM845_MASK_SDMA,
.sblk = &dpu_dma_sblk,
.xin_id = 1,
.type = SSPP_TYPE_DMA,
@@ -115,7 +115,7 @@ static const struct dpu_sspp_cfg sc8180x_sspp[] = {
}, {
.name = "sspp_9", .id = SSPP_DMA1,
.base = 0x26000, .len = 0x1f0,
- .features = DMA_SDM845_MASK,
+ .features = DMA_SDM845_MASK_SDMA,
.sblk = &dpu_dma_sblk,
.xin_id = 5,
.type = SSPP_TYPE_DMA,
@@ -123,7 +123,7 @@ static const struct dpu_sspp_cfg sc8180x_sspp[] = {
}, {
.name = "sspp_10", .id = SSPP_DMA2,
.base = 0x28000, .len = 0x1f0,
- .features = DMA_CURSOR_SDM845_MASK,
+ .features = DMA_CURSOR_SDM845_MASK_SDMA,
.sblk = &dpu_dma_sblk,
.xin_id = 9,
.type = SSPP_TYPE_DMA,
@@ -131,7 +131,7 @@ static const struct dpu_sspp_cfg sc8180x_sspp[] = {
}, {
.name = "sspp_11", .id = SSPP_DMA3,
.base = 0x2a000, .len = 0x1f0,
- .features = DMA_CURSOR_SDM845_MASK,
+ .features = DMA_CURSOR_SDM845_MASK_SDMA,
.sblk = &dpu_dma_sblk,
.xin_id = 13,
.type = SSPP_TYPE_DMA,
--
2.39.5
^ permalink raw reply related [flat|nested] 16+ messages in thread* Re: [PATCH 2/5] drm/msm/dpu: enable SmartDMA on SC8180X
2025-03-08 5:38 ` [PATCH 2/5] drm/msm/dpu: enable SmartDMA on SC8180X Dmitry Baryshkov
@ 2025-04-25 20:24 ` Jessica Zhang
0 siblings, 0 replies; 16+ messages in thread
From: Jessica Zhang @ 2025-04-25 20:24 UTC (permalink / raw)
To: Dmitry Baryshkov, Rob Clark, Abhinav Kumar, Sean Paul,
Marijn Suijten, David Airlie, Simona Vetter, Konrad Dybcio
Cc: linux-arm-msm, dri-devel, freedreno, linux-kernel
On 3/7/2025 9:38 PM, Dmitry Baryshkov wrote:
> From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
>
> Reworking of the catalog dropped the SmartDMA feature bit on the SC8180X
> platform. Renable SmartDMA support on this SoC.
>
> Fixes: 460c410f02e4 ("drm/msm/dpu: duplicate sdm845 catalog entries")
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Jessica Zhang <quic_jesszhan@quicinc.com>
> ---
> drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h | 16 ++++++++--------
> 1 file changed, 8 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h
> index de8ccf589f1fe026ca0697d48f9533befda4659d..330490d10247e6347df71927ce601da1468f466e 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h
> +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h
> @@ -75,7 +75,7 @@ static const struct dpu_sspp_cfg sc8180x_sspp[] = {
> {
> .name = "sspp_0", .id = SSPP_VIG0,
> .base = 0x4000, .len = 0x1f0,
> - .features = VIG_SDM845_MASK,
> + .features = VIG_SDM845_MASK_SDMA,
> .sblk = &dpu_vig_sblk_qseed3_1_4,
> .xin_id = 0,
> .type = SSPP_TYPE_VIG,
> @@ -83,7 +83,7 @@ static const struct dpu_sspp_cfg sc8180x_sspp[] = {
> }, {
> .name = "sspp_1", .id = SSPP_VIG1,
> .base = 0x6000, .len = 0x1f0,
> - .features = VIG_SDM845_MASK,
> + .features = VIG_SDM845_MASK_SDMA,
> .sblk = &dpu_vig_sblk_qseed3_1_4,
> .xin_id = 4,
> .type = SSPP_TYPE_VIG,
> @@ -91,7 +91,7 @@ static const struct dpu_sspp_cfg sc8180x_sspp[] = {
> }, {
> .name = "sspp_2", .id = SSPP_VIG2,
> .base = 0x8000, .len = 0x1f0,
> - .features = VIG_SDM845_MASK,
> + .features = VIG_SDM845_MASK_SDMA,
> .sblk = &dpu_vig_sblk_qseed3_1_4,
> .xin_id = 8,
> .type = SSPP_TYPE_VIG,
> @@ -99,7 +99,7 @@ static const struct dpu_sspp_cfg sc8180x_sspp[] = {
> }, {
> .name = "sspp_3", .id = SSPP_VIG3,
> .base = 0xa000, .len = 0x1f0,
> - .features = VIG_SDM845_MASK,
> + .features = VIG_SDM845_MASK_SDMA,
> .sblk = &dpu_vig_sblk_qseed3_1_4,
> .xin_id = 12,
> .type = SSPP_TYPE_VIG,
> @@ -107,7 +107,7 @@ static const struct dpu_sspp_cfg sc8180x_sspp[] = {
> }, {
> .name = "sspp_8", .id = SSPP_DMA0,
> .base = 0x24000, .len = 0x1f0,
> - .features = DMA_SDM845_MASK,
> + .features = DMA_SDM845_MASK_SDMA,
> .sblk = &dpu_dma_sblk,
> .xin_id = 1,
> .type = SSPP_TYPE_DMA,
> @@ -115,7 +115,7 @@ static const struct dpu_sspp_cfg sc8180x_sspp[] = {
> }, {
> .name = "sspp_9", .id = SSPP_DMA1,
> .base = 0x26000, .len = 0x1f0,
> - .features = DMA_SDM845_MASK,
> + .features = DMA_SDM845_MASK_SDMA,
> .sblk = &dpu_dma_sblk,
> .xin_id = 5,
> .type = SSPP_TYPE_DMA,
> @@ -123,7 +123,7 @@ static const struct dpu_sspp_cfg sc8180x_sspp[] = {
> }, {
> .name = "sspp_10", .id = SSPP_DMA2,
> .base = 0x28000, .len = 0x1f0,
> - .features = DMA_CURSOR_SDM845_MASK,
> + .features = DMA_CURSOR_SDM845_MASK_SDMA,
> .sblk = &dpu_dma_sblk,
> .xin_id = 9,
> .type = SSPP_TYPE_DMA,
> @@ -131,7 +131,7 @@ static const struct dpu_sspp_cfg sc8180x_sspp[] = {
> }, {
> .name = "sspp_11", .id = SSPP_DMA3,
> .base = 0x2a000, .len = 0x1f0,
> - .features = DMA_CURSOR_SDM845_MASK,
> + .features = DMA_CURSOR_SDM845_MASK_SDMA,
> .sblk = &dpu_dma_sblk,
> .xin_id = 13,
> .type = SSPP_TYPE_DMA,
>
^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH 3/5] drm/msm/dpu: enable SmartDMA on SC8280XP
2025-03-08 5:38 [PATCH 0/5] drm/msm/dpu: update SmartDMA feature masks Dmitry Baryshkov
2025-03-08 5:38 ` [PATCH 1/5] drm/msm/dpu: enable SmartDMA on SM8150 Dmitry Baryshkov
2025-03-08 5:38 ` [PATCH 2/5] drm/msm/dpu: enable SmartDMA on SC8180X Dmitry Baryshkov
@ 2025-03-08 5:38 ` Dmitry Baryshkov
2025-04-25 18:34 ` Jessica Zhang
2025-03-08 5:38 ` [PATCH 4/5] drm/msm/dpu: enable SmartDMA on SM8550 Dmitry Baryshkov
2025-03-08 5:38 ` [PATCH 5/5] drm/msm/dpu: rename non-SmartDMA feature masks to be more explicit Dmitry Baryshkov
4 siblings, 1 reply; 16+ messages in thread
From: Dmitry Baryshkov @ 2025-03-08 5:38 UTC (permalink / raw)
To: Rob Clark, Abhinav Kumar, Dmitry Baryshkov, Sean Paul,
Marijn Suijten, David Airlie, Simona Vetter, Konrad Dybcio
Cc: linux-arm-msm, dri-devel, freedreno, linux-kernel
From: Abhinav Kumar <quic_abhinavk@quicinc.com>
In order to support more versatile configuration of the display pipes on
SC8280XP, enable SmartDMA for this platform.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h
index fcee1c3665f88a9defca4fec38dd76d56c97297e..923afc202f5195fa15bcfc1e141fc44134c965e4 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h
@@ -74,7 +74,7 @@ static const struct dpu_sspp_cfg sc8280xp_sspp[] = {
{
.name = "sspp_0", .id = SSPP_VIG0,
.base = 0x4000, .len = 0x2ac,
- .features = VIG_SDM845_MASK,
+ .features = VIG_SDM845_MASK_SDMA,
.sblk = &dpu_vig_sblk_qseed3_3_0,
.xin_id = 0,
.type = SSPP_TYPE_VIG,
@@ -82,7 +82,7 @@ static const struct dpu_sspp_cfg sc8280xp_sspp[] = {
}, {
.name = "sspp_1", .id = SSPP_VIG1,
.base = 0x6000, .len = 0x2ac,
- .features = VIG_SDM845_MASK,
+ .features = VIG_SDM845_MASK_SDMA,
.sblk = &dpu_vig_sblk_qseed3_3_0,
.xin_id = 4,
.type = SSPP_TYPE_VIG,
@@ -90,7 +90,7 @@ static const struct dpu_sspp_cfg sc8280xp_sspp[] = {
}, {
.name = "sspp_2", .id = SSPP_VIG2,
.base = 0x8000, .len = 0x2ac,
- .features = VIG_SDM845_MASK,
+ .features = VIG_SDM845_MASK_SDMA,
.sblk = &dpu_vig_sblk_qseed3_3_0,
.xin_id = 8,
.type = SSPP_TYPE_VIG,
@@ -98,7 +98,7 @@ static const struct dpu_sspp_cfg sc8280xp_sspp[] = {
}, {
.name = "sspp_3", .id = SSPP_VIG3,
.base = 0xa000, .len = 0x2ac,
- .features = VIG_SDM845_MASK,
+ .features = VIG_SDM845_MASK_SDMA,
.sblk = &dpu_vig_sblk_qseed3_3_0,
.xin_id = 12,
.type = SSPP_TYPE_VIG,
@@ -106,7 +106,7 @@ static const struct dpu_sspp_cfg sc8280xp_sspp[] = {
}, {
.name = "sspp_8", .id = SSPP_DMA0,
.base = 0x24000, .len = 0x2ac,
- .features = DMA_SDM845_MASK,
+ .features = DMA_SDM845_MASK_SDMA,
.sblk = &dpu_dma_sblk,
.xin_id = 1,
.type = SSPP_TYPE_DMA,
@@ -114,7 +114,7 @@ static const struct dpu_sspp_cfg sc8280xp_sspp[] = {
}, {
.name = "sspp_9", .id = SSPP_DMA1,
.base = 0x26000, .len = 0x2ac,
- .features = DMA_SDM845_MASK,
+ .features = DMA_SDM845_MASK_SDMA,
.sblk = &dpu_dma_sblk,
.xin_id = 5,
.type = SSPP_TYPE_DMA,
@@ -122,7 +122,7 @@ static const struct dpu_sspp_cfg sc8280xp_sspp[] = {
}, {
.name = "sspp_10", .id = SSPP_DMA2,
.base = 0x28000, .len = 0x2ac,
- .features = DMA_CURSOR_SDM845_MASK,
+ .features = DMA_CURSOR_SDM845_MASK_SDMA,
.sblk = &dpu_dma_sblk,
.xin_id = 9,
.type = SSPP_TYPE_DMA,
@@ -130,7 +130,7 @@ static const struct dpu_sspp_cfg sc8280xp_sspp[] = {
}, {
.name = "sspp_11", .id = SSPP_DMA3,
.base = 0x2a000, .len = 0x2ac,
- .features = DMA_CURSOR_SDM845_MASK,
+ .features = DMA_CURSOR_SDM845_MASK_SDMA,
.sblk = &dpu_dma_sblk,
.xin_id = 13,
.type = SSPP_TYPE_DMA,
--
2.39.5
^ permalink raw reply related [flat|nested] 16+ messages in thread* Re: [PATCH 3/5] drm/msm/dpu: enable SmartDMA on SC8280XP
2025-03-08 5:38 ` [PATCH 3/5] drm/msm/dpu: enable SmartDMA on SC8280XP Dmitry Baryshkov
@ 2025-04-25 18:34 ` Jessica Zhang
2025-04-25 19:00 ` Dmitry Baryshkov
0 siblings, 1 reply; 16+ messages in thread
From: Jessica Zhang @ 2025-04-25 18:34 UTC (permalink / raw)
To: Dmitry Baryshkov, Rob Clark, Abhinav Kumar, Sean Paul,
Marijn Suijten, David Airlie, Simona Vetter, Konrad Dybcio
Cc: linux-arm-msm, dri-devel, freedreno, linux-kernel
On 3/7/2025 9:38 PM, Dmitry Baryshkov wrote:
> From: Abhinav Kumar <quic_abhinavk@quicinc.com>
>
> In order to support more versatile configuration of the display pipes on
> SC8280XP, enable SmartDMA for this platform.
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Hi Dmitry,
Seems like Abhinav's signed-off-by is missing for the patches that list
him as author.
Thanks,
Jessica Zhang
> ---
> drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h | 16 ++++++++--------
> 1 file changed, 8 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h
> index fcee1c3665f88a9defca4fec38dd76d56c97297e..923afc202f5195fa15bcfc1e141fc44134c965e4 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h
> +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h
> @@ -74,7 +74,7 @@ static const struct dpu_sspp_cfg sc8280xp_sspp[] = {
> {
> .name = "sspp_0", .id = SSPP_VIG0,
> .base = 0x4000, .len = 0x2ac,
> - .features = VIG_SDM845_MASK,
> + .features = VIG_SDM845_MASK_SDMA,
> .sblk = &dpu_vig_sblk_qseed3_3_0,
> .xin_id = 0,
> .type = SSPP_TYPE_VIG,
> @@ -82,7 +82,7 @@ static const struct dpu_sspp_cfg sc8280xp_sspp[] = {
> }, {
> .name = "sspp_1", .id = SSPP_VIG1,
> .base = 0x6000, .len = 0x2ac,
> - .features = VIG_SDM845_MASK,
> + .features = VIG_SDM845_MASK_SDMA,
> .sblk = &dpu_vig_sblk_qseed3_3_0,
> .xin_id = 4,
> .type = SSPP_TYPE_VIG,
> @@ -90,7 +90,7 @@ static const struct dpu_sspp_cfg sc8280xp_sspp[] = {
> }, {
> .name = "sspp_2", .id = SSPP_VIG2,
> .base = 0x8000, .len = 0x2ac,
> - .features = VIG_SDM845_MASK,
> + .features = VIG_SDM845_MASK_SDMA,
> .sblk = &dpu_vig_sblk_qseed3_3_0,
> .xin_id = 8,
> .type = SSPP_TYPE_VIG,
> @@ -98,7 +98,7 @@ static const struct dpu_sspp_cfg sc8280xp_sspp[] = {
> }, {
> .name = "sspp_3", .id = SSPP_VIG3,
> .base = 0xa000, .len = 0x2ac,
> - .features = VIG_SDM845_MASK,
> + .features = VIG_SDM845_MASK_SDMA,
> .sblk = &dpu_vig_sblk_qseed3_3_0,
> .xin_id = 12,
> .type = SSPP_TYPE_VIG,
> @@ -106,7 +106,7 @@ static const struct dpu_sspp_cfg sc8280xp_sspp[] = {
> }, {
> .name = "sspp_8", .id = SSPP_DMA0,
> .base = 0x24000, .len = 0x2ac,
> - .features = DMA_SDM845_MASK,
> + .features = DMA_SDM845_MASK_SDMA,
> .sblk = &dpu_dma_sblk,
> .xin_id = 1,
> .type = SSPP_TYPE_DMA,
> @@ -114,7 +114,7 @@ static const struct dpu_sspp_cfg sc8280xp_sspp[] = {
> }, {
> .name = "sspp_9", .id = SSPP_DMA1,
> .base = 0x26000, .len = 0x2ac,
> - .features = DMA_SDM845_MASK,
> + .features = DMA_SDM845_MASK_SDMA,
> .sblk = &dpu_dma_sblk,
> .xin_id = 5,
> .type = SSPP_TYPE_DMA,
> @@ -122,7 +122,7 @@ static const struct dpu_sspp_cfg sc8280xp_sspp[] = {
> }, {
> .name = "sspp_10", .id = SSPP_DMA2,
> .base = 0x28000, .len = 0x2ac,
> - .features = DMA_CURSOR_SDM845_MASK,
> + .features = DMA_CURSOR_SDM845_MASK_SDMA,
> .sblk = &dpu_dma_sblk,
> .xin_id = 9,
> .type = SSPP_TYPE_DMA,
> @@ -130,7 +130,7 @@ static const struct dpu_sspp_cfg sc8280xp_sspp[] = {
> }, {
> .name = "sspp_11", .id = SSPP_DMA3,
> .base = 0x2a000, .len = 0x2ac,
> - .features = DMA_CURSOR_SDM845_MASK,
> + .features = DMA_CURSOR_SDM845_MASK_SDMA,
> .sblk = &dpu_dma_sblk,
> .xin_id = 13,
> .type = SSPP_TYPE_DMA,
>
^ permalink raw reply [flat|nested] 16+ messages in thread* Re: [PATCH 3/5] drm/msm/dpu: enable SmartDMA on SC8280XP
2025-04-25 18:34 ` Jessica Zhang
@ 2025-04-25 19:00 ` Dmitry Baryshkov
2025-04-25 19:30 ` Abhinav Kumar
0 siblings, 1 reply; 16+ messages in thread
From: Dmitry Baryshkov @ 2025-04-25 19:00 UTC (permalink / raw)
To: Jessica Zhang
Cc: Dmitry Baryshkov, Rob Clark, Abhinav Kumar, Sean Paul,
Marijn Suijten, David Airlie, Simona Vetter, Konrad Dybcio,
linux-arm-msm, dri-devel, freedreno, linux-kernel
On Fri, Apr 25, 2025 at 11:34:18AM -0700, Jessica Zhang wrote:
>
>
> On 3/7/2025 9:38 PM, Dmitry Baryshkov wrote:
> > From: Abhinav Kumar <quic_abhinavk@quicinc.com>
> >
> > In order to support more versatile configuration of the display pipes on
> > SC8280XP, enable SmartDMA for this platform.
> >
> > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
>
> Hi Dmitry,
>
> Seems like Abhinav's signed-off-by is missing for the patches that list him
> as author.
>
Good point. I don't remember, why these patches mark him as an author,
but lack SoB. Googling doesn't point out any previous patches. I think
the easiest way to fix the issue would be for Abhinav to respond with
the SoB. Another option would be for me to reset the author.
> Thanks,
>
> Jessica Zhang
>
> > ---
> > drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h | 16 ++++++++--------
> > 1 file changed, 8 insertions(+), 8 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h
> > index fcee1c3665f88a9defca4fec38dd76d56c97297e..923afc202f5195fa15bcfc1e141fc44134c965e4 100644
> > --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h
> > +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h
> > @@ -74,7 +74,7 @@ static const struct dpu_sspp_cfg sc8280xp_sspp[] = {
> > {
> > .name = "sspp_0", .id = SSPP_VIG0,
> > .base = 0x4000, .len = 0x2ac,
> > - .features = VIG_SDM845_MASK,
> > + .features = VIG_SDM845_MASK_SDMA,
> > .sblk = &dpu_vig_sblk_qseed3_3_0,
> > .xin_id = 0,
> > .type = SSPP_TYPE_VIG,
> > @@ -82,7 +82,7 @@ static const struct dpu_sspp_cfg sc8280xp_sspp[] = {
> > }, {
> > .name = "sspp_1", .id = SSPP_VIG1,
> > .base = 0x6000, .len = 0x2ac,
> > - .features = VIG_SDM845_MASK,
> > + .features = VIG_SDM845_MASK_SDMA,
> > .sblk = &dpu_vig_sblk_qseed3_3_0,
> > .xin_id = 4,
> > .type = SSPP_TYPE_VIG,
> > @@ -90,7 +90,7 @@ static const struct dpu_sspp_cfg sc8280xp_sspp[] = {
> > }, {
> > .name = "sspp_2", .id = SSPP_VIG2,
> > .base = 0x8000, .len = 0x2ac,
> > - .features = VIG_SDM845_MASK,
> > + .features = VIG_SDM845_MASK_SDMA,
> > .sblk = &dpu_vig_sblk_qseed3_3_0,
> > .xin_id = 8,
> > .type = SSPP_TYPE_VIG,
> > @@ -98,7 +98,7 @@ static const struct dpu_sspp_cfg sc8280xp_sspp[] = {
> > }, {
> > .name = "sspp_3", .id = SSPP_VIG3,
> > .base = 0xa000, .len = 0x2ac,
> > - .features = VIG_SDM845_MASK,
> > + .features = VIG_SDM845_MASK_SDMA,
> > .sblk = &dpu_vig_sblk_qseed3_3_0,
> > .xin_id = 12,
> > .type = SSPP_TYPE_VIG,
> > @@ -106,7 +106,7 @@ static const struct dpu_sspp_cfg sc8280xp_sspp[] = {
> > }, {
> > .name = "sspp_8", .id = SSPP_DMA0,
> > .base = 0x24000, .len = 0x2ac,
> > - .features = DMA_SDM845_MASK,
> > + .features = DMA_SDM845_MASK_SDMA,
> > .sblk = &dpu_dma_sblk,
> > .xin_id = 1,
> > .type = SSPP_TYPE_DMA,
> > @@ -114,7 +114,7 @@ static const struct dpu_sspp_cfg sc8280xp_sspp[] = {
> > }, {
> > .name = "sspp_9", .id = SSPP_DMA1,
> > .base = 0x26000, .len = 0x2ac,
> > - .features = DMA_SDM845_MASK,
> > + .features = DMA_SDM845_MASK_SDMA,
> > .sblk = &dpu_dma_sblk,
> > .xin_id = 5,
> > .type = SSPP_TYPE_DMA,
> > @@ -122,7 +122,7 @@ static const struct dpu_sspp_cfg sc8280xp_sspp[] = {
> > }, {
> > .name = "sspp_10", .id = SSPP_DMA2,
> > .base = 0x28000, .len = 0x2ac,
> > - .features = DMA_CURSOR_SDM845_MASK,
> > + .features = DMA_CURSOR_SDM845_MASK_SDMA,
> > .sblk = &dpu_dma_sblk,
> > .xin_id = 9,
> > .type = SSPP_TYPE_DMA,
> > @@ -130,7 +130,7 @@ static const struct dpu_sspp_cfg sc8280xp_sspp[] = {
> > }, {
> > .name = "sspp_11", .id = SSPP_DMA3,
> > .base = 0x2a000, .len = 0x2ac,
> > - .features = DMA_CURSOR_SDM845_MASK,
> > + .features = DMA_CURSOR_SDM845_MASK_SDMA,
> > .sblk = &dpu_dma_sblk,
> > .xin_id = 13,
> > .type = SSPP_TYPE_DMA,
> >
>
--
With best wishes
Dmitry
^ permalink raw reply [flat|nested] 16+ messages in thread* Re: [PATCH 3/5] drm/msm/dpu: enable SmartDMA on SC8280XP
2025-04-25 19:00 ` Dmitry Baryshkov
@ 2025-04-25 19:30 ` Abhinav Kumar
2025-04-25 20:18 ` Jessica Zhang
0 siblings, 1 reply; 16+ messages in thread
From: Abhinav Kumar @ 2025-04-25 19:30 UTC (permalink / raw)
To: Dmitry Baryshkov, Jessica Zhang
Cc: Dmitry Baryshkov, Rob Clark, Sean Paul, Marijn Suijten,
David Airlie, Simona Vetter, Konrad Dybcio, linux-arm-msm,
dri-devel, freedreno, linux-kernel
On 4/25/2025 12:00 PM, Dmitry Baryshkov wrote:
> On Fri, Apr 25, 2025 at 11:34:18AM -0700, Jessica Zhang wrote:
>>
>>
>> On 3/7/2025 9:38 PM, Dmitry Baryshkov wrote:
>>> From: Abhinav Kumar <quic_abhinavk@quicinc.com>
>>>
>>> In order to support more versatile configuration of the display pipes on
>>> SC8280XP, enable SmartDMA for this platform.
>>>
>>> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
>>
>> Hi Dmitry,
>>
>> Seems like Abhinav's signed-off-by is missing for the patches that list him
>> as author.
>>
>
> Good point. I don't remember, why these patches mark him as an author,
> but lack SoB. Googling doesn't point out any previous patches. I think
> the easiest way to fix the issue would be for Abhinav to respond with
> the SoB. Another option would be for me to reset the author.
>
I dont recall myself. You can go ahead and drop me as the author.
>> Thanks,
>>
>> Jessica Zhang
>>
>>> ---
>>> drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h | 16 ++++++++--------
>>> 1 file changed, 8 insertions(+), 8 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h
>>> index fcee1c3665f88a9defca4fec38dd76d56c97297e..923afc202f5195fa15bcfc1e141fc44134c965e4 100644
>>> --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h
>>> +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h
>>> @@ -74,7 +74,7 @@ static const struct dpu_sspp_cfg sc8280xp_sspp[] = {
>>> {
>>> .name = "sspp_0", .id = SSPP_VIG0,
>>> .base = 0x4000, .len = 0x2ac,
>>> - .features = VIG_SDM845_MASK,
>>> + .features = VIG_SDM845_MASK_SDMA,
>>> .sblk = &dpu_vig_sblk_qseed3_3_0,
>>> .xin_id = 0,
>>> .type = SSPP_TYPE_VIG,
>>> @@ -82,7 +82,7 @@ static const struct dpu_sspp_cfg sc8280xp_sspp[] = {
>>> }, {
>>> .name = "sspp_1", .id = SSPP_VIG1,
>>> .base = 0x6000, .len = 0x2ac,
>>> - .features = VIG_SDM845_MASK,
>>> + .features = VIG_SDM845_MASK_SDMA,
>>> .sblk = &dpu_vig_sblk_qseed3_3_0,
>>> .xin_id = 4,
>>> .type = SSPP_TYPE_VIG,
>>> @@ -90,7 +90,7 @@ static const struct dpu_sspp_cfg sc8280xp_sspp[] = {
>>> }, {
>>> .name = "sspp_2", .id = SSPP_VIG2,
>>> .base = 0x8000, .len = 0x2ac,
>>> - .features = VIG_SDM845_MASK,
>>> + .features = VIG_SDM845_MASK_SDMA,
>>> .sblk = &dpu_vig_sblk_qseed3_3_0,
>>> .xin_id = 8,
>>> .type = SSPP_TYPE_VIG,
>>> @@ -98,7 +98,7 @@ static const struct dpu_sspp_cfg sc8280xp_sspp[] = {
>>> }, {
>>> .name = "sspp_3", .id = SSPP_VIG3,
>>> .base = 0xa000, .len = 0x2ac,
>>> - .features = VIG_SDM845_MASK,
>>> + .features = VIG_SDM845_MASK_SDMA,
>>> .sblk = &dpu_vig_sblk_qseed3_3_0,
>>> .xin_id = 12,
>>> .type = SSPP_TYPE_VIG,
>>> @@ -106,7 +106,7 @@ static const struct dpu_sspp_cfg sc8280xp_sspp[] = {
>>> }, {
>>> .name = "sspp_8", .id = SSPP_DMA0,
>>> .base = 0x24000, .len = 0x2ac,
>>> - .features = DMA_SDM845_MASK,
>>> + .features = DMA_SDM845_MASK_SDMA,
>>> .sblk = &dpu_dma_sblk,
>>> .xin_id = 1,
>>> .type = SSPP_TYPE_DMA,
>>> @@ -114,7 +114,7 @@ static const struct dpu_sspp_cfg sc8280xp_sspp[] = {
>>> }, {
>>> .name = "sspp_9", .id = SSPP_DMA1,
>>> .base = 0x26000, .len = 0x2ac,
>>> - .features = DMA_SDM845_MASK,
>>> + .features = DMA_SDM845_MASK_SDMA,
>>> .sblk = &dpu_dma_sblk,
>>> .xin_id = 5,
>>> .type = SSPP_TYPE_DMA,
>>> @@ -122,7 +122,7 @@ static const struct dpu_sspp_cfg sc8280xp_sspp[] = {
>>> }, {
>>> .name = "sspp_10", .id = SSPP_DMA2,
>>> .base = 0x28000, .len = 0x2ac,
>>> - .features = DMA_CURSOR_SDM845_MASK,
>>> + .features = DMA_CURSOR_SDM845_MASK_SDMA,
>>> .sblk = &dpu_dma_sblk,
>>> .xin_id = 9,
>>> .type = SSPP_TYPE_DMA,
>>> @@ -130,7 +130,7 @@ static const struct dpu_sspp_cfg sc8280xp_sspp[] = {
>>> }, {
>>> .name = "sspp_11", .id = SSPP_DMA3,
>>> .base = 0x2a000, .len = 0x2ac,
>>> - .features = DMA_CURSOR_SDM845_MASK,
>>> + .features = DMA_CURSOR_SDM845_MASK_SDMA,
>>> .sblk = &dpu_dma_sblk,
>>> .xin_id = 13,
>>> .type = SSPP_TYPE_DMA,
>>>
>>
>
^ permalink raw reply [flat|nested] 16+ messages in thread* Re: [PATCH 3/5] drm/msm/dpu: enable SmartDMA on SC8280XP
2025-04-25 19:30 ` Abhinav Kumar
@ 2025-04-25 20:18 ` Jessica Zhang
0 siblings, 0 replies; 16+ messages in thread
From: Jessica Zhang @ 2025-04-25 20:18 UTC (permalink / raw)
To: Abhinav Kumar, Dmitry Baryshkov
Cc: Dmitry Baryshkov, Rob Clark, Sean Paul, Marijn Suijten,
David Airlie, Simona Vetter, Konrad Dybcio, linux-arm-msm,
dri-devel, freedreno, linux-kernel
On 4/25/2025 12:30 PM, Abhinav Kumar wrote:
>
>
> On 4/25/2025 12:00 PM, Dmitry Baryshkov wrote:
>> On Fri, Apr 25, 2025 at 11:34:18AM -0700, Jessica Zhang wrote:
>>>
>>>
>>> On 3/7/2025 9:38 PM, Dmitry Baryshkov wrote:
>>>> From: Abhinav Kumar <quic_abhinavk@quicinc.com>
>>>>
>>>> In order to support more versatile configuration of the display
>>>> pipes on
>>>> SC8280XP, enable SmartDMA for this platform.
>>>>
>>>> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
>>>
>>> Hi Dmitry,
>>>
>>> Seems like Abhinav's signed-off-by is missing for the patches that
>>> list him
>>> as author.
>>>
>>
>> Good point. I don't remember, why these patches mark him as an author,
>> but lack SoB. Googling doesn't point out any previous patches. I think
>> the easiest way to fix the issue would be for Abhinav to respond with
>> the SoB. Another option would be for me to reset the author.
>>
>
> I dont recall myself. You can go ahead and drop me as the author.
Sounds good. With the authorship fixed,
Reviewed-by: Jessica Zhang <quic_jesszhan@quicinc.com>
>
>>> Thanks,
>>>
>>> Jessica Zhang
>>>
>>>> ---
>>>> drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h | 16 +++
>>>> +++++--------
>>>> 1 file changed, 8 insertions(+), 8 deletions(-)
>>>>
>>>> diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/
>>>> dpu_8_0_sc8280xp.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/
>>>> dpu_8_0_sc8280xp.h
>>>> index
>>>> fcee1c3665f88a9defca4fec38dd76d56c97297e..923afc202f5195fa15bcfc1e141fc44134c965e4 100644
>>>> --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h
>>>> +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h
>>>> @@ -74,7 +74,7 @@ static const struct dpu_sspp_cfg sc8280xp_sspp[] = {
>>>> {
>>>> .name = "sspp_0", .id = SSPP_VIG0,
>>>> .base = 0x4000, .len = 0x2ac,
>>>> - .features = VIG_SDM845_MASK,
>>>> + .features = VIG_SDM845_MASK_SDMA,
>>>> .sblk = &dpu_vig_sblk_qseed3_3_0,
>>>> .xin_id = 0,
>>>> .type = SSPP_TYPE_VIG,
>>>> @@ -82,7 +82,7 @@ static const struct dpu_sspp_cfg sc8280xp_sspp[] = {
>>>> }, {
>>>> .name = "sspp_1", .id = SSPP_VIG1,
>>>> .base = 0x6000, .len = 0x2ac,
>>>> - .features = VIG_SDM845_MASK,
>>>> + .features = VIG_SDM845_MASK_SDMA,
>>>> .sblk = &dpu_vig_sblk_qseed3_3_0,
>>>> .xin_id = 4,
>>>> .type = SSPP_TYPE_VIG,
>>>> @@ -90,7 +90,7 @@ static const struct dpu_sspp_cfg sc8280xp_sspp[] = {
>>>> }, {
>>>> .name = "sspp_2", .id = SSPP_VIG2,
>>>> .base = 0x8000, .len = 0x2ac,
>>>> - .features = VIG_SDM845_MASK,
>>>> + .features = VIG_SDM845_MASK_SDMA,
>>>> .sblk = &dpu_vig_sblk_qseed3_3_0,
>>>> .xin_id = 8,
>>>> .type = SSPP_TYPE_VIG,
>>>> @@ -98,7 +98,7 @@ static const struct dpu_sspp_cfg sc8280xp_sspp[] = {
>>>> }, {
>>>> .name = "sspp_3", .id = SSPP_VIG3,
>>>> .base = 0xa000, .len = 0x2ac,
>>>> - .features = VIG_SDM845_MASK,
>>>> + .features = VIG_SDM845_MASK_SDMA,
>>>> .sblk = &dpu_vig_sblk_qseed3_3_0,
>>>> .xin_id = 12,
>>>> .type = SSPP_TYPE_VIG,
>>>> @@ -106,7 +106,7 @@ static const struct dpu_sspp_cfg sc8280xp_sspp[]
>>>> = {
>>>> }, {
>>>> .name = "sspp_8", .id = SSPP_DMA0,
>>>> .base = 0x24000, .len = 0x2ac,
>>>> - .features = DMA_SDM845_MASK,
>>>> + .features = DMA_SDM845_MASK_SDMA,
>>>> .sblk = &dpu_dma_sblk,
>>>> .xin_id = 1,
>>>> .type = SSPP_TYPE_DMA,
>>>> @@ -114,7 +114,7 @@ static const struct dpu_sspp_cfg sc8280xp_sspp[]
>>>> = {
>>>> }, {
>>>> .name = "sspp_9", .id = SSPP_DMA1,
>>>> .base = 0x26000, .len = 0x2ac,
>>>> - .features = DMA_SDM845_MASK,
>>>> + .features = DMA_SDM845_MASK_SDMA,
>>>> .sblk = &dpu_dma_sblk,
>>>> .xin_id = 5,
>>>> .type = SSPP_TYPE_DMA,
>>>> @@ -122,7 +122,7 @@ static const struct dpu_sspp_cfg sc8280xp_sspp[]
>>>> = {
>>>> }, {
>>>> .name = "sspp_10", .id = SSPP_DMA2,
>>>> .base = 0x28000, .len = 0x2ac,
>>>> - .features = DMA_CURSOR_SDM845_MASK,
>>>> + .features = DMA_CURSOR_SDM845_MASK_SDMA,
>>>> .sblk = &dpu_dma_sblk,
>>>> .xin_id = 9,
>>>> .type = SSPP_TYPE_DMA,
>>>> @@ -130,7 +130,7 @@ static const struct dpu_sspp_cfg sc8280xp_sspp[]
>>>> = {
>>>> }, {
>>>> .name = "sspp_11", .id = SSPP_DMA3,
>>>> .base = 0x2a000, .len = 0x2ac,
>>>> - .features = DMA_CURSOR_SDM845_MASK,
>>>> + .features = DMA_CURSOR_SDM845_MASK_SDMA,
>>>> .sblk = &dpu_dma_sblk,
>>>> .xin_id = 13,
>>>> .type = SSPP_TYPE_DMA,
>>>>
>>>
>>
>
^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH 4/5] drm/msm/dpu: enable SmartDMA on SM8550
2025-03-08 5:38 [PATCH 0/5] drm/msm/dpu: update SmartDMA feature masks Dmitry Baryshkov
` (2 preceding siblings ...)
2025-03-08 5:38 ` [PATCH 3/5] drm/msm/dpu: enable SmartDMA on SC8280XP Dmitry Baryshkov
@ 2025-03-08 5:38 ` Dmitry Baryshkov
2025-04-25 20:26 ` Jessica Zhang
2025-03-08 5:38 ` [PATCH 5/5] drm/msm/dpu: rename non-SmartDMA feature masks to be more explicit Dmitry Baryshkov
4 siblings, 1 reply; 16+ messages in thread
From: Dmitry Baryshkov @ 2025-03-08 5:38 UTC (permalink / raw)
To: Rob Clark, Abhinav Kumar, Dmitry Baryshkov, Sean Paul,
Marijn Suijten, David Airlie, Simona Vetter, Konrad Dybcio
Cc: linux-arm-msm, dri-devel, freedreno, linux-kernel
From: Abhinav Kumar <quic_abhinavk@quicinc.com>
In order to support more versatile configuration of the display pipes on
SM8550, enable SmartDMA for this platform.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
.../gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h | 20 ++++++++++----------
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h
index a5b90e5e31202900c0bb5bc4a705a6b269005474..2379e119c8c5cb9d68cfaa4feea990ce7e24d569 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h
@@ -66,70 +66,70 @@ static const struct dpu_sspp_cfg sm8550_sspp[] = {
{
.name = "sspp_0", .id = SSPP_VIG0,
.base = 0x4000, .len = 0x344,
- .features = VIG_SDM845_MASK,
+ .features = VIG_SDM845_MASK_SDMA,
.sblk = &dpu_vig_sblk_qseed3_3_2,
.xin_id = 0,
.type = SSPP_TYPE_VIG,
}, {
.name = "sspp_1", .id = SSPP_VIG1,
.base = 0x6000, .len = 0x344,
- .features = VIG_SDM845_MASK,
+ .features = VIG_SDM845_MASK_SDMA,
.sblk = &dpu_vig_sblk_qseed3_3_2,
.xin_id = 4,
.type = SSPP_TYPE_VIG,
}, {
.name = "sspp_2", .id = SSPP_VIG2,
.base = 0x8000, .len = 0x344,
- .features = VIG_SDM845_MASK,
+ .features = VIG_SDM845_MASK_SDMA,
.sblk = &dpu_vig_sblk_qseed3_3_2,
.xin_id = 8,
.type = SSPP_TYPE_VIG,
}, {
.name = "sspp_3", .id = SSPP_VIG3,
.base = 0xa000, .len = 0x344,
- .features = VIG_SDM845_MASK,
+ .features = VIG_SDM845_MASK_SDMA,
.sblk = &dpu_vig_sblk_qseed3_3_2,
.xin_id = 12,
.type = SSPP_TYPE_VIG,
}, {
.name = "sspp_8", .id = SSPP_DMA0,
.base = 0x24000, .len = 0x344,
- .features = DMA_SDM845_MASK,
+ .features = DMA_SDM845_MASK_SDMA,
.sblk = &dpu_dma_sblk,
.xin_id = 1,
.type = SSPP_TYPE_DMA,
}, {
.name = "sspp_9", .id = SSPP_DMA1,
.base = 0x26000, .len = 0x344,
- .features = DMA_SDM845_MASK,
+ .features = DMA_SDM845_MASK_SDMA,
.sblk = &dpu_dma_sblk,
.xin_id = 5,
.type = SSPP_TYPE_DMA,
}, {
.name = "sspp_10", .id = SSPP_DMA2,
.base = 0x28000, .len = 0x344,
- .features = DMA_SDM845_MASK,
+ .features = DMA_SDM845_MASK_SDMA,
.sblk = &dpu_dma_sblk,
.xin_id = 9,
.type = SSPP_TYPE_DMA,
}, {
.name = "sspp_11", .id = SSPP_DMA3,
.base = 0x2a000, .len = 0x344,
- .features = DMA_SDM845_MASK,
+ .features = DMA_SDM845_MASK_SDMA,
.sblk = &dpu_dma_sblk,
.xin_id = 13,
.type = SSPP_TYPE_DMA,
}, {
.name = "sspp_12", .id = SSPP_DMA4,
.base = 0x2c000, .len = 0x344,
- .features = DMA_CURSOR_SDM845_MASK,
+ .features = DMA_CURSOR_SDM845_MASK_SDMA,
.sblk = &dpu_dma_sblk,
.xin_id = 14,
.type = SSPP_TYPE_DMA,
}, {
.name = "sspp_13", .id = SSPP_DMA5,
.base = 0x2e000, .len = 0x344,
- .features = DMA_CURSOR_SDM845_MASK,
+ .features = DMA_CURSOR_SDM845_MASK_SDMA,
.sblk = &dpu_dma_sblk,
.xin_id = 15,
.type = SSPP_TYPE_DMA,
--
2.39.5
^ permalink raw reply related [flat|nested] 16+ messages in thread* Re: [PATCH 4/5] drm/msm/dpu: enable SmartDMA on SM8550
2025-03-08 5:38 ` [PATCH 4/5] drm/msm/dpu: enable SmartDMA on SM8550 Dmitry Baryshkov
@ 2025-04-25 20:26 ` Jessica Zhang
0 siblings, 0 replies; 16+ messages in thread
From: Jessica Zhang @ 2025-04-25 20:26 UTC (permalink / raw)
To: Dmitry Baryshkov, Rob Clark, Abhinav Kumar, Sean Paul,
Marijn Suijten, David Airlie, Simona Vetter, Konrad Dybcio
Cc: linux-arm-msm, dri-devel, freedreno, linux-kernel
On 3/7/2025 9:38 PM, Dmitry Baryshkov wrote:
> From: Abhinav Kumar <quic_abhinavk@quicinc.com>
>
> In order to support more versatile configuration of the display pipes on
> SM8550, enable SmartDMA for this platform.
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
With authorship fixed,
Reviewed-by: Jessica Zhang <quic_jesszhan@quicinc.com>
> ---
> .../gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h | 20 ++++++++++----------
> 1 file changed, 10 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h
> index a5b90e5e31202900c0bb5bc4a705a6b269005474..2379e119c8c5cb9d68cfaa4feea990ce7e24d569 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h
> +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h
> @@ -66,70 +66,70 @@ static const struct dpu_sspp_cfg sm8550_sspp[] = {
> {
> .name = "sspp_0", .id = SSPP_VIG0,
> .base = 0x4000, .len = 0x344,
> - .features = VIG_SDM845_MASK,
> + .features = VIG_SDM845_MASK_SDMA,
> .sblk = &dpu_vig_sblk_qseed3_3_2,
> .xin_id = 0,
> .type = SSPP_TYPE_VIG,
> }, {
> .name = "sspp_1", .id = SSPP_VIG1,
> .base = 0x6000, .len = 0x344,
> - .features = VIG_SDM845_MASK,
> + .features = VIG_SDM845_MASK_SDMA,
> .sblk = &dpu_vig_sblk_qseed3_3_2,
> .xin_id = 4,
> .type = SSPP_TYPE_VIG,
> }, {
> .name = "sspp_2", .id = SSPP_VIG2,
> .base = 0x8000, .len = 0x344,
> - .features = VIG_SDM845_MASK,
> + .features = VIG_SDM845_MASK_SDMA,
> .sblk = &dpu_vig_sblk_qseed3_3_2,
> .xin_id = 8,
> .type = SSPP_TYPE_VIG,
> }, {
> .name = "sspp_3", .id = SSPP_VIG3,
> .base = 0xa000, .len = 0x344,
> - .features = VIG_SDM845_MASK,
> + .features = VIG_SDM845_MASK_SDMA,
> .sblk = &dpu_vig_sblk_qseed3_3_2,
> .xin_id = 12,
> .type = SSPP_TYPE_VIG,
> }, {
> .name = "sspp_8", .id = SSPP_DMA0,
> .base = 0x24000, .len = 0x344,
> - .features = DMA_SDM845_MASK,
> + .features = DMA_SDM845_MASK_SDMA,
> .sblk = &dpu_dma_sblk,
> .xin_id = 1,
> .type = SSPP_TYPE_DMA,
> }, {
> .name = "sspp_9", .id = SSPP_DMA1,
> .base = 0x26000, .len = 0x344,
> - .features = DMA_SDM845_MASK,
> + .features = DMA_SDM845_MASK_SDMA,
> .sblk = &dpu_dma_sblk,
> .xin_id = 5,
> .type = SSPP_TYPE_DMA,
> }, {
> .name = "sspp_10", .id = SSPP_DMA2,
> .base = 0x28000, .len = 0x344,
> - .features = DMA_SDM845_MASK,
> + .features = DMA_SDM845_MASK_SDMA,
> .sblk = &dpu_dma_sblk,
> .xin_id = 9,
> .type = SSPP_TYPE_DMA,
> }, {
> .name = "sspp_11", .id = SSPP_DMA3,
> .base = 0x2a000, .len = 0x344,
> - .features = DMA_SDM845_MASK,
> + .features = DMA_SDM845_MASK_SDMA,
> .sblk = &dpu_dma_sblk,
> .xin_id = 13,
> .type = SSPP_TYPE_DMA,
> }, {
> .name = "sspp_12", .id = SSPP_DMA4,
> .base = 0x2c000, .len = 0x344,
> - .features = DMA_CURSOR_SDM845_MASK,
> + .features = DMA_CURSOR_SDM845_MASK_SDMA,
> .sblk = &dpu_dma_sblk,
> .xin_id = 14,
> .type = SSPP_TYPE_DMA,
> }, {
> .name = "sspp_13", .id = SSPP_DMA5,
> .base = 0x2e000, .len = 0x344,
> - .features = DMA_CURSOR_SDM845_MASK,
> + .features = DMA_CURSOR_SDM845_MASK_SDMA,
> .sblk = &dpu_dma_sblk,
> .xin_id = 15,
> .type = SSPP_TYPE_DMA,
>
^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH 5/5] drm/msm/dpu: rename non-SmartDMA feature masks to be more explicit
2025-03-08 5:38 [PATCH 0/5] drm/msm/dpu: update SmartDMA feature masks Dmitry Baryshkov
` (3 preceding siblings ...)
2025-03-08 5:38 ` [PATCH 4/5] drm/msm/dpu: enable SmartDMA on SM8550 Dmitry Baryshkov
@ 2025-03-08 5:38 ` Dmitry Baryshkov
2025-04-25 21:05 ` Jessica Zhang
4 siblings, 1 reply; 16+ messages in thread
From: Dmitry Baryshkov @ 2025-03-08 5:38 UTC (permalink / raw)
To: Rob Clark, Abhinav Kumar, Dmitry Baryshkov, Sean Paul,
Marijn Suijten, David Airlie, Simona Vetter, Konrad Dybcio
Cc: linux-arm-msm, dri-devel, freedreno, linux-kernel
From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
It is easy to skip or ignore the fact that the default SSPP feature
masks for SDM845+ don't include the SmartDMA bit (both during
development and during the review stage). Rename SSPP feature masks to
make it more explicit that using non-SmartDMA masks should not be an
exception rather than the rule.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_2_sm7150.h | 10 +++++-----
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_4_sm6125.h | 6 +++---
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h | 8 ++++----
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_3_sm6115.h | 4 ++--
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_4_sm6350.h | 8 ++++----
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_5_qcm2290.h | 2 +-
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_9_sm6375.h | 4 ++--
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 16 ++++++++--------
8 files changed, 29 insertions(+), 29 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_2_sm7150.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_2_sm7150.h
index b2ebf76e386718b95292e119d53e67f5d9f0743a..99d8b1218db812ca7e99caf62aa48476aee5e02d 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_2_sm7150.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_2_sm7150.h
@@ -72,7 +72,7 @@ static const struct dpu_sspp_cfg sm7150_sspp[] = {
{
.name = "sspp_0", .id = SSPP_VIG0,
.base = 0x4000, .len = 0x1f0,
- .features = VIG_SDM845_MASK,
+ .features = VIG_SDM845_MASK_NO_SDMA,
.sblk = &dpu_vig_sblk_qseed3_2_4,
.xin_id = 0,
.type = SSPP_TYPE_VIG,
@@ -80,7 +80,7 @@ static const struct dpu_sspp_cfg sm7150_sspp[] = {
}, {
.name = "sspp_1", .id = SSPP_VIG1,
.base = 0x6000, .len = 0x1f0,
- .features = VIG_SDM845_MASK,
+ .features = VIG_SDM845_MASK_NO_SDMA,
.sblk = &dpu_vig_sblk_qseed3_2_4,
.xin_id = 4,
.type = SSPP_TYPE_VIG,
@@ -88,7 +88,7 @@ static const struct dpu_sspp_cfg sm7150_sspp[] = {
}, {
.name = "sspp_2", .id = SSPP_DMA0,
.base = 0x24000, .len = 0x1f0,
- .features = DMA_SDM845_MASK,
+ .features = DMA_SDM845_MASK_NO_SDMA,
.sblk = &dpu_dma_sblk,
.xin_id = 1,
.type = SSPP_TYPE_DMA,
@@ -96,7 +96,7 @@ static const struct dpu_sspp_cfg sm7150_sspp[] = {
}, {
.name = "sspp_9", .id = SSPP_DMA1,
.base = 0x26000, .len = 0x1f0,
- .features = DMA_SDM845_MASK,
+ .features = DMA_SDM845_MASK_NO_SDMA,
.sblk = &dpu_dma_sblk,
.xin_id = 5,
.type = SSPP_TYPE_DMA,
@@ -104,7 +104,7 @@ static const struct dpu_sspp_cfg sm7150_sspp[] = {
}, {
.name = "sspp_10", .id = SSPP_DMA2,
.base = 0x28000, .len = 0x1f0,
- .features = DMA_CURSOR_SDM845_MASK,
+ .features = DMA_CURSOR_SDM845_MASK_NO_SDMA,
.sblk = &dpu_dma_sblk,
.xin_id = 9,
.type = SSPP_TYPE_DMA,
diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_4_sm6125.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_4_sm6125.h
index cc2951112bdadca60fe51faeecb81e57280662c3..ea1004e2295b215ef165fef862fa9c15c6ab3856 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_4_sm6125.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_4_sm6125.h
@@ -69,7 +69,7 @@ static const struct dpu_sspp_cfg sm6125_sspp[] = {
{
.name = "sspp_0", .id = SSPP_VIG0,
.base = 0x4000, .len = 0x1f0,
- .features = VIG_SDM845_MASK,
+ .features = VIG_SDM845_MASK_NO_SDMA,
.sblk = &dpu_vig_sblk_qseed3_2_4,
.xin_id = 0,
.type = SSPP_TYPE_VIG,
@@ -77,7 +77,7 @@ static const struct dpu_sspp_cfg sm6125_sspp[] = {
}, {
.name = "sspp_8", .id = SSPP_DMA0,
.base = 0x24000, .len = 0x1f0,
- .features = DMA_SDM845_MASK,
+ .features = DMA_SDM845_MASK_NO_SDMA,
.sblk = &dpu_dma_sblk,
.xin_id = 1,
.type = SSPP_TYPE_DMA,
@@ -85,7 +85,7 @@ static const struct dpu_sspp_cfg sm6125_sspp[] = {
}, {
.name = "sspp_9", .id = SSPP_DMA1,
.base = 0x26000, .len = 0x1f0,
- .features = DMA_SDM845_MASK,
+ .features = DMA_SDM845_MASK_NO_SDMA,
.sblk = &dpu_dma_sblk,
.xin_id = 5,
.type = SSPP_TYPE_DMA,
diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h
index 42a00550eefbc10e97515340d6d8b33d4ef5e3fd..5e15a8dcbc2b701e47e352a8aaee72a25240817c 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h
@@ -51,7 +51,7 @@ static const struct dpu_sspp_cfg sc7180_sspp[] = {
{
.name = "sspp_0", .id = SSPP_VIG0,
.base = 0x4000, .len = 0x1f8,
- .features = VIG_SDM845_MASK,
+ .features = VIG_SDM845_MASK_NO_SDMA,
.sblk = &dpu_vig_sblk_qseed3_3_0,
.xin_id = 0,
.type = SSPP_TYPE_VIG,
@@ -59,7 +59,7 @@ static const struct dpu_sspp_cfg sc7180_sspp[] = {
}, {
.name = "sspp_8", .id = SSPP_DMA0,
.base = 0x24000, .len = 0x1f8,
- .features = DMA_SDM845_MASK,
+ .features = DMA_SDM845_MASK_NO_SDMA,
.sblk = &dpu_dma_sblk,
.xin_id = 1,
.type = SSPP_TYPE_DMA,
@@ -67,7 +67,7 @@ static const struct dpu_sspp_cfg sc7180_sspp[] = {
}, {
.name = "sspp_9", .id = SSPP_DMA1,
.base = 0x26000, .len = 0x1f8,
- .features = DMA_CURSOR_SDM845_MASK,
+ .features = DMA_CURSOR_SDM845_MASK_NO_SDMA,
.sblk = &dpu_dma_sblk,
.xin_id = 5,
.type = SSPP_TYPE_DMA,
@@ -75,7 +75,7 @@ static const struct dpu_sspp_cfg sc7180_sspp[] = {
}, {
.name = "sspp_10", .id = SSPP_DMA2,
.base = 0x28000, .len = 0x1f8,
- .features = DMA_CURSOR_SDM845_MASK,
+ .features = DMA_CURSOR_SDM845_MASK_NO_SDMA,
.sblk = &dpu_dma_sblk,
.xin_id = 9,
.type = SSPP_TYPE_DMA,
diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_3_sm6115.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_3_sm6115.h
index 43f64a005f5a89e09ee9506a12cfff781530cb80..c5fd89dd7c89046bdbf1b1bf223aac2e3c4c0b26 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_3_sm6115.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_3_sm6115.h
@@ -38,7 +38,7 @@ static const struct dpu_sspp_cfg sm6115_sspp[] = {
{
.name = "sspp_0", .id = SSPP_VIG0,
.base = 0x4000, .len = 0x1f8,
- .features = VIG_SDM845_MASK,
+ .features = VIG_SDM845_MASK_NO_SDMA,
.sblk = &dpu_vig_sblk_qseed3_3_0,
.xin_id = 0,
.type = SSPP_TYPE_VIG,
@@ -46,7 +46,7 @@ static const struct dpu_sspp_cfg sm6115_sspp[] = {
}, {
.name = "sspp_8", .id = SSPP_DMA0,
.base = 0x24000, .len = 0x1f8,
- .features = DMA_SDM845_MASK,
+ .features = DMA_SDM845_MASK_NO_SDMA,
.sblk = &dpu_dma_sblk,
.xin_id = 1,
.type = SSPP_TYPE_DMA,
diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_4_sm6350.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_4_sm6350.h
index 828a02429405238807562dd0aa29575f8367fdc7..fbbcaa5b98a23c0fcb570b7d33110860f1bf01a4 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_4_sm6350.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_4_sm6350.h
@@ -59,7 +59,7 @@ static const struct dpu_sspp_cfg sm6350_sspp[] = {
{
.name = "sspp_0", .id = SSPP_VIG0,
.base = 0x4000, .len = 0x1f8,
- .features = VIG_SDM845_MASK,
+ .features = VIG_SDM845_MASK_NO_SDMA,
.sblk = &dpu_vig_sblk_qseed3_3_0,
.xin_id = 0,
.type = SSPP_TYPE_VIG,
@@ -67,7 +67,7 @@ static const struct dpu_sspp_cfg sm6350_sspp[] = {
}, {
.name = "sspp_8", .id = SSPP_DMA0,
.base = 0x24000, .len = 0x1f8,
- .features = DMA_SDM845_MASK,
+ .features = DMA_SDM845_MASK_NO_SDMA,
.sblk = &dpu_dma_sblk,
.xin_id = 1,
.type = SSPP_TYPE_DMA,
@@ -75,7 +75,7 @@ static const struct dpu_sspp_cfg sm6350_sspp[] = {
}, {
.name = "sspp_9", .id = SSPP_DMA1,
.base = 0x26000, .len = 0x1f8,
- .features = DMA_CURSOR_SDM845_MASK,
+ .features = DMA_CURSOR_SDM845_MASK_NO_SDMA,
.sblk = &dpu_dma_sblk,
.xin_id = 5,
.type = SSPP_TYPE_DMA,
@@ -83,7 +83,7 @@ static const struct dpu_sspp_cfg sm6350_sspp[] = {
}, {
.name = "sspp_10", .id = SSPP_DMA2,
.base = 0x28000, .len = 0x1f8,
- .features = DMA_CURSOR_SDM845_MASK,
+ .features = DMA_CURSOR_SDM845_MASK_NO_SDMA,
.sblk = &dpu_dma_sblk,
.xin_id = 9,
.type = SSPP_TYPE_DMA,
diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_5_qcm2290.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_5_qcm2290.h
index 3cbb2fe8aba24c7b9db6bb61ff4c48f34db48bf4..53f3be28f6f61bb7e3f519b0efa4cb2f68d38810 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_5_qcm2290.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_5_qcm2290.h
@@ -46,7 +46,7 @@ static const struct dpu_sspp_cfg qcm2290_sspp[] = {
}, {
.name = "sspp_8", .id = SSPP_DMA0,
.base = 0x24000, .len = 0x1f8,
- .features = DMA_SDM845_MASK,
+ .features = DMA_SDM845_MASK_NO_SDMA,
.sblk = &dpu_dma_sblk,
.xin_id = 1,
.type = SSPP_TYPE_DMA,
diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_9_sm6375.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_9_sm6375.h
index a06c8634d2d7779f7e867fb821f8d332652ba7e9..3a3bc8e429be0ba86185741b6b27d8a62489779f 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_9_sm6375.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_9_sm6375.h
@@ -39,7 +39,7 @@ static const struct dpu_sspp_cfg sm6375_sspp[] = {
{
.name = "sspp_0", .id = SSPP_VIG0,
.base = 0x4000, .len = 0x1f8,
- .features = VIG_SDM845_MASK,
+ .features = VIG_SDM845_MASK_NO_SDMA,
.sblk = &dpu_vig_sblk_qseed3_3_0,
.xin_id = 0,
.type = SSPP_TYPE_VIG,
@@ -47,7 +47,7 @@ static const struct dpu_sspp_cfg sm6375_sspp[] = {
}, {
.name = "sspp_8", .id = SSPP_DMA0,
.base = 0x24000, .len = 0x1f8,
- .features = DMA_SDM845_MASK,
+ .features = DMA_SDM845_MASK_NO_SDMA,
.sblk = &dpu_dma_sblk,
.xin_id = 1,
.type = SSPP_TYPE_DMA,
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
index a6bb46b201e907566e88abce945507d1bab51b3b..d495dfa67192b99655ae432589d70fc5be8abbb6 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
@@ -34,11 +34,11 @@
#define VIG_MSM8998_MASK \
(VIG_MASK | BIT(DPU_SSPP_SCALER_QSEED3_COMPATIBLE))
-#define VIG_SDM845_MASK \
+#define VIG_SDM845_MASK_NO_SDMA \
(VIG_MASK | BIT(DPU_SSPP_QOS_8LVL) | BIT(DPU_SSPP_SCALER_QSEED3_COMPATIBLE))
#define VIG_SDM845_MASK_SDMA \
- (VIG_SDM845_MASK | BIT(DPU_SSPP_SMART_DMA_V2))
+ (VIG_SDM845_MASK_NO_SDMA | BIT(DPU_SSPP_SMART_DMA_V2))
#define VIG_QCM2290_MASK (VIG_BASE_MASK | BIT(DPU_SSPP_QOS_8LVL))
@@ -54,24 +54,24 @@
BIT(DPU_SSPP_CDP) | BIT(DPU_SSPP_EXCL_RECT))
#define VIG_SC7280_MASK \
- (VIG_SDM845_MASK | BIT(DPU_SSPP_INLINE_ROTATION))
+ (VIG_SDM845_MASK_NO_SDMA | BIT(DPU_SSPP_INLINE_ROTATION))
#define VIG_SC7280_MASK_SDMA \
(VIG_SC7280_MASK | BIT(DPU_SSPP_SMART_DMA_V2))
-#define DMA_SDM845_MASK \
+#define DMA_SDM845_MASK_NO_SDMA \
(BIT(DPU_SSPP_QOS) | BIT(DPU_SSPP_QOS_8LVL) |\
BIT(DPU_SSPP_TS_PREFILL) | BIT(DPU_SSPP_TS_PREFILL_REC1) |\
BIT(DPU_SSPP_CDP) | BIT(DPU_SSPP_EXCL_RECT))
-#define DMA_CURSOR_SDM845_MASK \
- (DMA_SDM845_MASK | BIT(DPU_SSPP_CURSOR))
+#define DMA_CURSOR_SDM845_MASK_NO_SDMA \
+ (DMA_SDM845_MASK_NO_SDMA | BIT(DPU_SSPP_CURSOR))
#define DMA_SDM845_MASK_SDMA \
- (DMA_SDM845_MASK | BIT(DPU_SSPP_SMART_DMA_V2))
+ (DMA_SDM845_MASK_NO_SDMA | BIT(DPU_SSPP_SMART_DMA_V2))
#define DMA_CURSOR_SDM845_MASK_SDMA \
- (DMA_CURSOR_SDM845_MASK | BIT(DPU_SSPP_SMART_DMA_V2))
+ (DMA_CURSOR_SDM845_MASK_NO_SDMA | BIT(DPU_SSPP_SMART_DMA_V2))
#define DMA_CURSOR_MSM8996_MASK \
(DMA_MSM8996_MASK | BIT(DPU_SSPP_CURSOR))
--
2.39.5
^ permalink raw reply related [flat|nested] 16+ messages in thread* Re: [PATCH 5/5] drm/msm/dpu: rename non-SmartDMA feature masks to be more explicit
2025-03-08 5:38 ` [PATCH 5/5] drm/msm/dpu: rename non-SmartDMA feature masks to be more explicit Dmitry Baryshkov
@ 2025-04-25 21:05 ` Jessica Zhang
0 siblings, 0 replies; 16+ messages in thread
From: Jessica Zhang @ 2025-04-25 21:05 UTC (permalink / raw)
To: Dmitry Baryshkov, Rob Clark, Abhinav Kumar, Sean Paul,
Marijn Suijten, David Airlie, Simona Vetter, Konrad Dybcio
Cc: linux-arm-msm, dri-devel, freedreno, linux-kernel
On 3/7/2025 9:38 PM, Dmitry Baryshkov wrote:
> From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
>
> It is easy to skip or ignore the fact that the default SSPP feature
> masks for SDM845+ don't include the SmartDMA bit (both during
> development and during the review stage). Rename SSPP feature masks to
> make it more explicit that using non-SmartDMA masks should not be an
> exception rather than the rule.
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Jessica Zhang <quic_jesszhan@quicinc.com>
> ---
> drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_2_sm7150.h | 10 +++++-----
> drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_4_sm6125.h | 6 +++---
> drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h | 8 ++++----
> drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_3_sm6115.h | 4 ++--
> drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_4_sm6350.h | 8 ++++----
> drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_5_qcm2290.h | 2 +-
> drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_9_sm6375.h | 4 ++--
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 16 ++++++++--------
> 8 files changed, 29 insertions(+), 29 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_2_sm7150.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_2_sm7150.h
> index b2ebf76e386718b95292e119d53e67f5d9f0743a..99d8b1218db812ca7e99caf62aa48476aee5e02d 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_2_sm7150.h
> +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_2_sm7150.h
> @@ -72,7 +72,7 @@ static const struct dpu_sspp_cfg sm7150_sspp[] = {
> {
> .name = "sspp_0", .id = SSPP_VIG0,
> .base = 0x4000, .len = 0x1f0,
> - .features = VIG_SDM845_MASK,
> + .features = VIG_SDM845_MASK_NO_SDMA,
> .sblk = &dpu_vig_sblk_qseed3_2_4,
> .xin_id = 0,
> .type = SSPP_TYPE_VIG,
> @@ -80,7 +80,7 @@ static const struct dpu_sspp_cfg sm7150_sspp[] = {
> }, {
> .name = "sspp_1", .id = SSPP_VIG1,
> .base = 0x6000, .len = 0x1f0,
> - .features = VIG_SDM845_MASK,
> + .features = VIG_SDM845_MASK_NO_SDMA,
> .sblk = &dpu_vig_sblk_qseed3_2_4,
> .xin_id = 4,
> .type = SSPP_TYPE_VIG,
> @@ -88,7 +88,7 @@ static const struct dpu_sspp_cfg sm7150_sspp[] = {
> }, {
> .name = "sspp_2", .id = SSPP_DMA0,
> .base = 0x24000, .len = 0x1f0,
> - .features = DMA_SDM845_MASK,
> + .features = DMA_SDM845_MASK_NO_SDMA,
> .sblk = &dpu_dma_sblk,
> .xin_id = 1,
> .type = SSPP_TYPE_DMA,
> @@ -96,7 +96,7 @@ static const struct dpu_sspp_cfg sm7150_sspp[] = {
> }, {
> .name = "sspp_9", .id = SSPP_DMA1,
> .base = 0x26000, .len = 0x1f0,
> - .features = DMA_SDM845_MASK,
> + .features = DMA_SDM845_MASK_NO_SDMA,
> .sblk = &dpu_dma_sblk,
> .xin_id = 5,
> .type = SSPP_TYPE_DMA,
> @@ -104,7 +104,7 @@ static const struct dpu_sspp_cfg sm7150_sspp[] = {
> }, {
> .name = "sspp_10", .id = SSPP_DMA2,
> .base = 0x28000, .len = 0x1f0,
> - .features = DMA_CURSOR_SDM845_MASK,
> + .features = DMA_CURSOR_SDM845_MASK_NO_SDMA,
> .sblk = &dpu_dma_sblk,
> .xin_id = 9,
> .type = SSPP_TYPE_DMA,
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_4_sm6125.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_4_sm6125.h
> index cc2951112bdadca60fe51faeecb81e57280662c3..ea1004e2295b215ef165fef862fa9c15c6ab3856 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_4_sm6125.h
> +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_4_sm6125.h
> @@ -69,7 +69,7 @@ static const struct dpu_sspp_cfg sm6125_sspp[] = {
> {
> .name = "sspp_0", .id = SSPP_VIG0,
> .base = 0x4000, .len = 0x1f0,
> - .features = VIG_SDM845_MASK,
> + .features = VIG_SDM845_MASK_NO_SDMA,
> .sblk = &dpu_vig_sblk_qseed3_2_4,
> .xin_id = 0,
> .type = SSPP_TYPE_VIG,
> @@ -77,7 +77,7 @@ static const struct dpu_sspp_cfg sm6125_sspp[] = {
> }, {
> .name = "sspp_8", .id = SSPP_DMA0,
> .base = 0x24000, .len = 0x1f0,
> - .features = DMA_SDM845_MASK,
> + .features = DMA_SDM845_MASK_NO_SDMA,
> .sblk = &dpu_dma_sblk,
> .xin_id = 1,
> .type = SSPP_TYPE_DMA,
> @@ -85,7 +85,7 @@ static const struct dpu_sspp_cfg sm6125_sspp[] = {
> }, {
> .name = "sspp_9", .id = SSPP_DMA1,
> .base = 0x26000, .len = 0x1f0,
> - .features = DMA_SDM845_MASK,
> + .features = DMA_SDM845_MASK_NO_SDMA,
> .sblk = &dpu_dma_sblk,
> .xin_id = 5,
> .type = SSPP_TYPE_DMA,
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h
> index 42a00550eefbc10e97515340d6d8b33d4ef5e3fd..5e15a8dcbc2b701e47e352a8aaee72a25240817c 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h
> +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h
> @@ -51,7 +51,7 @@ static const struct dpu_sspp_cfg sc7180_sspp[] = {
> {
> .name = "sspp_0", .id = SSPP_VIG0,
> .base = 0x4000, .len = 0x1f8,
> - .features = VIG_SDM845_MASK,
> + .features = VIG_SDM845_MASK_NO_SDMA,
> .sblk = &dpu_vig_sblk_qseed3_3_0,
> .xin_id = 0,
> .type = SSPP_TYPE_VIG,
> @@ -59,7 +59,7 @@ static const struct dpu_sspp_cfg sc7180_sspp[] = {
> }, {
> .name = "sspp_8", .id = SSPP_DMA0,
> .base = 0x24000, .len = 0x1f8,
> - .features = DMA_SDM845_MASK,
> + .features = DMA_SDM845_MASK_NO_SDMA,
> .sblk = &dpu_dma_sblk,
> .xin_id = 1,
> .type = SSPP_TYPE_DMA,
> @@ -67,7 +67,7 @@ static const struct dpu_sspp_cfg sc7180_sspp[] = {
> }, {
> .name = "sspp_9", .id = SSPP_DMA1,
> .base = 0x26000, .len = 0x1f8,
> - .features = DMA_CURSOR_SDM845_MASK,
> + .features = DMA_CURSOR_SDM845_MASK_NO_SDMA,
> .sblk = &dpu_dma_sblk,
> .xin_id = 5,
> .type = SSPP_TYPE_DMA,
> @@ -75,7 +75,7 @@ static const struct dpu_sspp_cfg sc7180_sspp[] = {
> }, {
> .name = "sspp_10", .id = SSPP_DMA2,
> .base = 0x28000, .len = 0x1f8,
> - .features = DMA_CURSOR_SDM845_MASK,
> + .features = DMA_CURSOR_SDM845_MASK_NO_SDMA,
> .sblk = &dpu_dma_sblk,
> .xin_id = 9,
> .type = SSPP_TYPE_DMA,
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_3_sm6115.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_3_sm6115.h
> index 43f64a005f5a89e09ee9506a12cfff781530cb80..c5fd89dd7c89046bdbf1b1bf223aac2e3c4c0b26 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_3_sm6115.h
> +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_3_sm6115.h
> @@ -38,7 +38,7 @@ static const struct dpu_sspp_cfg sm6115_sspp[] = {
> {
> .name = "sspp_0", .id = SSPP_VIG0,
> .base = 0x4000, .len = 0x1f8,
> - .features = VIG_SDM845_MASK,
> + .features = VIG_SDM845_MASK_NO_SDMA,
> .sblk = &dpu_vig_sblk_qseed3_3_0,
> .xin_id = 0,
> .type = SSPP_TYPE_VIG,
> @@ -46,7 +46,7 @@ static const struct dpu_sspp_cfg sm6115_sspp[] = {
> }, {
> .name = "sspp_8", .id = SSPP_DMA0,
> .base = 0x24000, .len = 0x1f8,
> - .features = DMA_SDM845_MASK,
> + .features = DMA_SDM845_MASK_NO_SDMA,
> .sblk = &dpu_dma_sblk,
> .xin_id = 1,
> .type = SSPP_TYPE_DMA,
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_4_sm6350.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_4_sm6350.h
> index 828a02429405238807562dd0aa29575f8367fdc7..fbbcaa5b98a23c0fcb570b7d33110860f1bf01a4 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_4_sm6350.h
> +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_4_sm6350.h
> @@ -59,7 +59,7 @@ static const struct dpu_sspp_cfg sm6350_sspp[] = {
> {
> .name = "sspp_0", .id = SSPP_VIG0,
> .base = 0x4000, .len = 0x1f8,
> - .features = VIG_SDM845_MASK,
> + .features = VIG_SDM845_MASK_NO_SDMA,
> .sblk = &dpu_vig_sblk_qseed3_3_0,
> .xin_id = 0,
> .type = SSPP_TYPE_VIG,
> @@ -67,7 +67,7 @@ static const struct dpu_sspp_cfg sm6350_sspp[] = {
> }, {
> .name = "sspp_8", .id = SSPP_DMA0,
> .base = 0x24000, .len = 0x1f8,
> - .features = DMA_SDM845_MASK,
> + .features = DMA_SDM845_MASK_NO_SDMA,
> .sblk = &dpu_dma_sblk,
> .xin_id = 1,
> .type = SSPP_TYPE_DMA,
> @@ -75,7 +75,7 @@ static const struct dpu_sspp_cfg sm6350_sspp[] = {
> }, {
> .name = "sspp_9", .id = SSPP_DMA1,
> .base = 0x26000, .len = 0x1f8,
> - .features = DMA_CURSOR_SDM845_MASK,
> + .features = DMA_CURSOR_SDM845_MASK_NO_SDMA,
> .sblk = &dpu_dma_sblk,
> .xin_id = 5,
> .type = SSPP_TYPE_DMA,
> @@ -83,7 +83,7 @@ static const struct dpu_sspp_cfg sm6350_sspp[] = {
> }, {
> .name = "sspp_10", .id = SSPP_DMA2,
> .base = 0x28000, .len = 0x1f8,
> - .features = DMA_CURSOR_SDM845_MASK,
> + .features = DMA_CURSOR_SDM845_MASK_NO_SDMA,
> .sblk = &dpu_dma_sblk,
> .xin_id = 9,
> .type = SSPP_TYPE_DMA,
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_5_qcm2290.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_5_qcm2290.h
> index 3cbb2fe8aba24c7b9db6bb61ff4c48f34db48bf4..53f3be28f6f61bb7e3f519b0efa4cb2f68d38810 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_5_qcm2290.h
> +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_5_qcm2290.h
> @@ -46,7 +46,7 @@ static const struct dpu_sspp_cfg qcm2290_sspp[] = {
> }, {
> .name = "sspp_8", .id = SSPP_DMA0,
> .base = 0x24000, .len = 0x1f8,
> - .features = DMA_SDM845_MASK,
> + .features = DMA_SDM845_MASK_NO_SDMA,
> .sblk = &dpu_dma_sblk,
> .xin_id = 1,
> .type = SSPP_TYPE_DMA,
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_9_sm6375.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_9_sm6375.h
> index a06c8634d2d7779f7e867fb821f8d332652ba7e9..3a3bc8e429be0ba86185741b6b27d8a62489779f 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_9_sm6375.h
> +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_9_sm6375.h
> @@ -39,7 +39,7 @@ static const struct dpu_sspp_cfg sm6375_sspp[] = {
> {
> .name = "sspp_0", .id = SSPP_VIG0,
> .base = 0x4000, .len = 0x1f8,
> - .features = VIG_SDM845_MASK,
> + .features = VIG_SDM845_MASK_NO_SDMA,
> .sblk = &dpu_vig_sblk_qseed3_3_0,
> .xin_id = 0,
> .type = SSPP_TYPE_VIG,
> @@ -47,7 +47,7 @@ static const struct dpu_sspp_cfg sm6375_sspp[] = {
> }, {
> .name = "sspp_8", .id = SSPP_DMA0,
> .base = 0x24000, .len = 0x1f8,
> - .features = DMA_SDM845_MASK,
> + .features = DMA_SDM845_MASK_NO_SDMA,
> .sblk = &dpu_dma_sblk,
> .xin_id = 1,
> .type = SSPP_TYPE_DMA,
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> index a6bb46b201e907566e88abce945507d1bab51b3b..d495dfa67192b99655ae432589d70fc5be8abbb6 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> @@ -34,11 +34,11 @@
> #define VIG_MSM8998_MASK \
> (VIG_MASK | BIT(DPU_SSPP_SCALER_QSEED3_COMPATIBLE))
>
> -#define VIG_SDM845_MASK \
> +#define VIG_SDM845_MASK_NO_SDMA \
> (VIG_MASK | BIT(DPU_SSPP_QOS_8LVL) | BIT(DPU_SSPP_SCALER_QSEED3_COMPATIBLE))
>
> #define VIG_SDM845_MASK_SDMA \
> - (VIG_SDM845_MASK | BIT(DPU_SSPP_SMART_DMA_V2))
> + (VIG_SDM845_MASK_NO_SDMA | BIT(DPU_SSPP_SMART_DMA_V2))
>
> #define VIG_QCM2290_MASK (VIG_BASE_MASK | BIT(DPU_SSPP_QOS_8LVL))
>
> @@ -54,24 +54,24 @@
> BIT(DPU_SSPP_CDP) | BIT(DPU_SSPP_EXCL_RECT))
>
> #define VIG_SC7280_MASK \
> - (VIG_SDM845_MASK | BIT(DPU_SSPP_INLINE_ROTATION))
> + (VIG_SDM845_MASK_NO_SDMA | BIT(DPU_SSPP_INLINE_ROTATION))
>
> #define VIG_SC7280_MASK_SDMA \
> (VIG_SC7280_MASK | BIT(DPU_SSPP_SMART_DMA_V2))
>
> -#define DMA_SDM845_MASK \
> +#define DMA_SDM845_MASK_NO_SDMA \
> (BIT(DPU_SSPP_QOS) | BIT(DPU_SSPP_QOS_8LVL) |\
> BIT(DPU_SSPP_TS_PREFILL) | BIT(DPU_SSPP_TS_PREFILL_REC1) |\
> BIT(DPU_SSPP_CDP) | BIT(DPU_SSPP_EXCL_RECT))
>
> -#define DMA_CURSOR_SDM845_MASK \
> - (DMA_SDM845_MASK | BIT(DPU_SSPP_CURSOR))
> +#define DMA_CURSOR_SDM845_MASK_NO_SDMA \
> + (DMA_SDM845_MASK_NO_SDMA | BIT(DPU_SSPP_CURSOR))
>
> #define DMA_SDM845_MASK_SDMA \
> - (DMA_SDM845_MASK | BIT(DPU_SSPP_SMART_DMA_V2))
> + (DMA_SDM845_MASK_NO_SDMA | BIT(DPU_SSPP_SMART_DMA_V2))
>
> #define DMA_CURSOR_SDM845_MASK_SDMA \
> - (DMA_CURSOR_SDM845_MASK | BIT(DPU_SSPP_SMART_DMA_V2))
> + (DMA_CURSOR_SDM845_MASK_NO_SDMA | BIT(DPU_SSPP_SMART_DMA_V2))
>
> #define DMA_CURSOR_MSM8996_MASK \
> (DMA_MSM8996_MASK | BIT(DPU_SSPP_CURSOR))
>
^ permalink raw reply [flat|nested] 16+ messages in thread