* [PATCH V2 2/3] dt-bindings: ufs: Document bindings for SA8255P UFS Host Controller
2025-12-10 15:50 [PATCH V2 0/3] ufs: ufs-qcom: Add support firmware managed platforms Ram Kumar Dwivedi
2025-12-10 15:50 ` [PATCH V2 1/3] MAINTAINERS: broaden UFS Qualcomm binding file pattern Ram Kumar Dwivedi
@ 2025-12-10 15:50 ` Ram Kumar Dwivedi
2025-12-11 6:34 ` Krzysztof Kozlowski
2025-12-10 15:50 ` [PATCH V2 3/3] ufs: ufs-qcom: Add support for firmware-managed resource abstraction Ram Kumar Dwivedi
2 siblings, 1 reply; 6+ messages in thread
From: Ram Kumar Dwivedi @ 2025-12-10 15:50 UTC (permalink / raw)
To: mani, alim.akhtar, avri.altman, bvanassche, robh, krzk+dt,
conor+dt, James.Bottomley, martin.petersen, ram.dwivedi,
anjana.hari
Cc: linux-arm-msm, linux-scsi, devicetree, linux-kernel
Document the device tree bindings for UFS host controller on
Qualcomm SA8255P platform which integrates firmware-managed
resources.
The platform firmware implements the SCMI server and manages
resources such as the PHY, clocks, regulators and resets via the
SCMI power protocol. As a result, the OS-visible DT only describes
the controller’s MMIO, interrupt, IOMMU and power-domain interfaces.
The generic "qcom,ufshc" and "jedec,ufs-2.0" compatible strings are
removed from the binding, since this firmware managed design won't
be compatible with the drivers doing full resource management.
Co-developed-by: Anjana Hari <anjana.hari@oss.qualcomm.com>
Signed-off-by: Anjana Hari <anjana.hari@oss.qualcomm.com>
Signed-off-by: Ram Kumar Dwivedi <ram.dwivedi@oss.qualcomm.com>
---
.../bindings/ufs/qcom,sa8255p-ufshc.yaml | 62 +++++++++++++++++++
1 file changed, 62 insertions(+)
create mode 100644 Documentation/devicetree/bindings/ufs/qcom,sa8255p-ufshc.yaml
diff --git a/Documentation/devicetree/bindings/ufs/qcom,sa8255p-ufshc.yaml b/Documentation/devicetree/bindings/ufs/qcom,sa8255p-ufshc.yaml
new file mode 100644
index 000000000000..ec006f7de752
--- /dev/null
+++ b/Documentation/devicetree/bindings/ufs/qcom,sa8255p-ufshc.yaml
@@ -0,0 +1,62 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/ufs/qcom,sa8255p-ufshc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm SA8255P UFS Host Controller
+
+maintainers:
+ - Ram Kumar Dwivedi <ram.dwivedi@oss.qualcomm.com>
+ - Anjana Hari <anjana.hari@oss.qualcomm.com>
+
+properties:
+ compatible:
+ const: qcom,sa8255p-ufshc
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ iommus:
+ maxItems: 1
+
+ dma-coherent: true
+
+ power-domains:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - power-domains
+ - iommus
+ - dma-coherent
+
+allOf:
+ - $ref: ufs-common.yaml
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ soc {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ ufshc@1d84000 {
+ compatible = "qcom,sa8255p-ufshc";
+ reg = <0x0 0x01d84000 0x0 0x3000>;
+ interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;
+ lanes-per-direction = <2>;
+
+ iommus = <&apps_smmu 0x100 0x0>;
+ power-domains = <&scmi3_pd 0>;
+ dma-coherent;
+ };
+ };
--
2.34.1
^ permalink raw reply related [flat|nested] 6+ messages in thread* [PATCH V2 3/3] ufs: ufs-qcom: Add support for firmware-managed resource abstraction
2025-12-10 15:50 [PATCH V2 0/3] ufs: ufs-qcom: Add support firmware managed platforms Ram Kumar Dwivedi
2025-12-10 15:50 ` [PATCH V2 1/3] MAINTAINERS: broaden UFS Qualcomm binding file pattern Ram Kumar Dwivedi
2025-12-10 15:50 ` [PATCH V2 2/3] dt-bindings: ufs: Document bindings for SA8255P UFS Host Controller Ram Kumar Dwivedi
@ 2025-12-10 15:50 ` Ram Kumar Dwivedi
2 siblings, 0 replies; 6+ messages in thread
From: Ram Kumar Dwivedi @ 2025-12-10 15:50 UTC (permalink / raw)
To: mani, alim.akhtar, avri.altman, bvanassche, robh, krzk+dt,
conor+dt, James.Bottomley, martin.petersen, ram.dwivedi,
anjana.hari
Cc: linux-arm-msm, linux-scsi, devicetree, linux-kernel,
Shazad Hussain
Add a compatible string for SA8255p platforms where resources such as
PHY, clocks, regulators, and resets are managed by firmware through an
SCMI server. Use the SCMI power protocol to abstract these resources and
invoke power operations via runtime PM APIs (pm_runtime_get/put_sync).
Introduce vendor operations (vops) for SA8255p targets to enable SCMI-
based resource control. In this model, capabilities like clock scaling
and gating are not yet supported; these will be added incrementally.
Co-developed-by: Anjana Hari <anjana.hari@oss.qualcomm.com>
Signed-off-by: Anjana Hari <anjana.hari@oss.qualcomm.com>
Co-developed-by: Shazad Hussain <shazad.hussain@oss.qualcomm.com>
Signed-off-by: Shazad Hussain <shazad.hussain@oss.qualcomm.com>
Signed-off-by: Ram Kumar Dwivedi <ram.dwivedi@oss.qualcomm.com>
---
drivers/ufs/host/ufs-qcom.c | 161 +++++++++++++++++++++++++++++++++++-
drivers/ufs/host/ufs-qcom.h | 1 +
2 files changed, 161 insertions(+), 1 deletion(-)
diff --git a/drivers/ufs/host/ufs-qcom.c b/drivers/ufs/host/ufs-qcom.c
index 8d119b3223cb..13ccf1fb2ebf 100644
--- a/drivers/ufs/host/ufs-qcom.c
+++ b/drivers/ufs/host/ufs-qcom.c
@@ -14,6 +14,7 @@
#include <linux/of.h>
#include <linux/phy/phy.h>
#include <linux/platform_device.h>
+#include <linux/pm_domain.h>
#include <linux/reset-controller.h>
#include <linux/time.h>
#include <linux/unaligned.h>
@@ -619,6 +620,27 @@ static int ufs_qcom_hce_enable_notify(struct ufs_hba *hba,
return err;
}
+static int ufs_qcom_fw_managed_hce_enable_notify(struct ufs_hba *hba,
+ enum ufs_notify_change_status status)
+{
+ struct ufs_qcom_host *host = ufshcd_get_variant(hba);
+
+ switch (status) {
+ case PRE_CHANGE:
+ ufs_qcom_select_unipro_mode(host);
+ break;
+ case POST_CHANGE:
+ ufs_qcom_enable_hw_clk_gating(hba);
+ ufs_qcom_ice_enable(host);
+ break;
+ default:
+ dev_err(hba->dev, "Invalid status %d\n", status);
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
/**
* ufs_qcom_cfg_timers - Configure ufs qcom cfg timers
*
@@ -789,6 +811,38 @@ static int ufs_qcom_resume(struct ufs_hba *hba, enum ufs_pm_op pm_op)
return ufs_qcom_ice_resume(host);
}
+static int ufs_qcom_fw_managed_suspend(struct ufs_hba *hba, enum ufs_pm_op pm_op,
+ enum ufs_notify_change_status status)
+{
+ struct ufs_qcom_host *host = ufshcd_get_variant(hba);
+
+ if (status == PRE_CHANGE)
+ return 0;
+
+ if (hba->spm_lvl != UFS_PM_LVL_5) {
+ dev_err(hba->dev, "Unsupported spm level %d\n", hba->spm_lvl);
+ return -EINVAL;
+ }
+
+ pm_runtime_put_sync(hba->dev);
+
+ return ufs_qcom_ice_suspend(host);
+}
+
+static int ufs_qcom_fw_managed_resume(struct ufs_hba *hba, enum ufs_pm_op pm_op)
+{
+ struct ufs_qcom_host *host = ufshcd_get_variant(hba);
+ int err;
+
+ err = pm_runtime_resume_and_get(hba->dev);
+ if (err) {
+ dev_err(hba->dev, "PM runtime resume failed: %d\n", err);
+ return err;
+ }
+
+ return ufs_qcom_ice_resume(host);
+}
+
static void ufs_qcom_dev_ref_clk_ctrl(struct ufs_qcom_host *host, bool enable)
{
if (host->dev_ref_clk_ctrl_mmio &&
@@ -1421,6 +1475,52 @@ static void ufs_qcom_exit(struct ufs_hba *hba)
phy_exit(host->generic_phy);
}
+static int ufs_qcom_fw_managed_init(struct ufs_hba *hba)
+{
+ struct device *dev = hba->dev;
+ struct ufs_qcom_host *host;
+ int err;
+
+ host = devm_kzalloc(dev, sizeof(*host), GFP_KERNEL);
+ if (!host)
+ return -ENOMEM;
+
+ host->hba = hba;
+ ufshcd_set_variant(hba, host);
+
+ ufs_qcom_get_controller_revision(hba, &host->hw_ver.major,
+ &host->hw_ver.minor, &host->hw_ver.step);
+
+ err = ufs_qcom_ice_init(host);
+ if (err)
+ goto out_variant_clear;
+
+ ufs_qcom_get_default_testbus_cfg(host);
+ err = ufs_qcom_testbus_config(host);
+ if (err)
+ /* Failure is non-fatal */
+ dev_warn(dev, "Failed to configure the testbus %d\n", err);
+
+ hba->caps |= UFSHCD_CAP_WB_EN;
+
+ ufs_qcom_advertise_quirks(hba);
+ host->hba->quirks &= ~UFSHCD_QUIRK_REINIT_AFTER_MAX_GEAR_SWITCH;
+
+ ufs_qcom_set_host_params(hba);
+ ufs_qcom_parse_gear_limits(hba);
+
+ return 0;
+
+out_variant_clear:
+ ufshcd_set_variant(hba, NULL);
+ return err;
+}
+
+static void ufs_qcom_fw_managed_exit(struct ufs_hba *hba)
+{
+ pm_runtime_put_sync(hba->dev);
+}
+
/**
* ufs_qcom_set_clk_40ns_cycles - Configure 40ns clk cycles
*
@@ -1952,6 +2052,39 @@ static int ufs_qcom_device_reset(struct ufs_hba *hba)
return 0;
}
+/**
+ * ufs_qcom_fw_managed_device_reset - Reset UFS device under FW-managed design
+ * @hba: pointer to UFS host bus adapter
+ *
+ * In the firmware-managed reset model, cold boot power-on is handled
+ * automatically by the PM domain framework during SCMI protocol init,
+ * before ufshcd_device_reset() is reached. For subsequent resets
+ * (such as suspend/resume or recovery), the UFS driver must explicitly
+ * invoke PM runtime operations to reset the subsystem.
+ *
+ * Return: 0 on success or a negative error code on failure.
+ */
+static int ufs_qcom_fw_managed_device_reset(struct ufs_hba *hba)
+{
+ static bool is_boot = true;
+ int err;
+
+ /* Skip reset on cold boot; perform it on subsequent calls */
+ if (is_boot) {
+ is_boot = false;
+ return 0;
+ }
+
+ pm_runtime_put_sync(hba->dev);
+ err = pm_runtime_resume_and_get(hba->dev);
+ if (err < 0) {
+ dev_err(hba->dev, "PM runtime resume failed: %d\n", err);
+ return err;
+ }
+
+ return 0;
+}
+
static void ufs_qcom_config_scaling_param(struct ufs_hba *hba,
struct devfreq_dev_profile *p,
struct devfreq_simple_ondemand_data *d)
@@ -2231,6 +2364,20 @@ static const struct ufs_hba_variant_ops ufs_hba_qcom_vops = {
.freq_to_gear_speed = ufs_qcom_freq_to_gear_speed,
};
+static const struct ufs_hba_variant_ops ufs_hba_qcom_sa8255p_vops = {
+ .name = "qcom-sa8255p",
+ .init = ufs_qcom_fw_managed_init,
+ .exit = ufs_qcom_fw_managed_exit,
+ .hce_enable_notify = ufs_qcom_fw_managed_hce_enable_notify,
+ .pwr_change_notify = ufs_qcom_pwr_change_notify,
+ .apply_dev_quirks = ufs_qcom_apply_dev_quirks,
+ .fixup_dev_quirks = ufs_qcom_fixup_dev_quirks,
+ .suspend = ufs_qcom_fw_managed_suspend,
+ .resume = ufs_qcom_fw_managed_resume,
+ .dbg_register_dump = ufs_qcom_dump_dbg_regs,
+ .device_reset = ufs_qcom_fw_managed_device_reset,
+};
+
/**
* ufs_qcom_probe - probe routine of the driver
* @pdev: pointer to Platform device handle
@@ -2241,9 +2388,16 @@ static int ufs_qcom_probe(struct platform_device *pdev)
{
int err;
struct device *dev = &pdev->dev;
+ const struct ufs_hba_variant_ops *vops;
+ const struct ufs_qcom_drvdata *drvdata = device_get_match_data(dev);
+
+ if (drvdata && drvdata->vops)
+ vops = drvdata->vops;
+ else
+ vops = &ufs_hba_qcom_vops;
/* Perform generic probe */
- err = ufshcd_pltfrm_init(pdev, &ufs_hba_qcom_vops);
+ err = ufshcd_pltfrm_init(pdev, vops);
if (err)
return dev_err_probe(dev, err, "ufshcd_pltfrm_init() failed\n");
@@ -2271,10 +2425,15 @@ static const struct ufs_qcom_drvdata ufs_qcom_sm8550_drvdata = {
.no_phy_retention = true,
};
+static const struct ufs_qcom_drvdata ufs_qcom_sa8255p_drvdata = {
+ .vops = &ufs_hba_qcom_sa8255p_vops
+};
+
static const struct of_device_id ufs_qcom_of_match[] __maybe_unused = {
{ .compatible = "qcom,ufshc" },
{ .compatible = "qcom,sm8550-ufshc", .data = &ufs_qcom_sm8550_drvdata },
{ .compatible = "qcom,sm8650-ufshc", .data = &ufs_qcom_sm8550_drvdata },
+ { .compatible = "qcom,sa8255p-ufshc", .data = &ufs_qcom_sa8255p_drvdata },
{},
};
MODULE_DEVICE_TABLE(of, ufs_qcom_of_match);
diff --git a/drivers/ufs/host/ufs-qcom.h b/drivers/ufs/host/ufs-qcom.h
index 380d02333d38..1111ab34da01 100644
--- a/drivers/ufs/host/ufs-qcom.h
+++ b/drivers/ufs/host/ufs-qcom.h
@@ -313,6 +313,7 @@ struct ufs_qcom_host {
struct ufs_qcom_drvdata {
enum ufshcd_quirks quirks;
bool no_phy_retention;
+ const struct ufs_hba_variant_ops *vops;
};
static inline u32
--
2.34.1
^ permalink raw reply related [flat|nested] 6+ messages in thread