From: Konrad Dybcio <konradybcio@kernel.org>
To: Rob Clark <robdclark@gmail.com>, dri-devel@lists.freedesktop.org
Cc: linux-arm-msm@vger.kernel.org, freedreno@lists.freedesktop.org,
Akhil P Oommen <quic_akhilpo@quicinc.com>,
Connor Abbott <cwabbott0@gmail.com>,
Rob Clark <robdclark@chromium.org>, Sean Paul <sean@poorly.run>,
Konrad Dybcio <konradybcio@kernel.org>,
Abhinav Kumar <quic_abhinavk@quicinc.com>,
Dmitry Baryshkov <dmitry.baryshkov@linaro.org>,
Marijn Suijten <marijn.suijten@somainline.org>,
David Airlie <airlied@gmail.com>, Daniel Vetter <daniel@ffwll.ch>,
open list <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH] drm/msm/a6xx+: Insert a fence wait before SMMU table update
Date: Tue, 17 Sep 2024 15:47:09 +0200 [thread overview]
Message-ID: <e6991910-5058-4ef0-bfdf-6d33953535dd@kernel.org> (raw)
In-Reply-To: <20240913195132.8282-1-robdclark@gmail.com>
On 13.09.2024 9:51 PM, Rob Clark wrote:
> From: Rob Clark <robdclark@chromium.org>
>
> The CP_SMMU_TABLE_UPDATE _should_ be waiting for idle, but on some
> devices (x1-85, possibly others), it seems to pass that barrier while
> there are still things in the event completion FIFO waiting to be
> written back to memory.
Can we try to force-fault around here on other GPUs and perhaps
limit this workaround?
Akhil, do we have any insight on this?
Konrad
next prev parent reply other threads:[~2024-09-17 13:47 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-09-13 19:51 [PATCH] drm/msm/a6xx+: Insert a fence wait before SMMU table update Rob Clark
2024-09-17 13:47 ` Konrad Dybcio [this message]
2024-09-17 14:52 ` Akhil P Oommen
2024-09-17 15:30 ` Rob Clark
2024-09-17 23:37 ` Konrad Dybcio
2024-09-18 1:30 ` Rob Clark
2024-09-18 16:51 ` Connor Abbott
2024-09-24 16:11 ` Rob Clark
2024-09-26 15:56 ` Akhil P Oommen
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