* [PATCH 1/2] drm/msm/dpu: remove DPU_DSPP_GC handling in dspp flush @ 2023-04-21 22:47 Abhinav Kumar 2023-04-21 22:47 ` [PATCH 2/2] drm/msm/dpu: remove GC related code from dpu catalog Abhinav Kumar 2023-04-21 23:09 ` [PATCH 1/2] drm/msm/dpu: remove DPU_DSPP_GC handling in dspp flush Dmitry Baryshkov 0 siblings, 2 replies; 4+ messages in thread From: Abhinav Kumar @ 2023-04-21 22:47 UTC (permalink / raw) To: freedreno, Rob Clark, Abhinav Kumar, Dmitry Baryshkov, Sean Paul, David Airlie, Daniel Vetter Cc: dri-devel, quic_jesszhan, marijn.suijten, linux-arm-msm, linux-kernel Gamma correction blocks (GC) are not used today so lets remove the usage of DPU_DSPP_GC in the dspp flush to make it easier to remove GC from the catalog. We can add this back when GC is properly supported in DPU with one of the standard DRM properties. Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> --- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c index bbdc95ce374a..57adaebab563 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c @@ -336,9 +336,6 @@ static void dpu_hw_ctl_update_pending_flush_dspp_sub_blocks( case DPU_DSPP_PCC: ctx->pending_dspp_flush_mask[dspp - DSPP_0] |= BIT(4); break; - case DPU_DSPP_GC: - ctx->pending_dspp_flush_mask[dspp - DSPP_0] |= BIT(5); - break; default: return; } -- 2.39.2 ^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH 2/2] drm/msm/dpu: remove GC related code from dpu catalog 2023-04-21 22:47 [PATCH 1/2] drm/msm/dpu: remove DPU_DSPP_GC handling in dspp flush Abhinav Kumar @ 2023-04-21 22:47 ` Abhinav Kumar 2023-04-21 23:09 ` Dmitry Baryshkov 2023-04-21 23:09 ` [PATCH 1/2] drm/msm/dpu: remove DPU_DSPP_GC handling in dspp flush Dmitry Baryshkov 1 sibling, 1 reply; 4+ messages in thread From: Abhinav Kumar @ 2023-04-21 22:47 UTC (permalink / raw) To: freedreno, Rob Clark, Abhinav Kumar, Dmitry Baryshkov, Sean Paul, David Airlie, Daniel Vetter Cc: dri-devel, quic_jesszhan, marijn.suijten, linux-arm-msm, linux-kernel Since Gamma Correction (GC) block is currently unused, drop related code from the dpu hardware catalog otherwise this becomes a burden to carry across chipsets in the catalog. Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> --- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 4 +--- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 6 ------ 2 files changed, 1 insertion(+), 9 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c index 03f162af1a50..badfc3680485 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c @@ -91,7 +91,7 @@ #define MERGE_3D_SM8150_MASK (0) -#define DSPP_MSM8998_MASK BIT(DPU_DSPP_PCC) | BIT(DPU_DSPP_GC) +#define DSPP_MSM8998_MASK BIT(DPU_DSPP_PCC) #define DSPP_SC7180_MASK BIT(DPU_DSPP_PCC) @@ -449,8 +449,6 @@ static const struct dpu_lm_sub_blks qcm2290_lm_sblk = { static const struct dpu_dspp_sub_blks msm8998_dspp_sblk = { .pcc = {.id = DPU_DSPP_PCC, .base = 0x1700, .len = 0x90, .version = 0x10007}, - .gc = { .id = DPU_DSPP_GC, .base = 0x17c0, - .len = 0x90, .version = 0x10007}, }; static const struct dpu_dspp_sub_blks sc7180_dspp_sblk = { diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h index 71584cd56fd7..e0dcef04bc61 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h @@ -127,12 +127,10 @@ enum { /** * DSPP sub-blocks * @DPU_DSPP_PCC Panel color correction block - * @DPU_DSPP_GC Gamma correction block * @DPU_DSPP_IGC Inverse gamma correction block */ enum { DPU_DSPP_PCC = 0x1, - DPU_DSPP_GC, DPU_DSPP_IGC, DPU_DSPP_MAX }; @@ -433,22 +431,18 @@ struct dpu_sspp_sub_blks { * @maxwidth: Max pixel width supported by this mixer * @maxblendstages: Max number of blend-stages supported * @blendstage_base: Blend-stage register base offset - * @gc: gamma correction block */ struct dpu_lm_sub_blks { u32 maxwidth; u32 maxblendstages; u32 blendstage_base[MAX_BLOCKS]; - struct dpu_pp_blk gc; }; /** * struct dpu_dspp_sub_blks: Information of DSPP block - * @gc : gamma correction block * @pcc: pixel color correction block */ struct dpu_dspp_sub_blks { - struct dpu_pp_blk gc; struct dpu_pp_blk pcc; }; -- 2.39.2 ^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH 2/2] drm/msm/dpu: remove GC related code from dpu catalog 2023-04-21 22:47 ` [PATCH 2/2] drm/msm/dpu: remove GC related code from dpu catalog Abhinav Kumar @ 2023-04-21 23:09 ` Dmitry Baryshkov 0 siblings, 0 replies; 4+ messages in thread From: Dmitry Baryshkov @ 2023-04-21 23:09 UTC (permalink / raw) To: Abhinav Kumar, freedreno, Rob Clark, Sean Paul, David Airlie, Daniel Vetter Cc: dri-devel, quic_jesszhan, marijn.suijten, linux-arm-msm, linux-kernel On 22/04/2023 01:47, Abhinav Kumar wrote: > Since Gamma Correction (GC) block is currently unused, drop > related code from the dpu hardware catalog otherwise this > becomes a burden to carry across chipsets in the catalog. > > Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> > --- > drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 4 +--- > drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 6 ------ > 2 files changed, 1 insertion(+), 9 deletions(-) > > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c > index 03f162af1a50..badfc3680485 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c > @@ -91,7 +91,7 @@ > > #define MERGE_3D_SM8150_MASK (0) > > -#define DSPP_MSM8998_MASK BIT(DPU_DSPP_PCC) | BIT(DPU_DSPP_GC) > +#define DSPP_MSM8998_MASK BIT(DPU_DSPP_PCC) > > #define DSPP_SC7180_MASK BIT(DPU_DSPP_PCC) At this point we can merge these two masks. Could you please extend this for v2 with the following patches: - merge of two DSPP_foo_MASKs - dropping of DPU_DSPP_IGC? For this patch: Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > > @@ -449,8 +449,6 @@ static const struct dpu_lm_sub_blks qcm2290_lm_sblk = { > static const struct dpu_dspp_sub_blks msm8998_dspp_sblk = { > .pcc = {.id = DPU_DSPP_PCC, .base = 0x1700, > .len = 0x90, .version = 0x10007}, > - .gc = { .id = DPU_DSPP_GC, .base = 0x17c0, > - .len = 0x90, .version = 0x10007}, > }; > > static const struct dpu_dspp_sub_blks sc7180_dspp_sblk = { > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h > index 71584cd56fd7..e0dcef04bc61 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h > @@ -127,12 +127,10 @@ enum { > /** > * DSPP sub-blocks > * @DPU_DSPP_PCC Panel color correction block > - * @DPU_DSPP_GC Gamma correction block > * @DPU_DSPP_IGC Inverse gamma correction block > */ > enum { > DPU_DSPP_PCC = 0x1, > - DPU_DSPP_GC, > DPU_DSPP_IGC, > DPU_DSPP_MAX > }; > @@ -433,22 +431,18 @@ struct dpu_sspp_sub_blks { > * @maxwidth: Max pixel width supported by this mixer > * @maxblendstages: Max number of blend-stages supported > * @blendstage_base: Blend-stage register base offset > - * @gc: gamma correction block > */ > struct dpu_lm_sub_blks { > u32 maxwidth; > u32 maxblendstages; > u32 blendstage_base[MAX_BLOCKS]; > - struct dpu_pp_blk gc; > }; > > /** > * struct dpu_dspp_sub_blks: Information of DSPP block > - * @gc : gamma correction block > * @pcc: pixel color correction block > */ > struct dpu_dspp_sub_blks { > - struct dpu_pp_blk gc; > struct dpu_pp_blk pcc; > }; > -- With best wishes Dmitry ^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH 1/2] drm/msm/dpu: remove DPU_DSPP_GC handling in dspp flush 2023-04-21 22:47 [PATCH 1/2] drm/msm/dpu: remove DPU_DSPP_GC handling in dspp flush Abhinav Kumar 2023-04-21 22:47 ` [PATCH 2/2] drm/msm/dpu: remove GC related code from dpu catalog Abhinav Kumar @ 2023-04-21 23:09 ` Dmitry Baryshkov 1 sibling, 0 replies; 4+ messages in thread From: Dmitry Baryshkov @ 2023-04-21 23:09 UTC (permalink / raw) To: Abhinav Kumar, freedreno, Rob Clark, Sean Paul, David Airlie, Daniel Vetter Cc: dri-devel, quic_jesszhan, marijn.suijten, linux-arm-msm, linux-kernel On 22/04/2023 01:47, Abhinav Kumar wrote: > Gamma correction blocks (GC) are not used today so lets remove > the usage of DPU_DSPP_GC in the dspp flush to make it easier > to remove GC from the catalog. > > We can add this back when GC is properly supported in DPU with > one of the standard DRM properties. > > Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > --- > drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c | 3 --- > 1 file changed, 3 deletions(-) > > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c > index bbdc95ce374a..57adaebab563 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c > @@ -336,9 +336,6 @@ static void dpu_hw_ctl_update_pending_flush_dspp_sub_blocks( Please drop the DPU_DSPP_IGC in a followup. > case DPU_DSPP_PCC: > ctx->pending_dspp_flush_mask[dspp - DSPP_0] |= BIT(4); > break; > - case DPU_DSPP_GC: > - ctx->pending_dspp_flush_mask[dspp - DSPP_0] |= BIT(5); > - break; > default: > return; > } -- With best wishes Dmitry ^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2023-04-21 23:10 UTC | newest] Thread overview: 4+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2023-04-21 22:47 [PATCH 1/2] drm/msm/dpu: remove DPU_DSPP_GC handling in dspp flush Abhinav Kumar 2023-04-21 22:47 ` [PATCH 2/2] drm/msm/dpu: remove GC related code from dpu catalog Abhinav Kumar 2023-04-21 23:09 ` Dmitry Baryshkov 2023-04-21 23:09 ` [PATCH 1/2] drm/msm/dpu: remove DPU_DSPP_GC handling in dspp flush Dmitry Baryshkov
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