* [PATCH v1 0/3] pic64gx clk kconfig/binding changes
@ 2025-11-17 15:35 Conor Dooley
2025-11-17 15:35 ` [PATCH v1 1/3] clk: microchip: drop POLARFIRE from ARCH_MICROCHIP_POLARFIRE Conor Dooley
` (2 more replies)
0 siblings, 3 replies; 8+ messages in thread
From: Conor Dooley @ 2025-11-17 15:35 UTC (permalink / raw)
To: linux-kernel
Cc: conor, Conor Dooley, Daire McNamara, Michael Turquette,
Stephen Boyd, Rob Herring, Krzysztof Kozlowski, linux-riscv,
linux-clk, devicetree, Claudiu Beznea
From: Conor Dooley <conor.dooley@microchip.com>
Mostly this is stuff that PH did last year, but rebased on top of
current work, now that the clock driver rework patches have been
applied.
CC: Conor Dooley <conor.dooley@microchip.com>
CC: Daire McNamara <daire.mcnamara@microchip.com>
CC: Michael Turquette <mturquette@baylibre.com>
CC: Stephen Boyd <sboyd@kernel.org>
CC: Rob Herring <robh@kernel.org>
CC: Krzysztof Kozlowski <krzk+dt@kernel.org>
CC: Claudiu Beznea <claudiu.beznea@tuxon.dev>
CC: linux-riscv@lists.infradead.org
CC: linux-clk@vger.kernel.org
CC: devicetree@vger.kernel.org
Conor Dooley (1):
clk: microchip: drop POLARFIRE from ARCH_MICROCHIP_POLARFIRE
Pierre-Henry Moussay (2):
dt-bindings: clock: mpfs-ccc: Add pic64gx compatibility
dt-bindings: clock: mpfs-clkcfg: Add pic64gx compatibility
.../bindings/clock/microchip,mpfs-ccc.yaml | 6 +++++-
.../bindings/clock/microchip,mpfs-clkcfg.yaml | 15 ++++++++++++++-
drivers/clk/microchip/Kconfig | 4 ++--
3 files changed, 21 insertions(+), 4 deletions(-)
--
2.51.0
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH v1 1/3] clk: microchip: drop POLARFIRE from ARCH_MICROCHIP_POLARFIRE
2025-11-17 15:35 [PATCH v1 0/3] pic64gx clk kconfig/binding changes Conor Dooley
@ 2025-11-17 15:35 ` Conor Dooley
2025-12-06 11:11 ` Claudiu Beznea
2025-11-17 15:35 ` [PATCH v1 2/3] dt-bindings: clock: mpfs-ccc: Add pic64gx compatibility Conor Dooley
2025-11-17 15:35 ` [PATCH v1 3/3] dt-bindings: clock: mpfs-clkcfg: " Conor Dooley
2 siblings, 1 reply; 8+ messages in thread
From: Conor Dooley @ 2025-11-17 15:35 UTC (permalink / raw)
To: linux-kernel
Cc: conor, Conor Dooley, Daire McNamara, Michael Turquette,
Stephen Boyd, Rob Herring, Krzysztof Kozlowski, linux-riscv,
linux-clk, devicetree, Claudiu Beznea
From: Conor Dooley <conor.dooley@microchip.com>
This driver is used by non-polarfire devices now, and the ARCH_MICROCHIP
symbol has been defined for some time on RISCV so drop it without any
functional change.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
drivers/clk/microchip/Kconfig | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/microchip/Kconfig b/drivers/clk/microchip/Kconfig
index cab9a909893b..a0ef14310417 100644
--- a/drivers/clk/microchip/Kconfig
+++ b/drivers/clk/microchip/Kconfig
@@ -5,8 +5,8 @@ config COMMON_CLK_PIC32
config MCHP_CLK_MPFS
bool "Clk driver for PolarFire SoC"
- depends on ARCH_MICROCHIP_POLARFIRE || COMPILE_TEST
- default ARCH_MICROCHIP_POLARFIRE
+ depends on ARCH_MICROCHIP || COMPILE_TEST
+ default y
depends on MFD_SYSCON
select AUXILIARY_BUS
select COMMON_CLK_DIVIDER_REGMAP
--
2.51.0
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH v1 2/3] dt-bindings: clock: mpfs-ccc: Add pic64gx compatibility
2025-11-17 15:35 [PATCH v1 0/3] pic64gx clk kconfig/binding changes Conor Dooley
2025-11-17 15:35 ` [PATCH v1 1/3] clk: microchip: drop POLARFIRE from ARCH_MICROCHIP_POLARFIRE Conor Dooley
@ 2025-11-17 15:35 ` Conor Dooley
2025-11-17 21:48 ` Rob Herring (Arm)
2025-11-17 15:35 ` [PATCH v1 3/3] dt-bindings: clock: mpfs-clkcfg: " Conor Dooley
2 siblings, 1 reply; 8+ messages in thread
From: Conor Dooley @ 2025-11-17 15:35 UTC (permalink / raw)
To: linux-kernel
Cc: conor, Conor Dooley, Daire McNamara, Michael Turquette,
Stephen Boyd, Rob Herring, Krzysztof Kozlowski, linux-riscv,
linux-clk, devicetree, Claudiu Beznea, Pierre-Henry Moussay
From: Pierre-Henry Moussay <pierre-henry.moussay@microchip.com>
pic64gx SoC Clock Conditioning Circuitry is compatibles
with the Polarfire SoC
Signed-off-by: Pierre-Henry Moussay <pierre-henry.moussay@microchip.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
.../devicetree/bindings/clock/microchip,mpfs-ccc.yaml | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/clock/microchip,mpfs-ccc.yaml b/Documentation/devicetree/bindings/clock/microchip,mpfs-ccc.yaml
index f1770360798f..9a6b50527c42 100644
--- a/Documentation/devicetree/bindings/clock/microchip,mpfs-ccc.yaml
+++ b/Documentation/devicetree/bindings/clock/microchip,mpfs-ccc.yaml
@@ -17,7 +17,11 @@ description: |
properties:
compatible:
- const: microchip,mpfs-ccc
+ oneOf:
+ - items:
+ - const: microchip,pic64gx-ccc
+ - const: microchip,mpfs-ccc
+ - const: microchip,mpfs-ccc
reg:
items:
--
2.51.0
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH v1 3/3] dt-bindings: clock: mpfs-clkcfg: Add pic64gx compatibility
2025-11-17 15:35 [PATCH v1 0/3] pic64gx clk kconfig/binding changes Conor Dooley
2025-11-17 15:35 ` [PATCH v1 1/3] clk: microchip: drop POLARFIRE from ARCH_MICROCHIP_POLARFIRE Conor Dooley
2025-11-17 15:35 ` [PATCH v1 2/3] dt-bindings: clock: mpfs-ccc: Add pic64gx compatibility Conor Dooley
@ 2025-11-17 15:35 ` Conor Dooley
2025-11-17 17:42 ` Rob Herring (Arm)
2 siblings, 1 reply; 8+ messages in thread
From: Conor Dooley @ 2025-11-17 15:35 UTC (permalink / raw)
To: linux-kernel
Cc: conor, Conor Dooley, Daire McNamara, Michael Turquette,
Stephen Boyd, Rob Herring, Krzysztof Kozlowski, linux-riscv,
linux-clk, devicetree, Claudiu Beznea, Pierre-Henry Moussay
From: Pierre-Henry Moussay <pierre-henry.moussay@microchip.com>
pic64gx has a clock controller compatible with mpfs-clkcfg. Don't permit
the deprecated configuration that was never supported for this SoC.
Signed-off-by: Pierre-Henry Moussay <pierre-henry.moussay@microchip.com>
Co-developed-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
.../bindings/clock/microchip,mpfs-clkcfg.yaml | 15 ++++++++++++++-
1 file changed, 14 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/clock/microchip,mpfs-clkcfg.yaml b/Documentation/devicetree/bindings/clock/microchip,mpfs-clkcfg.yaml
index ee4f31596d97..f111bed16f15 100644
--- a/Documentation/devicetree/bindings/clock/microchip,mpfs-clkcfg.yaml
+++ b/Documentation/devicetree/bindings/clock/microchip,mpfs-clkcfg.yaml
@@ -19,7 +19,11 @@ description: |
properties:
compatible:
- const: microchip,mpfs-clkcfg
+ oneOf:
+ - items:
+ - const: microchip,pic64gx-clkcfg
+ - const: microchip,mpfs-clkcfg
+ - const: microchip,mpfs-clkcfg
reg:
oneOf:
@@ -69,6 +73,15 @@ required:
- clocks
- '#clock-cells'
+if:
+ properties:
+ compatible:
+ contains:
+ const: microchip,pic64gx-clkcfg
+then:
+ reg:
+ maxItems: 1
+
additionalProperties: false
examples:
--
2.51.0
^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH v1 3/3] dt-bindings: clock: mpfs-clkcfg: Add pic64gx compatibility
2025-11-17 15:35 ` [PATCH v1 3/3] dt-bindings: clock: mpfs-clkcfg: " Conor Dooley
@ 2025-11-17 17:42 ` Rob Herring (Arm)
2025-11-17 17:48 ` Conor Dooley
0 siblings, 1 reply; 8+ messages in thread
From: Rob Herring (Arm) @ 2025-11-17 17:42 UTC (permalink / raw)
To: Conor Dooley
Cc: Daire McNamara, Conor Dooley, Michael Turquette, linux-clk,
Claudiu Beznea, devicetree, Stephen Boyd, Krzysztof Kozlowski,
Pierre-Henry Moussay, linux-riscv, linux-kernel
On Mon, 17 Nov 2025 15:35:20 +0000, Conor Dooley wrote:
> From: Pierre-Henry Moussay <pierre-henry.moussay@microchip.com>
>
> pic64gx has a clock controller compatible with mpfs-clkcfg. Don't permit
> the deprecated configuration that was never supported for this SoC.
>
> Signed-off-by: Pierre-Henry Moussay <pierre-henry.moussay@microchip.com>
> Co-developed-by: Conor Dooley <conor.dooley@microchip.com>
> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> ---
> .../bindings/clock/microchip,mpfs-clkcfg.yaml | 15 ++++++++++++++-
> 1 file changed, 14 insertions(+), 1 deletion(-)
>
My bot found errors running 'make dt_binding_check' on your patch:
yamllint warnings/errors:
dtschema/dtc warnings/errors:
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/clock/microchip,mpfs-clkcfg.yaml: then: 'anyOf' conditional failed, one must be fixed:
'reg' is not one of ['$ref', 'additionalItems', 'additionalProperties', 'allOf', 'anyOf', 'const', 'contains', 'default', 'dependencies', 'dependentRequired', 'dependentSchemas', 'deprecated', 'description', 'else', 'enum', 'exclusiveMaximum', 'exclusiveMinimum', 'items', 'if', 'minItems', 'minimum', 'maxItems', 'maximum', 'multipleOf', 'not', 'oneOf', 'pattern', 'patternProperties', 'properties', 'required', 'then', 'typeSize', 'unevaluatedProperties', 'uniqueItems']
'type' was expected
from schema $id: http://devicetree.org/meta-schemas/keywords.yaml
doc reference errors (make refcheckdocs):
See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20251117-depth-sage-ee0829c71c25@spud
The base for the series is generally the latest rc1. A different dependency
should be noted in *this* patch.
If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:
pip3 install dtschema --upgrade
Please check and re-submit after running the above command yourself. Note
that DT_SCHEMA_FILES can be set to your schema file to speed up checking
your schema. However, it must be unset to test all examples with your schema.
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v1 3/3] dt-bindings: clock: mpfs-clkcfg: Add pic64gx compatibility
2025-11-17 17:42 ` Rob Herring (Arm)
@ 2025-11-17 17:48 ` Conor Dooley
0 siblings, 0 replies; 8+ messages in thread
From: Conor Dooley @ 2025-11-17 17:48 UTC (permalink / raw)
To: Rob Herring (Arm)
Cc: Daire McNamara, Conor Dooley, Michael Turquette, linux-clk,
Claudiu Beznea, devicetree, Stephen Boyd, Krzysztof Kozlowski,
Pierre-Henry Moussay, linux-riscv, linux-kernel
[-- Attachment #1: Type: text/plain, Size: 1948 bytes --]
On Mon, Nov 17, 2025 at 11:42:33AM -0600, Rob Herring (Arm) wrote:
>
> On Mon, 17 Nov 2025 15:35:20 +0000, Conor Dooley wrote:
> > From: Pierre-Henry Moussay <pierre-henry.moussay@microchip.com>
> >
> > pic64gx has a clock controller compatible with mpfs-clkcfg. Don't permit
> > the deprecated configuration that was never supported for this SoC.
> >
> > Signed-off-by: Pierre-Henry Moussay <pierre-henry.moussay@microchip.com>
> > Co-developed-by: Conor Dooley <conor.dooley@microchip.com>
> > Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> > ---
> > .../bindings/clock/microchip,mpfs-clkcfg.yaml | 15 ++++++++++++++-
> > 1 file changed, 14 insertions(+), 1 deletion(-)
> >
>
> My bot found errors running 'make dt_binding_check' on your patch:
>
> yamllint warnings/errors:
>
> dtschema/dtc warnings/errors:
> /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/clock/microchip,mpfs-clkcfg.yaml: then: 'anyOf' conditional failed, one must be fixed:
> 'reg' is not one of ['$ref', 'additionalItems', 'additionalProperties', 'allOf', 'anyOf', 'const', 'contains', 'default', 'dependencies', 'dependentRequired', 'dependentSchemas', 'deprecated', 'description', 'else', 'enum', 'exclusiveMaximum', 'exclusiveMinimum', 'items', 'if', 'minItems', 'minimum', 'maxItems', 'maximum', 'multipleOf', 'not', 'oneOf', 'pattern', 'patternProperties', 'properties', 'required', 'then', 'typeSize', 'unevaluatedProperties', 'uniqueItems']
> 'type' was expected
> from schema $id: http://devicetree.org/meta-schemas/keywords.yaml
Huh. I think the bot is right here, it's this hunk:
@@ -69,6 +73,15 @@ required:
- clocks
- '#clock-cells'
+if:
+ properties:
+ compatible:
+ contains:
+ const: microchip,pic64gx-clkcfg
+then:
+ reg:
+ maxItems: 1
+
additionalProperties: false
examples:
But I need to go figure out why I did not see this.
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v1 2/3] dt-bindings: clock: mpfs-ccc: Add pic64gx compatibility
2025-11-17 15:35 ` [PATCH v1 2/3] dt-bindings: clock: mpfs-ccc: Add pic64gx compatibility Conor Dooley
@ 2025-11-17 21:48 ` Rob Herring (Arm)
0 siblings, 0 replies; 8+ messages in thread
From: Rob Herring (Arm) @ 2025-11-17 21:48 UTC (permalink / raw)
To: Conor Dooley
Cc: linux-clk, Claudiu Beznea, devicetree, Pierre-Henry Moussay,
Conor Dooley, linux-kernel, linux-riscv, Michael Turquette,
Stephen Boyd, Daire McNamara, Krzysztof Kozlowski
On Mon, 17 Nov 2025 15:35:19 +0000, Conor Dooley wrote:
> From: Pierre-Henry Moussay <pierre-henry.moussay@microchip.com>
>
> pic64gx SoC Clock Conditioning Circuitry is compatibles
> with the Polarfire SoC
>
> Signed-off-by: Pierre-Henry Moussay <pierre-henry.moussay@microchip.com>
> Acked-by: Conor Dooley <conor.dooley@microchip.com>
> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> ---
> .../devicetree/bindings/clock/microchip,mpfs-ccc.yaml | 6 +++++-
> 1 file changed, 5 insertions(+), 1 deletion(-)
>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v1 1/3] clk: microchip: drop POLARFIRE from ARCH_MICROCHIP_POLARFIRE
2025-11-17 15:35 ` [PATCH v1 1/3] clk: microchip: drop POLARFIRE from ARCH_MICROCHIP_POLARFIRE Conor Dooley
@ 2025-12-06 11:11 ` Claudiu Beznea
0 siblings, 0 replies; 8+ messages in thread
From: Claudiu Beznea @ 2025-12-06 11:11 UTC (permalink / raw)
To: Conor Dooley, linux-kernel
Cc: Conor Dooley, Daire McNamara, Michael Turquette, Stephen Boyd,
Rob Herring, Krzysztof Kozlowski, linux-riscv, linux-clk,
devicetree
Hi, Conor,
On 11/17/25 17:35, Conor Dooley wrote:
> From: Conor Dooley <conor.dooley@microchip.com>
>
> This driver is used by non-polarfire devices now, and the ARCH_MICROCHIP
> symbol has been defined for some time on RISCV so drop it without any
> functional change.
>
> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> ---
> drivers/clk/microchip/Kconfig | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/clk/microchip/Kconfig b/drivers/clk/microchip/Kconfig
> index cab9a909893b..a0ef14310417 100644
> --- a/drivers/clk/microchip/Kconfig
> +++ b/drivers/clk/microchip/Kconfig
> @@ -5,8 +5,8 @@ config COMMON_CLK_PIC32
>
> config MCHP_CLK_MPFS
> bool "Clk driver for PolarFire SoC"
> - depends on ARCH_MICROCHIP_POLARFIRE || COMPILE_TEST
> - default ARCH_MICROCHIP_POLARFIRE
> + depends on ARCH_MICROCHIP || COMPILE_TEST
> + default y
> depends on MFD_SYSCON
> select AUXILIARY_BUS
> select COMMON_CLK_DIVIDER_REGMAP
This doesn't apply on top of the current at91-next. Maybe rebase it once
6.19-rc1 is out.
Thank you,
Claudiu
^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2025-12-06 11:11 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-11-17 15:35 [PATCH v1 0/3] pic64gx clk kconfig/binding changes Conor Dooley
2025-11-17 15:35 ` [PATCH v1 1/3] clk: microchip: drop POLARFIRE from ARCH_MICROCHIP_POLARFIRE Conor Dooley
2025-12-06 11:11 ` Claudiu Beznea
2025-11-17 15:35 ` [PATCH v1 2/3] dt-bindings: clock: mpfs-ccc: Add pic64gx compatibility Conor Dooley
2025-11-17 21:48 ` Rob Herring (Arm)
2025-11-17 15:35 ` [PATCH v1 3/3] dt-bindings: clock: mpfs-clkcfg: " Conor Dooley
2025-11-17 17:42 ` Rob Herring (Arm)
2025-11-17 17:48 ` Conor Dooley
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