From: Doug Brown <doug@schmorgal.com>
To: Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc: linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
Doug Brown <doug@schmorgal.com>
Subject: [PATCH 03/12] dt-bindings: marvell,pxa168: add clock ids for additional dividers
Date: Sun, 12 Jun 2022 12:29:28 -0700 [thread overview]
Message-ID: <20220612192937.162952-4-doug@schmorgal.com> (raw)
In-Reply-To: <20220612192937.162952-1-doug@schmorgal.com>
This adds a few new clocks divided from PLL1 and CLK32 that are
potentially used by a few peripherals with muxed clocks.
Signed-off-by: Doug Brown <doug@schmorgal.com>
---
include/dt-bindings/clock/marvell,pxa168.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/include/dt-bindings/clock/marvell,pxa168.h b/include/dt-bindings/clock/marvell,pxa168.h
index db2b41f1b127..8686bc7bf7b6 100644
--- a/include/dt-bindings/clock/marvell,pxa168.h
+++ b/include/dt-bindings/clock/marvell,pxa168.h
@@ -20,8 +20,11 @@
#define PXA168_CLK_PLL1_2_1_5 19
#define PXA168_CLK_PLL1_3_16 20
#define PXA168_CLK_PLL1_192 21
+#define PXA168_CLK_PLL1_2_1_10 22
+#define PXA168_CLK_PLL1_2_3_16 23
#define PXA168_CLK_UART_PLL 27
#define PXA168_CLK_USB_PLL 28
+#define PXA168_CLK_CLK32_2 50
/* apb peripherals */
#define PXA168_CLK_TWSI0 60
--
2.25.1
next prev parent reply other threads:[~2022-06-12 19:30 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-12 19:29 [PATCH 00/12] PXA168 clock fixes Doug Brown
2022-06-12 19:29 ` [PATCH 01/12] clk: mmp: pxa168: add additional register defines Doug Brown
2022-09-30 20:43 ` Stephen Boyd
2022-06-12 19:29 ` [PATCH 02/12] clk: mmp: pxa168: fix incorrect dividers Doug Brown
2022-09-30 20:43 ` Stephen Boyd
2022-06-12 19:29 ` Doug Brown [this message]
2022-06-16 17:48 ` [PATCH 03/12] dt-bindings: marvell,pxa168: add clock ids for additional dividers Rob Herring
2022-09-30 20:43 ` Stephen Boyd
2022-06-12 19:29 ` [PATCH 04/12] clk: mmp: pxa168: add new clocks for peripherals Doug Brown
2022-09-30 20:43 ` Stephen Boyd
2022-06-12 19:29 ` [PATCH 05/12] clk: mmp: pxa168: fix const-correctness Doug Brown
2022-09-30 20:44 ` Stephen Boyd
2022-06-12 19:29 ` [PATCH 06/12] clk: mmp: pxa168: fix incorrect parent clocks Doug Brown
2022-09-30 20:44 ` Stephen Boyd
2022-06-12 19:29 ` [PATCH 07/12] clk: mmp: pxa168: add muxes for more peripherals Doug Brown
2022-09-30 20:44 ` Stephen Boyd
2022-06-12 19:29 ` [PATCH 08/12] clk: mmp: pxa168: fix GPIO clock enable bits Doug Brown
2022-09-30 20:44 ` Stephen Boyd
2022-06-12 19:29 ` [PATCH 09/12] dt-bindings: marvell,pxa168: add clock id for SDH3 Doug Brown
2022-06-16 17:48 ` Rob Herring
2022-09-30 20:44 ` Stephen Boyd
2022-06-12 19:29 ` [PATCH 10/12] clk: mmp: pxa168: add clocks for SDH2 and SDH3 Doug Brown
2022-09-30 20:44 ` Stephen Boyd
2022-06-12 19:29 ` [PATCH 11/12] dt-bindings: marvell,pxa168: add clock ids for SDH AXI clocks Doug Brown
2022-06-16 17:49 ` Rob Herring
2022-09-30 20:45 ` Stephen Boyd
2022-06-12 19:29 ` [PATCH 12/12] clk: mmp: pxa168: control shared SDH bits with separate clock Doug Brown
2022-09-30 20:45 ` Stephen Boyd
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