From: Wolfram Sang <wsa@kernel.org>
To: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>,
linux-clk@vger.kernel.org, linux-renesas-soc@vger.kernel.org
Subject: Re: [PATCH] clk: renesas: r8a779g0: Fix PCIe clock name
Date: Tue, 30 Jan 2024 10:53:11 +0100 [thread overview]
Message-ID: <ZbjHB3dFonrg1tFD@ninjato> (raw)
In-Reply-To: <f582067564f357e2183d3db67b217084ecb51888.1706608032.git.geert+renesas@glider.be>
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On Tue, Jan 30, 2024 at 10:47:49AM +0100, Geert Uytterhoeven wrote:
> Fix a typo in the name of the module clock for the second PCIe channel.
>
> Fixes: 5ab16198b431ca48 ("clk: renesas: r8a779g0: Add PCIe clocks")
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
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prev parent reply other threads:[~2024-01-30 9:53 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-01-30 9:47 [PATCH] clk: renesas: r8a779g0: Fix PCIe clock name Geert Uytterhoeven
2024-01-30 9:53 ` Wolfram Sang [this message]
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