From: Krzysztof Kozlowski <krzk@kernel.org>
To: Anand Moon <linux.amoon@gmail.com>,
Chanwoo Choi <cw00.choi@samsung.com>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Alim Akhtar <alim.akhtar@samsung.com>,
"open list:MAXIM PMIC AND MUIC DRIVERS FOR EXYNOS BASED BO..."
<linux-kernel@vger.kernel.org>,
"open list:COMMON CLK FRAMEWORK" <linux-clk@vger.kernel.org>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@vger.kernel.org>,
"moderated list:ARM/SAMSUNG S3C,
S5P AND EXYNOS ARM ARCHITECTURES"
<linux-arm-kernel@lists.infradead.org>,
"open list:ARM/SAMSUNG S3C,
S5P AND EXYNOS ARM ARCHITECTURES"
<linux-samsung-soc@vger.kernel.org>
Subject: Re: [PATCH v1 02/10] ARM: dts: exynos: Add rtc clock definitions for MAX77686 PMIC for Exynos4412 Odroid
Date: Fri, 25 Apr 2025 16:46:41 +0200 [thread overview]
Message-ID: <fa054136-961e-4a0f-a2cb-cdd393c3b022@kernel.org> (raw)
In-Reply-To: <20250425132727.5160-3-linux.amoon@gmail.com>
On 25/04/2025 15:26, Anand Moon wrote:
> The MAX77686A includes a crystal driver with an external load capacitance.
> When enabled, the crystal driver starts in low power mode. The
> LowJitterMode bit controls the crystal driver, allowing it to switch
> between low power mode and low jitter mode (high power mode).
> Setting the LowJitterMode bit to 1 activates low jitter mode on
> three channels simultaneously. These three 32khz buffer outputs
> (32KHAP, 32KHCP, P32KH) are independently enabled/disabled over I2C.
>
> The 32khz_ap output is typically routed to the AP Processor, while the
> 32khz_cp and 32khz_pmic outputs are intended for BT, WLAN, BB,
> or peripheral chipsets.
>
> Signed-off-by: Anand Moon <linux.amoon@gmail.com>
> ---
> arch/arm/boot/dts/samsung/exynos4412-odroid-common.dtsi | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/arch/arm/boot/dts/samsung/exynos4412-odroid-common.dtsi b/arch/arm/boot/dts/samsung/exynos4412-odroid-common.dtsi
> index 93ddbd4b0a18..03943c666d11 100644
> --- a/arch/arm/boot/dts/samsung/exynos4412-odroid-common.dtsi
> +++ b/arch/arm/boot/dts/samsung/exynos4412-odroid-common.dtsi
> @@ -289,6 +289,13 @@ max77686: pmic@9 {
> reg = <0x09>;
> #clock-cells = <1>;
>
> + max77686_osc: clocks {
> + compatible = "max77686-rtc";
I don't believe this works.
Best regards,
Krzysztof
next prev parent reply other threads:[~2025-04-25 14:46 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-25 13:26 [PATCH v1 00/10] Add rtc and suspend to ram for Maxim MAX77686 PMIC Anand Moon
2025-04-25 13:26 ` [PATCH v1 01/10] dt-bindings: clock: Add RTC clock binding for Maxim MAX77686 Anand Moon
2025-04-25 14:44 ` Krzysztof Kozlowski
2025-04-26 6:11 ` Anand Moon
2025-04-25 13:26 ` [PATCH v1 02/10] ARM: dts: exynos: Add rtc clock definitions for MAX77686 PMIC for Exynos4412 Odroid Anand Moon
2025-04-25 14:46 ` Krzysztof Kozlowski [this message]
2025-04-25 13:26 ` [PATCH v1 03/10] ARM: dts: exynos: Add proper regulator states for suspend-to-mem " Anand Moon
2025-04-25 13:26 ` [PATCH v1 04/10] ARM: dts: exynos: Add rtc clock definitions for MAX77686 PMIC for Exynos4412 Midas Anand Moon
2025-04-25 13:26 ` [PATCH v1 05/10] ARM: dts: exynos: Add rtc clock definitions for MAX77686 PMIC for Exynos4412 p4note Anand Moon
2025-04-25 13:26 ` [PATCH v1 06/10] ARM: dts: exynos: Update proper regulator states for suspend-to-mem for Exynos4412 p4node Anand Moon
2025-04-25 13:26 ` [PATCH v1 07/10] ARM: dts: exynos: Add rtc clock definitions for MAX77686 PMIC for Exynos5250 smdk5250 Anand Moon
2025-04-25 13:26 ` [PATCH v1 08/10] ARM: dts: exynos: Add proper regulator states for suspend-to-mem for Exyno5250 smdk5250 Anand Moon
2025-04-25 14:48 ` Krzysztof Kozlowski
2025-04-26 6:12 ` Anand Moon
2025-04-25 13:26 ` [PATCH v1 09/10] ARM: dts: exynos: Add rtc clock definitions for MAX77686 PMIC for Exynos5250 snow Anand Moon
2025-04-25 13:26 ` [PATCH v1 10/10] ARM: dts: exynos: Add proper regulator states for suspend-to-mem " Anand Moon
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