From: Krzysztof Kozlowski <krzk@kernel.org>
To: Pavitrakumar Managutte <pavitrakumarm@vayavyalabs.com>
Cc: linux-crypto@vger.kernel.org, devicetree@vger.kernel.org,
herbert@gondor.apana.org.au, robh@kernel.org,
Ruud.Derwig@synopsys.com, manjunath.hadli@vayavyalabs.com,
adityak@vayavyalabs.com,
Bhoomika Kadabi <bhoomikak@vayavyalabs.com>
Subject: Re: [PATCH v2 1/6] dt-bindings: crypto: Document support for SPAcc
Date: Tue, 6 May 2025 08:51:19 +0200 [thread overview]
Message-ID: <19b1fca7-e1b1-4190-9bcb-7ce36fabd02e@kernel.org> (raw)
In-Reply-To: <CALxtO0=jB9L4WvaZNjP5qVB1tc9UfhjC5-u7e1dhveaQF=AOEQ@mail.gmail.com>
On 06/05/2025 08:33, Pavitrakumar Managutte wrote:
> Hi Krzysztof,
> My comments are embedded below.
>
> Warm regards,
> PK
>
> On Mon, May 5, 2025 at 9:22 PM Krzysztof Kozlowski <krzk@kernel.org> wrote:
>>
>> On 05/05/2025 17:48, Krzysztof Kozlowski wrote:
>>> On 05/05/2025 14:55, Pavitrakumar M wrote:
>>>> From: Pavitrakumar Managutte <pavitrakumarm@vayavyalabs.com>
>>>>
>>>> Add DT bindings related to the SPAcc driver for Documentation.
>>>> DWC Synopsys Security Protocol Accelerator(SPAcc) Hardware Crypto
>>>> Engine is a crypto IP designed by Synopsys.
>>>>
>>>> Co-developed-by: Bhoomika Kadabi <bhoomikak@vayavyalabs.com>
>>>> Signed-off-by: Bhoomika Kadabi <bhoomikak@vayavyalabs.com>
>>>> Signed-off-by: Pavitrakumar Managutte <pavitrakumarm@vayavyalabs.com>
>>>> Acked-by: Ruud Derwig <Ruud.Derwig@synopsys.com>
>>>
>>>
>>> I do not see any improvements. It seems you ignored all comments, not
>>> single one was responded to or addressed.
>
> PK: Addressed all the below
>
> 1. SoC Bindings: We dont have any SoC bindings since its tested on the
> Zynq platform (on FPGA). So I have retained just the Synopsys SPAcc
> device here. Also added a detailed description for the same, which
> describes how we have tested the SPAcc peripheral on Zynq. This was
> based on your inputs to describe the existing hardware.
1. I asked to use SoC specific compatibles and after such explanation
that you use it in some different, hardware configuration, I asked to
use that.
Reflect whatever your hardware is called in the compatible.
I claim this cannot be used in a SoC without customization. If I
understood correctly this is soft IP in FPGA for evaluation, so no one
will be ever able to use it. Therefore this binding makes no sense to me
in general: you do not add anything any customer could use. It is fine
to add something which you use internally only, but again describe the
hardware properly.
2. I wrote you entire guide what is wrong with your Cc addresses and
this was fully ignored. Neither responded to, nor resolved.
I am not going to review the rest of the file.
Best regards,
Krzysztof
next prev parent reply other threads:[~2025-05-06 6:51 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-05-05 12:55 [PATCH v2 0/6] Add SPAcc Crypto Driver Pavitrakumar M
2025-05-05 12:55 ` [PATCH v2 1/6] dt-bindings: crypto: Document support for SPAcc Pavitrakumar M
2025-05-05 15:48 ` Krzysztof Kozlowski
2025-05-05 15:52 ` Krzysztof Kozlowski
2025-05-06 6:33 ` Pavitrakumar Managutte
2025-05-06 6:51 ` Krzysztof Kozlowski [this message]
2025-05-13 6:30 ` Pavitrakumar Managutte
2025-05-18 13:30 ` Krzysztof Kozlowski
2025-05-23 8:24 ` Pavitrakumar Managutte
2025-05-25 11:29 ` Krzysztof Kozlowski
2025-05-05 12:55 ` [PATCH v2 2/6] Add SPAcc Skcipher support Pavitrakumar M
2025-05-05 12:55 ` [PATCH v2 3/6] Add SPAcc AUTODETECT Support Pavitrakumar M
2025-05-05 12:55 ` [PATCH v2 4/6] Add SPAcc ahash support Pavitrakumar M
2025-05-12 5:31 ` Herbert Xu
2025-05-05 12:55 ` [PATCH v2 5/6] Add SPAcc AEAD support Pavitrakumar M
2025-05-05 12:55 ` [PATCH v2 6/6] Add SPAcc Kconfig and Makefile Pavitrakumar M
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