Re: [PATCH 0/7] cxl: Add CXL type2 accelerator support for cxl_test

[Dave Jiang <dave.jiang@intel.com>]

On 5/5/26 9:20 PM, Alison Schofield wrote:
> On Wed, Apr 22, 2026 at 04:02:30PM -0700, Dave Jiang wrote:
>> The series is based on v7.0-rc7 with Alejandro's type2 series [1] and
>> with Dan's follow on series [2].
>>
>> Series adds a 'type2_test' module parameter where it setup a mock type2
>> hierarchy with a mock type2 accelerator device directly under a root
>> port that has an auto region setup.
>>
>> It also includes a CXL fix that was encountered when running tests with
>> the new code.
>>
>> [
>>   {
>>     "memdevs":[
>>       {
>>         "memdev":"mem0",
>>         "ram_size":536870912,
>>         "ram_qos_class":42,
>>         "host":"cxl_type2_accel.0",
>>         "poison_injectable":false
>>       }
>>     ]
>>   },
>>   {
>>     "regions":[
>>       {
>>         "region":"region0",
>>         "resource":70300293136384,
>>         "size":536870912,
>>         "type":"ram",
>>         "interleave_ways":1,
>>         "interleave_granularity":4096,
>>         "decode_state":"commit"
>>       }
>>     ]
>>   }
>> ]
>>
>>     "root decoders":[
>>       {
>>         "decoder":"decoder0.0",
>>         "resource":70300293136384,
>>         "size":1073741824,
>>         "interleave_ways":1,
>>         "accelmem_capable":true,
> 
> FWIW - above was a pleasant surprise. We've had accelmem_capable plumbed in
> cxl list since 2022 !
> 
> That's a segway to a sanity check: is there anything else we want to
> display or do in the cxl-cli tooling that is special for Type 2 ?

Maybe back invalidate attributes? I don't remember if that's already there or if Davidlohr is adding that.

DJ

> 
> 
> 
>>         "qos_class":42,
>>         "nr_targets":1
>>       },
>>
>> [1]: https://lore.kernel.org/linux-cxl/20260330143827.1278677-1-alejandro.lucero-palau@amd.com/T/#t
>> [2]: https://lore.kernel.org/linux-cxl/20260403210050.1058650-1-dan.j.williams@intel.com/T/#t
>>
>>
>> Dave Jiang (7):
>>   cxl/test: Refactor mock_init_hdm_decoder() to prep for type2 decoder
>>   cxl/test: Add type2 support for mock CFMWS0
>>   cxl/test: Refactor platform device enumerations
>>   cxl/test: Add hierarchy enumeration support for type2 device
>>   cxl/test: Fixup hdm init for auto region to support type2
>>   cxl/test: Add cxl_test accelerator driver
>>   cxl: Fix double unregistration of CXL regions for type2 devices
>>
>>  drivers/cxl/core/region.c      |   3 +-
>>  tools/testing/cxl/test/Kbuild  |   2 +
>>  tools/testing/cxl/test/accel.c |  71 ++++
>>  tools/testing/cxl/test/cxl.c   | 717 ++++++++++++++++++++++++---------
>>  4 files changed, 605 insertions(+), 188 deletions(-)
>>  create mode 100644 tools/testing/cxl/test/accel.c
>>
>>
>> base-commit: 6fa897f2d9a917c4bd7b911b230fcfad05a952c2
>> -- 
>> 2.53.0
>>