Linux CXL
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From: Jonathan Cameron <Jonathan.Cameron@huawei.com>
To: Adam Manzanares <a.manzanares@samsung.com>
Cc: "linuxarm@huawei.com" <linuxarm@huawei.com>,
	"qemu-devel@nongnu.org" <qemu-devel@nongnu.org>,
	"Alex Bennée" <alex.bennee@linaro.org>,
	"Marcel Apfelbaum" <marcel@redhat.com>,
	"Michael S . Tsirkin" <mst@redhat.com>,
	"Igor Mammedov" <imammedo@redhat.com>,
	"Markus Armbruster" <armbru@redhat.com>,
	"linux-cxl@vger.kernel.org" <linux-cxl@vger.kernel.org>,
	"Ben Widawsky" <ben.widawsky@intel.com>,
	"Peter Maydell" <peter.maydell@linaro.org>,
	"Shameerali Kolothum Thodi"
	<shameerali.kolothum.thodi@huawei.com>,
	"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
	"Peter Xu" <peterx@redhat.com>,
	"David Hildenbrand" <david@redhat.com>,
	"Paolo Bonzini" <pbonzini@redhat.com>,
	"Saransh Gupta1" <saransh@ibm.com>,
	"Shreyas Shah" <shreyas.shah@elastics.cloud>,
	"Chris Browy" <cbrowy@avery-design.com>,
	"Samarth Saxena" <samarths@cadence.com>,
	"Dan Williams" <dan.j.williams@intel.com>,
	"Mark Cave-Ayland" <mark.cave-ayland@ilande.co.uk>,
	"dave@stgolabs.net" <dave@stgolabs.net>,
	"Tong Zhang" <t.zhang2@samsung.com>,
	"k.jensen@samsung.com" <k.jensen@samsung.com>,
	"Heekwon Park" <heekwon.p@samsung.com>,
	"Jaemin Jung" <j.jaemin@samsung.com>,
	"Jongmin Gim" <gim.jongmin@samsung.com>,
	"mcgrof@kernel.org" <mcgrof@kernel.org>
Subject: Re: [PATCH v8 04/46] hw/cxl/device: Introduce a CXL device (8.2.8)
Date: Tue, 5 Apr 2022 10:10:22 +0100	[thread overview]
Message-ID: <20220405101022.00003f06@huawei.com> (raw)
In-Reply-To: <20220404151500.GA57759@bgt-140510-bm01>

...

> > > > > 
> > > > > Can we switch this to mem_size and drop the persistent comment? It is my 
> > > > > understanding that HDM is independent of persistence.    
> > > > 
> > > > Discussed in the other branch of this thread.  Short answer is we don't
> > > > support non persistent yet but it's on the todo list.  What exactly
> > > > that looks like is to be determined.  One aspect of that is there
> > > > isn't currently a software stack to test volatile memory.    
> > > 
> > > If you can elaborate more here on what is needed to test the volatile memory 
> > > stack we may be able to help out.  
> > 
> > There are a bunch of different ways this could be done - ultimate we probably
> > want to do all of them.
> > 
> > https://urldefense.com/v3/__https://cdrdv2.intel.com/v1/dl/getContent/643805?wapkw=CXL*20memory*20device*20sw*20guide__;JSUlJQ!!EwVzqGoTKBqv-0DWAJBm!HzD_Dh_I9m9MydppOSSyhuzvwTawlg7LE77bEYiZ1i3AMgxV_YOI56VeZgkg-KuX7XMA$ 
> > has some suggestions (though no one is obliged to follow them!) See 2.4
> > 
> > First assumption is that for volatile devices, a common approach will be to do
> > all the setup in firmware before the OS boots and just present normal SRAT, HMAT
> > and memory tables as if it were any other memory.  If we want to go that way
> > for testing purposes then we'd need an open source firmware to implement
> > setup similar to that done in Linux - probably EDK2.
> > 
> > Of course, volatile memory might be hot added, in which case the OS may be involved.
> > In that case I think the main missing part would be actually doing the final memory
> > hotplug event to expose it to the OS + the necessary dynamic updating of the
> > OS numa description etc. There is work on going to get the information needed
> > but I think we are still some way off actually tying everything together.
> > 
> > Dan / Ben and team may be able to share more status information.  
> 
> Great, thanks for all of the information. We will start planning out our next
> steps. I'll add Luis on cc since he has chatted with me about setting up a 
> test framework for the CXL kernel code that will rely on QEMU.
> 
> >   
> > >   
> > > >     
> > > > >     
> > > > > > +} CXLDeviceState;
> > > > > > +
> > > > > > +/* Initialize the register block for a device */
> > > > > > +void cxl_device_register_block_init(Object *obj, CXLDeviceState *dev);  
> > 
> > ...
> >   
> > > > > +cc Dave, Klaus, Tong
> > > > > Other than the minor issues raised.
> > > > > 
> > > > > Looks good.
> > > > > 
> > > > > Reviewed by: Adam Manzanares <a.manzanares@samsung.com>    
> > > > 
> > > > Btw I haven't accepted all changes, but have been picking up
> > > > your RB.  Shout if that's not fine with you.    
> > > 
> > > Definitely fine with me and was my intention. Let us know how we can help move
> > > the work forward. I am kick starting reviewing and will try to bring others in.  
> > 
> > Great.  For various reasons I'll not bother mention here (see my employer ;)
> > I need to keep any discussions on mailing list or in a 'published' form.
> > So discussion on mailing list + at conferences works best for me but we can
> > organize some suitably hosted public calls if needed to align plans.
> > There is a plan for uconf at Plumbers this year which will hopefully let  
> 
> We would also prefer to keep discussions in the public domain. We have plans to
> attend Plumbers this year, so we look forward to discussing in person. 

Excellent.  If it's useful to have a public discussion before plumbers then the nice
folk at Linaro have been kind enough to host similar discussion in the
past (and deal with posting recordings etc afterwards for those who missed
the live call) and I expect they'd help us out again (Hi Alex ;)

> 
> > us do any longer term planning.  Shorter term my aims around QEMU side of things
> > are:
> > 
> > 1) Get the initial support upstream as I'm getting bored of rebasing :)
> >    I think we are in a fairly good state for doing that once qemu 7.0 is
> >    out.
> > 2) Improved tests so it doesn't break when no one is paying attention.  
> 
> Luis may have some thoughts here. 

Excellent. A testing expert is always useful. It would be nice to think about
getting something beyond a basic 'does it boot' test into the qemu CI but
I've not really looked into how one might do that.

> 
> > 3) Expand out the feature set to keep up with what is going on Linux kernel
> >    wise (personally no other OS of interest, but it would be great if anyone
> >    wanted to help deal with other operating systems that care).
> >   * RAS
> >   * CDAT for switches etc, host table updates for generic port definition
> >    - What ever else I've missed recently.  When the region code finalizes
> >      I suspect we'll want to add a load more tests to stress various corners
> >      of that.
> >   * Alison may help with partitioning support.
> > 4) Expand features where we have currently taken a short cut such as enabling
> >    multiple HDM decoders.
> > 5) Use it as a path for testing spec features before publication (obviously can't
> >    talk about that on list but I've open in appropriate venue about that).
> > 
> > Happy to have help on any of the above, but 'features' that are reasonably separate
> > such as RAS support might be a good place for contributions that won't be
> > greatly affected by any other refactoring going on.
> > 
> > I've pushed all but SPDM support and stuff for which the spec isn't public yet up on
> > https://urldefense.com/v3/__https://gitlab.com/jic23/qemu/-/commits/cxl-v9-draft-1__;!!EwVzqGoTKBqv-0DWAJBm!HzD_Dh_I9m9MydppOSSyhuzvwTawlg7LE77bEYiZ1i3AMgxV_YOI56VeZgkg-EMwmPTV$ 
> > (as you can see CI found a segfault today so I'll push the fix out for that
> >  shortly - that also highlighted a build breakage mid series that I've fixed up.).
> >   
> 
> Once again thanks for all of the pointers. 

You are welcome. It's nice to see this work gain traction :)

Anyhow, v9 is on it's way (slowly) through our firewall (got log anti spam
send rate limits) so fingers crossed we are nearly ready with this first bit
of support to build more fun stuff on top of.

Jonathan

> 
> > Jonathan



  reply	other threads:[~2022-04-05  9:53 UTC|newest]

Thread overview: 71+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-03-18 15:05 [PATCH v8 00/46] CXl 2.0 emulation Support Jonathan Cameron
2022-03-18 15:05 ` [PATCH v8 01/46] hw/pci/cxl: Add a CXL component type (interface) Jonathan Cameron
2022-03-27 13:32   ` Adam Manzanares
2022-03-18 15:05 ` [PATCH v8 02/46] hw/cxl/component: Introduce CXL components (8.1.x, 8.2.5) Jonathan Cameron
2022-03-25 13:45   ` Jonathan Cameron
2022-03-28 14:28   ` Adam Manzanares
2022-03-30 16:55     ` Jonathan Cameron
2022-03-31 12:20   ` Jonathan Cameron
2022-03-18 15:05 ` [PATCH v8 03/46] MAINTAINERS: Add entry for Compute Express Link Emulation Jonathan Cameron
2022-03-18 15:05 ` [PATCH v8 04/46] hw/cxl/device: Introduce a CXL device (8.2.8) Jonathan Cameron
2022-03-29 18:13   ` Adam Manzanares
2022-03-29 19:53     ` Davidlohr Bueso
2022-03-30 12:15       ` Jonathan Cameron
2022-03-31 21:42         ` Adam Manzanares
2022-03-30 17:48     ` Jonathan Cameron
2022-03-31 22:13       ` Adam Manzanares
2022-04-01 13:30         ` Jonathan Cameron
2022-04-04 15:15           ` Adam Manzanares
2022-04-05  9:10             ` Jonathan Cameron [this message]
2022-03-18 15:05 ` [PATCH v8 05/46] hw/cxl/device: Implement the CAP array (8.2.8.1-2) Jonathan Cameron
2022-03-18 15:05 ` [PATCH v8 06/46] hw/cxl/device: Implement basic mailbox (8.2.8.4) Jonathan Cameron
2022-03-18 15:05 ` [PATCH v8 07/46] hw/cxl/device: Add memory device utilities Jonathan Cameron
2022-03-18 15:05 ` [PATCH v8 08/46] hw/cxl/device: Add cheap EVENTS implementation (8.2.9.1) Jonathan Cameron
2022-03-18 15:05 ` [PATCH v8 09/46] hw/cxl/device: Timestamp implementation (8.2.9.3) Jonathan Cameron
2022-03-18 15:05 ` [PATCH v8 10/46] hw/cxl/device: Add log commands (8.2.9.4) + CEL Jonathan Cameron
2022-03-18 15:06 ` [PATCH v8 11/46] hw/pxb: Use a type for realizing expanders Jonathan Cameron
2022-03-18 15:06 ` [PATCH v8 12/46] hw/pci/cxl: Create a CXL bus type Jonathan Cameron
2022-03-18 15:06 ` [PATCH v8 13/46] cxl: Machine level control on whether CXL support is enabled Jonathan Cameron
2022-03-18 15:06 ` [PATCH v8 14/46] hw/pxb: Allow creation of a CXL PXB (host bridge) Jonathan Cameron
2022-03-18 15:06 ` [PATCH v8 15/46] qtest/cxl: Introduce initial test for pxb-cxl only Jonathan Cameron
2022-03-18 15:06 ` [PATCH v8 16/46] hw/cxl/rp: Add a root port Jonathan Cameron
2022-03-18 15:06 ` [PATCH v8 17/46] hw/cxl/device: Add a memory device (8.2.8.5) Jonathan Cameron
2022-03-19  8:32   ` Mark Cave-Ayland
2022-03-23 18:18     ` Jonathan Cameron
2022-03-18 15:06 ` [PATCH v8 18/46] hw/cxl/device: Implement MMIO HDM decoding (8.2.5.12) Jonathan Cameron
2022-03-18 15:06 ` [PATCH v8 19/46] hw/cxl/device: Add some trivial commands Jonathan Cameron
2022-03-18 16:56   ` Alison Schofield
2022-03-23 15:57     ` Jonathan Cameron
2022-03-18 15:06 ` [PATCH v8 20/46] hw/cxl/device: Plumb real Label Storage Area (LSA) sizing Jonathan Cameron
2022-03-18 15:06 ` [PATCH v8 21/46] hw/cxl/device: Implement get/set Label Storage Area (LSA) Jonathan Cameron
2022-03-18 15:06 ` [PATCH v8 22/46] qtests/cxl: Add initial root port and CXL type3 tests Jonathan Cameron
2022-03-18 15:06 ` [PATCH v8 23/46] hw/cxl/component: Implement host bridge MMIO (8.2.5, table 142) Jonathan Cameron
2022-03-19  8:35   ` Mark Cave-Ayland
2022-03-23 18:37     ` Jonathan Cameron
2022-03-18 15:06 ` [PATCH v8 24/46] acpi/cxl: Add _OSC implementation (9.14.2) Jonathan Cameron
2022-03-18 15:06 ` [PATCH v8 25/46] acpi/cxl: Create the CEDT (9.14.1) Jonathan Cameron
2022-03-18 15:06 ` [PATCH v8 26/46] hw/cxl/component: Add utils for interleave parameter encoding/decoding Jonathan Cameron
2022-03-18 15:06 ` [PATCH v8 27/46] hw/cxl/host: Add support for CXL Fixed Memory Windows Jonathan Cameron
2022-03-28 12:50   ` Markus Armbruster
2022-03-31 12:12     ` Jonathan Cameron
2022-03-18 15:06 ` [PATCH v8 28/46] acpi/cxl: Introduce CFMWS structures in CEDT Jonathan Cameron
2022-03-18 15:06 ` [PATCH v8 29/46] hw/pci-host/gpex-acpi: Add support for dsdt construction for pxb-cxl Jonathan Cameron
2022-03-18 15:06 ` [PATCH v8 30/46] pci/pcie_port: Add pci_find_port_by_pn() Jonathan Cameron
2022-03-18 15:06 ` [PATCH v8 31/46] CXL/cxl_component: Add cxl_get_hb_cstate() Jonathan Cameron
2022-03-18 15:06 ` [PATCH v8 32/46] mem/cxl_type3: Add read and write functions for associated hostmem Jonathan Cameron
2022-03-19  8:53   ` Mark Cave-Ayland
2022-03-23 15:43     ` Jonathan Cameron
2022-03-18 15:06 ` [PATCH v8 33/46] cxl/cxl-host: Add memops for CFMWS region Jonathan Cameron
2022-03-18 15:06 ` [PATCH v8 34/46] hw/cxl/component Add a dumb HDM decoder handler Jonathan Cameron
2022-03-18 15:06 ` [PATCH v8 35/46] i386/pc: Enable CXL fixed memory windows Jonathan Cameron
2022-03-18 15:06 ` [PATCH v8 36/46] tests/acpi: q35: Allow addition of a CXL test Jonathan Cameron
2022-03-18 15:06 ` [PATCH v8 37/46] qtests/bios-tables-test: Add a test for CXL emulation Jonathan Cameron
2022-03-18 15:06 ` [PATCH v8 38/46] tests/acpi: Add tables " Jonathan Cameron
2022-03-18 15:06 ` [PATCH v8 39/46] qtest/cxl: Add more complex test cases with CFMWs Jonathan Cameron
2022-03-18 15:06 ` [PATCH v8 40/46] hw/arm/virt: Basic CXL enablement on pci_expander_bridge instances pxb-cxl Jonathan Cameron
2022-03-18 15:06 ` [PATCH v8 41/46] qtest/cxl: Add aarch64 virt test for CXL Jonathan Cameron
2022-03-18 15:06 ` [PATCH v8 42/46] docs/cxl: Add initial Compute eXpress Link (CXL) documentation Jonathan Cameron
2022-03-18 15:06 ` [PATCH v8 43/46] pci-bridge/cxl_upstream: Add a CXL switch upstream port Jonathan Cameron
2022-03-18 15:06 ` [PATCH v8 44/46] pci-bridge/cxl_downstream: Add a CXL switch downstream port Jonathan Cameron
2022-03-18 15:06 ` [PATCH v8 45/46] cxl/cxl-host: Support interleave decoding with one level of switches Jonathan Cameron
2022-03-18 15:06 ` [PATCH v8 46/46] docs/cxl: Add switch documentation Jonathan Cameron

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