From: Jonathan Cameron <Jonathan.Cameron@Huawei.com>
To: Dan Williams <dan.j.williams@intel.com>
Cc: <linux-cxl@vger.kernel.org>,
Ben Widawsky <ben.widawsky@intel.com>,
"Weiny, Ira" <ira.weiny@intel.com>,
"Schofield, Alison" <alison.schofield@intel.com>,
Vishal L Verma <vishal.l.verma@intel.com>
Subject: Re: [PATCH 05/14] cxl/mem: Validate port connectivity before dvsec ranges
Date: Wed, 18 May 2022 18:21:35 +0100 [thread overview]
Message-ID: <20220518182135.00002c09@Huawei.com> (raw)
In-Reply-To: <CAPcyv4ib5-9W+dvHBgO5y06Gwt69NJXPc8b+GsuF-wiYT9iuPw@mail.gmail.com>
On Wed, 18 May 2022 09:41:43 -0700
Dan Williams <dan.j.williams@intel.com> wrote:
> On Wed, May 18, 2022 at 9:15 AM Jonathan Cameron
> <Jonathan.Cameron@huawei.com> wrote:
> >
> > On Thu, 12 May 2022 11:14:43 -0700
> > Dan Williams <dan.j.williams@intel.com> wrote:
> >
> > > In preparation for validating DVSEC ranges against the platform declared
> > > CXL memory ranges (ACPI CFMWS) move port enumeration before the
> > > endpoint's decoder validation. Ultimately this logic will move to the
> > > port driver, but create a bisect point before that larger move.
> > >
> > > Signed-off-by: Dan Williams <dan.j.williams@intel.com>
> > > ---
> > > drivers/cxl/mem.c | 36 ++++++++++++++++++------------------
> > > 1 file changed, 18 insertions(+), 18 deletions(-)
> > >
> > > diff --git a/drivers/cxl/mem.c b/drivers/cxl/mem.c
> > > index fed7f10ef9b2..80e75a410499 100644
> > > --- a/drivers/cxl/mem.c
> > > +++ b/drivers/cxl/mem.c
> > > @@ -140,22 +140,6 @@ static int cxl_mem_probe(struct device *dev)
> > > if (work_pending(&cxlmd->detach_work))
> > > return -EBUSY;
> > >
> > > - rc = cxlds->wait_media_ready(cxlds);
> > > - if (rc) {
> > > - dev_err(dev, "Media not active (%d)\n", rc);
> > > - return rc;
> > > - }
> > > -
> > > - /*
> > > - * If DVSEC ranges are being used instead of HDM decoder registers there
> > > - * is no use in trying to manage those.
> > > - */
> > > - if (!cxl_hdm_decode_init(cxlds)) {
> > > - dev_err(dev,
> > > - "Legacy range registers configuration prevents HDM operation.\n");
> > > - return -EBUSY;
> > > - }
> > > -
> > > rc = devm_cxl_enumerate_ports(cxlmd);
> > > if (rc)
> > > return rc;
> > > @@ -171,16 +155,32 @@ static int cxl_mem_probe(struct device *dev)
> > > dev_err(dev, "CXL port topology %s not enabled\n",
> > > dev_name(&parent_port->dev));
> > > rc = -ENXIO;
> > > - goto out;
> > > + goto unlock;
> > > }
> > >
> > > rc = create_endpoint(cxlmd, parent_port);
> > > -out:
> > > +unlock:
> >
> > Trivial but I think this rename of the label would be better in the earlier
> > patch where you first added the if (rc) below.
> > I suppose it is arguable that the previous patch is a fix so should be minimal
> > though so I'm not that bothered if you leave it here.
> >
>
> True, the rename is just as much a part of what "9ea4dcf49878 PM: CXL:
> Disable suspend" was missing as the fix, I'll go ahead and make the
> adjustment.
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
I'm lazy enough not to look again for something so trivial ;)
next prev parent reply other threads:[~2022-05-18 17:21 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-12 18:14 [PATCH 00/14] cxl: Fix "mem_enable" handling Dan Williams
2022-05-12 18:14 ` [PATCH 01/14] cxl/mem: Drop mem_enabled check from wait_for_media() Dan Williams
2022-05-18 17:21 ` Jonathan Cameron
2022-05-12 18:14 ` [PATCH 02/14] cxl/pci: Consolidate wait_for_media() and wait_for_media_ready() Dan Williams
2022-05-18 17:22 ` Jonathan Cameron
2022-05-12 18:14 ` [PATCH 03/14] cxl/pci: Drop wait_for_valid() from cxl_await_media_ready() Dan Williams
2022-05-18 17:22 ` Jonathan Cameron
2022-05-12 18:14 ` [PATCH 04/14] cxl/mem: Fix cxl_mem_probe() error exit Dan Williams
2022-05-18 17:23 ` Jonathan Cameron
2022-05-12 18:14 ` [PATCH 05/14] cxl/mem: Validate port connectivity before dvsec ranges Dan Williams
2022-05-18 16:13 ` Jonathan Cameron
2022-05-18 16:41 ` Dan Williams
2022-05-18 17:21 ` Jonathan Cameron [this message]
2022-05-12 18:14 ` [PATCH 06/14] cxl/pci: Move cxl_await_media_ready() to the core Dan Williams
2022-05-18 16:21 ` Jonathan Cameron
2022-05-18 16:37 ` Dan Williams
2022-05-18 17:20 ` Jonathan Cameron
2022-05-18 18:22 ` Dan Williams
2022-05-12 18:14 ` [PATCH 07/14] cxl/mem: Consolidate CXL DVSEC Range enumeration in " Dan Williams
2022-05-18 16:31 ` Jonathan Cameron
2022-05-18 16:52 ` Dan Williams
2022-05-18 17:24 ` Jonathan Cameron
2022-05-12 18:14 ` [PATCH 08/14] cxl/mem: Skip range enumeration if mem_enable clear Dan Williams
2022-05-18 17:25 ` Jonathan Cameron
2022-05-12 18:15 ` [PATCH 09/14] cxl/mem: Fix CXL DVSEC Range Sizing Dan Williams
2022-05-18 16:40 ` Jonathan Cameron
2022-05-18 17:06 ` Dan Williams
2022-05-12 18:15 ` [PATCH 10/14] cxl/mem: Merge cxl_dvsec_ranges() and cxl_hdm_decode_init() Dan Williams
2022-05-12 18:15 ` [PATCH 11/14] cxl/pci: Drop @info argument to cxl_hdm_decode_init() Dan Williams
2022-05-18 16:45 ` Jonathan Cameron
2022-05-12 18:15 ` [PATCH 12/14] cxl/port: Move endpoint HDM Decoder Capability init to port driver Dan Williams
2022-05-18 16:50 ` Jonathan Cameron
2022-05-12 18:15 ` [PATCH 13/14] cxl/port: Reuse 'struct cxl_hdm' context for hdm init Dan Williams
2022-05-18 16:50 ` Jonathan Cameron
2022-05-12 18:15 ` [PATCH 14/14] cxl/port: Enable HDM Capability after validating DVSEC Ranges Dan Williams
2022-05-16 18:41 ` Ariel.Sibley
2022-05-16 18:52 ` Dan Williams
2022-05-16 19:31 ` Ariel.Sibley
2022-05-16 20:07 ` Dan Williams
2022-05-18 0:38 ` [PATCH v2 " Dan Williams
2022-05-18 2:07 ` Ariel.Sibley
2022-05-18 2:44 ` Dan Williams
2022-05-18 15:33 ` Jonathan Cameron
2022-05-18 17:17 ` Jonathan Cameron
2022-05-18 18:00 ` Dan Williams
2022-05-18 0:50 ` [PATCH 00/14] cxl: Fix "mem_enable" handling Ira Weiny
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20220518182135.00002c09@Huawei.com \
--to=jonathan.cameron@huawei.com \
--cc=alison.schofield@intel.com \
--cc=ben.widawsky@intel.com \
--cc=dan.j.williams@intel.com \
--cc=ira.weiny@intel.com \
--cc=linux-cxl@vger.kernel.org \
--cc=vishal.l.verma@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox