Re: [PATCH 1/4] cxl/region: Fix decoder interleave programming

[Jonathan Cameron <Jonathan.Cameron@huawei.com>]

On Wed, 03 Aug 2022 00:24:23 -0700
Dan Williams <dan.j.williams@intel.com> wrote:

> Jonathan notes:
> 
> "Curiously interleave ways = 1 for the EPs which is obviously wrong"
> 
> ...while testing the latest CXL development branch on QEMU.
> 
> It turns out the region creation process failed to program the endpoint
> decoders. This was missed because the default settings of x1 at 4K
> intereleave still results in the region appearing to function. Jonathan
> caught the bug by reverse mapping the translations that need to happen
> for the QEMU support.
> 
> Link: https://lore.kernel.org/r/62e95fdf9f6e2_30440294e4@dwillia2-xfh.jf.intel.com.notmuch
> Fixes: 384e624bb211 ("cxl/region: Attach endpoint decoders")
> Reported-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
> Signed-off-by: Dan Williams <dan.j.williams@intel.com>

Looks good to me.  Minimal testing done so far.
Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>

> ---
>  drivers/cxl/core/region.c |    3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c
> index cf5d5811fe4c..8e6ff3f39755 100644
> --- a/drivers/cxl/core/region.c
> +++ b/drivers/cxl/core/region.c
> @@ -1294,6 +1294,9 @@ static int cxl_region_attach(struct cxl_region *cxlr,
>  		p->state = CXL_CONFIG_ACTIVE;
>  	}
>  
> +	cxled->cxld.interleave_ways = p->interleave_ways;
> +	cxled->cxld.interleave_granularity = p->interleave_granularity;
> +
>  	return 0;
>  
>  err_decrement:
>