From: Robert Richter <rrichter@amd.com>
To: Alison Schofield <alison.schofield@intel.com>,
Vishal Verma <vishal.l.verma@intel.com>,
Ira Weiny <ira.weiny@intel.com>,
Ben Widawsky <bwidawsk@kernel.org>,
Dan Williams <dan.j.williams@intel.com>
Cc: <linux-cxl@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
Bjorn Helgaas <bhelgaas@google.com>,
"Rafael J. Wysocki" <rafael@kernel.org>,
Len Brown <lenb@kernel.org>,
Jonathan Cameron <Jonathan.Cameron@huawei.com>,
"Davidlohr Bueso" <dave@stgolabs.net>,
Robert Richter <rrichter@amd.com>
Subject: [PATCH v2 05/12] cxl/acpi: Improve debug messages in cxl_acpi_probe()
Date: Tue, 18 Oct 2022 15:23:33 +0200 [thread overview]
Message-ID: <20221018132341.76259-6-rrichter@amd.com> (raw)
In-Reply-To: <20221018132341.76259-1-rrichter@amd.com>
In cxl_acpi_probe() the iterator bus_for_each_dev() walks through all
CXL hosts. Since all dev_*() debug messages point to the ACPI0017
device which is the CXL root for all hosts, the device information is
pointless as it is always the same device. Change this to use the host
device for this instead.
Also, add additional host specific information such as CXL support,
UID and CHBCR.
This is an example log:
acpi ACPI0016:00: UID found: 4
acpi ACPI0016:00: CHBCR found: 0x28090000000
acpi ACPI0016:00: dport added to root0
acpi ACPI0016:00: host-bridge: ACPI0016:00
pci0000:7f: host supports CXL
Signed-off-by: Robert Richter <rrichter@amd.com>
---
drivers/cxl/acpi.c | 12 ++++++++----
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/drivers/cxl/acpi.c b/drivers/cxl/acpi.c
index 31e104f0210f..fb9f72813067 100644
--- a/drivers/cxl/acpi.c
+++ b/drivers/cxl/acpi.c
@@ -221,6 +221,8 @@ static int add_host_bridge_uport(struct device *match, void *arg)
if (IS_ERR(port))
return PTR_ERR(port);
+ dev_info(pci_root->bus->bridge, "host supports CXL\n");
+
return 0;
}
@@ -264,11 +266,12 @@ static int add_host_bridge_dport(struct device *match, void *arg)
status = acpi_evaluate_integer(bridge->handle, METHOD_NAME__UID, NULL,
&uid);
if (status != AE_OK) {
- dev_err(host, "unable to retrieve _UID of %s\n",
- dev_name(match));
+ dev_err(match, "unable to retrieve _UID\n");
return -ENODEV;
}
+ dev_dbg(match, "UID found: %lld\n", uid);
+
ctx = (struct cxl_chbs_context) {
.dev = host,
.uid = uid,
@@ -276,11 +279,12 @@ static int add_host_bridge_dport(struct device *match, void *arg)
acpi_table_parse_cedt(ACPI_CEDT_TYPE_CHBS, cxl_get_chbcr, &ctx);
if (ctx.chbcr == 0) {
- dev_warn(host, "No CHBS found for Host Bridge: %s\n",
- dev_name(match));
+ dev_warn(match, "No CHBS found for Host Bridge (UID %lld)\n", uid);
return 0;
}
+ dev_dbg(match, "CHBCR found: 0x%08llx\n", (u64)ctx.chbcr);
+
dport = devm_cxl_add_dport(root_port, match, uid, ctx.chbcr);
if (IS_ERR(dport))
return PTR_ERR(dport);
--
2.30.2
next prev parent reply other threads:[~2022-10-18 13:24 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-18 13:23 [PATCH v2 00/12] cxl: Add support for Restricted CXL hosts (RCD mode) Robert Richter
2022-10-18 13:23 ` [PATCH v2 01/12] cxl/core: Remove duplicate declaration of devm_cxl_iomap_block() Robert Richter
2022-10-20 23:56 ` Dan Williams
2022-10-21 8:54 ` Robert Richter
2022-10-18 13:23 ` [PATCH v2 02/12] cxl/core: Check physical address before mapping it in devm_cxl_iomap_block() Robert Richter
2022-10-21 0:01 ` Dan Williams
2022-10-18 13:23 ` [PATCH v2 03/12] cxl: Unify debug messages when calling devm_cxl_add_port() Robert Richter
2022-10-21 0:20 ` Dan Williams
2022-10-21 8:57 ` Robert Richter
2022-10-18 13:23 ` [PATCH v2 04/12] cxl: Unify debug messages when calling devm_cxl_add_dport() Robert Richter
2022-10-21 0:32 ` Dan Williams
2022-10-21 9:00 ` Robert Richter
2022-10-18 13:23 ` Robert Richter [this message]
2022-10-21 1:00 ` [PATCH v2 05/12] cxl/acpi: Improve debug messages in cxl_acpi_probe() Dan Williams
2022-11-14 20:11 ` [PATCH] tools/testing/cxl: Add bridge mocking support Dan Williams
2022-11-15 10:33 ` Robert Richter
2022-11-15 18:11 ` Dan Williams
2022-12-02 16:59 ` Jonathan Cameron
2022-10-18 13:23 ` [PATCH v2 06/12] cxl/acpi: Extract component registers of restricted hosts from RCRB Robert Richter
2022-10-18 13:31 ` Rafael J. Wysocki
2022-10-18 18:41 ` Robert Richter
2022-10-18 18:57 ` Rafael J. Wysocki
2022-10-19 10:46 ` Robert Richter
2022-10-21 5:17 ` Dan Williams
2022-10-24 21:04 ` Robert Richter
2022-10-24 21:24 ` Dan Williams
2022-10-24 22:37 ` Dan Williams
[not found] ` <63cd195a-f5d0-b016-d833-b3a9c86ff6ee@intel.com>
2022-10-24 23:50 ` Robert Richter
2022-10-24 23:57 ` Dan Williams
2022-10-18 13:23 ` [PATCH v2 07/12] cxl: Remove dev_is_cxl_root_child() check in devm_cxl_enumerate_ports() Robert Richter
2022-10-21 5:38 ` Dan Williams
2022-10-21 6:32 ` Verma, Vishal L
2022-11-09 14:33 ` Robert Richter
2022-10-18 13:23 ` [PATCH v2 08/12] cxl: Factor out code in devm_cxl_enumerate_ports() to find_port_attach_ep() Robert Richter
2022-10-18 13:23 ` [PATCH v2 09/12] cxl: Extend devm_cxl_enumerate_ports() to support restricted devices (RCDs) Robert Richter
2022-10-18 13:23 ` [PATCH v2 10/12] cxl: Do not ignore PCI config read errors in match_add_dports() Robert Richter
2022-10-18 13:23 ` [PATCH v2 11/12] cxl: Factor out code in match_add_dports() to pci_dev_add_dport() Robert Richter
2022-10-18 13:23 ` [PATCH v2 12/12] cxl: Extend devm_cxl_port_enumerate_dports() to support restricted hosts (RCH) Robert Richter
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