From: Jonathan Cameron <Jonathan.Cameron@Huawei.com>
To: Dan Williams <dan.j.williams@intel.com>
Cc: <linux-cxl@vger.kernel.org>, Robert Richter <rrichter@amd.com>
Subject: Re: [PATCH] tools/testing/cxl: Add bridge mocking support
Date: Fri, 2 Dec 2022 16:59:06 +0000 [thread overview]
Message-ID: <20221202165906.000041ce@Huawei.com> (raw)
In-Reply-To: <166845667383.1449826.14492184009399164787.stgit@dwillia2-xfh.jf.intel.com>
On Mon, 14 Nov 2022 12:11:13 -0800
Dan Williams <dan.j.williams@intel.com> wrote:
> In preparation for cxl_acpi walking pci_root->bus->bridge, add that
> association to the mock pci_root instances.
>
> Note that the missing 3rd entry in mock_pci_root[] was not noticed until
> now given that the test version of to_cxl_host_bridge()
> (tools/testing/cxl/mock_acpi.c), obviated the need for that entry.
> However, "cxl/acpi: Improve debug messages in cxl_acpi_probe()" [1]
> needs pci_root->bus->bridge to be populated.
>
> Link: https://lore.kernel.org/r/20221018132341.76259-6-rrichter@amd.com [1]
> Cc: Robert Richter <rrichter@amd.com>
> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
> ---
> tools/testing/cxl/test/cxl.c | 10 ++++++++--
> 1 file changed, 8 insertions(+), 2 deletions(-)
>
> diff --git a/tools/testing/cxl/test/cxl.c b/tools/testing/cxl/test/cxl.c
> index a5146d80ecc4..facfcd11cb67 100644
> --- a/tools/testing/cxl/test/cxl.c
> +++ b/tools/testing/cxl/test/cxl.c
> @@ -439,14 +439,18 @@ mock_acpi_evaluate_integer(acpi_handle handle, acpi_string pathname,
> return AE_OK;
> }
>
> -static struct pci_bus mock_pci_bus[NR_CXL_HOST_BRIDGES];
> -static struct acpi_pci_root mock_pci_root[NR_CXL_HOST_BRIDGES] = {
> +static struct pci_bus mock_pci_bus[NR_CXL_HOST_BRIDGES + NR_CXL_SINGLE_HOST];
> +static struct acpi_pci_root mock_pci_root[ARRAY_SIZE(mock_pci_bus)] = {
> [0] = {
> .bus = &mock_pci_bus[0],
> },
> [1] = {
> .bus = &mock_pci_bus[1],
> },
> + [2] = {
> + .bus = &mock_pci_bus[2],
> + },
> +
Ahah. Here's the stray space that gets cleaned up in the RCH series. Guessing you
don't want to rebase to fix it here?
> };
next prev parent reply other threads:[~2022-12-02 17:00 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-18 13:23 [PATCH v2 00/12] cxl: Add support for Restricted CXL hosts (RCD mode) Robert Richter
2022-10-18 13:23 ` [PATCH v2 01/12] cxl/core: Remove duplicate declaration of devm_cxl_iomap_block() Robert Richter
2022-10-20 23:56 ` Dan Williams
2022-10-21 8:54 ` Robert Richter
2022-10-18 13:23 ` [PATCH v2 02/12] cxl/core: Check physical address before mapping it in devm_cxl_iomap_block() Robert Richter
2022-10-21 0:01 ` Dan Williams
2022-10-18 13:23 ` [PATCH v2 03/12] cxl: Unify debug messages when calling devm_cxl_add_port() Robert Richter
2022-10-21 0:20 ` Dan Williams
2022-10-21 8:57 ` Robert Richter
2022-10-18 13:23 ` [PATCH v2 04/12] cxl: Unify debug messages when calling devm_cxl_add_dport() Robert Richter
2022-10-21 0:32 ` Dan Williams
2022-10-21 9:00 ` Robert Richter
2022-10-18 13:23 ` [PATCH v2 05/12] cxl/acpi: Improve debug messages in cxl_acpi_probe() Robert Richter
2022-10-21 1:00 ` Dan Williams
2022-11-14 20:11 ` [PATCH] tools/testing/cxl: Add bridge mocking support Dan Williams
2022-11-15 10:33 ` Robert Richter
2022-11-15 18:11 ` Dan Williams
2022-12-02 16:59 ` Jonathan Cameron [this message]
2022-10-18 13:23 ` [PATCH v2 06/12] cxl/acpi: Extract component registers of restricted hosts from RCRB Robert Richter
2022-10-18 13:31 ` Rafael J. Wysocki
2022-10-18 18:41 ` Robert Richter
2022-10-18 18:57 ` Rafael J. Wysocki
2022-10-19 10:46 ` Robert Richter
2022-10-21 5:17 ` Dan Williams
2022-10-24 21:04 ` Robert Richter
2022-10-24 21:24 ` Dan Williams
2022-10-24 22:37 ` Dan Williams
[not found] ` <63cd195a-f5d0-b016-d833-b3a9c86ff6ee@intel.com>
2022-10-24 23:50 ` Robert Richter
2022-10-24 23:57 ` Dan Williams
2022-10-18 13:23 ` [PATCH v2 07/12] cxl: Remove dev_is_cxl_root_child() check in devm_cxl_enumerate_ports() Robert Richter
2022-10-21 5:38 ` Dan Williams
2022-10-21 6:32 ` Verma, Vishal L
2022-11-09 14:33 ` Robert Richter
2022-10-18 13:23 ` [PATCH v2 08/12] cxl: Factor out code in devm_cxl_enumerate_ports() to find_port_attach_ep() Robert Richter
2022-10-18 13:23 ` [PATCH v2 09/12] cxl: Extend devm_cxl_enumerate_ports() to support restricted devices (RCDs) Robert Richter
2022-10-18 13:23 ` [PATCH v2 10/12] cxl: Do not ignore PCI config read errors in match_add_dports() Robert Richter
2022-10-18 13:23 ` [PATCH v2 11/12] cxl: Factor out code in match_add_dports() to pci_dev_add_dport() Robert Richter
2022-10-18 13:23 ` [PATCH v2 12/12] cxl: Extend devm_cxl_port_enumerate_dports() to support restricted hosts (RCH) Robert Richter
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20221202165906.000041ce@Huawei.com \
--to=jonathan.cameron@huawei.com \
--cc=dan.j.williams@intel.com \
--cc=linux-cxl@vger.kernel.org \
--cc=rrichter@amd.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox